Merge pull request #38 from RT-Thread/master

update
2021-04-14 11:00:29 +08:00 · 2021-04-14 11:00:29 +08:00 · a4a01ed2da
parent b2f23f2a96 b7a5319e5c
commit a4a01ed2da
249 changed files with 48689 additions and 99434 deletions
--- a/.github/workflows/action.yml
+++ b/.github/workflows/action.yml
@ -78,6 +78,7 @@ jobs:
         - {RTT_BSP: "stm32/stm32f103-onenet-nbiot", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32f103-yf-ufun", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32f107-uc-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f207-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32f401-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32f405-smdz-breadfruit", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32f407-atk-explorer", RTT_TOOL_CHAIN: "sourcery-arm"}
@ -119,7 +120,6 @@ jobs:
         - {RTT_BSP: "stm32/stm32mp157a-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32mp157a-st-ev1", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32wb55-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
-         - {RTT_BSP: "stm32f20x", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "swm320", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "swm320-lq100", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "beaglebone", RTT_TOOL_CHAIN: "sourcery-arm"}
--- a/.gitignore
+++ b/.gitignore
@ -35,3 +35,6 @@ ncscope.*
 #ctag files
 tags

+.idea
+CMakeLists.txt
+cmake-build-debug
--- a/bsp/at32/Libraries/AT32_Std_Driver/AT32F4xx_StdPeriph_Driver/inc/at32f4xx_comp.h
+++ b/bsp/at32/Libraries/AT32_Std_Driver/AT32F4xx_StdPeriph_Driver/inc/at32f4xx_comp.h
@ -1,28 +1,13 @@
 /**
-  ******************************************************************************
-  * @file    at32f4xx_comp.h
-  * @author  Artery
-  * @version V1.0.1
-  * @date    20-April-2012
-  * @brief   This file contains all the functions prototypes for the COMP firmware 
-  *          library.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2012 Artery</center></h2>
-  *
-  * Licensed under Artery Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  *
-  * Unless required by applicable law or agreed to in writing, software 
-  * distributed under the License is distributed on an "AS IS" BASIS, 
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
+ **************************************************************************
+ * File Name    : at32f4xx_comp.h
+ * Description  : at32f4xx COMP header file
+ * Date         : 2018-10-08
+ * Version      : V1.0.5
+ **************************************************************************
 */

+
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __AT32F4XX_COMP_H
 #define __AT32F4XX_COMP_H
--- a/bsp/at32/Libraries/AT32_Std_Driver/AT32F4xx_StdPeriph_Driver/inc/misc.h
+++ b/bsp/at32/Libraries/AT32_Std_Driver/AT32F4xx_StdPeriph_Driver/inc/misc.h
@ -1,15 +1,4 @@
 /*
- **************************************************************************
- * Copyright (C) 2016 by ARTERY Technology Co., Ltd. All Rights Reserved.
- **************************************************************************
- * THIS SOURCE FILE IS DISTRIBUTED IN THE HOPE THAT CAN REDUCE EFFORTS AND
- * TIME, BUT WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
- * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
 **************************************************************************
 * File Name    : misc.h
 * Description  : at32f4xx MISC header file
--- a/bsp/at32/Libraries/AT32_Std_Driver/AT32F4xx_StdPeriph_Driver/src/at32f4xx_comp.c
+++ b/bsp/at32/Libraries/AT32_Std_Driver/AT32F4xx_StdPeriph_Driver/src/at32f4xx_comp.c
@ -1,94 +1,10 @@
 /**
-  ******************************************************************************
-  * @file    at32f4xx_comp.c
-  * @author  Artery
-  * @version V1.0.1
-  * @date    20-April-2012
-  * @brief   This file provides firmware functions to manage the following 
-  *          functionalities of the comparators (COMP1 and COMP2) peripheral: 
-  *           + Comparators configuration
-  *           + Window mode control
-  *
-  *  @verbatim
-  *
- ===============================================================================
-                     ##### How to use this driver #####
- ===============================================================================
-    [..]           
-   
-         The device integrates two analog comparators COMP1 and COMP2:
-         (+) The non inverting input is set to PA1 for COMP1 and to PA3
-             for COMP2.
-  
-         (+) The inverting input can be selected among: DAC_OUT1, 
-             1/4 VREFINT, 1/2 VERFINT, 3/4 VREFINT, VREFINT,
-             I/O (PA0 for COMP1 and PA2 for COMP2)
-  
-         (+) The COMP output is internally is available using COMP_GetOutputState()
-             and can be set on GPIO pins: PA0, PA6, PA11 for COMP1
-             and PA2, PA7, PA12 for COMP2
-  
-         (+) The COMP output can be redirected to embedded timers (TIM1, TIM2
-             and TIM3)
-  
-         (+) The two comparators COMP1 and COMP2 can be combined in window
-             mode and only COMP1 non inverting (PA1) can be used as non-
-             inverting input.
-  
-         (+) The two comparators COMP1 and COMP2 have interrupt capability 
-             with wake-up from Sleep and Stop modes (through the EXTI controller).
-             COMP1 and COMP2 outputs are internally connected to EXTI Line 21
-             and EXTI Line 22 respectively.
-                   
-
-                     ##### How to configure the comparator #####
- ===============================================================================
-    [..] 
-           This driver provides functions to configure and program the Comparators 
-           of all AT32F4xx devices.
-             
-    [..]   To use the comparator, perform the following steps:
-  
-         (#) Enable the SYSCFG APB clock to get write access to comparator
-             register using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
-  
-         (#) Configure the comparator input in analog mode using GPIO_Init()
-  
-         (#) Configure the comparator output in alternate function mode
-             using GPIO_Init() and use GPIO_PinAFConfig() function to map the
-             comparator output to the GPIO pin
-  
-         (#) Configure the comparator using COMP_Init() function:
-                 (++)  Select the inverting input
-                 (++)  Select the output polarity  
-                 (++)  Select the output redirection
-                 (++)  Select the hysteresis level
-                 (++)  Select the power mode
-    
-         (#) Enable the comparator using COMP_Cmd() function
-  
-         (#) If required enable the COMP interrupt by configuring and enabling
-             EXTI line in Interrupt mode and selecting the desired sensitivity
-             level using EXTI_Init() function. After that enable the comparator
-             interrupt vector using NVIC_Init() function.
-  
-     @endverbatim
-  *    
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2012 Artery</center></h2>
-  *
-  * Licensed under Artery Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  *
-  * Unless required by applicable law or agreed to in writing, software 
-  * distributed under the License is distributed on an "AS IS" BASIS, 
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
+ **************************************************************************
+ * File Name    : at32f4xx_comp.c
+ * Description  : at32f4xx COMP source file
+ * Date         : 2018-02-26
+ * Version      : V1.0.4
+ **************************************************************************
 */

 /* Includes ------------------------------------------------------------------*/
--- a/bsp/at32/Libraries/AT32_Std_Driver/CMSIS/AT32/AT32F4xx/src/system_at32f4xx.c
+++ b/bsp/at32/Libraries/AT32_Std_Driver/CMSIS/AT32/AT32F4xx/src/system_at32f4xx.c
@ -6,17 +6,6 @@
  * @date    2019-05-27
  * @brief   CMSIS Cortex-M4 system source file
  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
  */ 

 /** @addtogroup CMSIS
--- a/bsp/at32/at32f403a-start/board/msp/at32_msp.c
+++ b/bsp/at32/at32f403a-start/board/msp/at32_msp.c
@ -1,22 +1,11 @@
-/**
-  ******************************************************************************
-  * @file    at32_msp.c
-  * @author  Artery Technology
-  * @version V1.0.1
-  * @date    2021-02-09
-  * @brief   Msp source file
-  ******************************************************************************
-  * @attention
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
 *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ * SPDX-License-Identifier: Apache-2.0
 *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
 */

 #include <at32f4xx.h>
--- a/bsp/at32/at32f403a-start/board/msp/at32_msp.h
+++ b/bsp/at32/at32f403a-start/board/msp/at32_msp.h
@ -1,22 +1,11 @@
-/**
-  ******************************************************************************
-  * @file    at32_msp.h
-  * @author  Artery Technology
-  * @version V1.0.1
-  * @date    2021-02-09
-  * @brief   Msp header file
-  ******************************************************************************
-  * @attention
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
 *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ * SPDX-License-Identifier: Apache-2.0
 *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
 */
 
 #ifndef __AT32_MSP_H__
--- a/bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c
+++ b/bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c
@ -1,22 +1,11 @@
-/**
-  ******************************************************************************
-  * @file    system_at32f4xx.c
-  * @author  Artery Technology
-  * @version V1.0.0
-  * @date    2019-05-27
-  * @brief   CMSIS Cortex-M4 system source file
-  ******************************************************************************
-  * @attention
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
 *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ * SPDX-License-Identifier: Apache-2.0
 *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
 */

 /** @addtogroup CMSIS
--- a/bsp/at32/at32f407-start/board/msp/at32_msp.c
+++ b/bsp/at32/at32f407-start/board/msp/at32_msp.c
@ -1,22 +1,11 @@
-/**
-  ******************************************************************************
-  * @file    at32_msp.c
-  * @author  Artery Technology
-  * @version V1.0.1
-  * @date    2021-02-09
-  * @brief   Msp source file
-  ******************************************************************************
-  * @attention
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
 *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ * SPDX-License-Identifier: Apache-2.0
 *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
 */

 #include <at32f4xx.h>
--- a/bsp/at32/at32f407-start/board/msp/at32_msp.h
+++ b/bsp/at32/at32f407-start/board/msp/at32_msp.h
@ -1,22 +1,11 @@
-/**
-  ******************************************************************************
-  * @file    at32_msp.h
-  * @author  Artery Technology
-  * @version V1.0.1
-  * @date    2021-02-09
-  * @brief   Msp header file
-  ******************************************************************************
-  * @attention
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
 *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ * SPDX-License-Identifier: Apache-2.0
 *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
 */

 #ifndef __AT32_MSP_H__
--- a/bsp/at32/at32f407-start/board/msp/system_at32f4xx.c
+++ b/bsp/at32/at32f407-start/board/msp/system_at32f4xx.c
@ -1,22 +1,11 @@
-/**
-  ******************************************************************************
-  * @file    system_at32f4xx.c
-  * @author  Artery Technology
-  * @version V1.0.0
-  * @date    2019-05-27
-  * @brief   CMSIS Cortex-M4 system source file
-  ******************************************************************************
-  * @attention
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
 *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ * SPDX-License-Identifier: Apache-2.0
 *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
 */

 /** @addtogroup CMSIS
--- a/bsp/bluetrum/ab32vg1-ab-prougen/applications/main.c
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/applications/main.c
@ -19,7 +19,6 @@

 int main(void)
 {
-    uint32_t cnt = 0;
    uint8_t pin = rt_pin_get("PE.1");

    rt_pin_mode(pin, PIN_MODE_OUTPUT);
@ -27,14 +26,9 @@ int main(void)

    while (1)
    {
-        if (cnt % 2 == 0) {
        rt_pin_write(pin, PIN_LOW);
-        } else {
+        rt_thread_mdelay(500);
        rt_pin_write(pin, PIN_HIGH);
+        rt_thread_mdelay(500);
    }
-        cnt++;
-        rt_thread_mdelay(1000);
-    }
-
-    return 0;
 }
--- a/bsp/nrf5x/docs/images/image-20210403182031505.png
+++ b/bsp/nrf5x/docs/images/image-20210403182031505.png
--- a/bsp/nrf5x/docs/images/image-20210403182242202.png
+++ b/bsp/nrf5x/docs/images/image-20210403182242202.png
--- a/bsp/nrf5x/docs/images/microbit-overview-1-5.png
+++ b/bsp/nrf5x/docs/images/microbit-overview-1-5.png
--- a/bsp/nrf5x/docs/nRF5x系列BSP制作教程.md
+++ b/bsp/nrf5x/docs/nRF5x系列BSP制作教程.md
@ -0,0 +1,92 @@
+# Nordic 系列 BSP 制作教程
+
+为了让广大开发者更好、更方便地使用 BSP 进行开发，重新整理了现有的 Nordic 系列的 BSP，推出了新的 BSP 框架。新的 BSP 框架在易用性、移植便利性、驱动完整性、代码规范性等方面都有较大提升，在新的 BSP 框架下进行开发，可以大大提高应用的开发效率。
+
+这边参考了官方stm32的相关制作流程，熟悉STM32的可以参考[STM32](https://github.com/RT-Thread/rt-thread/blob/master/bsp/stm32/docs/STM32%E7%B3%BB%E5%88%97BSP%E5%88%B6%E4%BD%9C%E6%95%99%E7%A8%8B.md)
+
+## 1. 知识准备
+
+制作一个 BSP 的过程就是构建一个新系统的过程，因此想要制作出好用的 BSP，要对 RT-Thread 系统的构建过程有一定了解，需要的知识准备如下所示：
+
+- 掌握  Nordic系列 BSP 的使用方法
+
+  了解 BSP 的使用方法，可以阅读 [Nordic 说明文档](../README.md) 中使用教程表格内的文档。
+
+- 了解 scons 工程构建方法
+
+  RT-Thread 使用 scons 作为系统的构建工具，因此了解 scons 的常用命令对制作新 BSP 是基本要求。
+
+- 了解设备驱动框架
+
+  在 RT-Thread 系统中，应用程序通过设备驱动框架来操作硬件，因此了解设备驱动框架，对添加 BSP 驱动是很重要的。
+
+- 了解 kconfig 语法
+
+  RT-Thread 系统通过 menuconfig 的方式进行配置，而 menuconfig 中的选项是由 kconfig 文件决定的，因此想要对 RT-Thread 系统进行配置，需要对 kconfig 语法有一定了解。
+
+
+##  BSP 制作方法
+
+本节以制作microbit添加 BSP。在接下来的章节中将会详细介绍具体步骤，帮助开发者快速创建所需要的 BSP。
+
+### 复制通用模板
+制作新 BSP 的第一步是复制一份同系列的 BSP 模板作为基础，通过对 BSP 模板的修改来获得新 BSP。目前提供的 BSP 模板系列如下表所示：
+
+| 工程模板 | 说明 |
+| ------- | ---- |
+| libraries/templates/nrfx | nrfx系列 BSP 模板 |
+
+### 修改芯片类型
+
+打开board/Kconfig找到SOC_NRF52840 
+
+SOC_NRF52840 要改成你对应的芯片类型，例如SOC_NRF51822 这个时候要确认[nrfx](https://github.com/xckhmf/nrfx)软件包中的SConscript中有对应的配置选项，没用的话，可以pr到对应的软件包
+
+```
+elif GetDepend('SOC_NRF51822') == True:
+	define += ['NRF51822_XXAA']
+	src += ['./mdk/system_nrf51.c']
+	
+	if rtconfig.PLATFORM == 'armcc':
+		src += ['./mdk/arm_startup_nrf51.s']
+		
+	if rtconfig.PLATFORM == 'gcc':
+		src += ['./mdk/gcc_startup_nrf51.S']
+		
+	if rtconfig.PLATFORM == 'iar':
+		D_SRC += ['./mdk/iar_startup_nrf51.s']
+```
+
+### 修改templete.uvprojx模板
+
+修改template.uvprojx中的soc和jlink等配置选项，这个可以参考官方SDK sample的keil配置
+
+这边如果要配置jlink的话，要注意flash download算法是否需要修改。
+
+### 检查rtconfig.py
+
+检查rtconfig.py中的CPU类型，nrf52是`cortex-m4` 如果是nrf51需要改成`cortex-m0`
+
+### 修改menuconfig中的相关配置
+
+menuconfig中修改RAM size大小。并且修改link.sct文件，这个可以参考官方sample
+
+![image-20210403182242202](images/image-20210403182242202.png)
+
+配置UART0相关的的引脚配置， 选中对应的UART0 TX RX引脚
+
+![image-20210403182031505](images/image-20210403182031505.png)
+
+最后调试`scons --target=mdk5`
+
+### 修改整理readme.md
+
+修改readme.md, 将你的开发板常用的链接信息整理到readme.md中
+
+
+
+## FAQ:
+
+1. 编译keil遇到 `No section matches selector - no section to be FIRST`
+
+这个因为package里面的nrfx中的Sconscript未添加好对应的芯片，没有加载arm_startup_nrf51.s等文件导致
--- a/bsp/nrf5x/libraries/templates/nrf52x/applications/application.c
+++ b/bsp/nrf5x/libraries/templates/nrf52x/applications/application.c
@ -1,44 +0,0 @@
-/*
- * Copyright (c) 2006-2021, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2015-03-01     Yangfs       the first version
- * 2015-03-27     Bernard      code cleanup.
- */
-
-/**
- * @addtogroup NRF52832
- */
-/*@{*/
-
-#include <rtthread.h>
-
-#ifdef RT_USING_FINSH
-#include <finsh.h>
-#include <shell.h>
-#endif
-
-void rt_init_thread_entry(void* parameter)
-{
-    extern rt_err_t ble_init(void);
-
-    ble_init();
-}
-
-int rt_application_init(void)
-{
-    rt_thread_t tid;
-
-    tid = rt_thread_create("init", rt_init_thread_entry, RT_NULL, 1024,
-                            RT_THREAD_PRIORITY_MAX / 3, 20);
-    if (tid != RT_NULL)
-        rt_thread_startup(tid);
-
-    return 0;
-}
-
-
-/*@}*/
--- a/bsp/nrf5x/libraries/templates/nrf52x/applications/ble_nus_app.c
+++ b/bsp/nrf5x/libraries/templates/nrf52x/applications/ble_nus_app.c
@ -1,681 +0,0 @@
-#include "nordic_common.h"
-#include "nrf.h"
-#include "ble_hci.h"
-#include "ble_advdata.h"
-#include "ble_advertising.h"
-#include "ble_conn_params.h"
-#include "softdevice_handler.h"
-#include "nrf_ble_gatt.h"
-#include "app_timer.h"
-#include "ble_nus.h"
-#include "app_util_platform.h"
-
-#include <rtthread.h>
-
-typedef rt_size_t (*BLE_NOTIFY_T)(rt_uint8_t *buf, rt_uint16_t size);
-
-#define STACK_EVT_MQ_NUM        10
-
-#define FAST_ADV()          \
-    do {                    \
-        uint32_t err_code;  \
-        err_code = ble_advertising_start(BLE_ADV_MODE_FAST);    \
-        APP_ERROR_CHECK(err_code);  \
-    } while(0)
-
-typedef enum
-{
-    STACK_EV_DISCON = 1,
-    STACK_EV_DISPATCH = 2,
-    STACK_EV_KEY = 4,
-} STACK_EV_E;
-
-typedef struct
-{
-    rt_list_t node;
-    void* evt;
-} evt_list_t;
-
-typedef enum
-{
-    STACK_STATE_IDLE = 0,
-    STACK_STATE_ADV = 1,
-    STACK_STATE_CON = 2,
-    STACK_STATE_DISC = 3
-} STACK_STATE_E;
-
-STACK_STATE_E stack_state = STACK_STATE_IDLE;
-
-rt_event_t stack_event;
-rt_sem_t sd_evt_sem;
-rt_mq_t stack_evt_mq;
-rt_uint8_t *evt_sample;
-
-BLE_NOTIFY_T rx_notify = RT_NULL;
-
-// Low frequency clock source to be used by the SoftDevice
-#define NRF_CLOCK_LFCLKSRC      {.source        = NRF_CLOCK_LF_SRC_XTAL,            \
-                                 .rc_ctiv       = 0,                                \
-                                 .rc_temp_ctiv  = 0,                                \
-                                 .xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
-
-
-#define CONN_CFG_TAG                    1                                           /**< A tag that refers to the BLE stack configuration we set with @ref sd_ble_cfg_set. Default tag is @ref BLE_CONN_CFG_TAG_DEFAULT. */
-
-#define APP_FEATURE_NOT_SUPPORTED       BLE_GATT_STATUS_ATTERR_APP_BEGIN + 2        /**< Reply when unsupported features are requested. */
-
-#define DEVICE_NAME                     "Nordic_UART"                               /**< Name of device. Will be included in the advertising data. */
-#define NUS_SERVICE_UUID_TYPE           BLE_UUID_TYPE_VENDOR_BEGIN                  /**< UUID type for the Nordic UART Service (vendor specific). */
-
-#define APP_ADV_INTERVAL                64                                          /**< The advertising interval (in units of 0.625 ms. This value corresponds to 40 ms). */
-#define APP_ADV_TIMEOUT_IN_SECONDS      30                                         /**< The advertising timeout (in units of seconds). */
-
-#define MIN_CONN_INTERVAL               MSEC_TO_UNITS(20, UNIT_1_25_MS)             /**< Minimum acceptable connection interval (20 ms), Connection interval uses 1.25 ms units. */
-#define MAX_CONN_INTERVAL               MSEC_TO_UNITS(75, UNIT_1_25_MS)             /**< Maximum acceptable connection interval (75 ms), Connection interval uses 1.25 ms units. */
-#define SLAVE_LATENCY                   0                                           /**< Slave latency. */
-#define CONN_SUP_TIMEOUT                MSEC_TO_UNITS(4000, UNIT_10_MS)             /**< Connection supervisory timeout (4 seconds), Supervision Timeout uses 10 ms units. */
-#define FIRST_CONN_PARAMS_UPDATE_DELAY  APP_TIMER_TICKS(5000)                       /**< Time from initiating event (connect or start of notification) to first time sd_ble_gap_conn_param_update is called (5 seconds). */
-#define NEXT_CONN_PARAMS_UPDATE_DELAY   APP_TIMER_TICKS(30000)                      /**< Time between each call to sd_ble_gap_conn_param_update after the first call (30 seconds). */
-#define MAX_CONN_PARAMS_UPDATE_COUNT    3                                           /**< Number of attempts before giving up the connection parameter negotiation. */
-
-#define DEAD_BEEF                       0xDEADBEEF                                  /**< Value used as error code on stack dump, can be used to identify stack location on stack unwind. */
-
-#define UART_TX_BUF_SIZE                256                                         /**< UART TX buffer size. */
-#define UART_RX_BUF_SIZE                256                                         /**< UART RX buffer size. */
-
-static ble_nus_t                        m_nus;                                      /**< Structure to identify the Nordic UART Service. */
-static uint16_t                         m_conn_handle = BLE_CONN_HANDLE_INVALID;    /**< Handle of the current connection. */
-
-static nrf_ble_gatt_t                   m_gatt;                                     /**< GATT module instance. */
-static ble_uuid_t                       m_adv_uuids[] = {{BLE_UUID_NUS_SERVICE, NUS_SERVICE_UUID_TYPE}};  /**< Universally unique service identifier. */
-static uint16_t                         m_ble_nus_max_data_len = BLE_GATT_ATT_MTU_DEFAULT - 3;  /**< Maximum length of data (in bytes) that can be transmitted to the peer by the Nordic UART service module. */
-
-/**@brief Function for assert macro callback.
- *
- * @details This function will be called in case of an assert in the SoftDevice.
- *
- * @warning This handler is an example only and does not fit a final product. You need to analyse
- *          how your product is supposed to react in case of Assert.
- * @warning On assert from the SoftDevice, the system can only recover on reset.
- *
- * @param[in] line_num    Line number of the failing ASSERT call.
- * @param[in] p_file_name File name of the failing ASSERT call.
- */
-void assert_nrf_callback(uint16_t line_num, const uint8_t * p_file_name)
-{
-    app_error_handler(DEAD_BEEF, line_num, p_file_name);
-}
-
-
-/**@brief Function for the GAP initialization.
- *
- * @details This function will set up all the necessary GAP (Generic Access Profile) parameters of
- *          the device. It also sets the permissions and appearance.
- */
-static void gap_params_init(void)
-{
-    uint32_t                err_code;
-    ble_gap_conn_params_t   gap_conn_params;
-    ble_gap_conn_sec_mode_t sec_mode;
-
-    BLE_GAP_CONN_SEC_MODE_SET_OPEN(&sec_mode);
-
-    err_code = sd_ble_gap_device_name_set(&sec_mode,
-                                          (const uint8_t *) DEVICE_NAME,
-                                          strlen(DEVICE_NAME));
-    APP_ERROR_CHECK(err_code);
-
-    memset(&gap_conn_params, 0, sizeof(gap_conn_params));
-
-    gap_conn_params.min_conn_interval = MIN_CONN_INTERVAL;
-    gap_conn_params.max_conn_interval = MAX_CONN_INTERVAL;
-    gap_conn_params.slave_latency     = SLAVE_LATENCY;
-    gap_conn_params.conn_sup_timeout  = CONN_SUP_TIMEOUT;
-
-    err_code = sd_ble_gap_ppcp_set(&gap_conn_params);
-    APP_ERROR_CHECK(err_code);
-}
-
-
-/**@brief Function for handling the data from the Nordic UART Service.
- *
- * @details This function will process the data received from the Nordic UART BLE Service and send
- *          it to the UART module.
- *
- * @param[in] p_nus    Nordic UART Service structure.
- * @param[in] p_data   Data to be send to UART module.
- * @param[in] length   Length of the data.
- */
-/**@snippet [Handling the data received over BLE] */
-static void nus_data_handler(ble_nus_t * p_nus, uint8_t * p_data, uint16_t length)
-{
-    rt_kprintf("Received data from BLE NUS. Writing data on UART.\r\n");
-
-    for (uint32_t i = 0; i < length; i++)
-    {
-        rt_kprintf("%02x ", p_data[i]);
-    }
-
-    // ble_send(p_data, length);
-
-    if (rx_notify != RT_NULL)
-    {
-        rx_notify(p_data, length);
-    }
-}
-/**@snippet [Handling the data received over BLE] */
-
-
-/**@brief Function for initializing services that will be used by the application.
- */
-static void services_init(void)
-{
-    uint32_t       err_code;
-    ble_nus_init_t nus_init;
-
-    memset(&nus_init, 0, sizeof(nus_init));
-
-    nus_init.data_handler = nus_data_handler;
-
-    err_code = ble_nus_init(&m_nus, &nus_init);
-    APP_ERROR_CHECK(err_code);
-}
-
-
-/**@brief Function for handling an event from the Connection Parameters Module.
- *
- * @details This function will be called for all events in the Connection Parameters Module
- *          which are passed to the application.
- *
- * @note All this function does is to disconnect. This could have been done by simply setting
- *       the disconnect_on_fail config parameter, but instead we use the event handler
- *       mechanism to demonstrate its use.
- *
- * @param[in] p_evt  Event received from the Connection Parameters Module.
- */
-static void on_conn_params_evt(ble_conn_params_evt_t * p_evt)
-{
-    uint32_t err_code;
-
-    if (p_evt->evt_type == BLE_CONN_PARAMS_EVT_FAILED)
-    {
-        err_code = sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_CONN_INTERVAL_UNACCEPTABLE);
-        APP_ERROR_CHECK(err_code);
-    }
-}
-
-
-/**@brief Function for handling errors from the Connection Parameters module.
- *
- * @param[in] nrf_error  Error code containing information about what went wrong.
- */
-static void conn_params_error_handler(uint32_t nrf_error)
-{
-    APP_ERROR_HANDLER(nrf_error);
-}
-
-
-/**@brief Function for initializing the Connection Parameters module.
- */
-static void conn_params_init(void)
-{
-    uint32_t               err_code;
-    ble_conn_params_init_t cp_init;
-
-    memset(&cp_init, 0, sizeof(cp_init));
-
-    cp_init.p_conn_params                  = NULL;
-    cp_init.first_conn_params_update_delay = FIRST_CONN_PARAMS_UPDATE_DELAY;
-    cp_init.next_conn_params_update_delay  = NEXT_CONN_PARAMS_UPDATE_DELAY;
-    cp_init.max_conn_params_update_count   = MAX_CONN_PARAMS_UPDATE_COUNT;
-    cp_init.start_on_notify_cccd_handle    = BLE_GATT_HANDLE_INVALID;
-    cp_init.disconnect_on_fail             = false;
-    cp_init.evt_handler                    = on_conn_params_evt;
-    cp_init.error_handler                  = conn_params_error_handler;
-
-    err_code = ble_conn_params_init(&cp_init);
-    APP_ERROR_CHECK(err_code);
-}
-
-/**@brief Function for handling advertising events.
- *
- * @details This function will be called for advertising events which are passed to the application.
- *
- * @param[in] ble_adv_evt  Advertising event.
- */
-static void on_adv_evt(ble_adv_evt_t ble_adv_evt)
-{
-    // uint32_t err_code;
-
-    switch (ble_adv_evt)
-    {
-        case BLE_ADV_EVT_FAST:
-            // err_code = bsp_indication_set(BSP_INDICATE_ADVERTISING);
-            // APP_ERROR_CHECK(err_code);
-            stack_state = STACK_STATE_ADV;
-            rt_kprintf("ble fast advert\n");
-            break;
-        case BLE_ADV_EVT_IDLE:
-            // sleep_mode_enter();
-            stack_state = STACK_STATE_IDLE;
-            rt_kprintf("advert idle\n");
-            break;
-        default:
-            break;
-    }
-}
-
-
-/**@brief Function for the application's SoftDevice event handler.
- *
- * @param[in] p_ble_evt SoftDevice event.
- */
-static void on_ble_evt(ble_evt_t * p_ble_evt)
-{
-    uint32_t err_code;
-
-    switch (p_ble_evt->header.evt_id)
-    {
-        case BLE_GAP_EVT_CONNECTED:
-            // err_code = bsp_indication_set(BSP_INDICATE_CONNECTED);
-            // APP_ERROR_CHECK(err_code);
-            m_conn_handle = p_ble_evt->evt.gap_evt.conn_handle;
-            stack_state = STACK_STATE_CON;
-            rt_kprintf("Connected\r\n");
-            break; // BLE_GAP_EVT_CONNECTED
-
-        case BLE_GAP_EVT_DISCONNECTED:
-            // err_code = bsp_indication_set(BSP_INDICATE_IDLE);
-            // APP_ERROR_CHECK(err_code);
-            m_conn_handle = BLE_CONN_HANDLE_INVALID;
-            stack_state = STACK_STATE_DISC;
-            rt_kprintf("Disconnected\r\n");
-            break; // BLE_GAP_EVT_DISCONNECTED
-
-        case BLE_GAP_EVT_SEC_PARAMS_REQUEST:
-            // Pairing not supported
-            err_code = sd_ble_gap_sec_params_reply(m_conn_handle, BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP, NULL, NULL);
-            APP_ERROR_CHECK(err_code);
-            break; // BLE_GAP_EVT_SEC_PARAMS_REQUEST
-
-        case BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST:
-        {
-            ble_gap_data_length_params_t dl_params;
-
-            // Clearing the struct will effectivly set members to @ref BLE_GAP_DATA_LENGTH_AUTO
-            memset(&dl_params, 0, sizeof(ble_gap_data_length_params_t));
-            err_code = sd_ble_gap_data_length_update(p_ble_evt->evt.gap_evt.conn_handle, &dl_params, NULL);
-            APP_ERROR_CHECK(err_code);
-        } break;
-
-        case BLE_GATTS_EVT_SYS_ATTR_MISSING:
-            // No system attributes have been stored.
-            err_code = sd_ble_gatts_sys_attr_set(m_conn_handle, NULL, 0, 0);
-            APP_ERROR_CHECK(err_code);
-            break; // BLE_GATTS_EVT_SYS_ATTR_MISSING
-
-        case BLE_GATTC_EVT_TIMEOUT:
-            // Disconnect on GATT Client timeout event.
-            err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gattc_evt.conn_handle,
-                                             BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
-            APP_ERROR_CHECK(err_code);
-            break; // BLE_GATTC_EVT_TIMEOUT
-
-        case BLE_GATTS_EVT_TIMEOUT:
-            // Disconnect on GATT Server timeout event.
-            err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gatts_evt.conn_handle,
-                                             BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
-            APP_ERROR_CHECK(err_code);
-            break; // BLE_GATTS_EVT_TIMEOUT
-
-        case BLE_EVT_USER_MEM_REQUEST:
-            err_code = sd_ble_user_mem_reply(p_ble_evt->evt.gattc_evt.conn_handle, NULL);
-            APP_ERROR_CHECK(err_code);
-            break; // BLE_EVT_USER_MEM_REQUEST
-
-        case BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST:
-        {
-            ble_gatts_evt_rw_authorize_request_t  req;
-            ble_gatts_rw_authorize_reply_params_t auth_reply;
-
-            req = p_ble_evt->evt.gatts_evt.params.authorize_request;
-
-            if (req.type != BLE_GATTS_AUTHORIZE_TYPE_INVALID)
-            {
-                if ((req.request.write.op == BLE_GATTS_OP_PREP_WRITE_REQ)     ||
-                    (req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_NOW) ||
-                    (req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL))
-                {
-                    if (req.type == BLE_GATTS_AUTHORIZE_TYPE_WRITE)
-                    {
-                        auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_WRITE;
-                    }
-                    else
-                    {
-                        auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_READ;
-                    }
-                    auth_reply.params.write.gatt_status = APP_FEATURE_NOT_SUPPORTED;
-                    err_code = sd_ble_gatts_rw_authorize_reply(p_ble_evt->evt.gatts_evt.conn_handle,
-                                                               &auth_reply);
-                    APP_ERROR_CHECK(err_code);
-                }
-            }
-        } break; // BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST
-
-        default:
-            // No implementation needed.
-            break;
-    }
-}
-
-
-/**@brief Function for dispatching a SoftDevice event to all modules with a SoftDevice
- *        event handler.
- *
- * @details This function is called from the SoftDevice event interrupt handler after a
- *          SoftDevice event has been received.
- *
- * @param[in] p_ble_evt  SoftDevice event.
- */
-static void ble_evt_dispatch(ble_evt_t * p_ble_evt)
-{
-    if (rt_mq_send(stack_evt_mq, p_ble_evt, p_ble_evt->header.evt_len) != RT_EOK)
-    {
-        rt_kprintf("dispatch malloc failure\n");
-    }
-    else
-    {
-        rt_event_send(stack_event, STACK_EV_DISPATCH);
-    }
-}
-
-static rt_err_t evt_dispatch_worker(void)
-{
-    ble_evt_t * p_ble_evt = (ble_evt_t *)evt_sample;
-    rt_err_t err;
-
-    err = rt_mq_recv(stack_evt_mq, (void*)evt_sample, BLE_STACK_EVT_MSG_BUF_SIZE, RT_WAITING_NO);
-
-    if (RT_EOK == err)
-    {
-        ble_conn_params_on_ble_evt(p_ble_evt);
-        nrf_ble_gatt_on_ble_evt(&m_gatt, p_ble_evt);
-        ble_nus_on_ble_evt(&m_nus, p_ble_evt);
-        on_ble_evt(p_ble_evt);
-        ble_advertising_on_ble_evt(p_ble_evt);
-        // bsp_btn_ble_on_ble_evt(p_ble_evt);
-
-        rt_kprintf("ble evt dispatch\n");
-    }
-
-    return err;
-}
-
-static uint32_t _softdevice_evt_schedule(void)
-{
-    rt_sem_release(sd_evt_sem);
-
-    return NRF_SUCCESS;
-}
-
-/**@brief Function for the SoftDevice initialization.
- *
- * @details This function initializes the SoftDevice and the BLE event interrupt.
- */
-static void ble_stack_init(void)
-{
-    uint32_t err_code;
-
-    nrf_clock_lf_cfg_t clock_lf_cfg = NRF_CLOCK_LFCLKSRC;
-
-    // Initialize SoftDevice.
-    SOFTDEVICE_HANDLER_INIT(&clock_lf_cfg, _softdevice_evt_schedule);
-
-    // Fetch the start address of the application RAM.
-    uint32_t ram_start = 0;
-    err_code = softdevice_app_ram_start_get(&ram_start);
-    APP_ERROR_CHECK(err_code);
-
-    // Overwrite some of the default configurations for the BLE stack.
-    ble_cfg_t ble_cfg;
-
-    // Configure the maximum number of connections.
-    memset(&ble_cfg, 0, sizeof(ble_cfg));
-    ble_cfg.gap_cfg.role_count_cfg.periph_role_count  = BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT;
-    ble_cfg.gap_cfg.role_count_cfg.central_role_count = 0;
-    ble_cfg.gap_cfg.role_count_cfg.central_sec_count  = 0;
-    err_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &ble_cfg, ram_start);
-    APP_ERROR_CHECK(err_code);
-
-    // Configure the maximum ATT MTU.
-    memset(&ble_cfg, 0x00, sizeof(ble_cfg));
-    ble_cfg.conn_cfg.conn_cfg_tag                 = CONN_CFG_TAG;
-    ble_cfg.conn_cfg.params.gatt_conn_cfg.att_mtu = NRF_BLE_GATT_MAX_MTU_SIZE;
-    err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATT, &ble_cfg, ram_start);
-    APP_ERROR_CHECK(err_code);
-
-    // Configure the maximum event length.
-    memset(&ble_cfg, 0x00, sizeof(ble_cfg));
-    ble_cfg.conn_cfg.conn_cfg_tag                     = CONN_CFG_TAG;
-    ble_cfg.conn_cfg.params.gap_conn_cfg.event_length = 320;
-    ble_cfg.conn_cfg.params.gap_conn_cfg.conn_count   = BLE_GAP_CONN_COUNT_DEFAULT;
-    err_code = sd_ble_cfg_set(BLE_CONN_CFG_GAP, &ble_cfg, ram_start);
-    APP_ERROR_CHECK(err_code);
-
-    // Enable BLE stack.
-    err_code = softdevice_enable(&ram_start);
-    APP_ERROR_CHECK(err_code);
-
-    // Subscribe for BLE events.
-    err_code = softdevice_ble_evt_handler_set(ble_evt_dispatch);
-    APP_ERROR_CHECK(err_code);
-}
-
-/**@brief Function for handling events from the GATT library. */
-static void gatt_evt_handler(nrf_ble_gatt_t * p_gatt, const nrf_ble_gatt_evt_t * p_evt)
-{
-    if ((m_conn_handle == p_evt->conn_handle) && (p_evt->evt_id == NRF_BLE_GATT_EVT_ATT_MTU_UPDATED))
-    {
-        m_ble_nus_max_data_len = p_evt->params.att_mtu_effective - OPCODE_LENGTH - HANDLE_LENGTH;
-        rt_kprintf("Data len is set to 0x%X(%d)\r\n", m_ble_nus_max_data_len, m_ble_nus_max_data_len);
-    }
-    rt_kprintf("ATT MTU exchange completed. central 0x%x peripheral 0x%x\r\n", p_gatt->att_mtu_desired_central, p_gatt->att_mtu_desired_periph);
-}
-
-/**@brief Function for initializing the GATT library. */
-static void gatt_init(void)
-{
-    ret_code_t err_code;
-
-    err_code = nrf_ble_gatt_init(&m_gatt, gatt_evt_handler);
-    APP_ERROR_CHECK(err_code);
-
-    err_code = nrf_ble_gatt_att_mtu_periph_set(&m_gatt, 64);
-    APP_ERROR_CHECK(err_code);
-}
-
-/**@brief Function for initializing the Advertising functionality.
- */
-static void advertising_init(void)
-{
-    uint32_t               err_code;
-    ble_advdata_t          advdata;
-    ble_advdata_t          scanrsp;
-    ble_adv_modes_config_t options;
-
-    // Build advertising data struct to pass into @ref ble_advertising_init.
-    memset(&advdata, 0, sizeof(advdata));
-    advdata.name_type          = BLE_ADVDATA_FULL_NAME;
-    advdata.include_appearance = false;
-    advdata.flags              = BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE;
-
-    memset(&scanrsp, 0, sizeof(scanrsp));
-    scanrsp.uuids_complete.uuid_cnt = sizeof(m_adv_uuids) / sizeof(m_adv_uuids[0]);
-    scanrsp.uuids_complete.p_uuids  = m_adv_uuids;
-
-    memset(&options, 0, sizeof(options));
-    options.ble_adv_fast_enabled  = true;
-    options.ble_adv_fast_interval = APP_ADV_INTERVAL;
-    options.ble_adv_fast_timeout  = APP_ADV_TIMEOUT_IN_SECONDS;
-
-    err_code = ble_advertising_init(&advdata, &scanrsp, &options, on_adv_evt, NULL);
-    APP_ERROR_CHECK(err_code);
-
-    ble_advertising_conn_cfg_tag_set(CONN_CFG_TAG);
-}
-
-/**@brief   Function for handling app_uart events.
- *
- * @details This function will receive a single character from the app_uart module and append it to
- *          a string. The string will be be sent over BLE when the last character received was a
- *          'new line' '\n' (hex 0x0A) or if the string has reached the maximum data length.
- */
-/**@snippet [Handling the data received over UART] */
-void uart_event_handle(rt_device_t uart)
-{
-    uint8_t data_array[BLE_NUS_MAX_DATA_LEN];
-    rt_size_t size = 0;
-    uint32_t       err_code;
-
-    size = rt_device_read(uart, 0, data_array, BLE_NUS_MAX_DATA_LEN);
-
-    if (size <= 0)
-    {
-        return;
-    }
-
-    do
-    {
-        err_code = ble_nus_string_send(&m_nus, data_array, size);
-        if ( (err_code != NRF_ERROR_INVALID_STATE) && (err_code != NRF_ERROR_BUSY) )
-        {
-            APP_ERROR_CHECK(err_code);
-        }
-    } while (err_code == NRF_ERROR_BUSY);
-}
-/**@snippet [Handling the data received over UART] */
-
-/**@brief  Function for initializing the UART module.
- */
-/**@snippet [UART Initialization] */
-static rt_bool_t _stack_init(void)
-{
-    uint32_t err_code;
-
-    stack_event = rt_event_create("stackev", RT_IPC_FLAG_FIFO);
-    sd_evt_sem = rt_sem_create("sdsem", 0, RT_IPC_FLAG_FIFO);
-    stack_evt_mq = rt_mq_create("stackmq", BLE_STACK_EVT_MSG_BUF_SIZE, STACK_EVT_MQ_NUM, RT_IPC_FLAG_FIFO);
-    evt_sample = rt_malloc(BLE_STACK_EVT_MSG_BUF_SIZE);
-
-    if (!stack_event || !sd_evt_sem || !stack_evt_mq || !evt_sample)
-    {
-        rt_kprintf("uart rx sem create failure\n");
-        return RT_FALSE;
-    }
-
-    // Initialize.
-    err_code = app_timer_init();
-    APP_ERROR_CHECK(err_code);
-
-    ble_stack_init();
-    gap_params_init();
-    gatt_init();
-    services_init();
-    advertising_init();
-    conn_params_init();
-
-    return RT_TRUE;
-}
-
-/**@brief Application main function.
- */
-static void _stack_thread(void *parameter)
-{
-    rt_tick_t next_timeout = (rt_tick_t)RT_WAITING_FOREVER;
-
-    FAST_ADV();
-    // Enter main loop.
-    for (;;)
-    {
-        rt_uint32_t event = 0;
-        rt_tick_t dispatch_timeout = RT_WAITING_NO;
-        rt_err_t result;
-
-        result = rt_event_recv(stack_event, STACK_EV_DISCON | STACK_EV_DISPATCH | STACK_EV_KEY,
-                    RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, next_timeout, &event);
-        if (result == -RT_ETIMEOUT)
-        {
-            LOG_E("wait completed timeout");
-            continue;
-        }
-        else if (result == -RT_ERROR)
-        {
-            LOG_E("event received error");
-            continue;
-        }
-
-        if (evt_dispatch_worker() != RT_EOK)
-        {
-            dispatch_timeout = (rt_tick_t)RT_WAITING_FOREVER;
-        }
-
-        if (event & STACK_EV_DISCON)
-        {
-            if (BLE_CONN_HANDLE_INVALID != m_conn_handle)
-            {
-                sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
-            }
-        }
-
-        if (event & STACK_EV_KEY)
-        {
-            if (stack_state != STACK_STATE_CON && stack_state != STACK_STATE_ADV)
-            {
-                FAST_ADV();
-            }
-        }
-
-        next_timeout = (rt_tick_t)RT_WAITING_FOREVER;
-
-        if (dispatch_timeout < next_timeout)
-        {
-            next_timeout = dispatch_timeout;
-        }
-    }
-}
-
-static void _softdevice_thread(void* parameter)
-{
-    for (;;)
-    {
-        rt_sem_take(sd_evt_sem, RT_WAITING_FOREVER);
-        intern_softdevice_events_execute();
-    }
-}
-
-rt_err_t ble_init(void)
-{
-    rt_thread_t thread;
-
-    _stack_init();
-
-    thread = rt_thread_create("sdth", _softdevice_thread, RT_NULL, 512, 0, 10);
-
-    if (thread != RT_NULL)
-    {
-        rt_thread_startup(thread);
-    }
-    else
-    {
-        return RT_ERROR;
-    }
-
-    thread = rt_thread_create("bleth", _stack_thread, RT_NULL, 2048, 1, 10);
-
-    if (thread != RT_NULL)
-    {
-        return rt_thread_startup(thread);
-    }
-
-    return RT_ERROR;
-}
--- a/bsp/nrf5x/libraries/templates/nrf52x/applications/sdk_config.h
+++ b/bsp/nrf5x/libraries/templates/nrf52x/applications/sdk_config.h
--- a/bsp/nrf5x/libraries/templates/nrf52x/applications/startup.c
+++ b/bsp/nrf5x/libraries/templates/nrf52x/applications/startup.c
@ -1,92 +0,0 @@
-/*
- * File      : startup.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2015, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2015-03-01     Yangfs       the first version
- * 2015-03-27     Bernard      code cleanup.
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-
-#include "board.h"
-
-/**
- * @addtogroup NRF52832
- */
-
-/*@{*/
-
-extern int  rt_application_init(void);
-
-#ifdef __CC_ARM
-extern int Image$$RW_IRAM1$$ZI$$Limit;
-#define NRF_SRAM_BEGIN    (&Image$$RW_IRAM1$$ZI$$Limit)
-#elif __ICCARM__
-#pragma section="HEAP"
-#define NRF_SRAM_BEGIN    (__segment_end("HEAP"))
-#else
-extern int __bss_end;
-#define NRF_SRAM_BEGIN    (&__bss_end)
-#endif
-
-/**
- * This function will startup RT-Thread RTOS.
- */
-void rtthread_startup(void)
-{
-    /* init board */
-    rt_hw_board_init();
-
-    /* show version */
-    rt_show_version();
-
-    /* init timer system */
-    rt_system_timer_init();
-
-#ifdef RT_USING_HEAP
-    rt_system_heap_init((void*)NRF_SRAM_BEGIN, (void*)CHIP_SRAM_END);
-#endif
-
-    /* init scheduler system */
-    rt_system_scheduler_init();
-
-#ifdef RT_USING_COMPONENTS_INIT
-    rt_components_init();
-#endif
-
-    /* init application */
-    rt_application_init();
-
-    /* init timer thread */
-    rt_system_timer_thread_init();
-
-    /* init idle thread */
-    rt_thread_idle_init();
-
-    /* start scheduler */
-    rt_system_scheduler_start();
-
-    /* never reach here */
-    return ;
-}
-
-int main(void)
-{
-    /* disable interrupt first */
-    // rt_hw_interrupt_disable();
-
-    /* startup RT-Thread RTOS */
-    rtthread_startup();
-
-    return 0;
-}
-
-/*@}*/
--- a/bsp/nrf5x/libraries/templates/nrf52x/board/Kconfig
+++ b/bsp/nrf5x/libraries/templates/nrf52x/board/Kconfig
@ -1,22 +0,0 @@
-menu "Hardware Drivers Config"
-
-config SOC_NRF52832
-    bool
-    select RT_USING_COMPONENTS_INIT
-    # select RT_USING_USER_MAIN
-    default y
-
-menu "Onboard Peripheral Drivers"
-
-endmenu
-
-menu "On-chip Peripheral Drivers"
-
-    menuconfig BSP_USING_UART
-        bool "Enable UART"
-        default y
-        select RT_USING_SERIAL
-
-endmenu
-
-endmenu
--- a/bsp/nrf5x/libraries/templates/nrf52x/board/board.c
+++ b/bsp/nrf5x/libraries/templates/nrf52x/board/board.c
@ -1,227 +0,0 @@
-#include "board.h"
-#include "drv_uart.h"
-#include "app_util_platform.h"
-#include "nrf_drv_common.h"
-#include "nrf_systick.h"
-#include "nrf_rtc.h"
-#include "nrf_drv_clock.h"
-#include "softdevice_handler.h"
-#include "nrf_drv_uart.h"
-#include "nrf_gpio.h"
-
-#include <rtthread.h>
-#include <rthw.h>
-
-#define TICK_RATE_HZ  RT_TICK_PER_SECOND
-#define SYSTICK_CLOCK_HZ  ( 32768UL )
-
-#define NRF_RTC_REG        NRF_RTC1
-    /* IRQn used by the selected RTC */
-#define NRF_RTC_IRQn       RTC1_IRQn
-    /* Constants required to manipulate the NVIC. */
-#define NRF_RTC_PRESCALER  ( (uint32_t) (ROUNDED_DIV(SYSTICK_CLOCK_HZ, TICK_RATE_HZ) - 1) )
-    /* Maximum RTC ticks */
-#define NRF_RTC_MAXTICKS   ((1U<<24)-1U)
-
-static volatile uint32_t m_tick_overflow_count = 0;
-#define NRF_RTC_BITWIDTH 24
-#define OSTick_Handler     RTC1_IRQHandler
-#define EXPECTED_IDLE_TIME_BEFORE_SLEEP   2
-
-void SysTick_Configuration(void)
-{
-    nrf_drv_clock_lfclk_request(NULL);
-
-    /* Configure SysTick to interrupt at the requested rate. */
-    nrf_rtc_prescaler_set(NRF_RTC_REG, NRF_RTC_PRESCALER);
-    nrf_rtc_int_enable   (NRF_RTC_REG, RTC_INTENSET_TICK_Msk);
-    nrf_rtc_task_trigger (NRF_RTC_REG, NRF_RTC_TASK_CLEAR);
-    nrf_rtc_task_trigger (NRF_RTC_REG, NRF_RTC_TASK_START);
-    nrf_rtc_event_enable(NRF_RTC_REG, RTC_EVTEN_OVRFLW_Msk);
-
-    NVIC_SetPriority(NRF_RTC_IRQn, 0xF);
-    NVIC_EnableIRQ(NRF_RTC_IRQn);
-}
-
-static rt_tick_t _tick_distance(void)
-{
-    nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
-
-    uint32_t systick_counter = nrf_rtc_counter_get(NRF_RTC_REG);
-    nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_TICK);
-
-    /* check for overflow in TICK counter */
-    if(nrf_rtc_event_pending(NRF_RTC_REG, NRF_RTC_EVENT_OVERFLOW))
-    {
-        nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_OVERFLOW);
-        m_tick_overflow_count++;
-    }
-
-    return ((m_tick_overflow_count << NRF_RTC_BITWIDTH) + systick_counter) - rt_tick_get();
-}
-
-void OSTick_Handler( void )
-{
-    uint32_t diff;
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-    diff = _tick_distance();
-
-    while((diff--) > 0)
-    {
-        if (rt_thread_self() != RT_NULL)
-        {
-          rt_tick_increase();
-        }
-    }
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-
-static void _wakeup_tick_adjust(void)
-{
-    uint32_t diff;
-    uint32_t level;
-
-    level = rt_hw_interrupt_disable();
-
-    diff = _tick_distance();
-
-    rt_tick_set(rt_tick_get() + diff);
-
-    if (rt_thread_self() != RT_NULL)
-    {
-        struct rt_thread *thread;
-
-        /* check time slice */
-        thread = rt_thread_self();
-
-        if (thread->remaining_tick <= diff)
-        {
-            /* change to initialized tick */
-            thread->remaining_tick = thread->init_tick;
-
-            /* yield */
-            rt_thread_yield();
-        }
-        else
-        {
-            thread->remaining_tick -= diff;
-        }
-
-        /* check timer */
-        rt_timer_check();
-    }
-
-    rt_hw_interrupt_enable(level);
-}
-
-static void _sleep_ongo( uint32_t sleep_tick )
-{
-    uint32_t enterTime;
-    uint32_t entry_tick;
-
-    /* Make sure the SysTick reload value does not overflow the counter. */
-    if ( sleep_tick > NRF_RTC_MAXTICKS - EXPECTED_IDLE_TIME_BEFORE_SLEEP )
-    {
-        sleep_tick = NRF_RTC_MAXTICKS - EXPECTED_IDLE_TIME_BEFORE_SLEEP;
-    }
-
-    rt_enter_critical();
-
-    enterTime = nrf_rtc_counter_get(NRF_RTC_REG);
-
-    {
-        uint32_t wakeupTime = (enterTime + sleep_tick) & NRF_RTC_MAXTICKS;
-
-        /* Stop tick events */
-        nrf_rtc_int_disable(NRF_RTC_REG, NRF_RTC_INT_TICK_MASK);
-
-        /* Configure CTC interrupt */
-        nrf_rtc_cc_set(NRF_RTC_REG, 0, wakeupTime);
-        nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
-        nrf_rtc_int_enable(NRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK);
-
-        entry_tick = rt_tick_get();
-
-        __DSB();
-
-        if ( sleep_tick > 0 )
-        {
-#ifdef SOFTDEVICE_PRESENT
-            if (softdevice_handler_is_enabled())
-            {
-                uint32_t err_code = sd_app_evt_wait();
-                APP_ERROR_CHECK(err_code);
-            }
-            else
-#endif
-            {
-                /* No SD -  we would just block interrupts globally.
-                * BASEPRI cannot be used for that because it would prevent WFE from wake up.
-                */
-                do{
-                    __WFE();
-                } while (0 == (NVIC->ISPR[0] | NVIC->ISPR[1]));
-            }
-        }
-
-        nrf_rtc_int_disable(NRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK);
-        nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
-
-        _wakeup_tick_adjust();
-
-        /* Correct the system ticks */
-        {
-
-            nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_TICK);
-            nrf_rtc_int_enable (NRF_RTC_REG, NRF_RTC_INT_TICK_MASK);
-            /* It is important that we clear pending here so that our corrections are latest and in sync with tick_interrupt handler */
-            NVIC_ClearPendingIRQ(NRF_RTC_IRQn);
-        }
-
-        // rt_kprintf("entry tick:%u, expected:%u, current tick:%u\n", entry_tick, sleep_tick, rt_tick_get());
-    }
-
-    rt_exit_critical();
-}
-
-
-void rt_hw_system_powersave(void)
-{
-    uint32_t sleep_tick;
-
-    sleep_tick = rt_timer_next_timeout_tick() - rt_tick_get();
-
-    if ( sleep_tick >= EXPECTED_IDLE_TIME_BEFORE_SLEEP)
-    {
-        // rt_kprintf("sleep entry:%u\n", rt_tick_get());
-        _sleep_ongo( sleep_tick );
-    }
-}
-
-void rt_hw_board_init(void)
-{
-    // sd_power_dcdc_mode_set(NRF_POWER_DCDC_ENABLE);
-    /* Activate deep sleep mode */
-    SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
-
-    nrf_drv_clock_init();
-    // nrf_drv_clock_hfclk_request(0);
-
-    SysTick_Configuration();
-
-    rt_thread_idle_sethook(rt_hw_system_powersave);
-
-    rt_hw_uart_init();
-
-#ifdef RT_USING_CONSOLE
-    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
-#endif
-
-#ifdef RT_USING_COMPONENTS_INIT
-    rt_components_board_init();
-#endif
-}
-
--- a/bsp/nrf5x/libraries/templates/nrf52x/board/board.h
+++ b/bsp/nrf5x/libraries/templates/nrf52x/board/board.h
@ -1,13 +0,0 @@
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-#include <rtthread.h>
-
-#include "nrf.h"
-
-#define CHIP_SRAM_END       (0x20000000 + 64*1024)
-
-void rt_hw_board_init(void);
-
-#endif
-
--- a/bsp/nrf5x/libraries/templates/nrf5x_board_kconfig
+++ b/bsp/nrf5x/libraries/templates/nrf5x_board_kconfig
--- a/bsp/nrf5x/libraries/templates/nrfx/.config
+++ b/bsp/nrf5x/libraries/templates/nrfx/.config
@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# RT-Thread Project Configuration
+# RT-Thread Configuration
 #

 #
@ -20,8 +20,22 @@ CONFIG_RT_USING_HOOK=y
 CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
 CONFIG_IDLE_THREAD_STACK_SIZE=256
-# CONFIG_RT_USING_TIMER_SOFT is not set
-# CONFIG_RT_DEBUG is not set
+CONFIG_RT_USING_TIMER_SOFT=y
+CONFIG_RT_TIMER_THREAD_PRIO=4
+CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
+# CONFIG_RT_KSERVICE_USING_STDLIB is not set
+CONFIG_RT_DEBUG=y
+# CONFIG_RT_DEBUG_COLOR is not set
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set

 #
 # Inter-Thread communication
@ -53,19 +67,18 @@ CONFIG_RT_USING_DEVICE=y
 # CONFIG_RT_USING_INTERRUPT_INFO is not set
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
-CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
 CONFIG_RT_VER_NUM=0x40003
-CONFIG_ARCH_ARM=y
-CONFIG_RT_USING_CPU_FFS=y
-CONFIG_ARCH_ARM_CORTEX_M=y
-CONFIG_ARCH_ARM_CORTEX_M3=y
+# CONFIG_RT_USING_CPU_FFS is not set
 # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set

 #
 # RT-Thread Components
 #
-# CONFIG_RT_USING_COMPONENTS_INIT is not set
-# CONFIG_RT_USING_USER_MAIN is not set
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10

 #
 # C++ features
@ -88,21 +101,13 @@ CONFIG_FINSH_CMD_SIZE=80
 # CONFIG_FINSH_USING_AUTH is not set
 CONFIG_FINSH_USING_MSH=y
 CONFIG_FINSH_USING_MSH_DEFAULT=y
-# CONFIG_FINSH_USING_MSH_ONLY is not set
+CONFIG_FINSH_USING_MSH_ONLY=y
 CONFIG_FINSH_ARG_MAX=10

 #
 # Device virtual file system
 #
 # CONFIG_RT_USING_DFS is not set
-# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
-# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
-# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
-# CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
-# CONFIG_RT_DFS_ELM_LFN_UNICODE_0 is not set
-# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
-# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
-# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set

 #
 # Device Drivers
@ -110,7 +115,9 @@ CONFIG_FINSH_ARG_MAX=10
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_PIPE_BUFSZ=512
 # CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
-# CONFIG_RT_USING_SERIAL is not set
+CONFIG_RT_USING_SERIAL=y
+# CONFIG_RT_SERIAL_USING_DMA is not set
+CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_HWTIMER is not set
 # CONFIG_RT_USING_CPUTIME is not set
@ -123,9 +130,7 @@ CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
 # CONFIG_RT_USING_PM is not set
-CONFIG_RT_USING_RTC=y
-# CONFIG_RT_USING_ALARM is not set
-# CONFIG_RT_USING_SOFT_RTC is not set
+# CONFIG_RT_USING_RTC is not set
 # CONFIG_RT_USING_SDIO is not set
 # CONFIG_RT_USING_SPI is not set
 # CONFIG_RT_USING_WDT is not set
@ -148,7 +153,7 @@ CONFIG_RT_USING_RTC=y
 #
 # CONFIG_RT_USING_LIBC is not set
 # CONFIG_RT_USING_PTHREADS is not set
-CONFIG_RT_LIBC_USING_TIME=y
+# CONFIG_RT_LIBC_USING_TIME is not set

 #
 # Network
@ -185,7 +190,6 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_RT_USING_RYM is not set
 # CONFIG_RT_USING_ULOG is not set
 # CONFIG_RT_USING_UTEST is not set
-# CONFIG_RT_USING_LWP is not set

 #
 # RT-Thread online packages
@ -254,8 +258,6 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_LIBRWS is not set
 # CONFIG_PKG_USING_TCPSERVER is not set
 # CONFIG_PKG_USING_PROTOBUF_C is not set
-# CONFIG_PKG_USING_ONNX_PARSER is not set
-# CONFIG_PKG_USING_ONNX_BACKEND is not set
 # CONFIG_PKG_USING_DLT645 is not set
 # CONFIG_PKG_USING_QXWZ is not set
 # CONFIG_PKG_USING_SMTP_CLIENT is not set
@ -270,6 +272,8 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_BTSTACK is not set
 # CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
 # CONFIG_PKG_USING_WAYZ_IOTKIT is not set
+# CONFIG_PKG_USING_MAVLINK is not set
+# CONFIG_PKG_USING_RAPIDJSON is not set

 #
 # security packages
@ -398,7 +402,11 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_LITTLED is not set
 # CONFIG_PKG_USING_LKDGUI is not set
 # CONFIG_PKG_USING_NRF5X_SDK is not set
-# CONFIG_PKG_USING_NRFX is not set
+CONFIG_PKG_USING_NRFX=y
+CONFIG_PKG_NRFX_PATH="/packages/peripherals/nrfx"
+# CONFIG_PKG_USING_NRFX_V210 is not set
+CONFIG_PKG_USING_NRFX_LATEST_VERSION=y
+CONFIG_PKG_NRFX_VER="latest"
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
@ -440,6 +448,18 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
 # CONFIG_PKG_USING_VDEVICE is not set
 # CONFIG_PKG_USING_SGM706 is not set
+# CONFIG_PKG_USING_RDA58XX is not set
+
+#
+# AI packages
+#
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ULAPACK is not set

 #
 # miscellaneous packages
@ -471,12 +491,8 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
 # CONFIG_PKG_USING_KI is not set
-# CONFIG_PKG_USING_NNOM is not set
-# CONFIG_PKG_USING_LIBANN is not set
-# CONFIG_PKG_USING_ELAPACK is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
 # CONFIG_PKG_USING_VT100 is not set
-# CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_UKAL is not set
 # CONFIG_PKG_USING_CRCLIB is not set

@ -488,11 +504,37 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_SNAKE is not set
 # CONFIG_PKG_USING_TETRIS is not set
 # CONFIG_PKG_USING_LWGPS is not set
-# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
 # CONFIG_PKG_USING_STATE_MACHINE is not set
 # CONFIG_PKG_USING_MCURSES is not set
 # CONFIG_PKG_USING_COWSAY is not set
-CONFIG_SOC_STM32F2=y
-CONFIG_RT_USING_UART1=y
-# CONFIG_RT_USING_UART6 is not set
-CONFIG_SOC_STM32F20X=y
+
+#
+# Hardware Drivers Config
+#
+CONFIG_SOC_NRF52840=y
+CONFIG_NRFX_CLOCK_ENABLED=1
+CONFIG_NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY=7
+CONFIG_NRFX_CLOCK_CONFIG_LF_SRC=1
+CONFIG_SOC_NORDIC=y
+
+#
+# On-chip Peripheral Drivers
+#
+# CONFIG_BSP_USING_GPIO is not set
+CONFIG_BSP_USING_UART=y
+CONFIG_NRFX_USING_UART=y
+# CONFIG_NRFX_USING_UARTE is not set
+CONFIG_NRFX_UART_ENABLED=1
+CONFIG_BSP_USING_UART0=y
+CONFIG_NRFX_UART0_ENABLED=1
+CONFIG_BSP_UART0_RX_PIN=8
+CONFIG_BSP_UART0_TX_PIN=6
+
+#
+# On-chip flash config
+#
+CONFIG_MCU_FLASH_START_ADDRESS=0x00000000
+CONFIG_MCU_FLASH_SIZE_KB=1024
+CONFIG_MCU_SRAM_START_ADDRESS=0x20000000
+CONFIG_MCU_SRAM_SIZE_KB=256
+CONFIG_MCU_FLASH_PAGE_SIZE=0x1000
--- a/bsp/nrf5x/libraries/templates/nrf52x/Kconfig
+++ b/bsp/nrf5x/libraries/templates/nrf52x/Kconfig
--- a/bsp/nrf5x/libraries/templates/nrfx/README.md
+++ b/bsp/nrf5x/libraries/templates/nrfx/README.md
@ -0,0 +1,77 @@
+# nRF52840-PCA10056 BSP说明
+
+## 简介
+
+该文件夹主要存放所有主芯片为nRF52840的板级支持包。目前默认支持的开发板是官方[PCA10056](https://www.nordicsemi.com/Software-and-tools/Development-Kits/nRF52840-DK)
+本文主要内容如下：
+
+- 开发板资源介绍
+- 进阶使用方法
+
+## 开发板介绍
+
+PCA10056-nRF52840是Nordic 官方的开发板，搭载nRF52840 芯片，基于ARM Cortex-M4内核，最高主频64 MHz，具有丰富的外设资源。
+
+开发板外观如下图所示
+
+![image-20201017202046725](../docs/images/nrf52840.png)
+
+PCA10056-nrf52840 开发板常用 **板载资源** 如下：
+
+- MCU：NRF52840，主频 64MHz，1MB FLASH ，256kB RAM
+- MCU 外设: GPIO, UART, SPI, I2C(TWI), RTC,TIMER,NFC,QSPI,PWM,ADC,USB,I2S
+- 板载设
+  - LED：4个，USB communication (LD1), user LED (LD2), power LED (LD3) 。
+  - 按键：5个，4个USER and 1个RESET 。
+  - USB:   1个
+- 常用接口：USB device、Arduino Uno 接口
+- 调试接口：板载 J-LINK 调试器。
+
+开发板更多详细信息请参考NORDIC官方[PCA10056](https://www.nordicsemi.com/Software-and-tools/Development-Kits/nRF52840-DK)
+
+
+
+## 外设支持
+
+本 BSP 目前对外设的支持情况如下：
+
+| **片上外设** | **支持情况** |        **备注**        |
+| :----------- | :----------: | :--------------------: |
+| GPIO         |     支持     |         GPION          |
+| UART         |     支持     |         UART0          |
+| PWM          |     支持     |          支持          |
+| SPI          |     支持     |          支持          |
+| QSPI         |     支持     | 支持开发板上QSPI FLASH |
+| RTC          |     支持     |                        |
+| ADC          |     支持     |                        |
+|              |              |                        |
+|              |              |                        |
+|              |              |                        |
+
+
+
+### 进阶使用
+
+此 BSP 默认只开启了 GPIO 和 串口 0 的功能，更多高级功能需要利用 env 工具对 BSP 进行配置，步骤如下：
+
+1. 在 bsp 下打开 env 工具。
+
+2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
+
+3. 输入`pkgs --update`命令更新软件包。
+
+4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
+
+
+
+## 支持其他开发板
+
+客户可以将自己的开发板的.config文件和board/Kconfig文件到board/$(board_name)下面添加README.md即可，使用的时候替换.config文件
+
+## 注意事项
+
+## 联系人信息
+
+维护人:
+
+-  [supperthomas], 邮箱：<78900636@qq.com>
--- a/bsp/nrf5x/libraries/templates/nrf52x/SConscript
+++ b/bsp/nrf5x/libraries/templates/nrf52x/SConscript
--- a/bsp/nrf5x/libraries/templates/nrf52x/SConstruct
+++ b/bsp/nrf5x/libraries/templates/nrf52x/SConstruct
@ -50,5 +50,8 @@ objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
 # include drivers
 objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))

+# include cmsis
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'cmsis', 'SConscript')))
+
 # make a building
 DoBuilding(TARGET, objs)
--- a/bsp/nrf5x/libraries/templates/nrf52x/applications/SConscript
+++ b/bsp/nrf5x/libraries/templates/nrf52x/applications/SConscript
--- a/bsp/nrf5x/libraries/templates/nrfx/applications/application.c
+++ b/bsp/nrf5x/libraries/templates/nrfx/applications/application.c
@ -5,15 +5,19 @@
 *
 * Change Logs:
 * Date           Author       Notes
- * 2009-01-05     Bernard      the first version
+ * 2020-04-29     supperthomas first version
+ *
 */

-#ifndef __USART_H__
-#define __USART_H__
-
-#include <rthw.h>
 #include <rtthread.h>
+#include <rtdevice.h>

-void rt_hw_usart_init(void);
+int main(void)
+{
+    while (1)
+    {
+        rt_thread_mdelay(500);
+    }
+    return RT_EOK;
+}

-#endif
--- a/bsp/nrf5x/libraries/templates/nrfx/board/Kconfig
+++ b/bsp/nrf5x/libraries/templates/nrfx/board/Kconfig
@ -0,0 +1,97 @@
+menu "Hardware Drivers Config"
+
+config SOC_NRF52840
+    bool
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+    
+config SOC_NORDIC
+    bool 
+    default y
+
+choice
+    prompt "Select BSP board "
+    default BSP_BOARD_PCA_10056
+
+    config BSP_BOARD_PCA_10056
+        bool "NRF52840 pca10056 "
+        
+endchoice
+
+menu "On-chip Peripheral Drivers"    
+    config BSP_USING_UART
+		bool "Enable UART"
+        default y
+        select RT_USING_SERIAL
+            config BSP_USING_UART0
+                bool "Enable UART0"
+                default y 
+                depends on BSP_USING_UART
+                
+                config BSP_UART0_RX_PIN
+                    depends on BSP_USING_UART0
+                    int "uart0 rx pin number"
+                    default 8 if BSP_BOARD_PCA_10056
+                    
+                config BSP_UART0_TX_PIN
+                    depends on BSP_USING_UART0
+                    int "uart0 tx pin number"
+                    default 6 if BSP_BOARD_PCA_10056
+
+    menu "On-chip flash config"
+
+        config MCU_FLASH_START_ADDRESS  
+            hex "MCU FLASH START ADDRESS"
+            default 0x00000000
+
+        config MCU_FLASH_SIZE_KB  
+            int "MCU FLASH SIZE, MAX size 1024 KB"
+            default 1024
+
+        config MCU_SRAM_START_ADDRESS 
+            hex "MCU RAM START ADDRESS"
+            default 0x20000000
+
+        config MCU_SRAM_SIZE_KB  
+            int "MCU RAM SIZE"
+            default 256
+
+        config MCU_FLASH_PAGE_SIZE 
+            hex "MCU FLASH PAGE SIZE, please not change,nrfx default is 0x1000"
+            default 0x1000
+	endmenu
+
+endmenu
+
+if SOC_NORDIC
+    config NRFX_CLOCK_ENABLED
+    int 
+    default 1
+    config    NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
+    int 
+    default 7
+    config NRFX_CLOCK_CONFIG_LF_SRC
+    int 
+    default 1    
+endif
+
+if BSP_USING_UART
+    config NRFX_USING_UART
+    bool
+    default y
+    
+    config NRFX_UART_ENABLED
+    int 
+    default 1
+    
+    config NRFX_UART0_ENABLED
+    int 
+    default 1
+    depends on BSP_USING_UART0
+endif
+
+
+endmenu
+
+
--- a/bsp/nrf5x/libraries/templates/nrf52x/board/SConscript
+++ b/bsp/nrf5x/libraries/templates/nrf52x/board/SConscript
@ -5,6 +5,7 @@ from building import *
 cwd = GetCurrentDir()
 src = Glob('*.c')
 CPPPATH = [cwd]
+define = ['USE_APP_CONFIG']

-group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH,)
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH,CPPDEFINES = define)
 Return('group')
--- a/bsp/nrf5x/libraries/templates/nrfx/board/board.c
+++ b/bsp/nrf5x/libraries/templates/nrfx/board/board.c
@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-04-29     supperthomas first version
+ *
+ */
+#include <rtthread.h>
+#include <rthw.h>
+#include <nrfx_systick.h>
+
+#include "board.h"
+#include "drv_uart.h"
+#include <nrfx_clock.h>
+
+/**
+ * This is the timer interrupt service routine.
+ *
+ */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+static void clk_event_handler(nrfx_clock_evt_type_t event){}
+
+void SysTick_Configuration(void)
+{
+    nrfx_clock_init(clk_event_handler);
+    nrfx_clock_enable();
+    nrfx_clock_lfclk_start();
+    /* Set interrupt priority */
+    NVIC_SetPriority(SysTick_IRQn, 0xf);
+
+    /* Configure SysTick to interrupt at the requested rate. */
+    nrf_systick_load_set(SystemCoreClock / RT_TICK_PER_SECOND);
+    nrf_systick_val_clear();
+    nrf_systick_csr_set(NRF_SYSTICK_CSR_CLKSOURCE_CPU | NRF_SYSTICK_CSR_TICKINT_ENABLE
+                        | NRF_SYSTICK_CSR_ENABLE);
+
+}
+
+
+void rt_hw_board_init(void)
+{
+    rt_hw_interrupt_enable(0);
+
+    SysTick_Configuration();
+
+#if defined(RT_USING_HEAP)
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
+#endif
+
+#ifdef RT_USING_SERIAL
+    rt_hw_uart_init();
+#endif
+
+#ifdef RT_USING_CONSOLE
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+
+#ifdef BSP_USING_SOFTDEVICE
+    extern uint32_t  Image$$RW_IRAM1$$Base;
+    uint32_t const *const m_ram_start  = &Image$$RW_IRAM1$$Base;
+    if ((uint32_t)m_ram_start == 0x20000000)
+    {
+        rt_kprintf("\r\n using softdevice the RAM couldn't be %p,please use the templete from package\r\n", m_ram_start);
+        while (1);
+    }
+    else
+    {
+        rt_kprintf("\r\n using softdevice the RAM at %p\r\n", m_ram_start);
+    }
+#endif
+
+}
+
--- a/bsp/nrf5x/libraries/templates/nrfx/board/board.h
+++ b/bsp/nrf5x/libraries/templates/nrfx/board/board.h
@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-04-29     supperthomas first version
+ *
+ */
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#include <rtthread.h>
+#include <rthw.h>
+#include "nrf.h"
+
+#define MCU_FLASH_SIZE MCU_FLASH_SIZE_KB*1024
+#define MCU_FLASH_END_ADDRESS        ((uint32_t)(MCU_FLASH_START_ADDRESS + MCU_FLASH_SIZE))
+#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
+#define MCU_SRAM_END_ADDRESS        (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
+
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
+#else
+extern int __bss_end__;
+#define HEAP_BEGIN      ((void *)&__bss_end__)
+#endif
+
+
+#define HEAP_END       (MCU_SRAM_END_ADDRESS)
+
+void rt_hw_board_init(void);
+
+#endif
+
--- a/bsp/nrf5x/libraries/templates/nrfx/board/linker_scripts/link.lds
+++ b/bsp/nrf5x/libraries/templates/nrfx/board/linker_scripts/link.lds
@ -0,0 +1,15 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x100000
+  RAM (rwx) :  ORIGIN = 0x20000000, LENGTH = 0x40000
+}
+
+INCLUDE "packages/nrfx-v2.1.0/mdk/nrf_common.ld"
+
+
+
--- a/bsp/nrf5x/libraries/templates/nrf52x/board/linker_scripts/link.sct
+++ b/bsp/nrf5x/libraries/templates/nrf52x/board/linker_scripts/link.sct
@ -2,13 +2,13 @@
 ; *** Scatter-Loading Description File generated by uVision ***
 ; *************************************************************

-LR_IROM1 0x0001F000 0x00061000  {    ; load region size_region
-  ER_IROM1 0x0001F000 0x00061000  {  ; load address = execution address
+LR_IROM1 0x00000000 0x100000  {    ; load region size_region
+  ER_IROM1 0x00000000 0x100000  {  ; load address = execution address
   *.o (RESET, +First)
   *(InRoot$$Sections)
   .ANY (+RO)
  }
-  RW_IRAM1 0x200025F8 0x0000DA08  {  ; RW data
+  RW_IRAM1 0x20000000 0x40000  {  ; RW data
   .ANY (+RW +ZI)
  }
 }
--- a/bsp/nrf5x/libraries/templates/nrfx/board/nrfx_config.h
+++ b/bsp/nrf5x/libraries/templates/nrfx/board/nrfx_config.h
@ -0,0 +1,47 @@
+/**
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef NRFX_CONFIG_H__
+#define NRFX_CONFIG_H__
+
+// TODO - temporary redirection
+#include <sdk_config.h>
+
+#endif // NRFX_CONFIG_H__
--- a/bsp/nrf5x/libraries/templates/nrfx/board/nrfx_glue.h
+++ b/bsp/nrf5x/libraries/templates/nrfx/board/nrfx_glue.h
@ -0,0 +1,269 @@
+/*
+ * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_GLUE_H__
+#define NRFX_GLUE_H__
+
+// THIS IS A TEMPLATE FILE.
+// It should be copied to a suitable location within the host environment into
+// which nrfx is integrated, and the following macros should be provided with
+// appropriate implementations.
+// And this comment should be removed from the customized file.
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include <stdbool.h>
+#include "nrf.h"
+/**
+ * @defgroup nrfx_glue nrfx_glue.h
+ * @{
+ * @ingroup nrfx
+ *
+ * @brief This file contains macros that should be implemented according to
+ *        the needs of the host environment into which @em nrfx is integrated.
+ */
+
+// Uncomment this line to use the standard MDK way of binding IRQ handlers
+// at linking time.
+#include <soc/nrfx_irqs.h>
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief Macro for placing a runtime assertion.
+ *
+ * @param expression Expression to be evaluated.
+ */
+#define NRFX_ASSERT(expression)
+
+/**
+ * @brief Macro for placing a compile time assertion.
+ *
+ * @param expression Expression to be evaluated.
+ */
+#define NRFX_STATIC_ASSERT(expression)
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief Macro for setting the priority of a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ * @param priority   Priority to be set.
+ */
+#define NRFX_IRQ_PRIORITY_SET(irq_number, priority)     NVIC_SetPriority(irq_number, priority)
+
+/**
+ * @brief Macro for enabling a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_ENABLE(irq_number)     NVIC_EnableIRQ(irq_number)
+
+/**
+ * @brief Macro for checking if a specific IRQ is enabled.
+ *
+ * @param irq_number IRQ number.
+ *
+ * @retval true  If the IRQ is enabled.
+ * @retval false Otherwise.
+ */
+#define NRFX_IRQ_IS_ENABLED(irq_number)  _NRFX_IRQ_IS_ENABLED(irq_number)
+static inline bool _NRFX_IRQ_IS_ENABLED(IRQn_Type irq_number)
+{
+    return 0 != (NVIC->ISER[irq_number / 32] & (1UL << (irq_number % 32)));
+}
+
+
+/**
+ * @brief Macro for disabling a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_DISABLE(irq_number)  _NRFX_IRQ_DISABLE(irq_number)
+static inline void _NRFX_IRQ_DISABLE(IRQn_Type irq_number)
+{
+    NVIC_DisableIRQ(irq_number);
+}
+
+
+/**
+ * @brief Macro for setting a specific IRQ as pending.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_PENDING_SET(irq_number)
+
+/**
+ * @brief Macro for clearing the pending status of a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_PENDING_CLEAR(irq_number)
+
+/**
+ * @brief Macro for checking the pending status of a specific IRQ.
+ *
+ * @retval true  If the IRQ is pending.
+ * @retval false Otherwise.
+ */
+#define NRFX_IRQ_IS_PENDING(irq_number)
+
+/** @brief Macro for entering into a critical section. */
+#define NRFX_CRITICAL_SECTION_ENTER()
+
+/** @brief Macro for exiting from a critical section. */
+#define NRFX_CRITICAL_SECTION_EXIT()
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief When set to a non-zero value, this macro specifies that
+ *        @ref nrfx_coredep_delay_us uses a precise DWT-based solution.
+ *        A compilation error is generated if the DWT unit is not present
+ *        in the SoC used.
+ */
+#define NRFX_DELAY_DWT_BASED    0
+
+/**
+ * @brief Macro for delaying the code execution for at least the specified time.
+ *
+ * @param us_time Number of microseconds to wait.
+ */
+#define NRFX_DELAY_US(us_time)
+
+//------------------------------------------------------------------------------
+
+/** @brief Atomic 32-bit unsigned type. */
+#define nrfx_atomic_t
+
+/**
+ * @brief Macro for storing a value to an atomic object and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value to store.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_STORE(p_data, value)
+
+/**
+ * @brief Macro for running a bitwise OR operation on an atomic object and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the OR operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_OR(p_data, value)
+
+/**
+ * @brief Macro for running a bitwise AND operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the AND operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_AND(p_data, value)
+
+/**
+ * @brief Macro for running a bitwise XOR operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the XOR operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_XOR(p_data, value)
+
+/**
+ * @brief Macro for running an addition operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the ADD operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_ADD(p_data, value)
+
+/**
+ * @brief Macro for running a subtraction operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the SUB operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_SUB(p_data, value)
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief When set to a non-zero value, this macro specifies that the
+ *        @ref nrfx_error_codes and the @ref nrfx_err_t type itself are defined
+ *        in a customized way and the default definitions from @c <nrfx_error.h>
+ *        should not be used.
+ */
+#define NRFX_CUSTOM_ERROR_CODES 0
+
+//------------------------------------------------------------------------------
+
+/** @brief Bitmask that defines DPPI channels that are reserved for use outside of the nrfx library. */
+#define NRFX_DPPI_CHANNELS_USED  0
+
+/** @brief Bitmask that defines DPPI groups that are reserved for use outside of the nrfx library. */
+#define NRFX_DPPI_GROUPS_USED    0
+
+/** @brief Bitmask that defines PPI channels that are reserved for use outside of the nrfx library. */
+#define NRFX_PPI_CHANNELS_USED  0
+
+/** @brief Bitmask that defines PPI groups that are reserved for use outside of the nrfx library. */
+#define NRFX_PPI_GROUPS_USED    0
+
+/** @brief Bitmask that defines EGU instances that are reserved for use outside of the nrfx library. */
+#define NRFX_EGUS_USED          0
+
+/** @brief Bitmask that defines TIMER instances that are reserved for use outside of the nrfx library. */
+#define NRFX_TIMERS_USED        0
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRFX_GLUE_H__
--- a/bsp/nrf5x/libraries/templates/nrfx/board/nrfx_log.h
+++ b/bsp/nrf5x/libraries/templates/nrfx/board/nrfx_log.h
@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_LOG_H__
+#define NRFX_LOG_H__
+
+// THIS IS A TEMPLATE FILE.
+// It should be copied to a suitable location within the host environment into
+// which nrfx is integrated, and the following macros should be provided with
+// appropriate implementations.
+// And this comment should be removed from the customized file.
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrfx_log nrfx_log.h
+ * @{
+ * @ingroup nrfx
+ *
+ * @brief This file contains macros that should be implemented according to
+ *        the needs of the host environment into which @em nrfx is integrated.
+ */
+
+/**
+ * @brief Macro for logging a message with the severity level ERROR.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_ERROR(format, ...)
+
+/**
+ * @brief Macro for logging a message with the severity level WARNING.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_WARNING(format, ...)
+
+/**
+ * @brief Macro for logging a message with the severity level INFO.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_INFO(format, ...)
+
+/**
+ * @brief Macro for logging a message with the severity level DEBUG.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_DEBUG(format, ...)
+
+
+/**
+ * @brief Macro for logging a memory dump with the severity level ERROR.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_ERROR(p_memory, length)
+
+/**
+ * @brief Macro for logging a memory dump with the severity level WARNING.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_WARNING(p_memory, length)
+
+/**
+ * @brief Macro for logging a memory dump with the severity level INFO.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_INFO(p_memory, length)
+
+/**
+ * @brief Macro for logging a memory dump with the severity level DEBUG.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_DEBUG(p_memory, length)
+
+
+/**
+ * @brief Macro for getting the textual representation of a given error code.
+ *
+ * @param[in] error_code Error code.
+ *
+ * @return String containing the textual representation of the error code.
+ */
+#define NRFX_LOG_ERROR_STRING_GET(error_code)
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRFX_LOG_H__
--- a/bsp/nrf5x/libraries/templates/nrfx/board/sdk_config.h
+++ b/bsp/nrf5x/libraries/templates/nrfx/board/sdk_config.h
--- a/bsp/nrf5x/libraries/templates/nrf52x/project.uvoptx
+++ b/bsp/nrf5x/libraries/templates/nrf52x/project.uvoptx
--- a/bsp/nrf5x/libraries/templates/nrf52x/project.uvprojx
+++ b/bsp/nrf5x/libraries/templates/nrf52x/project.uvprojx
@ -14,16 +14,16 @@
      <uAC6>0</uAC6>
      <TargetOption>
        <TargetCommonOption>
-          <Device>nRF52832_xxAA</Device>
+          <Device>nRF52840_xxAA</Device>
          <Vendor>Nordic Semiconductor</Vendor>
-          <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.31.0</PackID>
+          <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.38.0</PackID>
          <PackURL>http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/</PackURL>
-          <Cpu>IRAM(0x20000000,0x10000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
+          <Cpu>IRAM(0x20000000,0x40000) IROM(0x00000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
          <FlashUtilSpec></FlashUtilSpec>
          <StartupFile></StartupFile>
-          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm))</FlashDriverDll>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm))</FlashDriverDll>
          <DeviceId>0</DeviceId>
-          <RegisterFile>$$Device:nRF52832_xxAA$Device\Include\nrf.h</RegisterFile>
+          <RegisterFile>$$Device:nRF52840_xxAA$Device\Include\nrf.h</RegisterFile>
          <MemoryEnv></MemoryEnv>
          <Cmp></Cmp>
          <Asm></Asm>
@ -33,7 +33,7 @@
          <SLE66CMisc></SLE66CMisc>
          <SLE66AMisc></SLE66AMisc>
          <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:nRF52832_xxAA$SVD\nrf52.svd</SFDFile>
+          <SFDFile>$$Device:nRF52840_xxAA$SVD\nrf52840.svd</SFDFile>
          <bCustSvd>0</bCustSvd>
          <UseEnv>0</UseEnv>
          <BinPath></BinPath>
@ -245,12 +245,12 @@
              <IRAM>
                <Type>0</Type>
                <StartAddress>0x20000000</StartAddress>
-                <Size>0x10000</Size>
+                <Size>0x40000</Size>
              </IRAM>
              <IROM>
                <Type>1</Type>
                <StartAddress>0x0</StartAddress>
-                <Size>0x80000</Size>
+                <Size>0x100000</Size>
              </IROM>
              <XRAM>
                <Type>0</Type>
@ -274,8 +274,8 @@
              </OCR_RVCT3>
              <OCR_RVCT4>
                <Type>1</Type>
-                <StartAddress>0x1f000</StartAddress>
-                <Size>0x61000</Size>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x100000</Size>
              </OCR_RVCT4>
              <OCR_RVCT5>
                <Type>1</Type>
@ -299,8 +299,8 @@
              </OCR_RVCT8>
              <OCR_RVCT9>
                <Type>0</Type>
-                <StartAddress>0x200025f8</StartAddress>
-                <Size>0xda08</Size>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x40000</Size>
              </OCR_RVCT9>
              <OCR_RVCT10>
                <Type>0</Type>
@ -336,9 +336,9 @@
            <v6Rtti>0</v6Rtti>
            <VariousControls>
              <MiscControls>--reduce_paths</MiscControls>
-              <Define>NRF52_PAN_55, NRF52_PAN_12, NRF52_PAN_15, NRF52_PAN_58, SWI_DISABLE0, SOFTDEVICE_PRESENT, NRF52_PAN_54, NRF52, BLE_STACK_SUPPORT_REQD, NRF52_PAN_51, NRF52_PAN_36, RTTHREAD, CONFIG_GPIO_AS_PINRESET, NRF52_PAN_64, NRF52_PAN_20, NRF52_PAN_74, NRF52832_XXAA, S132, NRF_SD_BLE_API_VERSION=4, NRF52_PAN_31, RT_USING_ARM_LIBC</Define>
+              <Define>NRF52840_XXAA, USE_APP_CONFIG, __RTTHREAD__</Define>
              <Undefine></Undefine>
-              <IncludePath>.;..\..\..\include;applications;.;board;..\libraries\drivers;packages\nRF5_SDK_13.0.0_04a0bfd\components;packages\nRF5_SDK_13.0.0_04a0bfd\components\softdevice\common\softdevice_handler;packages\nRF5_SDK_13.0.0_04a0bfd\components\softdevice\s132\headers;packages\nRF5_SDK_13.0.0_04a0bfd\components\softdevice\s132\headers\nrf52;packages\nRF5_SDK_13.0.0_04a0bfd\components\ble\common;packages\nRF5_SDK_13.0.0_04a0bfd\components\ble\nrf_ble_gatt;packages\nRF5_SDK_13.0.0_04a0bfd\components\ble\ble_advertising;packages\nRF5_SDK_13.0.0_04a0bfd\components\ble\ble_services\ble_nus;packages\nRF5_SDK_13.0.0_04a0bfd\components;packages\nRF5_SDK_13.0.0_04a0bfd\components\device;packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\delay;packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\uart;packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\clock;packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\gpiote;packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\common;packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\hal;packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\pwm;packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\saadc;packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\util;packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\timer;packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\fstorage;packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\experimental_section_vars;packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\log;packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\log\src;packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\strerror;packages\nRF5_SDK_13.0.0_04a0bfd\components\toolchain\cmsis\include;packages\nRF5_SDK_13.0.0_04a0bfd\components\toolchain;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common</IncludePath>
+              <IncludePath>applications;.;..\libraries\cmsis\include;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\drivers;..\..\..\components\finsh;.;..\..\..\include;packages\nrfx-v2.1.0;packages\nrfx-v2.1.0\drivers;packages\nrfx-v2.1.0\drivers\include;packages\nrfx-v2.1.0\mdk;packages\nrfx-v2.1.0\hal</IncludePath>
            </VariousControls>
          </Cads>
          <Aads>
@ -354,7 +354,7 @@
            <uClangAs>0</uClangAs>
            <VariousControls>
              <MiscControls>--cpreproc_opts=-DBLE_STACK_SUPPORT_REQD,-DNRF_SD_BLE_API_VERSION=4,-DS132,-DSOFTDEVICE_PRESENT,-DSWI_DISABLE0,-DCONFIG_GPIO_AS_PINRESET,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_12,-DNRF52_PAN_15,-DNRF52_PAN_20,-DNRF52_PAN_31,-DNRF52_PAN_36,-DNRF52_PAN_51,-DNRF52_PAN_54,-DNRF52_PAN_55,-DNRF52_PAN_58,-DNRF52_PAN_64,-DNRF52_PAN_74</MiscControls>
-              <Define>BLE_STACK_SUPPORT_REQD NRF_SD_BLE_API_VERSION=4 S132 SOFTDEVICE_PRESENT SWI_DISABLE0 CONFIG_GPIO_AS_PINRESET NRF52 NRF52832_XXAA NRF52_PAN_12 NRF52_PAN_15 NRF52_PAN_20 NRF52_PAN_31 NRF52_PAN_36 NRF52_PAN_51 NRF52_PAN_54 NRF52_PAN_55 NRF52_PAN_58 NRF52_PAN_64 NRF52_PAN_74</Define>
+              <Define></Define>
              <Undefine></Undefine>
              <IncludePath></IncludePath>
            </VariousControls>
@ -379,81 +379,6 @@
        </TargetArmAds>
      </TargetOption>
      <Groups>
-        <Group>
-          <GroupName>Kernel</GroupName>
-          <Files>
-            <File>
-              <FileName>clock.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\clock.c</FilePath>
-            </File>
-            <File>
-              <FileName>components.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\components.c</FilePath>
-            </File>
-            <File>
-              <FileName>device.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\device.c</FilePath>
-            </File>
-            <File>
-              <FileName>idle.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\idle.c</FilePath>
-            </File>
-            <File>
-              <FileName>ipc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\ipc.c</FilePath>
-            </File>
-            <File>
-              <FileName>irq.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\irq.c</FilePath>
-            </File>
-            <File>
-              <FileName>kservice.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\kservice.c</FilePath>
-            </File>
-            <File>
-              <FileName>mem.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\mem.c</FilePath>
-            </File>
-            <File>
-              <FileName>mempool.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\mempool.c</FilePath>
-            </File>
-            <File>
-              <FileName>object.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\object.c</FilePath>
-            </File>
-            <File>
-              <FileName>scheduler.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\scheduler.c</FilePath>
-            </File>
-            <File>
-              <FileName>signal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\signal.c</FilePath>
-            </File>
-            <File>
-              <FileName>thread.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\thread.c</FilePath>
-            </File>
-            <File>
-              <FileName>timer.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\timer.c</FilePath>
-            </File>
-          </Files>
-        </Group>
        <Group>
          <GroupName>Applications</GroupName>
          <Files>
@ -462,15 +387,85 @@
              <FileType>1</FileType>
              <FilePath>applications\application.c</FilePath>
            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>CPU</GroupName>
+          <Files>
            <File>
-              <FileName>ble_nus_app.c</FileName>
+              <FileName>div0.c</FileName>
              <FileType>1</FileType>
-              <FilePath>applications\ble_nus_app.c</FilePath>
+              <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
            </File>
            <File>
-              <FileName>startup.c</FileName>
+              <FileName>backtrace.c</FileName>
              <FileType>1</FileType>
-              <FilePath>applications\startup.c</FilePath>
+              <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
+            </File>
+            <File>
+              <FileName>showmem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
+            </File>
+            <File>
+              <FileName>context_rvds.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
+            </File>
+            <File>
+              <FileName>cpuport.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>DeviceDrivers</GroupName>
+          <Files>
+            <File>
+              <FileName>pin.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
+            </File>
+            <File>
+              <FileName>serial.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
+            </File>
+            <File>
+              <FileName>ringblk_buf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath>
+            </File>
+            <File>
+              <FileName>ringbuffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>workqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath>
+            </File>
+            <File>
+              <FileName>waitqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath>
+            </File>
+            <File>
+              <FileName>completion.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\completion.c</FilePath>
+            </File>
+            <File>
+              <FileName>pipe.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath>
+            </File>
+            <File>
+              <FileName>dataqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath>
            </File>
          </Files>
        </Group>
@ -489,226 +484,6 @@
            </File>
          </Files>
        </Group>
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-          <GroupName>BLE_STACK</GroupName>
-          <Files>
-            <File>
-              <FileName>ble_advdata.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\ble\common\ble_advdata.c</FilePath>
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-            <File>
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-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\ble\common\ble_conn_params.c</FilePath>
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-            <File>
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-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\ble\common\ble_conn_state.c</FilePath>
-            </File>
-            <File>
-              <FileName>ble_srv_common.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\ble\common\ble_srv_common.c</FilePath>
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-              <FileName>nrf_ble_gatt.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\ble\nrf_ble_gatt\nrf_ble_gatt.c</FilePath>
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-            <File>
-              <FileName>ble_nus.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\ble\ble_services\ble_nus\ble_nus.c</FilePath>
-            </File>
-            <File>
-              <FileName>ble_advertising.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\ble\ble_advertising\ble_advertising.c</FilePath>
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-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\softdevice\common\softdevice_handler\softdevice_handler.c</FilePath>
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-          </Files>
-        </Group>
-        <Group>
-          <GroupName>NRF_DRIVERS</GroupName>
-          <Files>
-            <File>
-              <FileName>nrf_saadc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\hal\nrf_saadc.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_drv_common.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\common\nrf_drv_common.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_drv_clock.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\clock\nrf_drv_clock.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_drv_gpiote.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\gpiote\nrf_drv_gpiote.c</FilePath>
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-            <File>
-              <FileName>nrf_drv_pwm.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\pwm\nrf_drv_pwm.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_drv_saadc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\saadc\nrf_drv_saadc.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_log_backend_serial.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\log\src\nrf_log_backend_serial.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_log_frontend.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\log\src\nrf_log_frontend.c</FilePath>
-            </File>
-            <File>
-              <FileName>app_timer_rtthread.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\timer\app_timer_rtthread.c</FilePath>
-            </File>
-            <File>
-              <FileName>app_error.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\util\app_error.c</FilePath>
-            </File>
-            <File>
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-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\util\app_error_weak.c</FilePath>
-            </File>
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-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\util\app_util_platform.c</FilePath>
-            </File>
-            <File>
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-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\util\nrf_assert.c</FilePath>
-            </File>
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-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\util\sdk_mapped_flags.c</FilePath>
-            </File>
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-              <FileName>fstorage.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\fstorage\fstorage.c</FilePath>
-            </File>
-            <File>
-              <FileName>nrf_strerror.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\libraries\strerror\nrf_strerror.c</FilePath>
-            </File>
-            <File>
-              <FileName>system_nrf52.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\toolchain\system_nrf52.c</FilePath>
-            </File>
-            <File>
-              <FileName>arm_startup_nrf52.s</FileName>
-              <FileType>2</FileType>
-              <FilePath>packages\nRF5_SDK_13.0.0_04a0bfd\components\toolchain\arm\arm_startup_nrf52.s</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>cpu</GroupName>
-          <Files>
-            <File>
-              <FileName>backtrace.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
-            </File>
-            <File>
-              <FileName>div0.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
-            </File>
-            <File>
-              <FileName>showmem.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
-            </File>
-            <File>
-              <FileName>cpuport.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
-            </File>
-            <File>
-              <FileName>context_rvds.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>DeviceDrivers</GroupName>
-          <Files>
-            <File>
-              <FileName>pin.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
-            </File>
-            <File>
-              <FileName>serial.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
-            </File>
-            <File>
-              <FileName>completion.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\src\completion.c</FilePath>
-            </File>
-            <File>
-              <FileName>dataqueue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath>
-            </File>
-            <File>
-              <FileName>pipe.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath>
-            </File>
-            <File>
-              <FileName>ringblk_buf.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath>
-            </File>
-            <File>
-              <FileName>ringbuffer.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath>
-            </File>
-            <File>
-              <FileName>waitqueue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath>
-            </File>
-            <File>
-              <FileName>workqueue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath>
-            </File>
-          </Files>
-        </Group>
        <Group>
          <GroupName>finsh</GroupName>
          <Files>
@ -717,40 +492,275 @@
              <FileType>1</FileType>
              <FilePath>..\..\..\components\finsh\shell.c</FilePath>
            </File>
-            <File>
-              <FileName>cmd.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\finsh\cmd.c</FilePath>
-            </File>
            <File>
              <FileName>msh.c</FileName>
              <FileType>1</FileType>
              <FilePath>..\..\..\components\finsh\msh.c</FilePath>
            </File>
+            <File>
+              <FileName>cmd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\finsh\cmd.c</FilePath>
+            </File>
          </Files>
        </Group>
        <Group>
-          <GroupName>libc</GroupName>
+          <GroupName>Kernel</GroupName>
          <Files>
            <File>
-              <FileName>libc.c</FileName>
+              <FileName>irq.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\..\components\libc\compilers\armlibc\libc.c</FilePath>
+              <FilePath>..\..\..\src\irq.c</FilePath>
            </File>
            <File>
-              <FileName>mem_std.c</FileName>
+              <FileName>clock.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\..\components\libc\compilers\armlibc\mem_std.c</FilePath>
+              <FilePath>..\..\..\src\clock.c</FilePath>
            </File>
            <File>
-              <FileName>stubs.c</FileName>
+              <FileName>kservice.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\..\components\libc\compilers\armlibc\stubs.c</FilePath>
+              <FilePath>..\..\..\src\kservice.c</FilePath>
            </File>
            <File>
-              <FileName>time.c</FileName>
+              <FileName>timer.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath>
+              <FilePath>..\..\..\src\timer.c</FilePath>
+            </File>
+            <File>
+              <FileName>object.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\object.c</FilePath>
+            </File>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\components.c</FilePath>
+            </File>
+            <File>
+              <FileName>scheduler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\scheduler.c</FilePath>
+            </File>
+            <File>
+              <FileName>idle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\idle.c</FilePath>
+            </File>
+            <File>
+              <FileName>ipc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\ipc.c</FilePath>
+            </File>
+            <File>
+              <FileName>mem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\mem.c</FilePath>
+            </File>
+            <File>
+              <FileName>thread.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\thread.c</FilePath>
+            </File>
+            <File>
+              <FileName>mempool.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\mempool.c</FilePath>
+            </File>
+            <File>
+              <FileName>device.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\device.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>nrfx</GroupName>
+          <Files>
+            <File>
+              <FileName>nrfx_spim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_spim.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_pwm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_pwm.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_saadc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_saadc.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_usbd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_usbd.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_nvmc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_nvmc.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_comp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_comp.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_clock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_clock.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_twi_twim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_twi_twim.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_temp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_temp.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_twis.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_twis.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_ipc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_ipc.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_dppi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_dppi.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_usbreg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_usbreg.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_startup_nrf52840.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>packages\nrfx-v2.1.0\mdk\arm_startup_nrf52840.s</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_systick.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_systick.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_spis.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_spis.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_uarte.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_uarte.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_gpiote.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_gpiote.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_timer.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_qspi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_qspi.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_pdm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_pdm.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_rng.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_rng.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_lpcomp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_lpcomp.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_i2s.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_i2s.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_power.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_power.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_ppi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_ppi.c</FilePath>
+            </File>
+            <File>
+              <FileName>system_nrf52840.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\mdk\system_nrf52840.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_egu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_egu.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_rtc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_rtc.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_twi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_twi.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_wdt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_wdt.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_nfct.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_nfct.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_qdec.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_qdec.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_twim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-v2.1.0\drivers\src\nrfx_twim.c</FilePath>
            </File>
          </Files>
        </Group>
--- a/bsp/nrf5x/libraries/templates/nrfx/rtconfig.h
+++ b/bsp/nrf5x/libraries/templates/nrfx/rtconfig.h
@ -2,7 +2,7 @@
 #define RT_CONFIG_H__

 /* Automatically generated file; DO NOT EDIT. */
-/* RT-Thread Project Configuration */
+/* RT-Thread Configuration */

 /* RT-Thread Kernel */

@ -16,6 +16,10 @@
 #define RT_USING_IDLE_HOOK
 #define RT_IDLE_HOOK_LIST_SIZE 4
 #define IDLE_THREAD_STACK_SIZE 256
+#define RT_USING_TIMER_SOFT
+#define RT_TIMER_THREAD_PRIO 4
+#define RT_TIMER_THREAD_STACK_SIZE 512
+#define RT_DEBUG

 /* Inter-Thread communication */

@ -36,15 +40,15 @@
 #define RT_USING_DEVICE
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
-#define RT_CONSOLE_DEVICE_NAME "uart1"
+#define RT_CONSOLE_DEVICE_NAME "uart0"
 #define RT_VER_NUM 0x40003
-#define ARCH_ARM
-#define RT_USING_CPU_FFS
-#define ARCH_ARM_CORTEX_M
-#define ARCH_ARM_CORTEX_M3

 /* RT-Thread Components */

+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10

 /* C++ features */

@ -62,6 +66,7 @@
 #define FINSH_CMD_SIZE 80
 #define FINSH_USING_MSH
 #define FINSH_USING_MSH_DEFAULT
+#define FINSH_USING_MSH_ONLY
 #define FINSH_ARG_MAX 10

 /* Device virtual file system */
@ -71,15 +76,15 @@

 #define RT_USING_DEVICE_IPC
 #define RT_PIPE_BUFSZ 512
+#define RT_USING_SERIAL
+#define RT_SERIAL_RB_BUFSZ 64
 #define RT_USING_PIN
-#define RT_USING_RTC

 /* Using USB */


 /* POSIX layer and C standard library */

-#define RT_LIBC_USING_TIME

 /* Network */

@ -137,6 +142,11 @@

 /* peripheral libraries and drivers */

+#define PKG_USING_NRFX
+#define PKG_USING_NRFX_LATEST_VERSION
+
+/* AI packages */
+

 /* miscellaneous packages */

@ -146,8 +156,31 @@

 /* games: games run on RT-Thread console */

-#define SOC_STM32F2
-#define RT_USING_UART1
-#define SOC_STM32F20X
+
+/* Hardware Drivers Config */
+
+#define SOC_NRF52840
+#define NRFX_CLOCK_ENABLED 1
+#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#define NRFX_CLOCK_CONFIG_LF_SRC 1
+#define SOC_NORDIC
+
+/* On-chip Peripheral Drivers */
+
+#define BSP_USING_UART
+#define NRFX_USING_UART
+#define NRFX_UART_ENABLED 1
+#define BSP_USING_UART0
+#define NRFX_UART0_ENABLED 1
+#define BSP_UART0_RX_PIN 8
+#define BSP_UART0_TX_PIN 6
+
+/* On-chip flash config */
+
+#define MCU_FLASH_START_ADDRESS 0x00000000
+#define MCU_FLASH_SIZE_KB 1024
+#define MCU_SRAM_START_ADDRESS 0x20000000
+#define MCU_SRAM_SIZE_KB 256
+#define MCU_FLASH_PAGE_SIZE 0x1000

 #endif
--- a/bsp/nrf5x/libraries/templates/nrf52x/rtconfig.py
+++ b/bsp/nrf5x/libraries/templates/nrf52x/rtconfig.py
@ -40,10 +40,10 @@ if PLATFORM == 'gcc':
    OBJDUMP = PREFIX + 'objdump'
    OBJCPY = PREFIX + 'objcopy'

-    DEVICE = ' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections'
+    DEVICE = ' -mcpu='+CPU + ' -mthumb -ffunction-sections -fdata-sections'
    CFLAGS = DEVICE
    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
-    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-nrf52832.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'

    CPATH = ''
    LPATH = ''
@ -82,3 +82,11 @@ elif PLATFORM == 'armcc':
        CFLAGS += ' -O2'

    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+
+def dist_handle(BSP_ROOT, dist_dir):
+    import sys
+    cwd_path = os.getcwd()
+    sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
+    from sdk_dist import dist_do_building
+    dist_do_building(BSP_ROOT, dist_dir)
--- a/bsp/nrf5x/libraries/templates/nrfx/template.uvoptx
+++ b/bsp/nrf5x/libraries/templates/nrfx/template.uvoptx
@ -0,0 +1,184 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rtthread</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>5</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>4</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>Segger\JL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U683349164 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000 -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN2 -FC4000 -FD20000000 -FF0nrf52xxx -FF1nrf52xxx_uicr -FL0200000 -FL11000 -FS00 -FS110001000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+      <DebugDescription>
+        <Enable>1</Enable>
+        <EnableFlashSeq>1</EnableFlashSeq>
+        <EnableLog>0</EnableLog>
+        <Protocol>2</Protocol>
+        <DbgClock>10000000</DbgClock>
+      </DebugDescription>
+    </TargetOption>
+  </Target>
+
+</ProjectOpt>
--- a/bsp/nrf5x/libraries/templates/nrf52x/template.uvprojx
+++ b/bsp/nrf5x/libraries/templates/nrf52x/template.uvprojx
@ -14,16 +14,16 @@
      <uAC6>0</uAC6>
      <TargetOption>
        <TargetCommonOption>
-          <Device>nRF52832_xxAA</Device>
+          <Device>nRF52840_xxAA</Device>
          <Vendor>Nordic Semiconductor</Vendor>
-          <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.24.1</PackID>
+          <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.38.0</PackID>
          <PackURL>http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/</PackURL>
-          <Cpu>IRAM(0x20000000,0x10000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
+          <Cpu>IRAM(0x20000000,0x40000) IROM(0x00000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
          <FlashUtilSpec></FlashUtilSpec>
          <StartupFile></StartupFile>
-          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm))</FlashDriverDll>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm))</FlashDriverDll>
          <DeviceId>0</DeviceId>
-          <RegisterFile>$$Device:nRF52832_xxAA$Device\Include\nrf.h</RegisterFile>
+          <RegisterFile>$$Device:nRF52840_xxAA$Device\Include\nrf.h</RegisterFile>
          <MemoryEnv></MemoryEnv>
          <Cmp></Cmp>
          <Asm></Asm>
@ -33,7 +33,7 @@
          <SLE66CMisc></SLE66CMisc>
          <SLE66AMisc></SLE66AMisc>
          <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:nRF52832_xxAA$SVD\nrf52.svd</SFDFile>
+          <SFDFile>$$Device:nRF52840_xxAA$SVD\nrf52840.svd</SFDFile>
          <bCustSvd>0</bCustSvd>
          <UseEnv>0</UseEnv>
          <BinPath></BinPath>
@ -245,12 +245,12 @@
              <IRAM>
                <Type>0</Type>
                <StartAddress>0x20000000</StartAddress>
-                <Size>0x10000</Size>
+                <Size>0x40000</Size>
              </IRAM>
              <IROM>
                <Type>1</Type>
                <StartAddress>0x0</StartAddress>
-                <Size>0x80000</Size>
+                <Size>0x100000</Size>
              </IROM>
              <XRAM>
                <Type>0</Type>
@ -274,8 +274,8 @@
              </OCR_RVCT3>
              <OCR_RVCT4>
                <Type>1</Type>
-                <StartAddress>0x1f000</StartAddress>
-                <Size>0x61000</Size>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x100000</Size>
              </OCR_RVCT4>
              <OCR_RVCT5>
                <Type>1</Type>
@ -299,8 +299,8 @@
              </OCR_RVCT8>
              <OCR_RVCT9>
                <Type>0</Type>
-                <StartAddress>0x200025f8</StartAddress>
-                <Size>0xda08</Size>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x40000</Size>
              </OCR_RVCT9>
              <OCR_RVCT10>
                <Type>0</Type>
@ -336,7 +336,7 @@
            <v6Rtti>0</v6Rtti>
            <VariousControls>
              <MiscControls>--reduce_paths</MiscControls>
-              <Define>BLE_STACK_SUPPORT_REQD NRF_SD_BLE_API_VERSION=4 S132 SOFTDEVICE_PRESENT SWI_DISABLE0 CONFIG_GPIO_AS_PINRESET NRF52 NRF52832_XXAA NRF52_PAN_12 NRF52_PAN_15 NRF52_PAN_20 NRF52_PAN_31 NRF52_PAN_36 NRF52_PAN_51 NRF52_PAN_54 NRF52_PAN_55 NRF52_PAN_58 NRF52_PAN_64 NRF52_PAN_74</Define>
+              <Define></Define>
              <Undefine></Undefine>
              <IncludePath></IncludePath>
            </VariousControls>
@ -354,13 +354,13 @@
            <uClangAs>0</uClangAs>
            <VariousControls>
              <MiscControls>--cpreproc_opts=-DBLE_STACK_SUPPORT_REQD,-DNRF_SD_BLE_API_VERSION=4,-DS132,-DSOFTDEVICE_PRESENT,-DSWI_DISABLE0,-DCONFIG_GPIO_AS_PINRESET,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_12,-DNRF52_PAN_15,-DNRF52_PAN_20,-DNRF52_PAN_31,-DNRF52_PAN_36,-DNRF52_PAN_51,-DNRF52_PAN_54,-DNRF52_PAN_55,-DNRF52_PAN_58,-DNRF52_PAN_64,-DNRF52_PAN_74</MiscControls>
-              <Define>BLE_STACK_SUPPORT_REQD NRF_SD_BLE_API_VERSION=4 S132 SOFTDEVICE_PRESENT SWI_DISABLE0 CONFIG_GPIO_AS_PINRESET NRF52 NRF52832_XXAA NRF52_PAN_12 NRF52_PAN_15 NRF52_PAN_20 NRF52_PAN_31 NRF52_PAN_36 NRF52_PAN_51 NRF52_PAN_54 NRF52_PAN_55 NRF52_PAN_58 NRF52_PAN_64 NRF52_PAN_74</Define>
+              <Define></Define>
              <Undefine></Undefine>
              <IncludePath></IncludePath>
            </VariousControls>
          </Aads>
          <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
            <Ropi>0</Ropi>
            <Rwpi>0</Rwpi>
            <noStLib>0</noStLib>
@ -369,7 +369,7 @@
            <TextAddressRange>0x00000000</TextAddressRange>
            <DataAddressRange>0x20000000</DataAddressRange>
            <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
            <IncludeLibs></IncludeLibs>
            <IncludeLibsPath></IncludeLibsPath>
            <Misc>--diag_suppress 6330</Misc>
--- a/bsp/nrf5x/nrf51822/.config
+++ b/bsp/nrf5x/nrf51822/.config
@ -0,0 +1,561 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# RT-Thread Configuration
+#
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_ALIGN_SIZE=4
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=100
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=256
+CONFIG_RT_USING_TIMER_SOFT=y
+CONFIG_RT_TIMER_THREAD_PRIO=4
+CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
+
+#
+# kservice optimization
+#
+# CONFIG_RT_KSERVICE_USING_STDLIB is not set
+# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
+CONFIG_RT_DEBUG=y
+# CONFIG_RT_DEBUG_COLOR is not set
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_SIGNALS is not set
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+# CONFIG_RT_USING_MEMHEAP is not set
+# CONFIG_RT_USING_NOHEAP is not set
+CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_USERHEAP is not set
+# CONFIG_RT_USING_MEMTRACE is not set
+CONFIG_RT_USING_HEAP=y
+
+#
+# Kernel Device Object
+#
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
+CONFIG_RT_VER_NUM=0x40003
+# CONFIG_RT_USING_CPU_FFS is not set
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+
+#
+# C++ features
+#
+# CONFIG_RT_USING_CPLUSPLUS is not set
+
+#
+# Command shell
+#
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=4096
+CONFIG_FINSH_CMD_SIZE=80
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_USING_MSH_DEFAULT=y
+CONFIG_FINSH_USING_MSH_ONLY=y
+CONFIG_FINSH_ARG_MAX=10
+
+#
+# Device virtual file system
+#
+# CONFIG_RT_USING_DFS is not set
+
+#
+# Device Drivers
+#
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
+CONFIG_RT_USING_SERIAL=y
+# CONFIG_RT_SERIAL_USING_DMA is not set
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PHY is not set
+CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+# CONFIG_RT_USING_SPI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
+# CONFIG_RT_USING_WIFI is not set
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+
+#
+# POSIX layer and C standard library
+#
+# CONFIG_RT_USING_LIBC is not set
+# CONFIG_RT_USING_PTHREADS is not set
+# CONFIG_RT_LIBC_USING_TIME is not set
+
+#
+# Network
+#
+
+#
+# Socket abstraction layer
+#
+# CONFIG_RT_USING_SAL is not set
+
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
+#
+# light weight TCP/IP stack
+#
+# CONFIG_RT_USING_LWIP is not set
+
+#
+# AT commands
+#
+# CONFIG_RT_USING_AT is not set
+
+#
+# VBUS(Virtual Software BUS)
+#
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
+# CONFIG_PKG_USING_NANOPB is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
+# CONFIG_PKG_USING_WIZNET is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PDULIB is not set
+# CONFIG_PKG_USING_BTSTACK is not set
+# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
+# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
+# CONFIG_PKG_USING_MAVLINK is not set
+# CONFIG_PKG_USING_RAPIDJSON is not set
+# CONFIG_PKG_USING_BSAL is not set
+# CONFIG_PKG_USING_AGILE_MODBUS is not set
+# CONFIG_PKG_USING_AGILE_FTP is not set
+# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_libsodium is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
+
+#
+# language packages
+#
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+
+#
+# multimedia packages
+#
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+# CONFIG_PKG_USING_HELIX is not set
+# CONFIG_PKG_USING_AZUREGUIX is not set
+# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ULOG_FILE is not set
+# CONFIG_PKG_USING_LOGMGR is not set
+# CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_MEMORYPERF is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
+# CONFIG_PKG_USING_UMCN is not set
+# CONFIG_PKG_USING_LWRB2RTT is not set
+# CONFIG_PKG_USING_CPU_USAGE is not set
+# CONFIG_PKG_USING_GBK2UTF8 is not set
+# CONFIG_PKG_USING_VCONSOLE is not set
+# CONFIG_PKG_USING_KDB is not set
+# CONFIG_PKG_USING_WAMR is not set
+# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
+# CONFIG_PKG_USING_LWLOG is not set
+# CONFIG_PKG_USING_ANV_TRACE is not set
+# CONFIG_PKG_USING_ANV_MEMLEAK is not set
+# CONFIG_PKG_USING_ANV_TESTSUIT is not set
+# CONFIG_PKG_USING_ANV_BENCH is not set
+# CONFIG_PKG_USING_DEVMEM is not set
+
+#
+# system packages
+#
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_DFS_JFFS2 is not set
+# CONFIG_PKG_USING_DFS_UFFS is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
+
+#
+# Micrium: Micrium software products porting for RT-Thread
+#
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
+# CONFIG_PKG_USING_UC_CRC is not set
+# CONFIG_PKG_USING_UC_CLK is not set
+# CONFIG_PKG_USING_UC_COMMON is not set
+# CONFIG_PKG_USING_UC_MODBUS is not set
+# CONFIG_PKG_USING_PPOOL is not set
+# CONFIG_PKG_USING_OPENAMP is not set
+# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
+# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
+# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
+# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
+# CONFIG_PKG_USING_QFPLIB_M3 is not set
+# CONFIG_PKG_USING_LPM is not set
+# CONFIG_PKG_USING_TLSF is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_AS7341 is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+CONFIG_PKG_USING_NRFX=y
+CONFIG_PKG_NRFX_PATH="/packages/peripherals/nrfx"
+# CONFIG_PKG_USING_NRFX_V210 is not set
+CONFIG_PKG_USING_NRFX_LATEST_VERSION=y
+CONFIG_PKG_NRFX_VER="latest"
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
+# CONFIG_PKG_USING_LD3320 is not set
+# CONFIG_PKG_USING_WK2124 is not set
+# CONFIG_PKG_USING_LY68L6400 is not set
+# CONFIG_PKG_USING_DM9051 is not set
+# CONFIG_PKG_USING_SSD1306 is not set
+# CONFIG_PKG_USING_QKEY is not set
+# CONFIG_PKG_USING_RS485 is not set
+# CONFIG_PKG_USING_NES is not set
+# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
+# CONFIG_PKG_USING_VDEVICE is not set
+# CONFIG_PKG_USING_SGM706 is not set
+# CONFIG_PKG_USING_STM32WB55_SDK is not set
+# CONFIG_PKG_USING_RDA58XX is not set
+# CONFIG_PKG_USING_LIBNFC is not set
+# CONFIG_PKG_USING_MFOC is not set
+# CONFIG_PKG_USING_TMC51XX is not set
+
+#
+# AI packages
+#
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_QUEST is not set
+# CONFIG_PKG_USING_NAXOS is not set
+
+#
+# miscellaneous packages
+#
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_LZMA is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+
+#
+# entertainment: terminal games and other interesting software packages
+#
+# CONFIG_PKG_USING_THREES is not set
+# CONFIG_PKG_USING_2048 is not set
+# CONFIG_PKG_USING_SNAKE is not set
+# CONFIG_PKG_USING_TETRIS is not set
+# CONFIG_PKG_USING_DONUT is not set
+# CONFIG_PKG_USING_ACLOCK is not set
+# CONFIG_PKG_USING_LWGPS is not set
+# CONFIG_PKG_USING_STATE_MACHINE is not set
+# CONFIG_PKG_USING_MCURSES is not set
+# CONFIG_PKG_USING_COWSAY is not set
+
+#
+# Hardware Drivers Config
+#
+CONFIG_SOC_NRF51822=y
+CONFIG_SOC_NORDIC=y
+CONFIG_BSP_BOARD_MICROBIT_1_5=y
+# CONFIG_BSP_BOARD_MICROBIT_1_0 is not set
+
+#
+# On-chip Peripheral Drivers
+#
+CONFIG_BSP_USING_UART=y
+CONFIG_BSP_USING_UART0=y
+CONFIG_BSP_UART0_RX_PIN=25
+CONFIG_BSP_UART0_TX_PIN=24
+
+#
+# On-chip flash config
+#
+CONFIG_MCU_FLASH_START_ADDRESS=0x00000000
+CONFIG_MCU_FLASH_SIZE_KB=256
+CONFIG_MCU_SRAM_START_ADDRESS=0x20000000
+CONFIG_MCU_SRAM_SIZE_KB=16
+CONFIG_MCU_FLASH_PAGE_SIZE=0x1000
+CONFIG_NRFX_CLOCK_ENABLED=1
+CONFIG_NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY=7
+CONFIG_NRFX_CLOCK_CONFIG_LF_SRC=1
+CONFIG_NRFX_USING_UART=y
+CONFIG_NRFX_UART_ENABLED=1
+CONFIG_NRFX_UART0_ENABLED=1
--- a/bsp/nrf5x/nrf51822/Kconfig
+++ b/bsp/nrf5x/nrf51822/Kconfig
@ -0,0 +1,21 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "board/Kconfig"
+
--- a/bsp/nrf5x/nrf51822/README.md
+++ b/bsp/nrf5x/nrf51822/README.md
@ -0,0 +1,76 @@
+# nRF51822 BSP说明
+
+## 简介
+
+该文件夹主要存放所有主芯片为nRF51822的板级支持包。目前默认支持的开发板是[Micro:bitV1.5](https://tech.microbit.org/hardware/1-5-revision/)
+本文主要内容如下：
+
+- 开发板资源介绍
+- 进阶使用方法
+
+## 开发板介绍
+
+Microbit是BCC基于nordic的mcu nrf51822的开发板，基于ARM Cortex-M0内核，最高主频64 MHz，具有丰富的外设资源。
+
+
+
+开发板外观如下图所示
+
+![](../docs/images/microbit-overview-1-5.png)
+
+nrf51822 开发板常用 **板载资源** 如下：
+
+- MCU：NRF51822，主频 16MHz，256kB FLASH ，16kB RAM
+- MCU 外设: GPIO, UART, SPI, I2C(TWI), RTC,TIMER,PWM,ADC
+- 板载外设
+  - LED墙：25个，矩阵控制。
+  - 按键：3个，2个USER and 1个RESET 。
+  - 三轴加速度传感器:   LSM303AGR 
+  - CMSIS-DAP: KL26Z调试器
+- 调试接口：板载CMSIS-DAP 调试器。
+
+更详细的整理的资料见[nrf51822](https://github.com/supperthomas/BSP_BOARD_Nrf51822_microbit)
+
+官方主页[nrf51822](https://infocenter.nordicsemi.com/index.jsp?topic=%2Fstruct_nrf51%2Fstruct%2Fnrf51822.html)
+
+
+
+## 外设支持
+
+本 BSP 目前对外设的支持情况如下：
+
+| **片上外设** | **支持情况** | **备注** |
+| :----------- | :----------: | :------: |
+| GPIO         |    待支持    |          |
+| UART         |     支持     |  UART0   |
+|              |              |          |
+|              |              |          |
+|              |              |          |
+
+
+
+### 进阶使用
+
+此 BSP 默认只开启了串口 0 的功能，更多高级功能需要利用 env 工具对 BSP 进行配置，步骤如下：
+
+1. 在 bsp 下打开 env 工具。
+
+2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
+
+3. 输入`pkgs --update`命令更新软件包。
+
+4. 输入`scons --target=mdk5命令重新生成工程。
+
+
+
+## 支持其他开发板
+
+可以在board/Kconfig里面的`bsp choice`里面添加对应的其他开发板
+
+
+
+## 联系人信息
+
+维护人:
+
+-  [supperthomas], 邮箱：<78900636@qq.com>
--- a/bsp/nrf5x/nrf51822/SConscript
+++ b/bsp/nrf5x/nrf51822/SConscript
@ -1,3 +1,6 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
 from building import *

 cwd = GetCurrentDir()
--- a/bsp/nrf5x/nrf51822/SConstruct
+++ b/bsp/nrf5x/nrf51822/SConstruct
@ -0,0 +1,57 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+    env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+    libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+SDK_LIB = libraries_path_prefix
+Export('SDK_LIB')
+print(SDK_LIB)
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
+
+# include cmsis
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'cmsis', 'SConscript')))
+
+# make a building
+DoBuilding(TARGET, objs)
--- a/bsp/nrf5x/nrf51822/applications/SConscript
+++ b/bsp/nrf5x/nrf51822/applications/SConscript
--- a/bsp/nrf5x/nrf51822/applications/application.c
+++ b/bsp/nrf5x/nrf51822/applications/application.c
@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-04-29     supperthomas first version
+ *
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+
+int main(void)
+{
+    while (1)
+    {
+        rt_thread_mdelay(500);
+    }
+    return RT_EOK;
+}
+
--- a/bsp/nrf5x/nrf51822/board/Kconfig
+++ b/bsp/nrf5x/nrf51822/board/Kconfig
@ -0,0 +1,101 @@
+menu "Hardware Drivers Config"
+
+config SOC_NRF51822
+    bool
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+    
+config SOC_NORDIC
+    bool 
+    default y
+
+choice
+    prompt "Select BSP board "
+    default BSP_BOARD_MICROBIT_1_5
+
+    config BSP_BOARD_MICROBIT_1_5
+        bool "microbit nrf51822 v1.5"
+        
+    config BSP_BOARD_MICROBIT_1_0
+        bool "microbit nrf51822 v1.0"
+        
+endchoice
+
+menu "On-chip Peripheral Drivers"    
+    config BSP_USING_UART
+		bool "Enable UART"
+        default y
+        select RT_USING_SERIAL
+            config BSP_USING_UART0
+                bool "Enable UART0"
+                default y 
+                depends on BSP_USING_UART
+                
+                config BSP_UART0_RX_PIN
+                    depends on BSP_USING_UART0
+                    int "uart0 rx pin number"
+                    default 25 if BSP_BOARD_MICROBIT_1_5
+                    default 8 if BSP_BOARD_MICROBIT_1_0
+                config BSP_UART0_TX_PIN
+                    depends on BSP_USING_UART0
+                    int "uart0 tx pin number"
+                    default 24  if BSP_BOARD_MICROBIT_1_5
+                    default 9   if BSP_BOARD_MICROBIT_1_0
+
+    menu "On-chip flash config"
+
+        config MCU_FLASH_START_ADDRESS  
+            hex "MCU FLASH START ADDRESS"
+            default 0x00000000
+
+        config MCU_FLASH_SIZE_KB  
+            int "MCU FLASH SIZE, MAX size 1024 KB"
+            default 1024
+
+        config MCU_SRAM_START_ADDRESS 
+            hex "MCU RAM START ADDRESS"
+            default 0x20000000
+
+        config MCU_SRAM_SIZE_KB  
+            int "MCU RAM SIZE"
+            default 16
+
+        config MCU_FLASH_PAGE_SIZE 
+            hex "MCU FLASH PAGE SIZE, please not change,nrfx default is 0x1000"
+            default 0x1000
+	endmenu
+
+endmenu
+
+if SOC_NORDIC
+    config NRFX_CLOCK_ENABLED
+    int 
+    default 1
+    config    NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
+    int 
+    default 7
+    config NRFX_CLOCK_CONFIG_LF_SRC
+    int 
+    default 1    
+endif
+
+if BSP_USING_UART
+    config NRFX_USING_UART
+    bool
+    default y
+    
+    config NRFX_UART_ENABLED
+    int 
+    default 1
+    
+    config NRFX_UART0_ENABLED
+    int 
+    default 1
+    depends on BSP_USING_UART0
+endif
+
+
+endmenu
+
+
--- a/bsp/nrf5x/nrf51822/board/SConscript
+++ b/bsp/nrf5x/nrf51822/board/SConscript
@ -0,0 +1,11 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c')
+CPPPATH = [cwd]
+define = ['USE_APP_CONFIG']
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH,CPPDEFINES = define)
+Return('group')
--- a/bsp/nrf5x/nrf51822/board/board.c
+++ b/bsp/nrf5x/nrf51822/board/board.c
@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-04-29     supperthomas first version
+ *
+ */
+#include <rtthread.h>
+#include <rthw.h>
+#include <nrfx_systick.h>
+
+#include "board.h"
+#include "drv_uart.h"
+#include <nrfx_clock.h>
+
+/**
+ * This is the timer interrupt service routine.
+ *
+ */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+static void clk_event_handler(nrfx_clock_evt_type_t event){}
+
+void SysTick_Configuration(void)
+{
+    nrfx_clock_init(clk_event_handler);
+    nrfx_clock_enable();
+    nrfx_clock_lfclk_start();
+    /* Set interrupt priority */
+    NVIC_SetPriority(SysTick_IRQn, 0xf);
+
+    /* Configure SysTick to interrupt at the requested rate. */
+    nrf_systick_load_set(SystemCoreClock / RT_TICK_PER_SECOND);
+    nrf_systick_val_clear();
+    nrf_systick_csr_set(NRF_SYSTICK_CSR_CLKSOURCE_CPU | NRF_SYSTICK_CSR_TICKINT_ENABLE
+                        | NRF_SYSTICK_CSR_ENABLE);
+
+}
+
+
+void rt_hw_board_init(void)
+{
+    rt_hw_interrupt_enable(0);
+
+    SysTick_Configuration();
+
+#if defined(RT_USING_HEAP)
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
+#endif
+
+#ifdef RT_USING_SERIAL
+    rt_hw_uart_init();
+#endif
+
+#ifdef RT_USING_CONSOLE
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+
+#ifdef BSP_USING_SOFTDEVICE
+    extern uint32_t  Image$$RW_IRAM1$$Base;
+    uint32_t const *const m_ram_start  = &Image$$RW_IRAM1$$Base;
+    if ((uint32_t)m_ram_start == 0x20000000)
+    {
+        rt_kprintf("\r\n using softdevice the RAM couldn't be %p,please use the templete from package\r\n", m_ram_start);
+        while (1);
+    }
+    else
+    {
+        rt_kprintf("\r\n using softdevice the RAM at %p\r\n", m_ram_start);
+    }
+#endif
+
+}
+
--- a/bsp/nrf5x/nrf51822/board/board.h
+++ b/bsp/nrf5x/nrf51822/board/board.h
@ -0,0 +1,30 @@
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#include <rtthread.h>
+#include <rthw.h>
+#include "nrf.h"
+
+#define MCU_FLASH_SIZE MCU_FLASH_SIZE_KB*1024
+#define MCU_FLASH_END_ADDRESS        ((uint32_t)(MCU_FLASH_START_ADDRESS + MCU_FLASH_SIZE))
+#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
+#define MCU_SRAM_END_ADDRESS        (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
+
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
+#else
+extern int __bss_end__;
+#define HEAP_BEGIN      ((void *)&__bss_end__)
+#endif
+
+
+#define HEAP_END       (MCU_SRAM_END_ADDRESS)
+
+void rt_hw_board_init(void);
+
+#endif
+
--- a/bsp/nrf5x/nrf51822/board/linker_scripts/link.lds
+++ b/bsp/nrf5x/nrf51822/board/linker_scripts/link.lds
@ -0,0 +1,15 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x40000
+  RAM (rwx) :  ORIGIN = 0x20000000, LENGTH = 0x4000
+}
+
+INCLUDE "packages/nrfx-v2.1.0/mdk/nrf_common.ld"
+
+
+
--- a/bsp/nrf5x/nrf51822/board/linker_scripts/link.sct
+++ b/bsp/nrf5x/nrf51822/board/linker_scripts/link.sct
@ -0,0 +1,15 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x00000000 0x40000  {    ; load region size_region
+  ER_IROM1 0x00000000 0x40000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+  RW_IRAM1 0x20000000 0x4000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+}
+
--- a/bsp/nrf5x/nrf51822/board/nrfx_config.h
+++ b/bsp/nrf5x/nrf51822/board/nrfx_config.h
@ -0,0 +1,47 @@
+/**
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef NRFX_CONFIG_H__
+#define NRFX_CONFIG_H__
+
+// TODO - temporary redirection
+#include <sdk_config.h>
+
+#endif // NRFX_CONFIG_H__
--- a/bsp/nrf5x/nrf51822/board/nrfx_glue.h
+++ b/bsp/nrf5x/nrf51822/board/nrfx_glue.h
@ -0,0 +1,269 @@
+/*
+ * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_GLUE_H__
+#define NRFX_GLUE_H__
+
+// THIS IS A TEMPLATE FILE.
+// It should be copied to a suitable location within the host environment into
+// which nrfx is integrated, and the following macros should be provided with
+// appropriate implementations.
+// And this comment should be removed from the customized file.
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include <stdbool.h>
+#include "nrf.h"
+/**
+ * @defgroup nrfx_glue nrfx_glue.h
+ * @{
+ * @ingroup nrfx
+ *
+ * @brief This file contains macros that should be implemented according to
+ *        the needs of the host environment into which @em nrfx is integrated.
+ */
+
+// Uncomment this line to use the standard MDK way of binding IRQ handlers
+// at linking time.
+#include <soc/nrfx_irqs.h>
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief Macro for placing a runtime assertion.
+ *
+ * @param expression Expression to be evaluated.
+ */
+#define NRFX_ASSERT(expression)
+
+/**
+ * @brief Macro for placing a compile time assertion.
+ *
+ * @param expression Expression to be evaluated.
+ */
+#define NRFX_STATIC_ASSERT(expression)
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief Macro for setting the priority of a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ * @param priority   Priority to be set.
+ */
+#define NRFX_IRQ_PRIORITY_SET(irq_number, priority)     NVIC_SetPriority(irq_number, priority)
+
+/**
+ * @brief Macro for enabling a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_ENABLE(irq_number)     NVIC_EnableIRQ(irq_number)
+
+/**
+ * @brief Macro for checking if a specific IRQ is enabled.
+ *
+ * @param irq_number IRQ number.
+ *
+ * @retval true  If the IRQ is enabled.
+ * @retval false Otherwise.
+ */
+#define NRFX_IRQ_IS_ENABLED(irq_number)  _NRFX_IRQ_IS_ENABLED(irq_number)
+static inline bool _NRFX_IRQ_IS_ENABLED(IRQn_Type irq_number)
+{
+    return 0 != (NVIC->ISER[irq_number / 32] & (1UL << (irq_number % 32)));
+}
+
+
+/**
+ * @brief Macro for disabling a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_DISABLE(irq_number)  _NRFX_IRQ_DISABLE(irq_number)
+static inline void _NRFX_IRQ_DISABLE(IRQn_Type irq_number)
+{
+    NVIC_DisableIRQ(irq_number);
+}
+
+
+/**
+ * @brief Macro for setting a specific IRQ as pending.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_PENDING_SET(irq_number)
+
+/**
+ * @brief Macro for clearing the pending status of a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_PENDING_CLEAR(irq_number)
+
+/**
+ * @brief Macro for checking the pending status of a specific IRQ.
+ *
+ * @retval true  If the IRQ is pending.
+ * @retval false Otherwise.
+ */
+#define NRFX_IRQ_IS_PENDING(irq_number)
+
+/** @brief Macro for entering into a critical section. */
+#define NRFX_CRITICAL_SECTION_ENTER()
+
+/** @brief Macro for exiting from a critical section. */
+#define NRFX_CRITICAL_SECTION_EXIT()
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief When set to a non-zero value, this macro specifies that
+ *        @ref nrfx_coredep_delay_us uses a precise DWT-based solution.
+ *        A compilation error is generated if the DWT unit is not present
+ *        in the SoC used.
+ */
+#define NRFX_DELAY_DWT_BASED    0
+
+/**
+ * @brief Macro for delaying the code execution for at least the specified time.
+ *
+ * @param us_time Number of microseconds to wait.
+ */
+#define NRFX_DELAY_US(us_time)
+
+//------------------------------------------------------------------------------
+
+/** @brief Atomic 32-bit unsigned type. */
+#define nrfx_atomic_t
+
+/**
+ * @brief Macro for storing a value to an atomic object and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value to store.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_STORE(p_data, value)
+
+/**
+ * @brief Macro for running a bitwise OR operation on an atomic object and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the OR operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_OR(p_data, value)
+
+/**
+ * @brief Macro for running a bitwise AND operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the AND operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_AND(p_data, value)
+
+/**
+ * @brief Macro for running a bitwise XOR operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the XOR operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_XOR(p_data, value)
+
+/**
+ * @brief Macro for running an addition operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the ADD operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_ADD(p_data, value)
+
+/**
+ * @brief Macro for running a subtraction operation on an atomic object
+ *        and returning its previous value.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value  Value of the second operand in the SUB operation.
+ *
+ * @return Previous value of the atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_SUB(p_data, value)
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief When set to a non-zero value, this macro specifies that the
+ *        @ref nrfx_error_codes and the @ref nrfx_err_t type itself are defined
+ *        in a customized way and the default definitions from @c <nrfx_error.h>
+ *        should not be used.
+ */
+#define NRFX_CUSTOM_ERROR_CODES 0
+
+//------------------------------------------------------------------------------
+
+/** @brief Bitmask that defines DPPI channels that are reserved for use outside of the nrfx library. */
+#define NRFX_DPPI_CHANNELS_USED  0
+
+/** @brief Bitmask that defines DPPI groups that are reserved for use outside of the nrfx library. */
+#define NRFX_DPPI_GROUPS_USED    0
+
+/** @brief Bitmask that defines PPI channels that are reserved for use outside of the nrfx library. */
+#define NRFX_PPI_CHANNELS_USED  0
+
+/** @brief Bitmask that defines PPI groups that are reserved for use outside of the nrfx library. */
+#define NRFX_PPI_GROUPS_USED    0
+
+/** @brief Bitmask that defines EGU instances that are reserved for use outside of the nrfx library. */
+#define NRFX_EGUS_USED          0
+
+/** @brief Bitmask that defines TIMER instances that are reserved for use outside of the nrfx library. */
+#define NRFX_TIMERS_USED        0
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRFX_GLUE_H__
--- a/bsp/nrf5x/nrf51822/board/nrfx_log.h
+++ b/bsp/nrf5x/nrf51822/board/nrfx_log.h
@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_LOG_H__
+#define NRFX_LOG_H__
+
+// THIS IS A TEMPLATE FILE.
+// It should be copied to a suitable location within the host environment into
+// which nrfx is integrated, and the following macros should be provided with
+// appropriate implementations.
+// And this comment should be removed from the customized file.
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrfx_log nrfx_log.h
+ * @{
+ * @ingroup nrfx
+ *
+ * @brief This file contains macros that should be implemented according to
+ *        the needs of the host environment into which @em nrfx is integrated.
+ */
+
+/**
+ * @brief Macro for logging a message with the severity level ERROR.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_ERROR(format, ...)
+
+/**
+ * @brief Macro for logging a message with the severity level WARNING.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_WARNING(format, ...)
+
+/**
+ * @brief Macro for logging a message with the severity level INFO.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_INFO(format, ...)
+
+/**
+ * @brief Macro for logging a message with the severity level DEBUG.
+ *
+ * @param format printf-style format string, optionally followed by arguments
+ *               to be formatted and inserted in the resulting string.
+ */
+#define NRFX_LOG_DEBUG(format, ...)
+
+
+/**
+ * @brief Macro for logging a memory dump with the severity level ERROR.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_ERROR(p_memory, length)
+
+/**
+ * @brief Macro for logging a memory dump with the severity level WARNING.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_WARNING(p_memory, length)
+
+/**
+ * @brief Macro for logging a memory dump with the severity level INFO.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_INFO(p_memory, length)
+
+/**
+ * @brief Macro for logging a memory dump with the severity level DEBUG.
+ *
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length   Length of the memory region in bytes.
+ */
+#define NRFX_LOG_HEXDUMP_DEBUG(p_memory, length)
+
+
+/**
+ * @brief Macro for getting the textual representation of a given error code.
+ *
+ * @param[in] error_code Error code.
+ *
+ * @return String containing the textual representation of the error code.
+ */
+#define NRFX_LOG_ERROR_STRING_GET(error_code)
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRFX_LOG_H__
--- a/bsp/nrf5x/nrf51822/board/sdk_config.h
+++ b/bsp/nrf5x/nrf51822/board/sdk_config.h
--- a/bsp/nrf5x/nrf51822/project.uvoptx
+++ b/bsp/nrf5x/nrf51822/project.uvoptx
--- a/bsp/nrf5x/nrf51822/project.uvprojx
+++ b/bsp/nrf5x/nrf51822/project.uvprojx
@ -7,23 +7,23 @@

  <Targets>
    <Target>
-      <TargetName>RT-Thread STM32</TargetName>
+      <TargetName>rtthread</TargetName>
      <ToolsetNumber>0x4</ToolsetNumber>
      <ToolsetName>ARM-ADS</ToolsetName>
      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
      <uAC6>0</uAC6>
      <TargetOption>
        <TargetCommonOption>
-          <Device>STM32F207VG</Device>
-          <Vendor>STMicroelectronics</Vendor>
-          <PackID>Keil.STM32F2xx_DFP.2.9.0</PackID>
-          <PackURL>http://www.keil.com/pack</PackURL>
-          <Cpu>IROM(0x08000000,0x100000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
+          <Device>nRF51822_xxAA</Device>
+          <Vendor>Nordic Semiconductor</Vendor>
+          <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.38.0</PackID>
+          <PackURL>http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/</PackURL>
+          <Cpu>IRAM(0x20000000,0x00004000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ELITTLE</Cpu>
          <FlashUtilSpec></FlashUtilSpec>
          <StartupFile></StartupFile>
-          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207VGTx$CMSIS\Flash\STM32F2xx_1024.FLM))</FlashDriverDll>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN1 -FF0nrf51xxx -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm))</FlashDriverDll>
          <DeviceId>0</DeviceId>
-          <RegisterFile>$$Device:STM32F207VGTx$Drivers\CMSIS\Device\ST\STM32F2xx\Include\stm32f2xx.h</RegisterFile>
+          <RegisterFile>$$Device:nRF51822_xxAA$Device\Include\nrf.h</RegisterFile>
          <MemoryEnv></MemoryEnv>
          <Cmp></Cmp>
          <Asm></Asm>
@ -33,14 +33,14 @@
          <SLE66CMisc></SLE66CMisc>
          <SLE66AMisc></SLE66AMisc>
          <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:STM32F207VGTx$CMSIS\SVD\STM32F20x.svd</SFDFile>
+          <SFDFile>$$Device:nRF51822_xxAA$SVD\nrf51.svd</SFDFile>
          <bCustSvd>0</bCustSvd>
          <UseEnv>0</UseEnv>
          <BinPath></BinPath>
          <IncludePath></IncludePath>
          <LibPath></LibPath>
-          <RegisterFilePath>ST\STM32F2xx\</RegisterFilePath>
-          <DBRegisterFilePath>ST\STM32F2xx\</DBRegisterFilePath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
          <TargetStatus>
            <Error>0</Error>
            <ExitCodeStop>0</ExitCodeStop>
@ -49,7 +49,7 @@
            <InvalidFlash>1</InvalidFlash>
          </TargetStatus>
          <OutputDirectory>.\build\</OutputDirectory>
-          <OutputName>rtthread-stm32</OutputName>
+          <OutputName>rtthread</OutputName>
          <CreateExecutable>1</CreateExecutable>
          <CreateLib>0</CreateLib>
          <CreateHexFile>0</CreateHexFile>
@ -110,13 +110,13 @@
        </CommonProperty>
        <DllOption>
          <SimDllName>SARMCM3.DLL</SimDllName>
-          <SimDllArguments>-MPU</SimDllArguments>
-          <SimDlgDll>DARMSTM.DLL</SimDlgDll>
-          <SimDlgDllArguments>-pSTM32F207VG</SimDlgDllArguments>
+          <SimDllArguments>  </SimDllArguments>
+          <SimDlgDll>DARMCM1.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
          <TargetDllName>SARMCM3.DLL</TargetDllName>
-          <TargetDllArguments>-MPU</TargetDllArguments>
-          <TargetDlgDll>TARMSTM.DLL</TargetDlgDll>
-          <TargetDlgDllArguments>-pSTM32F207VG</TargetDlgDllArguments>
+          <TargetDllArguments> </TargetDllArguments>
+          <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
        </DllOption>
        <DebugOption>
          <OPTHX>
@ -134,11 +134,11 @@
            <RunIndependent>0</RunIndependent>
            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
            <Capability>1</Capability>
-            <DriverSelection>4099</DriverSelection>
+            <DriverSelection>4096</DriverSelection>
          </Flash1>
          <bUseTDR>1</bUseTDR>
-          <Flash2>Segger\JL2CM3.dll</Flash2>
-          <Flash3>"" ()</Flash3>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3></Flash3>
          <Flash4></Flash4>
          <pFcarmOut></pFcarmOut>
          <pFcarmGrp></pFcarmGrp>
@ -174,7 +174,7 @@
            <AdsLsxf>1</AdsLsxf>
            <RvctClst>0</RvctClst>
            <GenPPlst>0</GenPPlst>
-            <AdsCpuType>"Cortex-M3"</AdsCpuType>
+            <AdsCpuType>"Cortex-M0"</AdsCpuType>
            <RvctDeviceName></RvctDeviceName>
            <mOS>0</mOS>
            <uocRom>0</uocRom>
@ -184,6 +184,7 @@
            <hadXRAM>0</hadXRAM>
            <uocXRam>0</uocXRam>
            <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
            <hadIRAM2>0</hadIRAM2>
            <hadIROM2>0</hadIROM2>
            <StupSel>8</StupSel>
@ -244,12 +245,12 @@
              <IRAM>
                <Type>0</Type>
                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
+                <Size>0x4000</Size>
              </IRAM>
              <IROM>
                <Type>1</Type>
-                <StartAddress>0x8000000</StartAddress>
-                <Size>0x100000</Size>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
              </IROM>
              <XRAM>
                <Type>0</Type>
@ -273,8 +274,8 @@
              </OCR_RVCT3>
              <OCR_RVCT4>
                <Type>1</Type>
-                <StartAddress>0x8000000</StartAddress>
-                <Size>0x100000</Size>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
              </OCR_RVCT4>
              <OCR_RVCT5>
                <Type>1</Type>
@ -299,7 +300,7 @@
              <OCR_RVCT9>
                <Type>0</Type>
                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
+                <Size>0x4000</Size>
              </OCR_RVCT9>
              <OCR_RVCT10>
                <Type>0</Type>
@ -320,7 +321,7 @@
            <PlainCh>0</PlainCh>
            <Ropi>0</Ropi>
            <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>2</wLevel>
            <uThumb>0</uThumb>
            <uSurpInc>0</uSurpInc>
            <uC99>1</uC99>
@ -334,10 +335,10 @@
            <v6WtE>0</v6WtE>
            <v6Rtti>0</v6Rtti>
            <VariousControls>
-              <MiscControls></MiscControls>
-              <Define>USE_STDPERIPH_DRIVER, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define>
+              <MiscControls>--reduce_paths</MiscControls>
+              <Define>NRF51822_XXAA, USE_APP_CONFIG, __RTTHREAD__</Define>
              <Undefine></Undefine>
-              <IncludePath>applications;.;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;Drivers;..\..\components\finsh;.;..\..\include;..\..\components\libc\compilers\common;Libraries\STM32F2xx_StdPeriph_Driver\inc;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F2xx;Libraries\CMSIS\CM3\CoreSupport;Libraries\CMSIS\Include</IncludePath>
+              <IncludePath>applications;.;..\libraries\cmsis\include;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m0;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\drivers;..\..\..\components\finsh;.;..\..\..\include;packages\nrfx-latest;packages\nrfx-latest\drivers;packages\nrfx-latest\drivers\include;packages\nrfx-latest\mdk;packages\nrfx-latest\hal</IncludePath>
            </VariousControls>
          </Cads>
          <Aads>
@ -352,23 +353,23 @@
            <useXO>0</useXO>
            <uClangAs>0</uClangAs>
            <VariousControls>
-              <MiscControls></MiscControls>
+              <MiscControls>--cpreproc_opts=-DBLE_STACK_SUPPORT_REQD,-DNRF_SD_BLE_API_VERSION=4,-DS132,-DSOFTDEVICE_PRESENT,-DSWI_DISABLE0,-DCONFIG_GPIO_AS_PINRESET,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_12,-DNRF52_PAN_15,-DNRF52_PAN_20,-DNRF52_PAN_31,-DNRF52_PAN_36,-DNRF52_PAN_51,-DNRF52_PAN_54,-DNRF52_PAN_55,-DNRF52_PAN_58,-DNRF52_PAN_64,-DNRF52_PAN_74</MiscControls>
              <Define></Define>
              <Undefine></Undefine>
              <IncludePath></IncludePath>
            </VariousControls>
          </Aads>
          <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
            <Ropi>0</Ropi>
            <Rwpi>0</Rwpi>
            <noStLib>0</noStLib>
            <RepFail>1</RepFail>
            <useFile>0</useFile>
-            <TextAddressRange>0x08000000</TextAddressRange>
+            <TextAddressRange>0x00000000</TextAddressRange>
            <DataAddressRange>0x20000000</DataAddressRange>
            <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
            <IncludeLibs></IncludeLibs>
            <IncludeLibsPath></IncludeLibsPath>
            <Misc></Misc>
@ -381,11 +382,6 @@
        <Group>
          <GroupName>Applications</GroupName>
          <Files>
-            <File>
-              <FileName>startup.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>applications\startup.c</FilePath>
-            </File>
            <File>
              <FileName>application.c</FileName>
              <FileType>1</FileType>
@ -396,30 +392,30 @@
        <Group>
          <GroupName>CPU</GroupName>
          <Files>
-            <File>
-              <FileName>div0.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
-            </File>
            <File>
              <FileName>backtrace.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
+              <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
            </File>
            <File>
              <FileName>showmem.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
+              <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
+            </File>
+            <File>
+              <FileName>div0.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
            </File>
            <File>
              <FileName>context_rvds.S</FileName>
              <FileType>2</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
+              <FilePath>..\..\..\libcpu\arm\cortex-m0\context_rvds.S</FilePath>
            </File>
            <File>
              <FileName>cpuport.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
+              <FilePath>..\..\..\libcpu\arm\cortex-m0\cpuport.c</FilePath>
            </File>
          </Files>
        </Group>
@ -429,47 +425,47 @@
            <File>
              <FileName>pin.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\misc\pin.c</FilePath>
+              <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
            </File>
            <File>
-              <FileName>rtc.c</FileName>
+              <FileName>serial.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\rtc\rtc.c</FilePath>
+              <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
            </File>
            <File>
              <FileName>waitqueue.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\waitqueue.c</FilePath>
-            </File>
-            <File>
-              <FileName>dataqueue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
-            </File>
-            <File>
-              <FileName>pipe.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\pipe.c</FilePath>
-            </File>
-            <File>
-              <FileName>ringbuffer.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
-            </File>
-            <File>
-              <FileName>ringblk_buf.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath>
+              <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath>
            </File>
            <File>
              <FileName>workqueue.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
+              <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath>
+            </File>
+            <File>
+              <FileName>ringbuffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>dataqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath>
+            </File>
+            <File>
+              <FileName>pipe.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath>
+            </File>
+            <File>
+              <FileName>ringblk_buf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath>
            </File>
            <File>
              <FileName>completion.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\completion.c</FilePath>
+              <FilePath>..\..\..\components\drivers\src\completion.c</FilePath>
            </File>
          </Files>
        </Group>
@ -479,112 +475,32 @@
            <File>
              <FileName>board.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Drivers\board.c</FilePath>
+              <FilePath>board\board.c</FilePath>
            </File>
            <File>
-              <FileName>serial.c</FileName>
+              <FileName>drv_uart.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Drivers\serial.c</FilePath>
-            </File>
-            <File>
-              <FileName>stm32f2xx_it.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Drivers\stm32f2xx_it.c</FilePath>
-            </File>
-            <File>
-              <FileName>drv_rtc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Drivers\drv_rtc.c</FilePath>
-            </File>
-            <File>
-              <FileName>FM25Lx.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Drivers\FM25Lx.c</FilePath>
-            </File>
-            <File>
-              <FileName>usart.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Drivers\usart.c</FilePath>
-            </File>
-            <File>
-              <FileName>i2c.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Drivers\i2c.c</FilePath>
-            </File>
-            <File>
-              <FileName>24LCxx.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Drivers\24LCxx.c</FilePath>
+              <FilePath>..\libraries\drivers\drv_uart.c</FilePath>
            </File>
          </Files>
        </Group>
        <Group>
          <GroupName>finsh</GroupName>
          <Files>
-            <File>
-              <FileName>finsh_node.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_node.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_parser.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
-            </File>
-            <File>
-              <FileName>cmd.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\cmd.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_vm.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
-            </File>
            <File>
              <FileName>shell.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\shell.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_token.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_token.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_var.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_var.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_compiler.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_heap.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_ops.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_error.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_error.c</FilePath>
+              <FilePath>..\..\..\components\finsh\shell.c</FilePath>
            </File>
            <File>
              <FileName>msh.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\msh.c</FilePath>
+              <FilePath>..\..\..\components\finsh\msh.c</FilePath>
            </File>
            <File>
-              <FileName>finsh_init.c</FileName>
+              <FileName>cmd.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_init.c</FilePath>
+              <FilePath>..\..\..\components\finsh\cmd.c</FilePath>
            </File>
          </Files>
        </Group>
@ -594,247 +510,257 @@
            <File>
              <FileName>thread.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\src\thread.c</FilePath>
-            </File>
-            <File>
-              <FileName>object.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\object.c</FilePath>
-            </File>
-            <File>
-              <FileName>clock.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\clock.c</FilePath>
-            </File>
-            <File>
-              <FileName>device.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\device.c</FilePath>
-            </File>
-            <File>
-              <FileName>ipc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\ipc.c</FilePath>
-            </File>
-            <File>
-              <FileName>timer.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\timer.c</FilePath>
-            </File>
-            <File>
-              <FileName>kservice.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\kservice.c</FilePath>
-            </File>
-            <File>
-              <FileName>irq.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\irq.c</FilePath>
-            </File>
-            <File>
-              <FileName>idle.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\idle.c</FilePath>
-            </File>
-            <File>
-              <FileName>mempool.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\mempool.c</FilePath>
-            </File>
-            <File>
-              <FileName>components.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\components.c</FilePath>
-            </File>
-            <File>
-              <FileName>mem.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\mem.c</FilePath>
+              <FilePath>..\..\..\src\thread.c</FilePath>
            </File>
            <File>
              <FileName>scheduler.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\src\scheduler.c</FilePath>
+              <FilePath>..\..\..\src\scheduler.c</FilePath>
+            </File>
+            <File>
+              <FileName>mem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\mem.c</FilePath>
+            </File>
+            <File>
+              <FileName>mempool.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\mempool.c</FilePath>
+            </File>
+            <File>
+              <FileName>clock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\clock.c</FilePath>
+            </File>
+            <File>
+              <FileName>timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\timer.c</FilePath>
+            </File>
+            <File>
+              <FileName>idle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\idle.c</FilePath>
+            </File>
+            <File>
+              <FileName>kservice.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\kservice.c</FilePath>
+            </File>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\components.c</FilePath>
+            </File>
+            <File>
+              <FileName>irq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\irq.c</FilePath>
+            </File>
+            <File>
+              <FileName>device.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\device.c</FilePath>
+            </File>
+            <File>
+              <FileName>object.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\object.c</FilePath>
+            </File>
+            <File>
+              <FileName>ipc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\ipc.c</FilePath>
            </File>
          </Files>
        </Group>
        <Group>
-          <GroupName>libc</GroupName>
+          <GroupName>nrfx</GroupName>
          <Files>
            <File>
-              <FileName>time.c</FileName>
+              <FileName>nrfx_timer.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\components\libc\compilers\common\time.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>Libraries</GroupName>
-          <Files>
-            <File>
-              <FileName>stm32f2xx_dcmi.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_dcmi.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_timer.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_wwdg.c</FileName>
+              <FileName>nrfx_nfct.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_wwdg.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_nfct.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_rng.c</FileName>
+              <FileName>nrfx_systick.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_rng.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_systick.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_hash_sha1.c</FileName>
+              <FileName>nrfx_wdt.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_hash_sha1.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_wdt.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_hash.c</FileName>
+              <FileName>nrfx_gpiote.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_hash.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_gpiote.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_pwr.c</FileName>
+              <FileName>nrfx_spis.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_pwr.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_spis.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_cryp.c</FileName>
+              <FileName>nrfx_ipc.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_cryp.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_ipc.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_fsmc.c</FileName>
+              <FileName>nrfx_rng.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_fsmc.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_rng.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_hash_md5.c</FileName>
+              <FileName>nrfx_qspi.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_hash_md5.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_qspi.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_rcc.c</FileName>
+              <FileName>nrfx_spi.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_rcc.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_spi.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_exti.c</FileName>
+              <FileName>nrfx_rtc.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_exti.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_rtc.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_rtc.c</FileName>
+              <FileName>system_nrf51.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_rtc.c</FilePath>
+              <FilePath>packages\nrfx-latest\mdk\system_nrf51.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_cryp_tdes.c</FileName>
+              <FileName>nrfx_qdec.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_cryp_tdes.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_qdec.c</FilePath>
            </File>
            <File>
-              <FileName>system_stm32f2xx.c</FileName>
+              <FileName>nrfx_twim.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F2xx\system_stm32f2xx.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_twim.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_tim.c</FileName>
+              <FileName>nrfx_clock.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_tim.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_clock.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_spi.c</FileName>
+              <FileName>nrfx_pdm.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_spi.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_pdm.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_cryp_des.c</FileName>
+              <FileName>nrfx_uarte.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_cryp_des.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_uarte.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_usart.c</FileName>
+              <FileName>nrfx_adc.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_usart.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_adc.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_crc.c</FileName>
+              <FileName>nrfx_ppi.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_crc.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_ppi.c</FilePath>
            </File>
            <File>
-              <FileName>misc.c</FileName>
+              <FileName>nrfx_uart.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\misc.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_uart.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_can.c</FileName>
+              <FileName>nrfx_saadc.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_can.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_saadc.c</FilePath>
            </File>
            <File>
-              <FileName>startup_stm32f2xx.s</FileName>
+              <FileName>nrfx_usbd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_usbd.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_i2s.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_i2s.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_startup_nrf51.s</FileName>
              <FileType>2</FileType>
-              <FilePath>Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F2xx\startup\arm\startup_stm32f2xx.s</FilePath>
+              <FilePath>packages\nrfx-latest\mdk\arm_startup_nrf51.s</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_flash.c</FileName>
+              <FileName>nrfx_twis.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_flash.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_twis.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_gpio.c</FileName>
+              <FileName>nrfx_egu.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_gpio.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_egu.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_dac.c</FileName>
+              <FileName>nrfx_lpcomp.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_dac.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_lpcomp.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_dma.c</FileName>
+              <FileName>nrfx_power.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_dma.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_power.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_sdio.c</FileName>
+              <FileName>nrfx_usbreg.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_sdio.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_usbreg.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_cryp_aes.c</FileName>
+              <FileName>nrfx_nvmc.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_cryp_aes.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_nvmc.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_dbgmcu.c</FileName>
+              <FileName>nrfx_spim.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_dbgmcu.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_spim.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_syscfg.c</FileName>
+              <FileName>nrfx_twi_twim.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_syscfg.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_twi_twim.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_iwdg.c</FileName>
+              <FileName>nrfx_pwm.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_iwdg.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_pwm.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_i2c.c</FileName>
+              <FileName>nrfx_twi.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_i2c.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_twi.c</FilePath>
            </File>
            <File>
-              <FileName>stm32f2xx_adc.c</FileName>
+              <FileName>nrfx_dppi.c</FileName>
              <FileType>1</FileType>
-              <FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_adc.c</FilePath>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_dppi.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_comp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_comp.c</FilePath>
+            </File>
+            <File>
+              <FileName>nrfx_temp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>packages\nrfx-latest\drivers\src\nrfx_temp.c</FilePath>
            </File>
          </Files>
        </Group>
--- a/bsp/nrf5x/nrf51822/rtconfig.h
+++ b/bsp/nrf5x/nrf51822/rtconfig.h
@ -0,0 +1,190 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Configuration */
+
+/* RT-Thread Kernel */
+
+#define RT_NAME_MAX 8
+#define RT_ALIGN_SIZE 4
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 100
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
+#define RT_IDLE_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 256
+#define RT_USING_TIMER_SOFT
+#define RT_TIMER_THREAD_PRIO 4
+#define RT_TIMER_THREAD_STACK_SIZE 512
+
+/* kservice optimization */
+
+#define RT_DEBUG
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_SMALL_MEM
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart0"
+#define RT_VER_NUM 0x40003
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
+
+/* C++ features */
+
+
+/* Command shell */
+
+#define RT_USING_FINSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 4096
+#define FINSH_CMD_SIZE 80
+#define FINSH_USING_MSH
+#define FINSH_USING_MSH_DEFAULT
+#define FINSH_USING_MSH_ONLY
+#define FINSH_ARG_MAX 10
+
+/* Device virtual file system */
+
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
+#define RT_USING_SERIAL
+#define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_PIN
+
+/* Using USB */
+
+
+/* POSIX layer and C standard library */
+
+
+/* Network */
+
+/* Socket abstraction layer */
+
+
+/* Network interface device */
+
+
+/* light weight TCP/IP stack */
+
+
+/* AT commands */
+
+
+/* VBUS(Virtual Software BUS) */
+
+
+/* Utilities */
+
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+
+/* Wiced WiFi */
+
+
+/* IoT Cloud */
+
+
+/* security packages */
+
+
+/* language packages */
+
+
+/* multimedia packages */
+
+
+/* tools packages */
+
+
+/* system packages */
+
+
+/* Micrium: Micrium software products porting for RT-Thread */
+
+
+/* peripheral libraries and drivers */
+
+#define PKG_USING_NRFX
+#define PKG_USING_NRFX_LATEST_VERSION
+
+/* AI packages */
+
+
+/* miscellaneous packages */
+
+
+/* samples: kernel and components samples */
+
+
+/* entertainment: terminal games and other interesting software packages */
+
+
+/* Hardware Drivers Config */
+
+#define SOC_NRF51822
+#define SOC_NORDIC
+#define BSP_BOARD_MICROBIT_1_5
+
+/* On-chip Peripheral Drivers */
+
+#define BSP_USING_UART
+#define BSP_USING_UART0
+#define BSP_UART0_RX_PIN 25
+#define BSP_UART0_TX_PIN 24
+
+/* On-chip flash config */
+
+#define MCU_FLASH_START_ADDRESS 0x00000000
+#define MCU_FLASH_SIZE_KB 256
+#define MCU_SRAM_START_ADDRESS 0x20000000
+#define MCU_SRAM_SIZE_KB 16
+#define MCU_FLASH_PAGE_SIZE 0x1000
+#define NRFX_CLOCK_ENABLED 1
+#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#define NRFX_CLOCK_CONFIG_LF_SRC 1
+#define NRFX_USING_UART
+#define NRFX_UART_ENABLED 1
+#define NRFX_UART0_ENABLED 1
+
+#endif
--- a/bsp/nrf5x/nrf51822/rtconfig.py
+++ b/bsp/nrf5x/nrf51822/rtconfig.py
@ -0,0 +1,92 @@
+import os
+
+# toolchains options
+ARCH='arm'
+CPU='cortex-m0'
+CROSS_TOOL='keil'
+
+if os.getenv('RTT_CC'):
+    CROSS_TOOL = os.getenv('RTT_CC')
+
+# cross_tool provides the cross compiler
+# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
+
+if  CROSS_TOOL == 'gcc':
+    PLATFORM    = 'gcc'
+    EXEC_PATH   = 'D:/SourceryGCC/bin'
+elif CROSS_TOOL == 'keil':
+    PLATFORM    = 'armcc'
+    EXEC_PATH   = 'C:/Keil_v5'
+elif CROSS_TOOL == 'iar':
+    print('================ERROR============================')
+    print('Not support iar yet!')
+    print('=================================================')
+    exit(0)
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'debug'
+
+if PLATFORM == 'gcc':
+    # toolchains
+    PREFIX = 'arm-none-eabi-'
+    CC = PREFIX + 'gcc'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+
+    DEVICE = ' -mcpu='+CPU + ' -mthumb -ffunction-sections -fdata-sections'
+    CFLAGS = DEVICE
+    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
+
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -gdwarf-2'
+        AFLAGS += ' -gdwarf-2'
+    else:
+        CFLAGS += ' -O2'
+
+    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+
+elif PLATFORM == 'armcc':
+    # toolchains
+    CC = 'armcc'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --device DARMSTM'
+    CFLAGS = DEVICE + ' --apcs=interwork'
+    AFLAGS = DEVICE
+    LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread.map --scatter "board\linker_scripts\link.sct"'
+
+    CFLAGS += ' --c99'
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
+    LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
+
+    EXEC_PATH += '/arm/bin40/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O0'
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+
+    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+
+def dist_handle(BSP_ROOT, dist_dir):
+    import sys
+    cwd_path = os.getcwd()
+    sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
+    from sdk_dist import dist_do_building
+    dist_do_building(BSP_ROOT, dist_dir)
--- a/bsp/nrf5x/libraries/templates/nrf52x/template.uvoptx
+++ b/bsp/nrf5x/libraries/templates/nrf52x/template.uvoptx
@ -119,13 +119,13 @@
      <TargetDriverDllRegistry>
        <SetRegEntry>
          <Number>0</Number>
-          <Key>JL2CM3</Key>
-          <Name>-U59401765 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000 -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC4000 -FD20000000 -FF0nrf51xxx -FL0200000 -FS00 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm)</Name>
        </SetRegEntry>
        <SetRegEntry>
          <Number>0</Number>
-          <Key>UL2CM3</Key>
-          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm))</Name>
+          <Key>JL2CM3</Key>
+          <Name>-U17935099 -O78 -S8 -ZTIFSpeedSel50000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC4000 -FN1 -FF0nrf51xxx -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm)</Name>
        </SetRegEntry>
      </TargetDriverDllRegistry>
      <Breakpoint/>
@ -171,6 +171,13 @@
      <pszMrulep></pszMrulep>
      <pSingCmdsp></pSingCmdsp>
      <pMultCmdsp></pMultCmdsp>
+      <DebugDescription>
+        <Enable>1</Enable>
+        <EnableFlashSeq>1</EnableFlashSeq>
+        <EnableLog>0</EnableLog>
+        <Protocol>2</Protocol>
+        <DbgClock>10000000</DbgClock>
+      </DebugDescription>
    </TargetOption>
  </Target>

--- a/bsp/nrf5x/nrf51822/template.uvprojx
+++ b/bsp/nrf5x/nrf51822/template.uvprojx
@ -0,0 +1,390 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>rtthread</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>nRF51822_xxAA</Device>
+          <Vendor>Nordic Semiconductor</Vendor>
+          <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.38.0</PackID>
+          <PackURL>http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/</PackURL>
+          <Cpu>IRAM(0x20000000,0x00004000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ELITTLE</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN1 -FF0nrf51xxx -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm))</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile>$$Device:nRF51822_xxAA$Device\Include\nrf.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:nRF51822_xxAA$SVD\nrf51.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\build\</OutputDirectory>
+          <OutputName>rtthread</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\build\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>  </SimDllArguments>
+          <SimDlgDll>DARMCM1.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments> </TargetDllArguments>
+          <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M0"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x4000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x4000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls>--reduce_paths</MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls>--cpreproc_opts=-DBLE_STACK_SUPPORT_REQD,-DNRF_SD_BLE_API_VERSION=4,-DS132,-DSOFTDEVICE_PRESENT,-DSWI_DISABLE0,-DCONFIG_GPIO_AS_PINRESET,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_12,-DNRF52_PAN_15,-DNRF52_PAN_20,-DNRF52_PAN_31,-DNRF52_PAN_36,-DNRF52_PAN_51,-DNRF52_PAN_54,-DNRF52_PAN_55,-DNRF52_PAN_58,-DNRF52_PAN_64,-DNRF52_PAN_74</MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc>--diag_suppress 6330</Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
--- a/bsp/simulator/drivers/drv_rtc.c
+++ b/bsp/simulator/drivers/drv_rtc.c
@ -0,0 +1,144 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     armink       the first version
+ */
+
+#include <sys/time.h>
+#include <string.h>
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#ifdef RT_USING_RTC
+
+static struct rt_device rtc_dev;
+
+#ifdef RT_USING_ALARM
+
+static struct rt_rtc_wkalarm wkalarm;
+static struct rt_timer alarm_time;
+
+static void alarm_timeout(void *param)
+{
+    rt_alarm_update(param, 1);
+}
+
+static void soft_rtc_alarm_update(struct rt_rtc_wkalarm *palarm)
+{
+    rt_tick_t next_tick;
+
+    if (palarm->enable)
+    {
+        next_tick = RT_TICK_PER_SECOND;
+        rt_timer_control(&alarm_time, RT_TIMER_CTRL_SET_TIME, &next_tick);
+        rt_timer_start(&alarm_time);
+    }
+    else
+    {
+        rt_timer_stop(&alarm_time);
+    }
+}
+
+#endif
+
+static rt_err_t soft_rtc_control(rt_device_t dev, int cmd, void *args)
+{
+    __time32_t *t;
+    struct tm *newtime;
+
+    RT_ASSERT(dev != RT_NULL);
+
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_RTC_GET_TIME:
+    {
+        t = (__time32_t *)args;
+        _time32(t);
+        /* TODO The libc time module not support timezone now. So get the time from locatime. */
+        newtime = _localtime32(t);
+        *t = _mkgmtime32(newtime);
+        break;
+    }
+    case RT_DEVICE_CTRL_RTC_SET_TIME:
+    {
+#ifdef RT_USING_ALARM
+        soft_rtc_alarm_update(&wkalarm);
+#endif
+        break;
+    }
+#ifdef RT_USING_ALARM
+    case RT_DEVICE_CTRL_RTC_GET_ALARM:
+        *((struct rt_rtc_wkalarm *)args) = wkalarm;
+        break;
+    case RT_DEVICE_CTRL_RTC_SET_ALARM:
+        wkalarm = *((struct rt_rtc_wkalarm *)args);
+        soft_rtc_alarm_update(&wkalarm);
+        break;
+#endif
+    }
+
+    return RT_EOK;
+}
+
+#ifdef RT_USING_DEVICE_OPS
+const static struct rt_device_ops soft_rtc_ops =
+{
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+    soft_rtc_control
+};
+#endif
+
+int rt_win_rtc_init(void)
+{
+    static rt_bool_t init_ok = RT_FALSE;
+
+    if (init_ok)
+    {
+        return 0;
+    }
+    /* make sure only one 'rtc' device */
+    RT_ASSERT(!rt_device_find("rtc"));
+
+#ifdef RT_USING_ALARM
+    rt_timer_init(&alarm_time,
+        "alarm",
+        alarm_timeout,
+        &rtc_dev,
+        0,
+        RT_TIMER_FLAG_SOFT_TIMER | RT_TIMER_FLAG_ONE_SHOT);
+#endif
+
+    rtc_dev.type = RT_Device_Class_RTC;
+
+    /* register rtc device */
+#ifdef RT_USING_DEVICE_OPS
+    rtc_dev.ops = &soft_rtc_ops;
+#else
+    rtc_dev.init = RT_NULL;
+    rtc_dev.open = RT_NULL;
+    rtc_dev.close = RT_NULL;
+    rtc_dev.read = RT_NULL;
+    rtc_dev.write = RT_NULL;
+    rtc_dev.control = soft_rtc_control;
+#endif
+
+    /* no private */
+    rtc_dev.user_data = RT_NULL;
+
+    rt_device_register(&rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR);
+
+    init_ok = RT_TRUE;
+
+    return 0;
+}
+INIT_BOARD_EXPORT(rt_win_rtc_init);
+
+#endif /* RT_USING_RTC */
--- a/bsp/stm32/README.md
+++ b/bsp/stm32/README.md
@ -20,6 +20,8 @@ STM32 系列 BSP 目前支持情况如下表所示：
 | [stm32f103-onenet-nbiot](stm32f103-onenet-nbiot) | STM32F103 OneNET NB-IoT 开发板 |
 | [stm32f103-yf-ufun](stm32f103-yf-ufun) | STM32F103 yf-ufun 开发板 |
 | [stm32f107-uc-eval](stm32f107-uc-eval) | uC/Eval STM32F107 评估板（中国版） |
+| **F2 系列** |  |
+| [stm32f207-st-nucleo](stm32f207-st-nucleo) | ST 官方 STM32F207-nucleo 开发板 |
 | **F4 系列** |  |
 | [stm32f401-st-nucleo](stm32f401-st-nucleo) | ST 官方 STM32F401 Nucleo-64 开发板 |
 | [stm32f405-smdz-breadfruit](stm32f405-smdz-breadfruit) | 三木电子 SM1432F405 开发板 |
--- a/bsp/stm32/libraries/HAL_Drivers/drv_common.c
+++ b/bsp/stm32/libraries/HAL_Drivers/drv_common.c
@ -168,7 +168,7 @@ RT_WEAK void rt_hw_board_init()
 #endif

    /* Set the shell console output device */
-#ifdef RT_USING_CONSOLE
+#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
 #endif

--- a/bsp/stm32/libraries/HAL_Drivers/drv_common.h
+++ b/bsp/stm32/libraries/HAL_Drivers/drv_common.h
@ -13,7 +13,9 @@

 #include <rtthread.h>
 #include <rthw.h>
+#ifdef RT_USING_DEVICE
 #include <rtdevice.h>
+#endif

 #ifdef __cplusplus
 extern "C" {
--- a/bsp/nrf5x/libraries/templates/nrf52x/.config
+++ b/bsp/nrf5x/libraries/templates/nrf52x/.config
@ -14,15 +14,19 @@ CONFIG_RT_ALIGN_SIZE=4
 CONFIG_RT_THREAD_PRIORITY_32=y
 # CONFIG_RT_THREAD_PRIORITY_256 is not set
 CONFIG_RT_THREAD_PRIORITY_MAX=32
-CONFIG_RT_TICK_PER_SECOND=100
+CONFIG_RT_TICK_PER_SECOND=1000
 CONFIG_RT_USING_OVERFLOW_CHECK=y
 CONFIG_RT_USING_HOOK=y
 CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
 CONFIG_IDLE_THREAD_STACK_SIZE=256
-CONFIG_RT_USING_TIMER_SOFT=y
-CONFIG_RT_TIMER_THREAD_PRIO=4
-CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
+# CONFIG_RT_USING_TIMER_SOFT is not set
+
+#
+# kservice optimization
+#
+# CONFIG_RT_KSERVICE_USING_STDLIB is not set
+# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
 CONFIG_RT_DEBUG=y
 # CONFIG_RT_DEBUG_COLOR is not set
 # CONFIG_RT_DEBUG_INIT_CONFIG is not set
@ -54,6 +58,7 @@ CONFIG_RT_USING_MEMPOOL=y
 # CONFIG_RT_USING_NOHEAP is not set
 CONFIG_RT_USING_SMALL_MEM=y
 # CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_USERHEAP is not set
 # CONFIG_RT_USING_MEMTRACE is not set
 CONFIG_RT_USING_HEAP=y

@ -65,16 +70,21 @@ CONFIG_RT_USING_DEVICE=y
 # CONFIG_RT_USING_INTERRUPT_INFO is not set
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
-CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart3"
 CONFIG_RT_VER_NUM=0x40003
-# CONFIG_RT_USING_CPU_FFS is not set
+CONFIG_ARCH_ARM=y
+CONFIG_RT_USING_CPU_FFS=y
+CONFIG_ARCH_ARM_CORTEX_M=y
+CONFIG_ARCH_ARM_CORTEX_M3=y
 # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set

 #
 # RT-Thread Components
 #
 CONFIG_RT_USING_COMPONENTS_INIT=y
-# CONFIG_RT_USING_USER_MAIN is not set
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10

 #
 # C++ features
@ -118,8 +128,10 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_HWTIMER is not set
 # CONFIG_RT_USING_CPUTIME is not set
 # CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PHY is not set
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
 # CONFIG_RT_USING_PWM is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
@ -145,9 +157,9 @@ CONFIG_RT_USING_PIN=y
 #
 # POSIX layer and C standard library
 #
-CONFIG_RT_USING_LIBC=y
+# CONFIG_RT_USING_LIBC is not set
 # CONFIG_RT_USING_PTHREADS is not set
-# CONFIG_RT_USING_MODULE is not set
+CONFIG_RT_LIBC_USING_TIME=y

 #
 # Network
@ -184,6 +196,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_RT_USING_RYM is not set
 # CONFIG_RT_USING_ULOG is not set
 # CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_LWP is not set

 #
 # RT-Thread online packages
@ -192,12 +205,15 @@ CONFIG_RT_USING_LIBC=y
 #
 # IoT - internet of things
 #
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
 # CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_MYMQTT is not set
 # CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_CJSON is not set
 # CONFIG_PKG_USING_JSMN is not set
@ -224,6 +240,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
 # CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
 # CONFIG_PKG_USING_ATSRV_SOCKET is not set
@ -236,9 +253,10 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
 # CONFIG_PKG_USING_JIOT-C-SDK is not set
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 # CONFIG_PKG_USING_IPMSG is not set
@ -247,8 +265,6 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_LIBRWS is not set
 # CONFIG_PKG_USING_TCPSERVER is not set
 # CONFIG_PKG_USING_PROTOBUF_C is not set
-# CONFIG_PKG_USING_ONNX_PARSER is not set
-# CONFIG_PKG_USING_ONNX_BACKEND is not set
 # CONFIG_PKG_USING_DLT645 is not set
 # CONFIG_PKG_USING_QXWZ is not set
 # CONFIG_PKG_USING_SMTP_CLIENT is not set
@ -257,6 +273,18 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_CAPNP is not set
 # CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
 # CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PDULIB is not set
+# CONFIG_PKG_USING_BTSTACK is not set
+# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
+# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
+# CONFIG_PKG_USING_MAVLINK is not set
+# CONFIG_PKG_USING_RAPIDJSON is not set
+# CONFIG_PKG_USING_BSAL is not set
+# CONFIG_PKG_USING_AGILE_MODBUS is not set
+# CONFIG_PKG_USING_AGILE_FTP is not set
+# CONFIG_PKG_USING_EMBEDDEDPROTO is not set

 #
 # security packages
@ -265,6 +293,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_libsodium is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set

 #
 # language packages
@ -281,6 +310,9 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_STEMWIN is not set
 # CONFIG_PKG_USING_WAVPLAYER is not set
 # CONFIG_PKG_USING_TJPGD is not set
+# CONFIG_PKG_USING_HELIX is not set
+# CONFIG_PKG_USING_AZUREGUIX is not set
+# CONFIG_PKG_USING_TOUCHGFX2RTT is not set

 #
 # tools packages
@ -292,13 +324,32 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_RDB is not set
 # CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ULOG_FILE is not set
+# CONFIG_PKG_USING_LOGMGR is not set
 # CONFIG_PKG_USING_ADBD is not set
 # CONFIG_PKG_USING_COREMARK is not set
 # CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_MEMORYPERF is not set
 # CONFIG_PKG_USING_NR_MICRO_SHELL is not set
 # CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
 # CONFIG_PKG_USING_LUNAR_CALENDAR is not set
 # CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
+# CONFIG_PKG_USING_UMCN is not set
+# CONFIG_PKG_USING_LWRB2RTT is not set
+# CONFIG_PKG_USING_CPU_USAGE is not set
+# CONFIG_PKG_USING_GBK2UTF8 is not set
+# CONFIG_PKG_USING_VCONSOLE is not set
+# CONFIG_PKG_USING_KDB is not set
+# CONFIG_PKG_USING_WAMR is not set
+# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
+# CONFIG_PKG_USING_LWLOG is not set
+# CONFIG_PKG_USING_ANV_TRACE is not set
+# CONFIG_PKG_USING_ANV_MEMLEAK is not set
+# CONFIG_PKG_USING_ANV_TESTSUIT is not set
+# CONFIG_PKG_USING_ANV_BENCH is not set
+# CONFIG_PKG_USING_DEVMEM is not set

 #
 # system packages
@ -306,21 +357,47 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_GUIENGINE is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
-# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_PARTITION is not set
 # CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_FLASHDB is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
 # CONFIG_PKG_USING_LITTLEVGL2RTT is not set
 # CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_DFS_JFFS2 is not set
+# CONFIG_PKG_USING_DFS_UFFS is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_THREAD_POOL is not set
 # CONFIG_PKG_USING_ROBOTS is not set
 # CONFIG_PKG_USING_EV is not set
 # CONFIG_PKG_USING_SYSWATCH is not set
 # CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
 # CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
+
+#
+# Micrium: Micrium software products porting for RT-Thread
+#
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
+# CONFIG_PKG_USING_UC_CRC is not set
+# CONFIG_PKG_USING_UC_CLK is not set
+# CONFIG_PKG_USING_UC_COMMON is not set
+# CONFIG_PKG_USING_UC_MODBUS is not set
+# CONFIG_PKG_USING_PPOOL is not set
+# CONFIG_PKG_USING_OPENAMP is not set
+# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
+# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
+# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
+# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
+# CONFIG_PKG_USING_QFPLIB_M3 is not set
+# CONFIG_PKG_USING_LPM is not set
+# CONFIG_PKG_USING_TLSF is not set
+# CONFIG_PKG_USING_EVENT_RECORDER is not set

 #
 # peripheral libraries and drivers
@ -329,6 +406,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_U8G2 is not set
@ -338,6 +416,9 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_SIGNAL_LED is not set
 # CONFIG_PKG_USING_LEDBLINK is not set
 # CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
@ -355,8 +436,48 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_RPLIDAR is not set
 # CONFIG_PKG_USING_AS608 is not set
 # CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
 # CONFIG_PKG_USING_EMBARC_BSP is not set
 # CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
+# CONFIG_PKG_USING_LD3320 is not set
+# CONFIG_PKG_USING_WK2124 is not set
+# CONFIG_PKG_USING_LY68L6400 is not set
+# CONFIG_PKG_USING_DM9051 is not set
+# CONFIG_PKG_USING_SSD1306 is not set
+# CONFIG_PKG_USING_QKEY is not set
+# CONFIG_PKG_USING_RS485 is not set
+# CONFIG_PKG_USING_NES is not set
+# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
+# CONFIG_PKG_USING_VDEVICE is not set
+# CONFIG_PKG_USING_SGM706 is not set
+# CONFIG_PKG_USING_STM32WB55_SDK is not set
+# CONFIG_PKG_USING_RDA58XX is not set
+# CONFIG_PKG_USING_LIBNFC is not set
+# CONFIG_PKG_USING_MFOC is not set
+# CONFIG_PKG_USING_TMC51XX is not set
+
+#
+# AI packages
+#
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_QUEST is not set
+# CONFIG_PKG_USING_NAXOS is not set

 #
 # miscellaneous packages
@ -366,6 +487,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_LZMA is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
 # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
@ -386,18 +508,32 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
-# CONFIG_PKG_USING_NNOM is not set
-# CONFIG_PKG_USING_LIBANN is not set
-# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_KI is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
 # CONFIG_PKG_USING_VT100 is not set
-# CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+
+#
+# entertainment: terminal games and other interesting software packages
+#
+# CONFIG_PKG_USING_THREES is not set
+# CONFIG_PKG_USING_2048 is not set
+# CONFIG_PKG_USING_SNAKE is not set
+# CONFIG_PKG_USING_TETRIS is not set
+# CONFIG_PKG_USING_DONUT is not set
+# CONFIG_PKG_USING_ACLOCK is not set
+# CONFIG_PKG_USING_LWGPS is not set
+# CONFIG_PKG_USING_STATE_MACHINE is not set
+# CONFIG_PKG_USING_MCURSES is not set
+# CONFIG_PKG_USING_COWSAY is not set
+CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_SERIES_STM32F2=y

 #
 # Hardware Drivers Config
 #
-CONFIG_SOC_NRF52832=y
+CONFIG_SOC_STM32F207ZG=y

 #
 # Onboard Peripheral Drivers
@ -406,4 +542,11 @@ CONFIG_SOC_NRF52832=y
 #
 # On-chip Peripheral Drivers
 #
+CONFIG_BSP_USING_GPIO=y
 CONFIG_BSP_USING_UART=y
+CONFIG_BSP_USING_UART3=y
+# CONFIG_BSP_USING_UDID is not set
+
+#
+# Board extended module Drivers
+#
--- a/bsp/stm32/stm32f207-st-nucleo/.cproject
+++ b/bsp/stm32/stm32f207-st-nucleo/.cproject
--- a/bsp/stm32/stm32f207-st-nucleo/.gitignore
+++ b/bsp/stm32/stm32f207-st-nucleo/.gitignore
@ -0,0 +1,42 @@
+*.pyc
+*.map
+*.dblite
+*.elf
+*.bin
+*.hex
+*.axf
+*.exe
+*.pdb
+*.idb
+*.ilk
+*.old
+build
+Debug
+documentation/html
+packages/
+*~
+*.o
+*.obj
+*.out
+*.bak
+*.dep
+*.lib
+*.i
+*.d
+.DS_Stor*
+.config 3
+.config 4
+.config 5
+Midea-X1
+*.uimg
+GPATH
+GRTAGS
+GTAGS
+.vscode
+JLinkLog.txt
+JLinkSettings.ini
+DebugConfig/
+RTE/
+settings/
+*.uvguix*
+cconfig.h
--- a/bsp/stm32/stm32f207-st-nucleo/.project
+++ b/bsp/stm32/stm32f207-st-nucleo/.project
@ -0,0 +1,28 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+  <name>stm32f207-st-nucleo</name>
+  <comment />
+  <projects>
+	</projects>
+  <buildSpec>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+      <triggers>clean,full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+      <triggers>full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+  </buildSpec>
+  <natures>
+    <nature>org.eclipse.cdt.core.cnature</nature>
+    <nature>org.rt-thread.studio.rttnature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+  </natures>
+  <linkedResources />
+</projectDescription>
--- a/bsp/stm32/stm32f207-st-nucleo/.settings/org.eclipse.core.runtime.prefs
+++ b/bsp/stm32/stm32f207-st-nucleo/.settings/org.eclipse.core.runtime.prefs
@ -0,0 +1,3 @@
+content-types/enabled=true
+content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
+eclipse.preferences.version=1
--- a/bsp/stm32/stm32f207-st-nucleo/.settings/projcfg.ini
+++ b/bsp/stm32/stm32f207-st-nucleo/.settings/projcfg.ini
@ -0,0 +1,22 @@
+#RT-Thread Studio Project Configuration
+#Sat Jan 16 15:18:32 CST 2021
+project_type=rtt
+chip_name=STM32F103RB
+cpu_name=None
+target_freq=
+clock_source=
+dvendor_name=
+rx_pin_name=
+rtt_path=
+source_freq=
+csp_path=
+sub_series_name=
+selected_rtt_version=latest
+cfg_version=v3.0
+tool_chain=gcc
+uart_name=
+tx_pin_name=
+rtt_nano_path=
+output_project_path=
+hardware_adapter=J-Link
+project_name=stm32f207-st-nucleo
--- a/bsp/stm32/stm32f207-st-nucleo/Kconfig
+++ b/bsp/stm32/stm32f207-st-nucleo/Kconfig
@ -0,0 +1,22 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "rt-thread"
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+ 
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "libraries/Kconfig"
+source "board/Kconfig"
+
--- a/bsp/stm32/stm32f207-st-nucleo/README.md
+++ b/bsp/stm32/stm32f207-st-nucleo/README.md
@ -0,0 +1,130 @@
+# BSP README 模板
+
+## 简介
+
+本文档为 STM32F207 Nucleo-144 开发板的 BSP (板级支持包) 说明。
+
+主要内容如下：
+
+- 开发板资源介绍
+- BSP 快速上手
+- 进阶使用方法
+
+通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
+
+## 开发板介绍
+
+STM32 Nucleo-144 是 ST 官方推出的开发板，搭载 STM32F207ZG 芯片，基于 ARM Cortex-M3 内核，最高主频 120 MHz，具有丰富的板载资源，可以充分发挥 STM32F207ZG 的芯片性能。
+
+开发板外观如下图所示：
+
+![board](figures/board.jpg)
+
+该开发板常用 **板载资源** 如下：
+
+- MCU：STM3207ZG，主频 120MHz，1MB FLASH ，128KB RAM
+- 常用外设
+  - LED：3个，LD1（绿色，PB0），LD2（蓝色，PB7），LD3（红色，PB14）
+  - 按键：2 个，USER and RESET 。
+- 常用接口：USB 转串口、以太网接口、Arduino Uno 和 ST morpho 两类扩展接口
+- 调试接口，标准 JTAG/SWD
+
+快速入门：[Getting started with STM32 Nucleo board software development tools](https://www.st.com/resource/en/user_manual/dm00105928-getting-started-with-stm32-nucleo-board-software-development-tools-stmicroelectronics.pdf)
+
+原理图下载：[STM32 Nucleo (144 pins) schematics](https://www.st.com/resource/en/schematic_pack/nucleo_144pins_sch.zip)
+
+*更多相关信息资料见 ST 官网详情页：[STM32 Nucleo-144 development board with STM32F207ZG MCU](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-f207zg.html)*
+
+## 外设支持
+
+本 BSP 目前对外设的支持情况如下：
+
+| **板载外设**      | **支持情况** | **备注**                              |
+| :----------------- | :----------: | :------------------------------------- |
+| USB 转串口        |     支持     |                                       |
+| 以太网            |     暂不支持     |                                       |
+| **片上外设**      | **支持情况** | **备注**                              |
+| GPIO              |     支持     | PA0, PA1... PH1 ---> PIN: 0, 1...144 |
+| UART              |     支持     | UART3                          |
+| SPI               |     暂不支持     |                               |
+| I2C               |     暂不支持     |                               |
+| RTC               |   暂不支持   |                               |
+| PWM               |   暂不支持   |                               |
+| USB Device        |   暂不支持   |                               |
+| USB Host          |   暂不支持   |                               |
+| IWG               |   暂不支持   |                               |
+
+## 使用说明
+
+使用说明分为如下两个章节：
+
+- 快速上手
+
+    本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
+
+- 进阶使用
+
+    本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
+
+
+### 快速上手
+
+本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
+
+#### 硬件连接
+
+使用数据线连接开发板到 PC，打开电源开关。
+
+#### 编译下载
+
+双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
+
+> 工程默认配置使用 xxx 仿真器下载程序，在通过 xxx 连接开发板的基础上，点击下载按钮即可下载程序到开发板
+
+#### 运行结果
+
+下载程序成功之后，系统会自动运行，红色 LD3 会周期性闪烁。。
+
+USB 虚拟 COM 端口默认连接串口 3，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
+
+```bash
+ \ | /
+- RT -     Thread Operating System
+ / | \     4.0.3 build Apr 12 2021
+ 2006 - 2021 Copyright by rt-thread team
+msh >
+
+```
+### 进阶使用
+
+此 BSP 默认只开启了 GPIO 和 串口3 的功能，更多高级功能需要利用 ENV 工具对 BSP 进行配置，步骤如下：
+
+1. 在 bsp 下打开 env 工具。
+
+2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
+
+3. 输入`pkgs --update`命令更新软件包。
+
+4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
+
+本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
+
+## 注意事项
+
+- 关于 pin 序号规则，与旧 bsp 使用封装管脚序号不同，在新的 stm32 bsp 框架中，统一采用顺序编号的方式，对 GPIO 驱动进行管理，在移植旧 bsp 时特别要注意这点。
+
+  pin 序号与引脚名对应关系如下表：
+
+  | STM32 引脚名 | 管脚序号 pin |
+  | ------------ | ------------ |
+  | PA0 - PA15   | 0 - 15       |
+  | PB0 - PB15   | 16 - 31      |
+  | PC0 - PC15   | 32 - 47      |
+  | PD0 - ...    | 48 - ...     |
+
+
+## 联系人信息
+
+维护人:
+
+-  [wanghaijing](https://github.com/whj4674672) ，邮箱：<whj4674672@163.com>
--- a/bsp/stm32/stm32f207-st-nucleo/SConscript
+++ b/bsp/stm32/stm32f207-st-nucleo/SConscript
@ -0,0 +1,15 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')
--- a/bsp/stm32/stm32f207-st-nucleo/SConstruct
+++ b/bsp/stm32/stm32f207-st-nucleo/SConstruct
@ -0,0 +1,64 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+# set RTT_ROOT
+if not os.getenv("RTT_ROOT"): 
+    RTT_ROOT="rt-thread"
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+    env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+    libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+SDK_LIB = libraries_path_prefix
+Export('SDK_LIB')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+stm32_library = 'STM32F2xx_HAL'
+rtconfig.BSP_LIBRARY_TYPE = stm32_library
+
+# include libraries
+objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript')))
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
+
+# make a building
+DoBuilding(TARGET, objs)
--- a/bsp/stm32/stm32f207-st-nucleo/applications/SConscript
+++ b/bsp/stm32/stm32f207-st-nucleo/applications/SConscript
@ -0,0 +1,12 @@
+import rtconfig
+from building import *
+
+cwd     = GetCurrentDir()
+CPPPATH = [cwd]
+src     = Split("""
+main.c
+""")
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/stm32/stm32f207-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32f207-st-nucleo/applications/main.c
@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-06     SummerGift   first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <board.h>
+
+/* defined the LED0 pin: PB14 */
+#define LED0_PIN    GET_PIN(B, 14)
+
+int main(void)
+{
+    int count = 1;
+    /* set LED0 pin mode to output */
+    rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
+
+    while (count++)
+    {
+        rt_pin_write(LED0_PIN, PIN_HIGH);
+        rt_thread_mdelay(500);
+        rt_pin_write(LED0_PIN, PIN_LOW);
+        rt_thread_mdelay(500);
+    }
+
+    return RT_EOK;
+}
--- a/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/.mxproject
+++ b/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/.mxproject
@ -0,0 +1,25 @@
+[PreviousGenFiles]
+AdvancedFolderStructure=true
+HeaderFileListSize=3
+HeaderFiles#0=D:/rt-thread/rt_thread_master/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Inc/stm32f2xx_it.h
+HeaderFiles#1=D:/rt-thread/rt_thread_master/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Inc/stm32f2xx_hal_conf.h
+HeaderFiles#2=D:/rt-thread/rt_thread_master/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Inc/main.h
+HeaderFolderListSize=1
+HeaderPath#0=D:/rt-thread/rt_thread_master/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Inc
+HeaderFiles=;
+SourceFileListSize=3
+SourceFiles#0=D:/rt-thread/rt_thread_master/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src/stm32f2xx_it.c
+SourceFiles#1=D:/rt-thread/rt_thread_master/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src/stm32f2xx_hal_msp.c
+SourceFiles#2=D:/rt-thread/rt_thread_master/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src/main.c
+SourceFolderListSize=1
+SourcePath#0=D:/rt-thread/rt_thread_master/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src
+SourceFiles=;
+
+[PreviousLibFiles]
+LibFiles=Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_tim.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_tim_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_uart.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_def.h;Drivers/STM32F2xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_rcc.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_rcc_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_cortex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_flash.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_flash_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_pwr.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_pwr_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_gpio.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_gpio_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_dma.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_dma_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_exti.h;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_uart.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_gpio.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_exti.c;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_tim.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_tim_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_uart.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_def.h;Drivers/STM32F2xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_rcc.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_rcc_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_cortex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_flash.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_flash_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_pwr.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_pwr_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_gpio.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_gpio_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_dma.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_dma_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f207xx.h;Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h;Drivers/CMSIS/Device/ST/STM32F2xx/Include/system_stm32f2xx.h;Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
+
+[PreviousUsedKeilFiles]
+SourceFiles=..\Core\Src\main.c;..\Core\Src\stm32f2xx_it.c;..\Core\Src\stm32f2xx_hal_msp.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim_ex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_uart.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc_ex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash_ex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr_ex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_gpio.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma_ex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_exti.c;..\Core\Src/system_stm32f2xx.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim_ex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_uart.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc_ex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash_ex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr_ex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_gpio.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma_ex.c;..\Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_exti.c;..\Core\Src/system_stm32f2xx.c;..\Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c;;
+HeaderPath=..\Drivers\STM32F2xx_HAL_Driver\Inc;..\Drivers\STM32F2xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F2xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc;
+CDefines=USE_HAL_DRIVER;STM32F207xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
--- a/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Inc/main.h
+++ b/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Inc/main.h
@ -0,0 +1,71 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f2xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Inc/stm32f2xx_hal_conf.h
+++ b/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Inc/stm32f2xx_hal_conf.h
@ -0,0 +1,410 @@
+/**
+  ******************************************************************************
+  * @file    stm32f2xx_hal_conf.h
+  * @brief   HAL configuration file.
+ ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F2xx_HAL_CONF_H
+#define __STM32F2xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+/*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_CAN_MODULE_ENABLED   */
+/*#define HAL_CAN_LEGACY_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_DCMI_MODULE_ENABLED   */
+/*#define HAL_ETH_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_PCCARD_MODULE_ENABLED   */
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_HASH_MODULE_ENABLED   */
+/*#define HAL_I2C_MODULE_ENABLED   */
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SD_MODULE_ENABLED   */
+/*#define HAL_MMC_MODULE_ENABLED   */
+/*#define HAL_SPI_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_HCD_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    25000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    100U   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  32000U       /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.*/
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+
+  */
+#if !defined  (LSE_VALUE)
+  #define LSE_VALUE    32768U /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    5000U   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    12288000U /*!< Value of the External audio frequency in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    3300U /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            0U /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
+
+/* Definition of the Ethernet driver buffers size and count */
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
+#define ETH_RXBUFNB                    4U       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    4U       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+
+/* Section 2: PHY configuration section */
+
+/* DP83848_PHY_ADDRESS Address*/
+#define DP83848_PHY_ADDRESS           0x01U
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
+#define PHY_RESET_DELAY                 0x000000FFU
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY                0x00000FFFU
+
+#define PHY_READ_TO                     0x0000FFFFU
+#define PHY_WRITE_TO                    0x0000FFFFU
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR                         ((uint16_t)0x0000)    /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x0001)    /*!< Transceiver Basic Status Register    */
+
+#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
+#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
+
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
+
+/* Section 4: Extended PHY Registers */
+#define PHY_SR                          ((uint16_t)0x10)    /*!< PHY status register Offset                      */
+
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32f2xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32f2xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32f2xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32f2xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32f2xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32f2xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+  #include "stm32f2xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+  #include "stm32f2xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32f2xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32f2xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32f2xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32f2xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32f2xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32f2xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32f2xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32f2xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32f2xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+  #include "stm32f2xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32f2xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f2xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f2xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f2xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f2xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32f2xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f2xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f2xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f2xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f2xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f2xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f2xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f2xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f2xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f2xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f2xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f2xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32f2xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F2xx_HAL_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Inc/stm32f2xx_it.h
+++ b/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Inc/stm32f2xx_it.h
@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f2xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+ ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F2xx_IT_H
+#define __STM32F2xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F2xx_IT_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src/main.c
+++ b/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src/main.c
@ -0,0 +1,240 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+UART_HandleTypeDef huart3;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_USART3_UART_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_USART3_UART_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 13;
+  RCC_OscInitStruct.PLL.PLLN = 195;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 4;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief USART3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART3_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART3_Init 0 */
+
+  /* USER CODE END USART3_Init 0 */
+
+  /* USER CODE BEGIN USART3_Init 1 */
+
+  /* USER CODE END USART3_Init 1 */
+  huart3.Instance = USART3;
+  huart3.Init.BaudRate = 115200;
+  huart3.Init.WordLength = UART_WORDLENGTH_8B;
+  huart3.Init.StopBits = UART_STOPBITS_1;
+  huart3.Init.Parity = UART_PARITY_NONE;
+  huart3.Init.Mode = UART_MODE_TX_RX;
+  huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart3.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART3_Init 2 */
+
+  /* USER CODE END USART3_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin : PB14 */
+  GPIO_InitStruct.Pin = GPIO_PIN_14;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src/stm32f2xx_hal_msp.c
+++ b/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src/stm32f2xx_hal_msp.c
@ -0,0 +1,149 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32f2xx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(huart->Instance==USART3)
+  {
+  /* USER CODE BEGIN USART3_MspInit 0 */
+
+  /* USER CODE END USART3_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_USART3_CLK_ENABLE();
+
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**USART3 GPIO Configuration
+    PD8     ------> USART3_TX
+    PD9     ------> USART3_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN USART3_MspInit 1 */
+
+  /* USER CODE END USART3_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==USART3)
+  {
+  /* USER CODE BEGIN USART3_MspDeInit 0 */
+
+  /* USER CODE END USART3_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART3_CLK_DISABLE();
+
+    /**USART3 GPIO Configuration
+    PD8     ------> USART3_TX
+    PD9     ------> USART3_RX
+    */
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9);
+
+  /* USER CODE BEGIN USART3_MspDeInit 1 */
+
+  /* USER CODE END USART3_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src/stm32f2xx_it.c
+++ b/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src/stm32f2xx_it.c
@ -0,0 +1,205 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f2xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32f2xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M3 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  while (1)
+  {
+  }
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32F2xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32f2xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src/system_stm32f2xx.c
+++ b/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/Core/Src/system_stm32f2xx.c
@ -0,0 +1,344 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32f2xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
+  *             
+  *   This file provides two functions and one global variable to be called from 
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and 
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f2xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick 
+  *                                  timer or configure other parameters.
+  *                                     
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f2xx_system
+  * @{
+  */  
+  
+/** @addtogroup STM32F2xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32f2xx.h"
+
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Defines
+  * @{
+  */
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to use external SRAM mounted
+     on STM322xG_EVAL board as data memory  */
+/* #define DATA_IN_ExtSRAM */
+
+/* Note: Following vector table addresses must be defined in line with linker
+         configuration. */
+/*!< Uncomment the following line if you need to relocate the vector table
+     anywhere in Flash or Sram, else the vector table is kept at the automatic
+     remap of boot address selected */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line if you need to relocate your vector Table
+     in Sram else user remap will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS   SRAM_BASE       /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x200. */
+#else
+#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+
+/******************************************************************************/
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Variables
+  * @{
+  */
+  
+  /* This variable can be updated in Three ways :
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = 16000000;
+  const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+  const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+#ifdef DATA_IN_ExtSRAM
+  static void SystemInit_ExtMemCtl(void); 
+#endif /* DATA_IN_ExtSRAM */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the Embedded Flash Interface, the PLL and update the 
+  *         SystemFrequency variable.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+#ifdef DATA_IN_ExtSRAM
+  SystemInit_ExtMemCtl(); 
+#endif /* DATA_IN_ExtSRAM */
+
+  /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *           
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.         
+  *     
+  * @note   - The system frequency computed by this function is not the real 
+  *           frequency in the chip. It is calculated based on the predefined 
+  *           constant and the selected clock source:
+  *             
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *                                              
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *                          
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *         
+  *         (*) HSI_VALUE is a constant defined in stm32f2xx_hal_conf.h file (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.   
+  *    
+  *         (**) HSE_VALUE is a constant defined in stm32f2xx_hal_conf.h file (its value
+  *              depends on the application requirements), user has to ensure that HSE_VALUE
+  *              is same as the real frequency of the crystal used. Otherwise, this function
+  *              may have wrong result.
+  *                
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *     
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+  
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+  switch (tmp)
+  {
+    case 0x00:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case 0x04:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case 0x08:  /* PLL used as system clock source */
+
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+         SYSCLK = PLL_VCO / PLL_P
+         */    
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+      
+      if (pllsource != 0)
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+
+      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+      SystemCoreClock = pllvco/pllp;
+      break;
+    default:
+      SystemCoreClock = HSI_VALUE;
+      break;
+  }
+  /* Compute HCLK frequency --------------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK frequency */
+  SystemCoreClock >>= tmp;
+}
+
+#ifdef DATA_IN_ExtSRAM
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f2xx.s before jump to main.
+  *         This function configures the external SRAM mounted on STM322xG_EVAL board
+  *         This SRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+  __IO uint32_t tmp = 0x00;
+
+/*-- GPIOs Configuration -----------------------------------------------------*/
+   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+  RCC->AHB1ENR   |= 0x00000078;
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
+  (void)(tmp);
+
+  /* Connect PDx pins to FSMC Alternate function */
+  GPIOD->AFR[0]  = 0x00CCC0CC;
+  GPIOD->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xAAAA0A8A;
+  /* Configure PDx pins speed to 100 MHz */  
+  GPIOD->OSPEEDR = 0xFFFF0FCF;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FSMC Alternate function */
+  GPIOE->AFR[0]  = 0xC00CC0CC;
+  GPIOE->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xAAAA828A;
+  /* Configure PEx pins speed to 100 MHz */ 
+  GPIOE->OSPEEDR = 0xFFFFC3CF;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FSMC Alternate function */
+  GPIOF->AFR[0]  = 0x00CCCCCC;
+  GPIOF->AFR[1]  = 0xCCCC0000;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xAA000AAA;
+  /* Configure PFx pins speed to 100 MHz */ 
+  GPIOF->OSPEEDR = 0xFF000FFF;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FSMC Alternate function */
+  GPIOG->AFR[0]  = 0x00CCCCCC;
+  GPIOG->AFR[1]  = 0x000000C0;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0x00085AAA;
+  /* Configure PGx pins speed to 100 MHz */ 
+  GPIOG->OSPEEDR = 0x000CAFFF;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+/*--FSMC Configuration -------------------------------------------------------*/
+  /* Enable the FSMC interface clock */
+  RCC->AHB3ENR         |= 0x00000001;
+
+  /* Configure and enable Bank1_SRAM2 */
+  FSMC_Bank1->BTCR[2]  = 0x00001011;
+  FSMC_Bank1->BTCR[3]  = 0x00000201;
+  FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
+}
+#endif /* DATA_IN_ExtSRAM */
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+  
+/**
+  * @}
+  */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc
+++ b/bsp/stm32/stm32f207-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc
@ -0,0 +1,106 @@
+#MicroXplorer Configuration settings - do not modify
+File.Version=6
+GPIO.groupedBy=Group By Peripherals
+KeepUserPlacement=false
+Mcu.Family=STM32F2
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=USART3
+Mcu.IPNb=4
+Mcu.Name=STM32F207Z(C-E-F-G)Tx
+Mcu.Package=LQFP144
+Mcu.Pin0=PB14
+Mcu.Pin1=PD8
+Mcu.Pin2=PD9
+Mcu.Pin3=VP_SYS_VS_Systick
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32F207ZGTx
+MxCube.Version=6.2.0
+MxDb.Version=DB.6.0.20
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+PB14.Locked=true
+PB14.Signal=GPIO_Output
+PD8.Locked=true
+PD8.Mode=Asynchronous
+PD8.Signal=USART3_TX
+PD9.Locked=true
+PD9.Mode=Asynchronous
+PD9.Signal=USART3_RX
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.CustomerFirmwarePackage=
+ProjectManager.DefaultFWLocation=true
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32F207ZGTx
+ProjectManager.FirmwarePackage=STM32Cube FW_F2 V1.9.2
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=0
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CubeMX_Config.ioc
+ProjectManager.ProjectName=CubeMX_Config
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=MDK-ARM V5
+ProjectManager.ToolChainLocation=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART3_UART_Init-USART3-false-HAL-true
+RCC.48MHZClocksFreq_Value=60000000
+RCC.AHBFreq_Value=120000000
+RCC.APB1CLKDivider=RCC_HCLK_DIV4
+RCC.APB1Freq_Value=30000000
+RCC.APB1TimFreq_Value=60000000
+RCC.APB2CLKDivider=RCC_HCLK_DIV2
+RCC.APB2Freq_Value=60000000
+RCC.APB2TimFreq_Value=120000000
+RCC.CortexFreq_Value=120000000
+RCC.EthernetFreq_Value=120000000
+RCC.FCLKCortexFreq_Value=120000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=120000000
+RCC.HSE_VALUE=25000000
+RCC.HSI_VALUE=16000000
+RCC.I2SClocksFreq_Value=118153846.15384614
+RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO2PinFreq_Value=120000000
+RCC.PLLCLKFreq_Value=120000000
+RCC.PLLM=13
+RCC.PLLN=195
+RCC.RTCFreq_Value=32000
+RCC.RTCHSEDivFreq_Value=12500000
+RCC.SYSCLKFreq_VALUE=120000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.VCOI2SOutputFreq_Value=236307692.3076923
+RCC.VCOInputFreq_Value=1230769.2307692308
+RCC.VCOOutputFreq_Value=240000000
+RCC.VcooutputI2S=118153846.15384614
+USART3.IPParameters=VirtualMode
+USART3.VirtualMode=VM_ASYNC
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
--- a/bsp/stm32/stm32f207-st-nucleo/board/Kconfig
+++ b/bsp/stm32/stm32f207-st-nucleo/board/Kconfig
@ -0,0 +1,39 @@
+menu "Hardware Drivers Config"
+
+config SOC_STM32F207ZG
+    bool
+    select SOC_SERIES_STM32F2
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+
+menu "Onboard Peripheral Drivers"
+
+endmenu
+
+menu "On-chip Peripheral Drivers"
+
+    config BSP_USING_GPIO
+        bool "Enable GPIO"
+        select RT_USING_PIN
+        default y
+
+    menuconfig BSP_USING_UART
+        bool "Enable UART"
+        default y
+        select RT_USING_SERIAL
+        if BSP_USING_UART
+            config BSP_USING_UART3
+                bool "Enable UART3"
+                default y
+        endif
+        
+    source "libraries/HAL_Drivers/Kconfig"
+   
+endmenu
+
+menu "Board extended module Drivers"
+
+endmenu
+
+endmenu
--- a/bsp/stm32/stm32f207-st-nucleo/board/SConscript
+++ b/bsp/stm32/stm32f207-st-nucleo/board/SConscript
@ -0,0 +1,32 @@
+import os
+import rtconfig
+from building import *
+
+Import('SDK_LIB')
+
+cwd = GetCurrentDir()
+
+# add general drivers
+src = Split('''
+board.c
+CubeMX_Config/Core/Src/stm32f2xx_hal_msp.c
+''')
+
+path =  [cwd]
+path += [cwd + '/CubeMX_Config/Core/Inc']
+
+startup_path_prefix = SDK_LIB
+
+if rtconfig.CROSS_TOOL == 'gcc':
+    src += [startup_path_prefix + '/STM32F2xx_HAL/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/startup_stm32f207xx.s']
+elif rtconfig.CROSS_TOOL == 'keil':
+    src += [startup_path_prefix + '/STM32F2xx_HAL/CMSIS/Device/ST/STM32F2xx/Source/Templates/arm/startup_stm32f207xx.s']
+elif rtconfig.CROSS_TOOL == 'iar':
+    src += [startup_path_prefix + '/STM32F2xx_HAL/CMSIS/Device/ST/STM32F2xx/Source/Templates/iar/startup_stm32f207xx.s']
+
+# STM32F205xx || STM32F207xx || STM32F215xx
+# STM32F217xx 
+# You can select chips from the list above
+CPPDEFINES = ['STM32F207xx']
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
+Return('group')
--- a/bsp/stm32/stm32f207-st-nucleo/board/board.c
+++ b/bsp/stm32/stm32f207-st-nucleo/board/board.c
@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-06     SummerGift   first version
+ */
+ 
+#include "board.h"
+
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 13;
+  RCC_OscInitStruct.PLL.PLLN = 195;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 4;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+
--- a/bsp/stm32/stm32f207-st-nucleo/board/board.h
+++ b/bsp/stm32/stm32f207-st-nucleo/board/board.h
@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-5      SummerGift   first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <rtthread.h>
+#include <stm32f2xx.h>
+#include "drv_common.h"
+#include "drv_gpio.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
+#define STM32_FLASH_SIZE             (1024 * 1024)
+#define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
+
+/* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/
+#define STM32_SRAM_SIZE      128
+#define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
+
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
+#else
+extern int __bss_end;
+#define HEAP_BEGIN      ((void *)&__bss_end)
+#endif
+
+#define HEAP_END        STM32_SRAM_END
+
+void SystemClock_Config(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BOARD_H__ */
--- a/Show More
+++ b/Show More