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lpc43xx: refactor uart drivers

This commit is contained in:
Grissiom 2015-01-04 19:54:53 +08:00
parent c3515abf93
commit a447b5f3cf
2 changed files with 69 additions and 114 deletions
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18
bsp/lpc43xx/Libraries/Device/NXP/LPC43xx/Source/Templates/ARM/startup_LPC43xx_M0.s
View File

@ -96,10 +96,10 @@ __Vectors DCD __initial_sp ; 0 Top of Stack
DCD ADC1_IRQHandler ; 37 ADC1
DCD SSP0_OR_SSP1_IRQHandler ; 38 SSP0 or SSP1
DCD EVENTROUTER_IRQHandler ; 39 Event router
DCD USART0_IRQHandler ; 40 USART0
DCD UART0_IRQHandler ; 40 USART0
DCD UART1_IRQHandler ; 41 UART1/Modem
DCD USART2_OR_C_CAN1_IRQHandler ; 42 USART2 or C CAN1
DCD USART3_IRQHandler ; 43 USART3
DCD UART2_OR_C_CAN1_IRQHandler ; 42 USART2 or C CAN1
DCD UART3_IRQHandler ; 43 USART3
DCD I2S0_OR_I2S1_OR_QEI_IRQHandler ; 44 I2S0 or I2S1 or QEI
DCD C_CAN0_IRQHandler ; 45 C CAN0
DCD 0 ; 46 Reserved
@ -175,10 +175,10 @@ Default_Handler PROC
EXPORT ADC1_IRQHandler [WEAK]
EXPORT SSP0_OR_SSP1_IRQHandler [WEAK]
EXPORT EVENTROUTER_IRQHandler [WEAK]
EXPORT USART0_IRQHandler [WEAK]
EXPORT UART0_IRQHandler [WEAK]
EXPORT UART1_IRQHandler [WEAK]
EXPORT USART2_OR_C_CAN1_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT UART2_OR_C_CAN1_IRQHandler [WEAK]
EXPORT UART3_IRQHandler [WEAK]
EXPORT I2S0_OR_I2S1_OR_QEI_IRQHandler [WEAK]
EXPORT C_CAN0_IRQHandler [WEAK]
@ -206,10 +206,10 @@ SPI_OR_DAC_IRQHandler
ADC1_IRQHandler
SSP0_OR_SSP1_IRQHandler
EVENTROUTER_IRQHandler
USART0_IRQHandler
UART0_IRQHandler
UART1_IRQHandler
USART2_OR_C_CAN1_IRQHandler
USART3_IRQHandler
UART2_OR_C_CAN1_IRQHandler
UART3_IRQHandler
I2S0_OR_I2S1_OR_QEI_IRQHandler
C_CAN0_IRQHandler

165
bsp/lpc43xx/drivers/drv_uart.c
View File

@ -26,19 +26,7 @@ struct lpc_uart
static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
// struct lpc_uart *uart;
RT_ASSERT(serial != RT_NULL);
// uart = (struct lpc_uart *)serial->parent.user_data;
// Initialize FIFO for UART0 peripheral
// UART_FIFOConfig(uart->USART, &UARTFIFOConfigStruct);
// UART_TxCmd(uart->USART, ENABLE);
return RT_EOK;
}
@ -95,6 +83,44 @@ static const struct rt_uart_ops lpc_uart_ops =
lpc_getc,
};
static void _do_uart_isr(struct rt_serial_device *sdev)
{
struct lpc_uart *uart;
volatile uint32_t intsrc, temp;
uart = sdev->parent.user_data;
/* Determine the interrupt source */
intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
switch (intsrc)
{
case UART_IIR_INTID_RLS:
/* Receive Line Status interrupt */
/* read the line status */
intsrc = uart->USART->LSR;
/* Receive an error data */
if (intsrc & UART_LSR_PE)
{
temp = uart->USART->RBR;
}
break;
case UART_IIR_INTID_RDA:
/* Receive data */
case UART_IIR_INTID_CTI:
/* Receive data timeout */
/* read the data to buffer */
while (uart->USART->LSR & UART_LSR_RDR)
{
rt_hw_serial_isr(sdev, RT_SERIAL_EVENT_RX_IND);
}
break;
default:
break;
}
}
#if defined(RT_USING_UART0)
/* UART0 device driver structure */
struct lpc_uart uart0 =
@ -106,49 +132,13 @@ struct rt_serial_device serial0;
void UART0_IRQHandler(void)
{
struct lpc_uart *uart;
volatile uint32_t intsrc, temp;
uart = &uart0;
/* enter interrupt */
rt_interrupt_enter();
/* Determine the interrupt source */
intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
switch (intsrc)
{
case UART_IIR_INTID_RLS: /* Receive Line Status interrupt*/
/* read the line status */
intsrc = uart->USART->LSR;
/* Receive an error data */
if (intsrc & UART_LSR_PE)
{
temp = LPC_USART0->RBR;
}
break;
case UART_IIR_INTID_RDA: /* Receive data */
case UART_IIR_INTID_CTI: /* Receive data timeout */
/* read the data to buffer */
while (uart->USART->LSR & UART_LSR_RDR)
{
rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
}
break;
default:
break;
}
/* leave interrupt */
_do_uart_isr(&serial0);
rt_interrupt_leave();
}
#endif
#if defined(RT_USING_UART2)
/* UART2 device driver structure */
struct lpc_uart uart2 =
{
LPC_USART2,
@ -158,47 +148,12 @@ struct rt_serial_device serial2;
void UART2_IRQHandler(void)
{
struct lpc_uart *uart;
uint32_t intsrc, temp;
uart = &uart2;
/* enter interrupt */
rt_interrupt_enter();
/* Determine the interrupt source */
intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
switch (intsrc)
{
case UART_IIR_INTID_RLS: /* Receive Line Status interrupt*/
/* read the line status */
intsrc = uart->USART->LSR;
/* Receive an error data */
if (intsrc & UART_LSR_PE)
{
temp = LPC_USART0->RBR;
}
break;
case UART_IIR_INTID_RDA: /* Receive data */
case UART_IIR_INTID_CTI: /* Receive data timeout */
/* read the data to buffer */
while (uart->USART->LSR & UART_LSR_RDR)
{
rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
}
break;
default:
break;
}
/* leave interrupt */
_do_uart_isr(&serial2);
rt_interrupt_leave();
}
#endif
void rt_hw_uart_init(void)
{
struct lpc_uart *uart;
@ -212,7 +167,7 @@ void rt_hw_uart_init(void)
config.parity = PARITY_NONE;
config.stop_bits = STOP_BITS_1;
config.invert = NRZ_NORMAL;
config.bufsz = RT_SERIAL_RB_BUFSZ;
config.bufsz = RT_SERIAL_RB_BUFSZ;
serial0.ops = &lpc_uart_ops;
serial0.config = config;
@ -221,22 +176,22 @@ void rt_hw_uart_init(void)
LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
/* Enable USART1 peripheral clock */
/* Enable USART0 peripheral clock */
LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
while (!(LPC_CCU2->CLK_APB0_USART0_STAT & 0x01));
/* Enable USART1 register interface clock */
/* Enable USART0 register interface clock */
LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
while (!(LPC_CCU1->CLK_M4_USART0_STAT & 0x01));
/* Init GPIO pins */
LPC_SCU->SFSP2_0 = (1 << 6) | /* Input buffer enabled */
(1 << 4) | /* Pull-up disabled */
(1 << 0) ; /* Pin P2_0 used as U0_TXD */
(1 << 4) | /* Pull-up disabled */
(1 << 0) ; /* Pin P2_0 used as U0_TXD */
LPC_SCU->SFSP2_1 = (1 << 6) | /* Input buffer enabled */
(1 << 4) | /* Pull-up disabled */
(1 << 0) ; /* Pin P2_1 used as U0_RXD */
(1 << 4) | /* Pull-up disabled */
(1 << 0) ; /* Pin P2_1 used as U0_RXD */
/* Init USART0 */
LPC_USART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
@ -250,7 +205,7 @@ void rt_hw_uart_init(void)
/* Enable Interrupt for UART channel */
NVIC_EnableIRQ(uart->USART_IRQn);
/* register UART1 device */
/* register UART0 device */
rt_hw_serial_register(&serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
@ -263,7 +218,7 @@ void rt_hw_uart_init(void)
config.parity = PARITY_NONE;
config.stop_bits = STOP_BITS_1;
config.invert = NRZ_NORMAL;
config.bufsz = RT_SERIAL_RB_BUFSZ;
config.bufsz = RT_SERIAL_RB_BUFSZ;
serial2.ops = &lpc_uart_ops;
serial2.config = config;
@ -272,22 +227,22 @@ void rt_hw_uart_init(void)
LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
/* Enable USART1 peripheral clock */
LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
/* Enable USART2 peripheral clock */
LPC_CCU2->CLK_APB0_USART2_CFG |= 0x01;
while (!(LPC_CCU2->CLK_APB2_USART2_STAT & 0x01));
/* Enable USART2 register interface clock */
LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
LPC_CCU1->CLK_M4_USART2_CFG |= 0x01;
while (!(LPC_CCU1->CLK_M4_USART2_STAT & 0x01));
/* Init GPIO pins */
LPC_SCU->SFSP1_15 = (1 << 6) | /* Input buffer enabled */
(1 << 4) | /* Pull-up disabled */
(1 << 0) ; /* Pin P1_15 used as U2_TXD */
(1 << 4) | /* Pull-up disabled */
(1 << 0) ; /* Pin P1_15 used as U2_TXD */
LPC_SCU->SFSP1_16 = (1 << 6) | /* Input buffer enabled */
(1 << 4) | /* Pull-up disabled */
(1 << 0) ; /* Pin P1_16 used as U2_RXD */
(1 << 4) | /* Pull-up disabled */
(1 << 0) ; /* Pin P1_16 used as U2_RXD */
/* Init USART2 */
LPC_USART2->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
@ -295,14 +250,14 @@ void rt_hw_uart_init(void)
LPC_USART2->DLM = 0x00;
LPC_USART2->FDR = 0xC1;
LPC_USART2->LCR = 0x03; /* DLAB = 0 */
/* preemption = 1, sub-priority = 1 */
NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
/* Enable Interrupt for UART channel */
NVIC_EnableIRQ(uart->USART_IRQn);
/* register UART1 device */
/* register UART2 device */
rt_hw_serial_register(&serial2, "uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);