add cvitek/c906_little (#8514)
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# cvitek bsp
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## 支持芯片
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针对算能系列 RISC-V 芯片的 bsp,包括:
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| 芯片名称 | 内存大小 |
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| ------- | ------- |
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| cv1800b | 64MByte |
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| | |
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- 大核
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| 芯片名称 | 芯片架构 | 内存大小 | 默认日志串口 | 备注 |
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| ------- | ------- |------- | -------- | -------- |
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| cv1800b | RISC-V C906 | 64MByte | uart0 | 默认开启 MMU,运行 RT-SMART 模式 |
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- 小核
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| 目录 | 内存大小 | 默认日志串口 | 备注 |
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| ---- | ------- | -------- | --- |
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| c906-little | 与大核共享 | uart1 | 无 MMU,运行 RT-Thread 标准 |
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> 注:异构芯片需单独编译每个核的 OS
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## 运行
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编译成功后,会在 `bsp/cvitek` 目录下自动生成 `fip.bin` 和 `boot.sd` 文件,其中大核运行文件在 `boot.sd` 中,小核的运行文件在 `fip.bin` 中。
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1. 将 SD 卡分为 2 个分区,第 1 个分区用于存放 bin 文件,第 2 个分区用于作为数据存储分区,分区格式为 `FAT32`。
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2. 将根目录下的 `fip.bin` 和 `boot.sd` 复制 SD 卡第一个分区中。
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- fip.bin:fsbl、 opensbi、uboot、小核运行文件打包后的 bin 文件
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- boot.sd:大核打包后的 bin 文件
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## 驱动支持列表
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| 驱动 | 支持情况 | 备注 |
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| :--- | :------- | :---------------- |
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| UART | 支持 | 默认波特率115200 |
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| gpio | 支持 | |
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## 支持开发板
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- milk-v duo: [https://milkv.io/duo](https://milkv.io/duo)
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## FAQ
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1. 如遇到不能正常编译,请先使用 `scons --menuconfig` 重新生成配置。
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2. 编译成功后,会在 `bsp/cvitek` 目录下自动生成 `fip.bin` 和 `boot.sd` 文件。
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## 联系人信息
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维护人:[flyingcys](https://github.com/flyingcys)
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Load Diff
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mainmenu "RT-Thread Project Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "board/Kconfig"
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config BSP_USING_C906_LITTLE
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bool
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select ARCH_RISCV64
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select ARCH_RISCV_FPU_D
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select RT_USING_COMPONENTS_INIT
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select RT_USING_USER_MAIN
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default y
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config PLIC_PHY_ADDR
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hex
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default 0x70000000
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config IRQ_MAX_NR
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int
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default 128
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config TIMER_CLK_FREQ
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int
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default 25000000
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# c906_little bsp
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该 bsp 为 cv18xx 系列处理器中的协处理器,采用 RISCV C906 @ 700Mhz。
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特性:
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- 无 MMU
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- 集成浮点运算单元 (FPU)
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## Toolchain 下载
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下载 `riscv64-unknown-elf-gcc` 的工具链: [https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1705395512373/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.1-20240115.tar.gz](https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1705395512373/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.1-20240115.tar.gz)
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> 注:
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当前 bsp 只支持 Linux 编译
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正确解压后,在`rtconfig.py`中将 `riscv64-unknown-elf-gcc` 工具链的本地路径加入 `EXEC_PATH` 或通过 `RTT_EXEC_PATH` 环境变量指定路径。
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```shell
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$ export RTT_EXEC_PATH=/opt/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.1/bin
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```
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## 编译
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1. Linux平台下,可以先执行:
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```shell
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$ scons --menuconfig
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```
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它会自动下载env相关脚本到~/.env目录,然后执行
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```shell
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$ source ~/.env/env.sh
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$ pkgs --update
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```
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更新完软件包后,执行 `scons -j10` 或 `scons -j10 --verbose` 来编译这个板级支持包。或者通过 `scons --exec-path="GCC工具链路径"` 命令,在指定工具链位置的同时直接编译。编译正确无误,会产生rtthread.elf文件。
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编译完成后脚本自动调用 `combine-fip.sh` 脚本进行打包,并生成 `fip.sd`, 该文件即为 SD 卡启动的 c906_little 文件。
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## 运行
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1. 将 SD 卡分为 2 个分区,第 1 个分区用于存放 bin 文件,第 2 个分区用于作为数据存储分区,分区格式为 `FAT32`。
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2. 将根目录下的 `fip.bin` 和 `boot.sd` 复制 SD 卡第一个分区中。后续更新固件只需要复制 `fip.sd` 文件即可。
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其中:
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- fip.bin:fsbl、 opensbi、 uboot、c906_little 打包后的 bin 文件
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- boot.sd:大核打包后的 bin 文件
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更新完 `fip.sd` 后, 重新上电可以看到串口的输出信息:
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```shell
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HW_HEAP_BEGIN:83f74dc0 RT_HW_HEAP_END:84000000 size: 569920
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\ | /
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- RT - Thread Operating System
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/ | \ 5.1.0 build Jan 27 2024 22:45:49
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2006 - 2022 Copyright by RT-Thread team
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Hello, RISC-V!
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msh />
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```
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@ -0,0 +1,14 @@
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# for module compiling
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import os
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Import('RTT_ROOT')
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cwd = str(Dir('#'))
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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from building import *
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
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CXX= rtconfig.CXX, CXXFLAGS = rtconfig.CFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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Export('RTT_ROOT')
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Export('rtconfig')
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SDK_ROOT = os.path.abspath('./')
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if os.path.exists(SDK_ROOT + '/drivers'):
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drivers_path_prefix = SDK_ROOT + '/drivers'
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else:
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drivers_path_prefix = os.path.dirname(SDK_ROOT) + '/drivers'
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
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# include libraries
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objs.extend(SConscript(drivers_path_prefix + '/SConscript', variant_dir='build/drivers', duplicate=0))
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# make a building
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DoBuilding(TARGET, objs)
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from building import *
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cwd = GetCurrentDir()
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src = Glob('*.c') + Glob('*.cpp')
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CPPPATH = [cwd]
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024/01/11 flyingcys The first version
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*/
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#include <rtthread.h>
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#include <stdio.h>
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int main(void)
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{
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rt_kprintf("Hello, RISC-V!\n");
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return 0;
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}
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menu "General Drivers Configuration"
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menuconfig BSP_USING_UART
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bool "Using UART"
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select RT_USING_SERIAL
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default y
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if BSP_USING_UART
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config RT_USING_UART0
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bool "Enable UART 0"
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default y
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config RT_USING_UART1
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bool "Enable UART 1"
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default n
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config UART_IRQ_BASE
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int
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default 30
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endif
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endmenu
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from building import *
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cwd = GetCurrentDir()
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src = Glob('*.c') + Glob('*.cpp') + Glob('*.S')
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CPPPATH = [cwd]
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group = DefineGroup('Board', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024/01/11 flyingcys The first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "board.h"
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void rt_hw_board_init(void)
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{
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#ifdef RT_USING_HEAP
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/* initialize memory system */
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rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
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#endif
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/* initalize interrupt */
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rt_hw_interrupt_init();
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/* init rtthread hardware */
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rt_hw_tick_init();
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#ifdef RT_USING_SERIAL
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rt_hw_uart_init();
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#endif
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/* Set the shell console output device */
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#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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#ifdef RT_USING_HEAP
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/* initialize memory system */
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rt_kprintf("RT_HW_HEAP_BEGIN:%x RT_HW_HEAP_END:%x size: %d\r\n", RT_HW_HEAP_BEGIN, RT_HW_HEAP_END, RT_HW_HEAP_END - RT_HW_HEAP_BEGIN);
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#endif
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}
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024/01/11 flyingcys The first version
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*/
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include <rtconfig.h>
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extern rt_uint8_t HeapBase;
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extern rt_uint8_t HeapLimit;
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#define RT_HW_HEAP_BEGIN (void *)&HeapBase
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#define RT_HW_HEAP_END (void *)&HeapLimit
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void rt_hw_board_init(void);
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#endif
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024/01/11 flyingcys The first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "interrupt.h"
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#include "encoding.h"
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#include "mmio.h"
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extern rt_uint32_t rt_interrupt_nest;
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extern rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
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extern rt_uint32_t rt_thread_switch_interrupt_flag;
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struct rt_irq_desc isr_table[INTERRUPTS_MAX];
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static void plic_enable_irq(int irq)
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{
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uint32_t mask = (irq);
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uint32_t value = 0;
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if(irq < 16) {
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rt_kprintf("unmask irq_num is %d\n",irq);
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return;
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}
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value = mmio_read_32(PLIC_ENABLE1 + 4 * (mask / 32));
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value |= (0x1 << (mask % 32));
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mmio_write_32((PLIC_ENABLE1 + (mask / 32) * 4), value);
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}
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static void plic_disable_irq(int irq)
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{
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uint32_t mask = (irq);
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uint32_t value = 0;
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if(irq < 16) {
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rt_kprintf("mask irq_num is %d\n", irq);
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return;
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}
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value = mmio_read_32(PLIC_ENABLE1 + 4 * (mask / 32));
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value &= ~(0x1 << (mask % 32));
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mmio_write_32((PLIC_ENABLE1 + (mask / 32) * 4), value);
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}
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static void plic_set_priority(int irq, int priority)
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{
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mmio_write_32((PLIC_PRIORITY0 + irq * 4), priority);
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}
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static void plic_set_threshold(uint32_t threshold)
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{
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mmio_write_32((PLIC_THRESHOLD), threshold);
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}
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void plic_init(void)
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{
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int i;
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for (i = 0; i < IRQ_MAX_NR / 4; i = i + 4)
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{
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mmio_write_32(((uintptr_t) PLIC_PRIORITY0 + i), 0);
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}
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for ( i = 0; i < IRQ_MAX_NR / 32; i ++)
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{
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mmio_write_32((PLIC_PENDING1 + i * 4), 0);
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mmio_write_32((PLIC_ENABLE1 + i * 4), 0);
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}
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plic_set_threshold(0);
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/* Enable machine external interrupts. */
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set_csr(mie, MIP_MEIP);
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}
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static void rt_hw_interrupt_handler(int vector, void *param)
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{
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rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
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}
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/**
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* This function will initialize hardware interrupt
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*/
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void rt_hw_interrupt_init(void)
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{
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/* init interrupt controller */
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plic_init();
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rt_int32_t idx;
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rt_memset(isr_table, 0x00, sizeof(isr_table));
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for (idx = 0; idx < INTERRUPTS_MAX; idx++)
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{
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isr_table[idx].handler = rt_hw_interrupt_handler;
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}
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/* init interrupt nest, and context in thread sp */
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rt_interrupt_nest = 0;
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rt_interrupt_from_thread = 0;
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rt_interrupt_to_thread = 0;
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rt_thread_switch_interrupt_flag = 0;
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}
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/**
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* This function will mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_mask(int vector)
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{
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if ((vector < 0) || (vector > IRQ_MAX_NR))
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{
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return;
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}
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plic_disable_irq(vector);
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}
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/**
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* This function will un-mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_umask(int vector)
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{
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if ((vector < 0) || (vector > IRQ_MAX_NR))
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{
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return;
|
||||
}
|
||||
|
||||
plic_enable_irq(vector);
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will install a interrupt service routine to a interrupt.
|
||||
* @param vector the interrupt number
|
||||
* @param handler the interrupt service routine to be installed
|
||||
* @param param the interrupt service function parameter
|
||||
* @param name the interrupt name
|
||||
* @return old handler
|
||||
*/
|
||||
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
|
||||
void *param, const char *name)
|
||||
{
|
||||
rt_isr_handler_t old_handler = RT_NULL;
|
||||
if ((vector < 0) || (vector > IRQ_MAX_NR))
|
||||
{
|
||||
return old_handler;
|
||||
}
|
||||
|
||||
old_handler = isr_table[vector].handler;
|
||||
|
||||
#ifdef RT_USING_INTERRUPT_INFO
|
||||
rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
|
||||
#endif /* RT_USING_INTERRUPT_INFO */
|
||||
isr_table[vector].handler = handler;
|
||||
isr_table[vector].param = param;
|
||||
|
||||
// set highest priority
|
||||
plic_set_priority(vector, 7);
|
||||
|
||||
return old_handler;
|
||||
}
|
||||
|
||||
void rt_hw_irq_isr(void)
|
||||
{
|
||||
int irq = mmio_read_32(PLIC_CLAIM);
|
||||
rt_isr_handler_t isr;
|
||||
void *param;
|
||||
|
||||
if (irq < 0 || irq >= IRQ_MAX_NR)
|
||||
{
|
||||
rt_kprintf("bad irq number %d!\n", irq);
|
||||
return;
|
||||
}
|
||||
|
||||
if (!irq) // irq = 0 => no irq
|
||||
{
|
||||
rt_kprintf("no irq!\n");
|
||||
return;
|
||||
}
|
||||
isr = isr_table[irq].handler;
|
||||
param = isr_table[irq].param;
|
||||
if (isr != RT_NULL)
|
||||
{
|
||||
isr(irq, param);
|
||||
}
|
||||
|
||||
mmio_write_32(PLIC_CLAIM, irq);
|
||||
|
||||
// clear external interrupt pending
|
||||
clear_csr(mip, MIP_MEIP);
|
||||
}
|
|
@ -0,0 +1,58 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024/01/11 flyingcys The first version
|
||||
*/
|
||||
|
||||
#ifndef __INTERRUPT_H__
|
||||
#define __INTERRUPT_H__
|
||||
|
||||
#define NR_CPUS 1
|
||||
|
||||
#define IRQ_OFFSET 16
|
||||
#ifndef IRQ_MAX_NR
|
||||
#define IRQ_MAX_NR 207
|
||||
#endif
|
||||
#define INTERRUPTS_MAX (IRQ_OFFSET + IRQ_MAX_NR)
|
||||
|
||||
#define PLIC_BASE 0x70000000
|
||||
#define PLIC_PRIORITY0 (PLIC_BASE + 0x0)
|
||||
#define PLIC_PRIORITY1 (PLIC_BASE + 0x4)
|
||||
#define PLIC_PRIORITY2 (PLIC_BASE + 0x8)
|
||||
#define PLIC_PRIORITY3 (PLIC_BASE + 0xc)
|
||||
#define PLIC_PRIORITY4 (PLIC_BASE + 0x10)
|
||||
|
||||
#define PLIC_PENDING1 (PLIC_BASE + 0x1000)
|
||||
#define PLIC_PENDING2 (PLIC_BASE + 0x1004)
|
||||
#define PLIC_PENDING3 (PLIC_BASE + 0x1008)
|
||||
#define PLIC_PENDING4 (PLIC_BASE + 0x100C)
|
||||
|
||||
#define PLIC_ENABLE1 (PLIC_BASE + 0x2000)
|
||||
#define PLIC_ENABLE2 (PLIC_BASE + 0x2004)
|
||||
#define PLIC_ENABLE3 (PLIC_BASE + 0x2008)
|
||||
#define PLIC_ENABLE4 (PLIC_BASE + 0x200C)
|
||||
|
||||
#define PLIC_THRESHOLD (PLIC_BASE + 0x200000)
|
||||
#define PLIC_CLAIM (PLIC_BASE + 0x200004)
|
||||
|
||||
#define PLIC_PRIORITY_OFFSET (0x0)
|
||||
#define PLIC_PENDING_OFFSET (0x1000)
|
||||
#define PLIC_ENABLE_OFFSET (0x2000)
|
||||
|
||||
#define PLIC_ENABLE_STRIDE 0x80
|
||||
#define PLIC_CONTEXT_STRIDE 0x1000
|
||||
|
||||
#define PLIC_PRIORITY(id) (PLIC_PHY_ADDR + PLIC_PRIORITY_OFFSET + (id) * 4)
|
||||
#define PLIC_PENDING(id) (PLIC_PHY_ADDR + PLIC_PENDING_OFFSET + ((id) / 32))
|
||||
#define PLIC_ENABLE(id) (PLIC_PHY_ADDR + PLIC_ENABLE_OFFSET + ((id) / 32))
|
||||
|
||||
void rt_hw_interrupt_init(void);
|
||||
void rt_hw_interrupt_mask(int vector);
|
||||
void rt_hw_interrupt_umask(int vector);
|
||||
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, void *param, const char *name);
|
||||
|
||||
#endif
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024/01/11 flyingcys The first version
|
||||
*/
|
||||
#ifndef RISCV_REG_H_
|
||||
#define RISCV_REG_H_
|
||||
|
||||
#if __riscv_xlen == 32
|
||||
#define REGSIZE 4
|
||||
#define REGSHIFT 2
|
||||
#define LOAD lw
|
||||
#define STOR sw
|
||||
#elif __riscv_xlen == 64
|
||||
#define REGSIZE 8
|
||||
#define REGSHIFT 3
|
||||
#define LOAD ld
|
||||
#define STOR sd
|
||||
#endif /* __riscv_xlen */
|
||||
|
||||
#endif /* RISCV_REG_H_ */
|
|
@ -0,0 +1,43 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024/01/11 flyingcys The first version
|
||||
*/
|
||||
|
||||
#ifndef RISCV_VIRT_H_
|
||||
#define RISCV_VIRT_H_
|
||||
|
||||
#include "riscv-reg.h"
|
||||
|
||||
#ifdef __ASSEMBLER__
|
||||
#define CONS(NUM, TYPE)NUM
|
||||
#else
|
||||
#define CONS(NUM, TYPE)NUM##TYPE
|
||||
#endif /* __ASSEMBLER__ */
|
||||
|
||||
#define PRIM_HART 0
|
||||
#ifdef RISCV_QEMU
|
||||
#define CLINT_ADDR CONS(0x02000000, UL)
|
||||
#define CLINT_MSIP CONS(0x0000, UL)
|
||||
#define CLINT_MTIMECMP CONS(0x4000, UL)
|
||||
#define CLINT_MTIME CONS(0xbff8, UL)
|
||||
#else
|
||||
#define CLINT_ADDR CONS(0x74000000, UL)
|
||||
#define CLINT_MSIP CONS(0x0000, UL)
|
||||
#define CLINT_MTIMECMP CONS(0x4000, UL)
|
||||
#undef CLINT_MTIME
|
||||
//#define CLINT_MTIME CONS(0x4004, UL)
|
||||
#endif
|
||||
//#define NS16550_ADDR CONS(0x10000000, UL)
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
int xGetCoreID( void );
|
||||
|
||||
#endif /* __ASSEMBLER__ */
|
||||
|
||||
#endif /* RISCV_VIRT_H_ */
|
|
@ -0,0 +1,131 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024/01/11 flyingcys The first version
|
||||
*/
|
||||
#include "riscv-virt.h"
|
||||
.org 0
|
||||
.section .vectors, "ax"
|
||||
.globl _start
|
||||
.type _start,@function
|
||||
_start:
|
||||
.cfi_startproc
|
||||
.cfi_undefined ra
|
||||
.option push
|
||||
.option norelax
|
||||
// la gp, __global_pointer$
|
||||
.option pop
|
||||
|
||||
// Continue primary hart
|
||||
csrr a0, mhartid
|
||||
li a1, PRIM_HART
|
||||
bne a0, a1, secondary
|
||||
|
||||
li x1, 0
|
||||
li x2, 0
|
||||
li x3, 0
|
||||
li x4, 0
|
||||
li x5, 0
|
||||
li x6, 0
|
||||
li x7, 0
|
||||
li x8, 0
|
||||
li x9, 0
|
||||
li x10, 0
|
||||
li x11, 0
|
||||
li x12, 0
|
||||
li x13, 0
|
||||
li x14, 0
|
||||
li x15, 0
|
||||
li x16, 0
|
||||
li x17, 0
|
||||
li x18, 0
|
||||
li x19, 0
|
||||
li x20, 0
|
||||
li x21, 0
|
||||
li x22, 0
|
||||
li x23, 0
|
||||
li x24, 0
|
||||
li x25, 0
|
||||
li x26, 0
|
||||
li x27, 0
|
||||
li x28, 0
|
||||
li x29, 0
|
||||
li x30, 0
|
||||
li x31, 0
|
||||
|
||||
// enable interrupt
|
||||
// li x3, 0x880
|
||||
// csrw mie, x3
|
||||
|
||||
csrw mie, 0
|
||||
csrw mip, 0
|
||||
la t0, trap_entry
|
||||
csrw mtvec, t0
|
||||
|
||||
#ifndef RISCV_QEMU
|
||||
// invalidate all memory for BTB,BHT,DCACHE,ICACHE
|
||||
li x3, 0x30013
|
||||
csrs mcor, x3
|
||||
// enable ICACHE,DCACHE,BHT,BTB,RAS,WA
|
||||
li x3, 0x7f
|
||||
csrs mhcr, x3
|
||||
// enable data_cache_prefetch, amr
|
||||
li x3, 0x610c
|
||||
csrs mhint, x3 #mhint
|
||||
#endif
|
||||
# enable fp
|
||||
li x3, 0x1 << 13
|
||||
csrs mstatus, x3
|
||||
|
||||
// Primary hart
|
||||
la sp, _stack_top
|
||||
|
||||
// Load data section
|
||||
la a0, _data_lma
|
||||
la a1, _data
|
||||
la a2, _edata
|
||||
bgeu a1, a2, 2f
|
||||
1:
|
||||
LOAD t0, (a0)
|
||||
STOR t0, (a1)
|
||||
addi a0, a0, REGSIZE
|
||||
addi a1, a1, REGSIZE
|
||||
bltu a1, a2, 1b
|
||||
2:
|
||||
|
||||
// Clear bss section
|
||||
la a0, _bss
|
||||
la a1, _ebss
|
||||
bgeu a0, a1, 2f
|
||||
1:
|
||||
// reduce branch time, be sure about bss alignment in linker script
|
||||
STOR zero, 0x00 (a0)
|
||||
STOR zero, 0x08 (a0)
|
||||
STOR zero, 0x10 (a0)
|
||||
STOR zero, 0x18 (a0)
|
||||
STOR zero, 0x20 (a0)
|
||||
STOR zero, 0x28 (a0)
|
||||
STOR zero, 0x30 (a0)
|
||||
STOR zero, 0x38 (a0)
|
||||
addi a0, a0, REGSIZE * 8
|
||||
bltu a0, a1, 1b
|
||||
2:
|
||||
|
||||
// argc, argv, envp is 0
|
||||
li a0, 0
|
||||
li a1, 0
|
||||
li a2, 0
|
||||
jal entry
|
||||
1:
|
||||
wfi
|
||||
j 1b
|
||||
|
||||
secondary:
|
||||
// TODO: Multicore is not supported
|
||||
wfi
|
||||
j secondary
|
||||
.cfi_endproc
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024/01/11 flyingcys The first version
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include <encoding.h>
|
||||
#include "tick.h"
|
||||
|
||||
static volatile rt_uint64_t time_elapsed = 0;
|
||||
static volatile unsigned long tick_cycles = 0;
|
||||
|
||||
#define CLINT_BASE (PLIC_PHY_ADDR + 0x4000000UL)
|
||||
|
||||
static volatile rt_uint32_t *mtimecmp_l = (volatile rt_uint32_t *)(CLINT_BASE + 0x4000UL);
|
||||
static volatile rt_uint32_t *mtimecmp_h = (volatile rt_uint32_t *)(CLINT_BASE + 0x4004UL);
|
||||
|
||||
rt_inline void set_ticks(rt_uint64_t value)
|
||||
{
|
||||
*mtimecmp_l = 0xFFFFFFFF;
|
||||
*mtimecmp_h = (rt_uint32_t)(value >> 32);
|
||||
*mtimecmp_l = (rt_uint32_t)(value & 0xFFFFFFFF);
|
||||
}
|
||||
|
||||
static rt_uint64_t get_ticks(void)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
"rdtime %0"
|
||||
: "=r"(time_elapsed));
|
||||
return time_elapsed;
|
||||
}
|
||||
|
||||
int rt_hw_tick_isr(void)
|
||||
{
|
||||
rt_tick_increase();
|
||||
set_ticks(get_ticks() + tick_cycles);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Sets and enable the timer interrupt */
|
||||
int rt_hw_tick_init(void)
|
||||
{
|
||||
/* Clear the Machine-Timer bit in MIE */
|
||||
clear_csr(mie, MIP_MTIP);
|
||||
|
||||
tick_cycles = TIMER_CLK_FREQ / RT_TICK_PER_SECOND;
|
||||
|
||||
set_ticks(get_ticks() + tick_cycles);
|
||||
|
||||
rt_kprintf("[rt_hw_tick_init] time_elapsed: %d tick_cycles:%d\n", time_elapsed, tick_cycles);
|
||||
|
||||
/* Enable the Machine-Timer bit in MIE */
|
||||
set_csr(mie, MIP_MTIP);
|
||||
|
||||
return 0;
|
||||
}
|
|
@ -0,0 +1,18 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024/01/11 flyingcys The first version
|
||||
*/
|
||||
|
||||
#ifndef __TICK_H__
|
||||
#define __TICK_H__
|
||||
|
||||
|
||||
int tick_isr(void);
|
||||
int rt_hw_tick_init(void);
|
||||
|
||||
#endif /* __TICK_H__ */
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024/01/11 flyingcys The first version
|
||||
*/
|
||||
#ifndef _LINUX_TYPES_H
|
||||
#define _LINUX_TYPES_H
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef CONFIG_64BIT
|
||||
typedef unsigned long uintptr_t;
|
||||
typedef unsigned long size_t;
|
||||
/* bsd */
|
||||
typedef unsigned char u_char;
|
||||
typedef unsigned short u_short;
|
||||
typedef unsigned int u_int;
|
||||
typedef unsigned long u_long;
|
||||
|
||||
/* sysv */
|
||||
typedef unsigned char unchar;
|
||||
typedef unsigned short ushort;
|
||||
typedef unsigned int uint;
|
||||
typedef unsigned long ulong;
|
||||
|
||||
typedef signed char s8;
|
||||
typedef signed short s16;
|
||||
typedef signed int s32;
|
||||
typedef signed long s64;
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef unsigned short u16;
|
||||
typedef unsigned int u32;
|
||||
typedef unsigned long u64;
|
||||
|
||||
typedef signed char __s8;
|
||||
typedef signed short __s16;
|
||||
typedef signed int __s32;
|
||||
typedef signed long __s64;
|
||||
|
||||
typedef unsigned char __u8;
|
||||
typedef unsigned short __u16;
|
||||
typedef unsigned int __u32;
|
||||
typedef unsigned long __u64;
|
||||
|
||||
#endif /* CONFIG_64BIT */
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* _LINUX_TYPES_H */
|
|
@ -0,0 +1,226 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024/01/11 flyingcys The first version
|
||||
*/
|
||||
_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x20000;
|
||||
/* _HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x1000000; */
|
||||
/*_HEAP_SIZE = 0x20000;*/
|
||||
|
||||
_EL0_STACK_SIZE = DEFINED(_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024;
|
||||
_EL1_STACK_SIZE = DEFINED(_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048;
|
||||
_EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;
|
||||
|
||||
CVIMMAP_FREERTOS_ADDR = 0x83f40000;
|
||||
CVIMMAP_FREERTOS_SIZE = 0xc0000;
|
||||
|
||||
/* Define Memories in the system */
|
||||
|
||||
MEMORY
|
||||
{
|
||||
psu_ddr_0_MEM_0 : ORIGIN = CVIMMAP_FREERTOS_ADDR , LENGTH = CVIMMAP_FREERTOS_SIZE
|
||||
}
|
||||
|
||||
/* Specify the default entry point to the program */
|
||||
|
||||
/*ENTRY(_vector_table)*/
|
||||
ENTRY(_start)
|
||||
|
||||
/* Define the sections, and where they are mapped in memory */
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text : {
|
||||
KEEP (*(.vectors))
|
||||
*(.boot)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu_warning)
|
||||
*(.gcc_execpt_table)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.ARM.extab)
|
||||
*(.gnu.linkonce.armextab.*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(8);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
. = ALIGN(8);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
. = ALIGN(8);
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(8);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
. = ALIGN(8);
|
||||
|
||||
__rt_utest_tc_tab_start = .;
|
||||
KEEP(*(UtestTcTab))
|
||||
__rt_utest_tc_tab_end = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.init (ALIGN(64)) : {
|
||||
KEEP (*(.init))
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.fini (ALIGN(64)) : {
|
||||
KEEP (*(.fini))
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.interp : {
|
||||
KEEP (*(.interp))
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.note-ABI-tag : {
|
||||
KEEP (*(.note-ABI-tag))
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.rodata : {
|
||||
. = ALIGN(64);
|
||||
__rodata_start = .;
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.srodata*)
|
||||
*(.gnu.linkonce.r.*)
|
||||
__rodata_end = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.rodata1 : {
|
||||
. = ALIGN(64);
|
||||
__rodata1_start = .;
|
||||
*(.rodata1)
|
||||
*(.rodata1.*)
|
||||
__rodata1_end = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.data : {
|
||||
. = ALIGN(64);
|
||||
_data = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.jcr)
|
||||
*(.got)
|
||||
*(.got.plt)
|
||||
_edata = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.data1 : {
|
||||
. = ALIGN(64);
|
||||
__data1_start = .;
|
||||
*(.data1)
|
||||
*(.data1.*)
|
||||
__data1_end = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.got : {
|
||||
*(.got)
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.got1 : {
|
||||
*(.got1)
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.got2 : {
|
||||
*(.got2)
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.ctors : {
|
||||
. = ALIGN(64);
|
||||
__CTOR_LIST__ = .;
|
||||
___CTORS_LIST___ = .;
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
__CTOR_END__ = .;
|
||||
___CTORS_END___ = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.dtors : {
|
||||
. = ALIGN(64);
|
||||
__DTOR_LIST__ = .;
|
||||
___DTORS_LIST___ = .;
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
__DTOR_END__ = .;
|
||||
___DTORS_END___ = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.fixup : {
|
||||
__fixup_start = .;
|
||||
*(.fixup)
|
||||
__fixup_end = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.eh_frame : {
|
||||
*(.eh_frame)
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.eh_framehdr : {
|
||||
__eh_framehdr_start = .;
|
||||
*(.eh_framehdr)
|
||||
__eh_framehdr_end = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.gcc_except_table : {
|
||||
*(.gcc_except_table)
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.bss (NOLOAD) : {
|
||||
. = ALIGN(64);
|
||||
_bss = .;
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(64);
|
||||
_ebss = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
/*_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );*/
|
||||
_data_lma = LOADADDR(.data);
|
||||
|
||||
/* Generate Stack and Heap definitions */
|
||||
.stack (NOLOAD) : {
|
||||
. = ALIGN(64);
|
||||
_stack_end_end = .;
|
||||
. += _STACK_SIZE;
|
||||
_stack_top = .;
|
||||
__rt_rvstack = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.heap (NOLOAD) : {
|
||||
. = ALIGN(64);
|
||||
_heap = .;
|
||||
HeapBase = .;
|
||||
_heap_start = .;
|
||||
*(.heap*)
|
||||
/*. += _HEAP_SIZE;*/
|
||||
/*_heap_size = _HEAP_SIZE; */
|
||||
_heap_end = .;
|
||||
HeapLimit = .;
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
HeapLimit = ORIGIN(psu_ddr_0_MEM_0) + LENGTH(psu_ddr_0_MEM_0);
|
||||
_end = .;
|
||||
}
|
||||
|
|
@ -0,0 +1,267 @@
|
|||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Project Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 32
|
||||
#define RT_CPUS_NR 1
|
||||
#define RT_ALIGN_SIZE 8
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 1024
|
||||
#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 2048
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_KSERVICE_USING_STDLIB
|
||||
#define RT_USING_DEBUG
|
||||
#define RT_DEBUGING_COLOR
|
||||
#define RT_DEBUGING_CONTEXT
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_SMALL_MEM_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 512
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x50100
|
||||
#define RT_BACKTRACE_LEVEL_MAX_NR 32
|
||||
#define ARCH_CPU_64BIT
|
||||
#define ARCH_RISCV
|
||||
#define ARCH_RISCV_FPU
|
||||
#define ARCH_RISCV_FPU_D
|
||||
#define ARCH_RISCV64
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 6144
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
#define RT_USING_MSH
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
#define FINSH_USING_OPTION_COMPLETION
|
||||
|
||||
/* DFS: device virtual file system */
|
||||
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_POSIX
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FD_MAX 16
|
||||
#define RT_USING_DFS_V1
|
||||
#define DFS_FILESYSTEMS_MAX 4
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 4
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* C/C++ and POSIX layer */
|
||||
|
||||
/* ISO-ANSI C layer */
|
||||
|
||||
/* Timezone and Daylight Saving Time */
|
||||
|
||||
#define RT_LIBC_USING_LIGHT_TZ_DST
|
||||
#define RT_LIBC_TZ_DEFAULT_HOUR 8
|
||||
#define RT_LIBC_TZ_DEFAULT_MIN 0
|
||||
#define RT_LIBC_TZ_DEFAULT_SEC 0
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
|
||||
/* Interprocess Communication (IPC) */
|
||||
|
||||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
|
||||
/* Network */
|
||||
|
||||
|
||||
/* Memory protection */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* CYW43012 WiFi */
|
||||
|
||||
|
||||
/* BL808 WiFi */
|
||||
|
||||
|
||||
/* CYW43439 WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
|
||||
|
||||
|
||||
/* XML: Extensible Markup Language */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* LVGL: powerful and easy-to-use embedded GUI library */
|
||||
|
||||
|
||||
/* u8g2: a monochrome graphic library */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* enhanced kernel services */
|
||||
|
||||
|
||||
/* acceleration: Assembly language or algorithmic acceleration packages */
|
||||
|
||||
|
||||
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
||||
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
|
||||
/* Arduino libraries */
|
||||
|
||||
|
||||
/* Projects and Demos */
|
||||
|
||||
|
||||
/* Sensors */
|
||||
|
||||
|
||||
/* Display */
|
||||
|
||||
|
||||
/* Timing */
|
||||
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
|
||||
/* Device Control */
|
||||
|
||||
|
||||
/* Other */
|
||||
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
/* General Drivers Configuration */
|
||||
|
||||
#define BSP_USING_UART
|
||||
#define RT_USING_UART1
|
||||
#define UART_IRQ_BASE 30
|
||||
#define BSP_USING_C906_LITTLE
|
||||
#define PLIC_PHY_ADDR 0x70000000
|
||||
#define IRQ_MAX_NR 128
|
||||
#define TIMER_CLK_FREQ 25000000
|
||||
|
||||
#endif
|
|
@ -0,0 +1,66 @@
|
|||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH ='risc-v'
|
||||
CPU ='rv64'
|
||||
CROSS_TOOL ='gcc'
|
||||
|
||||
# bsp lib config
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = r'../../..'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'/opt/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.0/bin'
|
||||
else:
|
||||
print('Please make sure your toolchains is GNU GCC!')
|
||||
exit(0)
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'riscv64-unknown-elf-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -march=rv64imafdc -mabi=lp64d -mcmodel=medany'
|
||||
CFLAGS = DEVICE + ' -std=gnu11 -ffunction-sections -fdata-sections -Wl,--gc-sections -Wno-pointer-to-int-cast -fno-builtin -Wno-missing-field-initializers -fdiagnostics-color=always'
|
||||
CFLAGS += ' -Wall -nostdlib'
|
||||
CFLAGS += ' -DCONFIG_64BIT'
|
||||
|
||||
LINKER_SCRIPTS = r'cv180x_lscript.ld'
|
||||
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
|
||||
LFLAGS = DEVICE + ' -nostartfiles -fms-extensions -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T ' + LINKER_SCRIPTS
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O2 -g'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O3'
|
||||
|
||||
CXXFLAGS = CFLAGS + ' -std=gnu++17 -Wno-multichar -Wno-parentheses'
|
||||
|
||||
DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
POST_ACTION += 'cd .. && ./combine-fip.sh c906_little/rtthread.bin\n'
|
|
@ -1,14 +1,17 @@
|
|||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c') + Glob('*.cpp') + Glob('*.S')
|
||||
src = ['drv_uart.c']
|
||||
CPPDEFINES = []
|
||||
|
||||
CPPPATH = [cwd]
|
||||
|
||||
if GetDepend('BSP_USING_CV1800B'):
|
||||
if GetDepend('BSP_USING_CV1800B') or GetDepend('BSP_USING_C906_LITTLE'):
|
||||
CPPPATH += [cwd + r'/cv1800b']
|
||||
|
||||
if GetDepend('BSP_USING_CV1800B'):
|
||||
src += ['drv_gpio.c']
|
||||
|
||||
CPPDEFINES += ['-DCONFIG_64BIT']
|
||||
|
||||
group = DefineGroup('drivers', src, depend = [''], CPPDEFINES = CPPDEFINES, CPPPATH = CPPPATH)
|
||||
|
|
|
@ -11,7 +11,9 @@
|
|||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
#ifdef RT_USING_SMART
|
||||
#include <ioremap.h>
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_PIN
|
||||
#include "drv_gpio.h"
|
||||
|
@ -305,7 +307,7 @@ static void rt_hw_gpio_isr(int irqno, void *param)
|
|||
|
||||
int rt_hw_gpio_init(void)
|
||||
{
|
||||
#ifdef RT_USING_LWP
|
||||
#ifdef RT_USING_SMART
|
||||
#define BSP_IOREMAP_GPIO_DEVICE(no) \
|
||||
rt_ioremap((void *)(DWAPB_GPIOA_BASE + (no) * DWAPB_GPIO_SIZE), DWAPB_GPIO_SIZE);
|
||||
|
||||
|
|
Loading…
Reference in New Issue