[bsp][ab32vg1] Add support with uart2 and optimize serial port configuration with env tool

This commit is contained in:
iysheng 2021-03-18 13:49:01 +08:00
parent 6de81af04c
commit a05801911e
7 changed files with 123 additions and 17 deletions

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@ -2,12 +2,6 @@ menu "Hardware Drivers Config"
menu "Onboard Peripheral Drivers" menu "Onboard Peripheral Drivers"
config BSP_USING_USB_TO_USART
bool "Enable USB TO USART (uart0)"
select BSP_USING_UART
select BSP_USING_UART0
default y
menuconfig BSP_USING_AUDIO menuconfig BSP_USING_AUDIO
bool "Enable Audio Device" bool "Enable Audio Device"
select RT_USING_AUDIO select RT_USING_AUDIO
@ -34,11 +28,22 @@ menu "Onboard Peripheral Drivers"
endmenu endmenu
menu "On-chip Peripheral Drivers" menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_UART
menuconfig BSP_USING_UART0 bool "Enable UART"
if BSP_USING_UART
config BSP_USING_UART0
bool "Enable UART0" bool "Enable UART0"
select RT_USING_SERIAL select RT_USING_SERIAL
default y default y
config BSP_USING_UART1
bool "Enable UART1"
select RT_USING_SERIAL
default n
config BSP_USING_UART2
bool "Enable UART2"
select RT_USING_SERIAL
default n
endif
config BSP_USING_SDIO config BSP_USING_SDIO
bool "Enable SDIO" bool "Enable SDIO"

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@ -35,6 +35,22 @@ void hal_uart_mspinit(struct uart_handle *huart)
gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | UT1RXMAP_AF; gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | UT1RXMAP_AF;
hal_gpio_init(GPIOA_BASE, &gpio_init); hal_gpio_init(GPIOA_BASE, &gpio_init);
/* Interrupt */ /* Interrupt */
} else if (huart->instance == UART2_BASE) {
gpio_init.pin = GPIO_PIN_2;
gpio_init.dir = GPIO_DIR_OUTPUT;
gpio_init.de = GPIO_DIGITAL;
gpio_init.alternate = GPIO_AF_MAP_Gx(UT2TXMAP_AF, GPIO_AF_G2);
gpio_init.af_con = GPIO_AFEN | GPIO_AFCON1 | UT2TXMAP_AF;
hal_gpio_init(GPIOB_BASE, &gpio_init);
gpio_init.pin = GPIO_PIN_1;
gpio_init.pull = GPIO_PULLUP;
gpio_init.dir = GPIO_DIR_INPUT;
gpio_init.de = GPIO_DIGITAL;
gpio_init.alternate = GPIO_AF_MAP_Gx(UT2RXMAP_AF, GPIO_AF_G2);
gpio_init.af_con = GPIO_AFEN | GPIO_AFCON1 | UT2RXMAP_AF;
hal_gpio_init(GPIOB_BASE, &gpio_init);
/* Interrupt */
} }
} }

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@ -21,20 +21,40 @@
enum enum
{ {
#ifdef BSP_USING_UART0
UART0_INDEX, UART0_INDEX,
#endif
#ifdef BSP_USING_UART1
UART1_INDEX, UART1_INDEX,
#endif
#ifdef BSP_USING_UART2
UART2_INDEX,
#endif
}; };
static struct ab32_uart_config uart_config[] = static struct ab32_uart_config uart_config[] =
{ {
#ifdef BSP_USING_UART0
{ {
.name = "uart0", .name = "uart0",
.instance = UART0_BASE, .instance = UART0_BASE,
.mode = UART_MODE_TX_RX | UART_MODE_1LINE,
}, },
#endif
#ifdef BSP_USING_UART1
{ {
.name = "uart1", .name = "uart1",
.instance = UART1_BASE, .instance = UART1_BASE,
.mode = UART_MODE_TX_RX,
},
#endif
#ifdef BSP_USING_UART2
{
.name = "uart2",
.instance = UART2_BASE,
.mode = UART_MODE_TX_RX,
} }
#endif
}; };
static struct ab32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0}; static struct ab32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
@ -48,7 +68,7 @@ static rt_err_t ab32_configure(struct rt_serial_device *serial, struct serial_co
uart = rt_container_of(serial, struct ab32_uart, serial); uart = rt_container_of(serial, struct ab32_uart, serial);
uart->handle.instance = uart->config->instance; uart->handle.instance = uart->config->instance;
uart->handle.init.baud = cfg->baud_rate; uart->handle.init.baud = cfg->baud_rate;
uart->handle.init.mode = UART_MODE_TX_RX; uart->handle.init.mode = uart->config->mode;
switch (cfg->data_bits) switch (cfg->data_bits)
{ {
@ -152,14 +172,24 @@ static void uart_isr(int vector, void *param)
{ {
rt_interrupt_enter(); rt_interrupt_enter();
#ifdef BSP_USING_UART0
if(hal_uart_getflag(UART0_BASE, UART_FLAG_RXPND)) //RX one byte finish if(hal_uart_getflag(UART0_BASE, UART_FLAG_RXPND)) //RX one byte finish
{ {
rt_hw_serial_isr(&(uart_obj[UART0_INDEX].serial), RT_SERIAL_EVENT_RX_IND); rt_hw_serial_isr(&(uart_obj[UART0_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
} }
// if(hal_uart_getflag(UART1_BASE, UART_FLAG_RXPND)) //RX one byte finish #endif
// { #ifdef BSP_USING_UART1
// rt_hw_serial_isr(&(uart_obj[UART1_INDEX].serial), RT_SERIAL_EVENT_RX_IND); if(hal_uart_getflag(UART1_BASE, UART_FLAG_RXPND)) //RX one byte finish
// } {
rt_hw_serial_isr(&(uart_obj[UART1_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
}
#endif
#ifdef BSP_USING_UART2
if(hal_uart_getflag(UART2_BASE, UART_FLAG_RXPND)) //RX one byte finish
{
rt_hw_serial_isr(&(uart_obj[UART2_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
}
#endif
rt_interrupt_leave(); rt_interrupt_leave();
} }

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@ -20,6 +20,8 @@ struct ab32_uart_config
{ {
const char *name; const char *name;
hal_sfr_t instance; hal_sfr_t instance;
uint8_t mode;
uint8_t reserve[3];
// struct dma_config *dma_rx; // struct dma_config *dma_rx;
// struct dma_config *dma_tx; // struct dma_config *dma_tx;
}; };

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@ -33,8 +33,15 @@
* G1: tx:PA7 rx:PA6 * G1: tx:PA7 rx:PA6
* G2: tx:PA4 rx:PA3 * G2: tx:PA4 rx:PA3
* G3: tx:PF2 rx:map to tx * G3: tx:PF2 rx:map to tx
*
* UART2:
* G1: tx:PE3 rx:PE2
* G2: tx:PB2 rx:PB1
*/ */
#define UT2RXMAP_AF (8u)
#define UT2TXMAP_AF (4u)
#define UT1RXMAP_AF (28u) #define UT1RXMAP_AF (28u)
#define UT1TXMAP_AF (24u) #define UT1TXMAP_AF (24u)
#define HSUTRXMAP_AF (20u) #define HSUTRXMAP_AF (20u)

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@ -78,6 +78,7 @@ struct uart_handle
*/ */
#define UART_MODE_TX (0x00u) /*!< TX mode */ #define UART_MODE_TX (0x00u) /*!< TX mode */
#define UART_MODE_TX_RX (0x01u) /*!< RX and TX mode */ #define UART_MODE_TX_RX (0x01u) /*!< RX and TX mode */
#define UART_MODE_1LINE (0x02u) /*!< oneline mode */
/** /**
* @} * @}

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@ -27,10 +27,51 @@ void hal_uart_setbaud(hal_sfr_t uartx, uint32_t baud)
uint32_t baud_cfg; uint32_t baud_cfg;
uartx[UARTxCON] |= UART_CLK_SRC1; uartx[UARTxCON] |= UART_CLK_SRC1;
baud_cfg = (26000000/2)/baud; //1.5M baud_cfg = (26000000/2)/baud;
uartx[UARTxBAUD] = (baud_cfg << 16) | baud_cfg; uartx[UARTxBAUD] = (baud_cfg << 16) | baud_cfg;
} }
/**
* @brief Set the UART misc paramter.
*
* @param uartx This parameter can be UARTxN where x can be (0.2).
* @param param uart config paramter pointer.
*/
void hal_uart_setparam(hal_sfr_t uartx, struct uart_init *param)
{
switch (param->word_len)
{
case UART_WORDLENGTH_8B:
uartx[UARTxCON] &= ~UART_BIT9_ENABLE;
break;
case UART_WORDLENGTH_9B:
uartx[UARTxCON] |= UART_BIT9_ENABLE;
break;
default:
break;
}
switch (param->stop_bits)
{
case UART_STOPBITS_1:
uartx[UARTxCON] &= ~UART_SB2_ENABLE;
break;
case UART_STOPBITS_2:
uartx[UARTxCON] |= UART_SB2_ENABLE;
break;
default:
break;
}
if (param->mode & UART_MODE_1LINE)
{
uartx[UARTxCON] |= UART_1LINE_ENABLE;
}
else
{
uartx[UARTxCON] &= ~UART_1LINE_ENABLE;
}
}
/** /**
* @brief Initialize the UART mode. * @brief Initialize the UART mode.
* *
@ -157,11 +198,15 @@ void uart_config_all(struct uart_handle *huart)
hal_rcu_periph_clk_enable(RCU_UART0); hal_rcu_periph_clk_enable(RCU_UART0);
} else if (huart->instance == UART1_BASE) { } else if (huart->instance == UART1_BASE) {
hal_rcu_periph_clk_enable(RCU_UART1); hal_rcu_periph_clk_enable(RCU_UART1);
} else if (huart->instance == UART2_BASE) {
hal_rcu_periph_clk_enable(RCU_UART2);
} else { } else {
return; /* Not support! */ return; /* Not support! */
} }
hal_uart_deinit(huart->instance);
hal_uart_setbaud(huart->instance, huart->init.baud); hal_uart_setbaud(huart->instance, huart->init.baud);
hal_uart_setparam(huart->instance, &huart->init);
if (huart->init.mode != UART_MODE_TX) { if (huart->init.mode != UART_MODE_TX) {
hal_uart_control(huart->instance, UART_RX_ENABLE, HAL_ENABLE); hal_uart_control(huart->instance, UART_RX_ENABLE, HAL_ENABLE);