[bsp][cvitek] 在Milk-V Duo 256M开发板中支持ARM核运行RT-Thread标准版和Smart版内核 (#8800)

* Supports ARM core of Milk-V Duo 256M development board

* add fip.bin(arm)
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liYangYang 2024-04-16 09:49:41 +08:00 committed by GitHub
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commit 9c359fd4c8
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mainmenu "RT-Thread Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
config SOC_CV18XX_AARCH64
bool
select ARCH_ARMV8
select ARCH_CPU_64BIT
select ARCH_ARM_MMU
select RT_USING_CACHE
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
select RT_USING_GIC
select BSP_USING_GIC
select ARCH_MM_MMU
default y
choice
prompt "Board Type"
default BOARD_TYPE_MILKV_DUO256M
config BOARD_TYPE_MILKV_DUO256M
bool "milkv-duo256m"
config BOARD_TYPE_MILKV_DUO256M_SPINOR
bool "milkv-duo256m-spinor"
endchoice
source "$BSP_DIR/board/Kconfig"

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# Milkv-Duo256M 板级支持包说明
## 1. 简介
Milk-V Duo 256M 是 Duo 的升级版本,内存提升至 256M满足需要更大内存容量的应用。采用 SG2002 计算系列芯片,计算能力提升至 1.0TOPS@INT8。它可以实现 RISC-V/ARM 架构之间的无缝切换,并支持双系统同时运行。此外,它还包含 SPI、UART 等一系列丰富的 GPIO 接口,适合边缘智能监控领域的各种硬件开发,包括 IP 摄像头、智能猫眼锁、可视门铃等。
该板级支持包主要是针对**ARM架构的大核**实现的一份移植支持RT-Thread标准版和Smart版内核。
## 2. 编译说明
推荐使用ubuntu20的[env环境](https://github.com/RT-Thread/env)当然也可以使用windows上的[env工具](https://www.rt-thread.org/download.html#download-rt-thread-env-tool)进行编译。下面介绍**标准版**和**Smart版本**的编译流程。
### 2.1 RT-Thread编译
**1.menuconfig配置工程**
该BSP默认menuconfig支持的就是RT-Thread标准版无需配置工程。
**2.配置工具链相关环境:**
依次执行下面命令进行环境变量的相关配置:
```shell
export RTT_CC=gcc
export RTT_EXEC_PATH="/opt/tools/gnu_gcc/arm-gnu-toolchain-13.2.Rel1-x86_64-aarch64-none-elf/bin"
export RTT_CC_PREFIX=aarch64-none-elf-
export PATH=$PATH:$RTT_EXEC_PATH
```
**3.编译:**
```shell
scons -j12
```
### 2.2 RT-Smart编译
**1.menuconfig配置工程**
```shell
RT-Thread Kernel --->
[*] Enable RT-Thread Smart (microkernel on kernel/userland)
```
**2.配置工具链相关环境:**
依次执行下面命令进行环境变量的相关配置:
```shell
export RTT_CC=gcc
export RTT_EXEC_PATH="/opt/tools/gnu_gcc/aarch64-linux-musleabi_for_x86_64-pc-linux-gnu/bin"
export RTT_CC_PREFIX=aarch64-linux-musleabi-
export PATH=$PATH:$RTT_EXEC_PATH
```
**3.编译:**
```shell
scons -j12
```
如果编译正确无误,会产生 `rtthread.elf`, `rtthread.bin` 文件。
## 3. 运行
> 目前仅支持使用uboot对 `rtthread.bin` 文件进行加载uboot对 `boot.sd` 的加载方式后续会实现。
1. 将 SD 卡分为 2 个分区,第 1 个分区用于存放 bin 文件,第 2 个分区用于作为数据存储分区,分区格式为 `FAT32`
2. 将bsp的boot目录下的 `fip.bin` 和编译生成的 `rtthread.bin` 复制 SD 卡第一个分区中。后续更新固件只需要复制 `rtthread.bin` 文件即可。
配置**串口0**参数: 115200 8N1 ,硬件和软件流控为关。
进入uboot命令行后依次输入以下命令。
```shell
fatload mmc 0:1 0x80200000 rtthread.bin
dcache flush
go 0x80200000
```
> 0x80200000为rtthread.bin加载到内存的位置可在menuconfig中自己修改注意不能与小核固件加载位置重叠。
完成后可以看到串口的输出信息:
**标准版log信息**
```shell
heap: [0x8028f2b0 - 0x84000000]
\ | /
- RT - Thread Operating System
/ | \ 5.1.0 build Apr 16 2024 00:05:56
2006 - 2024 Copyright by RT-Thread team
hello rt-thread!
msh />
```
**Smart版log信息**
```shell
heap: [0x002f62c0 - 0x04000000]
\ | /
- RT - Thread Smart Operating System
/ | \ 5.1.0 build Apr 16 2024 00:04:47
2006 - 2024 Copyright by RT-Thread team
[E/lwp] lwp_startup: init program not found
Switching to legacy mode...
hello rt-thread!
msh />
```
## 4. 注意事项
目前RISC-V(Smart版本)支持外设物理地址映射到完全相同的虚拟地址而ARM(Smart版本)目前是不支持这样搞的所以在编写驱动的时候应该使用rt_ioremap这样的函数讲物理地址映射到可访问的虚拟地址上去。为了保证ARM的Smart版本内核能够成功运行目前仅对uart和pinctrl的驱动进行了适配。其他驱动可能会因为未进行ioremap导致不可用。
## 5. 联系人信息
维护人:[liYony](https://github.com/liYony)

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# for module compiling
import os
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')

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import os
import sys
import rtconfig
import re
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
TRACE_CONFIG = ""
content = ""
with open("rtconfig.h") as f:
for line in f.readlines():
if line.find("RT_BACKTRACE_FUNCTION_NAME") != -1:
for token in line.split(" "):
if re.match(r'RT_BACKTRACE_FUNCTION_NAME$', token, flags=0):
TRACE_CONFIG = " "
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS + TRACE_CONFIG,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS + TRACE_CONFIG,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS + TRACE_CONFIG,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
env['ASCOM'] = env['ASPPCOM']
env['LINKCOM'] = '$LINK -o $TARGET $LINKFLAGS $__RPATH $SOURCES $_LIBDIRFLAGS -Wl,--start-group $_LIBFLAGS -Wl,--end-group'
Export('RTT_ROOT')
Export('rtconfig')
SDK_ROOT = os.path.abspath('./')
if os.path.exists(SDK_ROOT + '/drivers'):
drivers_path_prefix = SDK_ROOT + '/drivers'
else:
drivers_path_prefix = os.path.dirname(SDK_ROOT) + '/drivers'
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT)
# include libraries
objs.extend(SConscript(drivers_path_prefix + '/SConscript', variant_dir='build/drivers', duplicate=0))
# make a building
DoBuilding(TARGET, objs)

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from building import *
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020/10/7 bernard the first version
*/
#include <rtthread.h>
int main(void)
{
rt_kprintf("hello rt-thread!\n");
return 0;
}

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menu "General Drivers Configuration"
config BSP_SUPPORT_FPU
bool "Using Float"
default y
config BSP_USING_GIC
bool
default y
choice
prompt "GIC Version"
default BSP_USING_GICV2
config BSP_USING_GICV2
bool "GICv2"
config BSP_USING_GICV3
bool "GICv3"
endchoice
menuconfig BSP_USING_UART
bool "Using UART"
select RT_USING_SERIAL
default y
if BSP_USING_UART
config RT_USING_UART0
bool "Enable UART 0"
default y
config UART_IRQ_BASE
int
default 60
config RT_USING_UART1
bool "Enable UART 1"
default n
config RT_USING_UART2
bool "Enable UART 2"
default n
config RT_USING_UART3
bool "Enable UART 3"
default n
config RT_USING_UART4
bool "Enable UART 4"
default n
endif
config BSP_USING_ADC
bool "Using ADC"
select RT_USING_ADC
default n
config BSP_USING_SPI
bool "Using SPI"
select RT_USING_SPI
default n
menuconfig BSP_USING_PWM
bool "Using PWM"
select RT_USING_PWM
default n
if BSP_USING_PWM
config BSP_USING_PWM0
bool "Enable PWM 0"
default n
config BSP_USING_PWM1
bool "Enable PWM 1"
default n
config BSP_USING_PWM2
bool "Enable PWM 2"
default n
config BSP_USING_PWM3
bool "Enable PWM 3"
default n
endif
endmenu

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from building import *
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp') + Glob('*.S')
CPPPATH = [cwd]
group = DefineGroup('Driver', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

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/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-04-15 liYony the first version
*/
#include <mmu.h>
#include <board.h>
#include <mm_aspace.h>
#include <mm_page.h>
#include <drv_uart.h>
#include <gtimer.h>
extern size_t MMUTable[];
#ifdef RT_USING_SMART
struct mem_desc platform_mem_desc[] = {
{KERNEL_VADDR_START, KERNEL_VADDR_START + 0x0FFFFFFF, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM},
};
#else
struct mem_desc platform_mem_desc[] =
{
{0x80200000, 0x90200000 - 1, 0x80200000, NORMAL_MEM}, /* memory size 256M */
{0x01000000, 0x80000000 - 1, 0x01000000, DEVICE_MEM},
};
#endif
const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]);
void idle_wfi(void)
{
asm volatile("wfi");
}
static rt_ubase_t pinmux_base = RT_NULL;
void rt_hw_board_init(void)
{
#ifdef RT_USING_SMART
rt_hw_mmu_map_init(&rt_kernel_space, (void *)0xfffffffff0000000, 0x10000000, MMUTable, PV_OFFSET);
#else
rt_hw_mmu_map_init(&rt_kernel_space, (void *)0xffffd0000000, 0x10000000, MMUTable, 0);
#endif
rt_region_t init_page_region;
init_page_region.start = PAGE_START;
init_page_region.end = PAGE_END;
rt_page_init(init_page_region);
rt_hw_mmu_setup(&rt_kernel_space, platform_mem_desc, platform_mem_desc_size);
#ifdef RT_USING_HEAP
/* initialize system heap */
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
/* initialize hardware interrupt */
rt_hw_interrupt_init();
/* initialize uart */
rt_hw_uart_init();
/* initialize timer for os tick */
rt_hw_gtimer_init();
rt_thread_idle_sethook(idle_wfi);
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
/* set console device */
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
rt_kprintf("heap: [0x%08x - 0x%08x]\n", HEAP_BEGIN, HEAP_END);
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}
rt_ubase_t pinmux_base_ioremap(void)
{
if (pinmux_base == RT_NULL)
{
pinmux_base = (rt_size_t)rt_ioremap((void*)0x03001000, 0x1000);
}
return pinmux_base;
}

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/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-04-15 liYony the first version
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <cv18xx.h>
extern unsigned char __bss_end;
#define HEAP_BEGIN ((void*)&__bss_end)
#ifdef RT_USING_SMART
#define HEAP_END ((size_t)KERNEL_VADDR_START + 64 * 1024 * 1024)
#define PAGE_START HEAP_END
#define PAGE_END ((size_t)KERNEL_VADDR_START + 128 * 1024 * 1024)
#else
#define HEAP_END (ARCH_RAM_OFFSET + 64 * 1024 * 1024)
#define PAGE_START HEAP_END
#define PAGE_END ((size_t)PAGE_START + 64 * 1024 * 1024)
#endif
void rt_hw_board_init(void);
int rt_hw_uart_init(void);
#endif /* __BOARD_H__ */

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/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-04-15 liYony the first version
*/
#ifndef __CV18XX_H__
#define __CV18XX_H__
#include <rtdef.h>
#include <ioremap.h>
#ifdef RT_USING_SMART
#include <mmu.h>
#endif
#define __REG32(x) (*((volatile unsigned int *)(x)))
#define __REG16(x) (*((volatile unsigned short *)(x)))
/* GIC */
#define MAX_HANDLERS 116
#define GIC_IRQ_START 0
#define ARM_GIC_NR_IRQS 116
#define ARM_GIC_MAX_NR 1
/* GICv2 */
#define GIC400_DISTRIBUTOR_PPTR 0x01F01000U
#define GIC400_CONTROLLER_PPTR 0x01F02000U
#define GIC400_SIZE 0x00001000U
/* the basic constants and interfaces needed by gic */
rt_inline rt_ubase_t platform_get_gic_dist_base(void)
{
return GIC400_DISTRIBUTOR_PPTR;
}
rt_inline rt_ubase_t platform_get_gic_cpu_base(void)
{
return GIC400_CONTROLLER_PPTR;
}
#endif /* __CV18XX_H__ */

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#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Project Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 16
#define RT_CPUS_NR 1
#define RT_ALIGN_SIZE 8
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 100
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 8192
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 8192
/* kservice optimization */
#define RT_KSERVICE_USING_STDLIB
#define RT_KPRINTF_USING_LONGLONG
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* Memory Management */
#define RT_PAGE_MAX_ORDER 11
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_MEMHEAP
#define RT_MEMHEAP_FAST_MODE
#define RT_USING_MEMHEAP_AS_HEAP
#define RT_USING_MEMHEAP_AUTO_BINDING
#define RT_USING_MEMTRACE
#define RT_USING_HEAP
#define RT_USING_DEVICE
#define RT_USING_DEVICE_OPS
#define RT_USING_INTERRUPT_INFO
#define RT_USING_SCHED_THREAD_CTX
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x50100
#define RT_USING_STDC_ATOMIC
#define RT_BACKTRACE_LEVEL_MAX_NR 32
/* AArch64 Architecture Configuration */
#define ARCH_TEXT_OFFSET 0x200000
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
#define ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
#define RT_USING_CPU_FFS
#define ARCH_MM_MMU
#define ARCH_ARM
#define ARCH_ARM_MMU
#define ARCH_ARMV8
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 8192
#define RT_MAIN_THREAD_PRIORITY 10
#define RT_USING_MSH
#define RT_USING_FINSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 10
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 256
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
#define FINSH_USING_OPTION_COMPLETION
/* DFS: device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FD_MAX 32
#define RT_USING_DFS_V2
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
#define RT_USING_DFS_ROMFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 8192
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 256
#define RT_USING_NULL
#define RT_USING_ZERO
#define RT_USING_RANDOM
#define RT_USING_PM
#define PM_TICKLESS_THRESHOLD_TIME 2
#define RT_USING_DEV_BUS
#define RT_USING_VIRTIO
#define RT_USING_VIRTIO10
#define RT_USING_VIRTIO_MMIO_ALIGN
#define RT_USING_VIRTIO_BLK
#define RT_USING_VIRTIO_CONSOLE
#define RT_USING_VIRTIO_CONSOLE_PORT_MAX_NR 4
#define RT_USING_VIRTIO_GPU
#define RT_USING_VIRTIO_INPUT
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* C/C++ and POSIX layer */
/* ISO-ANSI C layer */
/* Timezone and Daylight Saving Time */
#define RT_LIBC_USING_LIGHT_TZ_DST
#define RT_LIBC_TZ_DEFAULT_HOUR 8
#define RT_LIBC_TZ_DEFAULT_MIN 0
#define RT_LIBC_TZ_DEFAULT_SEC 0
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_FS
#define RT_USING_POSIX_DEVIO
#define RT_USING_POSIX_STDIO
#define RT_USING_POSIX_POLL
#define RT_USING_POSIX_SELECT
#define RT_USING_POSIX_TERMIOS
#define RT_USING_POSIX_DELAY
#define RT_USING_POSIX_CLOCK
#define RT_USING_POSIX_TIMER
/* Interprocess Communication (IPC) */
#define RT_USING_POSIX_PIPE
#define RT_USING_POSIX_PIPE_SIZE 512
/* Socket is in the 'Network' category */
/* Network */
/* Memory protection */
/* Utilities */
#define RT_USING_RESOURCE_ID
#define RT_USING_ADT
#define RT_USING_ADT_AVL
#define RT_USING_ADT_BITMAP
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* CYW43012 WiFi */
/* BL808 WiFi */
/* CYW43439 WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
/* XML: Extensible Markup Language */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */
/* sensors drivers */
/* touch drivers */
/* Kendryte SDK */
/* AI packages */
/* Signal Processing and Control Algorithm Packages */
/* miscellaneous packages */
/* project laboratory */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
/* Arduino libraries */
/* Projects and Demos */
/* Sensors */
/* Display */
/* Timing */
/* Data Processing */
/* Data Storage */
/* Communication */
/* Device Control */
/* Other */
/* Signal IO */
/* Uncategorized */
#define SOC_CV18XX_AARCH64
#define BOARD_TYPE_MILKV_DUO256M
/* General Drivers Configuration */
#define BSP_SUPPORT_FPU
#define BSP_USING_GIC
#define BSP_USING_GICV2
#define BSP_USING_UART
#define RT_USING_UART0
#define UART_IRQ_BASE 60
#endif

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import os
# toolchains options
ARCH ='aarch64'
CPU ='cortex-a'
CROSS_TOOL = 'gcc'
PLATFORM = 'gcc'
EXEC_PATH = os.getenv('RTT_EXEC_PATH') or '/usr/bin'
BUILD = 'debug'
if PLATFORM == 'gcc':
# toolchains
PREFIX = os.getenv('RTT_CC_PREFIX') or 'aarch64-none-elf-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
CPP = PREFIX + 'cpp'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
STRIP = PREFIX + 'strip'
CFPFLAGS = ' '
AFPFLAGS = ' '
DEVICE = ' -march=armv8-a -mtune=cortex-a53 -ftree-vectorize -ffast-math -funwind-tables -fno-strict-aliasing'
CPPFLAGS= ' -E -P -x assembler-with-cpp'
CXXFLAGS= DEVICE + CFPFLAGS + ' -Wall -fdiagnostics-color=always'
CFLAGS = DEVICE + CFPFLAGS + ' -Wall -Wno-cpp -std=gnu99 -fdiagnostics-color=always'
AFLAGS = ' -c' + AFPFLAGS + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,system_vectors -T link.lds' + ' -lsupc++ -lgcc -static'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2'
CXXFLAGS += ' -O0 -gdwarf-2'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -Os'
CXXFLAGS += ' -Os'
CXXFLAGS += ' -Woverloaded-virtual -fno-exceptions -fno-rtti'
DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

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@ -252,30 +252,45 @@ int rt_hw_uart_init(void)
PINMUX_CONFIG(UART0_RX, UART0_RX);
PINMUX_CONFIG(UART0_TX, UART0_TX);
BSP_INSTALL_UART_DEVICE(0);
#if defined(ARCH_ARM) && defined(RT_USING_SMART)
uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
#endif
#ifdef RT_USING_UART1
PINMUX_CONFIG(IIC0_SDA, UART1_RX);
PINMUX_CONFIG(IIC0_SCL, UART1_TX);
BSP_INSTALL_UART_DEVICE(1);
#if defined(ARCH_ARM) && defined(RT_USING_SMART)
uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
#endif
#ifdef RT_USING_UART2
PINMUX_CONFIG(SD1_D1, UART2_RX);
PINMUX_CONFIG(SD1_D2, UART2_TX);
BSP_INSTALL_UART_DEVICE(2);
#if defined(ARCH_ARM) && defined(RT_USING_SMART)
uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
#endif
#ifdef RT_USING_UART3
PINMUX_CONFIG(SD1_D1, UART3_RX);
PINMUX_CONFIG(SD1_D2, UART3_TX);
BSP_INSTALL_UART_DEVICE(3);
#if defined(ARCH_ARM) && defined(RT_USING_SMART)
uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
#endif
#ifdef RT_USING_UART4
PINMUX_CONFIG(SD1_GP0, UART4_RX);
PINMUX_CONFIG(SD1_GP1, UART4_TX);
BSP_INSTALL_UART_DEVICE(4);
#if defined(ARCH_ARM) && defined(RT_USING_SMART)
uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
#endif
return 0;

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@ -23,7 +23,12 @@
#define PAD_MIPI_TXM0__MIPI_TXM0 0
#define PAD_MIPI_TXP0__MIPI_TXP0 0
#if defined(ARCH_ARM) && defined(RT_USING_SMART)
extern rt_ubase_t pinmux_base_ioremap(void);
#define PINMUX_BASE pinmux_base_ioremap()
#else
#define PINMUX_BASE 0x03001000
#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
#define PINMUX_MASK(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_MASK
#define PINMUX_OFFSET(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_OFFSET
#define PINMUX_VALUE(PIN_NAME, FUNC_NAME) PIN_NAME##__##FUNC_NAME

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@ -9,6 +9,7 @@
#include <stdint.h>
#include "types.h"
#ifndef ARCH_ARM
#define __raw_readb(a) (*(volatile unsigned char *)(a))
#define __raw_readw(a) (*(volatile unsigned short *)(a))
#define __raw_readl(a) (*(volatile unsigned int *)(a))
@ -39,13 +40,12 @@
#define writew(v, c) ({ __io_bw(); __raw_writew((v), (c)); __io_aw(); })
#define writel(v, c) ({ __io_bw(); __raw_writel((v), (c)); __io_aw(); })
#ifdef CONFIG_64BIT
#define readq(c) ({ u64 __v; __io_br(); __v = __raw_readq(c); __io_ar(__v); __v; })
#define writeq(v, c) ({ __io_bw(); __raw_writeq((v), (c)); __io_aw(); })
#endif // CONFIG_64BIT
/*
#else
#define __raw_readb(a) (*(volatile unsigned char *)(a))
#define __raw_readw(a) (*(volatile unsigned short *)(a))
#define __raw_readl(a) (*(volatile unsigned int *)(a))
@ -69,7 +69,7 @@
#define cpu_write8(a, v) writeb(a, v)
#define cpu_write16(a, v) writew(a, v)
#define cpu_write32(a, v) writel(a, v)
*/
#endif /* ARCH_ARM */
#define mmio_wr32 mmio_write_32
#define mmio_rd32 mmio_read_32