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STM32G071 BSP对SPI和UART DMA读写的支持
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7b53218720
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9a9a7b3593
@ -20,32 +20,62 @@ extern "C" {
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/* DMA1 channel1 */
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#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
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#define SPI1_RX_DMA_IRQHandler DMA1_Channel1_IRQHandler
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#define SPI1_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
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#define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI1_RX_DMA_INSTANCE DMA1_Channel1
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#define SPI1_RX_DMA_REQUEST DMA_REQUEST_SPI1_RX
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#define SPI1_RX_DMA_IRQ DMA1_Channel1_IRQn
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#ifdef BSP_UART1_RX_USING_DMA
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#undef BSP_UART1_RX_USING_DMA
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#endif
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#ifdef BSP_SPI2_RX_USING_DMA
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#undef BSP_SPI2_RX_USING_DMA
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#endif
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
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#define UART1_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
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#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART1_RX_DMA_INSTANCE DMA1_Channel1
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#define UART1_RX_DMA_REQUEST DMA_REQUEST_USART1_RX
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#define UART1_RX_DMA_IRQ DMA1_Channel1_IRQn
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#ifdef BSP_SPI2_RX_USING_DMA
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#undef BSP_SPI2_RX_USING_DMA
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#endif
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#elif defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE)
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#define SPI2_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
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#define SPI2_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI2_RX_DMA_INSTANCE DMA1_Channel1
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#define SPI2_RX_DMA_REQUEST DMA_REQUEST_SPI2_RX
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#define SPI2_RX_DMA_IRQ DMA1_Channel1_IRQn
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#endif
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/* DMA1 channle2-3 */
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#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
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#define SPI1_TX_DMA_IRQHandler DMA1_Channel2_3_IRQHandler
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#define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI1_TX_DMA_INSTANCE DMA1_Channel2
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#define SPI1_TX_DMA_REQUEST DMA_REQUEST_SPI1_TX
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#define SPI1_TX_DMA_IRQ DMA1_Channel2_3_IRQn
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#define SPI1_DMA_TX_IRQHandler DMA1_Channel2_3_IRQHandler
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#define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI1_TX_DMA_INSTANCE DMA1_Channel2
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#define SPI1_TX_DMA_REQUEST DMA_REQUEST_SPI1_TX
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#define SPI1_TX_DMA_IRQ DMA1_Channel2_3_IRQn
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#ifdef BSP_UART2_RX_USING_DMA
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#undef BSP_UART2_RX_USING_DMA
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#endif
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#ifdef BSP_SPI2_TX_USING_DMA
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#undef BSP_SPI2_TX_USING_DMA
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#endif
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#elif defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
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#define UART2_DMA_RX_IRQHandler DMA1_Channel2_3_IRQHandler
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#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART2_RX_DMA_INSTANCE DMA1_Channel2
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#define UART2_RX_DMA_REQUEST DMA_REQUEST_USART2_RX
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#define UART2_RX_DMA_IRQ DMA1_Channel2_3_IRQn
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#ifdef BSP_SPI2_TX_USING_DMA
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#undef BSP_SPI2_TX_USING_DMA
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#endif
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#elif defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE)
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#define SPI2_DMA_TX_IRQHandler DMA1_Channel2_3_IRQHandler
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#define SPI2_TX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI2_TX_DMA_INSTANCE DMA1_Channel2
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#define SPI2_TX_DMA_REQUEST DMA_REQUEST_SPI2_TX
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#define SPI2_TX_DMA_IRQ DMA1_Channel2_3_IRQn
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#endif
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#if defined(BSP_LPUART1_RX_USING_DMA) && !defined(LPUART1_RX_DMA_INSTANCE)
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@ -68,7 +68,7 @@ extern "C" {
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{ \
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.dma_rcc = SPI2_TX_DMA_RCC, \
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.Instance = SPI2_TX_DMA_INSTANCE, \
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.channel = SPI2_TX_DMA_CHANNEL, \
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.request = SPI2_TX_DMA_REQUEST, \
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.dma_irq = SPI2_TX_DMA_IRQ, \
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}
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#endif /* SPI2_TX_DMA_CONFIG */
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@ -80,7 +80,7 @@ extern "C" {
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{ \
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.dma_rcc = SPI2_RX_DMA_RCC, \
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.Instance = SPI2_RX_DMA_INSTANCE, \
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.channel = SPI2_RX_DMA_CHANNEL, \
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.request = SPI2_RX_DMA_REQUEST, \
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.dma_irq = SPI2_RX_DMA_IRQ, \
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}
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#endif /* SPI2_RX_DMA_CONFIG */
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@ -21,14 +21,16 @@
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.Instance = LPUART1, \
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.irq_type = USART3_4_LPUART1_IRQn, \
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}
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#define LPUART1_IRQHandler USART3_4_LPUART1_IRQHandler
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#endif /* LPUART1_CONFIG */
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#if defined(BSP_LPUART1_RX_USING_DMA)
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#ifndef LPUART1_DMA_CONFIG
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#define LPUART1_DMA_CONFIG \
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{ \
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.Instance = DMA1_Channel1, \
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.dma_rcc = RCC_AHBENR_DMA1EN, \
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.dma_irq = DMA1_Channel1_IRQn, \
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.Instance = LPUART1_RX_DMA_INSTANCE, \
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.request = LPUART1_RX_DMA_REQUEST, \
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.dma_rcc = LPUART1_RX_DMA_RCC, \
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.dma_irq = LPUART1_RX_DMA_IRQ, \
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}
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#endif /* LPUART1_DMA_CONFIG */
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#endif /* BSP_LPUART1_RX_USING_DMA */
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@ -50,6 +52,7 @@
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#define UART1_DMA_CONFIG \
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{ \
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.Instance = UART1_RX_DMA_INSTANCE, \
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.request = UART1_RX_DMA_REQUEST, \
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.dma_rcc = UART1_RX_DMA_RCC, \
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.dma_irq = UART1_RX_DMA_IRQ, \
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}
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@ -72,6 +75,7 @@
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#define UART2_DMA_CONFIG \
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{ \
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.Instance = UART2_RX_DMA_INSTANCE, \
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.request = UART2_RX_DMA_REQUEST, \
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.dma_rcc = UART2_RX_DMA_RCC, \
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.dma_irq = UART2_RX_DMA_IRQ, \
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}
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@ -103,6 +107,7 @@
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#define UART3_DMA_CONFIG \
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{ \
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.Instance = UART3_RX_DMA_INSTANCE, \
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.request = UART3_RX_DMA_REQUEST, \
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.dma_rcc = UART3_RX_DMA_RCC, \
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.dma_irq = UART3_RX_DMA_IRQ, \
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}
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@ -134,6 +139,7 @@
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#define UART4_DMA_CONFIG \
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{ \
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.Instance = UART4_RX_DMA_INSTANCE, \
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.request = UART4_RX_DMA_REQUEST, \
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.dma_rcc = UART4_RX_DMA_RCC, \
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.dma_irq = UART4_RX_DMA_IRQ, \
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}
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@ -203,7 +203,7 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur
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spi_handle->Init.TIMode = SPI_TIMODE_DISABLE;
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spi_handle->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
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spi_handle->State = HAL_SPI_STATE_RESET;
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#ifdef SOC_SERIES_STM32L4
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
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spi_handle->Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
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#endif
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@ -212,7 +212,8 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur
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return RT_EIO;
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}
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0)|| defined(SOC_SERIES_STM32F7)
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) \
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|| defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32G0)
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SET_BIT(spi_handle->Instance->CR2, SPI_RXFIFO_THRESHOLD_HF);
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#endif
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@ -389,7 +390,7 @@ static int rt_hw_spi_bus_init(void)
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spi_bus_obj[i].dma.handle_rx.Instance = spi_config[i].dma_rx->Instance;
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#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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spi_bus_obj[i].dma.handle_rx.Init.Channel = spi_config[i].dma_rx->channel;
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#elif defined(SOC_SERIES_STM32L4)
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#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
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spi_bus_obj[i].dma.handle_rx.Init.Request = spi_config[i].dma_rx->request;
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#endif
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spi_bus_obj[i].dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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@ -408,7 +409,7 @@ static int rt_hw_spi_bus_init(void)
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{
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rt_uint32_t tmpreg = 0x00U;
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#if defined(SOC_SERIES_STM32F1)
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#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0)
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/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
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SET_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc);
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tmpreg = READ_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc);
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@ -427,7 +428,7 @@ static int rt_hw_spi_bus_init(void)
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spi_bus_obj[i].dma.handle_tx.Instance = spi_config[i].dma_tx->Instance;
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#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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spi_bus_obj[i].dma.handle_tx.Init.Channel = spi_config[i].dma_tx->channel;
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#elif defined(SOC_SERIES_STM32L4)
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#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
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spi_bus_obj[i].dma.handle_tx.Init.Request = spi_config[i].dma_tx->request;
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#endif
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spi_bus_obj[i].dma.handle_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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@ -446,7 +447,7 @@ static int rt_hw_spi_bus_init(void)
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{
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rt_uint32_t tmpreg = 0x00U;
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#if defined(SOC_SERIES_STM32F1)
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#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0)
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/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
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SET_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc);
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tmpreg = READ_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc);
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@ -432,7 +432,7 @@ void UART5_DMA_RX_IRQHandler(void)
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#endif /* BSP_USING_UART5*/
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#if defined(BSP_USING_LPUART1)
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void USART3_4_LPUART1_IRQHandler(void)
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void LPUART1_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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@ -442,7 +442,20 @@ void USART3_4_LPUART1_IRQHandler(void)
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA)
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void LPUART1_DMA_RX_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma.handle);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
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#endif /* BSP_USING_LPUART1 */
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#ifdef RT_SERIAL_USING_DMA
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static void stm32_dma_config(struct rt_serial_device *serial)
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@ -471,13 +484,12 @@ static void stm32_dma_config(struct rt_serial_device *serial)
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__HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle);
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#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
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|| defined(SOC_SERIES_STM32L0)
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#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)
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uart->dma.handle.Instance = uart->config->dma_rx->Instance;
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#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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uart->dma.handle.Instance = uart->config->dma_rx->Instance;
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uart->dma.handle.Init.Channel = uart->config->dma_rx->channel;
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#elif defined(SOC_SERIES_STM32L4)
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#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
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uart->dma.handle.Instance = uart->config->dma_rx->Instance;
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uart->dma.handle.Init.Request = uart->config->dma_rx->request;
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#endif
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@ -597,6 +609,11 @@ static void stm32_uart_get_dma_config(void)
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static struct dma_config uart5_dma_rx = UART5_DMA_CONFIG;
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uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
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#endif
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#ifdef BSP_LPUART1_RX_USING_DMA
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uart_obj[LPUART1_INDEX].uart_dma_flag = 1;
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static struct dma_config uart5_dma_rx = LPUART1_DMA_CONFIG;
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uart_config[LPUART1_INDEX].dma_rx = &uart5_dma_rx;
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#endif
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}
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int rt_hw_usart_init(void)
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