diff --git a/libcpu/arm/stm32/context_gcc.S b/libcpu/arm/stm32/context_gcc.S
index 7124e77c44..9c8cc96f6f 100644
--- a/libcpu/arm/stm32/context_gcc.S
+++ b/libcpu/arm/stm32/context_gcc.S
@@ -74,10 +74,10 @@ _reswitch:
 	LDR 	r2, =rt_interrupt_to_thread		/* set rt_interrupt_to_thread */
 	STR 	r1, [r2]
 
-	LDR		r0, =NVIC_INT_CTRL      		/* trigger the PendSV exception (causes context switch) */
-	LDR		r1, =NVIC_PENDSVSET
-	STR		r1, [r0]
-	BX		LR
+	LDR	r0, =NVIC_INT_CTRL      		/* trigger the PendSV exception (causes context switch) */
+	LDR	r1, =NVIC_PENDSVSET
+	STR	r1, [r0]
+	BX	LR
 
 /* r0 --> swith from thread stack
  * r1 --> swith to thread stack
@@ -87,41 +87,41 @@ _reswitch:
 .type rt_hw_pend_sv, %function
 rt_hw_pend_sv:
 	/* disable interrupt to protect context switch */
-	MRS		r2, PRIMASK
+	MRS	r2, PRIMASK
 	CPSID	I
 
 	/* get rt_thread_switch_interrupt_flag */
-	LDR		r0, =rt_thread_switch_interrput_flag
-	LDR		r1, [r0]
-	CBZ		r1, pendsv_exit			/* pendsv already handled */
+	LDR	r0, =rt_thread_switch_interrput_flag
+	LDR	r1, [r0]
+	CBZ	r1, pendsv_exit			/* pendsv already handled */
 
 	/* clear rt_thread_switch_interrput_flag to 0 */
-	MOV		r1, #0x00
-	STR		r1, [r0]
+	MOV	r1, #0x00
+	STR	r1, [r0]
 
-	LDR		r0, =rt_interrupt_from_thread
-	LDR		r1, [r0]
-	CBZ		r1, swtich_to_thread    /* skip register save at the first time */
+	LDR	r0, =rt_interrupt_from_thread
+	LDR	r1, [r0]
+	CBZ	r1, swtich_to_thread    /* skip register save at the first time */
 
-	MRS		r1, psp					/* get from thread stack pointer */
+	MRS	r1, psp					/* get from thread stack pointer */
 	STMFD	r1!, {r4 - r11}			/* push r4 - r11 register */
-	LDR		r0, [r0]
-	STR		r1, [r0]				/* update from thread stack pointer */
+	LDR	r0, [r0]
+	STR	r1, [r0]				/* update from thread stack pointer */
 
 swtich_to_thread:
-	LDR		r1, =rt_interrupt_to_thread
-	LDR		r1, [r1]
-	LDR		r1, [r1]				/* load thread stack pointer */
+	LDR	r1, =rt_interrupt_to_thread
+	LDR	r1, [r1]
+	LDR	r1, [r1]				/* load thread stack pointer */
 
 	LDMFD	r1!, {r4 - r11}			/* pop r4 - r11 register */
-	MSR		psp, r1					/* update stack pointer */
+	MSR	psp, r1					/* update stack pointer */
 
 pendsv_exit:
 	/* restore interrupt */
-	MSR		PRIMASK, r2
+	MSR	PRIMASK, r2
 
-	ORR		lr, lr, #0x04
-	BX		lr
+	ORR	lr, lr, #0x04
+	BX	lr
 
 /*
  * void rt_hw_context_switch_to(rt_uint32 to);
@@ -130,13 +130,13 @@ pendsv_exit:
 .global rt_hw_context_switch_to
 .type rt_hw_context_switch_to, %function
 rt_hw_context_switch_to:
-	LDR		r1, =rt_interrupt_to_thread
-	STR		r0, [r1]
+	LDR	r1, =rt_interrupt_to_thread
+	STR	r0, [r1]
 
 	/* set from thread to 0 */
-	LDR		r1, =rt_interrupt_from_thread
-	MOV		r0, #0x0
-	STR		r0, [r1]
+	LDR	r1, =rt_interrupt_from_thread
+	MOV	r0, #0x0
+	STR	r0, [r1]
 
 	/* set interrupt flag to 1 */
 	LDR 	r1, =rt_thread_switch_interrput_flag
@@ -144,15 +144,15 @@ rt_hw_context_switch_to:
 	STR 	r0, [r1]
 
 	/* set the PendSV exception priority */
-	LDR		r0, =NVIC_SYSPRI2
-	LDR		r1, =NVIC_PENDSV_PRI
-  LDR.W   r2, [r0,#0x00]       ; read
-  ORR     r1,r1,r2             ; modify
-  STR     r1, [r0]             ; write-back
+	LDR	r0, =NVIC_SYSPRI2
+	LDR	r1, =NVIC_PENDSV_PRI
+  	LDR.W   r2, [r0,#0x00]       /* read       */
+  	ORR     r1,r1,r2             /* modify     */
+  	STR     r1, [r0]             /* write-back */
 
-	LDR		r0, =NVIC_INT_CTRL      /* trigger the PendSV exception (causes context switch) */
-	LDR		r1, =NVIC_PENDSVSET
-	STR		r1, [r0]
+	LDR	r0, =NVIC_INT_CTRL      /* trigger the PendSV exception (causes context switch) */
+	LDR	r1, =NVIC_PENDSVSET
+	STR	r1, [r0]
 
 	CPSIE	I                       /* enable interrupts at processor level */
 
@@ -162,5 +162,5 @@ rt_hw_context_switch_to:
 .global rt_hw_interrupt_thread_switch
 .type rt_hw_interrupt_thread_switch, %function
 rt_hw_interrupt_thread_switch:
-	BX		lr
+	BX	lr
 	NOP