mirror of
https://github.com/RT-Thread/rt-thread.git
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WangHuachen
GitHub
commit
9756c77f04
9
.gitee/ISSUE_TEMPLATE.en.md
Normal file
9
.gitee/ISSUE_TEMPLATE.en.md
Normal file
@ -0,0 +1,9 @@
|
||||
### How is this problem caused?
|
||||
|
||||
|
||||
|
||||
### Steps to reproduce
|
||||
|
||||
|
||||
|
||||
### Error message
|
||||
9
.gitee/ISSUE_TEMPLATE.zh-CN.md
Normal file
9
.gitee/ISSUE_TEMPLATE.zh-CN.md
Normal file
@ -0,0 +1,9 @@
|
||||
### 该问题是怎么引起的？
|
||||
|
||||
|
||||
|
||||
### 重现步骤
|
||||
|
||||
|
||||
|
||||
### 报错信息
|
||||
9
.gitee/ISSUE_TEMPLATE.zh-TW.md
Normal file
9
.gitee/ISSUE_TEMPLATE.zh-TW.md
Normal file
@ -0,0 +1,9 @@
|
||||
### 該問題是怎麽引起的？
|
||||
|
||||
|
||||
|
||||
### 重現步驟
|
||||
|
||||
|
||||
|
||||
### 報錯信息
|
||||
29
.gitee/PULL_REQUEST_TEMPLATE.en.md
Normal file
29
.gitee/PULL_REQUEST_TEMPLATE.en.md
Normal file
@ -0,0 +1,29 @@
|
||||
## PR description
|
||||
|
||||
[
|
||||
The content in this square bracket must be filled in and replaced, otherwise PR can not be merged. The contents outside square brackets need not be changed, but please read them carefully.
|
||||
|
||||
Please fill in your PR description here, which can include one of the following items: why to submit this PR; what is the problem solved and what is your solution;
|
||||
|
||||
And confirm in which case or board have been tested.
|
||||
]
|
||||
|
||||
The following content must not be changed in submitted PR message. Otherwise, the PR will be closed immediately. After submitted PR, please use web browser to visit PR, and check items one by one, and ticked them if no problem.
|
||||
|
||||
### Intent for your PR
|
||||
|
||||
Choose one (Mandatory):
|
||||
|
||||
- [ ] This PR is for a code-review and is intended to get feedback
|
||||
- [ ] This PR is mature, and ready to be integrated into the repo
|
||||
|
||||
### Code Quality：
|
||||
|
||||
As part of this pull request, I've considered the following:
|
||||
|
||||
- [ ] Already check the difference between PR and old code
|
||||
- [ ] Style guide is adhered to, including spacing, naming and other style
|
||||
- [ ] All redundant code is removed and cleaned up
|
||||
- [ ] BSP All modifications are justified and not affect other components or BSP
|
||||
- [ ] I've commented appropriately where code is tricky
|
||||
- [ ] Code in this PR is of high quality
|
||||
29
.gitee/PULL_REQUEST_TEMPLATE.zh-CN.md
Normal file
29
.gitee/PULL_REQUEST_TEMPLATE.zh-CN.md
Normal file
@ -0,0 +1,29 @@
|
||||
## 拉取/合并请求描述：
|
||||
|
||||
[
|
||||
这段方括号里的内容是您**必须填写并替换掉**的，否则PR不可能被合并。**方括号外面的内容不需要修改，但请仔细阅读。**
|
||||
|
||||
请在这里填写您的PR描述，可以包括以下之一的内容：为什么提交这份PR；解决的问题是什么，你的解决方案是什么；
|
||||
|
||||
并确认并列出已经在什么情况或板卡上进行了测试。
|
||||
]
|
||||
|
||||
以下的内容不应该在提交PR时的message修改，修改下述message，PR会被直接关闭。请在提交PR后，浏览器查看PR并对以下检查项逐项check，没问题后逐条在页面上打钩。
|
||||
|
||||
### 当前拉取/合并请求的状态：
|
||||
|
||||
必须选择一项:
|
||||
|
||||
- [ ] 本拉取/合并请求是一个草稿版本
|
||||
- [ ] 本拉取/合并请求是一个成熟版本
|
||||
|
||||
### 代码质量：
|
||||
|
||||
我在这个拉取/合并请求中已经考虑了:
|
||||
|
||||
- [ ] 已经仔细查看过代码改动的对比
|
||||
- [ ] 代码风格正确，包括缩进空格，命名及其他风格
|
||||
- [ ] 没有垃圾代码，代码尽量精简，不包含`#if 0`代码，不包含已经被注释了的代码
|
||||
- [ ] 所有变更均有原因及合理的，并且不会影响到其他软件组件代码或
|
||||
- [ ] 对难懂代码均提供对应的注释
|
||||
- [ ] 本拉取/合并请求代码是高质量的
|
||||
29
.gitee/PULL_REQUEST_TEMPLATE.zh-TW.md
Normal file
29
.gitee/PULL_REQUEST_TEMPLATE.zh-TW.md
Normal file
@ -0,0 +1,29 @@
|
||||
## 拉取/合並請求描述：
|
||||
|
||||
[
|
||||
這段方括號裏的內容是您**必須填寫並替換掉**的，否則PR不可能被合並。**方括號外面的內容不需要修改，但請仔細閱讀。**
|
||||
|
||||
請在這裏填寫您的PR描述，可以包括以下之壹的內容：為什麽提交這份PR；解決的問題是什麽，妳的解決方案是什麽；
|
||||
|
||||
並確認並列出已經在什麽情況或板卡上進行了測試。
|
||||
]
|
||||
|
||||
以下的內容不應該在提交PR時的message修改，修改下述message，PR會被直接關閉。請在提交PR後，瀏覽器查看PR並對以下檢查項逐項check，沒問題後逐條在頁面上打鉤。
|
||||
|
||||
### 當前拉取/合並請求的狀態：
|
||||
|
||||
必須選擇壹項:
|
||||
|
||||
- [ ] 本拉取/合並請求是壹個草稿版本
|
||||
- [ ] 本拉取/合並請求是壹個成熟版本
|
||||
|
||||
### 代碼質量：
|
||||
|
||||
我在這個拉取/合並請求中已經考慮了:
|
||||
|
||||
- [ ] 已經仔細查看過代碼改動的對比
|
||||
- [ ] 代碼風格正確，包括縮進空格，命名及其他風格
|
||||
- [ ] 沒有垃圾代碼，代碼盡量精簡，不包含`#if 0`代碼，不包含已經被註釋了的代碼
|
||||
- [ ] 所有變更均有原因及合理的，並且不會影響到其他軟件組件代碼或
|
||||
- [ ] 對難懂代碼均提供對應的註釋
|
||||
- [ ] 本拉取/合並請求代碼是高質量的
|
||||
8
.github/PULL_REQUEST_TEMPLATE.md
vendored
8
.github/PULL_REQUEST_TEMPLATE.md
vendored
@ -2,17 +2,17 @@
|
||||
|
||||
[
|
||||
这段方括号里的内容是您**必须填写并替换掉**的，否则PR不可能被合并。**方括号外面的内容不需要修改，但请仔细阅读。**
|
||||
The content in this square bracket must be filled in and replaced, otherwise PR can not be merged. The contents outside square brackets need not be changed, but please read them carefully.
|
||||
The content in this square bracket must be filled in and replaced, otherwise, PR can not be merged. The contents outside square brackets need not be changed, but please read them carefully.
|
||||
|
||||
请在这里填写您的PR描述，可以包括以下之一的内容：为什么提交这份PR；解决的问题是什么，你的解决方案是什么；
|
||||
Please fill in your PR description here, which can include one of the following items: why to submit this PR; what is the problem solved and what is your solution;
|
||||
|
||||
并确认并列出已经在什么情况或板卡上进行了测试。
|
||||
And confirm in which case or board have been tested.
|
||||
And confirm in which case or board has been tested.
|
||||
]
|
||||
|
||||
以下的内容不应该在提交PR时的message修改，修改下述message，PR会被直接关闭。请在提交PR后，浏览器查看PR并对以下检查项逐项check，没问题后逐条在页面上打钩。
|
||||
The following content must not be changed in submitted PR message. Otherwise, the PR will be closed immediately. After submitted PR, please use web browser to visit PR, and check items one by one, and ticked them if no problem.
|
||||
The following content must not be changed in the submitted PR message. Otherwise, the PR will be closed immediately. After submitted PR, please use a web browser to visit PR, and check items one by one, and ticked them if no problem.
|
||||
|
||||
### 当前拉取/合并请求的状态 Intent for your PR
|
||||
|
||||
@ -26,7 +26,7 @@ The following content must not be changed in submitted PR message. Otherwise, th
|
||||
我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:
|
||||
|
||||
- [ ] 已经仔细查看过代码改动的对比 Already check the difference between PR and old code
|
||||
- [ ] 代码风格正确，包括缩进空格，命名及其他风格 Style guide is adhered to, including spacing, naming and other style
|
||||
- [ ] 代码风格正确，包括缩进空格，命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
|
||||
- [ ] 没有垃圾代码，代码尽量精简，不包含`#if 0`代码，不包含已经被注释了的代码 All redundant code is removed and cleaned up
|
||||
- [ ] 所有变更均有原因及合理的，并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
|
||||
- [ ] 对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
|
||||
|
||||
19
.travis.yml
19
.travis.yml
@ -41,6 +41,7 @@ env:
|
||||
- RTT_BSP='lm3s8962' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='lm3s9b9x' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='lm4f232' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='tm4c123bsp' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='tm4c129x' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='lpc43xx/M4' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='lpc176x' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
@ -65,8 +66,8 @@ env:
|
||||
# - RTT_BSP='mini4020' # no scons
|
||||
# - RTT_BSP='mm32l07x' # not support gcc
|
||||
# - RTT_BSP='nios_ii' # no scons
|
||||
- RTT_BSP='nuvoton_nuc472' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='nuvoton_m05x' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
# - RTT_BSP='nuvoton_nuc472' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
# - RTT_BSP='nuvoton_m05x' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
# - RTT_BSP='pic32ethernet' # no scons
|
||||
- RTT_BSP='qemu-vexpress-a9' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='qemu-vexpress-gemini' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
@ -81,6 +82,7 @@ env:
|
||||
- RTT_BSP='stm32/stm32f103-fire-arbitrary' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f103-hw100k-ibox' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f103-mini-system' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f103-onenet-nbiot' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f103-yf-ufun' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f107-uc-eval' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f401-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
@ -88,8 +90,10 @@ env:
|
||||
- RTT_BSP='stm32/stm32f407-atk-explorer' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f407-st-discovery' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f410-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f411-atk-nano' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f411-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f411-weact-MiniF4' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f413-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f427-robomaster-a' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f429-armfly-v6' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f429-atk-apollo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
@ -101,21 +105,28 @@ env:
|
||||
- RTT_BSP='stm32/stm32f767-atk-apollo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f767-fire-challenger' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32f767-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32g070-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32g071-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32g431-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32h743-atk-apollo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32h743-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32h747-st-discovery' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32l4r9-st-eval' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32l010-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32l053-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32l412-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32l432-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32l433-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32l475-atk-pandora' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32l475-st-discovery' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32l476-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32l496-ali-developer' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32l496-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32mp157a-st-discovery' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32mp157a-st-ev1' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32f20x' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='swm320-lq100' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='stm32/stm32wb55-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
# - RTT_BSP='taihu' RTT_TOOL_CHAIN='sourcery-ppc'
|
||||
# - RTT_BSP='upd70f3454' # iar
|
||||
# - RTT_BSP='x86' # x86
|
||||
@ -123,8 +134,10 @@ env:
|
||||
- RTT_BSP='zynq7000' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='frdm-k64f' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='fh8620' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='x1000' RTT_TOOL_CHAIN='sourcery-mips'
|
||||
# - RTT_BSP='x1000' RTT_TOOL_CHAIN='sourcery-mips'
|
||||
- RTT_BSP='xplorer4330/M4' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='at32/at32f403a-start' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
- RTT_BSP='at32/at32f407-start' RTT_TOOL_CHAIN='sourcery-arm'
|
||||
|
||||
stage: compile
|
||||
script:
|
||||
|
||||
158
Jenkinsfile
vendored
Normal file
158
Jenkinsfile
vendored
Normal file
@ -0,0 +1,158 @@
|
||||
pipeline {
|
||||
agent {
|
||||
docker {
|
||||
image 'ubuntu_ci:latest'
|
||||
}
|
||||
}
|
||||
stages {
|
||||
stage('build') {
|
||||
steps {
|
||||
sh '''
|
||||
|
||||
uname -a
|
||||
cat /etc/issue
|
||||
apt-get update
|
||||
apt-get install -y -qq lib32ncurses5 lib32z1 > /dev/null
|
||||
|
||||
curl -s http://download.isrc.rt-thread.com/download/gcc-arm-none-eabi-5_4-2016q3-20160926-linux.tar.bz2 | sudo tar xjf - -C /opt
|
||||
/opt/gcc-arm-none-eabi-5_4-2016q3/bin/arm-none-eabi-gcc --version
|
||||
'''
|
||||
|
||||
script {
|
||||
def bsp_array = [
|
||||
['CME_M7', 'sourcery-arm'],
|
||||
// ['apollo2', 'sourcery-arm'], /* CI compile not support */
|
||||
['asm9260t', 'sourcery-arm'],
|
||||
['at91sam9260', 'sourcery-arm'],
|
||||
['allwinner_tina', 'sourcery-arm'],
|
||||
['efm32', 'sourcery-arm'],
|
||||
// ['gd32e230k-start', 'sourcery-arm'], /* CI compile not support */
|
||||
['gd32303e-eval', 'sourcery-arm'],
|
||||
// ['gd32450z-eval', 'sourcery-arm'], /* CI link not support */
|
||||
['gkipc', 'sourcery-arm'],
|
||||
['imx6sx/cortex-a9', 'sourcery-arm'],
|
||||
// ['imxrt/imxrt1052-atk-commander', 'sourcery-arm'], /* CI compile not support */
|
||||
// ['imxrt/imxrt1052-fire-pro', 'sourcery-arm'], /* CI compile not support */
|
||||
// ['imxrt/imxrt1052-nxp-evk', 'sourcery-arm'], /* CI compile not support */
|
||||
['lm3s8962', 'sourcery-arm'],
|
||||
['lm3s9b9x', 'sourcery-arm'],
|
||||
['lm4f232', 'sourcery-arm'],
|
||||
['tm4c129x', 'sourcery-arm'],
|
||||
// ['lpc43xx/M4', 'sourcery-arm'], /* CI compile not support */
|
||||
['lpc176x', 'sourcery-arm'],
|
||||
['lpc178x', 'sourcery-arm'],
|
||||
['lpc408x', 'sourcery-arm'],
|
||||
['lpc1114', 'sourcery-arm'],
|
||||
['lpc2148', 'sourcery-arm'],
|
||||
['lpc2478', 'sourcery-arm'],
|
||||
['lpc5410x', 'sourcery-arm'],
|
||||
// ['lpc54114-lite', 'sourcery-arm'], /* CI link not support */
|
||||
['mb9bf500r', 'sourcery-arm'],
|
||||
['mb9bf506r', 'sourcery-arm'],
|
||||
['mb9bf618s', 'sourcery-arm'],
|
||||
['mb9bf568r', 'sourcery-arm'],
|
||||
['mini2440', 'sourcery-arm'],
|
||||
['nuvoton_nuc472', 'sourcery-arm'],
|
||||
['nuvoton_m05x', 'sourcery-arm'],
|
||||
['qemu-vexpress-a9', 'sourcery-arm'],
|
||||
['qemu-vexpress-gemini', 'sourcery-arm'],
|
||||
['sam7x', 'sourcery-arm'],
|
||||
// ['stm32/stm32f072-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f091-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f103-atk-nano', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f103-atk-warshipv3', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f103-dofly-lyc8', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f103-dofly-M3S', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f103-fire-arbitrary', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f103-hw100k-ibox', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f103-mini-system', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f103-onenet-nbiot', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f103-yf-ufun', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f107-uc-eval', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f401-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f405-smdz-breadfruit', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f407-atk-explorer', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f407-st-discovery', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f410-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f411-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f411-weact-MiniF4', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f413-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f427-robomaster-a', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f429-armfly-v6', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f429-atk-apollo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f429-fire-challenger', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f429-st-disco', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f446-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f469-st-disco', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32f746-st-disco', 'sourcery-arm'], /* CI compile -mcpu= not support */
|
||||
// ['stm32/stm32f767-atk-apollo', 'sourcery-arm'], /* CI compile -mcpu= not support */
|
||||
// ['stm32/stm32f767-fire-challenger', 'sourcery-arm'], /* CI compile -mcpu= not support */
|
||||
// ['stm32/stm32f767-st-nucleo', 'sourcery-arm'], /* CI compile -mcpu= not support */
|
||||
// ['stm32/stm32g071-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32g431-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32h743-atk-apollo', 'sourcery-arm'], /* CI compile -mcpu= not support */
|
||||
// ['stm32/stm32h743-st-nucleo', 'sourcery-arm'], /* CI compile -mcpu= not support */
|
||||
// ['stm32/stm32h747-st-discovery', 'sourcery-arm'], /* CI compile -mcpu= not support */
|
||||
// ['stm32/stm32l4r9-st-eval', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32l010-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32l053-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32l412-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32l432-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32l433-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32l475-atk-pandora', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32l475-st-discovery', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32l476-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32l496-ali-developer', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
// ['stm32/stm32l496-st-nucleo', 'sourcery-arm'], /* CI compile C99 not support */
|
||||
['stm32f20x', 'sourcery-arm'],
|
||||
['swm320-lq100', 'sourcery-arm'],
|
||||
['beaglebone', 'sourcery-arm'],
|
||||
['zynq7000', 'sourcery-arm'],
|
||||
['frdm-k64f', 'sourcery-arm'],
|
||||
['fh8620', 'sourcery-arm'],
|
||||
['xplorer4330/M4', 'sourcery-arm'],
|
||||
// ['at32/at32f403a-start', 'sourcery-arm'],/* CI link not support */
|
||||
// ['at32/at32f407-start', 'sourcery-arm']/* CI compile C99 not support */
|
||||
]
|
||||
|
||||
for (int i in bsp_array) {
|
||||
|
||||
sh """
|
||||
|
||||
export RTT_BSP=${i.getAt(0)}
|
||||
export RTT_TOOL_CHAIN=${i.getAt(1)}
|
||||
export RTT_EXEC_PATH=/opt/gcc-arm-none-eabi-5_4-2016q3/bin/
|
||||
export RTT_CC='gcc'
|
||||
export RTT_ROOT=`pwd`
|
||||
|
||||
echo \$RTT_EXEC_PATH
|
||||
|
||||
export CPUS=\$(cat /proc/cpuinfo | grep "processor" | sort | uniq | wc -l)
|
||||
scons -j\${CPUS} -C bsp/\$RTT_BSP
|
||||
"""
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
post {
|
||||
failure {
|
||||
addGiteeMRComment(comment: """:x: Jenkins CI 构建失败。\n\n \
|
||||
查看更多日志详细信息： \
|
||||
<a href="${env.RUN_DISPLAY_URL}">Jenkins[${env.JOB_NAME} # ${env.BUILD_NUMBER}]</a> \
|
||||
<hr /> \
|
||||
:x: The Jenkins CI build failed.\n\n \
|
||||
Results available at: \
|
||||
<a href="${env.RUN_DISPLAY_URL}">Jenkins[${env.JOB_NAME} # ${env.BUILD_NUMBER}]</a>""")
|
||||
}
|
||||
success {
|
||||
addGiteeMRComment(comment: """:white_check_mark: Jenkins CI 构建通过。\n\n \
|
||||
查看更多日志详细信息： \
|
||||
<a href="${env.RUN_DISPLAY_URL}">Jenkins[${env.JOB_NAME} # ${env.BUILD_NUMBER}]</a> \
|
||||
<hr /> \
|
||||
:white_check_mark: The Jenkins CI build passed.\n\n \
|
||||
Results available at: \
|
||||
<a href="${env.RUN_DISPLAY_URL}">Jenkins[${env.JOB_NAME} # ${env.BUILD_NUMBER}]</a>""")
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -86,7 +86,7 @@ RT-Thread supports many architectures, and has covered the major architectures i
|
||||
- **ARM9**：manufacturers like Allwinner、Xilinx 、GOKE
|
||||
- **ARM11**：manufacturers like Fullhan
|
||||
- **MIPS32**：manufacturers like loongson、Ingenic
|
||||
- **RISC-V**：manufacturers like Hifive、Kendryte
|
||||
- **RISC-V**：manufacturers like Hifive、Kendryte、[Nuclei](https://nucleisys.com/)
|
||||
- **ARC**：manufacturers like SYNOPSYS
|
||||
- **DSP**：manufacturers like TI
|
||||
- **C-Sky**
|
||||
|
||||
@ -89,7 +89,7 @@ RT-Thread RTOS 支持许多架构，并且已经涵盖了当前应用中的主
|
||||
|
||||
- MIPS32：如芯片制造商loongson、Ingenic
|
||||
|
||||
- RISC-V：如芯片制造商Hifive、Kendryte
|
||||
- RISC-V：如芯片制造商Hifive、Kendryte、[芯来Nuclei](https://nucleisys.com/)
|
||||
|
||||
- ARC：如芯片制造商SYNOPSYS
|
||||
|
||||
|
||||
@ -538,6 +538,7 @@ static const struct rt_pin_ops ops =
|
||||
pin_attach_irq,
|
||||
pin_detach_irq,
|
||||
pin_irq_enable,
|
||||
RT_NULL,
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
@ -212,6 +212,7 @@ const static struct rt_pin_ops am_pin_ops =
|
||||
am_pin_attach_irq,
|
||||
am_pin_dettach_irq,
|
||||
am_pin_irq_enable,
|
||||
RT_NULL,
|
||||
};
|
||||
|
||||
int rt_hw_pin_init(void)
|
||||
|
||||
@ -27,6 +27,9 @@ if GetDepend(['BSP_USING_HWTIMER']):
|
||||
if GetDepend(['BSP_USING_SPI']):
|
||||
src += ['drv_spi.c']
|
||||
|
||||
if GetDepend(['BSP_USING_ETH', 'RT_USING_LWIP']):
|
||||
src += ['drv_eth.c']
|
||||
|
||||
if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
|
||||
if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2') or GetDepend('BSP_USING_I2C3') or GetDepend('BSP_USING_I2C4'):
|
||||
src += ['drv_soft_i2c.c']
|
||||
@ -37,7 +40,7 @@ if GetDepend(['BSP_USING_ADC']):
|
||||
if GetDepend('BSP_USING_SRAM'):
|
||||
src += ['drv_sram.c']
|
||||
|
||||
if GetDepend('BSP_USING_ONCHIP_RTC'):
|
||||
if GetDepend('BSP_USING_RTC'):
|
||||
src += ['drv_rtc.c']
|
||||
|
||||
if GetDepend(['BSP_USING_WDT']):
|
||||
|
||||
767
bsp/at32/Libraries/rt_drivers/drv_eth.c
Normal file
767
bsp/at32/Libraries/rt_drivers/drv_eth.c
Normal file
@ -0,0 +1,767 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-05-19 Joe first version
|
||||
*/
|
||||
|
||||
#include "at32f4xx_eth.h"
|
||||
#include "board.h"
|
||||
#include <netif/ethernetif.h>
|
||||
#include "lwipopts.h"
|
||||
#include "drv_eth.h"
|
||||
#include <drv_log.h>
|
||||
|
||||
/* EMAC Interface */
|
||||
#define PHY_ADDRESS 0x00 /* Relative to AT32F407-EVAL Board */
|
||||
//#define MII_MODE /* MII mode for AT32F407-EVAL Board (MB784) (check jumpers setting) */
|
||||
#define RMII_MODE /* RMII mode for AT32F407-EVAL Board (MB784) (check jumpers setting) */
|
||||
//#define CRYSTAL_ON_PHY
|
||||
#define MII_RX_REMAP 1
|
||||
|
||||
/* debug option */
|
||||
//#define ETH_RX_DUMP
|
||||
//#define ETH_TX_DUMP
|
||||
//#define DRV_DEBUG
|
||||
#define LOG_TAG "drv.emac"
|
||||
|
||||
#define ETH_RXBUFNB 4
|
||||
#define ETH_TXBUFNB 2
|
||||
|
||||
#define LINK_THREAD_STACK_SIZE 256
|
||||
#define LINK_THREAD_PREORITY 21
|
||||
|
||||
extern ETH_DMADESCTypeDef *DMATxDescToSet;
|
||||
extern ETH_DMADESCTypeDef *DMARxDescToGet;
|
||||
extern ETH_DMADESCTypeDef *DMAPTPTxDescToSet;
|
||||
extern ETH_DMADESCTypeDef *DMAPTPRxDescToGet;
|
||||
|
||||
static ETH_DMADESCTypeDef DMARxDscrTab[ETH_RXBUFNB], DMATxDscrTab[ETH_TXBUFNB];
|
||||
static rt_uint8_t Rx_Buff[ETH_RXBUFNB][ETH_MAX_PACKET_SIZE], Tx_Buff[ETH_TXBUFNB][ETH_MAX_PACKET_SIZE];
|
||||
static struct rt_thread eth_link_thread;
|
||||
static rt_uint8_t eth_link_stack[LINK_THREAD_STACK_SIZE];
|
||||
|
||||
#define MAX_ADDR_LEN 6
|
||||
/* Gloable variables ---------------------------------------------------------*/
|
||||
void static Reset_Phy(void);
|
||||
void NVIC_Configuration(void);
|
||||
void GPIO_Configuration(void);
|
||||
|
||||
struct rt_at32_eth
|
||||
{
|
||||
/* inherit from ethernet device */
|
||||
struct eth_device parent;
|
||||
#ifndef PHY_USING_INTERRUPT_MODE
|
||||
rt_timer_t poll_link_timer;
|
||||
#endif
|
||||
|
||||
/* interface address info, hw address */
|
||||
rt_uint8_t dev_addr[MAX_ADDR_LEN];
|
||||
/* ETH_Speed */
|
||||
uint32_t ETH_Speed;
|
||||
/* ETH_Duplex_Mode */
|
||||
uint32_t ETH_Mode;
|
||||
};
|
||||
|
||||
static ETH_DMADESCTypeDef DMARxDscrTab[ETH_RXBUFNB], DMATxDscrTab[ETH_TXBUFNB]; /* Ethernet Rx & Tx DMA Descriptors */
|
||||
static uint8_t Rx_Buff[ETH_RXBUFNB][ETH_MAX_PACKET_SIZE], Tx_Buff[ETH_TXBUFNB][ETH_MAX_PACKET_SIZE]; /* Ethernet buffers */
|
||||
//static ETH_HandleTypeDef EthHandle;
|
||||
static struct rt_at32_eth at32_eth_device;
|
||||
static struct rt_semaphore tx_wait;
|
||||
static rt_bool_t tx_is_waiting = RT_FALSE;
|
||||
|
||||
#if defined(ETH_RX_DUMP) || defined(ETH_TX_DUMP)
|
||||
#define __is_print(ch) ((unsigned int)((ch) - ' ') < 127u - ' ')
|
||||
static void dump_hex(const rt_uint8_t *ptr, rt_size_t buflen)
|
||||
{
|
||||
unsigned char *buf = (unsigned char *)ptr;
|
||||
int i, j;
|
||||
|
||||
for (i = 0; i < buflen; i += 16)
|
||||
{
|
||||
rt_kprintf("%08X: ", i);
|
||||
|
||||
for (j = 0; j < 16; j++)
|
||||
if (i + j < buflen)
|
||||
rt_kprintf("%02X ", buf[i + j]);
|
||||
else
|
||||
rt_kprintf(" ");
|
||||
rt_kprintf(" ");
|
||||
|
||||
for (j = 0; j < 16; j++)
|
||||
if (i + j < buflen)
|
||||
rt_kprintf("%c", __is_print(buf[i + j]) ? buf[i + j] : '.');
|
||||
rt_kprintf("\n");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief reset the phy
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void static Reset_Phy(void)
|
||||
{
|
||||
GPIO_InitType GPIO_InitStructure;
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8;
|
||||
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT_PP;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
GPIO_ResetBits(GPIOC, GPIO_Pins_8);
|
||||
rt_thread_mdelay(2);
|
||||
GPIO_SetBits(GPIOC, GPIO_Pins_8);
|
||||
rt_thread_mdelay(2000);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure NVIC for ISR
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
NVIC_InitType NVIC_InitStructure;
|
||||
|
||||
/* Set the Vector Table base location at 0x08000000 */
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
|
||||
/* 2 bit for pre-emption priority, 2 bits for subpriority */
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
|
||||
/* Enable the Ethernet global Interrupt */
|
||||
NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure GPIO for ethernet
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void GPIO_Configuration(void)
|
||||
{
|
||||
GPIO_InitType GPIO_InitStructure;
|
||||
|
||||
#if MII_RX_REMAP
|
||||
GPIO_PinsRemapConfig(GPIO_Remap_ETH, ENABLE);
|
||||
#endif
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC |
|
||||
RCC_APB2PERIPH_GPIOD | RCC_APB2PERIPH_GPIOE | RCC_APB2PERIPH_AFIO, ENABLE);
|
||||
/* ETHERNET pins configuration */
|
||||
/* AF Output Push Pull:
|
||||
ETH_MII_MDIO / ETH_RMII_MDIO: PA2
|
||||
ETH_MII_MDC / ETH_RMII_MDC: PC1
|
||||
*/
|
||||
/* Configure PA2 as alternate function push-pull MDIO*/
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_2;
|
||||
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
/*PC1-->MDC*/
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_1;
|
||||
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
/*MII Mode GPIO configuration*/
|
||||
#ifdef MII_MODE
|
||||
/**********************MII Tx Pin Define****************************/
|
||||
/*
|
||||
ETH_MII_TX0-->PB12 AF-PP
|
||||
ETH_MII_TX1-->PB13 AF-PP
|
||||
ETH_MII_TX2-->PC2 AF-PP
|
||||
ETH_MII_TX3-->PB8 AF-PP
|
||||
ETH_MII_TX_EN-->PB11 AF-PP
|
||||
ETH_MII_TX_CLK-->PC3
|
||||
*/
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_11 | GPIO_Pins_12 | GPIO_Pins_13;
|
||||
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_2 | GPIO_Pins_3;
|
||||
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
/**********************MII Rx Pin Define****************************/
|
||||
#if MII_RX_REMAP /*IO PIN remaped*/
|
||||
/*
|
||||
ETH_MII_RX_DV-->PD8
|
||||
ETH_MII_RXD0-->PD9
|
||||
ETH_MII_RXD1-->PD10
|
||||
ETH_MII_RXD2-->PD11
|
||||
ETH_MII_RXD3-->PD12
|
||||
ETH_MII_RXCLK-->PA1
|
||||
ETH_MII_CRS-->PA0
|
||||
ETH_MII_COL-->PA3
|
||||
ETH_MII_RX_ER-->PB10
|
||||
*/
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10 | GPIO_Pins_11 | GPIO_Pins_12;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_Init(GPIOD, &GPIO_InitStructure);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_3;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_10;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
#else
|
||||
/*
|
||||
ETH_MII_RX_DV-->PA7
|
||||
ETH_MII_RXD0-->PC4
|
||||
ETH_MII_RXD1-->PC5
|
||||
ETH_MII_RXD2-->PB0
|
||||
ETH_MII_RXD3-->PB1
|
||||
ETH_MII_RXCLK-->PA1
|
||||
ETH_MII_CRS-->PA0
|
||||
ETH_MII_COL-->PA3
|
||||
ETH_MII_RX_ER-->PB10
|
||||
*/
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_3 | GPIO_Pins_7;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_10;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
#endif //End MII RX REMAP
|
||||
#endif //End MII mode
|
||||
|
||||
#ifdef RMII_MODE
|
||||
/**********************RMII Tx Pin Define****************************/
|
||||
/*
|
||||
ETH_RMII_TX0-->PB12 AF-PP
|
||||
ETH_RMII_TX1-->PB13 AF-PP
|
||||
ETH_RMII_TX_EN-->PB11 AF-PP
|
||||
*/
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_11 | GPIO_Pins_12 | GPIO_Pins_13;
|
||||
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/**********************RMII Rx Pin Define****************************/
|
||||
#if MII_RX_REMAP /*IO PIN remaped*/
|
||||
/*
|
||||
ETH_RMII_RX_DV-->PD8
|
||||
ETH_RMII_RXD0-->PD9
|
||||
ETH_RMII_RXD1-->PD10
|
||||
ETH_RMII_REF_CLK-->PA1
|
||||
*/
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_Init(GPIOD, &GPIO_InitStructure);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_1;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
#else
|
||||
/*
|
||||
ETH_RMII_RX_DV-->PA7
|
||||
ETH_RMII_RXD0-->PC4
|
||||
ETH_RMII_RXD1-->PC5
|
||||
ETH_RMII_REF_CLK-->PA1
|
||||
*/
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_1 | GPIO_Pins_7;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
#endif //End RMII RX REMAP
|
||||
#endif //End RMII mode
|
||||
|
||||
/* ADC Channel4 config --------------------------------------------------------*/
|
||||
/* Configure PA4(ADC Channel4) as analog input -------------------------*/
|
||||
#ifdef ADC_NECESSARY
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_ANALOG;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
#endif
|
||||
|
||||
/* MCO pin configuration------------------------------------------------- */
|
||||
/* Configure MCO (PA8) as alternate function push-pull */
|
||||
#ifndef CRYSTAL_ON_PHY
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8;
|
||||
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* EMAC initialization function */
|
||||
static rt_err_t rt_at32_eth_init(rt_device_t dev)
|
||||
{
|
||||
ETH_InitType ETH_InitStructure;
|
||||
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_ETHMAC | RCC_AHBPERIPH_ETHMACTX |
|
||||
RCC_AHBPERIPH_ETHMACRX, ENABLE);
|
||||
|
||||
/* MII/RMII Media interface selection ------------------------------------------*/
|
||||
#ifdef MII_MODE /* Mode MII with AT32F407-EVAL */
|
||||
GPIO_ETH_MediaInterfaceConfig(GPIO_ETH_MediaInterface_MII);
|
||||
|
||||
/* Get 25MHz from system clock 200MHz on PA8 pin (MCO) */
|
||||
#ifndef CRYSTAL_ON_PHY
|
||||
RCC_CLKOUTConfig(RCC_CLKOUT_SYSCLK, RCC_MCOPRE_8);
|
||||
#endif
|
||||
|
||||
#elif defined RMII_MODE /* Mode RMII with AT32F407-EVAL */
|
||||
GPIO_ETH_MediaInterfaceConfig(GPIO_ETH_MediaInterface_RMII);
|
||||
#ifndef CRYSTAL_ON_PHY
|
||||
RCC_CLKOUTConfig(RCC_CLKOUT_SYSCLK, RCC_MCOPRE_8); /*25M to RMII Mode*/
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*Reset phy*/
|
||||
Reset_Phy();
|
||||
/* Reset ETHERNET on AHB Bus */
|
||||
ETH_DeInit();
|
||||
|
||||
/* Software reset */
|
||||
ETH_SoftwareReset();
|
||||
|
||||
/* Wait for software reset */
|
||||
while (ETH_GetSoftwareResetStatus() == SET);
|
||||
|
||||
/* ETHERNET Configuration ------------------------------------------------------*/
|
||||
/* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */
|
||||
ETH_StructInit(Ð_InitStructure);
|
||||
|
||||
/* Fill ETH_InitStructure parametrs */
|
||||
/*------------------------ MAC -----------------------------------*/
|
||||
ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable;//ETH_AutoNegotiation_Enable ;
|
||||
ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
|
||||
ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Enable;
|
||||
ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable;
|
||||
ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable;
|
||||
ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable;
|
||||
ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable;
|
||||
ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect;//ETH_MulticastFramesFilter_Perfect;
|
||||
ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect;
|
||||
#ifdef CHECKSUM_BY_HARDWARE
|
||||
ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
|
||||
#endif
|
||||
|
||||
/*------------------------ DMA -----------------------------------*/
|
||||
|
||||
/* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
|
||||
the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
|
||||
if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
|
||||
ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;//ETH_DropTCPIPChecksumErrorFrame_Enable;
|
||||
ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
|
||||
ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
|
||||
|
||||
ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
|
||||
ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
|
||||
ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
|
||||
ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
|
||||
ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
|
||||
ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
|
||||
ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
|
||||
ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
|
||||
|
||||
/* Configure Ethernet, check error */
|
||||
if(ETH_Init(Ð_InitStructure, PHY_ADDRESS) == ((uint32_t)0)) {
|
||||
return RT_ERROR;
|
||||
}
|
||||
|
||||
/* Enable DMA Receive interrupt (need to enable in this case Normal interrupt) */
|
||||
ETH_DMAITConfig(ETH_DMA_INT_NIS | ETH_DMA_INT_R, ENABLE);
|
||||
|
||||
/* Initialize Tx Descriptors list: Chain Mode */
|
||||
ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
|
||||
/* Initialize Rx Descriptors list: Chain Mode */
|
||||
ETH_DMARxDescChainInit(DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
|
||||
|
||||
/* MAC address configuration */
|
||||
ETH_MACAddressConfig(ETH_MAC_Address0, (u8*)&at32_eth_device.dev_addr[0]);
|
||||
|
||||
/* Enable ETH transmition and recetion */
|
||||
ETH_Start();
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_at32_eth_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
{
|
||||
LOG_D("emac open");
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_at32_eth_close(rt_device_t dev)
|
||||
{
|
||||
LOG_D("emac close");
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t rt_at32_eth_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
|
||||
{
|
||||
LOG_D("emac read");
|
||||
rt_set_errno(-RT_ENOSYS);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static rt_size_t rt_at32_eth_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
|
||||
{
|
||||
LOG_D("emac write");
|
||||
rt_set_errno(-RT_ENOSYS);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static rt_err_t rt_at32_eth_control(rt_device_t dev, int cmd, void *args)
|
||||
{
|
||||
switch (cmd)
|
||||
{
|
||||
case NIOCTL_GADDR:
|
||||
/* get mac address */
|
||||
if (args) rt_memcpy(args, at32_eth_device.dev_addr, 6);
|
||||
else return -RT_ERROR;
|
||||
break;
|
||||
|
||||
default :
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
/* ethernet device interface */
|
||||
/* transmit data*/
|
||||
rt_err_t rt_at32_eth_tx(rt_device_t dev, struct pbuf *p)
|
||||
{
|
||||
struct pbuf* q;
|
||||
rt_uint32_t offset;
|
||||
|
||||
/* Check if the descriptor is owned by the ETHERNET DMA (when set) or CPU (when reset) */
|
||||
while ((DMATxDescToSet->Status & ETH_DMATxDesc_OWN) != (uint32_t)RESET)
|
||||
{
|
||||
rt_err_t result;
|
||||
rt_uint32_t level;
|
||||
|
||||
level = rt_hw_interrupt_disable();
|
||||
tx_is_waiting = RT_TRUE;
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
/* it's own bit set, wait it */
|
||||
result = rt_sem_take(&tx_wait, RT_WAITING_FOREVER);
|
||||
if (result == RT_EOK) break;
|
||||
if (result == -RT_ERROR) return -RT_ERROR;
|
||||
}
|
||||
|
||||
offset = 0;
|
||||
for (q = p; q != NULL; q = q->next)
|
||||
{
|
||||
uint8_t *to;
|
||||
|
||||
/* Copy the frame to be sent into memory pointed by the current ETHERNET DMA Tx descriptor */
|
||||
to = (uint8_t*)((DMATxDescToSet->Buffer1Addr) + offset);
|
||||
memcpy(to, q->payload, q->len);
|
||||
offset += q->len;
|
||||
}
|
||||
#ifdef ETH_TX_DUMP
|
||||
{
|
||||
rt_uint32_t i;
|
||||
rt_uint8_t *ptr = (rt_uint8_t*)(DMATxDescToSet->Buffer1Addr);
|
||||
|
||||
AT32_ETH_PRINTF("tx_dump, len:%d\r\n", p->tot_len);
|
||||
for(i=0; i<p->tot_len; i++)
|
||||
{
|
||||
AT32_ETH_PRINTF("%02x ",*ptr);
|
||||
ptr++;
|
||||
|
||||
if(((i+1)%8) == 0)
|
||||
{
|
||||
AT32_ETH_PRINTF(" ");
|
||||
}
|
||||
if(((i+1)%16) == 0)
|
||||
{
|
||||
AT32_ETH_PRINTF("\r\n");
|
||||
}
|
||||
}
|
||||
AT32_ETH_PRINTF("\r\ndump done!\r\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Setting the Frame Length: bits[12:0] */
|
||||
DMATxDescToSet->ControlBufferSize = (p->tot_len & ETH_DMATxDesc_TBS1);
|
||||
/* Setting the last segment and first segment bits (in this case a frame is transmitted in one descriptor) */
|
||||
DMATxDescToSet->Status |= ETH_DMATxDesc_LS | ETH_DMATxDesc_FS;
|
||||
/* Enable TX Completion Interrupt */
|
||||
DMATxDescToSet->Status |= ETH_DMATxDesc_IC;
|
||||
#ifdef CHECKSUM_BY_HARDWARE
|
||||
DMATxDescToSet->Status |= ETH_DMATxDesc_ChecksumTCPUDPICMPFull;
|
||||
/* clean ICMP checksum STM32F need */
|
||||
{
|
||||
struct eth_hdr *ethhdr = (struct eth_hdr *)(DMATxDescToSet->Buffer1Addr);
|
||||
/* is IP ? */
|
||||
if( ethhdr->type == htons(ETHTYPE_IP) )
|
||||
{
|
||||
struct ip_hdr *iphdr = (struct ip_hdr *)(DMATxDescToSet->Buffer1Addr + SIZEOF_ETH_HDR);
|
||||
/* is ICMP ? */
|
||||
if( IPH_PROTO(iphdr) == IP_PROTO_ICMP )
|
||||
{
|
||||
struct icmp_echo_hdr *iecho = (struct icmp_echo_hdr *)(DMATxDescToSet->Buffer1Addr + SIZEOF_ETH_HDR + sizeof(struct ip_hdr) );
|
||||
iecho->chksum = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
/* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */
|
||||
DMATxDescToSet->Status |= ETH_DMATxDesc_OWN;
|
||||
/* When Tx Buffer unavailable flag is set: clear it and resume transmission */
|
||||
if ((ETH->DMASTS & ETH_DMA_FLAG_TBU) != (uint32_t)RESET)
|
||||
{
|
||||
/* Clear TBUS ETHERNET DMA flag */
|
||||
ETH->DMASTS = ETH_DMA_FLAG_TBU;
|
||||
/* Transmit Poll Demand to resume DMA transmission*/
|
||||
ETH->DMATPD = 0;
|
||||
}
|
||||
|
||||
/* Update the ETHERNET DMA global Tx descriptor with next Tx decriptor */
|
||||
/* Chained Mode */
|
||||
/* Selects the next DMA Tx descriptor list for next buffer to send */
|
||||
DMATxDescToSet = (ETH_DMADESCTypeDef*) (DMATxDescToSet->Buffer2NextDescAddr);
|
||||
|
||||
/* Return SUCCESS */
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
/* receive data*/
|
||||
struct pbuf *rt_at32_eth_rx(rt_device_t dev)
|
||||
{
|
||||
struct pbuf* p;
|
||||
rt_uint32_t offset = 0, framelength = 0;
|
||||
|
||||
/* init p pointer */
|
||||
p = RT_NULL;
|
||||
|
||||
/* Check if the descriptor is owned by the ETHERNET DMA (when set) or CPU (when reset) */
|
||||
if(((DMARxDescToGet->Status & ETH_DMARxDesc_OWN) != (uint32_t)RESET))
|
||||
return p;
|
||||
|
||||
if (((DMARxDescToGet->Status & ETH_DMARxDesc_ES) == (uint32_t)RESET) &&
|
||||
((DMARxDescToGet->Status & ETH_DMARxDesc_LS) != (uint32_t)RESET) &&
|
||||
((DMARxDescToGet->Status & ETH_DMARxDesc_FS) != (uint32_t)RESET))
|
||||
{
|
||||
/* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */
|
||||
framelength = ((DMARxDescToGet->Status & ETH_DMARxDesc_FL) >> 16) - 4;
|
||||
|
||||
/* allocate buffer */
|
||||
p = pbuf_alloc(PBUF_LINK, framelength, PBUF_RAM);
|
||||
if (p != RT_NULL)
|
||||
{
|
||||
struct pbuf* q;
|
||||
|
||||
for (q = p; q != RT_NULL; q= q->next)
|
||||
{
|
||||
/* Copy the received frame into buffer from memory pointed by the current ETHERNET DMA Rx descriptor */
|
||||
memcpy(q->payload, (uint8_t *)((DMARxDescToGet->Buffer1Addr) + offset), q->len);
|
||||
offset += q->len;
|
||||
}
|
||||
#ifdef ETH_RX_DUMP
|
||||
{
|
||||
rt_uint32_t i;
|
||||
rt_uint8_t *ptr = (rt_uint8_t*)(DMARxDescToGet->Buffer1Addr);
|
||||
|
||||
AT32_ETH_PRINTF("rx_dump, len:%d\r\n", p->tot_len);
|
||||
for(i=0; i<p->tot_len; i++)
|
||||
{
|
||||
AT32_ETH_PRINTF("%02x ", *ptr);
|
||||
ptr++;
|
||||
|
||||
if(((i+1)%8) == 0)
|
||||
{
|
||||
AT32_ETH_PRINTF(" ");
|
||||
}
|
||||
if(((i+1)%16) == 0)
|
||||
{
|
||||
AT32_ETH_PRINTF("\r\n");
|
||||
}
|
||||
}
|
||||
AT32_ETH_PRINTF("\r\ndump done!\r\n");
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/* Set Own bit of the Rx descriptor Status: gives the buffer back to ETHERNET DMA */
|
||||
DMARxDescToGet->Status = ETH_DMARxDesc_OWN;
|
||||
|
||||
/* When Rx Buffer unavailable flag is set: clear it and resume reception */
|
||||
if ((ETH->DMASTS & ETH_DMA_FLAG_RBU) != (uint32_t)RESET)
|
||||
{
|
||||
/* Clear RBUS ETHERNET DMA flag */
|
||||
ETH->DMASTS = ETH_DMA_FLAG_RBU;
|
||||
/* Resume DMA reception */
|
||||
ETH->DMARPD = 0;
|
||||
}
|
||||
|
||||
/* Update the ETHERNET DMA global Rx descriptor with next Rx decriptor */
|
||||
/* Chained Mode */
|
||||
if((DMARxDescToGet->ControlBufferSize & ETH_DMARxDesc_RCH) != (uint32_t)RESET)
|
||||
{
|
||||
/* Selects the next DMA Rx descriptor list for next buffer to read */
|
||||
DMARxDescToGet = (ETH_DMADESCTypeDef*) (DMARxDescToGet->Buffer2NextDescAddr);
|
||||
}
|
||||
else /* Ring Mode */
|
||||
{
|
||||
if((DMARxDescToGet->ControlBufferSize & ETH_DMARxDesc_RER) != (uint32_t)RESET)
|
||||
{
|
||||
/* Selects the first DMA Rx descriptor for next buffer to read: last Rx descriptor was used */
|
||||
DMARxDescToGet = (ETH_DMADESCTypeDef*) (ETH->DMARDLADDR);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Selects the next DMA Rx descriptor list for next buffer to read */
|
||||
DMARxDescToGet = (ETH_DMADESCTypeDef*) ((uint32_t)DMARxDescToGet + 0x10 + ((ETH->DMABM & 0x0000007C) >> 2));
|
||||
}
|
||||
}
|
||||
|
||||
return p;
|
||||
}
|
||||
|
||||
static void eth_link_thread_entry(void *paramter)
|
||||
{
|
||||
uint8_t linked_down = 1;
|
||||
|
||||
struct netif *pnetif = at32_eth_device.parent.netif;
|
||||
|
||||
while(1){
|
||||
if((ETH_ReadPHYRegister(PHY_ADDRESS, PHY_BSR) & PHY_Linked_Status) && (linked_down == 1))
|
||||
{
|
||||
/* link up */
|
||||
linked_down = 0;
|
||||
#ifndef RT_LWIP_DHCP
|
||||
pnetif->ip_addr = inet_addr(RT_LWIP_IPADDR);
|
||||
pnetif->gw = inet_addr(RT_LWIP_GWADDR);
|
||||
pnetif->netmask = inet_addr(RT_LWIP_MSKADDR);
|
||||
#else
|
||||
IP4_ADDR(&(pnetif->ip_addr), 0, 0, 0, 0);
|
||||
IP4_ADDR(&(pnetif->netmask), 0, 0, 0, 0);
|
||||
IP4_ADDR(&(pnetif->gw), 0, 0, 0, 0);
|
||||
#endif
|
||||
eth_device_linkchange(&(at32_eth_device.parent), RT_TRUE);
|
||||
}else if(!(ETH_ReadPHYRegister(PHY_ADDRESS, PHY_BSR) & PHY_Linked_Status) && (linked_down == 0))
|
||||
{
|
||||
/* link down */
|
||||
linked_down = 1;
|
||||
eth_device_linkchange(&(at32_eth_device.parent), RT_FALSE);
|
||||
}
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
}
|
||||
|
||||
/* interrupt service routine */
|
||||
void ETH_IRQHandler(void)
|
||||
{
|
||||
rt_uint32_t status;
|
||||
|
||||
status = ETH->DMASTS;
|
||||
|
||||
/* Clear received IT */
|
||||
if ((status & ETH_DMA_INT_NIS) != (u32)RESET)
|
||||
ETH->DMASTS = (u32)ETH_DMA_INT_NIS;
|
||||
if ((status & ETH_DMA_INT_AIS) != (u32)RESET)
|
||||
ETH->DMASTS = (u32)ETH_DMA_INT_AIS;
|
||||
if ((status & ETH_DMA_INT_RO) != (u32)RESET)
|
||||
ETH->DMASTS = (u32)ETH_DMA_INT_RO;
|
||||
if ((status & ETH_DMA_INT_RBU) != (u32)RESET)
|
||||
ETH->DMASTS = (u32)ETH_DMA_INT_RBU;
|
||||
|
||||
if (ETH_GetDMAITStatus(ETH_DMA_INT_R) == SET) /* packet receiption */
|
||||
{
|
||||
/* a frame has been received */
|
||||
eth_device_ready(&(at32_eth_device.parent));
|
||||
|
||||
ETH_DMAClearITPendingBit(ETH_DMA_INT_R);
|
||||
}
|
||||
|
||||
if (ETH_GetDMAITStatus(ETH_DMA_INT_T) == SET) /* packet transmission */
|
||||
{
|
||||
if (tx_is_waiting == RT_TRUE)
|
||||
{
|
||||
tx_is_waiting = RT_FALSE;
|
||||
rt_sem_release(&tx_wait);
|
||||
}
|
||||
|
||||
ETH_DMAClearITPendingBit(ETH_DMA_INT_T);
|
||||
}
|
||||
}
|
||||
|
||||
enum {
|
||||
PHY_LINK = (1 << 0),
|
||||
PHY_100M = (1 << 1),
|
||||
PHY_FULL_DUPLEX = (1 << 2),
|
||||
};
|
||||
|
||||
/* Register the EMAC device */
|
||||
static int rt_hw_at32_eth_init(void)
|
||||
{
|
||||
rt_err_t state = RT_EOK;
|
||||
|
||||
Reset_Phy();
|
||||
|
||||
GPIO_Configuration();
|
||||
NVIC_Configuration();
|
||||
|
||||
at32_eth_device.dev_addr[0] = 0x00;
|
||||
at32_eth_device.dev_addr[1] = 0x80;
|
||||
at32_eth_device.dev_addr[2] = 0xE1;
|
||||
at32_eth_device.dev_addr[3] = 0x94;
|
||||
at32_eth_device.dev_addr[4] = 0x87;
|
||||
at32_eth_device.dev_addr[5] = 0x55;
|
||||
|
||||
at32_eth_device.parent.parent.init = rt_at32_eth_init;
|
||||
at32_eth_device.parent.parent.open = rt_at32_eth_open;
|
||||
at32_eth_device.parent.parent.close = rt_at32_eth_close;
|
||||
at32_eth_device.parent.parent.read = rt_at32_eth_read;
|
||||
at32_eth_device.parent.parent.write = rt_at32_eth_write;
|
||||
at32_eth_device.parent.parent.control = rt_at32_eth_control;
|
||||
at32_eth_device.parent.parent.user_data = RT_NULL;
|
||||
|
||||
at32_eth_device.parent.eth_rx = rt_at32_eth_rx;
|
||||
at32_eth_device.parent.eth_tx = rt_at32_eth_tx;
|
||||
|
||||
/* register eth device */
|
||||
state = eth_device_init(&(at32_eth_device.parent), "e0");
|
||||
|
||||
if (RT_EOK == state)
|
||||
{
|
||||
LOG_D("emac device init success");
|
||||
|
||||
state = rt_thread_init(ð_link_thread, "eth_link_detect", eth_link_thread_entry, RT_NULL,
|
||||
ð_link_stack[0], LINK_THREAD_STACK_SIZE, LINK_THREAD_PREORITY, 20);
|
||||
if (state == RT_EOK)
|
||||
{
|
||||
rt_thread_startup(ð_link_thread);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("emac device init faild: %d", state);
|
||||
state = -RT_ERROR;
|
||||
}
|
||||
/* start phy monitor */
|
||||
return state;
|
||||
}
|
||||
|
||||
INIT_DEVICE_EXPORT(rt_hw_at32_eth_init);
|
||||
92
bsp/at32/Libraries/rt_drivers/drv_eth.h
Normal file
92
bsp/at32/Libraries/rt_drivers/drv_eth.h
Normal file
@ -0,0 +1,92 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-05-19 Joe first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_ETH_H__
|
||||
#define __DRV_ETH_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rthw.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
|
||||
/* The PHY basic control register */
|
||||
#define PHY_BASIC_CONTROL_REG 0x00U
|
||||
#define PHY_RESET_MASK (1<<15)
|
||||
#define PHY_AUTO_NEGOTIATION_MASK (1<<12)
|
||||
|
||||
/* The PHY basic status register */
|
||||
#define PHY_BASIC_STATUS_REG 0x01U
|
||||
#define PHY_LINKED_STATUS_MASK (1<<2)
|
||||
#define PHY_AUTONEGO_COMPLETE_MASK (1<<5)
|
||||
|
||||
/* The PHY ID one register */
|
||||
#define PHY_ID1_REG 0x02U
|
||||
|
||||
/* The PHY ID two register */
|
||||
#define PHY_ID2_REG 0x03U
|
||||
|
||||
/* The PHY auto-negotiate advertise register */
|
||||
#define PHY_AUTONEG_ADVERTISE_REG 0x04U
|
||||
|
||||
#ifdef PHY_USING_LAN8720A
|
||||
/* The PHY interrupt source flag register. */
|
||||
#define PHY_INTERRUPT_FLAG_REG 0x1DU
|
||||
/* The PHY interrupt mask register. */
|
||||
#define PHY_INTERRUPT_MASK_REG 0x1EU
|
||||
#define PHY_LINK_DOWN_MASK (1<<4)
|
||||
#define PHY_AUTO_NEGO_COMPLETE_MASK (1<<6)
|
||||
|
||||
/* The PHY status register. */
|
||||
#define PHY_Status_REG 0x1FU
|
||||
#define PHY_10M_MASK (1<<2)
|
||||
#define PHY_100M_MASK (1<<3)
|
||||
#define PHY_FULL_DUPLEX_MASK (1<<4)
|
||||
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
|
||||
#define PHY_Status_SPEED_100M(sr) ((sr) & PHY_100M_MASK)
|
||||
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
|
||||
#endif /* PHY_USING_LAN8720A */
|
||||
|
||||
#ifdef PHY_USING_DM9161CEP
|
||||
#define PHY_Status_REG 0x11U
|
||||
#define PHY_10M_MASK ((1<<12) || (1<<13))
|
||||
#define PHY_100M_MASK ((1<<14) || (1<<15))
|
||||
#define PHY_FULL_DUPLEX_MASK ((1<<15) || (1<<13))
|
||||
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
|
||||
#define PHY_Status_SPEED_100M(sr) ((sr) & PHY_100M_MASK)
|
||||
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
|
||||
/* The PHY interrupt source flag register. */
|
||||
#define PHY_INTERRUPT_FLAG_REG 0x15U
|
||||
/* The PHY interrupt mask register. */
|
||||
#define PHY_INTERRUPT_MASK_REG 0x15U
|
||||
#define PHY_LINK_CHANGE_FLAG (1<<2)
|
||||
#define PHY_LINK_CHANGE_MASK (1<<9)
|
||||
#define PHY_INT_MASK 0
|
||||
|
||||
#endif /* PHY_USING_DM9161CEP */
|
||||
|
||||
#ifdef PHY_USING_DP83848C
|
||||
#define PHY_Status_REG 0x10U
|
||||
#define PHY_10M_MASK (1<<1)
|
||||
#define PHY_FULL_DUPLEX_MASK (1<<2)
|
||||
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
|
||||
#define PHY_Status_SPEED_100M(sr) (!PHY_Status_SPEED_10M(sr))
|
||||
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
|
||||
/* The PHY interrupt source flag register. */
|
||||
#define PHY_INTERRUPT_FLAG_REG 0x12U
|
||||
#define PHY_LINK_CHANGE_FLAG (1<<13)
|
||||
/* The PHY interrupt control register. */
|
||||
#define PHY_INTERRUPT_CTRL_REG 0x11U
|
||||
#define PHY_INTERRUPT_EN ((1<<0)|(1<<1))
|
||||
/* The PHY interrupt mask register. */
|
||||
#define PHY_INTERRUPT_MASK_REG 0x12U
|
||||
#define PHY_INT_MASK (1<<5)
|
||||
#endif /* PHY_USING_DP83848C */
|
||||
|
||||
#endif /* __DRV_ETH_H__ */
|
||||
@ -496,6 +496,7 @@ const static struct rt_pin_ops _at32_pin_ops =
|
||||
at32_pin_attach_irq,
|
||||
at32_pin_dettach_irq,
|
||||
at32_pin_irq_enable,
|
||||
RT_NULL,
|
||||
};
|
||||
|
||||
rt_inline void pin_irq_hdr(int irqno)
|
||||
|
||||
246
bsp/at32/Libraries/rt_drivers/drv_rtc.c
Normal file
246
bsp/at32/Libraries/rt_drivers/drv_rtc.c
Normal file
@ -0,0 +1,246 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-05-19 shelton first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef BSP_USING_RTC
|
||||
|
||||
#ifndef BKP_DR1
|
||||
#define BKP_DR1 RT_NULL
|
||||
#endif
|
||||
|
||||
//#define DRV_DEBUG
|
||||
#define LOG_TAG "drv.rtc"
|
||||
#include <drv_log.h>
|
||||
|
||||
#define BKUP_REG_DATA 0xA5A5
|
||||
|
||||
static struct rt_device rtc;
|
||||
|
||||
static time_t get_rtc_timestamp(void)
|
||||
{
|
||||
#ifdef SOC_SERIES_AT32F415
|
||||
struct tm tm_new;
|
||||
ERTC_TimeType ERTC_TimeStruct;
|
||||
ERTC_DateType ERTC_DateStruct;
|
||||
|
||||
ERTC_GetTimeValue(ERTC_Format_BIN, &ERTC_TimeStruct);
|
||||
ERTC_GetDateValue(ERTC_Format_BIN, &ERTC_DateStruct);
|
||||
tm_new.tm_sec = ERTC_TimeStruct.ERTC_Seconds;
|
||||
tm_new.tm_min = ERTC_TimeStruct.ERTC_Minutes;
|
||||
tm_new.tm_hour = ERTC_TimeStruct.ERTC_Hours;
|
||||
tm_new.tm_mday = ERTC_DateStruct.ERTC_Date;
|
||||
tm_new.tm_mon = ERTC_DateStruct.ERTC_Month - 1;
|
||||
tm_new.tm_year = ERTC_DateStruct.ERTC_Year + 100;
|
||||
|
||||
LOG_D("get rtc time.");
|
||||
return mktime(&tm_new);
|
||||
#else
|
||||
return RTC_GetCounter();
|
||||
#endif
|
||||
}
|
||||
|
||||
static rt_err_t set_rtc_time_stamp(time_t time_stamp)
|
||||
{
|
||||
#ifdef SOC_SERIES_AT32F415
|
||||
ERTC_TimeType ERTC_TimeStructure;
|
||||
ERTC_DateType ERTC_DateStructure;
|
||||
|
||||
struct tm *p_tm;
|
||||
|
||||
p_tm = localtime(&time_stamp);
|
||||
if (p_tm->tm_year < 100)
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
ERTC_TimeStructure.ERTC_Seconds = p_tm->tm_sec ;
|
||||
ERTC_TimeStructure.ERTC_Minutes = p_tm->tm_min ;
|
||||
ERTC_TimeStructure.ERTC_Hours = p_tm->tm_hour;
|
||||
ERTC_DateStructure.ERTC_Date = p_tm->tm_mday;
|
||||
ERTC_DateStructure.ERTC_Month = p_tm->tm_mon + 1 ;
|
||||
ERTC_DateStructure.ERTC_Year = p_tm->tm_year - 100;
|
||||
ERTC_DateStructure.ERTC_WeekDay = p_tm->tm_wday + 1;
|
||||
|
||||
if (ERTC_SetTimeValue(ERTC_Format_BIN, &ERTC_TimeStructure) != SUCCESS)
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
if (ERTC_SetDateValue(ERTC_Format_BIN, &ERTC_DateStructure) != SUCCESS)
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
#else
|
||||
/* Set the RTC counter value */
|
||||
RTC_SetCounter(time_stamp);
|
||||
/* Wait until last write operation on RTC registers has finished */
|
||||
RTC_WaitForLastTask();
|
||||
#endif /* SOC_SERIES_AT32F415 */
|
||||
LOG_D("set rtc time.");
|
||||
#ifdef SOC_SERIES_AT32F415
|
||||
ERTC_WriteBackupRegister(ERTC_BKP_DT0, BKUP_REG_DATA);
|
||||
#else
|
||||
BKP_WriteBackupReg(BKP_DT1, BKUP_REG_DATA);
|
||||
#endif
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static void rt_rtc_init(void)
|
||||
{
|
||||
#if defined (SOC_SERIES_AT32F415)
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_PWR, ENABLE);
|
||||
#else
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_PWR | RCC_APB1PERIPH_BKP, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_RTC_USING_LSI
|
||||
RCC_LSICmd(ENABLE);
|
||||
while(RCC_GetFlagStatus(RCC_FLAG_LSISTBL) == RESET);
|
||||
#else
|
||||
PWR_BackupAccessCtrl(ENABLE);
|
||||
RCC_LSEConfig(RCC_LSE_ENABLE);
|
||||
while(RCC_GetFlagStatus(RCC_FLAG_LSESTBL) == RESET);
|
||||
#endif /* BSP_RTC_USING_LSI */
|
||||
}
|
||||
|
||||
static rt_err_t rt_rtc_config(struct rt_device *dev)
|
||||
{
|
||||
#if defined (SOC_SERIES_AT32F415)
|
||||
ERTC_InitType ERTC_InitStructure;
|
||||
#endif
|
||||
/* Allow access to BKP Domain */
|
||||
PWR_BackupAccessCtrl(ENABLE);
|
||||
|
||||
#ifdef SOC_SERIES_AT32F415
|
||||
#ifdef BSP_RTC_USING_LSI
|
||||
RCC_ERTCCLKConfig(RCC_ERTCCLKSelection_LSI);
|
||||
RCC_ERTCCLKCmd(ENABLE);
|
||||
#else
|
||||
RCC_ERTCCLKConfig(RCC_ERTCCLKSelection_LSE);
|
||||
RCC_ERTCCLKCmd(ENABLE);
|
||||
#endif /* BSP_RTC_USING_LSI */
|
||||
/* Wait for ERTC APB registers synchronisation */
|
||||
ERTC_WaitForSynchro();
|
||||
#else
|
||||
#ifdef BSP_RTC_USING_LSI
|
||||
RCC_RTCCLKConfig(RCC_RTCCLKSelection_LSI);
|
||||
RCC_RTCCLKCmd(ENABLE);
|
||||
#else
|
||||
RCC_RTCCLKConfig(RCC_RTCCLKSelection_LSE);
|
||||
RCC_RTCCLKCmd(ENABLE);
|
||||
#endif /* BSP_RTC_USING_LSI */
|
||||
/* Wait for RTC registers synchronization */
|
||||
RTC_WaitForSynchro();
|
||||
/* Wait until last write operation on RTC registers has finished */
|
||||
RTC_WaitForLastTask();
|
||||
#endif /* SOC_SERIES_AT32F415 */
|
||||
|
||||
#ifdef SOC_SERIES_AT32F415
|
||||
if (ERTC_ReadBackupRegister(BKP_DT1)!= BKUP_REG_DATA)
|
||||
#else
|
||||
if (BKP_ReadBackupReg(BKP_DT1) != BKUP_REG_DATA)
|
||||
#endif
|
||||
{
|
||||
LOG_I("RTC hasn't been configured, please use <date> command to config.");
|
||||
#ifdef SOC_SERIES_AT32F415
|
||||
/* Configure the ERTC data register and ERTC prescaler */
|
||||
ERTC_InitStructure.ERTC_AsynchPrediv = 0x7F;
|
||||
ERTC_InitStructure.ERTC_SynchPrediv = 0xFF;
|
||||
ERTC_InitStructure.ERTC_HourFormat = ERTC_HourFormat_24;
|
||||
ERTC_Init(&ERTC_InitStructure);
|
||||
#else
|
||||
/* Set RTC prescaler: set RTC period to 1sec */
|
||||
RTC_SetDIV(32767);
|
||||
/* Wait until last write operation on RTC registers has finished */
|
||||
RTC_WaitForLastTask();
|
||||
#endif
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
|
||||
{
|
||||
rt_err_t result = RT_EOK;
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_RTC_GET_TIME:
|
||||
*(rt_uint32_t *)args = get_rtc_timestamp();
|
||||
LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_RTC_SET_TIME:
|
||||
if (set_rtc_time_stamp(*(rt_uint32_t *)args))
|
||||
{
|
||||
result = -RT_ERROR;
|
||||
}
|
||||
LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args);
|
||||
break;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
const static struct rt_device_ops rtc_ops =
|
||||
{
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
rt_rtc_control
|
||||
};
|
||||
#endif
|
||||
|
||||
static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint32_t flag)
|
||||
{
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
|
||||
rt_rtc_init();
|
||||
if (rt_rtc_config(device) != RT_EOK)
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
device->ops = &rtc_ops;
|
||||
#else
|
||||
device->init = RT_NULL;
|
||||
device->open = RT_NULL;
|
||||
device->close = RT_NULL;
|
||||
device->read = RT_NULL;
|
||||
device->write = RT_NULL;
|
||||
device->control = rt_rtc_control;
|
||||
#endif
|
||||
device->type = RT_Device_Class_RTC;
|
||||
device->rx_indicate = RT_NULL;
|
||||
device->tx_complete = RT_NULL;
|
||||
device->user_data = RT_NULL;
|
||||
|
||||
/* register a character device */
|
||||
return rt_device_register(device, name, flag);
|
||||
}
|
||||
|
||||
int rt_hw_rtc_init(void)
|
||||
{
|
||||
rt_err_t result;
|
||||
result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
|
||||
if (result != RT_EOK)
|
||||
{
|
||||
LOG_E("rtc register err code: %d", result);
|
||||
return result;
|
||||
}
|
||||
LOG_D("rtc init success");
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
INIT_DEVICE_EXPORT(rt_hw_rtc_init);
|
||||
|
||||
#endif /* BSP_USING_RTC */
|
||||
@ -17,6 +17,5 @@ config PKGS_DIR
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "$PKGS_DIR/Kconfig"
|
||||
source "../libraries/Kconfig"
|
||||
source "../Libraries/Kconfig"
|
||||
source "board/Kconfig"
|
||||
|
||||
|
||||
@ -47,6 +47,7 @@ AT32F403A-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
|
||||
| HWTIMER | 支持 | TMR3/4/5 |
|
||||
| SDIO | 支持 | SDIO1 |
|
||||
| WDT | 支持 | |
|
||||
| RTC | 支持 | |
|
||||
|
||||
### IO在板级支持包中的映射情况
|
||||
|
||||
|
||||
@ -24,6 +24,24 @@ menu "On-chip Peripheral Drivers"
|
||||
select RT_USING_PIN
|
||||
default y
|
||||
|
||||
menuconfig BSP_USING_RTC
|
||||
bool "Enable RTC"
|
||||
select RT_USING_RTC
|
||||
select RT_USING_LIBC
|
||||
default n
|
||||
if BSP_USING_RTC
|
||||
choice
|
||||
prompt "Select clock source"
|
||||
default BSP_RTC_USING_LSE
|
||||
|
||||
config BSP_RTC_USING_LSE
|
||||
bool "RTC USING LSE"
|
||||
|
||||
config BSP_RTC_USING_LSI
|
||||
bool "RTC USING LSI"
|
||||
endchoice
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
|
||||
@ -23,7 +23,7 @@
|
||||
#include <rtthread.h>
|
||||
#include "at32_msp.h"
|
||||
|
||||
#ifdef BSP_USING_SERIAL
|
||||
#ifdef BSP_USING_UART
|
||||
void at32_msp_usart_init(void *Instance)
|
||||
{
|
||||
GPIO_InitType GPIO_InitStruct;
|
||||
|
||||
@ -57,7 +57,7 @@ if PLATFORM == 'gcc':
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
@ -88,7 +88,7 @@ elif PLATFORM == 'armcc':
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
@ -136,8 +136,15 @@ elif PLATFORM == 'iar':
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
|
||||
486
bsp/at32/at32f407-start/.config
Normal file
486
bsp/at32/at32f407-start/.config
Normal file
@ -0,0 +1,486 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# RT-Thread Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# RT-Thread Kernel
|
||||
#
|
||||
CONFIG_RT_NAME_MAX=8
|
||||
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
|
||||
# CONFIG_RT_USING_SMP is not set
|
||||
CONFIG_RT_ALIGN_SIZE=4
|
||||
# CONFIG_RT_THREAD_PRIORITY_8 is not set
|
||||
CONFIG_RT_THREAD_PRIORITY_32=y
|
||||
# CONFIG_RT_THREAD_PRIORITY_256 is not set
|
||||
CONFIG_RT_THREAD_PRIORITY_MAX=32
|
||||
CONFIG_RT_TICK_PER_SECOND=1000
|
||||
CONFIG_RT_USING_OVERFLOW_CHECK=y
|
||||
CONFIG_RT_USING_HOOK=y
|
||||
CONFIG_RT_USING_IDLE_HOOK=y
|
||||
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
|
||||
CONFIG_IDLE_THREAD_STACK_SIZE=256
|
||||
CONFIG_RT_USING_TIMER_SOFT=y
|
||||
CONFIG_RT_TIMER_THREAD_PRIO=4
|
||||
CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
|
||||
CONFIG_RT_DEBUG=y
|
||||
CONFIG_RT_DEBUG_COLOR=y
|
||||
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
|
||||
|
||||
#
|
||||
# Inter-Thread communication
|
||||
#
|
||||
CONFIG_RT_USING_SEMAPHORE=y
|
||||
CONFIG_RT_USING_MUTEX=y
|
||||
CONFIG_RT_USING_EVENT=y
|
||||
CONFIG_RT_USING_MAILBOX=y
|
||||
CONFIG_RT_USING_MESSAGEQUEUE=y
|
||||
# CONFIG_RT_USING_SIGNALS is not set
|
||||
|
||||
#
|
||||
# Memory Management
|
||||
#
|
||||
CONFIG_RT_USING_MEMPOOL=y
|
||||
CONFIG_RT_USING_MEMHEAP=y
|
||||
# CONFIG_RT_USING_NOHEAP is not set
|
||||
CONFIG_RT_USING_SMALL_MEM=y
|
||||
# CONFIG_RT_USING_SLAB is not set
|
||||
# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
|
||||
# CONFIG_RT_USING_MEMTRACE is not set
|
||||
CONFIG_RT_USING_HEAP=y
|
||||
|
||||
#
|
||||
# Kernel Device Object
|
||||
#
|
||||
CONFIG_RT_USING_DEVICE=y
|
||||
# CONFIG_RT_USING_DEVICE_OPS is not set
|
||||
# CONFIG_RT_USING_INTERRUPT_INFO is not set
|
||||
CONFIG_RT_USING_CONSOLE=y
|
||||
CONFIG_RT_CONSOLEBUF_SIZE=128
|
||||
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
|
||||
CONFIG_RT_VER_NUM=0x40003
|
||||
CONFIG_ARCH_ARM=y
|
||||
CONFIG_RT_USING_CPU_FFS=y
|
||||
CONFIG_ARCH_ARM_CORTEX_M=y
|
||||
CONFIG_ARCH_ARM_CORTEX_M4=y
|
||||
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
|
||||
|
||||
#
|
||||
# RT-Thread Components
|
||||
#
|
||||
CONFIG_RT_USING_COMPONENTS_INIT=y
|
||||
CONFIG_RT_USING_USER_MAIN=y
|
||||
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
|
||||
CONFIG_RT_MAIN_THREAD_PRIORITY=10
|
||||
|
||||
#
|
||||
# C++ features
|
||||
#
|
||||
# CONFIG_RT_USING_CPLUSPLUS is not set
|
||||
|
||||
#
|
||||
# Command shell
|
||||
#
|
||||
CONFIG_RT_USING_FINSH=y
|
||||
CONFIG_FINSH_THREAD_NAME="tshell"
|
||||
CONFIG_FINSH_USING_HISTORY=y
|
||||
CONFIG_FINSH_HISTORY_LINES=5
|
||||
CONFIG_FINSH_USING_SYMTAB=y
|
||||
CONFIG_FINSH_USING_DESCRIPTION=y
|
||||
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
|
||||
CONFIG_FINSH_THREAD_PRIORITY=20
|
||||
CONFIG_FINSH_THREAD_STACK_SIZE=4096
|
||||
CONFIG_FINSH_CMD_SIZE=80
|
||||
# CONFIG_FINSH_USING_AUTH is not set
|
||||
CONFIG_FINSH_USING_MSH=y
|
||||
CONFIG_FINSH_USING_MSH_DEFAULT=y
|
||||
CONFIG_FINSH_USING_MSH_ONLY=y
|
||||
CONFIG_FINSH_ARG_MAX=10
|
||||
|
||||
#
|
||||
# Device virtual file system
|
||||
#
|
||||
CONFIG_RT_USING_DFS=y
|
||||
CONFIG_DFS_USING_WORKDIR=y
|
||||
CONFIG_DFS_FILESYSTEMS_MAX=2
|
||||
CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
|
||||
CONFIG_DFS_FD_MAX=16
|
||||
# CONFIG_RT_USING_DFS_MNTTABLE is not set
|
||||
CONFIG_RT_USING_DFS_ELMFAT=y
|
||||
|
||||
#
|
||||
# elm-chan's FatFs, Generic FAT Filesystem Module
|
||||
#
|
||||
CONFIG_RT_DFS_ELM_CODE_PAGE=437
|
||||
CONFIG_RT_DFS_ELM_WORD_ACCESS=y
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
|
||||
CONFIG_RT_DFS_ELM_USE_LFN_3=y
|
||||
CONFIG_RT_DFS_ELM_USE_LFN=3
|
||||
CONFIG_RT_DFS_ELM_MAX_LFN=255
|
||||
CONFIG_RT_DFS_ELM_DRIVES=2
|
||||
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
|
||||
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
|
||||
CONFIG_RT_DFS_ELM_REENTRANT=y
|
||||
CONFIG_RT_USING_DFS_DEVFS=y
|
||||
# CONFIG_RT_USING_DFS_ROMFS is not set
|
||||
# CONFIG_RT_USING_DFS_RAMFS is not set
|
||||
# CONFIG_RT_USING_DFS_UFFS is not set
|
||||
# CONFIG_RT_USING_DFS_JFFS2 is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
CONFIG_RT_USING_DEVICE_IPC=y
|
||||
CONFIG_RT_PIPE_BUFSZ=512
|
||||
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
|
||||
CONFIG_RT_USING_SERIAL=y
|
||||
# CONFIG_RT_SERIAL_USING_DMA is not set
|
||||
CONFIG_RT_SERIAL_RB_BUFSZ=64
|
||||
# CONFIG_RT_USING_CAN is not set
|
||||
CONFIG_RT_USING_HWTIMER=y
|
||||
# CONFIG_RT_USING_CPUTIME is not set
|
||||
CONFIG_RT_USING_I2C=y
|
||||
# CONFIG_RT_I2C_DEBUG is not set
|
||||
CONFIG_RT_USING_I2C_BITOPS=y
|
||||
# CONFIG_RT_I2C_BITOPS_DEBUG is not set
|
||||
CONFIG_RT_USING_PIN=y
|
||||
CONFIG_RT_USING_ADC=y
|
||||
CONFIG_RT_USING_PWM=y
|
||||
# CONFIG_RT_USING_MTD_NOR is not set
|
||||
# CONFIG_RT_USING_MTD_NAND is not set
|
||||
# CONFIG_RT_USING_PM is not set
|
||||
CONFIG_RT_USING_RTC=y
|
||||
# CONFIG_RT_USING_ALARM is not set
|
||||
# CONFIG_RT_USING_SOFT_RTC is not set
|
||||
CONFIG_RT_USING_SDIO=y
|
||||
CONFIG_RT_SDIO_STACK_SIZE=512
|
||||
CONFIG_RT_SDIO_THREAD_PRIORITY=15
|
||||
CONFIG_RT_MMCSD_STACK_SIZE=1024
|
||||
CONFIG_RT_MMCSD_THREAD_PREORITY=22
|
||||
CONFIG_RT_MMCSD_MAX_PARTITION=16
|
||||
# CONFIG_RT_SDIO_DEBUG is not set
|
||||
CONFIG_RT_USING_SPI=y
|
||||
# CONFIG_RT_USING_QSPI is not set
|
||||
# CONFIG_RT_USING_SPI_MSD is not set
|
||||
# CONFIG_RT_USING_SFUD is not set
|
||||
# CONFIG_RT_USING_ENC28J60 is not set
|
||||
# CONFIG_RT_USING_SPI_WIFI is not set
|
||||
# CONFIG_RT_USING_WDT is not set
|
||||
# CONFIG_RT_USING_AUDIO is not set
|
||||
# CONFIG_RT_USING_SENSOR is not set
|
||||
# CONFIG_RT_USING_TOUCH is not set
|
||||
# CONFIG_RT_USING_HWCRYPTO is not set
|
||||
# CONFIG_RT_USING_PULSE_ENCODER is not set
|
||||
# CONFIG_RT_USING_INPUT_CAPTURE is not set
|
||||
# CONFIG_RT_USING_WIFI is not set
|
||||
|
||||
#
|
||||
# Using USB
|
||||
#
|
||||
# CONFIG_RT_USING_USB_HOST is not set
|
||||
# CONFIG_RT_USING_USB_DEVICE is not set
|
||||
|
||||
#
|
||||
# POSIX layer and C standard library
|
||||
#
|
||||
CONFIG_RT_USING_LIBC=y
|
||||
# CONFIG_RT_USING_PTHREADS is not set
|
||||
CONFIG_RT_USING_POSIX=y
|
||||
# CONFIG_RT_USING_POSIX_MMAP is not set
|
||||
# CONFIG_RT_USING_POSIX_TERMIOS is not set
|
||||
# CONFIG_RT_USING_POSIX_AIO is not set
|
||||
# CONFIG_RT_USING_MODULE is not set
|
||||
|
||||
#
|
||||
# Network
|
||||
#
|
||||
|
||||
#
|
||||
# Socket abstraction layer
|
||||
#
|
||||
# CONFIG_RT_USING_SAL is not set
|
||||
|
||||
#
|
||||
# Network interface device
|
||||
#
|
||||
# CONFIG_RT_USING_NETDEV is not set
|
||||
|
||||
#
|
||||
# light weight TCP/IP stack
|
||||
#
|
||||
# CONFIG_RT_USING_LWIP is not set
|
||||
|
||||
#
|
||||
# AT commands
|
||||
#
|
||||
# CONFIG_RT_USING_AT is not set
|
||||
|
||||
#
|
||||
# VBUS(Virtual Software BUS)
|
||||
#
|
||||
# CONFIG_RT_USING_VBUS is not set
|
||||
|
||||
#
|
||||
# Utilities
|
||||
#
|
||||
# CONFIG_RT_USING_RYM is not set
|
||||
# CONFIG_RT_USING_ULOG is not set
|
||||
# CONFIG_RT_USING_UTEST is not set
|
||||
# CONFIG_RT_USING_LWP is not set
|
||||
|
||||
#
|
||||
# RT-Thread online packages
|
||||
#
|
||||
|
||||
#
|
||||
# IoT - internet of things
|
||||
#
|
||||
# CONFIG_PKG_USING_PAHOMQTT is not set
|
||||
# CONFIG_PKG_USING_WEBCLIENT is not set
|
||||
# CONFIG_PKG_USING_WEBNET is not set
|
||||
# CONFIG_PKG_USING_MONGOOSE is not set
|
||||
# CONFIG_PKG_USING_MYMQTT is not set
|
||||
# CONFIG_PKG_USING_KAWAII_MQTT is not set
|
||||
# CONFIG_PKG_USING_WEBTERMINAL is not set
|
||||
# CONFIG_PKG_USING_CJSON is not set
|
||||
# CONFIG_PKG_USING_JSMN is not set
|
||||
# CONFIG_PKG_USING_LIBMODBUS is not set
|
||||
# CONFIG_PKG_USING_FREEMODBUS is not set
|
||||
# CONFIG_PKG_USING_LJSON is not set
|
||||
# CONFIG_PKG_USING_EZXML is not set
|
||||
# CONFIG_PKG_USING_NANOPB is not set
|
||||
|
||||
#
|
||||
# Wi-Fi
|
||||
#
|
||||
|
||||
#
|
||||
# Marvell WiFi
|
||||
#
|
||||
# CONFIG_PKG_USING_WLANMARVELL is not set
|
||||
|
||||
#
|
||||
# Wiced WiFi
|
||||
#
|
||||
# CONFIG_PKG_USING_WLAN_WICED is not set
|
||||
# CONFIG_PKG_USING_RW007 is not set
|
||||
# CONFIG_PKG_USING_COAP is not set
|
||||
# CONFIG_PKG_USING_NOPOLL is not set
|
||||
# CONFIG_PKG_USING_NETUTILS is not set
|
||||
# CONFIG_PKG_USING_PPP_DEVICE is not set
|
||||
# CONFIG_PKG_USING_AT_DEVICE is not set
|
||||
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
|
||||
# CONFIG_PKG_USING_WIZNET is not set
|
||||
|
||||
#
|
||||
# IoT Cloud
|
||||
#
|
||||
# CONFIG_PKG_USING_ONENET is not set
|
||||
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
|
||||
# CONFIG_PKG_USING_ALI_IOTKIT is not set
|
||||
# CONFIG_PKG_USING_AZURE is not set
|
||||
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
|
||||
# CONFIG_PKG_USING_JIOT-C-SDK is not set
|
||||
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
|
||||
# CONFIG_PKG_USING_JOYLINK is not set
|
||||
# CONFIG_PKG_USING_NIMBLE is not set
|
||||
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
|
||||
# CONFIG_PKG_USING_IPMSG is not set
|
||||
# CONFIG_PKG_USING_LSSDP is not set
|
||||
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
|
||||
# CONFIG_PKG_USING_LIBRWS is not set
|
||||
# CONFIG_PKG_USING_TCPSERVER is not set
|
||||
# CONFIG_PKG_USING_PROTOBUF_C is not set
|
||||
# CONFIG_PKG_USING_ONNX_PARSER is not set
|
||||
# CONFIG_PKG_USING_ONNX_BACKEND is not set
|
||||
# CONFIG_PKG_USING_DLT645 is not set
|
||||
# CONFIG_PKG_USING_QXWZ is not set
|
||||
# CONFIG_PKG_USING_SMTP_CLIENT is not set
|
||||
# CONFIG_PKG_USING_ABUP_FOTA is not set
|
||||
# CONFIG_PKG_USING_LIBCURL2RTT is not set
|
||||
# CONFIG_PKG_USING_CAPNP is not set
|
||||
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
|
||||
# CONFIG_PKG_USING_AGILE_TELNET is not set
|
||||
|
||||
#
|
||||
# security packages
|
||||
#
|
||||
# CONFIG_PKG_USING_MBEDTLS is not set
|
||||
# CONFIG_PKG_USING_libsodium is not set
|
||||
# CONFIG_PKG_USING_TINYCRYPT is not set
|
||||
# CONFIG_PKG_USING_TFM is not set
|
||||
|
||||
#
|
||||
# language packages
|
||||
#
|
||||
# CONFIG_PKG_USING_LUA is not set
|
||||
# CONFIG_PKG_USING_JERRYSCRIPT is not set
|
||||
# CONFIG_PKG_USING_MICROPYTHON is not set
|
||||
|
||||
#
|
||||
# multimedia packages
|
||||
#
|
||||
# CONFIG_PKG_USING_OPENMV is not set
|
||||
# CONFIG_PKG_USING_MUPDF is not set
|
||||
# CONFIG_PKG_USING_STEMWIN is not set
|
||||
# CONFIG_PKG_USING_WAVPLAYER is not set
|
||||
# CONFIG_PKG_USING_TJPGD is not set
|
||||
|
||||
#
|
||||
# tools packages
|
||||
#
|
||||
# CONFIG_PKG_USING_CMBACKTRACE is not set
|
||||
# CONFIG_PKG_USING_EASYFLASH is not set
|
||||
# CONFIG_PKG_USING_EASYLOGGER is not set
|
||||
# CONFIG_PKG_USING_SYSTEMVIEW is not set
|
||||
# CONFIG_PKG_USING_RDB is not set
|
||||
# CONFIG_PKG_USING_QRCODE is not set
|
||||
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
|
||||
# CONFIG_PKG_USING_ADBD is not set
|
||||
# CONFIG_PKG_USING_COREMARK is not set
|
||||
# CONFIG_PKG_USING_DHRYSTONE is not set
|
||||
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
|
||||
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
|
||||
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
|
||||
# CONFIG_PKG_USING_BS8116A is not set
|
||||
|
||||
#
|
||||
# system packages
|
||||
#
|
||||
# CONFIG_PKG_USING_GUIENGINE is not set
|
||||
# CONFIG_PKG_USING_PERSIMMON is not set
|
||||
# CONFIG_PKG_USING_CAIRO is not set
|
||||
# CONFIG_PKG_USING_PIXMAN is not set
|
||||
# CONFIG_PKG_USING_LWEXT4 is not set
|
||||
# CONFIG_PKG_USING_PARTITION is not set
|
||||
# CONFIG_PKG_USING_FAL is not set
|
||||
# CONFIG_PKG_USING_SQLITE is not set
|
||||
# CONFIG_PKG_USING_RTI is not set
|
||||
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
|
||||
# CONFIG_PKG_USING_CMSIS is not set
|
||||
# CONFIG_PKG_USING_DFS_YAFFS is not set
|
||||
# CONFIG_PKG_USING_LITTLEFS is not set
|
||||
# CONFIG_PKG_USING_THREAD_POOL is not set
|
||||
# CONFIG_PKG_USING_ROBOTS is not set
|
||||
# CONFIG_PKG_USING_EV is not set
|
||||
# CONFIG_PKG_USING_SYSWATCH is not set
|
||||
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
|
||||
# CONFIG_PKG_USING_PLCCORE is not set
|
||||
|
||||
#
|
||||
# peripheral libraries and drivers
|
||||
#
|
||||
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
|
||||
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
|
||||
# CONFIG_PKG_USING_SHT2X is not set
|
||||
# CONFIG_PKG_USING_SHT3X is not set
|
||||
# CONFIG_PKG_USING_STM32_SDIO is not set
|
||||
# CONFIG_PKG_USING_ICM20608 is not set
|
||||
# CONFIG_PKG_USING_U8G2 is not set
|
||||
# CONFIG_PKG_USING_BUTTON is not set
|
||||
# CONFIG_PKG_USING_PCF8574 is not set
|
||||
# CONFIG_PKG_USING_SX12XX is not set
|
||||
# CONFIG_PKG_USING_SIGNAL_LED is not set
|
||||
# CONFIG_PKG_USING_LEDBLINK is not set
|
||||
# CONFIG_PKG_USING_LITTLED is not set
|
||||
# CONFIG_PKG_USING_LKDGUI is not set
|
||||
# CONFIG_PKG_USING_WM_LIBRARIES is not set
|
||||
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
|
||||
# CONFIG_PKG_USING_INFRARED is not set
|
||||
# CONFIG_PKG_USING_ROSSERIAL is not set
|
||||
# CONFIG_PKG_USING_AGILE_BUTTON is not set
|
||||
# CONFIG_PKG_USING_AGILE_LED is not set
|
||||
# CONFIG_PKG_USING_AT24CXX is not set
|
||||
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
|
||||
# CONFIG_PKG_USING_AD7746 is not set
|
||||
# CONFIG_PKG_USING_PCA9685 is not set
|
||||
# CONFIG_PKG_USING_I2C_TOOLS is not set
|
||||
# CONFIG_PKG_USING_NRF24L01 is not set
|
||||
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
|
||||
# CONFIG_PKG_USING_MAX17048 is not set
|
||||
# CONFIG_PKG_USING_RPLIDAR is not set
|
||||
# CONFIG_PKG_USING_AS608 is not set
|
||||
# CONFIG_PKG_USING_RC522 is not set
|
||||
# CONFIG_PKG_USING_EMBARC_BSP is not set
|
||||
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
|
||||
# CONFIG_PKG_USING_MAX7219 is not set
|
||||
# CONFIG_PKG_USING_BEEP is not set
|
||||
# CONFIG_PKG_USING_EASYBLINK is not set
|
||||
|
||||
#
|
||||
# miscellaneous packages
|
||||
#
|
||||
# CONFIG_PKG_USING_LIBCSV is not set
|
||||
# CONFIG_PKG_USING_OPTPARSE is not set
|
||||
# CONFIG_PKG_USING_FASTLZ is not set
|
||||
# CONFIG_PKG_USING_MINILZO is not set
|
||||
# CONFIG_PKG_USING_QUICKLZ is not set
|
||||
# CONFIG_PKG_USING_MULTIBUTTON is not set
|
||||
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
|
||||
# CONFIG_PKG_USING_CANFESTIVAL is not set
|
||||
# CONFIG_PKG_USING_ZLIB is not set
|
||||
# CONFIG_PKG_USING_DSTR is not set
|
||||
# CONFIG_PKG_USING_TINYFRAME is not set
|
||||
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
|
||||
# CONFIG_PKG_USING_DIGITALCTRL is not set
|
||||
# CONFIG_PKG_USING_UPACKER is not set
|
||||
# CONFIG_PKG_USING_UPARAM is not set
|
||||
|
||||
#
|
||||
# samples: kernel and components samples
|
||||
#
|
||||
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_HELLO is not set
|
||||
# CONFIG_PKG_USING_VI is not set
|
||||
# CONFIG_PKG_USING_NNOM is not set
|
||||
# CONFIG_PKG_USING_LIBANN is not set
|
||||
# CONFIG_PKG_USING_ELAPACK is not set
|
||||
# CONFIG_PKG_USING_ARMv7M_DWT is not set
|
||||
# CONFIG_PKG_USING_VT100 is not set
|
||||
# CONFIG_PKG_USING_ULAPACK is not set
|
||||
# CONFIG_PKG_USING_UKAL is not set
|
||||
CONFIG_SOC_FAMILY_AT32=y
|
||||
CONFIG_SOC_SERIES_AT32F407=y
|
||||
|
||||
#
|
||||
# Hardware Drivers Config
|
||||
#
|
||||
CONFIG_SOC_AT32F407VGT7=y
|
||||
|
||||
#
|
||||
# Onboard Peripheral Drivers
|
||||
#
|
||||
CONFIG_BSP_USING_SERIAL=y
|
||||
|
||||
#
|
||||
# On-chip Peripheral Drivers
|
||||
#
|
||||
CONFIG_BSP_USING_GPIO=y
|
||||
# CONFIG_BSP_USING_ETH is not set
|
||||
# CONFIG_BSP_USING_RTC is not set
|
||||
# CONFIG_BSP_RTC_USING_LSE is not set
|
||||
# CONFIG_BSP_RTC_USING_LSI is not set
|
||||
CONFIG_BSP_USING_UART=y
|
||||
CONFIG_BSP_USING_UART1=y
|
||||
CONFIG_BSP_USING_UART2=y
|
||||
CONFIG_BSP_USING_UART3=y
|
||||
# CONFIG_BSP_USING_PWM is not set
|
||||
# CONFIG_BSP_USING_HWTIMER is not set
|
||||
# CONFIG_BSP_USING_SPI is not set
|
||||
# CONFIG_BSP_USING_I2C1 is not set
|
||||
# CONFIG_BSP_USING_ADC is not set
|
||||
# CONFIG_BSP_USING_SDIO is not set
|
||||
39
bsp/at32/at32f407-start/JLinkSettings.ini
Normal file
39
bsp/at32/at32f407-start/JLinkSettings.ini
Normal file
@ -0,0 +1,39 @@
|
||||
[BREAKPOINTS]
|
||||
ForceImpTypeAny = 0
|
||||
ShowInfoWin = 1
|
||||
EnableFlashBP = 2
|
||||
BPDuringExecution = 0
|
||||
[CFI]
|
||||
CFISize = 0x00
|
||||
CFIAddr = 0x00
|
||||
[CPU]
|
||||
MonModeVTableAddr = 0xFFFFFFFF
|
||||
MonModeDebug = 0
|
||||
MaxNumAPs = 0
|
||||
LowPowerHandlingMode = 0
|
||||
OverrideMemMap = 0
|
||||
AllowSimulation = 1
|
||||
ScriptFile=""
|
||||
[FLASH]
|
||||
CacheExcludeSize = 0x00
|
||||
CacheExcludeAddr = 0x00
|
||||
MinNumBytesFlashDL = 0
|
||||
SkipProgOnCRCMatch = 1
|
||||
VerifyDownload = 1
|
||||
AllowCaching = 1
|
||||
EnableFlashDL = 2
|
||||
Override = 1
|
||||
Device="Cortex-M4"
|
||||
[GENERAL]
|
||||
WorkRAMSize = 0x00
|
||||
WorkRAMAddr = 0x00
|
||||
RAMUsageLimit = 0x00
|
||||
[SWO]
|
||||
SWOLogFile=""
|
||||
[MEM]
|
||||
RdOverrideOrMask = 0x00
|
||||
RdOverrideAndMask = 0xFFFFFFFF
|
||||
RdOverrideAddr = 0xFFFFFFFF
|
||||
WrOverrideOrMask = 0x00
|
||||
WrOverrideAndMask = 0xFFFFFFFF
|
||||
WrOverrideAddr = 0xFFFFFFFF
|
||||
22
bsp/at32/at32f407-start/Kconfig
Normal file
22
bsp/at32/at32f407-start/Kconfig
Normal file
@ -0,0 +1,22 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../../.."
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "$PKGS_DIR/Kconfig"
|
||||
source "../libraries/Kconfig"
|
||||
source "board/Kconfig"
|
||||
|
||||
142
bsp/at32/at32f407-start/README.md
Normal file
142
bsp/at32/at32f407-start/README.md
Normal file
@ -0,0 +1,142 @@
|
||||
# AT32F407 AT-START 开发板 BSP 说明
|
||||
|
||||
## 简介
|
||||
|
||||
AT32F407 AT-START是雅特力推出的一款AT32F407系列的评估板，其搭载的MCU主要资源参数如下：
|
||||
|
||||
| 硬件 | 描述 |
|
||||
| --------- | ------------- |
|
||||
| 芯片型号 | AT32F407VGT7 |
|
||||
| CPU | ARM Cortex M4 |
|
||||
| 主频 | 240M |
|
||||
| 片内SRAM | 96K可扩展224K |
|
||||
| 片内FLASH | 1024K |
|
||||
|
||||
## 编译说明
|
||||
|
||||
AT32F407-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以下是具体版本信息：
|
||||
|
||||
| IDE/编译器 | 已测试版本 |
|
||||
| ---------- | ---------------------------- |
|
||||
| MDK4 | MDK4.74 |
|
||||
| MDK5 | MDK523 |
|
||||
| IAR | IAR8.20 |
|
||||
| GCC | GCC 5.4.1 20160919 (release) |
|
||||
|
||||
## 板载资源
|
||||
|
||||
- MCU：AT32F407VGT7，主频 240MHz，1024KB FLASH ，96KB可扩展到224KB RAM
|
||||
- 常用外设
|
||||
- LED：3个，（红色PD13、白色PD14、绿色PD15）
|
||||
- 按键：1个，KEY_USER（兼具唤醒功能，PA0)
|
||||
- 常用接口：插针串口J8
|
||||
- 调试接口，JLINK、板载的 AT-LINK SWD 下载
|
||||
|
||||
## 外设支持
|
||||
|
||||
本 BSP 目前对外设驱动的支持情况如下：
|
||||
|
||||
| 驱动 | 支持情况 | 备注 |
|
||||
| --------- | -------- | :------------------------: |
|
||||
| UART | 支持 | USART1/2/3 |
|
||||
| GPIO | 支持 | PA0...PF7 |
|
||||
| IIC | 支持 | GPIO模拟I2C |
|
||||
| SPI | 支持 | SPI1/2 |
|
||||
| ADC | 支持 | ADC1/2 |
|
||||
| PWM | 支持 | TMR1/2 |
|
||||
| HWTIMER | 支持 | TMR3/4/5 |
|
||||
| SDIO | 支持 | SDIO1 |
|
||||
| WDT | 支持 | |
|
||||
| RTC | 支持 | |
|
||||
| ETH | 支持 | |
|
||||
|
||||
### IO在板级支持包中的映射情况
|
||||
|
||||
| IO号 | 板级包中的定义 |
|
||||
| ---- | -------------- |
|
||||
| PD13 | LED2 |
|
||||
| PD14 | LED3 |
|
||||
| PD15 | LED4 |
|
||||
| PA9 | USART1_TX |
|
||||
| PA10 | USART1_RX |
|
||||
| PA2 | USART2_TX |
|
||||
| PA3 | USART2_RX |
|
||||
| PB10 | USART3_TX |
|
||||
| PB11 | USART3_RX |
|
||||
| PA4 | SPI1_NSS |
|
||||
| PA5 | SPI1_SCK |
|
||||
| PA6 | SPI1_MISO |
|
||||
| PA7 | SPI1_MOSI |
|
||||
| PB12 | SPI2_NSS |
|
||||
| PB13 | SPI2_SCK |
|
||||
| PB14 | SPI2_MISO |
|
||||
| PB15 | SPI2_MOSI |
|
||||
| PB6 | I2C1_SCL |
|
||||
| PB7 | I2C1_SDA |
|
||||
| PC8 | SDIO1_D0 |
|
||||
| PC9 | SDIO1_D1 |
|
||||
| PC10 | SDIO1_D2 |
|
||||
| PC11 | SDIO1_D3 |
|
||||
| PC12 | SDIO1_CK |
|
||||
| PD2 | SDIO1_CMD |
|
||||
| PA8 | PWM_TMR1_CH1 |
|
||||
| PA11 | PWM_TMR1_CH4 |
|
||||
| PA0 | PWM_TMR2_CH1 |
|
||||
| PA1 | PWM_TMR2_CH2 |
|
||||
| PC0 | ADC1/2_IN10 |
|
||||
| PC1 | ADC1/2_IN11 |
|
||||
| PC2 | ADC1/2_IN12 |
|
||||
| PC3 | ADC1/2_IN13 |
|
||||
| PC4 | ADC1/2_IN14 |
|
||||
| PC5 | ADC1/2_IN15 |
|
||||
| PB11 | ETH_RMII_TX_EN |
|
||||
| PB12 | ETH_RMII_TX0 |
|
||||
| PB13 | ETH_RMII_TX1 |
|
||||
| PD8 | ETH_RMII_RX_DV |
|
||||
| PD9 | ETH_RMII_RXD0 |
|
||||
| PD10 | ETH_RMII_RXD1 |
|
||||
| PA1 | ETH_RMII_REF_CLK |
|
||||
|
||||
## 使用说明
|
||||
|
||||
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
|
||||
|
||||
### 快速上手
|
||||
|
||||
本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
|
||||
|
||||
#### 硬件连接
|
||||
|
||||
使用数据线连接开发板到 PC，打开电源开关。
|
||||
|
||||
#### 编译下载
|
||||
|
||||
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
|
||||
|
||||
> 工程默认配置使用 JLink 下载程序，在通过 JLink 连接开发板的基础上，点击下载按钮即可下载程序到开发板
|
||||
|
||||
#### 运行结果
|
||||
|
||||
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，LED2/3/4 会周期性闪烁。
|
||||
|
||||
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，在串口上可以看到 RT-Thread 的输出信息:
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 4.0.3 build Mar 9 2020
|
||||
2006 - 2020 Copyright by rt-thread team
|
||||
msh />
|
||||
```
|
||||
|
||||
## 注意事项
|
||||
|
||||
AT32F407使用Ethernet且PHY时钟由MCO输出提供时，主频最好采用200Mhz。
|
||||
|
||||
可在雅特力官方网站进行所需资料下载，如Keil_v5/Keil_v4/IAR等pack安装包和AT-START开发板原理图等（www.arterytek.com）
|
||||
|
||||
## 联系人信息
|
||||
|
||||
维护人:
|
||||
|
||||
- [sheltonyu](https://github.com/sheltonyu)
|
||||
15
bsp/at32/at32f407-start/SConscript
Normal file
15
bsp/at32/at32f407-start/SConscript
Normal file
@ -0,0 +1,15 @@
|
||||
# for module compiling
|
||||
import os
|
||||
Import('RTT_ROOT')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
59
bsp/at32/at32f407-start/SConstruct
Normal file
59
bsp/at32/at32f407-start/SConstruct
Normal file
@ -0,0 +1,59 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
|
||||
if os.path.exists(SDK_ROOT + '/Libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/Libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/Libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
at32_library = 'AT32_Std_Driver'
|
||||
rtconfig.BSP_LIBRARY_TYPE = at32_library
|
||||
|
||||
# include libraries
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, at32_library, 'SConscript')))
|
||||
|
||||
# common include drivers
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'rt_drivers', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
17
bsp/at32/at32f407-start/applications/SConscript
Normal file
17
bsp/at32/at32f407-start/applications/SConscript
Normal file
@ -0,0 +1,17 @@
|
||||
# RT-Thread building script for component
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add the general drivers.
|
||||
src = Split("""
|
||||
main.c
|
||||
""")
|
||||
|
||||
CPPPATH = [cwd, str(Dir('#'))]
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
48
bsp/at32/at32f407-start/applications/main.c
Normal file
48
bsp/at32/at32f407-start/applications/main.c
Normal file
@ -0,0 +1,48 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-01-08 shelton first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "board.h"
|
||||
#include "drv_gpio.h"
|
||||
|
||||
/* defined the LED2 pin: PD13 */
|
||||
#define LED2_PIN GET_PIN(D, 13)
|
||||
/* defined the LED3 pin: PD14 */
|
||||
#define LED3_PIN GET_PIN(D, 14)
|
||||
/* defined the LED4 pin: PD15 */
|
||||
#define LED4_PIN GET_PIN(D, 15)
|
||||
|
||||
int main(void)
|
||||
{
|
||||
uint32_t Speed = 200;
|
||||
/* set LED2 pin mode to output */
|
||||
rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
|
||||
/* set LED3 pin mode to output */
|
||||
rt_pin_mode(LED3_PIN, PIN_MODE_OUTPUT);
|
||||
/* set LED4 pin mode to output */
|
||||
rt_pin_mode(LED4_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
while (1)
|
||||
{
|
||||
rt_pin_write(LED2_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(Speed);
|
||||
rt_pin_write(LED3_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(Speed);
|
||||
rt_pin_write(LED4_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(Speed);
|
||||
rt_pin_write(LED2_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(Speed);
|
||||
rt_pin_write(LED3_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(Speed);
|
||||
rt_pin_write(LED4_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(Speed);
|
||||
}
|
||||
}
|
||||
171
bsp/at32/at32f407-start/board/Kconfig
Normal file
171
bsp/at32/at32f407-start/board/Kconfig
Normal file
@ -0,0 +1,171 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_AT32F407VGT7
|
||||
bool
|
||||
select SOC_SERIES_AT32F407
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
config BSP_USING_SERIAL
|
||||
bool "Enable USART (uart1)"
|
||||
select BSP_USING_UART
|
||||
select BSP_USING_UART1
|
||||
default y
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
config BSP_USING_GPIO
|
||||
bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
default y
|
||||
|
||||
config BSP_USING_ETH
|
||||
bool "Enable Ethernet"
|
||||
default n
|
||||
select RT_USING_LWIP
|
||||
select PHY_USING_LAN8720A
|
||||
|
||||
menuconfig BSP_USING_RTC
|
||||
bool "Enable RTC"
|
||||
select RT_USING_RTC
|
||||
select RT_USING_LIBC
|
||||
default n
|
||||
if BSP_USING_RTC
|
||||
choice
|
||||
prompt "Select clock source"
|
||||
default BSP_RTC_USING_LSE
|
||||
|
||||
config BSP_RTC_USING_LSE
|
||||
bool "RTC USING LSE"
|
||||
|
||||
config BSP_RTC_USING_LSI
|
||||
bool "RTC USING LSI"
|
||||
endchoice
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
if BSP_USING_UART
|
||||
config BSP_USING_UART1
|
||||
bool "Enable UART1"
|
||||
default y
|
||||
|
||||
config BSP_USING_UART2
|
||||
bool "Enable UART2"
|
||||
default n
|
||||
|
||||
config BSP_USING_UART3
|
||||
bool "Enable UART3"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
default n
|
||||
select RT_USING_PWM
|
||||
if BSP_USING_PWM
|
||||
menuconfig BSP_USING_TMR1
|
||||
bool "Enable timer1 output PWM"
|
||||
default n
|
||||
if BSP_USING_TMR1
|
||||
config BSP_USING_TMR1_CH1
|
||||
bool "Enable TMR1 channel1 PWM"
|
||||
default n
|
||||
|
||||
config BSP_USING_TMR1_CH4
|
||||
bool "Enable TMR1 channel4 PWM"
|
||||
default n
|
||||
endif
|
||||
menuconfig BSP_USING_TMR2
|
||||
bool "Enable timer2 output PWM"
|
||||
default n
|
||||
if BSP_USING_TMR2
|
||||
config BSP_USING_TMR2_CH1
|
||||
bool "Enable TMR2 channel1 PWM"
|
||||
default n
|
||||
|
||||
config BSP_USING_TMR2_CH2
|
||||
bool "Enable TMR2 channel2 PWM"
|
||||
default n
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_HWTIMER
|
||||
bool "Enable HWTIMER"
|
||||
default n
|
||||
select RT_USING_HWTIMER
|
||||
if BSP_USING_HWTIMER
|
||||
config BSP_USING_HWTMR3
|
||||
bool "Enable hardware timer3"
|
||||
default n
|
||||
config BSP_USING_HWTMR4
|
||||
bool "Enable hardware timer4"
|
||||
default n
|
||||
config BSP_USING_HWTMR5
|
||||
bool "Enable hardware timer5"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI BUS"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI1
|
||||
bool "Enable SPI1 BUS"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI2
|
||||
bool "Enable SPI2 BUS"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C1
|
||||
bool "Enable I2C1 BUS (software simulation)"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
if BSP_USING_I2C1
|
||||
config BSP_I2C1_SCL_PIN
|
||||
int "i2c1 scl pin number"
|
||||
range 0 63
|
||||
default 22
|
||||
config BSP_I2C1_SDA_PIN
|
||||
int "I2C1 sda pin number"
|
||||
range 0 63
|
||||
default 23
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ADC
|
||||
bool "Enable ADC"
|
||||
default n
|
||||
select RT_USING_ADC
|
||||
if BSP_USING_ADC
|
||||
config BSP_USING_ADC1
|
||||
bool "Enable ADC1"
|
||||
default n
|
||||
config BSP_USING_ADC2
|
||||
bool "Enable ADC2"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SDIO
|
||||
bool "Enable SDIO"
|
||||
default n
|
||||
select RT_USING_SDIO
|
||||
if BSP_USING_SDIO
|
||||
config BSP_USING_SDIO1
|
||||
bool "Enable SDIO1"
|
||||
default n
|
||||
endif
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
30
bsp/at32/at32f407-start/board/SConscript
Normal file
30
bsp/at32/at32f407-start/board/SConscript
Normal file
@ -0,0 +1,30 @@
|
||||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
Import('SDK_LIB')
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add general drivers
|
||||
src = Split('''
|
||||
board.c
|
||||
msp/at32_msp.c
|
||||
msp/system_at32f4xx.c
|
||||
''')
|
||||
|
||||
path = [cwd]
|
||||
path += [cwd + '/msp']
|
||||
|
||||
startup_path_prefix = SDK_LIB
|
||||
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
src += [startup_path_prefix + '/AT32_Std_Driver/CMSIS/AT32/AT32F4xx/src/gcc/startup_at32f407vgt7.s']
|
||||
elif rtconfig.CROSS_TOOL == 'keil':
|
||||
src += [startup_path_prefix + '/AT32_Std_Driver/CMSIS/AT32/AT32F4xx/src/mdk/startup_at32f407vgt7.s']
|
||||
elif rtconfig.CROSS_TOOL == 'iar':
|
||||
src += [startup_path_prefix + '/AT32_Std_Driver/CMSIS/AT32/AT32F4xx/src/iar/startup_at32f407vgt7.s']
|
||||
|
||||
CPPDEFINES = ['AT32F407VGT7']
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
Return('group')
|
||||
89
bsp/at32/at32f407-start/board/board.c
Normal file
89
bsp/at32/at32f407-start/board/board.c
Normal file
@ -0,0 +1,89 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-06 balanceTWK first version
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include <at32f4xx.h>
|
||||
#include <board.h>
|
||||
|
||||
#ifdef BSP_USING_SRAM
|
||||
#include "drv_sram.h"
|
||||
#endif
|
||||
/**
|
||||
* @brief This function is executed in case of error occurrence.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void Error_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN Error_Handler */
|
||||
/* User can add his own implementation to report the HAL error return state */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END Error_Handler */
|
||||
}
|
||||
|
||||
/** System Clock Configuration
|
||||
*/
|
||||
void SystemClock_Config(void)
|
||||
{
|
||||
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||
NVIC_SetPriority(SysTick_IRQn, 0);
|
||||
}
|
||||
|
||||
/**
|
||||
* This is the timer interrupt service routine.
|
||||
*
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will initial AT32 board.
|
||||
*/
|
||||
void rt_hw_board_init()
|
||||
{
|
||||
/* NVIC Configuration */
|
||||
#define NVIC_VTOR_MASK 0x3FFFFF80
|
||||
#ifdef VECT_TAB_RAM
|
||||
/* Set the Vector Table base location at 0x10000000 */
|
||||
SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK);
|
||||
#else /* VECT_TAB_FLASH */
|
||||
/* Set the Vector Table base location at 0x08000000 */
|
||||
SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK);
|
||||
#endif
|
||||
|
||||
SystemClock_Config();
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_CONSOLE
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SRAM
|
||||
rt_system_heap_init((void *)EXT_SRAM_BEGIN, (void *)EXT_SRAM_END);
|
||||
#else
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||
#endif
|
||||
}
|
||||
42
bsp/at32/at32f407-start/board/board.h
Normal file
42
bsp/at32/at32f407-start/board/board.h
Normal file
@ -0,0 +1,42 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-01-15 shelton first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <at32f4xx.h>
|
||||
#include "at32_msp.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Internal SRAM memory size[Kbytes] <96>, Default: 96*/
|
||||
#define AT32_SRAM_SIZE 96
|
||||
#define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||
#endif
|
||||
|
||||
#define HEAP_END AT32_SRAM_END
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __BOARD_H__ */
|
||||
28
bsp/at32/at32f407-start/board/linker_scripts/link.icf
Normal file
28
bsp/at32/at32f407-start/board/linker_scripts/link.icf
Normal file
@ -0,0 +1,28 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite, last block CSTACK};
|
||||
156
bsp/at32/at32f407-start/board/linker_scripts/link.lds
Normal file
156
bsp/at32/at32f407-start/board/linker_scripts/link.lds
Normal file
@ -0,0 +1,156 @@
|
||||
/*
|
||||
* linker script for AT32 with GNU ld
|
||||
*/
|
||||
|
||||
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 1024k /* 1024KB flash */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 96k /* 96K sram */
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x200;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
_etext = .;
|
||||
} > ROM = 0
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
} > ROM
|
||||
__exidx_end = .;
|
||||
|
||||
/* .data section which is used for initialized data */
|
||||
|
||||
.data : AT (_sidata)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
} >RAM
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sstack = .;
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
} >RAM
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
|
||||
*(.bss.init)
|
||||
} > RAM
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
15
bsp/at32/at32f407-start/board/linker_scripts/link.sct
Normal file
15
bsp/at32/at32f407-start/board/linker_scripts/link.sct
Normal file
@ -0,0 +1,15 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00018000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
258
bsp/at32/at32f407-start/board/msp/at32_msp.c
Normal file
258
bsp/at32/at32f407-start/board/msp/at32_msp.c
Normal file
@ -0,0 +1,258 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file at32_msp.c
|
||||
* @author Artery Technology
|
||||
* @version V1.0.0
|
||||
* @date 2020-01-10
|
||||
* @brief Msp source file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2018 ArteryTek</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include <at32f4xx.h>
|
||||
#include <rtthread.h>
|
||||
#include "at32_msp.h"
|
||||
|
||||
#ifdef BSP_USING_UART
|
||||
void at32_msp_usart_init(void *Instance)
|
||||
{
|
||||
GPIO_InitType GPIO_InitStruct;
|
||||
USART_Type *USARTx = (USART_Type *)Instance;
|
||||
|
||||
GPIO_StructInit(&GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
#ifdef BSP_USING_UART1
|
||||
if(USART1 == USARTx)
|
||||
{
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_USART1, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_9;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_10;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_UART2
|
||||
if(USART2 == USARTx)
|
||||
{
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_USART2, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_2;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_3;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_UART3
|
||||
if(USART3 == USARTx)
|
||||
{
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_USART3, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOB, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_10;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_11;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
}
|
||||
#endif
|
||||
/* Add others */
|
||||
}
|
||||
#endif /* BSP_USING_SERIAL */
|
||||
|
||||
#ifdef BSP_USING_SPI
|
||||
void at32_msp_spi_init(void *Instance)
|
||||
{
|
||||
GPIO_InitType GPIO_InitStruct;
|
||||
SPI_Type *SPIx = (SPI_Type *)Instance;
|
||||
|
||||
GPIO_StructInit(&GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
#ifdef BSP_USING_SPI1
|
||||
if(SPI1 == SPIx)
|
||||
{
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_SPI1, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
|
||||
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT_PP;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_4;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_5 | GPIO_Pins_7;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_6;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_SPI2
|
||||
if(SPI2 == SPIx)
|
||||
{
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_SPI2, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOB, ENABLE);
|
||||
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT_PP;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_12;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_13 | GPIO_Pins_15;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_14;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
}
|
||||
#endif
|
||||
/* Add others */
|
||||
}
|
||||
#endif /* BSP_USING_SPI */
|
||||
|
||||
#ifdef BSP_USING_SDIO
|
||||
void at32_msp_sdio_init(void *Instance)
|
||||
{
|
||||
GPIO_InitType GPIO_InitStructure;
|
||||
SDIO_Type *SDIOx = (SDIO_Type *)Instance;
|
||||
|
||||
GPIO_StructInit(&GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
|
||||
if(SDIO1 == SDIOx)
|
||||
{
|
||||
/* if used dma ... */
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_DMA2, ENABLE);
|
||||
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_SDIO1, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOC | RCC_APB2PERIPH_GPIOD, ENABLE);
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10 | GPIO_Pins_11 | GPIO_Pins_12;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_2;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOD, &GPIO_InitStructure);
|
||||
}
|
||||
}
|
||||
#endif /* BSP_USING_SDIO */
|
||||
|
||||
#ifdef BSP_USING_PWM
|
||||
void at32_msp_tmr_init(void *Instance)
|
||||
{
|
||||
GPIO_InitType GPIO_InitStructure;
|
||||
TMR_Type *TMRx = (TMR_Type *)Instance;
|
||||
|
||||
if(TMRx == TMR1)
|
||||
{
|
||||
/* TMR1 clock enable */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_TMR1, ENABLE);
|
||||
/* GPIOA clock enable */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
|
||||
|
||||
/* GPIOA Configuration:TMR1 Channel1 and Channel4 as alternate function push-pull */
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_11;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
}
|
||||
|
||||
if(TMRx == TMR2)
|
||||
{
|
||||
/* TMR2 clock enable */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR2, ENABLE);
|
||||
/* GPIOA clock enable */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
|
||||
|
||||
/* GPIOA Configuration:TMR2 Channel1 and Channel2 as alternate function push-pull */
|
||||
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
}
|
||||
/* Add others */
|
||||
}
|
||||
#endif /* BSP_USING_PWM */
|
||||
|
||||
#ifdef BSP_USING_ADC
|
||||
void at32_msp_adc_init(void *Instance)
|
||||
{
|
||||
GPIO_InitType GPIO_InitStruct;
|
||||
ADC_Type *ADCx = (ADC_Type *)Instance;
|
||||
|
||||
#ifdef BSP_USING_ADC1
|
||||
if(ADCx == ADC1)
|
||||
{
|
||||
/* ADC1 & GPIO clock enable */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC1 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
|
||||
|
||||
/* Configure ADC Channel as analog input */
|
||||
GPIO_StructInit(&GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_ADC2
|
||||
if(ADCx == ADC2)
|
||||
{
|
||||
/* ADC2 & GPIO clock enable */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC2 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
|
||||
|
||||
/* Configure ADC Channel as analog input */
|
||||
GPIO_StructInit(&GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif /* BSP_USING_ADC */
|
||||
|
||||
#ifdef BSP_USING_HWTIMER
|
||||
void at32_msp_hwtmr_init(void *Instance)
|
||||
{
|
||||
TMR_Type *TMRx = (TMR_Type *)Instance;
|
||||
|
||||
#ifdef BSP_USING_HWTMR3
|
||||
if(TMRx == TMR3)
|
||||
{
|
||||
/* TMR3 clock enable */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR3, ENABLE);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_HWTMR4
|
||||
if(TMRx == TMR4)
|
||||
{
|
||||
/* TMR4 clock enable */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR4, ENABLE);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_HWTMR5
|
||||
if(TMRx == TMR5)
|
||||
{
|
||||
/* TMR5 clock enable */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR5, ENABLE);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
33
bsp/at32/at32f407-start/board/msp/at32_msp.h
Normal file
33
bsp/at32/at32f407-start/board/msp/at32_msp.h
Normal file
@ -0,0 +1,33 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file at32_msp.h
|
||||
* @author Artery Technology
|
||||
* @version V1.0.0
|
||||
* @date 2020-01-10
|
||||
* @brief Msp header file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2018 ArteryTek</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __AT32_MSP_H__
|
||||
#define __AT32_MSP_H__
|
||||
|
||||
void at32_msp_usart_init(void *Instance);
|
||||
void at32_msp_spi_init(void *Instance);
|
||||
void at32_msp_tmr_init(void *Instance);
|
||||
void at32_msp_i2c_init(void *Instance);
|
||||
void at32_msp_sdio_init(void *Instance);
|
||||
void at32_msp_adc_init(void *Instance);
|
||||
void at32_msp_hwtmr_init(void *Instance);
|
||||
|
||||
#endif /* __AT32_MSP_H__ */
|
||||
3457
bsp/at32/at32f407-start/board/msp/system_at32f4xx.c
Normal file
3457
bsp/at32/at32f407-start/board/msp/system_at32f4xx.c
Normal file
File diff suppressed because it is too large
Load Diff
2421
bsp/at32/at32f407-start/project.ewp
Normal file
2421
bsp/at32/at32f407-start/project.ewp
Normal file
File diff suppressed because it is too large
Load Diff
162
bsp/at32/at32f407-start/project.uvopt
Normal file
162
bsp/at32/at32f407-start/project.uvopt
Normal file
@ -0,0 +1,162 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>8000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>1</RunSim>
|
||||
<RunTarget>0</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>0</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<tPdscDbg>0</tPdscDbg>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>6</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U4294967295 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FN1 -FC800 -FD20000000 -FF0AT32F407_1024 -FL0100000 -FS08000000</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>1</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
185
bsp/at32/at32f407-start/project.uvoptx
Normal file
185
bsp/at32/at32f407-start/project.uvoptx
Normal file
@ -0,0 +1,185 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>6</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0AT32F407_1024 -FL0100000 -FS08000000 -FP0($$Device:AT32F407VGT7$Flash\AT32F407_1024.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U4294967295 -O14 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight JTAG-DP") -D00(3BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06414041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000 -FP0($$Device:AT32F407VGT7$Flash\AT32F407_1024.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
1109
bsp/at32/at32f407-start/project.uvproj
Normal file
1109
bsp/at32/at32f407-start/project.uvproj
Normal file
File diff suppressed because it is too large
Load Diff
1090
bsp/at32/at32f407-start/project.uvprojx
Normal file
1090
bsp/at32/at32f407-start/project.uvprojx
Normal file
File diff suppressed because it is too large
Load Diff
206
bsp/at32/at32f407-start/rtconfig.h
Normal file
206
bsp/at32/at32f407-start/rtconfig.h
Normal file
@ -0,0 +1,206 @@
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
#define RT_DEBUG
|
||||
#define RT_DEBUG_COLOR
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x40003
|
||||
#define ARCH_ARM
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M4
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
|
||||
/* C++ features */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
#define FINSH_USING_MSH_ONLY
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FILESYSTEMS_MAX 2
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 2
|
||||
#define DFS_FD_MAX 16
|
||||
#define RT_USING_DFS_ELMFAT
|
||||
|
||||
/* elm-chan's FatFs, Generic FAT Filesystem Module */
|
||||
|
||||
#define RT_DFS_ELM_CODE_PAGE 437
|
||||
#define RT_DFS_ELM_WORD_ACCESS
|
||||
#define RT_DFS_ELM_USE_LFN_3
|
||||
#define RT_DFS_ELM_USE_LFN 3
|
||||
#define RT_DFS_ELM_MAX_LFN 255
|
||||
#define RT_DFS_ELM_DRIVES 2
|
||||
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
|
||||
#define RT_DFS_ELM_REENTRANT
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_HWTIMER
|
||||
#define RT_USING_I2C
|
||||
#define RT_USING_I2C_BITOPS
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_ADC
|
||||
#define RT_USING_PWM
|
||||
#define RT_USING_RTC
|
||||
#define RT_USING_SDIO
|
||||
#define RT_SDIO_STACK_SIZE 512
|
||||
#define RT_SDIO_THREAD_PRIORITY 15
|
||||
#define RT_MMCSD_STACK_SIZE 1024
|
||||
#define RT_MMCSD_THREAD_PREORITY 22
|
||||
#define RT_MMCSD_MAX_PARTITION 16
|
||||
#define RT_USING_SPI
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
#define RT_USING_POSIX
|
||||
|
||||
/* Network */
|
||||
|
||||
/* Socket abstraction layer */
|
||||
|
||||
|
||||
/* Network interface device */
|
||||
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
|
||||
/* AT commands */
|
||||
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
#define SOC_FAMILY_AT32
|
||||
#define SOC_SERIES_AT32F407
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_AT32F407VGT7
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_SERIAL
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART1
|
||||
#define BSP_USING_UART2
|
||||
#define BSP_USING_UART3
|
||||
|
||||
#endif
|
||||
150
bsp/at32/at32f407-start/rtconfig.py
Normal file
150
bsp/at32/at32f407-start/rtconfig.py
Normal file
@ -0,0 +1,150 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m4'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
# bsp lib config
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = r'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iar'
|
||||
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
CXX = PREFIX + 'g++'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M4.fp '
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iar':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M4'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=VFPv4_sp'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M4'
|
||||
AFLAGS += ' --fpu VFPv4_sp'
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
2908
bsp/at32/at32f407-start/template.ewd
Normal file
2908
bsp/at32/at32f407-start/template.ewd
Normal file
File diff suppressed because it is too large
Load Diff
2040
bsp/at32/at32f407-start/template.ewp
Normal file
2040
bsp/at32/at32f407-start/template.ewp
Normal file
File diff suppressed because it is too large
Load Diff
10
bsp/at32/at32f407-start/template.eww
Normal file
10
bsp/at32/at32f407-start/template.eww
Normal file
@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\template.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
162
bsp/at32/at32f407-start/template.uvopt
Normal file
162
bsp/at32/at32f407-start/template.uvopt
Normal file
@ -0,0 +1,162 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>8000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>1</RunSim>
|
||||
<RunTarget>0</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>0</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<tPdscDbg>0</tPdscDbg>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>6</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U4294967295 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FN1 -FC800 -FD20000000 -FF0AT32F407_1024 -FL0100000 -FS08000000</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>1</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
185
bsp/at32/at32f407-start/template.uvoptx
Normal file
185
bsp/at32/at32f407-start/template.uvoptx
Normal file
@ -0,0 +1,185 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>6</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0AT32F407_1024 -FL0100000 -FS08000000 -FP0($$Device:AT32F407VGT7$Flash\AT32F407_1024.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U4294967295 -O14 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight JTAG-DP") -D00(3BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06414041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000 -FP0($$Device:AT32F407VGT7$Flash\AT32F407_1024.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
407
bsp/at32/at32f407-start/template.uvproj
Normal file
407
bsp/at32/at32f407-start/template.uvproj
Normal file
@ -0,0 +1,407 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||
|
||||
<SchemaVersion>1.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>AT32F407VGT7</Device>
|
||||
<Vendor>ArteryTek</Vendor>
|
||||
<Cpu>IRAM(0x20000000-0x20037FFF) IROM(0x08000000-0x080FFFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile>"Startup\ArteryTek\AT32F4xx\startup_at32f407vgt7.s" ("AT32F403A Startup Code")</StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000)</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>at32f4xx.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>SFD\ArteryTek\AT32F407\AT32F407xx.SFR</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath>ArteryTek\AT32F4xx\</RegisterFilePath>
|
||||
<DBRegisterFilePath>ArteryTek\AT32F4xx\</DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
|
||||
<OutputName>rt-thread</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -REMAP</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments></TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
<Simulator>
|
||||
<UseSimulator>0</UseSimulator>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>1</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
</Simulator>
|
||||
<Target>
|
||||
<UseTarget>1</UseTarget>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>0</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<RestoreTracepoints>0</RestoreTracepoints>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
<UsePdscDebugDescription>0</UsePdscDebugDescription>
|
||||
</Target>
|
||||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||
<TargetSelection>6</TargetSelection>
|
||||
<SimDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
</SimDlls>
|
||||
<TargetDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
<Driver>Segger\JL2CM3.dll</Driver>
|
||||
</TargetDlls>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x38000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x38000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
||||
394
bsp/at32/at32f407-start/template.uvprojx
Normal file
394
bsp/at32/at32f407-start/template.uvprojx
Normal file
@ -0,0 +1,394 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>AT32F407VGT7</Device>
|
||||
<Vendor>ArteryTek</Vendor>
|
||||
<PackID>Keil.AT32F4xx_DFP.1.3.1</PackID>
|
||||
<Cpu>IRAM(0x20000000,0x38000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000 -FP0($$Device:AT32F407VGT7$Flash\AT32F407_1024.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:AT32F407VGT7$Device\Include\at32f4xx.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:AT32F407VGT7$SVD\AT32F407xx.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
|
||||
<OutputName>rt-thread</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -REMAP</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments></TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x38000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x38000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
20
bsp/at32/tools/sdk_dist.py
Normal file
20
bsp/at32/tools/sdk_dist.py
Normal file
@ -0,0 +1,20 @@
|
||||
import os
|
||||
import sys
|
||||
import shutil
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(cwd_path), 'rt-thread', 'tools'))
|
||||
|
||||
# BSP dist function
|
||||
def dist_do_building(BSP_ROOT, dist_dir):
|
||||
from mkdist import bsp_copy_files
|
||||
import rtconfig
|
||||
|
||||
print("=> copy at32 bsp library")
|
||||
library_dir = os.path.join(dist_dir, 'Libraries')
|
||||
library_path = os.path.join(os.path.dirname(BSP_ROOT), 'Libraries')
|
||||
bsp_copy_files(os.path.join(library_path, rtconfig.BSP_LIBRARY_TYPE),
|
||||
os.path.join(library_dir, rtconfig.BSP_LIBRARY_TYPE))
|
||||
|
||||
print("=> copy bsp drivers")
|
||||
bsp_copy_files(os.path.join(library_path, 'rt_drivers'), os.path.join(library_dir, 'rt_drivers'))
|
||||
shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig'))
|
||||
@ -84,6 +84,10 @@ static struct rt_pin_ops am33xx_pin_ops =
|
||||
am33xx_pin_mode,
|
||||
am33xx_pin_write,
|
||||
am33xx_pin_read,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
};
|
||||
|
||||
int rt_hw_gpio_init(void)
|
||||
|
||||
456
bsp/bm3803/.config
Normal file
456
bsp/bm3803/.config
Normal file
@ -0,0 +1,456 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# RT-Thread Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# RT-Thread Kernel
|
||||
#
|
||||
CONFIG_RT_NAME_MAX=8
|
||||
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
|
||||
# CONFIG_RT_USING_SMP is not set
|
||||
CONFIG_RT_ALIGN_SIZE=4
|
||||
# CONFIG_RT_THREAD_PRIORITY_8 is not set
|
||||
CONFIG_RT_THREAD_PRIORITY_32=y
|
||||
# CONFIG_RT_THREAD_PRIORITY_256 is not set
|
||||
CONFIG_RT_THREAD_PRIORITY_MAX=32
|
||||
CONFIG_RT_TICK_PER_SECOND=100
|
||||
CONFIG_RT_USING_OVERFLOW_CHECK=y
|
||||
CONFIG_RT_USING_HOOK=y
|
||||
CONFIG_RT_USING_IDLE_HOOK=y
|
||||
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
|
||||
CONFIG_IDLE_THREAD_STACK_SIZE=4096
|
||||
# CONFIG_RT_USING_TIMER_SOFT is not set
|
||||
CONFIG_RT_DEBUG=y
|
||||
# CONFIG_RT_DEBUG_COLOR is not set
|
||||
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
|
||||
|
||||
#
|
||||
# Inter-Thread communication
|
||||
#
|
||||
CONFIG_RT_USING_SEMAPHORE=y
|
||||
CONFIG_RT_USING_MUTEX=y
|
||||
CONFIG_RT_USING_EVENT=y
|
||||
CONFIG_RT_USING_MAILBOX=y
|
||||
CONFIG_RT_USING_MESSAGEQUEUE=y
|
||||
# CONFIG_RT_USING_SIGNALS is not set
|
||||
|
||||
#
|
||||
# Memory Management
|
||||
#
|
||||
CONFIG_RT_USING_MEMPOOL=y
|
||||
CONFIG_RT_USING_MEMHEAP=y
|
||||
# CONFIG_RT_USING_NOHEAP is not set
|
||||
CONFIG_RT_USING_SMALL_MEM=y
|
||||
# CONFIG_RT_USING_SLAB is not set
|
||||
# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
|
||||
# CONFIG_RT_USING_MEMTRACE is not set
|
||||
CONFIG_RT_USING_HEAP=y
|
||||
|
||||
#
|
||||
# Kernel Device Object
|
||||
#
|
||||
CONFIG_RT_USING_DEVICE=y
|
||||
CONFIG_RT_USING_DEVICE_OPS=y
|
||||
# CONFIG_RT_USING_INTERRUPT_INFO is not set
|
||||
CONFIG_RT_USING_CONSOLE=y
|
||||
CONFIG_RT_CONSOLEBUF_SIZE=128
|
||||
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
|
||||
CONFIG_RT_VER_NUM=0x40003
|
||||
# CONFIG_RT_USING_CPU_FFS is not set
|
||||
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
|
||||
|
||||
#
|
||||
# RT-Thread Components
|
||||
#
|
||||
CONFIG_RT_USING_COMPONENTS_INIT=y
|
||||
CONFIG_RT_USING_USER_MAIN=y
|
||||
CONFIG_RT_MAIN_THREAD_STACK_SIZE=4096
|
||||
CONFIG_RT_MAIN_THREAD_PRIORITY=10
|
||||
|
||||
#
|
||||
# C++ features
|
||||
#
|
||||
# CONFIG_RT_USING_CPLUSPLUS is not set
|
||||
|
||||
#
|
||||
# Command shell
|
||||
#
|
||||
CONFIG_RT_USING_FINSH=y
|
||||
CONFIG_FINSH_THREAD_NAME="tshell"
|
||||
CONFIG_FINSH_USING_HISTORY=y
|
||||
CONFIG_FINSH_HISTORY_LINES=5
|
||||
CONFIG_FINSH_USING_SYMTAB=y
|
||||
CONFIG_FINSH_USING_DESCRIPTION=y
|
||||
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
|
||||
CONFIG_FINSH_THREAD_PRIORITY=20
|
||||
CONFIG_FINSH_THREAD_STACK_SIZE=4096
|
||||
CONFIG_FINSH_CMD_SIZE=80
|
||||
# CONFIG_FINSH_USING_AUTH is not set
|
||||
CONFIG_FINSH_USING_MSH=y
|
||||
CONFIG_FINSH_USING_MSH_DEFAULT=y
|
||||
# CONFIG_FINSH_USING_MSH_ONLY is not set
|
||||
CONFIG_FINSH_ARG_MAX=10
|
||||
|
||||
#
|
||||
# Device virtual file system
|
||||
#
|
||||
CONFIG_RT_USING_DFS=y
|
||||
CONFIG_DFS_USING_WORKDIR=y
|
||||
CONFIG_DFS_FILESYSTEMS_MAX=2
|
||||
CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
|
||||
CONFIG_DFS_FD_MAX=16
|
||||
# CONFIG_RT_USING_DFS_MNTTABLE is not set
|
||||
# CONFIG_RT_USING_DFS_ELMFAT is not set
|
||||
CONFIG_RT_USING_DFS_DEVFS=y
|
||||
# CONFIG_RT_USING_DFS_ROMFS is not set
|
||||
# CONFIG_RT_USING_DFS_RAMFS is not set
|
||||
# CONFIG_RT_USING_DFS_UFFS is not set
|
||||
# CONFIG_RT_USING_DFS_JFFS2 is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
CONFIG_RT_USING_DEVICE_IPC=y
|
||||
CONFIG_RT_PIPE_BUFSZ=512
|
||||
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
|
||||
CONFIG_RT_USING_SERIAL=y
|
||||
# CONFIG_RT_SERIAL_USING_DMA is not set
|
||||
CONFIG_RT_SERIAL_RB_BUFSZ=64
|
||||
# CONFIG_RT_USING_CAN is not set
|
||||
# CONFIG_RT_USING_HWTIMER is not set
|
||||
# CONFIG_RT_USING_CPUTIME is not set
|
||||
# CONFIG_RT_USING_I2C is not set
|
||||
# CONFIG_RT_USING_PIN is not set
|
||||
# CONFIG_RT_USING_ADC is not set
|
||||
# CONFIG_RT_USING_DAC is not set
|
||||
# CONFIG_RT_USING_PWM is not set
|
||||
# CONFIG_RT_USING_MTD_NOR is not set
|
||||
# CONFIG_RT_USING_MTD_NAND is not set
|
||||
# CONFIG_RT_USING_PM is not set
|
||||
# CONFIG_RT_USING_RTC is not set
|
||||
# CONFIG_RT_USING_SDIO is not set
|
||||
# CONFIG_RT_USING_SPI is not set
|
||||
# CONFIG_RT_USING_WDT is not set
|
||||
# CONFIG_RT_USING_AUDIO is not set
|
||||
# CONFIG_RT_USING_SENSOR is not set
|
||||
# CONFIG_RT_USING_TOUCH is not set
|
||||
# CONFIG_RT_USING_HWCRYPTO is not set
|
||||
# CONFIG_RT_USING_PULSE_ENCODER is not set
|
||||
# CONFIG_RT_USING_INPUT_CAPTURE is not set
|
||||
# CONFIG_RT_USING_WIFI is not set
|
||||
|
||||
#
|
||||
# Using USB
|
||||
#
|
||||
# CONFIG_RT_USING_USB_HOST is not set
|
||||
# CONFIG_RT_USING_USB_DEVICE is not set
|
||||
|
||||
#
|
||||
# POSIX layer and C standard library
|
||||
#
|
||||
CONFIG_RT_USING_LIBC=y
|
||||
# CONFIG_RT_USING_PTHREADS is not set
|
||||
CONFIG_RT_USING_POSIX=y
|
||||
# CONFIG_RT_USING_POSIX_MMAP is not set
|
||||
# CONFIG_RT_USING_POSIX_TERMIOS is not set
|
||||
# CONFIG_RT_USING_POSIX_GETLINE is not set
|
||||
# CONFIG_RT_USING_POSIX_AIO is not set
|
||||
# CONFIG_RT_USING_MODULE is not set
|
||||
|
||||
#
|
||||
# Network
|
||||
#
|
||||
|
||||
#
|
||||
# Socket abstraction layer
|
||||
#
|
||||
# CONFIG_RT_USING_SAL is not set
|
||||
|
||||
#
|
||||
# Network interface device
|
||||
#
|
||||
# CONFIG_RT_USING_NETDEV is not set
|
||||
|
||||
#
|
||||
# light weight TCP/IP stack
|
||||
#
|
||||
# CONFIG_RT_USING_LWIP is not set
|
||||
|
||||
#
|
||||
# AT commands
|
||||
#
|
||||
# CONFIG_RT_USING_AT is not set
|
||||
|
||||
#
|
||||
# VBUS(Virtual Software BUS)
|
||||
#
|
||||
# CONFIG_RT_USING_VBUS is not set
|
||||
|
||||
#
|
||||
# Utilities
|
||||
#
|
||||
# CONFIG_RT_USING_RYM is not set
|
||||
# CONFIG_RT_USING_ULOG is not set
|
||||
# CONFIG_RT_USING_UTEST is not set
|
||||
|
||||
#
|
||||
# RT-Thread online packages
|
||||
#
|
||||
|
||||
#
|
||||
# IoT - internet of things
|
||||
#
|
||||
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
|
||||
# CONFIG_PKG_USING_PAHOMQTT is not set
|
||||
# CONFIG_PKG_USING_UMQTT is not set
|
||||
# CONFIG_PKG_USING_WEBCLIENT is not set
|
||||
# CONFIG_PKG_USING_WEBNET is not set
|
||||
# CONFIG_PKG_USING_MONGOOSE is not set
|
||||
# CONFIG_PKG_USING_MYMQTT is not set
|
||||
# CONFIG_PKG_USING_KAWAII_MQTT is not set
|
||||
# CONFIG_PKG_USING_BC28_MQTT is not set
|
||||
# CONFIG_PKG_USING_WEBTERMINAL is not set
|
||||
# CONFIG_PKG_USING_CJSON is not set
|
||||
# CONFIG_PKG_USING_JSMN is not set
|
||||
# CONFIG_PKG_USING_LIBMODBUS is not set
|
||||
# CONFIG_PKG_USING_FREEMODBUS is not set
|
||||
# CONFIG_PKG_USING_LJSON is not set
|
||||
# CONFIG_PKG_USING_EZXML is not set
|
||||
# CONFIG_PKG_USING_NANOPB is not set
|
||||
|
||||
#
|
||||
# Wi-Fi
|
||||
#
|
||||
|
||||
#
|
||||
# Marvell WiFi
|
||||
#
|
||||
# CONFIG_PKG_USING_WLANMARVELL is not set
|
||||
|
||||
#
|
||||
# Wiced WiFi
|
||||
#
|
||||
# CONFIG_PKG_USING_WLAN_WICED is not set
|
||||
# CONFIG_PKG_USING_RW007 is not set
|
||||
# CONFIG_PKG_USING_COAP is not set
|
||||
# CONFIG_PKG_USING_NOPOLL is not set
|
||||
# CONFIG_PKG_USING_NETUTILS is not set
|
||||
# CONFIG_PKG_USING_CMUX is not set
|
||||
# CONFIG_PKG_USING_PPP_DEVICE is not set
|
||||
# CONFIG_PKG_USING_AT_DEVICE is not set
|
||||
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
|
||||
# CONFIG_PKG_USING_WIZNET is not set
|
||||
|
||||
#
|
||||
# IoT Cloud
|
||||
#
|
||||
# CONFIG_PKG_USING_ONENET is not set
|
||||
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
|
||||
# CONFIG_PKG_USING_ALI_IOTKIT is not set
|
||||
# CONFIG_PKG_USING_AZURE is not set
|
||||
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
|
||||
# CONFIG_PKG_USING_JIOT-C-SDK is not set
|
||||
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
|
||||
# CONFIG_PKG_USING_JOYLINK is not set
|
||||
# CONFIG_PKG_USING_NIMBLE is not set
|
||||
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
|
||||
# CONFIG_PKG_USING_IPMSG is not set
|
||||
# CONFIG_PKG_USING_LSSDP is not set
|
||||
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
|
||||
# CONFIG_PKG_USING_LIBRWS is not set
|
||||
# CONFIG_PKG_USING_TCPSERVER is not set
|
||||
# CONFIG_PKG_USING_PROTOBUF_C is not set
|
||||
# CONFIG_PKG_USING_ONNX_PARSER is not set
|
||||
# CONFIG_PKG_USING_ONNX_BACKEND is not set
|
||||
# CONFIG_PKG_USING_DLT645 is not set
|
||||
# CONFIG_PKG_USING_QXWZ is not set
|
||||
# CONFIG_PKG_USING_SMTP_CLIENT is not set
|
||||
# CONFIG_PKG_USING_ABUP_FOTA is not set
|
||||
# CONFIG_PKG_USING_LIBCURL2RTT is not set
|
||||
# CONFIG_PKG_USING_CAPNP is not set
|
||||
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
|
||||
# CONFIG_PKG_USING_AGILE_TELNET is not set
|
||||
# CONFIG_PKG_USING_NMEALIB is not set
|
||||
# CONFIG_PKG_USING_AGILE_JSMN is not set
|
||||
# CONFIG_PKG_USING_PDULIB is not set
|
||||
# CONFIG_PKG_USING_BTSTACK is not set
|
||||
|
||||
#
|
||||
# security packages
|
||||
#
|
||||
# CONFIG_PKG_USING_MBEDTLS is not set
|
||||
# CONFIG_PKG_USING_libsodium is not set
|
||||
# CONFIG_PKG_USING_TINYCRYPT is not set
|
||||
# CONFIG_PKG_USING_TFM is not set
|
||||
# CONFIG_PKG_USING_YD_CRYPTO is not set
|
||||
|
||||
#
|
||||
# language packages
|
||||
#
|
||||
# CONFIG_PKG_USING_LUA is not set
|
||||
# CONFIG_PKG_USING_JERRYSCRIPT is not set
|
||||
# CONFIG_PKG_USING_MICROPYTHON is not set
|
||||
|
||||
#
|
||||
# multimedia packages
|
||||
#
|
||||
# CONFIG_PKG_USING_OPENMV is not set
|
||||
# CONFIG_PKG_USING_MUPDF is not set
|
||||
# CONFIG_PKG_USING_STEMWIN is not set
|
||||
# CONFIG_PKG_USING_WAVPLAYER is not set
|
||||
# CONFIG_PKG_USING_TJPGD is not set
|
||||
|
||||
#
|
||||
# tools packages
|
||||
#
|
||||
# CONFIG_PKG_USING_CMBACKTRACE is not set
|
||||
# CONFIG_PKG_USING_EASYFLASH is not set
|
||||
# CONFIG_PKG_USING_EASYLOGGER is not set
|
||||
# CONFIG_PKG_USING_SYSTEMVIEW is not set
|
||||
# CONFIG_PKG_USING_RDB is not set
|
||||
# CONFIG_PKG_USING_QRCODE is not set
|
||||
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
|
||||
# CONFIG_PKG_USING_ADBD is not set
|
||||
# CONFIG_PKG_USING_COREMARK is not set
|
||||
# CONFIG_PKG_USING_DHRYSTONE is not set
|
||||
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
|
||||
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
|
||||
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
|
||||
# CONFIG_PKG_USING_BS8116A is not set
|
||||
# CONFIG_PKG_USING_GPS_RMC is not set
|
||||
# CONFIG_PKG_USING_URLENCODE is not set
|
||||
# CONFIG_PKG_USING_UMCN is not set
|
||||
|
||||
#
|
||||
# system packages
|
||||
#
|
||||
# CONFIG_PKG_USING_GUIENGINE is not set
|
||||
# CONFIG_PKG_USING_CAIRO is not set
|
||||
# CONFIG_PKG_USING_PIXMAN is not set
|
||||
# CONFIG_PKG_USING_LWEXT4 is not set
|
||||
# CONFIG_PKG_USING_PARTITION is not set
|
||||
# CONFIG_PKG_USING_FAL is not set
|
||||
# CONFIG_PKG_USING_FLASHDB is not set
|
||||
# CONFIG_PKG_USING_SQLITE is not set
|
||||
# CONFIG_PKG_USING_RTI is not set
|
||||
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
|
||||
# CONFIG_PKG_USING_CMSIS is not set
|
||||
# CONFIG_PKG_USING_DFS_YAFFS is not set
|
||||
# CONFIG_PKG_USING_LITTLEFS is not set
|
||||
# CONFIG_PKG_USING_THREAD_POOL is not set
|
||||
# CONFIG_PKG_USING_ROBOTS is not set
|
||||
# CONFIG_PKG_USING_EV is not set
|
||||
# CONFIG_PKG_USING_SYSWATCH is not set
|
||||
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
|
||||
# CONFIG_PKG_USING_PLCCORE is not set
|
||||
# CONFIG_PKG_USING_RAMDISK is not set
|
||||
# CONFIG_PKG_USING_MININI is not set
|
||||
# CONFIG_PKG_USING_QBOOT is not set
|
||||
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
|
||||
# CONFIG_PKG_USING_PPOOL is not set
|
||||
|
||||
#
|
||||
# peripheral libraries and drivers
|
||||
#
|
||||
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
|
||||
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
|
||||
# CONFIG_PKG_USING_SHT2X is not set
|
||||
# CONFIG_PKG_USING_SHT3X is not set
|
||||
# CONFIG_PKG_USING_STM32_SDIO is not set
|
||||
# CONFIG_PKG_USING_ICM20608 is not set
|
||||
# CONFIG_PKG_USING_U8G2 is not set
|
||||
# CONFIG_PKG_USING_BUTTON is not set
|
||||
# CONFIG_PKG_USING_PCF8574 is not set
|
||||
# CONFIG_PKG_USING_SX12XX is not set
|
||||
# CONFIG_PKG_USING_SIGNAL_LED is not set
|
||||
# CONFIG_PKG_USING_LEDBLINK is not set
|
||||
# CONFIG_PKG_USING_LITTLED is not set
|
||||
# CONFIG_PKG_USING_LKDGUI is not set
|
||||
# CONFIG_PKG_USING_NRF5X_SDK is not set
|
||||
# CONFIG_PKG_USING_NRFX is not set
|
||||
# CONFIG_PKG_USING_WM_LIBRARIES is not set
|
||||
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
|
||||
# CONFIG_PKG_USING_INFRARED is not set
|
||||
# CONFIG_PKG_USING_ROSSERIAL is not set
|
||||
# CONFIG_PKG_USING_AGILE_BUTTON is not set
|
||||
# CONFIG_PKG_USING_AGILE_LED is not set
|
||||
# CONFIG_PKG_USING_AT24CXX is not set
|
||||
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
|
||||
# CONFIG_PKG_USING_AD7746 is not set
|
||||
# CONFIG_PKG_USING_PCA9685 is not set
|
||||
# CONFIG_PKG_USING_I2C_TOOLS is not set
|
||||
# CONFIG_PKG_USING_NRF24L01 is not set
|
||||
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
|
||||
# CONFIG_PKG_USING_MAX17048 is not set
|
||||
# CONFIG_PKG_USING_RPLIDAR is not set
|
||||
# CONFIG_PKG_USING_AS608 is not set
|
||||
# CONFIG_PKG_USING_RC522 is not set
|
||||
# CONFIG_PKG_USING_WS2812B is not set
|
||||
# CONFIG_PKG_USING_EMBARC_BSP is not set
|
||||
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
|
||||
# CONFIG_PKG_USING_MULTI_RTIMER is not set
|
||||
# CONFIG_PKG_USING_MAX7219 is not set
|
||||
# CONFIG_PKG_USING_BEEP is not set
|
||||
# CONFIG_PKG_USING_EASYBLINK is not set
|
||||
# CONFIG_PKG_USING_PMS_SERIES is not set
|
||||
# CONFIG_PKG_USING_CAN_YMODEM is not set
|
||||
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
|
||||
# CONFIG_PKG_USING_QLED is not set
|
||||
# CONFIG_PKG_USING_PAJ7620 is not set
|
||||
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
|
||||
# CONFIG_PKG_USING_LD3320 is not set
|
||||
# CONFIG_PKG_USING_WK2124 is not set
|
||||
# CONFIG_PKG_USING_LY68L6400 is not set
|
||||
|
||||
#
|
||||
# miscellaneous packages
|
||||
#
|
||||
# CONFIG_PKG_USING_LIBCSV is not set
|
||||
# CONFIG_PKG_USING_OPTPARSE is not set
|
||||
# CONFIG_PKG_USING_FASTLZ is not set
|
||||
# CONFIG_PKG_USING_MINILZO is not set
|
||||
# CONFIG_PKG_USING_QUICKLZ is not set
|
||||
# CONFIG_PKG_USING_MULTIBUTTON is not set
|
||||
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
|
||||
# CONFIG_PKG_USING_CANFESTIVAL is not set
|
||||
# CONFIG_PKG_USING_ZLIB is not set
|
||||
# CONFIG_PKG_USING_DSTR is not set
|
||||
# CONFIG_PKG_USING_TINYFRAME is not set
|
||||
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
|
||||
# CONFIG_PKG_USING_DIGITALCTRL is not set
|
||||
# CONFIG_PKG_USING_UPACKER is not set
|
||||
# CONFIG_PKG_USING_UPARAM is not set
|
||||
|
||||
#
|
||||
# samples: kernel and components samples
|
||||
#
|
||||
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_HELLO is not set
|
||||
# CONFIG_PKG_USING_VI is not set
|
||||
# CONFIG_PKG_USING_NNOM is not set
|
||||
# CONFIG_PKG_USING_LIBANN is not set
|
||||
# CONFIG_PKG_USING_ELAPACK is not set
|
||||
# CONFIG_PKG_USING_ARMv7M_DWT is not set
|
||||
# CONFIG_PKG_USING_VT100 is not set
|
||||
# CONFIG_PKG_USING_ULAPACK is not set
|
||||
# CONFIG_PKG_USING_UKAL is not set
|
||||
# CONFIG_PKG_USING_CRCLIB is not set
|
||||
# CONFIG_PKG_USING_THREES is not set
|
||||
# CONFIG_PKG_USING_2048 is not set
|
||||
# CONFIG_PKG_USING_LWGPS is not set
|
||||
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
|
||||
CONFIG_SOC_BM3803=y
|
||||
CONFIG_RT_USING_UART1=y
|
||||
38
bsp/bm3803/Kconfig
Normal file
38
bsp/bm3803/Kconfig
Normal file
@ -0,0 +1,38 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../.."
|
||||
|
||||
# you can change the RTT_ROOT default "../.." to your rtthread_root,
|
||||
# example: default "F:/git_repositories/rt-thread"
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
config ENV_DIR
|
||||
string
|
||||
option env="ENV_ROOT"
|
||||
default "/"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "$PKGS_DIR/Kconfig"
|
||||
|
||||
config SOC_BM3803
|
||||
bool
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
config RT_USING_UART1
|
||||
bool "Using RT_USING_UART1"
|
||||
default y
|
||||
|
||||
46
bsp/bm3803/README.md
Normal file
46
bsp/bm3803/README.md
Normal file
@ -0,0 +1,46 @@
|
||||
# BM3803板级支持包
|
||||
|
||||
## 1. 简介
|
||||
|
||||
BM3803是中国航天科技集团公司第九研究院第七七二研究所推出的基于SPARC V8内核的抗辐射32位处理器
|
||||
包括如下硬件特性：
|
||||
|
||||
| 硬件 | 描述 |
|
||||
| -- | -- |
|
||||
|芯片型号| BM3803 |
|
||||
|CPU| SPARC V8 |
|
||||
|主频| 50 - 100MHz |
|
||||
|SRAM | 2MB |
|
||||
|
||||
## 2. 编译说明
|
||||
|
||||
| 环境 | 说明 |
|
||||
| --- | --- |
|
||||
|PC操作系统|Windows|
|
||||
|编译器|sparc-gaisler-elf-gcc|
|
||||
|构建工具|scons|
|
||||
1) 下载源码
|
||||
```
|
||||
git clone https://github.com/RT-Thread/rt-thread.git
|
||||
```
|
||||
2) 下载编译工具和调试工具
|
||||
```
|
||||
下载对应的编译工具链 https://www.gaisler.com/index.php/downloads/compilers
|
||||
下载对应的调试工具 https://www.gaisler.com/index.php/downloads/debug-tools
|
||||
```
|
||||
3) 通过env配置工程
|
||||
```
|
||||
打开env工具，并切换到bsp/bm3803目录
|
||||
输入menuconfig进行配置并保存
|
||||
```
|
||||
4) 编译
|
||||
```
|
||||
配置rtconfig.py中的EXEC_PATH为对应的编译工具目录
|
||||
输入scons进行编译
|
||||
```
|
||||
如果编译正确无误，会产生rtthread-bm3803.elf、rtthread.bin文件。可以使用rtthread-bm3803.elf进行调试。
|
||||
|
||||
5) 调试
|
||||
```
|
||||
调试环境配置请参考 https://www.gaisler.com/eclipse/qsg_sw_ide.pdf
|
||||
```
|
||||
31
bsp/bm3803/SConstruct
Normal file
31
bsp/bm3803/SConstruct
Normal file
@ -0,0 +1,31 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
from building import *
|
||||
|
||||
TARGET = 'rtthread-bm3803.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
CXX= rtconfig.CXX, CXXFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT)
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
54
bsp/bm3803/applications/board.c
Normal file
54
bsp/bm3803/applications/board.c
Normal file
@ -0,0 +1,54 @@
|
||||
/*
|
||||
* Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-10-16 Dystopia the first version
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <finsh.h>
|
||||
|
||||
#include "board.h"
|
||||
#include <interrupt.h>
|
||||
|
||||
extern int __bss_end;
|
||||
|
||||
static void rt_hw_timer_isr(int vector, void *param)
|
||||
{
|
||||
rt_tick_increase();
|
||||
/* timer interrupt cleared by hardware */
|
||||
}
|
||||
|
||||
int rt_hw_timer_init(void)
|
||||
{
|
||||
unsigned int counter = 1000000 / RT_TICK_PER_SECOND;
|
||||
volatile struct lregs *regs = (struct lregs *)PREGS;
|
||||
|
||||
regs->scalercnt = CPU_FREQ / 1000000 - 1;
|
||||
regs->scalerload = CPU_FREQ / 1000000 - 1;
|
||||
regs->timercnt2 = counter - 1;
|
||||
regs->timerload2 = counter - 1;
|
||||
|
||||
rt_hw_interrupt_install(TIMER2_TT, rt_hw_timer_isr, RT_NULL, "tick");
|
||||
rt_hw_interrupt_umask(TIMER2_TT);
|
||||
|
||||
/* start timer */
|
||||
regs->timerctrl2 = 0x7;
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_timer_init);
|
||||
|
||||
/**
|
||||
* This function will initialize beaglebone board
|
||||
*/
|
||||
void rt_hw_board_init(void)
|
||||
{
|
||||
rt_system_heap_init((void *)&__bss_end, (unsigned char *)&__bss_end + 0x01000000);
|
||||
rt_components_board_init();
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
}
|
||||
20
bsp/bm3803/applications/board.h
Normal file
20
bsp/bm3803/applications/board.h
Normal file
@ -0,0 +1,20 @@
|
||||
/*
|
||||
* Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-10-16 Dystopia the first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <bm3803.h>
|
||||
|
||||
#define CPU_FREQ 90000000
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
19
bsp/bm3803/applications/main.c
Normal file
19
bsp/bm3803/applications/main.c
Normal file
@ -0,0 +1,19 @@
|
||||
/*
|
||||
* Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-10-16 Dystopia the first version
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
int main(void)
|
||||
{
|
||||
printf("hello rt-thread\n");
|
||||
return 0;
|
||||
}
|
||||
90
bsp/bm3803/bm3803.lds
Normal file
90
bsp/bm3803/bm3803.lds
Normal file
@ -0,0 +1,90 @@
|
||||
OUTPUT_ARCH(sparc)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x40000000;
|
||||
|
||||
__text_start = .;
|
||||
.text :
|
||||
{
|
||||
*(.vectors)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
/* section information for modules */
|
||||
. = ALIGN(4);
|
||||
__rtmsymtab_start = .;
|
||||
KEEP(*(RTMSymTab))
|
||||
__rtmsymtab_end = .;
|
||||
|
||||
/* section information for initialization */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
} =0
|
||||
__text_end = .;
|
||||
|
||||
__rodata_start = .;
|
||||
.rodata : { *(.rodata) *(.rodata.*) }
|
||||
__rodata_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
.ctors :
|
||||
{
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP(*(SORT(.ctors.*)))
|
||||
KEEP(*(.ctors))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
}
|
||||
|
||||
.dtors :
|
||||
{
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
}
|
||||
|
||||
. = ALIGN(8);
|
||||
__data_start = .;
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
}
|
||||
__data_end = .;
|
||||
|
||||
. = ALIGN(8);
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
}
|
||||
. = ALIGN(4);
|
||||
__bss_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
_end = .;
|
||||
}
|
||||
11
bsp/bm3803/drivers/SConscript
Normal file
11
bsp/bm3803/drivers/SConscript
Normal file
@ -0,0 +1,11 @@
|
||||
import copy
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
170
bsp/bm3803/drivers/uart.c
Normal file
170
bsp/bm3803/drivers/uart.c
Normal file
@ -0,0 +1,170 @@
|
||||
/*
|
||||
* Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-10-16 Dystopia the first version
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#include <board.h>
|
||||
#include <interrupt.h>
|
||||
#include "uart.h"
|
||||
#include "uart_reg.h"
|
||||
|
||||
struct bm3803_uart
|
||||
{
|
||||
void *uart_base;
|
||||
int irq;
|
||||
};
|
||||
|
||||
static void bm3803_uart_isr(int tt, void *param)
|
||||
{
|
||||
struct bm3803_uart *uart;
|
||||
struct rt_serial_device *serial;
|
||||
struct uart_reg *uart_base;
|
||||
|
||||
serial = (struct rt_serial_device *)param;
|
||||
uart = (struct bm3803_uart *)serial->parent.user_data;
|
||||
uart_base = uart->uart_base;
|
||||
|
||||
if (uart_base->uartstatus & 0x1)
|
||||
{
|
||||
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
}
|
||||
|
||||
#define NOT_IMPLEMENTED() RT_ASSERT(0)
|
||||
|
||||
static rt_err_t bm3803_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
|
||||
{
|
||||
struct bm3803_uart *uart;
|
||||
struct uart_reg *uart_base;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct bm3803_uart *)serial->parent.user_data;
|
||||
RT_ASSERT(uart);
|
||||
uart_base = uart->uart_base;
|
||||
|
||||
if (cfg->baud_rate == BAUD_RATE_115200)
|
||||
{
|
||||
uart_base->uartscaler = ((((CPU_FREQ * 10) / (8 * 115200)) - 5) / 10);
|
||||
}
|
||||
else if (cfg->baud_rate == BAUD_RATE_9600)
|
||||
{
|
||||
uart_base->uartscaler = ((((CPU_FREQ * 10) / (8 * 9600)) - 5) / 10);
|
||||
}
|
||||
else
|
||||
{
|
||||
NOT_IMPLEMENTED();
|
||||
}
|
||||
|
||||
uart_base->uartctrl |= 0x3;
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t bm3803_control(struct rt_serial_device *serial, int cmd, void *arg)
|
||||
{
|
||||
struct bm3803_uart *uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct bm3803_uart *)serial->parent.user_data;
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_CLR_INT:
|
||||
/* disable rx irq */
|
||||
rt_hw_interrupt_mask(uart->irq);
|
||||
break;
|
||||
case RT_DEVICE_CTRL_SET_INT:
|
||||
/* enable rx irq */
|
||||
rt_hw_interrupt_umask(uart->irq);
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static int bm3803_putc(struct rt_serial_device *serial, char c)
|
||||
{
|
||||
struct bm3803_uart *uart;
|
||||
struct uart_reg *uart_base;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct bm3803_uart *)serial->parent.user_data;
|
||||
uart_base = uart->uart_base;
|
||||
|
||||
while (!(uart_base->uartstatus & 0x4));
|
||||
uart_base->uartdata = c;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int bm3803_getc(struct rt_serial_device *serial)
|
||||
{
|
||||
int ch;
|
||||
struct bm3803_uart *uart;
|
||||
struct uart_reg *uart_base;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct bm3803_uart *)serial->parent.user_data;
|
||||
uart_base = uart->uart_base;
|
||||
|
||||
ch = -1;
|
||||
if (uart_base->uartstatus & 0x1)
|
||||
{
|
||||
ch = uart_base->uartdata;
|
||||
}
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
static const struct rt_uart_ops bm3803_uart_ops =
|
||||
{
|
||||
bm3803_configure,
|
||||
bm3803_control,
|
||||
bm3803_putc,
|
||||
bm3803_getc,
|
||||
};
|
||||
|
||||
/* UART device driver structure */
|
||||
#ifdef RT_USING_UART1
|
||||
struct bm3803_uart uart1 =
|
||||
{
|
||||
(void *)UART1_BASE,
|
||||
UART1_TT,
|
||||
};
|
||||
struct rt_serial_device serial1;
|
||||
#endif
|
||||
|
||||
int rt_hw_serial_init(void)
|
||||
{
|
||||
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
||||
|
||||
#ifdef RT_USING_UART1
|
||||
volatile struct lregs *regs = (struct lregs *)PREGS;
|
||||
serial1.ops = &bm3803_uart_ops;
|
||||
serial1.config = config;
|
||||
/* configure gpio direction */
|
||||
regs->piodir |= (1 << 15);
|
||||
regs->piodir &= ~(1 << 14);
|
||||
/* enable RX interrupt */
|
||||
regs->uartctrl1 = 0;
|
||||
regs->uartctrl1 |= 0x4;
|
||||
/* install ISR */
|
||||
rt_hw_interrupt_install(uart1.irq, bm3803_uart_isr, &serial1, "uart1");
|
||||
rt_hw_interrupt_mask(uart1.irq);
|
||||
/* register UART1 device */
|
||||
rt_hw_serial_register(&serial1, "uart1",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
&uart1);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_serial_init);
|
||||
16
bsp/bm3803/drivers/uart.h
Normal file
16
bsp/bm3803/drivers/uart.h
Normal file
@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-10-16 Dystopia the first version
|
||||
*/
|
||||
|
||||
#ifndef __SERIAL_H__
|
||||
#define __SERIAL_H__
|
||||
|
||||
int rt_hw_serial_init(void);
|
||||
|
||||
#endif
|
||||
22
bsp/bm3803/drivers/uart_reg.h
Normal file
22
bsp/bm3803/drivers/uart_reg.h
Normal file
@ -0,0 +1,22 @@
|
||||
/*
|
||||
* Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-10-16 Dystopia the first version
|
||||
*/
|
||||
|
||||
#ifndef SERIAL_REG_H
|
||||
#define SERIAL_REG_H
|
||||
|
||||
struct uart_reg
|
||||
{
|
||||
unsigned int uartdata;
|
||||
unsigned int uartstatus;
|
||||
unsigned int uartctrl;
|
||||
unsigned int uartscaler;
|
||||
};
|
||||
|
||||
#endif /* end of include guard: SERIAL_REG_H */
|
||||
156
bsp/bm3803/rtconfig.h
Normal file
156
bsp/bm3803/rtconfig.h
Normal file
@ -0,0 +1,156 @@
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 4096
|
||||
#define RT_DEBUG
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_DEVICE_OPS
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x40003
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 4096
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
|
||||
/* C++ features */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FILESYSTEMS_MAX 2
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 2
|
||||
#define DFS_FD_MAX 16
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
#define RT_USING_POSIX
|
||||
|
||||
/* Network */
|
||||
|
||||
/* Socket abstraction layer */
|
||||
|
||||
|
||||
/* Network interface device */
|
||||
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
|
||||
/* AT commands */
|
||||
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
#define SOC_BM3803
|
||||
#define RT_USING_UART1
|
||||
|
||||
#endif
|
||||
43
bsp/bm3803/rtconfig.py
Normal file
43
bsp/bm3803/rtconfig.py
Normal file
@ -0,0 +1,43 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='sparc-v8'
|
||||
CPU='bm3803'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\97981\Downloads\bcc-2.1.1-gcc\bin'
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'sparc-gaisler-elf-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=v8 -nostartfiles'
|
||||
#DEVICE = ' '
|
||||
CFLAGS = DEVICE
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__'
|
||||
LFLAGS = DEVICE + ' -Wl,-Map=rtthread-bm3803.map -T bm3803.lds -Ttext=0x40000000'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -Wall'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2 -Wall'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' +\
|
||||
SIZE + ' $TARGET \n'
|
||||
@ -88,7 +88,7 @@ int isprint(unsigned char ch)
|
||||
|
||||
#if defined(RT_USING_DFS) && defined(DFS_USING_WORKDIR)
|
||||
#include <dfs_posix.h>
|
||||
const char* finsh_get_prompt()
|
||||
const char* finsh_get_prompt(void)
|
||||
{
|
||||
#define _PROMPT "finsh "
|
||||
static char finsh_prompt[RT_CONSOLEBUF_SIZE + 1] = {_PROMPT};
|
||||
|
||||
@ -213,6 +213,7 @@
|
||||
/* SECTION: Runtime library */
|
||||
// #define RT_USING_NOLIBC
|
||||
// #define RT_USING_NEWLIB
|
||||
#define RT_LIBC_USING_TIME
|
||||
|
||||
/* SECTION: Console options */
|
||||
#define RT_USING_CONSOLE
|
||||
|
||||
@ -450,6 +450,7 @@ const static struct rt_pin_ops _es32f0_pin_ops =
|
||||
es32f0_pin_attach_irq,
|
||||
es32f0_pin_detach_irq,
|
||||
es32f0_pin_irq_enable,
|
||||
RT_NULL,
|
||||
};
|
||||
|
||||
int rt_hw_pin_init(void)
|
||||
|
||||
@ -408,6 +408,7 @@ const static struct rt_pin_ops _es32f0_pin_ops =
|
||||
es32f0_pin_attach_irq,
|
||||
es32f0_pin_detach_irq,
|
||||
es32f0_pin_irq_enable,
|
||||
RT_NULL,
|
||||
};
|
||||
|
||||
int rt_hw_pin_init(void)
|
||||
|
||||
@ -408,6 +408,7 @@ const static struct rt_pin_ops _es32f0_pin_ops =
|
||||
es32f0_pin_attach_irq,
|
||||
es32f0_pin_detach_irq,
|
||||
es32f0_pin_irq_enable,
|
||||
RT_NULL,
|
||||
};
|
||||
|
||||
int rt_hw_pin_init(void)
|
||||
|
||||
@ -64,7 +64,7 @@ CONFIG_RT_USING_DEVICE=y
|
||||
CONFIG_RT_USING_CONSOLE=y
|
||||
CONFIG_RT_CONSOLEBUF_SIZE=128
|
||||
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
|
||||
CONFIG_RT_VER_NUM=0x40002
|
||||
CONFIG_RT_VER_NUM=0x40003
|
||||
# CONFIG_RT_USING_CPU_FFS is not set
|
||||
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
|
||||
|
||||
@ -114,12 +114,10 @@ CONFIG_RT_PIPE_BUFSZ=512
|
||||
CONFIG_RT_USING_SERIAL=y
|
||||
# CONFIG_RT_SERIAL_USING_DMA is not set
|
||||
CONFIG_RT_SERIAL_RB_BUFSZ=64
|
||||
CONFIG_RT_USING_CAN=y
|
||||
# CONFIG_RT_CAN_USING_HDR is not set
|
||||
# CONFIG_RT_USING_CAN is not set
|
||||
# CONFIG_RT_USING_HWTIMER is not set
|
||||
# CONFIG_RT_USING_CPUTIME is not set
|
||||
CONFIG_RT_USING_I2C=y
|
||||
# CONFIG_RT_USING_I2C_BITOPS is not set
|
||||
# CONFIG_RT_USING_I2C is not set
|
||||
CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_RT_USING_ADC is not set
|
||||
# CONFIG_RT_USING_PWM is not set
|
||||
@ -194,11 +192,15 @@ CONFIG_RT_USING_PIN=y
|
||||
#
|
||||
# IoT - internet of things
|
||||
#
|
||||
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
|
||||
# CONFIG_PKG_USING_PAHOMQTT is not set
|
||||
# CONFIG_PKG_USING_UMQTT is not set
|
||||
# CONFIG_PKG_USING_WEBCLIENT is not set
|
||||
# CONFIG_PKG_USING_WEBNET is not set
|
||||
# CONFIG_PKG_USING_MONGOOSE is not set
|
||||
# CONFIG_PKG_USING_MYMQTT is not set
|
||||
# CONFIG_PKG_USING_KAWAII_MQTT is not set
|
||||
# CONFIG_PKG_USING_BC28_MQTT is not set
|
||||
# CONFIG_PKG_USING_WEBTERMINAL is not set
|
||||
# CONFIG_PKG_USING_CJSON is not set
|
||||
# CONFIG_PKG_USING_JSMN is not set
|
||||
@ -225,6 +227,7 @@ CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_PKG_USING_COAP is not set
|
||||
# CONFIG_PKG_USING_NOPOLL is not set
|
||||
# CONFIG_PKG_USING_NETUTILS is not set
|
||||
# CONFIG_PKG_USING_CMUX is not set
|
||||
# CONFIG_PKG_USING_PPP_DEVICE is not set
|
||||
# CONFIG_PKG_USING_AT_DEVICE is not set
|
||||
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
|
||||
@ -237,9 +240,10 @@ CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
|
||||
# CONFIG_PKG_USING_ALI_IOTKIT is not set
|
||||
# CONFIG_PKG_USING_AZURE is not set
|
||||
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
|
||||
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
|
||||
# CONFIG_PKG_USING_JIOT-C-SDK is not set
|
||||
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
|
||||
# CONFIG_PKG_USING_JOYLINK is not set
|
||||
# CONFIG_PKG_USING_NIMBLE is not set
|
||||
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
|
||||
# CONFIG_PKG_USING_IPMSG is not set
|
||||
@ -256,6 +260,11 @@ CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_PKG_USING_ABUP_FOTA is not set
|
||||
# CONFIG_PKG_USING_LIBCURL2RTT is not set
|
||||
# CONFIG_PKG_USING_CAPNP is not set
|
||||
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
|
||||
# CONFIG_PKG_USING_AGILE_TELNET is not set
|
||||
# CONFIG_PKG_USING_NMEALIB is not set
|
||||
# CONFIG_PKG_USING_AGILE_JSMN is not set
|
||||
# CONFIG_PKG_USING_PDULIB is not set
|
||||
|
||||
#
|
||||
# security packages
|
||||
@ -263,6 +272,8 @@ CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_PKG_USING_MBEDTLS is not set
|
||||
# CONFIG_PKG_USING_libsodium is not set
|
||||
# CONFIG_PKG_USING_TINYCRYPT is not set
|
||||
# CONFIG_PKG_USING_TFM is not set
|
||||
# CONFIG_PKG_USING_YD_CRYPTO is not set
|
||||
|
||||
#
|
||||
# language packages
|
||||
@ -297,6 +308,9 @@ CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
|
||||
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
|
||||
# CONFIG_PKG_USING_BS8116A is not set
|
||||
# CONFIG_PKG_USING_GPS_RMC is not set
|
||||
# CONFIG_PKG_USING_URLENCODE is not set
|
||||
# CONFIG_PKG_USING_UMCN is not set
|
||||
|
||||
#
|
||||
# system packages
|
||||
@ -307,6 +321,7 @@ CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_PKG_USING_LWEXT4 is not set
|
||||
# CONFIG_PKG_USING_PARTITION is not set
|
||||
# CONFIG_PKG_USING_FAL is not set
|
||||
# CONFIG_PKG_USING_FLASHDB is not set
|
||||
# CONFIG_PKG_USING_SQLITE is not set
|
||||
# CONFIG_PKG_USING_RTI is not set
|
||||
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
|
||||
@ -317,6 +332,12 @@ CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_PKG_USING_ROBOTS is not set
|
||||
# CONFIG_PKG_USING_EV is not set
|
||||
# CONFIG_PKG_USING_SYSWATCH is not set
|
||||
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
|
||||
# CONFIG_PKG_USING_PLCCORE is not set
|
||||
# CONFIG_PKG_USING_RAMDISK is not set
|
||||
# CONFIG_PKG_USING_MININI is not set
|
||||
# CONFIG_PKG_USING_QBOOT is not set
|
||||
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
|
||||
|
||||
#
|
||||
# peripheral libraries and drivers
|
||||
@ -333,6 +354,10 @@ CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_PKG_USING_SX12XX is not set
|
||||
# CONFIG_PKG_USING_SIGNAL_LED is not set
|
||||
# CONFIG_PKG_USING_LEDBLINK is not set
|
||||
# CONFIG_PKG_USING_LITTLED is not set
|
||||
# CONFIG_PKG_USING_LKDGUI is not set
|
||||
# CONFIG_PKG_USING_NRF5X_SDK is not set
|
||||
# CONFIG_PKG_USING_NRFX is not set
|
||||
# CONFIG_PKG_USING_WM_LIBRARIES is not set
|
||||
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
|
||||
# CONFIG_PKG_USING_INFRARED is not set
|
||||
@ -350,6 +375,21 @@ CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_PKG_USING_RPLIDAR is not set
|
||||
# CONFIG_PKG_USING_AS608 is not set
|
||||
# CONFIG_PKG_USING_RC522 is not set
|
||||
# CONFIG_PKG_USING_WS2812B is not set
|
||||
# CONFIG_PKG_USING_EMBARC_BSP is not set
|
||||
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
|
||||
# CONFIG_PKG_USING_MULTI_RTIMER is not set
|
||||
# CONFIG_PKG_USING_MAX7219 is not set
|
||||
# CONFIG_PKG_USING_BEEP is not set
|
||||
# CONFIG_PKG_USING_EASYBLINK is not set
|
||||
# CONFIG_PKG_USING_PMS_SERIES is not set
|
||||
# CONFIG_PKG_USING_CAN_YMODEM is not set
|
||||
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
|
||||
# CONFIG_PKG_USING_QLED is not set
|
||||
# CONFIG_PKG_USING_PAJ7620 is not set
|
||||
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
|
||||
# CONFIG_PKG_USING_LD3320 is not set
|
||||
# CONFIG_PKG_USING_WK2124 is not set
|
||||
|
||||
#
|
||||
# miscellaneous packages
|
||||
@ -386,6 +426,9 @@ CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_PKG_USING_VT100 is not set
|
||||
# CONFIG_PKG_USING_ULAPACK is not set
|
||||
# CONFIG_PKG_USING_UKAL is not set
|
||||
# CONFIG_PKG_USING_CRCLIB is not set
|
||||
# CONFIG_PKG_USING_THREES is not set
|
||||
# CONFIG_PKG_USING_2048 is not set
|
||||
CONFIG_SOC_ES32F3696LT=y
|
||||
|
||||
#
|
||||
@ -425,6 +468,28 @@ CONFIG_BSP_USING_UART0=y
|
||||
#
|
||||
# CONFIG_BSP_USING_CAN is not set
|
||||
|
||||
#
|
||||
# ADC Drivers
|
||||
#
|
||||
# CONFIG_BSP_USING_ADC is not set
|
||||
|
||||
#
|
||||
# RTC Drivers
|
||||
#
|
||||
# CONFIG_BSP_USING_RTC is not set
|
||||
|
||||
#
|
||||
# HWtimer Drivers
|
||||
#
|
||||
# CONFIG_BSP_USING_HWTIMER0 is not set
|
||||
# CONFIG_BSP_USING_HWTIMER1 is not set
|
||||
|
||||
#
|
||||
# PWM Drivers
|
||||
#
|
||||
# CONFIG_BSP_USING_PWM0 is not set
|
||||
# CONFIG_BSP_USING_PWM1 is not set
|
||||
|
||||
#
|
||||
# Onboard Peripheral Drivers
|
||||
#
|
||||
|
||||
@ -13,9 +13,9 @@ ES-PDS-ES32F369x 是东软载波微电子官方推出的一款基于 ARM Cortex-
|
||||
|
||||
开发板外观如下图所示：
|
||||
|
||||
ES-PDS-ES32F369x-V1.2
|
||||
ES-PDS-ES32F369x-V1.3
|
||||
|
||||
|
||||
|
||||
|
||||
该开发板常用 **板载资源** 如下：
|
||||
|
||||
@ -32,15 +32,19 @@ ES-PDS-ES32F369x-V1.2
|
||||
|
||||
本 BSP 目前对外设的支持情况如下：
|
||||
|
||||
| **板载外设** | **支持情况** | **备注** |
|
||||
| :----------- | :----------: | :--------------- |
|
||||
| SPI FLASH | 支持 | SPI0 |
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| GPIO | 支持 | 50 GPIOs |
|
||||
| UART | 支持 | UART0/1/2/3/4/5 |
|
||||
| SPI | 支持 | SPI0/1/2 |
|
||||
| I2C | 支持 | I2C0/1 |
|
||||
| CAN | 支持 | CAN0 |
|
||||
| **板载外设** | **支持情况** | **备注** |
|
||||
| :----------- | :----------: | :-------------- |
|
||||
| SPI FLASH | 支持 | SPI0 |
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| GPIO | 支持 | 50 GPIOs |
|
||||
| UART | 支持 | UART0/1/2/3/4/5 |
|
||||
| SPI | 支持 | SPI0/1/2 |
|
||||
| I2C | 支持 | I2C0/1 |
|
||||
| CAN | 支持 | CAN0 |
|
||||
| PWM | 支持 | PWM0/1 |
|
||||
| TIMER | 支持 | TIMER0/1 |
|
||||
| RTC | 支持 | RTC |
|
||||
| ADC | 支持 | ADC0 |
|
||||
|
||||
### 1.2 注意事项
|
||||
|
||||
@ -56,7 +60,7 @@ ES-PDS-ES32F369x-V1.2
|
||||
|
||||
使用ESlinkⅡ(mini)连接开发板如下图所示：
|
||||
|
||||
ESLinkⅡ(mini) + ES-PDS-ES32F369x-V1.2
|
||||
ESLinkⅡ(mini) + ES-PDS-ES32F369x-V1.3
|
||||
|
||||
|
||||
|
||||
|
||||
@ -21,25 +21,25 @@ menu "Hardware Drivers Config"
|
||||
bool "Enable UART2 PC12/PD02(T/R)"
|
||||
select RT_USING_SERIAL
|
||||
default y
|
||||
depends on !BSP_USING_HWTIMER1
|
||||
|
||||
config BSP_USING_UART3
|
||||
bool "Enable UART3 PC04/PC05(T/R)"
|
||||
select RT_USING_SERIAL
|
||||
default n
|
||||
depends on !BSP_USING_HWTIMER2
|
||||
depends on !BSP_USING_SPI2
|
||||
|
||||
|
||||
config BSP_USING_UART4
|
||||
bool "Enable UART4 PB06/PB07(T/R)"
|
||||
select RT_USING_SERIAL
|
||||
default n
|
||||
depends on !BSP_USING_I2C0
|
||||
depends on !BSP_USING_PWM0
|
||||
|
||||
config BSP_USING_UART5
|
||||
bool "Enable UART5 PB09/PB08(T/R)"
|
||||
select RT_USING_SERIAL
|
||||
default n
|
||||
depends on !BSP_USING_PWM0
|
||||
endmenu
|
||||
|
||||
menu "SPI Drivers"
|
||||
@ -60,16 +60,18 @@ menu "Hardware Drivers Config"
|
||||
select RT_USING_SPI
|
||||
select RT_USING_PIN
|
||||
default n
|
||||
depends on !BSP_USING_UART3
|
||||
endmenu
|
||||
|
||||
menu "I2C Drivers"
|
||||
config BSP_USING_I2C0
|
||||
bool "Enable I2C0 BUS PB08/PB09(SCL/SDA)"
|
||||
bool "Enable I2C0 BUS PB06/PB07(SCL/SDA)"
|
||||
select RT_USING_I2C
|
||||
default n
|
||||
depends on !BSP_USING_PWM0
|
||||
|
||||
config BSP_USING_I2C1
|
||||
bool "Enable I2C1 BUS PB10/PB11(SCL/SDA)"
|
||||
bool "Enable I2C1 BUS PA05/PA06(SCL/SDA)"
|
||||
select RT_USING_I2C
|
||||
default n
|
||||
endmenu
|
||||
@ -80,6 +82,47 @@ menu "Hardware Drivers Config"
|
||||
select RT_USING_CAN
|
||||
default n
|
||||
endmenu
|
||||
|
||||
menu "ADC Drivers"
|
||||
config BSP_USING_ADC
|
||||
bool "Using ADC"
|
||||
select RT_USING_ADC
|
||||
default n
|
||||
endmenu
|
||||
|
||||
menu "RTC Drivers"
|
||||
config BSP_USING_RTC
|
||||
bool "Using RTC"
|
||||
select RT_USING_RTC
|
||||
default n
|
||||
endmenu
|
||||
|
||||
menu "HWtimer Drivers"
|
||||
config BSP_USING_HWTIMER0
|
||||
bool "Using timer0"
|
||||
select RT_USING_HWTIMER
|
||||
default n
|
||||
|
||||
config BSP_USING_HWTIMER1
|
||||
bool "Using timer1"
|
||||
select RT_USING_HWTIMER
|
||||
default n
|
||||
endmenu
|
||||
|
||||
menu "PWM Drivers"
|
||||
config BSP_USING_PWM0
|
||||
bool "Using PWM0 PB06/PB07/PB08/PB09"
|
||||
select RT_USING_PWM
|
||||
default n
|
||||
depends on !BSP_USING_CAN
|
||||
depends on !BSP_USING_I2C0
|
||||
|
||||
config BSP_USING_PWM1
|
||||
bool "Using PWM1 PA00/PA01/PA02/PA03"
|
||||
select RT_USING_PWM
|
||||
default n
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
@ -28,6 +28,22 @@ if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1'):
|
||||
if GetDepend('BSP_USING_CAN'):
|
||||
src += ['drv_can.c']
|
||||
|
||||
# add adc driver code
|
||||
if GetDepend(['BSP_USING_ADC']):
|
||||
src += ['drv_adc.c']
|
||||
|
||||
# add rtc driver code
|
||||
if GetDepend(['BSP_USING_RTC']):
|
||||
src += ['drv_rtc.c']
|
||||
|
||||
# add hwtimer driver code
|
||||
if GetDepend('BSP_USING_HWTIMER0') or GetDepend('BSP_USING_HWTIMER1'):
|
||||
src += ['drv_hwtimer.c']
|
||||
|
||||
# add pwm driver code
|
||||
if GetDepend('BSP_USING_PWM0') or GetDepend('BSP_USING_PWM1'):
|
||||
src += ['drv_pwm.c']
|
||||
|
||||
CPPPATH = [cwd]
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
|
||||
@ -14,7 +14,7 @@
|
||||
|
||||
#include <es32f36xx.h>
|
||||
|
||||
#define ES32F3_SRAM_SIZE 0x80000
|
||||
#define ES32F3_SRAM_SIZE 0x18000
|
||||
#define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
|
||||
194
bsp/essemi/es32f369x/drivers/drv_adc.c
Normal file
194
bsp/essemi/es32f369x/drivers/drv_adc.c
Normal file
@ -0,0 +1,194 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-04-03 wangyq the first version
|
||||
* 2019-11-01 wangyq update libraries
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "board.h"
|
||||
#include "drv_adc.h"
|
||||
#include <ald_gpio.h>
|
||||
#include <ald_adc.h>
|
||||
|
||||
#ifdef RT_USING_ADC
|
||||
|
||||
/* define adc instance */
|
||||
static struct rt_adc_device _device_adc0;
|
||||
|
||||
/* enable or disable adc */
|
||||
static rt_err_t es32f3_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
|
||||
{
|
||||
adc_handle_t *_hadc = (adc_handle_t *)device->parent.user_data;
|
||||
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
|
||||
if (enabled)
|
||||
{
|
||||
ADC_ENABLE(_hadc); ;
|
||||
}
|
||||
else
|
||||
{
|
||||
ADC_DISABLE(_hadc);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static adc_channel_t es32f3_adc_get_channel(rt_uint32_t channel)
|
||||
{
|
||||
adc_channel_t es32f3_channel;
|
||||
gpio_init_t gpio_initstruct;
|
||||
|
||||
/* Initialize ADC pin */
|
||||
gpio_initstruct.mode = GPIO_MODE_INPUT;
|
||||
gpio_initstruct.pupd = GPIO_FLOATING;
|
||||
gpio_initstruct.podrv = GPIO_OUT_DRIVE_1;
|
||||
gpio_initstruct.nodrv = GPIO_OUT_DRIVE_1;
|
||||
gpio_initstruct.flt = GPIO_FILTER_DISABLE;
|
||||
gpio_initstruct.type = GPIO_TYPE_CMOS;
|
||||
gpio_initstruct.func = GPIO_FUNC_0;
|
||||
|
||||
/* select gpio pin as adc function */
|
||||
switch (channel)
|
||||
{
|
||||
case 0:
|
||||
es32f3_channel = ADC_CHANNEL_0;
|
||||
ald_gpio_init(GPIOC, GPIO_PIN_0, &gpio_initstruct);
|
||||
break;
|
||||
case 1:
|
||||
es32f3_channel = ADC_CHANNEL_1;
|
||||
ald_gpio_init(GPIOC, GPIO_PIN_1, &gpio_initstruct);
|
||||
break;
|
||||
case 2:
|
||||
es32f3_channel = ADC_CHANNEL_2;
|
||||
ald_gpio_init(GPIOC, GPIO_PIN_2, &gpio_initstruct);
|
||||
break;
|
||||
case 3:
|
||||
es32f3_channel = ADC_CHANNEL_3;
|
||||
ald_gpio_init(GPIOC, GPIO_PIN_3, &gpio_initstruct);
|
||||
break;
|
||||
case 4:
|
||||
es32f3_channel = ADC_CHANNEL_4;
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_0, &gpio_initstruct);
|
||||
break;
|
||||
case 5:
|
||||
es32f3_channel = ADC_CHANNEL_5;
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_1, &gpio_initstruct);
|
||||
break;
|
||||
case 6:
|
||||
es32f3_channel = ADC_CHANNEL_6;
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_2, &gpio_initstruct);
|
||||
break;
|
||||
case 7:
|
||||
es32f3_channel = ADC_CHANNEL_7;
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_3, &gpio_initstruct);
|
||||
break;
|
||||
case 8:
|
||||
es32f3_channel = ADC_CHANNEL_8;
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_4, &gpio_initstruct);
|
||||
break;
|
||||
case 9:
|
||||
es32f3_channel = ADC_CHANNEL_9;
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_5, &gpio_initstruct);
|
||||
break;
|
||||
case 10:
|
||||
es32f3_channel = ADC_CHANNEL_10;
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_6, &gpio_initstruct);
|
||||
break;
|
||||
case 11:
|
||||
es32f3_channel = ADC_CHANNEL_11;
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_7, &gpio_initstruct);
|
||||
break;
|
||||
case 12:
|
||||
es32f3_channel = ADC_CHANNEL_12;
|
||||
ald_gpio_init(GPIOC, GPIO_PIN_4, &gpio_initstruct);
|
||||
break;
|
||||
case 13:
|
||||
es32f3_channel = ADC_CHANNEL_13;
|
||||
ald_gpio_init(GPIOC, GPIO_PIN_5, &gpio_initstruct);
|
||||
break;
|
||||
case 14:
|
||||
es32f3_channel = ADC_CHANNEL_14;
|
||||
ald_gpio_init(GPIOB, GPIO_PIN_0, &gpio_initstruct);
|
||||
break;
|
||||
case 15:
|
||||
es32f3_channel = ADC_CHANNEL_15;
|
||||
ald_gpio_init(GPIOB, GPIO_PIN_1, &gpio_initstruct);
|
||||
break;
|
||||
case 16:
|
||||
es32f3_channel = ADC_CHANNEL_16;
|
||||
break;
|
||||
case 17:
|
||||
es32f3_channel = ADC_CHANNEL_17;
|
||||
break;
|
||||
case 18:
|
||||
es32f3_channel = ADC_CHANNEL_18;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return es32f3_channel;
|
||||
}
|
||||
|
||||
static rt_err_t es32f3_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
|
||||
{
|
||||
adc_handle_t *_hadc = (adc_handle_t *)device->parent.user_data;
|
||||
adc_nch_conf_t nm_config;
|
||||
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
RT_ASSERT(value != RT_NULL);
|
||||
|
||||
/* config adc channel */
|
||||
nm_config.channel = es32f3_adc_get_channel(channel);
|
||||
nm_config.rank = ADC_NCH_RANK_1;
|
||||
nm_config.samp_time = ADC_SAMPLETIME_4;
|
||||
ald_adc_normal_channel_config(_hadc, &nm_config);
|
||||
|
||||
ald_adc_normal_start(_hadc);
|
||||
|
||||
if (ald_adc_normal_poll_for_conversion(_hadc, 5000) == OK)
|
||||
*value = ald_adc_normal_get_value(_hadc);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static const struct rt_adc_ops es32f3_adc_ops =
|
||||
{
|
||||
es32f3_adc_enabled,
|
||||
es32f3_get_adc_value,
|
||||
};
|
||||
|
||||
int rt_hw_adc_init(void)
|
||||
{
|
||||
int result = RT_EOK;
|
||||
static adc_handle_t _h_adc0;
|
||||
|
||||
/* adc function initialization */
|
||||
_h_adc0.perh = ADC0;
|
||||
_h_adc0.init.data_align = ADC_DATAALIGN_RIGHT;
|
||||
_h_adc0.init.scan_mode = DISABLE;
|
||||
_h_adc0.init.cont_mode = DISABLE;
|
||||
_h_adc0.init.disc_mode = ADC_ALL_DISABLE;
|
||||
_h_adc0.init.disc_nbr = ADC_DISC_NBR_1;
|
||||
_h_adc0.init.conv_res = ADC_CONV_RES_10;
|
||||
_h_adc0.init.clk_div = ADC_CKDIV_128;
|
||||
_h_adc0.init.nche_sel = ADC_NCHESEL_MODE_ALL;
|
||||
_h_adc0.init.neg_ref = ADC_NEG_REF_VSS;
|
||||
_h_adc0.init.pos_ref = ADC_POS_REF_VDD;
|
||||
ald_adc_init(&_h_adc0);
|
||||
|
||||
rt_hw_adc_register(&_device_adc0, "adc0", &es32f3_adc_ops, &_h_adc0);
|
||||
|
||||
return result;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_adc_init);
|
||||
|
||||
#endif
|
||||
16
bsp/essemi/es32f369x/drivers/drv_adc.h
Normal file
16
bsp/essemi/es32f369x/drivers/drv_adc.h
Normal file
@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-04-03 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_ADC_H__
|
||||
#define DRV_ADC_H__
|
||||
|
||||
int rt_hw_adc_init(void);
|
||||
|
||||
#endif
|
||||
@ -17,10 +17,10 @@
|
||||
|
||||
#ifdef RT_USING_PIN
|
||||
|
||||
#define __ES32F0_PIN(index, gpio, gpio_index) {index, GPIO##gpio, GPIO_PIN_##gpio_index}
|
||||
#define __ES32F0_PIN_DEFAULT {-1, 0, 0}
|
||||
#define __ES32F3_PIN(index, gpio, gpio_index) {index, GPIO##gpio, GPIO_PIN_##gpio_index}
|
||||
#define __ES32F3_PIN_DEFAULT {-1, 0, 0}
|
||||
|
||||
/* ES32F0 GPIO driver */
|
||||
/* ES32F3 GPIO driver */
|
||||
struct pin_index
|
||||
{
|
||||
int index;
|
||||
@ -30,71 +30,71 @@ struct pin_index
|
||||
|
||||
static const struct pin_index pins[] =
|
||||
{
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN(2, C, 13),
|
||||
__ES32F0_PIN(3, C, 14),
|
||||
__ES32F0_PIN(4, C, 15),
|
||||
__ES32F0_PIN(5, H, 0),
|
||||
__ES32F0_PIN(6, H, 1),
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN(8, C, 0),
|
||||
__ES32F0_PIN(9, C, 1),
|
||||
__ES32F0_PIN(10, C, 2),
|
||||
__ES32F0_PIN(11, C, 3),
|
||||
__ES32F0_PIN(12, H, 3),
|
||||
__ES32F0_PIN(13, H, 4),
|
||||
__ES32F0_PIN(14, A, 0),
|
||||
__ES32F0_PIN(15, A, 1),
|
||||
__ES32F0_PIN(16, A, 2),
|
||||
__ES32F0_PIN(17, A, 3),
|
||||
__ES32F0_PIN(18, F, 0),
|
||||
__ES32F0_PIN(19, F, 1),
|
||||
__ES32F0_PIN(20, A, 4),
|
||||
__ES32F0_PIN(21, A, 5),
|
||||
__ES32F0_PIN(22, A, 6),
|
||||
__ES32F0_PIN(23, A, 7),
|
||||
__ES32F0_PIN(24, C, 4),
|
||||
__ES32F0_PIN(25, C, 5),
|
||||
__ES32F0_PIN(26, B, 0),
|
||||
__ES32F0_PIN(27, B, 1),
|
||||
__ES32F0_PIN(28, B, 2),
|
||||
__ES32F0_PIN(29, B, 10),
|
||||
__ES32F0_PIN(30, B, 11),
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN(33, B, 12),
|
||||
__ES32F0_PIN(34, B, 13),
|
||||
__ES32F0_PIN(35, B, 14),
|
||||
__ES32F0_PIN(36, B, 15),
|
||||
__ES32F0_PIN(37, C, 6),
|
||||
__ES32F0_PIN(38, C, 7),
|
||||
__ES32F0_PIN(39, C, 8),
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN(46, A, 13),
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN(49, A, 14),
|
||||
__ES32F0_PIN(50, A, 15),
|
||||
__ES32F0_PIN(51, C, 10),
|
||||
__ES32F0_PIN(52, C, 11),
|
||||
__ES32F0_PIN(53, C, 12),
|
||||
__ES32F0_PIN(54, D, 2),
|
||||
__ES32F0_PIN(55, B, 3),
|
||||
__ES32F0_PIN(56, B, 4),
|
||||
__ES32F0_PIN(57, B, 5),
|
||||
__ES32F0_PIN(58, B, 6),
|
||||
__ES32F0_PIN(59, B, 7),
|
||||
__ES32F0_PIN(60, H, 2),
|
||||
__ES32F0_PIN(61, B, 8),
|
||||
__ES32F0_PIN(62, B, 9),
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F0_PIN_DEFAULT,
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN(2, C, 13),
|
||||
__ES32F3_PIN(3, C, 14),
|
||||
__ES32F3_PIN(4, C, 15),
|
||||
__ES32F3_PIN(5, H, 0),
|
||||
__ES32F3_PIN(6, H, 1),
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN(8, C, 0),
|
||||
__ES32F3_PIN(9, C, 1),
|
||||
__ES32F3_PIN(10, C, 2),
|
||||
__ES32F3_PIN(11, C, 3),
|
||||
__ES32F3_PIN(12, H, 3),
|
||||
__ES32F3_PIN(13, H, 4),
|
||||
__ES32F3_PIN(14, A, 0),
|
||||
__ES32F3_PIN(15, A, 1),
|
||||
__ES32F3_PIN(16, A, 2),
|
||||
__ES32F3_PIN(17, A, 3),
|
||||
__ES32F3_PIN(18, F, 0),
|
||||
__ES32F3_PIN(19, F, 1),
|
||||
__ES32F3_PIN(20, A, 4),
|
||||
__ES32F3_PIN(21, A, 5),
|
||||
__ES32F3_PIN(22, A, 6),
|
||||
__ES32F3_PIN(23, A, 7),
|
||||
__ES32F3_PIN(24, C, 4),
|
||||
__ES32F3_PIN(25, C, 5),
|
||||
__ES32F3_PIN(26, B, 0),
|
||||
__ES32F3_PIN(27, B, 1),
|
||||
__ES32F3_PIN(28, B, 2),
|
||||
__ES32F3_PIN(29, B, 10),
|
||||
__ES32F3_PIN(30, B, 11),
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN(33, B, 12),
|
||||
__ES32F3_PIN(34, B, 13),
|
||||
__ES32F3_PIN(35, B, 14),
|
||||
__ES32F3_PIN(36, B, 15),
|
||||
__ES32F3_PIN(37, C, 6),
|
||||
__ES32F3_PIN(38, C, 7),
|
||||
__ES32F3_PIN(39, C, 8),
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN(46, A, 13),
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN(49, A, 14),
|
||||
__ES32F3_PIN(50, A, 15),
|
||||
__ES32F3_PIN(51, C, 10),
|
||||
__ES32F3_PIN(52, C, 11),
|
||||
__ES32F3_PIN(53, C, 12),
|
||||
__ES32F3_PIN(54, D, 2),
|
||||
__ES32F3_PIN(55, B, 3),
|
||||
__ES32F3_PIN(56, B, 4),
|
||||
__ES32F3_PIN(57, B, 5),
|
||||
__ES32F3_PIN(58, B, 6),
|
||||
__ES32F3_PIN(59, B, 7),
|
||||
__ES32F3_PIN(60, H, 2),
|
||||
__ES32F3_PIN(61, B, 8),
|
||||
__ES32F3_PIN(62, B, 9),
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
__ES32F3_PIN_DEFAULT,
|
||||
};
|
||||
|
||||
struct pin_irq_map
|
||||
@ -408,6 +408,7 @@ const static struct rt_pin_ops _es32f3_pin_ops =
|
||||
es32f3_pin_attach_irq,
|
||||
es32f3_pin_detach_irq,
|
||||
es32f3_pin_irq_enable,
|
||||
RT_NULL,
|
||||
};
|
||||
|
||||
int rt_hw_pin_init(void)
|
||||
|
||||
193
bsp/essemi/es32f369x/drivers/drv_hwtimer.c
Normal file
193
bsp/essemi/es32f369x/drivers/drv_hwtimer.c
Normal file
@ -0,0 +1,193 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-3-19 wangyq the first version
|
||||
* 2019-11-01 wangyq update libraries
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <drv_hwtimer.h>
|
||||
#include <board.h>
|
||||
#include <ald_cmu.h>
|
||||
#include <ald_timer.h>
|
||||
|
||||
#ifdef RT_USING_HWTIMER
|
||||
|
||||
struct es32f3_hwtimer_dev
|
||||
{
|
||||
rt_hwtimer_t parent;
|
||||
timer_handle_t *hwtimer_periph;
|
||||
IRQn_Type IRQn;
|
||||
};
|
||||
|
||||
#ifdef BSP_USING_HWTIMER0
|
||||
static struct es32f3_hwtimer_dev hwtimer0;
|
||||
|
||||
void BS16T0_Handler(void)
|
||||
{
|
||||
ald_timer_clear_flag_status(hwtimer0.hwtimer_periph, TIMER_FLAG_UPDATE);
|
||||
rt_device_hwtimer_isr(&hwtimer0.parent);
|
||||
|
||||
if (HWTIMER_MODE_ONESHOT == hwtimer0.parent.mode)
|
||||
{
|
||||
ald_timer_base_stop(hwtimer0.hwtimer_periph);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_HWTIMER1
|
||||
static struct es32f3_hwtimer_dev hwtimer1;
|
||||
/* can not use when UART2 Handler is enabled */
|
||||
void BS16T1_Handler(void)
|
||||
{
|
||||
/* if BS16T1 it */
|
||||
if (ald_timer_get_it_status(hwtimer1.hwtimer_periph, TIMER_IT_UPDATE) &&
|
||||
ald_timer_get_flag_status(hwtimer1.hwtimer_periph, TIMER_FLAG_UPDATE))
|
||||
{
|
||||
ald_timer_clear_flag_status(hwtimer1.hwtimer_periph, TIMER_FLAG_UPDATE);
|
||||
rt_device_hwtimer_isr(&hwtimer1.parent);
|
||||
|
||||
if (HWTIMER_MODE_ONESHOT == hwtimer1.parent.mode)
|
||||
{
|
||||
ald_timer_base_stop(hwtimer1.hwtimer_periph);
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct rt_hwtimer_info es32f3_hwtimer_info =
|
||||
{
|
||||
96000000, /* maximum count frequency */
|
||||
1, /* minimum count frequency */
|
||||
65535, /* counter maximum value */
|
||||
HWTIMER_CNTMODE_UP
|
||||
};
|
||||
|
||||
static void es32f3_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
|
||||
{
|
||||
struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data;
|
||||
|
||||
RT_ASSERT(hwtimer != RT_NULL);
|
||||
|
||||
if (1 == state)
|
||||
{
|
||||
ald_timer_base_init(hwtimer->hwtimer_periph);
|
||||
ald_timer_interrupt_config(hwtimer->hwtimer_periph, TIMER_IT_UPDATE, ENABLE);
|
||||
NVIC_EnableIRQ(hwtimer->IRQn);
|
||||
}
|
||||
hwtimer->parent.freq = ald_cmu_get_pclk1_clock();
|
||||
es32f3_hwtimer_info.maxfreq = ald_cmu_get_pclk1_clock();
|
||||
es32f3_hwtimer_info.minfreq = ald_cmu_get_pclk1_clock();
|
||||
}
|
||||
|
||||
static rt_err_t es32f3_hwtimer_start(rt_hwtimer_t *timer,
|
||||
rt_uint32_t cnt,
|
||||
rt_hwtimer_mode_t mode)
|
||||
{
|
||||
struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data;
|
||||
|
||||
RT_ASSERT(hwtimer != RT_NULL);
|
||||
|
||||
WRITE_REG(hwtimer->hwtimer_periph->perh->AR, cnt);
|
||||
ald_timer_base_start(hwtimer->hwtimer_periph);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static void es32f3_hwtimer_stop(rt_hwtimer_t *timer)
|
||||
{
|
||||
struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data;
|
||||
|
||||
RT_ASSERT(hwtimer != RT_NULL);
|
||||
|
||||
ald_timer_base_stop(hwtimer->hwtimer_periph);
|
||||
}
|
||||
|
||||
static rt_uint32_t es32f3_hwtimer_count_get(rt_hwtimer_t *timer)
|
||||
{
|
||||
struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data;
|
||||
uint32_t hwtimer_count = 0;
|
||||
|
||||
RT_ASSERT(hwtimer != RT_NULL);
|
||||
|
||||
hwtimer_count = READ_REG(hwtimer->hwtimer_periph->perh->COUNT);
|
||||
|
||||
return hwtimer_count;
|
||||
}
|
||||
|
||||
static rt_err_t es32f3_hwtimer_control(rt_hwtimer_t *timer,
|
||||
rt_uint32_t cmd,
|
||||
void *args)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
rt_uint32_t freq = 0;
|
||||
struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data;
|
||||
|
||||
RT_ASSERT(hwtimer != RT_NULL);
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case HWTIMER_CTRL_FREQ_SET:
|
||||
freq = *(rt_uint32_t *)args;
|
||||
if (freq != ald_cmu_get_pclk1_clock())
|
||||
{
|
||||
ret = -RT_ERROR;
|
||||
}
|
||||
break;
|
||||
|
||||
case HWTIMER_CTRL_STOP:
|
||||
ald_timer_base_stop(hwtimer->hwtimer_periph);
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = RT_EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct rt_hwtimer_ops es32f3_hwtimer_ops =
|
||||
{
|
||||
es32f3_hwtimer_init,
|
||||
es32f3_hwtimer_start,
|
||||
es32f3_hwtimer_stop,
|
||||
es32f3_hwtimer_count_get,
|
||||
es32f3_hwtimer_control
|
||||
};
|
||||
|
||||
int rt_hw_hwtimer_init(void)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
|
||||
#ifdef BSP_USING_HWTIMER0
|
||||
static timer_handle_t _hwtimer_periph0;
|
||||
_hwtimer_periph0.perh = BS16T0;
|
||||
hwtimer0.IRQn = BS16T0_IRQn;
|
||||
hwtimer0.hwtimer_periph = &_hwtimer_periph0;
|
||||
hwtimer0.parent.info = &es32f3_hwtimer_info;
|
||||
hwtimer0.parent.ops = &es32f3_hwtimer_ops;
|
||||
ret = rt_device_hwtimer_register(&hwtimer0.parent, "timer0", &hwtimer0);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_HWTIMER1
|
||||
static timer_handle_t _hwtimer_periph1;
|
||||
_hwtimer_periph1.perh = BS16T1;
|
||||
hwtimer1.IRQn = BS16T1_IRQn;
|
||||
hwtimer1.hwtimer_periph = &_hwtimer_periph1;
|
||||
hwtimer1.parent.info = &es32f3_hwtimer_info;
|
||||
hwtimer1.parent.ops = &es32f3_hwtimer_ops;
|
||||
ret = rt_device_hwtimer_register(&hwtimer1.parent, "timer1", &hwtimer1);
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_hwtimer_init);
|
||||
|
||||
#endif
|
||||
16
bsp/essemi/es32f369x/drivers/drv_hwtimer.h
Normal file
16
bsp/essemi/es32f369x/drivers/drv_hwtimer.h
Normal file
@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-3-19 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_HWTIMER_H__
|
||||
#define DRV_HWTIMER_H__
|
||||
|
||||
int rt_hw_hwtimer_init(void);
|
||||
|
||||
#endif
|
||||
@ -16,6 +16,7 @@
|
||||
#include "drv_i2c.h"
|
||||
#include <ald_i2c.h>
|
||||
#include <ald_gpio.h>
|
||||
#include <rtdbg.h>
|
||||
|
||||
#ifdef RT_USING_I2C
|
||||
|
||||
@ -55,8 +56,8 @@ static void _i2c_init(void)
|
||||
|
||||
ald_i2c_reset(&_h_i2c0);
|
||||
ald_i2c_init(&_h_i2c0);
|
||||
/* PB8->I2C0_SCL, PB9->I2C0_SDA */
|
||||
ald_gpio_init(GPIOB, GPIO_PIN_8 | GPIO_PIN_9, &gpio_instruct);
|
||||
/* PB06->I2C0_SCL, PB07->I2C0_SDA */
|
||||
ald_gpio_init(GPIOB, GPIO_PIN_6 | GPIO_PIN_7, &gpio_instruct);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_I2C1
|
||||
@ -90,7 +91,7 @@ static rt_size_t es32f3_master_xfer(struct rt_i2c_bus_device *bus,
|
||||
{
|
||||
if (ald_i2c_master_recv(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
|
||||
{
|
||||
i2c_dbg("i2c bus write failed,i2c bus stop!\n");
|
||||
LOG_E("i2c bus write failed,i2c bus stop!\n");
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
@ -98,7 +99,7 @@ static rt_size_t es32f3_master_xfer(struct rt_i2c_bus_device *bus,
|
||||
{
|
||||
if (ald_i2c_master_send(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
|
||||
{
|
||||
i2c_dbg("i2c bus write failed,i2c bus stop!\n");
|
||||
LOG_E("i2c bus write failed,i2c bus stop!\n");
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
@ -107,7 +108,7 @@ static rt_size_t es32f3_master_xfer(struct rt_i2c_bus_device *bus,
|
||||
ret = i;
|
||||
|
||||
out:
|
||||
i2c_dbg("send stop condition\n");
|
||||
LOG_E("send stop condition\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
171
bsp/essemi/es32f369x/drivers/drv_pwm.c
Normal file
171
bsp/essemi/es32f369x/drivers/drv_pwm.c
Normal file
@ -0,0 +1,171 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-11 wangyq the first version
|
||||
* 2019-11-01 wangyq update libraries
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
#include <ald_cmu.h>
|
||||
#include <ald_timer.h>
|
||||
#include <ald_gpio.h>
|
||||
|
||||
static void pwm_set_freq(timer_handle_t *timer_initstruct, uint32_t ns)
|
||||
{
|
||||
uint64_t _arr = (uint64_t)ald_cmu_get_pclk1_clock() * ns / 1000000000 /
|
||||
(timer_initstruct->init.prescaler + 1);
|
||||
|
||||
WRITE_REG(timer_initstruct->perh->AR, (uint32_t)_arr);
|
||||
timer_initstruct->init.period = (uint32_t)_arr;
|
||||
}
|
||||
|
||||
static void pwm_set_duty(timer_handle_t *timer_initstruct, timer_channel_t ch, uint32_t ns)
|
||||
{
|
||||
uint64_t tmp = (uint64_t)ald_cmu_get_pclk1_clock() * ns / 1000000000 /
|
||||
(timer_initstruct->init.prescaler + 1);
|
||||
|
||||
if (ch == TIMER_CHANNEL_1)
|
||||
WRITE_REG(timer_initstruct->perh->CCVAL1, (uint32_t)tmp);
|
||||
else if (ch == TIMER_CHANNEL_2)
|
||||
WRITE_REG(timer_initstruct->perh->CCVAL2, (uint32_t)tmp);
|
||||
else if (ch == TIMER_CHANNEL_3)
|
||||
WRITE_REG(timer_initstruct->perh->CCVAL3, (uint32_t)tmp);
|
||||
else if (ch == TIMER_CHANNEL_4)
|
||||
WRITE_REG(timer_initstruct->perh->CCVAL4, (uint32_t)tmp);
|
||||
}
|
||||
|
||||
static rt_err_t es32f3_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
uint32_t _ccep;
|
||||
timer_channel_t pwm_channel;
|
||||
timer_oc_init_t tim_ocinit;
|
||||
timer_handle_t *timer_initstruct = (timer_handle_t *)device->parent.user_data;
|
||||
struct rt_pwm_configuration *cfg = (struct rt_pwm_configuration *)arg;
|
||||
|
||||
RT_ASSERT(timer_initstruct != RT_NULL);
|
||||
|
||||
tim_ocinit.oc_mode = TIMER_OC_MODE_PWM1;
|
||||
tim_ocinit.oc_polarity = TIMER_OC_POLARITY_HIGH;
|
||||
tim_ocinit.oc_fast_en = DISABLE;
|
||||
tim_ocinit.ocn_polarity = TIMER_OCN_POLARITY_HIGH;
|
||||
tim_ocinit.ocn_idle = TIMER_OCN_IDLE_RESET;
|
||||
tim_ocinit.oc_idle = TIMER_OC_IDLE_RESET;
|
||||
|
||||
/* select pwm output channel */
|
||||
if (1 == cfg->channel)
|
||||
pwm_channel = TIMER_CHANNEL_1;
|
||||
|
||||
else if (2 == cfg->channel)
|
||||
pwm_channel = TIMER_CHANNEL_2;
|
||||
|
||||
else if (3 == cfg->channel)
|
||||
pwm_channel = TIMER_CHANNEL_3;
|
||||
|
||||
else if (4 == cfg->channel)
|
||||
pwm_channel = TIMER_CHANNEL_4;
|
||||
|
||||
else
|
||||
return RT_EINVAL;
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case PWM_CMD_ENABLE:
|
||||
ald_timer_pwm_start(timer_initstruct, pwm_channel);
|
||||
break;
|
||||
|
||||
case PWM_CMD_DISABLE:
|
||||
ald_timer_pwm_stop(timer_initstruct, pwm_channel);
|
||||
break;
|
||||
|
||||
case PWM_CMD_SET:
|
||||
_ccep = timer_initstruct->perh->CCEP;
|
||||
/* count registers max 0xFFFF, auto adjust prescaler */
|
||||
do
|
||||
{
|
||||
pwm_set_freq(timer_initstruct, cfg->period);
|
||||
timer_initstruct->init.prescaler ++;
|
||||
}
|
||||
while (timer_initstruct->init.period > 0xFFFF);
|
||||
/* update prescaler */
|
||||
WRITE_REG(timer_initstruct->perh->PRES, --timer_initstruct->init.prescaler);
|
||||
ald_timer_oc_config_channel(timer_initstruct, &tim_ocinit, pwm_channel);
|
||||
pwm_set_duty(timer_initstruct, pwm_channel, cfg->pulse);
|
||||
timer_initstruct->perh->CCEP = _ccep;
|
||||
break;
|
||||
|
||||
case PWM_CMD_GET:
|
||||
cfg->pulse = ald_timer_read_capture_value(timer_initstruct, pwm_channel) * 100 /
|
||||
READ_REG(timer_initstruct->perh->AR);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
const static struct rt_pwm_ops es32f3_pwm_ops =
|
||||
{
|
||||
es32f3_pwm_control
|
||||
};
|
||||
|
||||
int rt_hw_pwm_init(void)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
gpio_init_t gpio_initstructure;
|
||||
|
||||
gpio_initstructure.mode = GPIO_MODE_OUTPUT;
|
||||
gpio_initstructure.odos = GPIO_PUSH_PULL;
|
||||
gpio_initstructure.pupd = GPIO_PUSH_UP;
|
||||
gpio_initstructure.podrv = GPIO_OUT_DRIVE_6;
|
||||
gpio_initstructure.nodrv = GPIO_OUT_DRIVE_6;
|
||||
gpio_initstructure.flt = GPIO_FILTER_DISABLE;
|
||||
gpio_initstructure.type = GPIO_TYPE_TTL;
|
||||
|
||||
#ifdef BSP_USING_PWM0 /* 4 channels */
|
||||
static struct rt_device_pwm pwm_dev0;
|
||||
static timer_handle_t timer_initstruct0;
|
||||
|
||||
timer_initstruct0.perh = GP16C4T0;
|
||||
ald_timer_pwm_init(&timer_initstruct0);
|
||||
|
||||
/* gpio initialization */
|
||||
gpio_initstructure.func = GPIO_FUNC_2;
|
||||
ald_gpio_init(GPIOB, GPIO_PIN_6, &gpio_initstructure);
|
||||
ald_gpio_init(GPIOB, GPIO_PIN_7, &gpio_initstructure);
|
||||
ald_gpio_init(GPIOB, GPIO_PIN_8, &gpio_initstructure);
|
||||
ald_gpio_init(GPIOB, GPIO_PIN_9, &gpio_initstructure);
|
||||
|
||||
ret = rt_device_pwm_register(&pwm_dev0, "pwm0", &es32f3_pwm_ops,
|
||||
&timer_initstruct0);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_PWM1 /* 4 channels */
|
||||
static struct rt_device_pwm pwm_dev1;
|
||||
static timer_handle_t timer_initstruct1;
|
||||
|
||||
timer_initstruct1.perh = GP16C4T1;
|
||||
ald_timer_pwm_init(&timer_initstruct1);
|
||||
|
||||
/* gpio initialization */
|
||||
gpio_initstructure.func = GPIO_FUNC_5;
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_0, &gpio_initstructure);
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_1, &gpio_initstructure);
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_2, &gpio_initstructure);
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_3, &gpio_initstructure);
|
||||
|
||||
ret = rt_device_pwm_register(&pwm_dev1, "pwm1", &es32f3_pwm_ops,
|
||||
&timer_initstruct1);
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_pwm_init);
|
||||
16
bsp/essemi/es32f369x/drivers/drv_pwm.h
Normal file
16
bsp/essemi/es32f369x/drivers/drv_pwm.h
Normal file
@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-11 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_PWM_H__
|
||||
#define DRV_PWM_H__
|
||||
|
||||
int rt_hw_pwm_init(void);
|
||||
|
||||
#endif
|
||||
158
bsp/essemi/es32f369x/drivers/drv_rtc.c
Normal file
158
bsp/essemi/es32f369x/drivers/drv_rtc.c
Normal file
@ -0,0 +1,158 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-22 wangyq the first version
|
||||
* 2019-11-01 wangyq update libraries
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <string.h>
|
||||
#include "board.h"
|
||||
#include "drv_rtc.h"
|
||||
#include <ald_cmu.h>
|
||||
#include <ald_rtc.h>
|
||||
|
||||
#ifdef RT_USING_RTC
|
||||
|
||||
static void __rtc_init(rtc_init_t *init)
|
||||
{
|
||||
assert_param(IS_RTC_HOUR_FORMAT(init->hour_format));
|
||||
assert_param(IS_RTC_OUTPUT_SEL(init->output));
|
||||
assert_param(IS_RTC_OUTPUT_POLARITY(init->output_polarity));
|
||||
|
||||
ald_rtc_reset();
|
||||
RTC_UNLOCK();
|
||||
|
||||
MODIFY_REG(RTC->CON, RTC_CON_HFM_MSK, init->hour_format << RTC_CON_HFM_POS);
|
||||
MODIFY_REG(RTC->CON, RTC_CON_EOS_MSK, init->output << RTC_CON_EOS_POSS);
|
||||
MODIFY_REG(RTC->CON, RTC_CON_POL_MSK, init->output_polarity << RTC_CON_POL_POS);
|
||||
MODIFY_REG(RTC->PSR, RTC_PSR_SPRS_MSK, init->synch_pre_div << RTC_PSR_SPRS_POSS);
|
||||
MODIFY_REG(RTC->PSR, RTC_PSR_APRS_MSK, init->asynch_pre_div << RTC_PSR_APRS_POSS);
|
||||
|
||||
RTC_LOCK();
|
||||
return;
|
||||
}
|
||||
|
||||
static rt_err_t es32f0_rtc_control(rt_device_t dev, int cmd, void *args)
|
||||
{
|
||||
rt_err_t result = RT_EOK;
|
||||
|
||||
struct tm time_temp;
|
||||
struct tm *pNow;
|
||||
rtc_date_t date;
|
||||
rtc_time_t time;
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_RTC_GET_TIME:
|
||||
|
||||
ald_rtc_get_date_time(&date, &time, RTC_FORMAT_DEC);
|
||||
time_temp.tm_sec = time.second;
|
||||
time_temp.tm_min = time.minute;
|
||||
time_temp.tm_hour = time.hour;
|
||||
time_temp.tm_mday = date.day;
|
||||
time_temp.tm_mon = date.month - 1;
|
||||
time_temp.tm_year = date.year - 1900 + 2000;
|
||||
*((time_t *)args) = mktime(&time_temp);
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_RTC_SET_TIME:
|
||||
|
||||
rt_enter_critical();
|
||||
/* converts calendar time time into local time. */
|
||||
pNow = localtime((const time_t *)args);
|
||||
/* copy the statically located variable */
|
||||
memcpy(&time_temp, pNow, sizeof(struct tm));
|
||||
/* unlock scheduler. */
|
||||
rt_exit_critical();
|
||||
|
||||
time.hour = time_temp.tm_hour;
|
||||
time.minute = time_temp.tm_min;
|
||||
time.second = time_temp.tm_sec;
|
||||
date.year = time_temp.tm_year + 1900 - 2000;
|
||||
date.month = time_temp.tm_mon + 1;
|
||||
date.day = time_temp.tm_mday;
|
||||
ald_rtc_set_time(&time, RTC_FORMAT_DEC);
|
||||
ald_rtc_set_date(&date, RTC_FORMAT_DEC);
|
||||
/* start RTC */
|
||||
RTC_UNLOCK();
|
||||
SET_BIT(RTC->CON, RTC_CON_GO_MSK);
|
||||
RTC_LOCK();
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_RTC_GET_ALARM:
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_RTC_SET_ALARM:
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
const static struct rt_device_ops es32f0_rtc_ops =
|
||||
{
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
es32f0_rtc_control
|
||||
};
|
||||
#endif
|
||||
|
||||
int rt_hw_rtc_init(void)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
static struct rt_device rtc_dev;
|
||||
rtc_init_t rtc_initstruct;
|
||||
|
||||
/* enable external 32.768kHz */
|
||||
CMU_LOSC_ENABLE();
|
||||
ald_cmu_losc_safe_config(ENABLE);
|
||||
/* set default time */
|
||||
RTC_UNLOCK();
|
||||
WRITE_REG(RTC->TIME, 0x134251);
|
||||
WRITE_REG(RTC->DATE, 0x1190401);
|
||||
RTC_LOCK();
|
||||
/* RTC function initialization */
|
||||
rtc_initstruct.hour_format = RTC_HOUR_FORMAT_24;
|
||||
rtc_initstruct.asynch_pre_div = 0;
|
||||
rtc_initstruct.synch_pre_div = 32767;
|
||||
rtc_initstruct.output = RTC_OUTPUT_DISABLE;
|
||||
__rtc_init(&rtc_initstruct);
|
||||
|
||||
rtc_dev.type = RT_Device_Class_RTC;
|
||||
rtc_dev.rx_indicate = RT_NULL;
|
||||
rtc_dev.tx_complete = RT_NULL;
|
||||
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
rtc_dev.ops = &es32f0_rtc_ops;
|
||||
#else
|
||||
rtc_dev.init = RT_NULL;
|
||||
rtc_dev.open = RT_NULL;
|
||||
rtc_dev.close = RT_NULL;
|
||||
rtc_dev.read = RT_NULL;
|
||||
rtc_dev.write = RT_NULL;
|
||||
rtc_dev.control = es32f0_rtc_control;
|
||||
#endif
|
||||
|
||||
rtc_dev.user_data = RTC;
|
||||
|
||||
ret = rt_device_register(&rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR);
|
||||
|
||||
return ret;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_rtc_init);
|
||||
|
||||
#endif
|
||||
16
bsp/essemi/es32f369x/drivers/drv_rtc.h
Normal file
16
bsp/essemi/es32f369x/drivers/drv_rtc.h
Normal file
@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-22 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_RTC_H__
|
||||
#define DRV_RTC_H__
|
||||
|
||||
int rt_hw_rtc_init(void);
|
||||
|
||||
#endif
|
||||
@ -39,7 +39,7 @@ static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial
|
||||
gpio_initstructure.odos = GPIO_PUSH_PULL;
|
||||
gpio_initstructure.pupd = GPIO_PUSH_UP;
|
||||
gpio_initstructure.podrv = GPIO_OUT_DRIVE_1;
|
||||
gpio_initstructure.nodrv = GPIO_OUT_DRIVE_0_1;
|
||||
gpio_initstructure.nodrv = GPIO_OUT_DRIVE_1;
|
||||
gpio_initstructure.flt = GPIO_FILTER_DISABLE;
|
||||
gpio_initstructure.type = GPIO_TYPE_TTL;
|
||||
|
||||
|
||||
34
bsp/essemi/es32f369x/drivers/linker_scripts/link.icf
Normal file
34
bsp/essemi/es32f369x/drivers/linker_scripts/link.icf
Normal file
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0007FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, last block HEAP };
|
||||
|
||||
export symbol __ICFEDIT_region_RAM_start__;
|
||||
export symbol __ICFEDIT_region_RAM_end__;
|
||||
Binary file not shown.
|
Before Width: | Height: | Size: 3.6 MiB |
BIN
bsp/essemi/es32f369x/figures/ES-PDS-ES32F369x-V1.3.jpg
Normal file
BIN
bsp/essemi/es32f369x/figures/ES-PDS-ES32F369x-V1.3.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 3.4 MiB |
Binary file not shown.
|
Before Width: | Height: | Size: 2.4 MiB After Width: | Height: | Size: 2.3 MiB |
2810
bsp/essemi/es32f369x/project.ewd
Normal file
2810
bsp/essemi/es32f369x/project.ewd
Normal file
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Loading…
x
Reference in New Issue
Block a user