Merge pull request #2780 from zhangjun1996/master
修复由于stm32系列的can驱动编译错误
This commit is contained in:
commit
93de68129e
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@ -15,6 +15,10 @@
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#ifdef RT_USING_CAN
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#ifdef RT_CAN_USING_HDR
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#error "The CAN driver does not support hardware filters, Please disable RT_CAN_USING_HDR"
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#endif
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#if defined (SOC_SERIES_STM32F1)
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static const struct stm_baud_rate_tab can_baud_rate_tab[] =
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{
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@ -28,6 +32,19 @@ static const struct stm_baud_rate_tab can_baud_rate_tab[] =
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{CAN20kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 150)},
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{CAN10kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 300)}
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};
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#elif defined (SOC_STM32F429IG)
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static const struct stm_baud_rate_tab can_baud_rate_tab[] =
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{
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{CAN1MBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 3)},
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{CAN800kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_5TQ | 4)},
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{CAN500kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 6)},
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{CAN250kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 12)},
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{CAN125kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 24)},
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{CAN100kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 30)},
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{CAN50kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 60)},
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{CAN20kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 150)},
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{CAN10kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 300)}
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};
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#elif defined (SOC_SERIES_STM32F4)
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static const struct stm_baud_rate_tab can_baud_rate_tab[] =
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{
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@ -80,7 +97,7 @@ void CAN1_TX_IRQHandler(void)
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CAN_HandleTypeDef *hcan;
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hcan = &drv_can1.CanHandle;
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if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0))
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP0))
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{
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK0))
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{
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@ -94,7 +111,7 @@ void CAN1_TX_IRQHandler(void)
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SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP0);
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}
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else if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1))
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else if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP1))
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{
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK1))
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@ -109,7 +126,7 @@ void CAN1_TX_IRQHandler(void)
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SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP1);
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}
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else if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2))
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else if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP2))
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{
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK2))
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@ -134,46 +151,46 @@ void CAN1_RX0_IRQHandler(void)
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{
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rt_interrupt_enter();
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CanRxMsgTypeDef* pRxMsg = NULL;
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CAN_RxHeaderTypeDef *pRxMsg = RT_NULL;
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uint8_t *data = RT_NULL;
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CAN_HandleTypeDef *hcan;
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hcan = &drv_can1.CanHandle;
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/* check FMP0 and get data */
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while (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0) != RESET)
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while ((hcan->Instance->RF0R & CAN_RF0R_FMP0) && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FMPIE0) != RESET)
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{
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/* beigin get data */
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/* Set RxMsg pointer */
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pRxMsg = hcan->pRxMsg;
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pRxMsg = &drv_can1.RxMessage;
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data = drv_can1.RxMessage_Data;
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/* Get the Id */
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pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR;
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pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR;
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if (pRxMsg->IDE == CAN_ID_STD)
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{
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pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR >> 21U);
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pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR >> 21U);
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}
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else
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{
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pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR >> 3U);
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pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR >> 3U);
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}
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pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR;
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pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR;
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/* Get the DLC */
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pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDTR;
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/* Get the FIFONumber */
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pRxMsg->FIFONumber = CAN_FIFO0;
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pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDTR;
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/* Get the FMI */
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pRxMsg->FMI = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDTR >> 8U);
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pRxMsg->FilterMatchIndex = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDTR >> 8U);
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/* Get the data field */
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pRxMsg->Data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR;
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pRxMsg->Data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 8U);
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pRxMsg->Data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 16U);
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pRxMsg->Data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 24U);
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pRxMsg->Data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR;
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pRxMsg->Data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 8U);
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pRxMsg->Data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 16U);
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pRxMsg->Data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 24U);
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data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR;
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data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 8U);
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data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 16U);
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data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 24U);
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data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR;
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data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 8U);
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data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 16U);
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data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 24U);
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/* Release FIFO0 */
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__HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
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SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0);
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/* end get data */
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@ -182,14 +199,14 @@ void CAN1_RX0_IRQHandler(void)
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}
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/* Check Overrun flag for FIFO0 */
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FF0) != RESET)
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FFIE0) != RESET)
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{
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/* Clear FIFO0 FULL Flag */
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__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0);
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}
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/* Check Overrun flag for FIFO0 */
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV0) != RESET)
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FOVIE0) != RESET)
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{
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/* Clear FIFO0 Overrun Flag */
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__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0);
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@ -205,46 +222,46 @@ void CAN1_RX1_IRQHandler(void)
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{
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rt_interrupt_enter();
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CanRxMsgTypeDef* pRxMsg = NULL;
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CAN_RxHeaderTypeDef *pRxMsg = NULL;
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uint8_t *data = RT_NULL;
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CAN_HandleTypeDef *hcan;
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hcan = &drv_can1.CanHandle;
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/* check FMP1 and get data */
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while (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP1) != RESET)
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while ((hcan->Instance->RF1R & CAN_RF1R_FMP1) && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FMPIE1) != RESET)
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{
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/* beigin get data */
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/* Set RxMsg pointer */
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pRxMsg = hcan->pRx1Msg;
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pRxMsg = &drv_can1.Rx1Message;
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data = drv_can1.Rx1Message_Data;
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/* Get the Id */
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pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR;
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pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR;
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if (pRxMsg->IDE == CAN_ID_STD)
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{
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pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR >> 21U);
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pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR >> 21U);
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}
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else
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{
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pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR >> 3U);
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pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR >> 3U);
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}
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pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR;
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pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR;
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/* Get the DLC */
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pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDTR;
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/* Get the FIFONumber */
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pRxMsg->FIFONumber = CAN_FIFO1;
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pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDTR;
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/* Get the FMI */
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pRxMsg->FMI = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDTR >> 8U);
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pRxMsg->FilterMatchIndex = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDTR >> 8U);
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/* Get the data field */
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pRxMsg->Data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR;
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pRxMsg->Data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 8U);
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pRxMsg->Data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 16U);
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pRxMsg->Data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 24U);
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pRxMsg->Data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR;
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pRxMsg->Data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 8U);
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pRxMsg->Data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 16U);
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pRxMsg->Data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 24U);
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data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR;
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data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 8U);
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data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 16U);
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data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 24U);
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data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR;
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data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 8U);
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data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 16U);
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data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 24U);
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/* Release FIFO1 */
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__HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
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SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1);
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/* end get data */
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@ -253,14 +270,14 @@ void CAN1_RX1_IRQHandler(void)
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}
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/* Check Overrun flag for FIFO1 */
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FF1) != RESET)
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FFIE1) != RESET)
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{
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/* Clear FIFO1 FULL Flag */
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__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1);
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}
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/* Check Overrun flag for FIFO1 */
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV1) != RESET)
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FOVIE1) != RESET)
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{
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/* Clear FIFO1 Overrun Flag */
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__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1);
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@ -327,7 +344,7 @@ void CAN2_TX_IRQHandler(void)
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CAN_HandleTypeDef *hcan;
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hcan = &drv_can2.CanHandle;
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if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0))
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP0))
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{
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK0))
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{
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@ -341,7 +358,7 @@ void CAN2_TX_IRQHandler(void)
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SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP0);
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}
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else if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1))
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else if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP1))
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{
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK1))
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@ -356,7 +373,7 @@ void CAN2_TX_IRQHandler(void)
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SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP1);
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}
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else if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2))
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else if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP2))
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{
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if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK2))
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@ -381,46 +398,46 @@ void CAN2_RX0_IRQHandler(void)
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{
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rt_interrupt_enter();
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CanRxMsgTypeDef* pRxMsg = NULL;
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CAN_RxHeaderTypeDef *pRxMsg = RT_NULL;
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uint8_t *data = RT_NULL;
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CAN_HandleTypeDef *hcan;
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hcan = &drv_can2.CanHandle;
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/* check FMP0 and get data */
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while (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0) != RESET)
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while ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FMPIE0) != RESET)
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{
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/* beigin get data */
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/* Set RxMsg pointer */
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pRxMsg = hcan->pRxMsg;
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pRxMsg = &drv_can2.RxMessage;
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data = drv_can2.RxMessage_Data;
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/* Get the Id */
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pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR;
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pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR;
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if (pRxMsg->IDE == CAN_ID_STD)
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{
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pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR >> 21U);
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pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR >> 21U);
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}
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else
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{
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pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR >> 3U);
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pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR >> 3U);
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}
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pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR;
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pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR;
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/* Get the DLC */
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pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDTR;
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/* Get the FIFONumber */
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pRxMsg->FIFONumber = CAN_FIFO0;
|
||||
pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDTR;
|
||||
/* Get the FMI */
|
||||
pRxMsg->FMI = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDTR >> 8U);
|
||||
pRxMsg->FilterMatchIndex = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDTR >> 8U);
|
||||
/* Get the data field */
|
||||
pRxMsg->Data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR;
|
||||
pRxMsg->Data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 8U);
|
||||
pRxMsg->Data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 16U);
|
||||
pRxMsg->Data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 24U);
|
||||
pRxMsg->Data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR;
|
||||
pRxMsg->Data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 8U);
|
||||
pRxMsg->Data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 16U);
|
||||
pRxMsg->Data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 24U);
|
||||
data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR;
|
||||
data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 8U);
|
||||
data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 16U);
|
||||
data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 24U);
|
||||
data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR;
|
||||
data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 8U);
|
||||
data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 16U);
|
||||
data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 24U);
|
||||
|
||||
/* Release FIFO0 */
|
||||
__HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
|
||||
SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0);
|
||||
|
||||
/* end get data */
|
||||
|
||||
|
@ -429,14 +446,14 @@ void CAN2_RX0_IRQHandler(void)
|
|||
}
|
||||
|
||||
/* Check Overrun flag for FIFO0 */
|
||||
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FF0) != RESET)
|
||||
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FFIE0) != RESET)
|
||||
{
|
||||
/* Clear FIFO0 FULL Flag */
|
||||
__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0);
|
||||
}
|
||||
|
||||
/* Check Overrun flag for FIFO0 */
|
||||
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV0) != RESET)
|
||||
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FOVIE0) != RESET)
|
||||
{
|
||||
/* Clear FIFO0 Overrun Flag */
|
||||
__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0);
|
||||
|
@ -452,46 +469,46 @@ void CAN2_RX1_IRQHandler(void)
|
|||
{
|
||||
rt_interrupt_enter();
|
||||
|
||||
CanRxMsgTypeDef* pRxMsg = NULL;
|
||||
CAN_RxHeaderTypeDef *pRxMsg = RT_NULL;
|
||||
uint8_t *data = RT_NULL;
|
||||
CAN_HandleTypeDef *hcan;
|
||||
hcan = &drv_can2.CanHandle;
|
||||
/* check FMP1 and get data */
|
||||
while (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP1) != RESET)
|
||||
while ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FMPIE1) != RESET)
|
||||
{
|
||||
/* beigin get data */
|
||||
|
||||
/* Set RxMsg pointer */
|
||||
pRxMsg = hcan->pRx1Msg;
|
||||
pRxMsg = &drv_can2.Rx1Message;
|
||||
data = drv_can2.Rx1Message_Data;
|
||||
/* Get the Id */
|
||||
pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR;
|
||||
pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR;
|
||||
if (pRxMsg->IDE == CAN_ID_STD)
|
||||
{
|
||||
pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR >> 21U);
|
||||
pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR >> 21U);
|
||||
}
|
||||
else
|
||||
{
|
||||
pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR >> 3U);
|
||||
pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR >> 3U);
|
||||
}
|
||||
|
||||
pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR;
|
||||
pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR;
|
||||
/* Get the DLC */
|
||||
pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDTR;
|
||||
/* Get the FIFONumber */
|
||||
pRxMsg->FIFONumber = CAN_FIFO1;
|
||||
pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDTR;
|
||||
/* Get the FMI */
|
||||
pRxMsg->FMI = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDTR >> 8U);
|
||||
pRxMsg->FilterMatchIndex = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDTR >> 8U);
|
||||
/* Get the data field */
|
||||
pRxMsg->Data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR;
|
||||
pRxMsg->Data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 8U);
|
||||
pRxMsg->Data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 16U);
|
||||
pRxMsg->Data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 24U);
|
||||
pRxMsg->Data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR;
|
||||
pRxMsg->Data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 8U);
|
||||
pRxMsg->Data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 16U);
|
||||
pRxMsg->Data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 24U);
|
||||
data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR;
|
||||
data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 8U);
|
||||
data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 16U);
|
||||
data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 24U);
|
||||
data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR;
|
||||
data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 8U);
|
||||
data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 16U);
|
||||
data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 24U);
|
||||
|
||||
/* Release FIFO1 */
|
||||
__HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
|
||||
SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1);
|
||||
|
||||
/* end get data */
|
||||
|
||||
|
@ -500,14 +517,14 @@ void CAN2_RX1_IRQHandler(void)
|
|||
}
|
||||
|
||||
/* Check Overrun flag for FIFO1 */
|
||||
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FF1) != RESET)
|
||||
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FFIE1) != RESET)
|
||||
{
|
||||
/* Clear FIFO1 FULL Flag */
|
||||
__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1);
|
||||
}
|
||||
|
||||
/* Check Overrun flag for FIFO1 */
|
||||
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV1) != RESET)
|
||||
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FOVIE1) != RESET)
|
||||
{
|
||||
/* Clear FIFO1 Overrun Flag */
|
||||
__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1);
|
||||
|
@ -570,16 +587,16 @@ void CAN2_SCE_IRQHandler(void)
|
|||
*/
|
||||
void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
|
||||
{
|
||||
__HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG |
|
||||
CAN_IT_EPV |
|
||||
CAN_IT_BOF |
|
||||
CAN_IT_LEC |
|
||||
CAN_IT_ERR |
|
||||
CAN_IT_FMP0|
|
||||
CAN_IT_FOV0|
|
||||
CAN_IT_FMP1|
|
||||
CAN_IT_FOV1|
|
||||
CAN_IT_TME);
|
||||
__HAL_CAN_ENABLE_IT(hcan, CAN_IER_EWGIE |
|
||||
CAN_IER_EPVIE |
|
||||
CAN_IER_BOFIE |
|
||||
CAN_IER_LECIE |
|
||||
CAN_IER_ERRIE |
|
||||
CAN_IER_FMPIE0 |
|
||||
CAN_IER_FOVIE0 |
|
||||
CAN_IER_FMPIE1 |
|
||||
CAN_IER_FOVIE1 |
|
||||
CAN_IER_TMEIE);
|
||||
}
|
||||
|
||||
static rt_err_t drv_configure(struct rt_can_device *dev_can,
|
||||
|
@ -588,7 +605,7 @@ static rt_err_t drv_configure(struct rt_can_device *dev_can,
|
|||
struct stm32_drv_can *drv_can;
|
||||
rt_uint32_t baud_index;
|
||||
CAN_InitTypeDef *drv_init;
|
||||
CAN_FilterConfTypeDef *filterConf;
|
||||
CAN_FilterTypeDef *filterConf;
|
||||
|
||||
RT_ASSERT(dev_can);
|
||||
RT_ASSERT(cfg);
|
||||
|
@ -596,12 +613,12 @@ static rt_err_t drv_configure(struct rt_can_device *dev_can,
|
|||
drv_can = (struct stm32_drv_can *)dev_can->parent.user_data;
|
||||
drv_init = &drv_can->CanHandle.Init;
|
||||
|
||||
drv_init->TTCM = DISABLE;
|
||||
drv_init->ABOM = DISABLE;
|
||||
drv_init->AWUM = DISABLE;
|
||||
drv_init->NART = DISABLE;
|
||||
drv_init->RFLM = DISABLE;
|
||||
drv_init->TXFP = DISABLE;
|
||||
drv_init->TimeTriggeredMode = DISABLE;
|
||||
drv_init->AutoBusOff = DISABLE;
|
||||
drv_init->AutoWakeUp = DISABLE;
|
||||
drv_init->AutoRetransmission = ENABLE;
|
||||
drv_init->ReceiveFifoLocked = DISABLE;
|
||||
drv_init->TransmitFifoPriority = DISABLE;
|
||||
|
||||
switch (cfg->mode)
|
||||
{
|
||||
|
@ -620,27 +637,31 @@ static rt_err_t drv_configure(struct rt_can_device *dev_can,
|
|||
}
|
||||
|
||||
baud_index = get_can_baud_index(cfg->baud_rate);
|
||||
drv_init->SJW = BAUD_DATA(SJW, baud_index);
|
||||
drv_init->BS1 = BAUD_DATA(BS1, baud_index);
|
||||
drv_init->BS2 = BAUD_DATA(BS2, baud_index);
|
||||
drv_init->SyncJumpWidth = BAUD_DATA(SJW, baud_index);
|
||||
drv_init->TimeSeg1 = BAUD_DATA(BS1, baud_index);
|
||||
drv_init->TimeSeg2 = BAUD_DATA(BS2, baud_index);
|
||||
drv_init->Prescaler = BAUD_DATA(RRESCL, baud_index);
|
||||
if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
if (HAL_CAN_Start(&drv_can->CanHandle) != HAL_OK)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
|
||||
/* Filter conf */
|
||||
filterConf = &drv_can->FilterConfig;
|
||||
filterConf->FilterNumber = 0;
|
||||
filterConf->FilterBank = 0;
|
||||
filterConf->FilterMode = CAN_FILTERMODE_IDMASK;
|
||||
filterConf->FilterScale = CAN_FILTERSCALE_32BIT;
|
||||
filterConf->FilterIdHigh = 0x0000;
|
||||
filterConf->FilterIdLow = 0x0000;
|
||||
filterConf->FilterMaskIdHigh = 0x0000;
|
||||
filterConf->FilterMaskIdLow = 0x0000;
|
||||
filterConf->FilterFIFOAssignment = CAN_FIFO0;
|
||||
filterConf->FilterFIFOAssignment = CAN_FILTER_FIFO0;
|
||||
filterConf->FilterActivation = ENABLE;
|
||||
filterConf->BankNumber = 14;
|
||||
filterConf->SlaveStartFilterBank = 14;
|
||||
HAL_CAN_ConfigFilter(&drv_can->CanHandle, filterConf);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
@ -659,7 +680,8 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg)
|
|||
argval = (rt_uint32_t) arg;
|
||||
if (argval == RT_DEVICE_FLAG_INT_RX)
|
||||
{
|
||||
if (CAN1 == drv_can->CanHandle.Instance) {
|
||||
if (CAN1 == drv_can->CanHandle.Instance)
|
||||
{
|
||||
HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn);
|
||||
HAL_NVIC_DisableIRQ(CAN1_RX1_IRQn);
|
||||
}
|
||||
|
@ -670,12 +692,12 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg)
|
|||
HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn);
|
||||
}
|
||||
#endif
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FMP0);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FF0 );
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FOV0);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FMP1);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FF1 );
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FOV1);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FMPIE0);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FFIE0);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FOVIE0);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FMPIE1);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FFIE1);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FOVIE1);
|
||||
}
|
||||
else if (argval == RT_DEVICE_FLAG_INT_TX)
|
||||
{
|
||||
|
@ -689,7 +711,7 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg)
|
|||
HAL_NVIC_DisableIRQ(CAN2_TX_IRQn);
|
||||
}
|
||||
#endif
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_TME);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_TMEIE);
|
||||
}
|
||||
else if (argval == RT_DEVICE_CAN_INT_ERR)
|
||||
{
|
||||
|
@ -703,21 +725,21 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg)
|
|||
NVIC_DisableIRQ(CAN2_SCE_IRQn);
|
||||
}
|
||||
#endif
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_BOF);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_LEC);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_ERR);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_BOFIE);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_LECIE);
|
||||
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_ERRIE);
|
||||
}
|
||||
break;
|
||||
case RT_DEVICE_CTRL_SET_INT:
|
||||
argval = (rt_uint32_t) arg;
|
||||
if (argval == RT_DEVICE_FLAG_INT_RX)
|
||||
{
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FMP0);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FF0);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FOV0);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FMP1);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FF1);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FOV1);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FMPIE0);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FFIE0);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FOVIE0);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FMPIE1);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FFIE1);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FOVIE1);
|
||||
|
||||
if (CAN1 == drv_can->CanHandle.Instance)
|
||||
{
|
||||
|
@ -738,7 +760,7 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg)
|
|||
}
|
||||
else if (argval == RT_DEVICE_FLAG_INT_TX)
|
||||
{
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_TME);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_TMEIE);
|
||||
|
||||
if (CAN1 == drv_can->CanHandle.Instance)
|
||||
{
|
||||
|
@ -755,9 +777,9 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg)
|
|||
}
|
||||
else if (argval == RT_DEVICE_CAN_INT_ERR)
|
||||
{
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_BOF);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_LEC);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_ERR);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_BOFIE);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_LECIE);
|
||||
__HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_ERRIE);
|
||||
|
||||
if (CAN1 == drv_can->CanHandle.Instance)
|
||||
{
|
||||
|
@ -788,10 +810,18 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg)
|
|||
if (argval != can->config.mode)
|
||||
{
|
||||
can->config.mode = argval;
|
||||
if (HAL_CAN_Stop(&drv_can->CanHandle) != HAL_OK)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
if (HAL_CAN_Start(&drv_can->CanHandle) != HAL_OK)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case RT_CAN_CMD_SET_BAUD:
|
||||
|
@ -814,22 +844,30 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg)
|
|||
rt_uint32_t baud_index;
|
||||
can->config.baud_rate = argval;
|
||||
drv_init = &drv_can->CanHandle.Init;
|
||||
drv_init->TTCM = DISABLE;
|
||||
drv_init->ABOM = DISABLE;
|
||||
drv_init->AWUM = DISABLE;
|
||||
drv_init->NART = DISABLE;
|
||||
drv_init->RFLM = DISABLE;
|
||||
drv_init->TXFP = DISABLE;
|
||||
drv_init->TimeTriggeredMode = DISABLE;
|
||||
drv_init->AutoBusOff = DISABLE;
|
||||
drv_init->AutoWakeUp = DISABLE;
|
||||
drv_init->AutoRetransmission = ENABLE;
|
||||
drv_init->ReceiveFifoLocked = DISABLE;
|
||||
drv_init->TransmitFifoPriority = DISABLE;
|
||||
baud_index = get_can_baud_index(can->config.baud_rate);
|
||||
drv_init->SJW = BAUD_DATA(SJW, baud_index);
|
||||
drv_init->BS1 = BAUD_DATA(BS1, baud_index);
|
||||
drv_init->BS2 = BAUD_DATA(BS2, baud_index);
|
||||
drv_init->SyncJumpWidth = BAUD_DATA(SJW, baud_index);
|
||||
drv_init->TimeSeg1 = BAUD_DATA(BS1, baud_index);
|
||||
drv_init->TimeSeg2 = BAUD_DATA(BS2, baud_index);
|
||||
drv_init->Prescaler = BAUD_DATA(RRESCL, baud_index);
|
||||
|
||||
if (HAL_CAN_Stop(&drv_can->CanHandle) != HAL_OK)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
if (HAL_CAN_Start(&drv_can->CanHandle) != HAL_OK)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case RT_CAN_CMD_SET_PRIV:
|
||||
|
@ -842,10 +880,18 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg)
|
|||
if (argval != can->config.privmode)
|
||||
{
|
||||
can->config.privmode = argval;
|
||||
if (HAL_CAN_Stop(&drv_can->CanHandle) != HAL_OK)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
if (HAL_CAN_Start(&drv_can->CanHandle) != HAL_OK)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case RT_CAN_CMD_GET_STATUS:
|
||||
|
@ -869,13 +915,15 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg)
|
|||
static int drv_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t boxno)
|
||||
{
|
||||
CAN_HandleTypeDef *hcan = RT_NULL;
|
||||
CAN_TxHeaderTypeDef *pTxMsg = RT_NULL;
|
||||
hcan = &((struct stm32_drv_can *) can->parent.user_data)->CanHandle;
|
||||
pTxMsg = &((struct stm32_drv_can *) can->parent.user_data)->TxMessage;
|
||||
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
|
||||
|
||||
/*check Select mailbox is empty */
|
||||
switch (boxno)
|
||||
{
|
||||
case CAN_TXMAILBOX_0:
|
||||
case 0:
|
||||
if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME0) != SET)
|
||||
{
|
||||
/* Change CAN state */
|
||||
|
@ -884,7 +932,7 @@ static int drv_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t b
|
|||
return -RT_ERROR;
|
||||
}
|
||||
break;
|
||||
case CAN_TXMAILBOX_1:
|
||||
case 1:
|
||||
if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME1) != SET)
|
||||
{
|
||||
/* Change CAN state */
|
||||
|
@ -893,7 +941,7 @@ static int drv_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t b
|
|||
return -RT_ERROR;
|
||||
}
|
||||
break;
|
||||
case CAN_TXMAILBOX_2:
|
||||
case 2:
|
||||
if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME2) != SET)
|
||||
{
|
||||
/* Change CAN state */
|
||||
|
@ -910,68 +958,59 @@ static int drv_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t b
|
|||
/* check id type */
|
||||
if (RT_CAN_STDID == pmsg->ide)
|
||||
{
|
||||
hcan->pTxMsg->IDE = CAN_ID_STD;
|
||||
hcan->pTxMsg->StdId = pmsg->id;
|
||||
hcan->pTxMsg->ExtId = 0xFFFFFFFFU;
|
||||
pTxMsg->IDE = CAN_ID_STD;
|
||||
pTxMsg->StdId = pmsg->id;
|
||||
pTxMsg->ExtId = 0xFFFFFFFFU;
|
||||
}
|
||||
else if (RT_CAN_EXTID == pmsg->ide)
|
||||
{
|
||||
hcan->pTxMsg->IDE = CAN_ID_EXT;
|
||||
hcan->pTxMsg->StdId = 0xFFFFFFFFU;
|
||||
hcan->pTxMsg->ExtId = pmsg->id;
|
||||
pTxMsg->IDE = CAN_ID_EXT;
|
||||
pTxMsg->StdId = 0xFFFFFFFFU;
|
||||
pTxMsg->ExtId = pmsg->id;
|
||||
}
|
||||
|
||||
/* check frame type */
|
||||
if (RT_CAN_DTR == pmsg->rtr)
|
||||
{
|
||||
hcan->pTxMsg->RTR = CAN_RTR_DATA;
|
||||
pTxMsg->RTR = CAN_RTR_DATA;
|
||||
}
|
||||
else if (RT_CAN_RTR == pmsg->rtr)
|
||||
{
|
||||
hcan->pTxMsg->RTR = CAN_RTR_REMOTE;
|
||||
pTxMsg->RTR = CAN_RTR_REMOTE;
|
||||
}
|
||||
|
||||
hcan->pTxMsg->DLC = pmsg->len;
|
||||
/* copy user data to hcan */
|
||||
hcan->pTxMsg->Data[0] = pmsg->data[0];
|
||||
hcan->pTxMsg->Data[1] = pmsg->data[1];
|
||||
hcan->pTxMsg->Data[2] = pmsg->data[2];
|
||||
hcan->pTxMsg->Data[3] = pmsg->data[3];
|
||||
hcan->pTxMsg->Data[4] = pmsg->data[4];
|
||||
hcan->pTxMsg->Data[5] = pmsg->data[5];
|
||||
hcan->pTxMsg->Data[6] = pmsg->data[6];
|
||||
hcan->pTxMsg->Data[7] = pmsg->data[7];
|
||||
pTxMsg->DLC = pmsg->len;
|
||||
|
||||
/* clear TIR */
|
||||
hcan->Instance->sTxMailBox[boxno].TIR &= CAN_TI0R_TXRQ;
|
||||
/* Set up the Id */
|
||||
if (hcan->pTxMsg->IDE == CAN_ID_STD)
|
||||
if (pTxMsg->IDE == CAN_ID_STD)
|
||||
{
|
||||
assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
|
||||
hcan->Instance->sTxMailBox[boxno].TIR |= ((hcan->pTxMsg->StdId << CAN_TI0R_STID_Pos) | \
|
||||
hcan->pTxMsg->RTR);
|
||||
hcan->Instance->sTxMailBox[boxno].TIR |= ((pTxMsg->StdId << CAN_TI0R_STID_Pos) | \
|
||||
pTxMsg->RTR);
|
||||
}
|
||||
else
|
||||
{
|
||||
assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
|
||||
hcan->Instance->sTxMailBox[boxno].TIR |= ((hcan->pTxMsg->ExtId << CAN_TI0R_EXID_Pos) | \
|
||||
hcan->pTxMsg->IDE |
|
||||
hcan->pTxMsg->RTR);
|
||||
hcan->Instance->sTxMailBox[boxno].TIR |= (pTxMsg->ExtId << CAN_TI0R_EXID_Pos) | \
|
||||
pTxMsg->IDE |
|
||||
pTxMsg->RTR;
|
||||
}
|
||||
/* Set up the DLC */
|
||||
hcan->pTxMsg->DLC &= (uint8_t)0x0000000FU;
|
||||
pTxMsg->DLC &= (uint8_t)0x0000000FU;
|
||||
hcan->Instance->sTxMailBox[boxno].TDTR &= 0xFFFFFFF0U;
|
||||
hcan->Instance->sTxMailBox[boxno].TDTR |= hcan->pTxMsg->DLC;
|
||||
hcan->Instance->sTxMailBox[boxno].TDTR |= pTxMsg->DLC;
|
||||
|
||||
/* Set up the data field */
|
||||
WRITE_REG(hcan->Instance->sTxMailBox[boxno].TDLR, ((uint32_t)hcan->pTxMsg->Data[3U] << CAN_TDL0R_DATA3_Pos) |
|
||||
((uint32_t)hcan->pTxMsg->Data[2U] << CAN_TDL0R_DATA2_Pos) |
|
||||
((uint32_t)hcan->pTxMsg->Data[1U] << CAN_TDL0R_DATA1_Pos) |
|
||||
((uint32_t)hcan->pTxMsg->Data[0U] << CAN_TDL0R_DATA0_Pos));
|
||||
WRITE_REG(hcan->Instance->sTxMailBox[boxno].TDHR, ((uint32_t)hcan->pTxMsg->Data[7U] << CAN_TDL0R_DATA3_Pos) |
|
||||
((uint32_t)hcan->pTxMsg->Data[6U] << CAN_TDL0R_DATA2_Pos) |
|
||||
((uint32_t)hcan->pTxMsg->Data[5U] << CAN_TDL0R_DATA1_Pos) |
|
||||
((uint32_t)hcan->pTxMsg->Data[4U] << CAN_TDL0R_DATA0_Pos));
|
||||
WRITE_REG(hcan->Instance->sTxMailBox[boxno].TDLR, ((uint32_t)pmsg->data[3U] << CAN_TDL0R_DATA3_Pos) |
|
||||
((uint32_t)pmsg->data[2U] << CAN_TDL0R_DATA2_Pos) |
|
||||
((uint32_t)pmsg->data[1U] << CAN_TDL0R_DATA1_Pos) |
|
||||
((uint32_t)pmsg->data[0U] << CAN_TDL0R_DATA0_Pos));
|
||||
WRITE_REG(hcan->Instance->sTxMailBox[boxno].TDHR, ((uint32_t)pmsg->data[7U] << CAN_TDL0R_DATA3_Pos) |
|
||||
((uint32_t)pmsg->data[6U] << CAN_TDL0R_DATA2_Pos) |
|
||||
((uint32_t)pmsg->data[5U] << CAN_TDL0R_DATA1_Pos) |
|
||||
((uint32_t)pmsg->data[4U] << CAN_TDL0R_DATA0_Pos));
|
||||
|
||||
/* Request transmission */
|
||||
hcan->Instance->sTxMailBox[boxno].TIR |= CAN_TI0R_TXRQ;
|
||||
|
@ -981,19 +1020,20 @@ static int drv_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t b
|
|||
|
||||
static int drv_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno)
|
||||
{
|
||||
CAN_HandleTypeDef *hcan;
|
||||
CAN_RxHeaderTypeDef *pRxMsg = RT_NULL;
|
||||
uint8_t *data = RT_NULL;
|
||||
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
|
||||
hcan = &((struct stm32_drv_can *) can->parent.user_data)->CanHandle;
|
||||
CanRxMsgTypeDef *pRxMsg = RT_NULL;
|
||||
|
||||
/* get FIFO */
|
||||
switch (boxno)
|
||||
{
|
||||
case CAN_FIFO0:
|
||||
pRxMsg = hcan->pRxMsg;
|
||||
case CAN_RX_FIFO0:
|
||||
pRxMsg = &((struct stm32_drv_can *) can->parent.user_data)->RxMessage;
|
||||
data = ((struct stm32_drv_can *) can->parent.user_data)->RxMessage_Data;
|
||||
break;
|
||||
case CAN_FIFO1:
|
||||
pRxMsg = hcan->pRx1Msg;
|
||||
case CAN_RX_FIFO1:
|
||||
pRxMsg = &((struct stm32_drv_can *) can->parent.user_data)->Rx1Message;
|
||||
data = ((struct stm32_drv_can *) can->parent.user_data)->Rx1Message_Data;
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(0);
|
||||
|
@ -1024,16 +1064,16 @@ static int drv_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno)
|
|||
/* get len */
|
||||
pmsg->len = pRxMsg->DLC;
|
||||
/* get hdr */
|
||||
pmsg->hdr = pRxMsg->FMI;
|
||||
pmsg->hdr = pRxMsg->FilterMatchIndex;
|
||||
/* get data */
|
||||
pmsg->data[0] = pRxMsg->Data[0];
|
||||
pmsg->data[1] = pRxMsg->Data[1];
|
||||
pmsg->data[2] = pRxMsg->Data[2];
|
||||
pmsg->data[3] = pRxMsg->Data[3];
|
||||
pmsg->data[4] = pRxMsg->Data[4];
|
||||
pmsg->data[5] = pRxMsg->Data[5];
|
||||
pmsg->data[6] = pRxMsg->Data[6];
|
||||
pmsg->data[7] = pRxMsg->Data[7];
|
||||
pmsg->data[0] = data[0];
|
||||
pmsg->data[1] = data[1];
|
||||
pmsg->data[2] = data[2];
|
||||
pmsg->data[3] = data[3];
|
||||
pmsg->data[4] = data[4];
|
||||
pmsg->data[5] = data[5];
|
||||
pmsg->data[6] = data[6];
|
||||
pmsg->data[7] = data[7];
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
|
@ -1063,9 +1103,6 @@ int rt_hw_can_init(void)
|
|||
#ifdef BSP_USING_CAN1
|
||||
drv_can = &drv_can1;
|
||||
drv_can->CanHandle.Instance = CAN1;
|
||||
drv_can->CanHandle.pTxMsg = &drv_can->TxMessage;
|
||||
drv_can->CanHandle.pRxMsg = &drv_can->RxMessage;
|
||||
drv_can->CanHandle.pRx1Msg = &drv_can->Rx1Message;
|
||||
dev_can1.ops = &drv_can_ops;
|
||||
dev_can1.config = config;
|
||||
/* register CAN1 device */
|
||||
|
@ -1077,9 +1114,6 @@ int rt_hw_can_init(void)
|
|||
#ifdef BSP_USING_CAN2
|
||||
drv_can = &drv_can2;
|
||||
drv_can->CanHandle.Instance = CAN2;
|
||||
drv_can->CanHandle.pTxMsg = &drv_can->TxMessage;
|
||||
drv_can->CanHandle.pRxMsg = &drv_can->RxMessage;
|
||||
drv_can->CanHandle.pRx1Msg = &drv_can->Rx1Message;
|
||||
dev_can2.ops = &drv_can_ops;
|
||||
dev_can2.config = config;
|
||||
/* register CAN2 device */
|
||||
|
|
|
@ -36,10 +36,12 @@ struct stm_baud_rate_tab
|
|||
struct stm32_drv_can
|
||||
{
|
||||
CAN_HandleTypeDef CanHandle;
|
||||
CanTxMsgTypeDef TxMessage;
|
||||
CanRxMsgTypeDef RxMessage;
|
||||
CanRxMsgTypeDef Rx1Message;
|
||||
CAN_FilterConfTypeDef FilterConfig;
|
||||
CAN_TxHeaderTypeDef TxMessage;
|
||||
CAN_RxHeaderTypeDef RxMessage;
|
||||
uint8_t RxMessage_Data[8];
|
||||
CAN_RxHeaderTypeDef Rx1Message;
|
||||
uint8_t Rx1Message_Data[8];
|
||||
CAN_FilterTypeDef FilterConfig;
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
|
|
@ -48,7 +48,7 @@ config RT_USING_CAN
|
|||
if RT_USING_CAN
|
||||
config RT_CAN_USING_HDR
|
||||
bool "Enable CAN hardware filter"
|
||||
default y
|
||||
default n
|
||||
endif
|
||||
|
||||
config RT_USING_HWTIMER
|
||||
|
|
Loading…
Reference in New Issue