From 537c2376f955718b0c0e9d0dfbd9d7cf530fe9bc Mon Sep 17 00:00:00 2001 From: zhangjun1996 <2281979437@qq.com> Date: Sat, 15 Jun 2019 11:52:11 +0800 Subject: [PATCH 1/4] =?UTF-8?q?1=EF=BC=8C=E4=BF=AE=E5=A4=8D=E7=94=B1?= =?UTF-8?q?=E4=BA=8Estm32=E7=B3=BB=E5=88=97=E7=9A=84hal=E5=BA=93=E5=8D=87?= =?UTF-8?q?=E7=BA=A7=E5=AF=BC=E8=87=B4stm32f1=E5=92=8Cstm32f4=E5=B9=B3?= =?UTF-8?q?=E5=8F=B0=E7=9A=84can=E9=A9=B1=E5=8A=A8=E7=BC=96=E8=AF=91?= =?UTF-8?q?=E9=94=99=E8=AF=AF=202=EF=BC=8C=E5=85=B3=E9=97=ADcomponents/dri?= =?UTF-8?q?vers/Kconfig=E4=B8=AD=E9=BB=98=E8=AE=A4=E6=89=93=E5=BC=80?= =?UTF-8?q?=E7=9A=84can=E7=A1=AC=E4=BB=B6=E6=BB=A4=E6=B3=A2=E5=99=A8?= =?UTF-8?q?=E9=80=89=E9=A1=B9=203=EF=BC=8C=E4=B8=BA=E4=BA=86=E8=AE=A9can?= =?UTF-8?q?=E6=B3=A2=E7=89=B9=E7=8E=87=E8=AE=BE=E7=BD=AE=E5=8C=B9=E9=85=8D?= =?UTF-8?q?stm32f429=E7=9A=84=E6=97=B6=E9=92=9F=EF=BC=8C=E7=BB=99stm32f429?= =?UTF-8?q?=E5=A2=9E=E5=8A=A0=E6=B3=A2=E7=89=B9=E7=8E=87=E8=A1=A8=204?= =?UTF-8?q?=EF=BC=8C=E4=BB=A5=E4=B8=8A=E4=BF=AE=E5=A4=8D=E5=9C=A8stm32f103?= =?UTF-8?q?-fire-arbitrary=EF=BC=8Cstm32f407-atk-explorer=EF=BC=8Cstm32f42?= =?UTF-8?q?9-atk-apollo=E4=B8=89=E4=B8=AAbsp=E4=B8=AD=E6=B5=8B=E8=AF=95?= =?UTF-8?q?=E9=80=9A=E8=BF=87?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/stm32/libraries/HAL_Drivers/drv_can.c | 666 +++++++++++----------- bsp/stm32/libraries/HAL_Drivers/drv_can.h | 10 +- components/drivers/Kconfig | 2 +- 3 files changed, 343 insertions(+), 335 deletions(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_can.c b/bsp/stm32/libraries/HAL_Drivers/drv_can.c index b19de53864..2a48985c43 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_can.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_can.c @@ -7,7 +7,7 @@ * Date Author Notes * 2018-08-05 Xeon Xu the first version * 2019-01-22 YLZ port from stm324xx-HAL to bsp stm3210x-HAL - * 2019-02-19 YLZ add support EXTID RTR Frame. modify send, recv functions. + * 2019-02-19 YLZ add support EXTID RTR Frame. modify send, recv functions. * fix bug.port to BSP [stm32] */ @@ -18,28 +18,41 @@ #if defined (SOC_SERIES_STM32F1) static const struct stm_baud_rate_tab can_baud_rate_tab[] = { - {CAN1MBaud , (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 3)}, + {CAN1MBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 3)}, {CAN800kBaud, (CAN_SJW_2TQ | CAN_BS1_5TQ | CAN_BS2_3TQ | 5)}, {CAN500kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 6)}, {CAN250kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 12)}, {CAN125kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 24)}, {CAN100kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 30)}, - {CAN50kBaud , (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 60)}, - {CAN20kBaud , (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 150)}, - {CAN10kBaud , (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 300)} + {CAN50kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 60)}, + {CAN20kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 150)}, + {CAN10kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_3TQ | 300)} +}; +#elif defined (SOC_STM32F429IG) +static const struct stm_baud_rate_tab can_baud_rate_tab[] = +{ + {CAN1MBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 3)}, + {CAN800kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_5TQ | 4)}, + {CAN500kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 6)}, + {CAN250kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 12)}, + {CAN125kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 24)}, + {CAN100kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 30)}, + {CAN50kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 60)}, + {CAN20kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 150)}, + {CAN10kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 300)} }; #elif defined (SOC_SERIES_STM32F4) static const struct stm_baud_rate_tab can_baud_rate_tab[] = { - {CAN1MBaud , (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 3)}, + {CAN1MBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 3)}, {CAN800kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_4TQ | 4)}, {CAN500kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 6)}, {CAN250kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 12)}, {CAN125kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 24)}, {CAN100kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 30)}, - {CAN50kBaud , (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 60)}, - {CAN20kBaud , (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 150)}, - {CAN10kBaud , (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 300)} + {CAN50kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 60)}, + {CAN20kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 150)}, + {CAN10kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_4TQ | 300)} }; #endif @@ -53,16 +66,16 @@ static rt_uint32_t get_can_baud_index(rt_uint32_t baud) len = sizeof(can_baud_rate_tab) / sizeof(can_baud_rate_tab[0]); default_index = len; - for(index = 0; index < len; index++) + for (index = 0; index < len; index++) { - if(can_baud_rate_tab[index].baud_rate == baud) + if (can_baud_rate_tab[index].baud_rate == baud) return index; - if(can_baud_rate_tab[index].baud_rate == 1000UL * 250) + if (can_baud_rate_tab[index].baud_rate == 1000UL * 250) default_index = index; } - if(default_index != len) + if (default_index != len) return default_index; return 0; @@ -79,8 +92,8 @@ void CAN1_TX_IRQHandler(void) rt_interrupt_enter(); CAN_HandleTypeDef *hcan; hcan = &drv_can1.CanHandle; - - if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0)) + + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP0)) { if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK0)) { @@ -94,9 +107,9 @@ void CAN1_TX_IRQHandler(void) SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP0); } - else if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1)) + else if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP1)) { - + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK1)) { rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_TX_DONE | 1 << 8); @@ -108,10 +121,10 @@ void CAN1_TX_IRQHandler(void) /* Write 0 to Clear transmission status flag RQCPx */ SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP1); } - - else if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2)) + + else if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP2)) { - + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK2)) { rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_TX_DONE | 2 << 8); @@ -120,7 +133,7 @@ void CAN1_TX_IRQHandler(void) { rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_TX_FAIL | 2 << 8); } - /* Write 0 to Clear transmission status flag RQCPx */ + /* Write 0 to Clear transmission status flag RQCPx */ SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP2); } @@ -133,63 +146,63 @@ void CAN1_TX_IRQHandler(void) void CAN1_RX0_IRQHandler(void) { rt_interrupt_enter(); - - CanRxMsgTypeDef* pRxMsg = NULL; + + CAN_RxHeaderTypeDef *pRxMsg = RT_NULL; + uint8_t *data = RT_NULL; CAN_HandleTypeDef *hcan; hcan = &drv_can1.CanHandle; /* check FMP0 and get data */ - while (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0) != RESET) + while ((hcan->Instance->RF0R & CAN_RF0R_FMP0) && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FMPIE0) != RESET) { /* beigin get data */ - + /* Set RxMsg pointer */ - pRxMsg = hcan->pRxMsg; - /* Get the Id */ - pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR; + pRxMsg = &drv_can1.RxMessage; + data = drv_can1.RxMessage_Data; + /* Get the Id */ + pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR; if (pRxMsg->IDE == CAN_ID_STD) { - pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR >> 21U); + pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR >> 21U); } else { - pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR >> 3U); + pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR >> 3U); } - - pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR; + + pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR; /* Get the DLC */ - pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDTR; - /* Get the FIFONumber */ - pRxMsg->FIFONumber = CAN_FIFO0; + pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDTR; /* Get the FMI */ - pRxMsg->FMI = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDTR >> 8U); + pRxMsg->FilterMatchIndex = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDTR >> 8U); /* Get the data field */ - pRxMsg->Data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR; - pRxMsg->Data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 8U); - pRxMsg->Data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 16U); - pRxMsg->Data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 24U); - pRxMsg->Data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR; - pRxMsg->Data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 8U); - pRxMsg->Data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 16U); - pRxMsg->Data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 24U); - + data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR; + data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 8U); + data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 16U); + data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 24U); + data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR; + data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 8U); + data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 16U); + data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 24U); + /* Release FIFO0 */ - __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0); - + SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); + /* end get data */ /* save to user fifo */ rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_RX_IND | 0 << 8); } - + /* Check Overrun flag for FIFO0 */ - if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FF0) != RESET) + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FFIE0) != RESET) { /* Clear FIFO0 FULL Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); } - + /* Check Overrun flag for FIFO0 */ - if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV0) != RESET) + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FOVIE0) != RESET) { /* Clear FIFO0 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); @@ -204,63 +217,63 @@ void CAN1_RX0_IRQHandler(void) void CAN1_RX1_IRQHandler(void) { rt_interrupt_enter(); - - CanRxMsgTypeDef* pRxMsg = NULL; + + CAN_RxHeaderTypeDef *pRxMsg = NULL; + uint8_t *data = RT_NULL; CAN_HandleTypeDef *hcan; hcan = &drv_can1.CanHandle; /* check FMP1 and get data */ - while (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP1) != RESET) + while ((hcan->Instance->RF1R & CAN_RF1R_FMP1) && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FMPIE1) != RESET) { /* beigin get data */ - + /* Set RxMsg pointer */ - pRxMsg = hcan->pRx1Msg; - /* Get the Id */ - pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR; + pRxMsg = &drv_can1.Rx1Message; + data = drv_can1.Rx1Message_Data; + /* Get the Id */ + pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR; if (pRxMsg->IDE == CAN_ID_STD) { - pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR >> 21U); + pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR >> 21U); } else { - pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR >> 3U); + pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR >> 3U); } - - pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR; + + pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR; /* Get the DLC */ - pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDTR; - /* Get the FIFONumber */ - pRxMsg->FIFONumber = CAN_FIFO1; + pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDTR; /* Get the FMI */ - pRxMsg->FMI = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDTR >> 8U); + pRxMsg->FilterMatchIndex = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDTR >> 8U); /* Get the data field */ - pRxMsg->Data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR; - pRxMsg->Data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 8U); - pRxMsg->Data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 16U); - pRxMsg->Data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 24U); - pRxMsg->Data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR; - pRxMsg->Data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 8U); - pRxMsg->Data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 16U); - pRxMsg->Data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 24U); - + data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR; + data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 8U); + data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 16U); + data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 24U); + data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR; + data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 8U); + data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 16U); + data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 24U); + /* Release FIFO1 */ - __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1); - + SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); + /* end get data */ /* save to user fifo */ rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_RX_IND | 1 << 8); } - + /* Check Overrun flag for FIFO1 */ - if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FF1) != RESET) + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FFIE1) != RESET) { /* Clear FIFO1 FULL Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); } - + /* Check Overrun flag for FIFO1 */ - if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV1) != RESET) + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FOVIE1) != RESET) { /* Clear FIFO1 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); @@ -326,8 +339,8 @@ void CAN2_TX_IRQHandler(void) rt_interrupt_enter(); CAN_HandleTypeDef *hcan; hcan = &drv_can2.CanHandle; - - if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0)) + + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP0)) { if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK0)) { @@ -337,13 +350,13 @@ void CAN2_TX_IRQHandler(void) { rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_TX_FAIL | 0 << 8); } - /* Write 0 to Clear transmission status flag RQCPx */ + /* Write 0 to Clear transmission status flag RQCPx */ SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP0); } - else if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1)) + else if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP1)) { - + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK1)) { rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_TX_DONE | 1 << 8); @@ -355,10 +368,10 @@ void CAN2_TX_IRQHandler(void) /* Write 0 to Clear transmission status flag RQCPx */ SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP1); } - - else if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2)) + + else if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP2)) { - + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK2)) { rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_TX_DONE | 2 << 8); @@ -367,7 +380,7 @@ void CAN2_TX_IRQHandler(void) { rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_TX_FAIL | 2 << 8); } - /* Write 0 to Clear transmission status flag RQCPx */ + /* Write 0 to Clear transmission status flag RQCPx */ SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP2); } @@ -380,63 +393,63 @@ void CAN2_TX_IRQHandler(void) void CAN2_RX0_IRQHandler(void) { rt_interrupt_enter(); - - CanRxMsgTypeDef* pRxMsg = NULL; + + CAN_RxHeaderTypeDef *pRxMsg = RT_NULL; + uint8_t *data = RT_NULL; CAN_HandleTypeDef *hcan; hcan = &drv_can2.CanHandle; /* check FMP0 and get data */ - while (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0) != RESET) + while ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FMPIE0) != RESET) { /* beigin get data */ - + /* Set RxMsg pointer */ - pRxMsg = hcan->pRxMsg; - /* Get the Id */ - pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR; + pRxMsg = &drv_can2.RxMessage; + data = drv_can2.RxMessage_Data; + /* Get the Id */ + pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR; if (pRxMsg->IDE == CAN_ID_STD) { - pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR >> 21U); + pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR >> 21U); } else { - pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR >> 3U); + pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR >> 3U); } - - pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RIR; + + pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RIR; /* Get the DLC */ - pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDTR; - /* Get the FIFONumber */ - pRxMsg->FIFONumber = CAN_FIFO0; + pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDTR; /* Get the FMI */ - pRxMsg->FMI = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDTR >> 8U); + pRxMsg->FilterMatchIndex = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDTR >> 8U); /* Get the data field */ - pRxMsg->Data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR; - pRxMsg->Data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 8U); - pRxMsg->Data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 16U); - pRxMsg->Data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDLR >> 24U); - pRxMsg->Data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR; - pRxMsg->Data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 8U); - pRxMsg->Data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 16U); - pRxMsg->Data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO0].RDHR >> 24U); - + data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR; + data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 8U); + data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 16U); + data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDLR >> 24U); + data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR; + data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 8U); + data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 16U); + data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO0].RDHR >> 24U); + /* Release FIFO0 */ - __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0); - + SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); + /* end get data */ /* save to user fifo */ rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_RX_IND | 0 << 8); } - + /* Check Overrun flag for FIFO0 */ - if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FF0) != RESET) + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FFIE0) != RESET) { /* Clear FIFO0 FULL Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); } - + /* Check Overrun flag for FIFO0 */ - if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV0) != RESET) + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV0) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FOVIE0) != RESET) { /* Clear FIFO0 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); @@ -451,63 +464,63 @@ void CAN2_RX0_IRQHandler(void) void CAN2_RX1_IRQHandler(void) { rt_interrupt_enter(); - - CanRxMsgTypeDef* pRxMsg = NULL; + + CAN_RxHeaderTypeDef *pRxMsg = RT_NULL; + uint8_t *data = RT_NULL; CAN_HandleTypeDef *hcan; hcan = &drv_can2.CanHandle; /* check FMP1 and get data */ - while (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP1) != RESET) + while ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FMPIE1) != RESET) { /* beigin get data */ - + /* Set RxMsg pointer */ - pRxMsg = hcan->pRx1Msg; - /* Get the Id */ - pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR; + pRxMsg = &drv_can2.Rx1Message; + data = drv_can2.Rx1Message_Data; + /* Get the Id */ + pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR; if (pRxMsg->IDE == CAN_ID_STD) { - pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR >> 21U); + pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR >> 21U); } else { - pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR >> 3U); + pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR >> 3U); } - - pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RIR; + + pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RIR; /* Get the DLC */ - pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDTR; - /* Get the FIFONumber */ - pRxMsg->FIFONumber = CAN_FIFO1; + pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDTR; /* Get the FMI */ - pRxMsg->FMI = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDTR >> 8U); + pRxMsg->FilterMatchIndex = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDTR >> 8U); /* Get the data field */ - pRxMsg->Data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR; - pRxMsg->Data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 8U); - pRxMsg->Data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 16U); - pRxMsg->Data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDLR >> 24U); - pRxMsg->Data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR; - pRxMsg->Data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 8U); - pRxMsg->Data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 16U); - pRxMsg->Data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_FIFO1].RDHR >> 24U); - + data[0] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR; + data[1] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 8U); + data[2] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 16U); + data[3] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDLR >> 24U); + data[4] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR; + data[5] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 8U); + data[6] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 16U); + data[7] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[CAN_RX_FIFO1].RDHR >> 24U); + /* Release FIFO1 */ - __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1); - + SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); + /* end get data */ /* save to user fifo */ rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_RX_IND | 1 << 8); } - + /* Check Overrun flag for FIFO1 */ - if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FF1) != RESET) + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FF1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FFIE1) != RESET) { /* Clear FIFO1 FULL Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); } - + /* Check Overrun flag for FIFO1 */ - if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV1) != RESET) + if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV1) != RESET && __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IER_FOVIE1) != RESET) { /* Clear FIFO1 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); @@ -570,16 +583,16 @@ void CAN2_SCE_IRQHandler(void) */ void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) { - __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG | - CAN_IT_EPV | - CAN_IT_BOF | - CAN_IT_LEC | - CAN_IT_ERR | - CAN_IT_FMP0| - CAN_IT_FOV0| - CAN_IT_FMP1| - CAN_IT_FOV1| - CAN_IT_TME); + __HAL_CAN_ENABLE_IT(hcan, CAN_IER_EWGIE | + CAN_IER_EPVIE | + CAN_IER_BOFIE | + CAN_IER_LECIE | + CAN_IER_ERRIE | + CAN_IER_FMPIE0 | + CAN_IER_FOVIE0 | + CAN_IER_FMPIE1 | + CAN_IER_FOVIE1 | + CAN_IER_TMEIE); } static rt_err_t drv_configure(struct rt_can_device *dev_can, @@ -588,7 +601,7 @@ static rt_err_t drv_configure(struct rt_can_device *dev_can, struct stm32_drv_can *drv_can; rt_uint32_t baud_index; CAN_InitTypeDef *drv_init; - CAN_FilterConfTypeDef *filterConf; + CAN_FilterTypeDef *filterConf; RT_ASSERT(dev_can); RT_ASSERT(cfg); @@ -596,12 +609,12 @@ static rt_err_t drv_configure(struct rt_can_device *dev_can, drv_can = (struct stm32_drv_can *)dev_can->parent.user_data; drv_init = &drv_can->CanHandle.Init; - drv_init->TTCM = DISABLE; - drv_init->ABOM = DISABLE; - drv_init->AWUM = DISABLE; - drv_init->NART = DISABLE; - drv_init->RFLM = DISABLE; - drv_init->TXFP = DISABLE; + drv_init->TimeTriggeredMode = DISABLE; + drv_init->AutoBusOff = DISABLE; + drv_init->AutoWakeUp = DISABLE; + drv_init->AutoRetransmission = ENABLE; + drv_init->ReceiveFifoLocked = DISABLE; + drv_init->TransmitFifoPriority = DISABLE; switch (cfg->mode) { @@ -620,27 +633,31 @@ static rt_err_t drv_configure(struct rt_can_device *dev_can, } baud_index = get_can_baud_index(cfg->baud_rate); - drv_init->SJW = BAUD_DATA(SJW, baud_index); - drv_init->BS1 = BAUD_DATA(BS1, baud_index); - drv_init->BS2 = BAUD_DATA(BS2, baud_index); + drv_init->SyncJumpWidth = BAUD_DATA(SJW, baud_index); + drv_init->TimeSeg1 = BAUD_DATA(BS1, baud_index); + drv_init->TimeSeg2 = BAUD_DATA(BS2, baud_index); drv_init->Prescaler = BAUD_DATA(RRESCL, baud_index); if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK) { return RT_ERROR; } - + if (HAL_CAN_Start(&drv_can->CanHandle) != HAL_OK) + { + return RT_ERROR; + } + /* Filter conf */ filterConf = &drv_can->FilterConfig; - filterConf->FilterNumber = 0; + filterConf->FilterBank = 0; filterConf->FilterMode = CAN_FILTERMODE_IDMASK; filterConf->FilterScale = CAN_FILTERSCALE_32BIT; filterConf->FilterIdHigh = 0x0000; filterConf->FilterIdLow = 0x0000; filterConf->FilterMaskIdHigh = 0x0000; filterConf->FilterMaskIdLow = 0x0000; - filterConf->FilterFIFOAssignment = CAN_FIFO0; + filterConf->FilterFIFOAssignment = CAN_FILTER_FIFO0; filterConf->FilterActivation = ENABLE; - filterConf->BankNumber = 14; + filterConf->SlaveStartFilterBank = 14; HAL_CAN_ConfigFilter(&drv_can->CanHandle, filterConf); return RT_EOK; } @@ -659,23 +676,24 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) argval = (rt_uint32_t) arg; if (argval == RT_DEVICE_FLAG_INT_RX) { - if (CAN1 == drv_can->CanHandle.Instance) { + if (CAN1 == drv_can->CanHandle.Instance) + { HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn); HAL_NVIC_DisableIRQ(CAN1_RX1_IRQn); } - #ifdef CAN2 +#ifdef CAN2 else { HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn); HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn); } - #endif - __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FMP0); - __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FF0 ); - __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FOV0); - __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FMP1); - __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FF1 ); - __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FOV1); +#endif + __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FMPIE0); + __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FFIE0); + __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FOVIE0); + __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FMPIE1); + __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FFIE1); + __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_FOVIE1); } else if (argval == RT_DEVICE_FLAG_INT_TX) { @@ -683,13 +701,13 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) { HAL_NVIC_DisableIRQ(CAN1_TX_IRQn); } - #ifdef CAN2 +#ifdef CAN2 else { HAL_NVIC_DisableIRQ(CAN2_TX_IRQn); } - #endif - __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_TME); +#endif + __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_TMEIE); } else if (argval == RT_DEVICE_CAN_INT_ERR) { @@ -697,27 +715,27 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) { NVIC_DisableIRQ(CAN1_SCE_IRQn); } - #ifdef CAN2 +#ifdef CAN2 else { NVIC_DisableIRQ(CAN2_SCE_IRQn); } - #endif - __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_BOF); - __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_LEC); - __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_ERR); +#endif + __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_BOFIE); + __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_LECIE); + __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IER_ERRIE); } break; case RT_DEVICE_CTRL_SET_INT: argval = (rt_uint32_t) arg; if (argval == RT_DEVICE_FLAG_INT_RX) { - __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FMP0); - __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FF0); - __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FOV0); - __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FMP1); - __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FF1); - __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FOV1); + __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FMPIE0); + __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FFIE0); + __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FOVIE0); + __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FMPIE1); + __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FFIE1); + __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_FOVIE1); if (CAN1 == drv_can->CanHandle.Instance) { @@ -726,7 +744,7 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) HAL_NVIC_SetPriority(CAN1_RX1_IRQn, 1, 0); HAL_NVIC_EnableIRQ(CAN1_RX1_IRQn); } - #ifdef CAN2 +#ifdef CAN2 else { HAL_NVIC_SetPriority(CAN2_RX0_IRQn, 1, 0); @@ -734,43 +752,43 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 1, 0); HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); } - #endif +#endif } else if (argval == RT_DEVICE_FLAG_INT_TX) { - __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_TME); + __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_TMEIE); if (CAN1 == drv_can->CanHandle.Instance) { HAL_NVIC_SetPriority(CAN1_TX_IRQn, 1, 0); HAL_NVIC_EnableIRQ(CAN1_TX_IRQn); } - #ifdef CAN2 +#ifdef CAN2 else { HAL_NVIC_SetPriority(CAN2_TX_IRQn, 1, 0); HAL_NVIC_EnableIRQ(CAN2_TX_IRQn); } - #endif +#endif } else if (argval == RT_DEVICE_CAN_INT_ERR) { - __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_BOF); - __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_LEC); - __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_ERR); + __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_BOFIE); + __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_LECIE); + __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IER_ERRIE); if (CAN1 == drv_can->CanHandle.Instance) { HAL_NVIC_SetPriority(CAN1_SCE_IRQn, 1, 0); HAL_NVIC_EnableIRQ(CAN1_SCE_IRQn); } - #ifdef CAN2 +#ifdef CAN2 else { HAL_NVIC_SetPriority(CAN2_SCE_IRQn, 1, 0); HAL_NVIC_EnableIRQ(CAN2_SCE_IRQn); } - #endif +#endif } break; case RT_CAN_CMD_SET_FILTER: @@ -779,9 +797,9 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) case RT_CAN_CMD_SET_MODE: argval = (rt_uint32_t) arg; if (argval != RT_CAN_MODE_NORMAL || - argval != RT_CAN_MODE_LISEN || - argval != RT_CAN_MODE_LOOPBACK || - argval != RT_CAN_MODE_LOOPBACKANLISEN) + argval != RT_CAN_MODE_LISEN || + argval != RT_CAN_MODE_LOOPBACK || + argval != RT_CAN_MODE_LOOPBACKANLISEN) { return RT_ERROR; } @@ -797,14 +815,14 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) case RT_CAN_CMD_SET_BAUD: argval = (rt_uint32_t) arg; if (argval != CAN1MBaud && - argval != CAN800kBaud && - argval != CAN500kBaud && - argval != CAN250kBaud && - argval != CAN125kBaud && - argval != CAN100kBaud && - argval != CAN50kBaud && - argval != CAN20kBaud && - argval != CAN10kBaud) + argval != CAN800kBaud && + argval != CAN500kBaud && + argval != CAN250kBaud && + argval != CAN125kBaud && + argval != CAN100kBaud && + argval != CAN50kBaud && + argval != CAN20kBaud && + argval != CAN10kBaud) { return RT_ERROR; } @@ -814,16 +832,16 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) rt_uint32_t baud_index; can->config.baud_rate = argval; drv_init = &drv_can->CanHandle.Init; - drv_init->TTCM = DISABLE; - drv_init->ABOM = DISABLE; - drv_init->AWUM = DISABLE; - drv_init->NART = DISABLE; - drv_init->RFLM = DISABLE; - drv_init->TXFP = DISABLE; + drv_init->TimeTriggeredMode = DISABLE; + drv_init->AutoBusOff = DISABLE; + drv_init->AutoWakeUp = DISABLE; + drv_init->AutoRetransmission = ENABLE; + drv_init->ReceiveFifoLocked = DISABLE; + drv_init->TransmitFifoPriority = DISABLE; baud_index = get_can_baud_index(can->config.baud_rate); - drv_init->SJW = BAUD_DATA(SJW, baud_index); - drv_init->BS1 = BAUD_DATA(BS1, baud_index); - drv_init->BS2 = BAUD_DATA(BS2, baud_index); + drv_init->SyncJumpWidth = BAUD_DATA(SJW, baud_index); + drv_init->TimeSeg1 = BAUD_DATA(BS1, baud_index); + drv_init->TimeSeg2 = BAUD_DATA(BS2, baud_index); drv_init->Prescaler = BAUD_DATA(RRESCL, baud_index); if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK) @@ -835,7 +853,7 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) case RT_CAN_CMD_SET_PRIV: argval = (rt_uint32_t) arg; if (argval != RT_CAN_MODE_PRIV || - argval != RT_CAN_MODE_NOPRIV) + argval != RT_CAN_MODE_NOPRIV) { return RT_ERROR; } @@ -869,137 +887,131 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) static int drv_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t boxno) { CAN_HandleTypeDef *hcan = RT_NULL; + CAN_TxHeaderTypeDef *pTxMsg = RT_NULL; hcan = &((struct stm32_drv_can *) can->parent.user_data)->CanHandle; + pTxMsg = &((struct stm32_drv_can *) can->parent.user_data)->TxMessage; struct rt_can_msg *pmsg = (struct rt_can_msg *) buf; - + /*check Select mailbox is empty */ switch (boxno) { - case CAN_TXMAILBOX_0: - if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME0) != SET) - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_ERROR; - /* Return function status */ - return -RT_ERROR; - } - break; - case CAN_TXMAILBOX_1: - if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME1) != SET) - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_ERROR; - /* Return function status */ - return -RT_ERROR; - } - break; - case CAN_TXMAILBOX_2: - if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME2) != SET) - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_ERROR; - /* Return function status */ - return -RT_ERROR; - } - break; - default: - RT_ASSERT(0); - break; + case 0: + if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME0) != SET) + { + /* Change CAN state */ + hcan->State = HAL_CAN_STATE_ERROR; + /* Return function status */ + return -RT_ERROR; + } + break; + case 1: + if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME1) != SET) + { + /* Change CAN state */ + hcan->State = HAL_CAN_STATE_ERROR; + /* Return function status */ + return -RT_ERROR; + } + break; + case 2: + if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME2) != SET) + { + /* Change CAN state */ + hcan->State = HAL_CAN_STATE_ERROR; + /* Return function status */ + return -RT_ERROR; + } + break; + default: + RT_ASSERT(0); + break; } - + /* check id type */ if (RT_CAN_STDID == pmsg->ide) { - hcan->pTxMsg->IDE = CAN_ID_STD; - hcan->pTxMsg->StdId = pmsg->id; - hcan->pTxMsg->ExtId = 0xFFFFFFFFU; + pTxMsg->IDE = CAN_ID_STD; + pTxMsg->StdId = pmsg->id; + pTxMsg->ExtId = 0xFFFFFFFFU; } else if (RT_CAN_EXTID == pmsg->ide) { - hcan->pTxMsg->IDE = CAN_ID_EXT; - hcan->pTxMsg->StdId = 0xFFFFFFFFU; - hcan->pTxMsg->ExtId = pmsg->id; + pTxMsg->IDE = CAN_ID_EXT; + pTxMsg->StdId = 0xFFFFFFFFU; + pTxMsg->ExtId = pmsg->id; } - + /* check frame type */ if (RT_CAN_DTR == pmsg->rtr) { - hcan->pTxMsg->RTR = CAN_RTR_DATA; + pTxMsg->RTR = CAN_RTR_DATA; } else if (RT_CAN_RTR == pmsg->rtr) { - hcan->pTxMsg->RTR = CAN_RTR_REMOTE; + pTxMsg->RTR = CAN_RTR_REMOTE; } - hcan->pTxMsg->DLC = pmsg->len; - /* copy user data to hcan */ - hcan->pTxMsg->Data[0] = pmsg->data[0]; - hcan->pTxMsg->Data[1] = pmsg->data[1]; - hcan->pTxMsg->Data[2] = pmsg->data[2]; - hcan->pTxMsg->Data[3] = pmsg->data[3]; - hcan->pTxMsg->Data[4] = pmsg->data[4]; - hcan->pTxMsg->Data[5] = pmsg->data[5]; - hcan->pTxMsg->Data[6] = pmsg->data[6]; - hcan->pTxMsg->Data[7] = pmsg->data[7]; - + pTxMsg->DLC = pmsg->len; + /* clear TIR */ hcan->Instance->sTxMailBox[boxno].TIR &= CAN_TI0R_TXRQ; /* Set up the Id */ - if (hcan->pTxMsg->IDE == CAN_ID_STD) + if (pTxMsg->IDE == CAN_ID_STD) { - assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId)); - hcan->Instance->sTxMailBox[boxno].TIR |= ((hcan->pTxMsg->StdId << CAN_TI0R_STID_Pos) | \ - hcan->pTxMsg->RTR); + assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId)); + hcan->Instance->sTxMailBox[boxno].TIR |= ((pTxMsg->StdId << CAN_TI0R_STID_Pos) | \ + pTxMsg->RTR); } else { - assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId)); - hcan->Instance->sTxMailBox[boxno].TIR |= ((hcan->pTxMsg->ExtId << CAN_TI0R_EXID_Pos) | \ - hcan->pTxMsg->IDE | - hcan->pTxMsg->RTR); + assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId)); + hcan->Instance->sTxMailBox[boxno].TIR |= (pTxMsg->ExtId << CAN_TI0R_EXID_Pos) | \ + pTxMsg->IDE | + pTxMsg->RTR; } /* Set up the DLC */ - hcan->pTxMsg->DLC &= (uint8_t)0x0000000FU; + pTxMsg->DLC &= (uint8_t)0x0000000FU; hcan->Instance->sTxMailBox[boxno].TDTR &= 0xFFFFFFF0U; - hcan->Instance->sTxMailBox[boxno].TDTR |= hcan->pTxMsg->DLC; + hcan->Instance->sTxMailBox[boxno].TDTR |= pTxMsg->DLC; /* Set up the data field */ - WRITE_REG(hcan->Instance->sTxMailBox[boxno].TDLR, ((uint32_t)hcan->pTxMsg->Data[3U] << CAN_TDL0R_DATA3_Pos) | - ((uint32_t)hcan->pTxMsg->Data[2U] << CAN_TDL0R_DATA2_Pos) | - ((uint32_t)hcan->pTxMsg->Data[1U] << CAN_TDL0R_DATA1_Pos) | - ((uint32_t)hcan->pTxMsg->Data[0U] << CAN_TDL0R_DATA0_Pos)); - WRITE_REG(hcan->Instance->sTxMailBox[boxno].TDHR, ((uint32_t)hcan->pTxMsg->Data[7U] << CAN_TDL0R_DATA3_Pos) | - ((uint32_t)hcan->pTxMsg->Data[6U] << CAN_TDL0R_DATA2_Pos) | - ((uint32_t)hcan->pTxMsg->Data[5U] << CAN_TDL0R_DATA1_Pos) | - ((uint32_t)hcan->pTxMsg->Data[4U] << CAN_TDL0R_DATA0_Pos)); + WRITE_REG(hcan->Instance->sTxMailBox[boxno].TDLR, ((uint32_t)pmsg->data[3U] << CAN_TDL0R_DATA3_Pos) | + ((uint32_t)pmsg->data[2U] << CAN_TDL0R_DATA2_Pos) | + ((uint32_t)pmsg->data[1U] << CAN_TDL0R_DATA1_Pos) | + ((uint32_t)pmsg->data[0U] << CAN_TDL0R_DATA0_Pos)); + WRITE_REG(hcan->Instance->sTxMailBox[boxno].TDHR, ((uint32_t)pmsg->data[7U] << CAN_TDL0R_DATA3_Pos) | + ((uint32_t)pmsg->data[6U] << CAN_TDL0R_DATA2_Pos) | + ((uint32_t)pmsg->data[5U] << CAN_TDL0R_DATA1_Pos) | + ((uint32_t)pmsg->data[4U] << CAN_TDL0R_DATA0_Pos)); /* Request transmission */ hcan->Instance->sTxMailBox[boxno].TIR |= CAN_TI0R_TXRQ; - + return RT_EOK; } static int drv_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno) { - CAN_HandleTypeDef *hcan; + CAN_RxHeaderTypeDef *pRxMsg = RT_NULL; + uint8_t *data = RT_NULL; struct rt_can_msg *pmsg = (struct rt_can_msg *) buf; - hcan = &((struct stm32_drv_can *) can->parent.user_data)->CanHandle; - CanRxMsgTypeDef *pRxMsg = RT_NULL; - + /* get FIFO */ switch (boxno) { - case CAN_FIFO0: - pRxMsg = hcan->pRxMsg; - break; - case CAN_FIFO1: - pRxMsg = hcan->pRx1Msg; - break; - default: - RT_ASSERT(0); - break; + case CAN_RX_FIFO0: + pRxMsg = &((struct stm32_drv_can *) can->parent.user_data)->RxMessage; + data = ((struct stm32_drv_can *) can->parent.user_data)->RxMessage_Data; + break; + case CAN_RX_FIFO1: + pRxMsg = &((struct stm32_drv_can *) can->parent.user_data)->Rx1Message; + data = ((struct stm32_drv_can *) can->parent.user_data)->Rx1Message_Data; + break; + default: + RT_ASSERT(0); + break; } - + /* copy data */ /* get id */ if (CAN_ID_STD == pRxMsg->IDE) @@ -1024,16 +1036,16 @@ static int drv_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno) /* get len */ pmsg->len = pRxMsg->DLC; /* get hdr */ - pmsg->hdr = pRxMsg->FMI; + pmsg->hdr = pRxMsg->FilterMatchIndex; /* get data */ - pmsg->data[0] = pRxMsg->Data[0]; - pmsg->data[1] = pRxMsg->Data[1]; - pmsg->data[2] = pRxMsg->Data[2]; - pmsg->data[3] = pRxMsg->Data[3]; - pmsg->data[4] = pRxMsg->Data[4]; - pmsg->data[5] = pRxMsg->Data[5]; - pmsg->data[6] = pRxMsg->Data[6]; - pmsg->data[7] = pRxMsg->Data[7]; + pmsg->data[0] = data[0]; + pmsg->data[1] = data[1]; + pmsg->data[2] = data[2]; + pmsg->data[3] = data[3]; + pmsg->data[4] = data[4]; + pmsg->data[5] = data[5]; + pmsg->data[6] = data[6]; + pmsg->data[7] = data[7]; return RT_EOK; } @@ -1055,17 +1067,14 @@ int rt_hw_can_init(void) config.msgboxsz = 32; #ifdef RT_CAN_USING_HDR config.maxhdr = 14; - #ifdef CAN2 +#ifdef CAN2 config.maxhdr = 28; - #endif +#endif #endif #ifdef BSP_USING_CAN1 drv_can = &drv_can1; drv_can->CanHandle.Instance = CAN1; - drv_can->CanHandle.pTxMsg = &drv_can->TxMessage; - drv_can->CanHandle.pRxMsg = &drv_can->RxMessage; - drv_can->CanHandle.pRx1Msg = &drv_can->Rx1Message; dev_can1.ops = &drv_can_ops; dev_can1.config = config; /* register CAN1 device */ @@ -1077,9 +1086,6 @@ int rt_hw_can_init(void) #ifdef BSP_USING_CAN2 drv_can = &drv_can2; drv_can->CanHandle.Instance = CAN2; - drv_can->CanHandle.pTxMsg = &drv_can->TxMessage; - drv_can->CanHandle.pRxMsg = &drv_can->RxMessage; - drv_can->CanHandle.pRx1Msg = &drv_can->Rx1Message; dev_can2.ops = &drv_can_ops; dev_can2.config = config; /* register CAN2 device */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_can.h b/bsp/stm32/libraries/HAL_Drivers/drv_can.h index ba28e6c846..8fe1488bc5 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_can.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_can.h @@ -36,10 +36,12 @@ struct stm_baud_rate_tab struct stm32_drv_can { CAN_HandleTypeDef CanHandle; - CanTxMsgTypeDef TxMessage; - CanRxMsgTypeDef RxMessage; - CanRxMsgTypeDef Rx1Message; - CAN_FilterConfTypeDef FilterConfig; + CAN_TxHeaderTypeDef TxMessage; + CAN_RxHeaderTypeDef RxMessage; + uint8_t RxMessage_Data[8]; + CAN_RxHeaderTypeDef Rx1Message; + uint8_t Rx1Message_Data[8]; + CAN_FilterTypeDef FilterConfig; }; #ifdef __cplusplus diff --git a/components/drivers/Kconfig b/components/drivers/Kconfig index 861d8cf118..2b0f40fc2f 100755 --- a/components/drivers/Kconfig +++ b/components/drivers/Kconfig @@ -48,7 +48,7 @@ config RT_USING_CAN if RT_USING_CAN config RT_CAN_USING_HDR bool "Enable CAN hardware filter" - default y + default n endif config RT_USING_HWTIMER From 2fc56f4ff4b72d71dee856fd27195ab909f8a802 Mon Sep 17 00:00:00 2001 From: zhangjun1996 <2281979437@qq.com> Date: Sat, 15 Jun 2019 14:05:28 +0800 Subject: [PATCH 2/4] =?UTF-8?q?=E5=A4=B4=E6=96=87=E4=BB=B6=E7=BC=A9?= =?UTF-8?q?=E8=BF=9B?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/stm32/libraries/HAL_Drivers/drv_can.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_can.h b/bsp/stm32/libraries/HAL_Drivers/drv_can.h index 8fe1488bc5..dc5ccca76b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_can.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_can.h @@ -38,17 +38,17 @@ struct stm32_drv_can CAN_HandleTypeDef CanHandle; CAN_TxHeaderTypeDef TxMessage; CAN_RxHeaderTypeDef RxMessage; - uint8_t RxMessage_Data[8]; + uint8_t RxMessage_Data[8]; CAN_RxHeaderTypeDef Rx1Message; - uint8_t Rx1Message_Data[8]; + uint8_t Rx1Message_Data[8]; CAN_FilterTypeDef FilterConfig; }; #ifdef __cplusplus - extern "C" { +extern "C" { #endif extern int rt_hw_can_init(void); #ifdef __cplusplus - } +} #endif #endif /*__DRV_CAN_H__ */ From 3e7580dc7dacd57f93c5375d238534731c5817a1 Mon Sep 17 00:00:00 2001 From: zhangjun1996 <2281979437@qq.com> Date: Sat, 15 Jun 2019 18:08:00 +0800 Subject: [PATCH 3/4] =?UTF-8?q?=E9=87=8D=E6=96=B0=E9=85=8D=E7=BD=AECAN?= =?UTF-8?q?=E4=B9=8B=E5=89=8D=EF=BC=8C=E5=85=B3=E9=97=ADCAN=EF=BC=8C?= =?UTF-8?q?=E9=85=8D=E7=BD=AE=E5=AE=8C=E5=86=8D=E6=89=93=E5=BC=80=E3=80=82?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/stm32/libraries/HAL_Drivers/drv_can.c | 24 +++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_can.c b/bsp/stm32/libraries/HAL_Drivers/drv_can.c index 2a48985c43..5f5feb268a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_can.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_can.c @@ -806,10 +806,18 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) if (argval != can->config.mode) { can->config.mode = argval; + if (HAL_CAN_Stop(&drv_can->CanHandle) != HAL_OK) + { + return RT_ERROR; + } if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK) { return RT_ERROR; } + if (HAL_CAN_Start(&drv_can->CanHandle) != HAL_OK) + { + return RT_ERROR; + } } break; case RT_CAN_CMD_SET_BAUD: @@ -844,10 +852,18 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) drv_init->TimeSeg2 = BAUD_DATA(BS2, baud_index); drv_init->Prescaler = BAUD_DATA(RRESCL, baud_index); + if (HAL_CAN_Stop(&drv_can->CanHandle) != HAL_OK) + { + return RT_ERROR; + } if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK) { return RT_ERROR; } + if (HAL_CAN_Start(&drv_can->CanHandle) != HAL_OK) + { + return RT_ERROR; + } } break; case RT_CAN_CMD_SET_PRIV: @@ -860,10 +876,18 @@ static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg) if (argval != can->config.privmode) { can->config.privmode = argval; + if (HAL_CAN_Stop(&drv_can->CanHandle) != HAL_OK) + { + return RT_ERROR; + } if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK) { return RT_ERROR; } + if (HAL_CAN_Start(&drv_can->CanHandle) != HAL_OK) + { + return RT_ERROR; + } } break; case RT_CAN_CMD_GET_STATUS: From 778199f8762b797c07853ca6fa9054da6e2a2677 Mon Sep 17 00:00:00 2001 From: zhangjun1996 <2281979437@qq.com> Date: Mon, 17 Jun 2019 02:46:36 +0800 Subject: [PATCH 4/4] =?UTF-8?q?=E5=A6=82=E6=9E=9C=E5=BC=80=E5=90=AF?= =?UTF-8?q?=E4=BA=86RT=5FCAN=5FUSING=5FHDR=EF=BC=8C=E5=88=99=E6=8F=90?= =?UTF-8?q?=E7=A4=BA=E8=AF=A5=E9=A9=B1=E5=8A=A8=E4=B8=8D=E6=94=AF=E6=8C=81?= =?UTF-8?q?=E7=A1=AC=E4=BB=B6=E8=BF=87=E6=BB=A4=E5=99=A8=EF=BC=8C=E8=AF=B7?= =?UTF-8?q?=E5=8F=96=E6=B6=88RT=5FCAN=5FUSING=5FHDR=E3=80=82?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/stm32/libraries/HAL_Drivers/drv_can.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_can.c b/bsp/stm32/libraries/HAL_Drivers/drv_can.c index 5f5feb268a..69aa38eba6 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_can.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_can.c @@ -15,6 +15,10 @@ #ifdef RT_USING_CAN +#ifdef RT_CAN_USING_HDR + #error "The CAN driver does not support hardware filters, Please disable RT_CAN_USING_HDR" +#endif + #if defined (SOC_SERIES_STM32F1) static const struct stm_baud_rate_tab can_baud_rate_tab[] = {