From 23304a77d9c2d0f06fc7fc412afd4d9a74dcfff3 Mon Sep 17 00:00:00 2001 From: Meco Man <920369182@qq.com> Date: Sat, 6 Feb 2021 02:27:18 +0800 Subject: [PATCH] =?UTF-8?q?[bug][pin]=20=E4=BF=AE=E5=A4=8D=E9=94=99?= =?UTF-8?q?=E8=AF=AF=E7=A0=81=E6=B2=A1=E6=9C=89=E4=B8=BA=E8=B4=9F=E7=9A=84?= =?UTF-8?q?=E9=94=99=E8=AF=AF?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- components/drivers/misc/pin.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/components/drivers/misc/pin.c b/components/drivers/misc/pin.c index 2750f5105a..6f27fe516d 100644 --- a/components/drivers/misc/pin.c +++ b/components/drivers/misc/pin.c @@ -6,6 +6,7 @@ * Change Logs: * Date Author Notes * 2015-01-20 Bernard the first version + * 2021-02-06 Meco Man fix RT_ENOSYS code in negative */ #include @@ -108,7 +109,7 @@ rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode, { return _hw_pin.ops->pin_attach_irq(&_hw_pin.parent, pin, mode, hdr, args); } - return RT_ENOSYS; + return -RT_ENOSYS; } rt_err_t rt_pin_detach_irq(rt_int32_t pin) { @@ -117,7 +118,7 @@ rt_err_t rt_pin_detach_irq(rt_int32_t pin) { return _hw_pin.ops->pin_detach_irq(&_hw_pin.parent, pin); } - return RT_ENOSYS; + return -RT_ENOSYS; } rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint32_t enabled) @@ -127,7 +128,7 @@ rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint32_t enabled) { return _hw_pin.ops->pin_irq_enable(&_hw_pin.parent, pin, enabled); } - return RT_ENOSYS; + return -RT_ENOSYS; } /* RT-Thread Hardware PIN APIs */