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convert dos endline to unix endline; cleanup schedule code for STM32 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@49 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
bernard.xiong 2009-09-20 23:43:51 +00:00
parent 04234d1821
commit 8e76594241
8 changed files with 742 additions and 699 deletions
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55
libcpu/arm/stm32/context_rvds.S
View File

@ -55,24 +55,29 @@ rt_hw_interrupt_enable PROC
; * r0 --> from
; * r1 --> to
; */
rt_hw_context_switch_interrupt
EXPORT rt_hw_context_switch_interrupt
rt_hw_context_switch PROC
EXPORT rt_hw_context_switch
; set rt_thread_switch_interrput_flag to 1
LDR r2, =rt_thread_switch_interrput_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
STR r0, [r2]
_reswitch
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
STR r1, [r2]
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
; CPSIE I ; enable interrupts at processor level
BX LR
ENDP
@ -143,55 +148,11 @@ rt_hw_context_switch_to PROC
; never reach here!
ENDP
;/*
; * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to)
; * {
; * if (rt_thread_switch_interrput_flag == 1)
; * {
; * rt_interrupt_to_thread = to;
; * }
; * else
; * {
; * rt_thread_switch_interrput_flag = 1;
; * rt_interrupt_from_thread = from;
; * rt_interrupt_to_thread = to;
; * }
; * }
; */
rt_hw_context_switch_interrupt PROC
EXPORT rt_hw_context_switch_interrupt
LDR r2, =rt_thread_switch_interrput_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1 ; set rt_thread_switch_interrput_flag to 1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
STR r0, [r2]
_reswitch
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
STR r1, [r2]
BX lr
ENDP
; compatible with old version
rt_hw_interrupt_thread_switch PROC
EXPORT rt_hw_interrupt_thread_switch
LDR r0, =rt_thread_switch_interrput_flag
LDR r1, [r0]
CBZ r1, _no_switch
; clear rt_thread_switch_interrput_flag to 0
; MOV r1, #0x00
; STR r1, [r0]
; trigger context switch
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
_no_switch
BX lr
NOP
ENDP
END

4
libcpu/arm/stm32/interrupt.c
View File

@ -14,10 +14,6 @@
#include <rtthread.h>
#define MAX_HANDLERS 32
extern rt_uint32_t rt_interrupt_nest;
/* exception and interrupt handler table */
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrput_flag;

454
libcpu/arm/stm32/start_rvds.s
View File

@ -1,9 +1,10 @@
;******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
;* File Name : stm32f10x_vector.s
;******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
;* File Name : startup_stm32f10x_hd.s
;* Author : MCD Application Team
;* Version : V1.1.2
;* Date : 09/22/2008
;* Description : STM32F10x vector table for RVMDK toolchain.
;* Version : V3.1.0
;* Date : 06/19/2009
;* Description : STM32F10x High Density Devices vector table for RVMDK
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
@ -26,25 +27,20 @@
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
;// <h> Stack Configuration
;// <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;// </h>
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000200
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp EQU 0x20000400 ; stack used for SystemInit_ExtMemCtl
; always internal RAM used
__initial_sp
; If you need to use external SRAM mounted on STM3210E-EVAL board as data memory
; and internal SRAM for Stack, uncomment the following line and comment the line above
;__initial_sp EQU 0x20000000 + Stack_Size ; "Use MicroLIB" must be checked in
; the Project->Options->Target window
; Amount of memory (in bytes) allocated for Heap
; Tailor this value to your application needs
;// <h> Heap Configuration
;// <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;// </h>
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000000
@ -53,211 +49,298 @@ __heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
THUMB
PRESERVE8
THUMB
; Import exceptions handlers
IMPORT NMIException
IMPORT rt_hw_hard_fault
IMPORT MemManageException
IMPORT BusFaultException
IMPORT UsageFaultException
IMPORT SVCHandler
IMPORT DebugMonitor
IMPORT rt_hw_pend_sv
IMPORT SysTickHandler
IMPORT WWDG_IRQHandler
IMPORT PVD_IRQHandler
IMPORT TAMPER_IRQHandler
IMPORT RTC_IRQHandler
IMPORT FLASH_IRQHandler
IMPORT RCC_IRQHandler
IMPORT EXTI0_IRQHandler
IMPORT EXTI1_IRQHandler
IMPORT EXTI2_IRQHandler
IMPORT EXTI3_IRQHandler
IMPORT EXTI4_IRQHandler
IMPORT DMA1_Channel1_IRQHandler
IMPORT DMA1_Channel2_IRQHandler
IMPORT DMA1_Channel3_IRQHandler
IMPORT DMA1_Channel4_IRQHandler
IMPORT DMA1_Channel5_IRQHandler
IMPORT DMA1_Channel6_IRQHandler
IMPORT DMA1_Channel7_IRQHandler
IMPORT ADC1_2_IRQHandler
IMPORT USB_HP_CAN1_TX_IRQHandler
IMPORT USB_LP_CAN1_RX0_IRQHandler
IMPORT CAN1_RX1_IRQHandler
IMPORT CAN1_SCE_IRQHandler
IMPORT EXTI9_5_IRQHandler
IMPORT TIM1_BRK_IRQHandler
IMPORT TIM1_UP_IRQHandler
IMPORT TIM1_TRG_COM_IRQHandler
IMPORT TIM1_CC_IRQHandler
IMPORT TIM2_IRQHandler
IMPORT TIM3_IRQHandler
IMPORT TIM4_IRQHandler
IMPORT I2C1_EV_IRQHandler
IMPORT I2C1_ER_IRQHandler
IMPORT I2C2_EV_IRQHandler
IMPORT I2C2_ER_IRQHandler
IMPORT SPI1_IRQHandler
IMPORT SPI2_IRQHandler
IMPORT USART1_IRQHandler
IMPORT USART2_IRQHandler
IMPORT USART3_IRQHandler
IMPORT EXTI15_10_IRQHandler
IMPORT RTCAlarm_IRQHandler
IMPORT USBWakeUp_IRQHandler
; HD
IMPORT TIM8_BRK_IRQHandler
IMPORT TIM8_UP_IRQHandler
IMPORT TIM8_TRG_COM_IRQHandler
IMPORT TIM8_CC_IRQHandler
IMPORT ADC3_IRQHandler
IMPORT FSMC_IRQHandler
IMPORT SDIO_IRQHandler
IMPORT TIM5_IRQHandler
IMPORT SPI3_IRQHandler
IMPORT UART4_IRQHandler
IMPORT UART5_IRQHandler
IMPORT TIM6_IRQHandler
IMPORT TIM7_IRQHandler
IMPORT DMA2_Channel1_IRQHandler
IMPORT DMA2_Channel2_IRQHandler
IMPORT DMA2_Channel3_IRQHandler
IMPORT DMA2_Channel4_5_IRQHandler
; CL (DMA2_Channel4 DMA2_Channel5 is alone)
IMPORT DMA2_Channel5_IRQHandler ; DMA2 Channel5
IMPORT ETH_IRQHandler ; Ethernet
IMPORT ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
IMPORT CAN2_TX_IRQHandler ; CAN2 TX
IMPORT CAN2_RX0_IRQHandler ; CAN2 RX0
IMPORT CAN2_RX1_IRQHandler ; CAN2 RX1
IMPORT CAN2_SCE_IRQHandler ; CAN2 SCE
IMPORT OTG_FS_IRQHandler ; USB OTG FS
IMPORT rt_hw_timer_handler
;*******************************************************************************
; Fill-up the Vector Table entries with the exceptions ISR address
;*******************************************************************************
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler
DCD NMIException
DCD rt_hw_hard_fault
DCD MemManageException
DCD BusFaultException
DCD UsageFaultException
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD rt_hw_hard_fault ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVCHandler
DCD DebugMonitor
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD rt_hw_pend_sv
DCD SysTickHandler
DCD WWDG_IRQHandler
DCD PVD_IRQHandler
DCD TAMPER_IRQHandler
DCD RTC_IRQHandler
DCD FLASH_IRQHandler
DCD RCC_IRQHandler
DCD EXTI0_IRQHandler
DCD EXTI1_IRQHandler
DCD EXTI2_IRQHandler
DCD EXTI3_IRQHandler
DCD EXTI4_IRQHandler
DCD DMA1_Channel1_IRQHandler
DCD DMA1_Channel2_IRQHandler
DCD DMA1_Channel3_IRQHandler
DCD DMA1_Channel4_IRQHandler
DCD DMA1_Channel5_IRQHandler
DCD DMA1_Channel6_IRQHandler
DCD DMA1_Channel7_IRQHandler
DCD ADC1_2_IRQHandler
DCD USB_HP_CAN1_TX_IRQHandler
DCD USB_LP_CAN1_RX0_IRQHandler
DCD CAN1_RX1_IRQHandler
DCD CAN1_SCE_IRQHandler
DCD EXTI9_5_IRQHandler
DCD TIM1_BRK_IRQHandler
DCD TIM1_UP_IRQHandler
DCD TIM1_TRG_COM_IRQHandler
DCD TIM1_CC_IRQHandler
DCD TIM2_IRQHandler
DCD TIM3_IRQHandler
DCD TIM4_IRQHandler
DCD I2C1_EV_IRQHandler
DCD I2C1_ER_IRQHandler
DCD I2C2_EV_IRQHandler
DCD I2C2_ER_IRQHandler
DCD SPI1_IRQHandler
DCD SPI2_IRQHandler
DCD USART1_IRQHandler
DCD USART2_IRQHandler
DCD USART3_IRQHandler
DCD EXTI15_10_IRQHandler
DCD RTCAlarm_IRQHandler
DCD USBWakeUp_IRQHandler
; HD
DCD TIM8_BRK_IRQHandler
DCD TIM8_UP_IRQHandler
DCD TIM8_TRG_COM_IRQHandler
DCD TIM8_CC_IRQHandler
DCD ADC3_IRQHandler
DCD FSMC_IRQHandler
DCD SDIO_IRQHandler
DCD TIM5_IRQHandler
DCD SPI3_IRQHandler
DCD UART4_IRQHandler
DCD UART5_IRQHandler
DCD TIM6_IRQHandler
DCD TIM7_IRQHandler
DCD DMA2_Channel1_IRQHandler
DCD DMA2_Channel2_IRQHandler
DCD DMA2_Channel3_IRQHandler
DCD DMA2_Channel4_5_IRQHandler
; CL (DMA2_Channel4 DMA2_Channel5 is alone)
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
DCD ETH_IRQHandler ; Ethernet
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
DCD CAN2_TX_IRQHandler ; CAN2 TX
DCD CAN2_RX0_IRQHandler ; CAN2 RX0
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
DCD CAN2_SCE_IRQHandler ; CAN2 SCE
DCD OTG_FS_IRQHandler ; USB OTG FS
DCD rt_hw_pend_sv ; PendSV Handler
DCD rt_hw_timer_handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1 & ADC2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
DCD TIM8_BRK_IRQHandler ; TIM8 Break
DCD TIM8_UP_IRQHandler ; TIM8 Update
DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
DCD ADC3_IRQHandler ; ADC3
DCD FSMC_IRQHandler ; FSMC
DCD SDIO_IRQHandler ; SDIO
DCD TIM5_IRQHandler ; TIM5
DCD SPI3_IRQHandler ; SPI3
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD TIM6_IRQHandler ; TIM6
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler routine
Reset_Handler PROC
EXPORT Reset_Handler
EXPORT Reset_Handler [WEAK]
IMPORT __main
LDR R1, = __initial_sp ; restore original stack pointer
MSR MSP, R1
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
EXPORT TIM8_BRK_IRQHandler [WEAK]
EXPORT TIM8_UP_IRQHandler [WEAK]
EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
EXPORT TIM8_CC_IRQHandler [WEAK]
EXPORT ADC3_IRQHandler [WEAK]
EXPORT FSMC_IRQHandler [WEAK]
EXPORT SDIO_IRQHandler [WEAK]
EXPORT TIM5_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT TIM6_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
TIM8_BRK_IRQHandler
TIM8_UP_IRQHandler
TIM8_TRG_COM_IRQHandler
TIM8_CC_IRQHandler
ADC3_IRQHandler
FSMC_IRQHandler
SDIO_IRQHandler
TIM5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TIM6_IRQHandler
TIM7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_5_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
@ -268,4 +351,5 @@ __user_initial_stackheap
END
;******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE*****
;******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE*****

2
src/ipc.c
View File

@ -1340,6 +1340,7 @@ rt_err_t rt_mb_recv (rt_mailbox_t mb, rt_uint32_t* value, rt_int32_t timeout)
/* parameter check */
RT_ASSERT(mb != RT_NULL);
tick_delta = 0;
#ifdef RT_USING_HOOK
if (rt_object_trytake_hook != RT_NULL) rt_object_trytake_hook(&(mb->parent.parent));
#endif
@ -1788,6 +1789,7 @@ rt_err_t rt_mq_recv (rt_mq_t mq, void* buffer, rt_size_t size, rt_int32_t timeou
if (rt_object_trytake_hook != RT_NULL) rt_object_trytake_hook(&(mq->parent.parent));
#endif
tick_delta = 0;
/* disable interrupt */
temp = rt_hw_interrupt_disable();