diff --git a/bsp/qemu-virt64-aarch64/rtconfig.py b/bsp/qemu-virt64-aarch64/rtconfig.py index 1701d4f4c8..7204079e6f 100644 --- a/bsp/qemu-virt64-aarch64/rtconfig.py +++ b/bsp/qemu-virt64-aarch64/rtconfig.py @@ -1,5 +1,4 @@ import os -import platform # toolchains options ARCH ='aarch64' diff --git a/bsp/raspberry-pi/raspi3-64/.config b/bsp/raspberry-pi/raspi3-64/.config index ce03e99814..bd6091474d 100644 --- a/bsp/raspberry-pi/raspi3-64/.config +++ b/bsp/raspberry-pi/raspi3-64/.config @@ -239,6 +239,17 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # Socket is in the 'Network' category # +# +# Interprocess Communication (IPC) +# +# CONFIG_RT_USING_POSIX_PIPE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set + +# +# Socket is in the 'Network' category +# + # # Network # @@ -552,6 +563,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_MCUBOOT is not set # CONFIG_PKG_USING_TINYUSB is not set # CONFIG_PKG_USING_USB_STACK is not set +# CONFIG_PKG_USING_LUATOS_SOC is not set # # peripheral libraries and drivers diff --git a/bsp/raspberry-pi/raspi4-64/.config b/bsp/raspberry-pi/raspi4-64/.config index 5b53627c88..a3fd2291ea 100644 --- a/bsp/raspberry-pi/raspi4-64/.config +++ b/bsp/raspberry-pi/raspi4-64/.config @@ -234,6 +234,17 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # Socket is in the 'Network' category # +# +# Interprocess Communication (IPC) +# +# CONFIG_RT_USING_POSIX_PIPE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set + +# +# Socket is in the 'Network' category +# + # # Network # @@ -619,6 +630,7 @@ CONFIG_YMODEM_USING_FILE_TRANSFER=y # CONFIG_PKG_USING_MCUBOOT is not set # CONFIG_PKG_USING_TINYUSB is not set # CONFIG_PKG_USING_USB_STACK is not set +# CONFIG_PKG_USING_LUATOS_SOC is not set # # peripheral libraries and drivers diff --git a/libcpu/aarch64/common/interrupt.c b/libcpu/aarch64/common/interrupt.c index 895088c805..f31003b2c0 100644 --- a/libcpu/aarch64/common/interrupt.c +++ b/libcpu/aarch64/common/interrupt.c @@ -25,26 +25,8 @@ rt_ubase_t rt_interrupt_from_thread = 0; rt_ubase_t rt_interrupt_to_thread = 0; rt_ubase_t rt_thread_switch_interrupt_flag = 0; -const unsigned int VECTOR_BASE = 0x00; extern int system_vectors; -#ifdef RT_USING_SMP -#define rt_interrupt_nest rt_cpu_self()->irq_nest -#else -extern volatile rt_uint8_t rt_interrupt_nest; -#endif - -#ifndef BSP_USING_GIC -static void default_isr_handler(int vector, void *param) -{ -#ifdef RT_USING_SMP - rt_kprintf("cpu %d unhandled irq: %d\n", rt_hw_cpu_id(), vector); -#else - rt_kprintf("unhandled irq: %d\n", vector); -#endif -} -#endif - void rt_hw_vector_init(void) { rt_hw_set_current_vbar((rt_ubase_t)&system_vectors); @@ -55,52 +37,21 @@ void rt_hw_vector_init(void) */ void rt_hw_interrupt_init(void) { -#ifndef BSP_USING_GIC - rt_uint32_t index; /* initialize vector table */ rt_hw_vector_init(); /* initialize exceptions table */ rt_memset(isr_table, 0x00, sizeof(isr_table)); +#ifndef BSP_USING_GIC /* mask all of interrupts */ IRQ_DISABLE_BASIC = 0x000000ff; IRQ_DISABLE1 = 0xffffffff; IRQ_DISABLE2 = 0xffffffff; - for (index = 0; index < MAX_HANDLERS; index ++) - { - isr_table[index].handler = default_isr_handler; - isr_table[index].param = RT_NULL; -#ifdef RT_USING_INTERRUPT_INFO - rt_strncpy(isr_table[index].name, "unknown", RT_NAME_MAX); - isr_table[index].counter = 0; -#endif - } - - /* init interrupt nest, and context in thread sp */ - rt_interrupt_nest = 0; - rt_interrupt_from_thread = 0; - rt_interrupt_to_thread = 0; - rt_thread_switch_interrupt_flag = 0; #else - rt_uint64_t gic_cpu_base; - rt_uint64_t gic_dist_base; - rt_uint64_t gic_irq_start; - - /* initialize vector table */ - rt_hw_vector_init(); - - /* initialize exceptions table */ - rt_memset(isr_table, 0x00, sizeof(isr_table)); - /* initialize ARM GIC */ - gic_dist_base = platform_get_gic_dist_base(); - gic_cpu_base = platform_get_gic_cpu_base(); - - gic_irq_start = GIC_IRQ_START; - - arm_gic_dist_init(0, gic_dist_base, gic_irq_start); - arm_gic_cpu_init(0, gic_cpu_base); + arm_gic_dist_init(0, platform_get_gic_dist_base(), GIC_IRQ_START); + arm_gic_cpu_init(0, platform_get_gic_cpu_base()); #endif } diff --git a/libcpu/aarch64/common/trap.c b/libcpu/aarch64/common/trap.c index a648c2dd88..f828f7e01f 100644 --- a/libcpu/aarch64/common/trap.c +++ b/libcpu/aarch64/common/trap.c @@ -148,7 +148,7 @@ void rt_hw_trap_irq(void) } #else void *param; - int ir; + int ir, ir_self; rt_isr_handler_t isr_func; extern struct rt_irq_desc isr_table[]; @@ -160,17 +160,20 @@ void rt_hw_trap_irq(void) return; } + /* bit 10~12 is cpuid, bit 0~9 is interrupt id */ + ir_self = ir & 0x3ffUL; + /* get interrupt service routine */ - isr_func = isr_table[ir].handler; + isr_func = isr_table[ir_self].handler; #ifdef RT_USING_INTERRUPT_INFO - isr_table[ir].counter++; + isr_table[ir_self].counter++; #endif if (isr_func) { /* Interrupt for myself. */ - param = isr_table[ir].param; + param = isr_table[ir_self].param; /* turn to interrupt service routine */ - isr_func(ir, param); + isr_func(ir_self, param); } /* end of interrupt */ diff --git a/libcpu/aarch64/common/vector_gcc.S b/libcpu/aarch64/common/vector_gcc.S index 6227686e2b..d901051134 100644 --- a/libcpu/aarch64/common/vector_gcc.S +++ b/libcpu/aarch64/common/vector_gcc.S @@ -4,58 +4,45 @@ * SPDX-License-Identifier: Apache-2.0 * * Date Author Notes - * 2018-10-06 ZhaoXiaowei the first version + * 2018-10-06 ZhaoXiaowei the first version + * 2022-02-16 GuEe-GUI replace vectors entry to macro */ -.text +#include "rtconfig.h" + +#ifndef RT_USING_VMTHREAD +.macro ventry label + .align 7 + b \label +.endm .globl system_vectors .globl vector_error .globl vector_irq .globl vector_fiq - -system_vectors: .align 11 - .set VBAR, system_vectors - .org VBAR - // Exception from CurrentEL (EL1) with SP_EL0 (SPSEL=0) - .org (VBAR + 0x00 + 0) - B vector_error // Synchronous - .org (VBAR + 0x80 + 0) - B vector_irq // IRQ/vIRQ - .org (VBAR + 0x100 + 0) - B vector_fiq // FIQ/vFIQ - .org (VBAR + 0x180 + 0) - B vector_error // Error/vError +system_vectors: + /* Exception from CurrentEL (EL1t) with SP_EL0 (SPSEL = 0) */ + ventry vector_error /* Synchronous */ + ventry vector_irq /* IRQ/vIRQ */ + ventry vector_fiq /* FIQ/vFIQ */ + ventry vector_error /* SError/vSError */ - // Exception from CurrentEL (EL1) with SP_ELn - .org (VBAR + 0x200 + 0) - B vector_error // Synchronous - .org (VBAR + 0x280 + 0) - B vector_irq // IRQ/vIRQ - .org (VBAR + 0x300 + 0) - B vector_fiq // FIQ/vFIQ - .org (VBAR + 0x380 + 0) - B vector_error + /* Exception from CurrentEL (EL1h) with SP_ELn */ + ventry vector_error /* Synchronous */ + ventry vector_irq /* IRQ/vIRQ */ + ventry vector_fiq /* FIQ/vFIQ */ + ventry vector_error /* SError/vSError */ - // Exception from lower EL, aarch64 - .org (VBAR + 0x400 + 0) - B vector_error - .org (VBAR + 0x480 + 0) - B vector_error - .org (VBAR + 0x500 + 0) - B vector_error - .org (VBAR + 0x580 + 0) - B vector_error + /* Exception from lower EL, aarch64 */ + ventry vector_error /* Synchronous */ + ventry vector_error /* IRQ/vIRQ */ + ventry vector_error /* FIQ/vFIQ */ + ventry vector_error /* SError/vSError */ - // Exception from lower EL, aarch32 - .org (VBAR + 0x600 + 0) - B vector_error - .org (VBAR + 0x680 + 0) - B vector_error - .org (VBAR + 0x700 + 0) - B vector_error - .org (VBAR + 0x780 + 0) - B vector_error - .org (VBAR + 0x800 + 0) - B vector_error + /* Exception from lower EL, aarch32 */ + ventry vector_error /* Synchronous */ + ventry vector_error /* IRQ/vIRQ */ + ventry vector_error /* FIQ/vFIQ */ + ventry vector_error /* SError/vSError */ +#endif /* !RT_USING_VMTHREAD */