[Infineon]Update spi driver
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b9f5bf7d91
commit
8552d061c2
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@ -6,6 +6,7 @@
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* Change Logs:
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* Date Author Notes
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* 2022-07-18 Rbb666 first version
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* 2023-03-30 Rbb666 update spi driver
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*/
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#include <drv_spi.h>
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@ -21,52 +22,46 @@
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#endif /* DRV_DEBUG */
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#include <rtdbg.h>
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struct ifx_sw_spi_cs
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{
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rt_uint32_t pin;
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};
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#ifdef BSP_USING_SPI0
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static struct rt_spi_bus spi_bus0;
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#endif
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#ifdef BSP_USING_SPI3
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static struct rt_spi_bus spi_bus3;
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#endif
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#ifdef BSP_USING_SPI6
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static struct rt_spi_bus spi_bus6;
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#endif
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static struct ifx_spi spi_bus_obj[] =
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static struct ifx_spi_handle spi_bus_obj[] =
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{
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#if defined(BSP_USING_SPI0)
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#if defined(BSP_USING_SPI0)
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{
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.bus_name = "spi0",
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.spi_bus = &spi_bus0,
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.sck_pin = GET_PIN(0, 4),
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.miso_pin = GET_PIN(0, 3),
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.mosi_pin = GET_PIN(0, 2),
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},
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#endif
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#if defined(BSP_USING_SPI3)
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#endif
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#if defined(BSP_USING_SPI3)
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{
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.bus_name = "spi3",
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.spi_bus = &spi_bus3,
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.sck_pin = GET_PIN(6, 2),
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.miso_pin = GET_PIN(6, 1),
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.mosi_pin = GET_PIN(6, 0),
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},
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#endif
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#if defined(BSP_USING_SPI6)
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#endif
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#if defined(BSP_USING_SPI6)
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{
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.bus_name = "spi6",
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.spi_bus = &spi_bus6,
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.sck_pin = GET_PIN(12, 2),
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.miso_pin = GET_PIN(12, 1),
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.mosi_pin = GET_PIN(12, 0),
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},
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#endif
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#endif
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};
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static struct ifx_spi spi_config[sizeof(spi_bus_obj) / sizeof(spi_bus_obj[0])] = {0};
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/* private rt-thread spi ops function */
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static rt_err_t spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration);
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static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message);
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@ -77,39 +72,69 @@ static struct rt_spi_ops ifx_spi_ops =
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.xfer = spixfer,
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};
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static void ifx_spi_init(struct ifx_spi *ifx_spi)
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static void spi_interrupt_callback(void *arg, cyhal_spi_event_t event)
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{
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int result = RT_EOK;
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struct ifx_spi *spi_drv = (struct ifx_spi *)arg;
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result = cyhal_spi_init(ifx_spi->spi_obj, ifx_spi->mosi_pin, ifx_spi->miso_pin, ifx_spi->sck_pin,
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NC, NULL, ifx_spi->spi_obj->data_bits, ifx_spi->spi_obj->mode, false);
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rt_interrupt_enter();
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RT_ASSERT(result == RT_EOK);
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if ((event & CYHAL_SPI_IRQ_DONE) != 0u)
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{
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/* Transmission is complete. Handle Event */
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rt_completion_done(&spi_drv->cpt);
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}
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rt_kprintf("[%s] Freq:[%d]HZ\n", ifx_spi->bus_name, ifx_spi->freq);
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rt_interrupt_leave();
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}
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result = cyhal_spi_set_frequency(ifx_spi->spi_obj, ifx_spi->freq);
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static void ifx_spi_init(struct ifx_spi *spi_device)
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{
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RT_ASSERT(spi_device != RT_NULL);
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RT_ASSERT(result != CYHAL_SPI_RSLT_CLOCK_ERROR);
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rt_err_t result = RT_EOK;
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result = cyhal_spi_init(spi_device->spi_handle_t->spi_obj, spi_device->spi_handle_t->mosi_pin, spi_device->spi_handle_t->miso_pin,
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spi_device->spi_handle_t->sck_pin, NC, NULL, spi_device->spi_handle_t->spi_obj->data_bits,
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spi_device->spi_handle_t->spi_obj->mode, false);
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if (result != RT_EOK)
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{
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LOG_E("spi%s init fail", spi_device->spi_handle_t->bus_name);
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return;
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}
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LOG_I("[%s] freq:[%d]HZ\n", spi_device->spi_handle_t->bus_name, spi_device->spi_handle_t->freq);
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result = cyhal_spi_set_frequency(spi_device->spi_handle_t->spi_obj, spi_device->spi_handle_t->freq);
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if (result == CYHAL_SPI_RSLT_CLOCK_ERROR)
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{
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LOG_E("%s set frequency fail", spi_device->spi_handle_t->bus_name);
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return;
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}
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/* Register a callback function to be called when the interrupt fires */
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cyhal_spi_register_callback(spi_device->spi_handle_t->spi_obj, spi_interrupt_callback, spi_device);
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/* Enable the events that will trigger the call back function */
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cyhal_spi_enable_event(spi_device->spi_handle_t->spi_obj, CYHAL_SPI_IRQ_DONE, 4, true);
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}
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static rt_err_t spi_configure(struct rt_spi_device *device,
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struct rt_spi_configuration *configuration)
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{
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struct rt_spi_bus *spi_bus = (struct rt_spi_bus *)device->bus;
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struct ifx_spi *spi_device = (struct ifx_spi *)spi_bus->parent.user_data;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(configuration != RT_NULL);
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struct ifx_spi *spi_device = rt_container_of(device->bus, struct ifx_spi, spi_bus);
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/* data_width */
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if (configuration->data_width <= 8)
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{
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spi_device->spi_obj->data_bits = 8;
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spi_device->spi_handle_t->spi_obj->data_bits = 8;
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}
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else if (configuration->data_width <= 16)
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{
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spi_device->spi_obj->data_bits = 16;
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spi_device->spi_handle_t->spi_obj->data_bits = 16;
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}
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else
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{
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@ -118,26 +143,25 @@ static rt_err_t spi_configure(struct rt_spi_device *device,
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uint32_t max_hz;
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max_hz = configuration->max_hz;
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spi_device->freq = max_hz;
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spi_device->spi_handle_t->freq = max_hz;
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/* MSB or LSB */
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switch (configuration->mode & RT_SPI_MODE_3)
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{
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case RT_SPI_MODE_0:
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spi_device->spi_obj->mode = CYHAL_SPI_MODE_00_MSB;
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spi_device->spi_handle_t->spi_obj->mode = CYHAL_SPI_MODE_00_MSB;
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break;
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case RT_SPI_MODE_1:
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spi_device->spi_obj->mode = CYHAL_SPI_MODE_01_MSB;
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spi_device->spi_handle_t->spi_obj->mode = CYHAL_SPI_MODE_01_MSB;
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break;
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case RT_SPI_MODE_2:
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spi_device->spi_obj->mode = CYHAL_SPI_MODE_10_MSB;
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spi_device->spi_handle_t->spi_obj->mode = CYHAL_SPI_MODE_10_MSB;
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break;
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case RT_SPI_MODE_3:
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spi_device->spi_obj->mode = CYHAL_SPI_MODE_11_MSB;
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spi_device->spi_handle_t->spi_obj->mode = CYHAL_SPI_MODE_11_MSB;
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break;
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}
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@ -151,11 +175,7 @@ static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *m
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RT_ASSERT(device != NULL);
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RT_ASSERT(message != NULL);
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struct rt_spi_bus *spi_bus = (struct rt_spi_bus *)device->bus;
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struct ifx_spi *spi_device = (struct ifx_spi *)spi_bus->parent.user_data;
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struct rt_spi_configuration *config = &device->config;
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struct ifx_sw_spi_cs *cs = device->parent.user_data;
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struct ifx_spi *spi_device = rt_container_of(device->bus, struct ifx_spi, spi_bus);
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/* take CS */
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if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
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if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL)
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{
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/**< receive message */
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result = cyhal_spi_transfer(spi_device->spi_obj, RT_NULL, 0x00, message->recv_buf, message->length, 0x00);
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result = cyhal_spi_transfer(spi_device->spi_handle_t->spi_obj, RT_NULL, 0x00, message->recv_buf, message->length, 0x00);
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}
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else if (message->send_buf != RT_NULL && message->recv_buf == RT_NULL)
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{
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/**< send message */
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result = cyhal_spi_transfer(spi_device->spi_obj, message->send_buf, message->length, RT_NULL, 0x00, 0x00);
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result = cyhal_spi_transfer(spi_device->spi_handle_t->spi_obj, message->send_buf, message->length, RT_NULL, 0x00, 0x00);
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}
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else if (message->send_buf != RT_NULL && message->recv_buf != RT_NULL)
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{
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/**< send and receive message */
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result = cyhal_spi_transfer(spi_device->spi_obj, message->send_buf, message->length, message->recv_buf, message->length, 0x00);
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result = cyhal_spi_transfer(spi_device->spi_handle_t->spi_obj, message->send_buf, message->length, message->recv_buf, message->length, 0x00);
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}
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/* blocking the thread,and the other tasks can run */
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rt_completion_wait(&spi_device->cpt, RT_WAITING_FOREVER);
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}
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if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
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@ -196,7 +219,10 @@ static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *m
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return message->length;
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}
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, uint16_t cs_gpio_pin)
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/**
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* Attach the spi device to SPI bus, this function must be used after initialization.
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*/
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin)
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{
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RT_ASSERT(bus_name != RT_NULL);
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RT_ASSERT(device_name != RT_NULL);
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rt_err_t result;
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struct rt_spi_device *spi_device;
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/* attach the device to spi bus */
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/* attach the device to spi bus*/
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spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
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RT_ASSERT(spi_device != RT_NULL);
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struct ifx_sw_spi_cs *cs_pin = (struct ifx_sw_spi_cs *)rt_malloc(sizeof(struct ifx_sw_spi_cs));
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RT_ASSERT(cs_pin != RT_NULL);
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cs_pin->pin = cs_gpio_pin;
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if (cs_pin->pin != 0x00)
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result = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, cs_pin, RT_NULL);
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if (result != RT_EOK)
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{
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/* initialize the cs pin & select the slave*/
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cyhal_gpio_init(cs_pin->pin, CYHAL_GPIO_DIR_OUTPUT, CYHAL_GPIO_DRIVE_STRONG, 1);
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cyhal_gpio_write(cs_pin->pin, PIN_HIGH);
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LOG_E("%s attach to %s faild, %d\n", device_name, bus_name, result);
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}
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result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
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RT_ASSERT(result == RT_EOK);
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RT_ASSERT(spi_device != RT_NULL);
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LOG_D("%s attach to %s done", device_name, bus_name);
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return result;
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}
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@ -230,23 +251,26 @@ int rt_hw_spi_init(void)
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{
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int result = RT_EOK;
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for (int i = 0; i < sizeof(spi_bus_obj) / sizeof(spi_bus_obj[0]); i++)
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for (int spi_index = 0; spi_index < sizeof(spi_bus_obj) / sizeof(spi_bus_obj[0]); spi_index++)
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{
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spi_bus_obj[i].spi_obj = rt_malloc(sizeof(cyhal_spi_t));
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spi_bus_obj[spi_index].spi_obj = rt_malloc(sizeof(cyhal_spi_t));
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RT_ASSERT(spi_bus_obj[spi_index].spi_obj != RT_NULL);
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RT_ASSERT(spi_bus_obj[i].spi_obj != RT_NULL);
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spi_config[spi_index].spi_handle_t = &spi_bus_obj[spi_index];
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spi_bus_obj[i].spi_bus->parent.user_data = (void *)&spi_bus_obj[i];
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result = rt_spi_bus_register(spi_bus_obj[i].spi_bus, spi_bus_obj[i].bus_name, &ifx_spi_ops);
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RT_ASSERT(result == RT_EOK);
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LOG_D("%s bus init done", spi_bus_obj[i].bus_name);
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rt_err_t err = rt_spi_bus_register(&spi_config[spi_index].spi_bus, spi_bus_obj[spi_index].bus_name, &ifx_spi_ops);
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if (RT_EOK != err)
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{
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LOG_E("%s bus register failed.", spi_config[spi_index].spi_handle_t->bus_name);
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return -RT_ERROR;
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}
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LOG_D("MOSI PIN:[%d], MISO PIN[%d], CLK PIN[%d]\n",
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spi_bus_obj[i].mosi_pin, spi_bus_obj[i].miso_pin,
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spi_bus_obj[i].sck_pin);
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spi_bus_obj[spi_index].mosi_pin, spi_bus_obj[spi_index].miso_pin,
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spi_bus_obj[spi_index].sck_pin);
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/* initialize completion object */
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rt_completion_init(&spi_config[spi_index].cpt);
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}
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return result;
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@ -16,13 +16,9 @@
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#include "drv_gpio.h"
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#define SPI_FREQ_HZ (10000000UL)
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/* gd32 spi dirver class */
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struct ifx_spi
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struct ifx_spi_handle
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{
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char *bus_name;
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struct rt_spi_bus *spi_bus;
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const char *bus_name;
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cyhal_spi_t *spi_obj;
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uint16_t sck_pin;
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uint32_t freq;
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};
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, uint16_t cs_gpio_pin);
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/* ifx spi dirver class */
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struct ifx_spi
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{
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rt_uint32_t cs_pin;
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struct ifx_spi_handle *spi_handle_t;
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struct rt_spi_configuration *rt_spi_cfg_t;
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struct rt_spi_bus spi_bus;
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struct rt_completion cpt;
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};
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin);
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#endif
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#define IFX_EFLASH_END_ADDRESS ((uint32_t)(IFX_EFLASH_START_ADRESS + IFX_EFLASH_SIZE))
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/*SRAM CONFIG*/
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#define IFX_SRAM_SIZE (1014)
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#define IFX_SRAM_SIZE (1013)
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#define IFX_SRAM_END (0x08002000 + IFX_SRAM_SIZE * 1024)
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#ifdef __ARMCC_VERSION
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