fix the startup files of apm32f1 (#5725)

* fix the startup files of apm32f1

* delete ARM folder for apm32f1
This commit is contained in:
stevetong459 2022-03-28 16:50:01 +08:00 committed by GitHub
parent ad90cf59c4
commit 84e18bb2d5
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GPG Key ID: 4AEE18F83AFDEB23
11 changed files with 1646 additions and 2979 deletions

View File

@ -353,20 +353,20 @@
<state>$PROJ_DIR$\..\..\..\components\finsh</state> <state>$PROJ_DIR$\..\..\..\components\finsh</state>
<state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state> <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state> <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
<state>$PROJ_DIR$\..\libraries\Drivers</state> <state>$PROJ_DIR$\..\libraries\Drivers</state>
<state>$PROJ_DIR$\..\libraries\Drivers\config</state> <state>$PROJ_DIR$\..\libraries\Drivers\config</state>
<state>$PROJ_DIR$\..\..\..\components\drivers\include</state> <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
<state>$PROJ_DIR$\..\..\..\examples\utest\testcases\kernel</state>
<state>$PROJ_DIR$\.</state> <state>$PROJ_DIR$\.</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Include</state> <state>$PROJ_DIR$\..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Include</state>
<state>$PROJ_DIR$\applications</state> <state>$PROJ_DIR$\applications</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\APM32F10x_StdPeriphDriver\inc</state> <state>$PROJ_DIR$\..\libraries\APM32F10x_Library\APM32F10x_StdPeriphDriver\inc</state>
<state>$PROJ_DIR$\board</state> <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\common</state> <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state> <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\CMSIS\Include</state> <state>$PROJ_DIR$\..\libraries\APM32F10x_Library\CMSIS\Include</state>
<state>$PROJ_DIR$\..\..\..\include</state> <state>$PROJ_DIR$\..\..\..\include</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\nogcc</state> <state>$PROJ_DIR$\board</state>
</option> </option>
<option> <option>
<name>CCStdIncCheck</name> <name>CCStdIncCheck</name>
@ -1430,20 +1430,20 @@
<state>$PROJ_DIR$\..\..\..\components\finsh</state> <state>$PROJ_DIR$\..\..\..\components\finsh</state>
<state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state> <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state> <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
<state>$PROJ_DIR$\..\libraries\Drivers</state> <state>$PROJ_DIR$\..\libraries\Drivers</state>
<state>$PROJ_DIR$\..\libraries\Drivers\config</state> <state>$PROJ_DIR$\..\libraries\Drivers\config</state>
<state>$PROJ_DIR$\..\..\..\components\drivers\include</state> <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
<state>$PROJ_DIR$\..\..\..\examples\utest\testcases\kernel</state>
<state>$PROJ_DIR$\.</state> <state>$PROJ_DIR$\.</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Include</state> <state>$PROJ_DIR$\..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Include</state>
<state>$PROJ_DIR$\applications</state> <state>$PROJ_DIR$\applications</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\APM32F10x_StdPeriphDriver\inc</state> <state>$PROJ_DIR$\..\libraries\APM32F10x_Library\APM32F10x_StdPeriphDriver\inc</state>
<state>$PROJ_DIR$\board</state> <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\common</state> <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state> <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\CMSIS\Include</state> <state>$PROJ_DIR$\..\libraries\APM32F10x_Library\CMSIS\Include</state>
<state>$PROJ_DIR$\..\..\..\include</state> <state>$PROJ_DIR$\..\..\..\include</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\nogcc</state> <state>$PROJ_DIR$\board</state>
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<option> <option>
<name>CCStdIncCheck</name> <name>CCStdIncCheck</name>
@ -2169,44 +2169,44 @@
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\common\stdlib.c</name> <name>$PROJ_DIR$\..\..\..\components\libc\compilers\common\stdlib.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscalls.c</name> <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_write.c</name> <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_write.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\environ.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c</name> <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c</name> <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c</name>
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<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\environ.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c</name> <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c</name> <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscalls.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c</name>
</file> </file>
</group> </group>
<group> <group>
<name>CPU</name> <name>CPU</name>
<file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c</name> <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c</name> <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\cpuport.c</name> <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\cpuport.c</name>
</file> </file>
@ -2216,33 +2216,33 @@
</group> </group>
<group> <group>
<name>DeviceDrivers</name> <name>DeviceDrivers</name>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\workqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\dataqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\ringbuffer.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\ringblk_buf.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\pipe.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\waitqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\components\drivers\misc\pin.c</name> <name>$PROJ_DIR$\..\..\..\components\drivers\misc\pin.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\components\drivers\serial\serial.c</name> <name>$PROJ_DIR$\..\..\..\components\drivers\serial\serial.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\completion.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\pipe.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c</name>
</file>
</group> </group>
<group> <group>
<name>Drivers</name> <name>Drivers</name>
@ -2277,44 +2277,44 @@
<group> <group>
<name>Kernel</name> <name>Kernel</name>
<file> <file>
<name>$PROJ_DIR$\..\..\..\src\scheduler.c</name> <name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\src\mem.c</name> <name>$PROJ_DIR$\..\..\..\src\mem.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\..\..\..\src\components.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\mempool.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\src\clock.c</name> <name>$PROJ_DIR$\..\..\..\src\clock.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\src\object.c</name> <name>$PROJ_DIR$\..\..\..\src\components.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\src\timer.c</name> <name>$PROJ_DIR$\..\..\..\src\timer.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\src\irq.c</name> <name>$PROJ_DIR$\..\..\..\src\scheduler.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\mempool.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\src\idle.c</name> <name>$PROJ_DIR$\..\..\..\src\idle.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\src\device.c</name> <name>$PROJ_DIR$\..\..\..\src\object.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\src\thread.c</name> <name>$PROJ_DIR$\..\..\..\src\thread.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\device.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\irq.c</name>
</file>
</group> </group>
<group> <group>
<name>Libraries</name> <name>Libraries</name>
@ -2340,7 +2340,4 @@
<group> <group>
<name>POSIX</name> <name>POSIX</name>
</group> </group>
<group>
<name>utestcases</name>
</group>
</project> </project>

View File

@ -73,11 +73,11 @@
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@ -175,631 +175,11 @@
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View File

@ -335,7 +335,7 @@
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View File

@ -1,465 +0,0 @@
;/*!
; * @file startup_apm32f10x_hd.s
; *
; * @brief CMSIS Cortex-M3 based Core Device Startup File for Device startup_apm32f10x_hd
; *
; * @version V1.0.2
; *
; * @date 2022-01-05
; *
; * @attention
; *
; * Copyright (C) 2020-2022 Geehy Semiconductor
; *
; * You may not use this file except in compliance with the
; * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
; *
; * The program is only for reference, which is distributed in the hope
; * that it will be usefull and instructional for customers to develop
; * their software. Unless required by applicable law or agreed to in
; * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
; * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
; * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
; * and limitations under the License.
; */
;
<h> Stack Configuration
;
<o> Stack Size(in Bytes) < 0x0 - 0xFFFFFFFF: 8 >
;
< / h >
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN = 3
Stack_Mem SPACE Stack_Size
__initial_sp
;
<h> Heap Configuration
;
<o> Heap Size(in Bytes) < 0x0 - 0xFFFFFFFF: 8 >
;
< / h >
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN = 3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
;
Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ;
Top of Stack
DCD Reset_Handler ;
Reset Handler
DCD NMI_Handler ;
NMI Handler
DCD HardFault_Handler ;
Hard Fault Handler
DCD MemManage_Handler ;
MPU Fault Handler
DCD BusFault_Handler ;
Bus Fault Handler
DCD UsageFault_Handler ;
Usage Fault Handler
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD SVC_Handler ;
SVCall Handler
DCD DebugMon_Handler ;
Debug Monitor Handler
DCD 0 ;
Reserved
DCD PendSV_Handler ;
PendSV Handler
DCD SysTick_Handler ;
SysTick Handler
;
External Interrupts
DCD WWDT_IRQHandler ;
Window Watchdog
DCD PVD_IRQHandler ;
PVD through EINT Line detect
DCD TAMPER_IRQHandler ;
Tamper
DCD RTC_IRQHandler ;
RTC
DCD FLASH_IRQHandler ;
Flash
DCD RCM_IRQHandler ;
RCM
DCD EINT0_IRQHandler ;
EINT Line 0
DCD EINT1_IRQHandler ;
EINT Line 1
DCD EINT2_IRQHandler ;
EINT Line 2
DCD EINT3_IRQHandler ;
EINT Line 3
DCD EINT4_IRQHandler ;
EINT Line 4
DCD DMA1_Channel1_IRQHandler ;
DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ;
DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ;
DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ;
DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ;
DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ;
DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ;
DMA1 Channel 7
DCD ADC1_2_IRQHandler ;
ADC1 &ADC2
DCD USBD1_HP_CAN1_TX_IRQHandler ;
USBD1 High Priority or CAN1 TX
DCD USBD1_LP_CAN1_RX0_IRQHandler ;
USBD1 Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ;
CAN1 RX1
DCD CAN1_SCE_IRQHandler ;
CAN1 SCE
DCD EINT9_5_IRQHandler ;
EINT Line 9..5
DCD TMR1_BRK_IRQHandler ;
TMR1 Break
DCD TMR1_UP_IRQHandler ;
TMR1 Update
DCD TMR1_TRG_COM_IRQHandler ;
TMR1 Trigger and Commutation
DCD TMR1_CC_IRQHandler ;
TMR1 Capture Compare
DCD TMR2_IRQHandler ;
TMR2
DCD TMR3_IRQHandler ;
TMR3
DCD TMR4_IRQHandler ;
TMR4
DCD I2C1_EV_IRQHandler ;
I2C1 Event
DCD I2C1_ER_IRQHandler ;
I2C1 Error
DCD I2C2_EV_IRQHandler ;
I2C2 Event
DCD I2C2_ER_IRQHandler ;
I2C2 Error
DCD SPI1_IRQHandler ;
SPI1
DCD SPI2_IRQHandler ;
SPI2
DCD USART1_IRQHandler ;
USART1
DCD USART2_IRQHandler ;
USART2
DCD USART3_IRQHandler ;
USART3
DCD EINT15_10_IRQHandler ;
EINT Line 15..10
DCD RTCAlarm_IRQHandler ;
RTC Alarm through EINT Line
DCD USBDWakeUp_IRQHandler ;
USBD Wakeup from suspend
DCD TMR8_BRK_IRQHandler ;
TMR8 Break
DCD TMR8_UP_IRQHandler ;
TMR8 Update
DCD TMR8_TRG_COM_IRQHandler ;
TMR8 Trigger and Commutation
DCD TMR8_CC_IRQHandler ;
TMR8 Capture Compare
DCD ADC3_IRQHandler ;
ADC3
DCD EMMC_IRQHandler ;
EMMC
DCD SDIO_IRQHandler ;
SDIO
DCD TMR5_IRQHandler ;
TMR5
DCD SPI3_IRQHandler ;
SPI3
DCD UART4_IRQHandler ;
UART4
DCD UART5_IRQHandler ;
UART5
DCD TMR6_IRQHandler ;
TMR6
DCD TMR7_IRQHandler ;
TMR7
DCD DMA2_Channel1_IRQHandler ;
DMA2 Channel1
DCD DMA2_Channel2_IRQHandler ;
DMA2 Channel2
DCD DMA2_Channel3_IRQHandler ;
DMA2 Channel3
DCD DMA2_Channel4_5_IRQHandler ;
DMA2 Channel4 &Channel5
DCD 0 ;
Reserved
DCD USBD2_HP_CAN2_TX_IRQHandler ;
USBD2 High Priority or CAN2 TX
DCD USBD2_LP_CAN2_RX0_IRQHandler ;
USBD2 Low Priority or CAN2 RX0
DCD CAN2_RX1_IRQHandler ;
CAN2 RX1
DCD CAN2_SCE_IRQHandler ;
CAN2 SCE
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA | .text |, CODE, READONLY
;
Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, = SystemInit
BLX R0
LDR R0, = __main
BX R0
ENDP
;
Dummy Exception Handlers(infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDT_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCM_IRQHandler [WEAK]
EXPORT EINT0_IRQHandler [WEAK]
EXPORT EINT1_IRQHandler [WEAK]
EXPORT EINT2_IRQHandler [WEAK]
EXPORT EINT3_IRQHandler [WEAK]
EXPORT EINT4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USBD1_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USBD1_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EINT9_5_IRQHandler [WEAK]
EXPORT TMR1_BRK_IRQHandler [WEAK]
EXPORT TMR1_UP_IRQHandler [WEAK]
EXPORT TMR1_TRG_COM_IRQHandler [WEAK]
EXPORT TMR1_CC_IRQHandler [WEAK]
EXPORT TMR2_IRQHandler [WEAK]
EXPORT TMR3_IRQHandler [WEAK]
EXPORT TMR4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EINT15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBDWakeUp_IRQHandler [WEAK]
EXPORT TMR8_BRK_IRQHandler [WEAK]
EXPORT TMR8_UP_IRQHandler [WEAK]
EXPORT TMR8_TRG_COM_IRQHandler [WEAK]
EXPORT TMR8_CC_IRQHandler [WEAK]
EXPORT ADC3_IRQHandler [WEAK]
EXPORT EMMC_IRQHandler [WEAK]
EXPORT SDIO_IRQHandler [WEAK]
EXPORT TMR5_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT TMR6_IRQHandler [WEAK]
EXPORT TMR7_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
EXPORT USBD2_HP_CAN2_TX_IRQHandler [WEAK]
EXPORT USBD2_LP_CAN2_RX0_IRQHandler [WEAK]
EXPORT CAN2_RX1_IRQHandler [WEAK]
EXPORT CAN2_SCE_IRQHandler [WEAK]
WWDT_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCM_IRQHandler
EINT0_IRQHandler
EINT1_IRQHandler
EINT2_IRQHandler
EINT3_IRQHandler
EINT4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USBD1_HP_CAN1_TX_IRQHandler
USBD1_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EINT9_5_IRQHandler
TMR1_BRK_IRQHandler
TMR1_UP_IRQHandler
TMR1_TRG_COM_IRQHandler
TMR1_CC_IRQHandler
TMR2_IRQHandler
TMR3_IRQHandler
TMR4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EINT15_10_IRQHandler
RTCAlarm_IRQHandler
USBDWakeUp_IRQHandler
TMR8_BRK_IRQHandler
TMR8_UP_IRQHandler
TMR8_TRG_COM_IRQHandler
TMR8_CC_IRQHandler
ADC3_IRQHandler
EMMC_IRQHandler
SDIO_IRQHandler
TMR5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TMR6_IRQHandler
TMR7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_5_IRQHandler
USBD2_HP_CAN2_TX_IRQHandler
USBD2_LP_CAN2_RX0_IRQHandler
CAN2_RX1_IRQHandler
CAN2_SCE_IRQHandler
B .
ENDP
ALIGN
;
*******************************************************************************
;
User Stack and Heap initialization
;
*******************************************************************************
IF :
DEF:
__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;
*******************************END OF FILE ************************************

View File

@ -1,394 +0,0 @@
;/*!
; * @file startup_apm32f10x_md.s
; *
; * @brief CMSIS Cortex-M3 based Core Device Startup File for Device startup_apm32f10x_md
; *
; * @version V1.0.2
; *
; * @date 2022-01-05
; *
; * @attention
; *
; * Copyright (C) 2020-2022 Geehy Semiconductor
; *
; * You may not use this file except in compliance with the
; * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
; *
; * The program is only for reference, which is distributed in the hope
; * that it will be usefull and instructional for customers to develop
; * their software. Unless required by applicable law or agreed to in
; * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
; * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
; * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
; * and limitations under the License.
; */
;
<h> Stack Configuration
;
<o> Stack Size(in Bytes) < 0x0 - 0xFFFFFFFF: 8 >
;
< / h >
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN = 3
Stack_Mem SPACE Stack_Size
__initial_sp
;
<h> Heap Configuration
;
<o> Heap Size(in Bytes) < 0x0 - 0xFFFFFFFF: 8 >
;
< / h >
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN = 3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
;
Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ;
Top of Stack
DCD Reset_Handler ;
Reset Handler
DCD NMI_Handler ;
NMI Handler
DCD HardFault_Handler ;
Hard Fault Handler
DCD MemManage_Handler ;
MPU Fault Handler
DCD BusFault_Handler ;
Bus Fault Handler
DCD UsageFault_Handler ;
Usage Fault Handler
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD SVC_Handler ;
SVCall Handler
DCD DebugMon_Handler ;
Debug Monitor Handler
DCD 0 ;
Reserved
DCD PendSV_Handler ;
PendSV Handler
DCD SysTick_Handler ;
SysTick Handler
;
External Interrupts
DCD WWDT_IRQHandler ;
Window Watchdog
DCD PVD_IRQHandler ;
PVD through EINT Line detect
DCD TAMPER_IRQHandler ;
Tamper
DCD RTC_IRQHandler ;
RTC
DCD FLASH_IRQHandler ;
Flash
DCD RCM_IRQHandler ;
RCM
DCD EINT0_IRQHandler ;
EINT Line 0
DCD EINT1_IRQHandler ;
EINT Line 1
DCD EINT2_IRQHandler ;
EINT Line 2
DCD EINT3_IRQHandler ;
EINT Line 3
DCD EINT4_IRQHandler ;
EINT Line 4
DCD DMA1_Channel1_IRQHandler ;
DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ;
DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ;
DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ;
DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ;
DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ;
DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ;
DMA1 Channel 7
DCD ADC1_2_IRQHandler ;
ADC1_2
DCD USBD1_HP_CAN1_TX_IRQHandler ;
USBD1 High Priority or CAN1 TX
DCD USBD1_LP_CAN1_RX0_IRQHandler ;
USBD1 Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ;
CAN1 RX1
DCD CAN1_SCE_IRQHandler ;
CAN1 SCE
DCD EINT9_5_IRQHandler ;
EINT Line 9..5
DCD TMR1_BRK_IRQHandler ;
TMR1 Break
DCD TMR1_UP_IRQHandler ;
TMR1 Update
DCD TMR1_TRG_COM_IRQHandler ;
TMR1 Trigger and Commutation
DCD TMR1_CC_IRQHandler ;
TMR1 Capture Compare
DCD TMR2_IRQHandler ;
TMR2
DCD TMR3_IRQHandler ;
TMR3
DCD TMR4_IRQHandler ;
TMR4
DCD I2C1_EV_IRQHandler ;
I2C1 Event
DCD I2C1_ER_IRQHandler ;
I2C1 Error
DCD I2C2_EV_IRQHandler ;
I2C2 Event
DCD I2C2_ER_IRQHandler ;
I2C2 Error
DCD SPI1_IRQHandler ;
SPI1
DCD SPI2_IRQHandler ;
SPI2
DCD USART1_IRQHandler ;
USART1
DCD USART2_IRQHandler ;
USART2
DCD USART3_IRQHandler ;
USART3
DCD EINT15_10_IRQHandler ;
EINT Line 15..10
DCD RTCAlarm_IRQHandler ;
RTC Alarm through EINT Line
DCD USBDWakeUp_IRQHandler ;
USBD Wakeup from suspend
DCD FPU_IRQHandler ;
FPU
DCD QSPI_IRQHandler ;
QSPI
DCD USBD2_HP_IRQHandler ;
USBD2 High Priority
DCD USBD2_LP_IRQHandler ;
USBD2 Low Priority
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA | .text |, CODE, READONLY
;
Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, = SystemInit
BLX R0
LDR R0, = __main
BX R0
ENDP
;
Dummy Exception Handlers(infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDT_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCM_IRQHandler [WEAK]
EXPORT EINT0_IRQHandler [WEAK]
EXPORT EINT1_IRQHandler [WEAK]
EXPORT EINT2_IRQHandler [WEAK]
EXPORT EINT3_IRQHandler [WEAK]
EXPORT EINT4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USBD1_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USBD1_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EINT9_5_IRQHandler [WEAK]
EXPORT TMR1_BRK_IRQHandler [WEAK]
EXPORT TMR1_UP_IRQHandler [WEAK]
EXPORT TMR1_TRG_COM_IRQHandler [WEAK]
EXPORT TMR1_CC_IRQHandler [WEAK]
EXPORT TMR2_IRQHandler [WEAK]
EXPORT TMR3_IRQHandler [WEAK]
EXPORT TMR4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EINT15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBDWakeUp_IRQHandler [WEAK]
EXPORT FPU_IRQHandler [WEAK]
EXPORT QSPI_IRQHandler [WEAK]
EXPORT USBD2_HP_IRQHandler [WEAK]
EXPORT USBD2_LP_IRQHandler [WEAK]
WWDT_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCM_IRQHandler
EINT0_IRQHandler
EINT1_IRQHandler
EINT2_IRQHandler
EINT3_IRQHandler
EINT4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USBD1_HP_CAN1_TX_IRQHandler
USBD1_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EINT9_5_IRQHandler
TMR1_BRK_IRQHandler
TMR1_UP_IRQHandler
TMR1_TRG_COM_IRQHandler
TMR1_CC_IRQHandler
TMR2_IRQHandler
TMR3_IRQHandler
TMR4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EINT15_10_IRQHandler
RTCAlarm_IRQHandler
USBDWakeUp_IRQHandler
FPU_IRQHandler
QSPI_IRQHandler
USBD2_HP_IRQHandler
USBD2_LP_IRQHandler
B .
ENDP
ALIGN
;
*******************************************************************************
;
User Stack and Heap initialization
;
*******************************************************************************
IF :
DEF:
__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;
*******************************END OF FILE ************************************

View File

@ -0,0 +1,368 @@
;/*!
; * @file startup_apm32f10x_hd.s
; *
; * @brief CMSIS Cortex-M3 based Core Device Startup File for Device startup_apm32f10x_hd
; *
; * @version V1.0.2
; *
; * @date 2022-01-05
; *
; * @attention
; *
; * Copyright (C) 2020-2022 Geehy Semiconductor
; *
; * You may not use this file except in compliance with the
; * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
; *
; * The program is only for reference, which is distributed in the hope
; * that it will be usefull and instructional for customers to develop
; * their software. Unless required by applicable law or agreed to in
; * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
; * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
; * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
; * and limitations under the License.
; */
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDT_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EINT Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCM_IRQHandler ; RCM
DCD EINT0_IRQHandler ; EINT Line 0
DCD EINT1_IRQHandler ; EINT Line 1
DCD EINT2_IRQHandler ; EINT Line 2
DCD EINT3_IRQHandler ; EINT Line 3
DCD EINT4_IRQHandler ; EINT Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1 & ADC2
DCD USBD1_HP_CAN1_TX_IRQHandler ; USBD1 High Priority or CAN1 TX
DCD USBD1_LP_CAN1_RX0_IRQHandler ; USBD1 Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EINT9_5_IRQHandler ; EINT Line 9..5
DCD TMR1_BRK_IRQHandler ; TMR1 Break
DCD TMR1_UP_IRQHandler ; TMR1 Update
DCD TMR1_TRG_COM_IRQHandler ; TMR1 Trigger and Commutation
DCD TMR1_CC_IRQHandler ; TMR1 Capture Compare
DCD TMR2_IRQHandler ; TMR2
DCD TMR3_IRQHandler ; TMR3
DCD TMR4_IRQHandler ; TMR4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EINT15_10_IRQHandler ; EINT Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EINT Line
DCD USBDWakeUp_IRQHandler ; USBD Wakeup from suspend
DCD TMR8_BRK_IRQHandler ; TMR8 Break
DCD TMR8_UP_IRQHandler ; TMR8 Update
DCD TMR8_TRG_COM_IRQHandler ; TMR8 Trigger and Commutation
DCD TMR8_CC_IRQHandler ; TMR8 Capture Compare
DCD ADC3_IRQHandler ; ADC3
DCD EMMC_IRQHandler ; EMMC
DCD SDIO_IRQHandler ; SDIO
DCD TMR5_IRQHandler ; TMR5
DCD SPI3_IRQHandler ; SPI3
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD TMR6_IRQHandler ; TMR6
DCD TMR7_IRQHandler ; TMR7
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
DCD 0 ; Reserved
DCD USBD2_HP_CAN2_TX_IRQHandler ; USBD2 High Priority or CAN2 TX
DCD USBD2_LP_CAN2_RX0_IRQHandler ; USBD2 Low Priority or CAN2 RX0
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
DCD CAN2_SCE_IRQHandler ; CAN2 SCE
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDT_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCM_IRQHandler [WEAK]
EXPORT EINT0_IRQHandler [WEAK]
EXPORT EINT1_IRQHandler [WEAK]
EXPORT EINT2_IRQHandler [WEAK]
EXPORT EINT3_IRQHandler [WEAK]
EXPORT EINT4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USBD1_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USBD1_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EINT9_5_IRQHandler [WEAK]
EXPORT TMR1_BRK_IRQHandler [WEAK]
EXPORT TMR1_UP_IRQHandler [WEAK]
EXPORT TMR1_TRG_COM_IRQHandler [WEAK]
EXPORT TMR1_CC_IRQHandler [WEAK]
EXPORT TMR2_IRQHandler [WEAK]
EXPORT TMR3_IRQHandler [WEAK]
EXPORT TMR4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EINT15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBDWakeUp_IRQHandler [WEAK]
EXPORT TMR8_BRK_IRQHandler [WEAK]
EXPORT TMR8_UP_IRQHandler [WEAK]
EXPORT TMR8_TRG_COM_IRQHandler [WEAK]
EXPORT TMR8_CC_IRQHandler [WEAK]
EXPORT ADC3_IRQHandler [WEAK]
EXPORT EMMC_IRQHandler [WEAK]
EXPORT SDIO_IRQHandler [WEAK]
EXPORT TMR5_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT TMR6_IRQHandler [WEAK]
EXPORT TMR7_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
EXPORT USBD2_HP_CAN2_TX_IRQHandler [WEAK]
EXPORT USBD2_LP_CAN2_RX0_IRQHandler [WEAK]
EXPORT CAN2_RX1_IRQHandler [WEAK]
EXPORT CAN2_SCE_IRQHandler [WEAK]
WWDT_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCM_IRQHandler
EINT0_IRQHandler
EINT1_IRQHandler
EINT2_IRQHandler
EINT3_IRQHandler
EINT4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USBD1_HP_CAN1_TX_IRQHandler
USBD1_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EINT9_5_IRQHandler
TMR1_BRK_IRQHandler
TMR1_UP_IRQHandler
TMR1_TRG_COM_IRQHandler
TMR1_CC_IRQHandler
TMR2_IRQHandler
TMR3_IRQHandler
TMR4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EINT15_10_IRQHandler
RTCAlarm_IRQHandler
USBDWakeUp_IRQHandler
TMR8_BRK_IRQHandler
TMR8_UP_IRQHandler
TMR8_TRG_COM_IRQHandler
TMR8_CC_IRQHandler
ADC3_IRQHandler
EMMC_IRQHandler
SDIO_IRQHandler
TMR5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TMR6_IRQHandler
TMR7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_5_IRQHandler
USBD2_HP_CAN2_TX_IRQHandler
USBD2_LP_CAN2_RX0_IRQHandler
CAN2_RX1_IRQHandler
CAN2_SCE_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;*******************************END OF FILE************************************

View File

@ -0,0 +1,315 @@
;/*!
; * @file startup_apm32f10x_md.s
; *
; * @brief CMSIS Cortex-M3 based Core Device Startup File for Device startup_apm32f10x_md
; *
; * @version V1.0.2
; *
; * @date 2022-01-05
; *
; * @attention
; *
; * Copyright (C) 2020-2022 Geehy Semiconductor
; *
; * You may not use this file except in compliance with the
; * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
; *
; * The program is only for reference, which is distributed in the hope
; * that it will be usefull and instructional for customers to develop
; * their software. Unless required by applicable law or agreed to in
; * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
; * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
; * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
; * and limitations under the License.
; */
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDT_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EINT Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCM_IRQHandler ; RCM
DCD EINT0_IRQHandler ; EINT Line 0
DCD EINT1_IRQHandler ; EINT Line 1
DCD EINT2_IRQHandler ; EINT Line 2
DCD EINT3_IRQHandler ; EINT Line 3
DCD EINT4_IRQHandler ; EINT Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USBD1_HP_CAN1_TX_IRQHandler ; USBD1 High Priority or CAN1 TX
DCD USBD1_LP_CAN1_RX0_IRQHandler ; USBD1 Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EINT9_5_IRQHandler ; EINT Line 9..5
DCD TMR1_BRK_IRQHandler ; TMR1 Break
DCD TMR1_UP_IRQHandler ; TMR1 Update
DCD TMR1_TRG_COM_IRQHandler ; TMR1 Trigger and Commutation
DCD TMR1_CC_IRQHandler ; TMR1 Capture Compare
DCD TMR2_IRQHandler ; TMR2
DCD TMR3_IRQHandler ; TMR3
DCD TMR4_IRQHandler ; TMR4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EINT15_10_IRQHandler ; EINT Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EINT Line
DCD USBDWakeUp_IRQHandler ; USBD Wakeup from suspend
DCD FPU_IRQHandler ; FPU
DCD QSPI_IRQHandler ; QSPI
DCD USBD2_HP_IRQHandler ; USBD2 High Priority
DCD USBD2_LP_IRQHandler ; USBD2 Low Priority
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDT_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCM_IRQHandler [WEAK]
EXPORT EINT0_IRQHandler [WEAK]
EXPORT EINT1_IRQHandler [WEAK]
EXPORT EINT2_IRQHandler [WEAK]
EXPORT EINT3_IRQHandler [WEAK]
EXPORT EINT4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USBD1_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USBD1_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EINT9_5_IRQHandler [WEAK]
EXPORT TMR1_BRK_IRQHandler [WEAK]
EXPORT TMR1_UP_IRQHandler [WEAK]
EXPORT TMR1_TRG_COM_IRQHandler [WEAK]
EXPORT TMR1_CC_IRQHandler [WEAK]
EXPORT TMR2_IRQHandler [WEAK]
EXPORT TMR3_IRQHandler [WEAK]
EXPORT TMR4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EINT15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBDWakeUp_IRQHandler [WEAK]
EXPORT FPU_IRQHandler [WEAK]
EXPORT QSPI_IRQHandler [WEAK]
EXPORT USBD2_HP_IRQHandler [WEAK]
EXPORT USBD2_LP_IRQHandler [WEAK]
WWDT_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCM_IRQHandler
EINT0_IRQHandler
EINT1_IRQHandler
EINT2_IRQHandler
EINT3_IRQHandler
EINT4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USBD1_HP_CAN1_TX_IRQHandler
USBD1_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EINT9_5_IRQHandler
TMR1_BRK_IRQHandler
TMR1_UP_IRQHandler
TMR1_TRG_COM_IRQHandler
TMR1_CC_IRQHandler
TMR2_IRQHandler
TMR3_IRQHandler
TMR4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EINT15_10_IRQHandler
RTCAlarm_IRQHandler
USBDWakeUp_IRQHandler
FPU_IRQHandler
QSPI_IRQHandler
USBD2_HP_IRQHandler
USBD2_LP_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;*******************************END OF FILE************************************

View File

@ -25,15 +25,10 @@
MODULE ?cstartup MODULE ?cstartup
;; ;; Forward declaration of sections.
Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3)
SECTION CSTACK:
DATA:
NOROOT(3)
SECTION .intvec: SECTION .intvec:CODE:NOROOT(2)
CODE:
NOROOT(2)
EXTERN __iar_program_start EXTERN __iar_program_start
@ -44,181 +39,96 @@ DATA
__vector_table __vector_table
DCD sfe(CSTACK) DCD sfe(CSTACK)
DCD Reset_Handler ; DCD Reset_Handler ; Reset Handler
Reset Handler DCD NMI_Handler ; NMI Handler
DCD NMI_Handler ; DCD HardFault_Handler ; Hard Fault Handler
NMI Handler DCD MemManage_Handler ; MPU Fault Handler
DCD HardFault_Handler ; DCD BusFault_Handler ; Bus Fault Handler
Hard Fault Handler DCD UsageFault_Handler ; Usage Fault Handler
DCD MemManage_Handler ; DCD 0 ; Reserved
MPU Fault Handler DCD 0 ; Reserved
DCD BusFault_Handler ; DCD 0 ; Reserved
Bus Fault Handler DCD 0 ; Reserved
DCD UsageFault_Handler ; DCD SVC_Handler ; SVCall Handler
Usage Fault Handler DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; DCD 0 ; Reserved
Reserved DCD PendSV_Handler ; PendSV Handler
DCD 0 ; DCD SysTick_Handler ; SysTick Handler
Reserved
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD SVC_Handler ;
SVCall Handler
DCD DebugMon_Handler ;
Debug Monitor Handler
DCD 0 ;
Reserved
DCD PendSV_Handler ;
PendSV Handler
DCD SysTick_Handler ;
SysTick Handler
; ; External Interrupts
External Interrupts DCD WWDT_IRQHandler ; Window Watchdog
DCD WWDT_IRQHandler ; DCD PVD_IRQHandler ; PVD through EINT Line detect
Window Watchdog DCD TAMPER_IRQHandler ; Tamper
DCD PVD_IRQHandler ; DCD RTC_IRQHandler ; RTC
PVD through EINT Line detect DCD FLASH_IRQHandler ; Flash
DCD TAMPER_IRQHandler ; DCD RCM_IRQHandler ; RCM
Tamper DCD EINT0_IRQHandler ; EINT Line 0
DCD RTC_IRQHandler ; DCD EINT1_IRQHandler ; EINT Line 1
RTC DCD EINT2_IRQHandler ; EINT Line 2
DCD FLASH_IRQHandler ; DCD EINT3_IRQHandler ; EINT Line 3
Flash DCD EINT4_IRQHandler ; EINT Line 4
DCD RCM_IRQHandler ; DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
RCM DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD EINT0_IRQHandler ; DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
EINT Line 0 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD EINT1_IRQHandler ; DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
EINT Line 1 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD EINT2_IRQHandler ; DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
EINT Line 2 DCD ADC1_2_IRQHandler ; ADC1 & ADC2
DCD EINT3_IRQHandler ; DCD USBD1_HP_CAN1_TX_IRQHandler ; USBD1 High Priority or CAN1 TX
EINT Line 3 DCD USBD1_LP_CAN1_RX0_IRQHandler ; USBD1 Low Priority or CAN1 RX0
DCD EINT4_IRQHandler ; DCD CAN1_RX1_IRQHandler ; CAN1 RX1
EINT Line 4 DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD DMA1_Channel1_IRQHandler ; DCD EINT9_5_IRQHandler ; EINT Line 9..5
DMA1 Channel 1 DCD TMR1_BRK_IRQHandler ; TMR1 Break
DCD DMA1_Channel2_IRQHandler ; DCD TMR1_UP_IRQHandler ; TMR1 Update
DMA1 Channel 2 DCD TMR1_TRG_COM_IRQHandler ; TMR1 Trigger and Commutation
DCD DMA1_Channel3_IRQHandler ; DCD TMR1_CC_IRQHandler ; TMR1 Capture Compare
DMA1 Channel 3 DCD TMR2_IRQHandler ; TMR2
DCD DMA1_Channel4_IRQHandler ; DCD TMR3_IRQHandler ; TMR3
DMA1 Channel 4 DCD TMR4_IRQHandler ; TMR4
DCD DMA1_Channel5_IRQHandler ; DCD I2C1_EV_IRQHandler ; I2C1 Event
DMA1 Channel 5 DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD DMA1_Channel6_IRQHandler ; DCD I2C2_EV_IRQHandler ; I2C2 Event
DMA1 Channel 6 DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD DMA1_Channel7_IRQHandler ; DCD SPI1_IRQHandler ; SPI1
DMA1 Channel 7 DCD SPI2_IRQHandler ; SPI2
DCD ADC1_2_IRQHandler ; DCD USART1_IRQHandler ; USART1
ADC1 &ADC2 DCD USART2_IRQHandler ; USART2
DCD USBD1_HP_CAN1_TX_IRQHandler ; DCD USART3_IRQHandler ; USART3
USBD1 High Priority or CAN1 TX DCD EINT15_10_IRQHandler ; EINT Line 15..10
DCD USBD1_LP_CAN1_RX0_IRQHandler ; DCD RTCAlarm_IRQHandler ; RTC Alarm through EINT Line
USBD1 Low Priority or CAN1 RX0 DCD USBDWakeUp_IRQHandler ; USBD Wakeup from suspend
DCD CAN1_RX1_IRQHandler ; DCD TMR8_BRK_IRQHandler ; TMR8 Break
CAN1 RX1 DCD TMR8_UP_IRQHandler ; TMR8 Update
DCD CAN1_SCE_IRQHandler ; DCD TMR8_TRG_COM_IRQHandler ; TMR8 Trigger and Commutation
CAN1 SCE DCD TMR8_CC_IRQHandler ; TMR8 Capture Compare
DCD EINT9_5_IRQHandler ; DCD ADC3_IRQHandler ; ADC3
EINT Line 9..5 DCD EMMC_IRQHandler ; EMMC
DCD TMR1_BRK_IRQHandler ; DCD SDIO_IRQHandler ; SDIO
TMR1 Break DCD TMR5_IRQHandler ; TMR5
DCD TMR1_UP_IRQHandler ; DCD SPI3_IRQHandler ; SPI3
TMR1 Update DCD UART4_IRQHandler ; UART4
DCD TMR1_TRG_COM_IRQHandler ; DCD UART5_IRQHandler ; UART5
TMR1 Trigger and Commutation DCD TMR6_IRQHandler ; TMR6
DCD TMR1_CC_IRQHandler ; DCD TMR7_IRQHandler ; TMR7
TMR1 Capture Compare DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
DCD TMR2_IRQHandler ; DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
TMR2 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
DCD TMR3_IRQHandler ; DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
TMR3 DCD 0 ; Reserved
DCD TMR4_IRQHandler ; DCD USBD2_HP_CAN2_TX_IRQHandler ; USBD2 High Priority or CAN2 TX
TMR4 DCD USBD2_LP_CAN2_RX0_IRQHandler ; USBD2 Low Priority or CAN2 RX0
DCD I2C1_EV_IRQHandler ; DCD CAN2_RX1_IRQHandler ; CAN2 RX1
I2C1 Event DCD CAN2_SCE_IRQHandler ; CAN2 SCE
DCD I2C1_ER_IRQHandler ;
I2C1 Error
DCD I2C2_EV_IRQHandler ;
I2C2 Event
DCD I2C2_ER_IRQHandler ;
I2C2 Error
DCD SPI1_IRQHandler ;
SPI1
DCD SPI2_IRQHandler ;
SPI2
DCD USART1_IRQHandler ;
USART1
DCD USART2_IRQHandler ;
USART2
DCD USART3_IRQHandler ;
USART3
DCD EINT15_10_IRQHandler ;
EINT Line 15..10
DCD RTCAlarm_IRQHandler ;
RTC Alarm through EINT Line
DCD USBDWakeUp_IRQHandler ;
USBD Wakeup from suspend
DCD TMR8_BRK_IRQHandler ;
TMR8 Break
DCD TMR8_UP_IRQHandler ;
TMR8 Update
DCD TMR8_TRG_COM_IRQHandler ;
TMR8 Trigger and Commutation
DCD TMR8_CC_IRQHandler ;
TMR8 Capture Compare
DCD ADC3_IRQHandler ;
ADC3
DCD EMMC_IRQHandler ;
EMMC
DCD SDIO_IRQHandler ;
SDIO
DCD TMR5_IRQHandler ;
TMR5
DCD SPI3_IRQHandler ;
SPI3
DCD UART4_IRQHandler ;
UART4
DCD UART5_IRQHandler ;
UART5
DCD TMR6_IRQHandler ;
TMR6
DCD TMR7_IRQHandler ;
TMR7
DCD DMA2_Channel1_IRQHandler ;
DMA2 Channel1
DCD DMA2_Channel2_IRQHandler ;
DMA2 Channel2
DCD DMA2_Channel3_IRQHandler ;
DMA2 Channel3
DCD DMA2_Channel4_5_IRQHandler ;
DMA2 Channel4 &Channel5
DCD 0 ;
Reserved
DCD USBD2_HP_CAN2_TX_IRQHandler ;
USBD2 High Priority or CAN2 TX
DCD USBD2_LP_CAN2_RX0_IRQHandler ;
USBD2 Low Priority or CAN2 RX0
DCD CAN2_RX1_IRQHandler ;
CAN2 RX1
DCD CAN2_SCE_IRQHandler ;
CAN2 SCE
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; ;; Default interrupt handlers.
Default interrupt handlers.
;; ;;
THUMB THUMB
PUBWEAK Reset_Handler PUBWEAK Reset_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(2)
CODE:
REORDER:
NOROOT(2)
Reset_Handler Reset_Handler
LDR R0, =SystemInit LDR R0, =SystemInit
BLX R0 BLX R0
@ -226,586 +136,367 @@ LDR R0, = SystemInit
BX R0 BX R0
PUBWEAK NMI_Handler PUBWEAK NMI_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
NMI_Handler NMI_Handler
B NMI_Handler B NMI_Handler
PUBWEAK HardFault_Handler PUBWEAK HardFault_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
HardFault_Handler HardFault_Handler
B HardFault_Handler B HardFault_Handler
PUBWEAK MemManage_Handler PUBWEAK MemManage_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
MemManage_Handler MemManage_Handler
B MemManage_Handler B MemManage_Handler
PUBWEAK BusFault_Handler PUBWEAK BusFault_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
BusFault_Handler BusFault_Handler
B BusFault_Handler B BusFault_Handler
PUBWEAK UsageFault_Handler PUBWEAK UsageFault_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
UsageFault_Handler UsageFault_Handler
B UsageFault_Handler B UsageFault_Handler
PUBWEAK SVC_Handler PUBWEAK SVC_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
SVC_Handler SVC_Handler
B SVC_Handler B SVC_Handler
PUBWEAK DebugMon_Handler PUBWEAK DebugMon_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DebugMon_Handler DebugMon_Handler
B DebugMon_Handler B DebugMon_Handler
PUBWEAK PendSV_Handler PUBWEAK PendSV_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
PendSV_Handler PendSV_Handler
B PendSV_Handler B PendSV_Handler
PUBWEAK SysTick_Handler PUBWEAK SysTick_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
SysTick_Handler SysTick_Handler
B SysTick_Handler B SysTick_Handler
PUBWEAK WWDT_IRQHandler PUBWEAK WWDT_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
WWDT_IRQHandler WWDT_IRQHandler
B WWDT_IRQHandler B WWDT_IRQHandler
PUBWEAK PVD_IRQHandler PUBWEAK PVD_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
PVD_IRQHandler PVD_IRQHandler
B PVD_IRQHandler B PVD_IRQHandler
PUBWEAK TAMPER_IRQHandler PUBWEAK TAMPER_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TAMPER_IRQHandler TAMPER_IRQHandler
B TAMPER_IRQHandler B TAMPER_IRQHandler
PUBWEAK RTC_IRQHandler PUBWEAK RTC_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
RTC_IRQHandler RTC_IRQHandler
B RTC_IRQHandler B RTC_IRQHandler
PUBWEAK FLASH_IRQHandler PUBWEAK FLASH_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
FLASH_IRQHandler FLASH_IRQHandler
B FLASH_IRQHandler B FLASH_IRQHandler
PUBWEAK RCM_IRQHandler PUBWEAK RCM_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
RCM_IRQHandler RCM_IRQHandler
B RCM_IRQHandler B RCM_IRQHandler
PUBWEAK EINT0_IRQHandler PUBWEAK EINT0_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT0_IRQHandler EINT0_IRQHandler
B EINT0_IRQHandler B EINT0_IRQHandler
PUBWEAK EINT1_IRQHandler PUBWEAK EINT1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT1_IRQHandler EINT1_IRQHandler
B EINT1_IRQHandler B EINT1_IRQHandler
PUBWEAK EINT2_IRQHandler PUBWEAK EINT2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT2_IRQHandler EINT2_IRQHandler
B EINT2_IRQHandler B EINT2_IRQHandler
PUBWEAK EINT3_IRQHandler PUBWEAK EINT3_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT3_IRQHandler EINT3_IRQHandler
B EINT3_IRQHandler B EINT3_IRQHandler
PUBWEAK EINT4_IRQHandler PUBWEAK EINT4_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT4_IRQHandler EINT4_IRQHandler
B EINT4_IRQHandler B EINT4_IRQHandler
PUBWEAK DMA1_Channel1_IRQHandler PUBWEAK DMA1_Channel1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel1_IRQHandler DMA1_Channel1_IRQHandler
B DMA1_Channel1_IRQHandler B DMA1_Channel1_IRQHandler
PUBWEAK DMA1_Channel2_IRQHandler PUBWEAK DMA1_Channel2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel2_IRQHandler DMA1_Channel2_IRQHandler
B DMA1_Channel2_IRQHandler B DMA1_Channel2_IRQHandler
PUBWEAK DMA1_Channel3_IRQHandler PUBWEAK DMA1_Channel3_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel3_IRQHandler DMA1_Channel3_IRQHandler
B DMA1_Channel3_IRQHandler B DMA1_Channel3_IRQHandler
PUBWEAK DMA1_Channel4_IRQHandler PUBWEAK DMA1_Channel4_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel4_IRQHandler DMA1_Channel4_IRQHandler
B DMA1_Channel4_IRQHandler B DMA1_Channel4_IRQHandler
PUBWEAK DMA1_Channel5_IRQHandler PUBWEAK DMA1_Channel5_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel5_IRQHandler DMA1_Channel5_IRQHandler
B DMA1_Channel5_IRQHandler B DMA1_Channel5_IRQHandler
PUBWEAK DMA1_Channel6_IRQHandler PUBWEAK DMA1_Channel6_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel6_IRQHandler DMA1_Channel6_IRQHandler
B DMA1_Channel6_IRQHandler B DMA1_Channel6_IRQHandler
PUBWEAK DMA1_Channel7_IRQHandler PUBWEAK DMA1_Channel7_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel7_IRQHandler DMA1_Channel7_IRQHandler
B DMA1_Channel7_IRQHandler B DMA1_Channel7_IRQHandler
PUBWEAK ADC1_2_IRQHandler PUBWEAK ADC1_2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
ADC1_2_IRQHandler ADC1_2_IRQHandler
B ADC1_2_IRQHandler B ADC1_2_IRQHandler
PUBWEAK USBD1_HP_CAN1_TX_IRQHandler PUBWEAK USBD1_HP_CAN1_TX_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USBD1_HP_CAN1_TX_IRQHandler USBD1_HP_CAN1_TX_IRQHandler
B USBD1_HP_CAN1_TX_IRQHandler B USBD1_HP_CAN1_TX_IRQHandler
PUBWEAK USBD1_LP_CAN1_RX0_IRQHandler PUBWEAK USBD1_LP_CAN1_RX0_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USBD1_LP_CAN1_RX0_IRQHandler USBD1_LP_CAN1_RX0_IRQHandler
B USBD1_LP_CAN1_RX0_IRQHandler B USBD1_LP_CAN1_RX0_IRQHandler
PUBWEAK CAN1_RX1_IRQHandler PUBWEAK CAN1_RX1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
CAN1_RX1_IRQHandler CAN1_RX1_IRQHandler
B CAN1_RX1_IRQHandler B CAN1_RX1_IRQHandler
PUBWEAK CAN1_SCE_IRQHandler PUBWEAK CAN1_SCE_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
CAN1_SCE_IRQHandler CAN1_SCE_IRQHandler
B CAN1_SCE_IRQHandler B CAN1_SCE_IRQHandler
PUBWEAK EINT9_5_IRQHandler PUBWEAK EINT9_5_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT9_5_IRQHandler EINT9_5_IRQHandler
B EINT9_5_IRQHandler B EINT9_5_IRQHandler
PUBWEAK TMR1_BRK_IRQHandler PUBWEAK TMR1_BRK_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR1_BRK_IRQHandler TMR1_BRK_IRQHandler
B TMR1_BRK_IRQHandler B TMR1_BRK_IRQHandler
PUBWEAK TMR1_UP_IRQHandler PUBWEAK TMR1_UP_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR1_UP_IRQHandler TMR1_UP_IRQHandler
B TMR1_UP_IRQHandler B TMR1_UP_IRQHandler
PUBWEAK TMR1_TRG_COM_IRQHandler PUBWEAK TMR1_TRG_COM_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR1_TRG_COM_IRQHandler TMR1_TRG_COM_IRQHandler
B TMR1_TRG_COM_IRQHandler B TMR1_TRG_COM_IRQHandler
PUBWEAK TMR1_CC_IRQHandler PUBWEAK TMR1_CC_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR1_CC_IRQHandler TMR1_CC_IRQHandler
B TMR1_CC_IRQHandler B TMR1_CC_IRQHandler
PUBWEAK TMR2_IRQHandler PUBWEAK TMR2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR2_IRQHandler TMR2_IRQHandler
B TMR2_IRQHandler B TMR2_IRQHandler
PUBWEAK TMR3_IRQHandler PUBWEAK TMR3_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR3_IRQHandler TMR3_IRQHandler
B TMR3_IRQHandler B TMR3_IRQHandler
PUBWEAK TMR4_IRQHandler PUBWEAK TMR4_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR4_IRQHandler TMR4_IRQHandler
B TMR4_IRQHandler B TMR4_IRQHandler
PUBWEAK I2C1_EV_IRQHandler PUBWEAK I2C1_EV_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
I2C1_EV_IRQHandler I2C1_EV_IRQHandler
B I2C1_EV_IRQHandler B I2C1_EV_IRQHandler
PUBWEAK I2C1_ER_IRQHandler PUBWEAK I2C1_ER_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
I2C1_ER_IRQHandler I2C1_ER_IRQHandler
B I2C1_ER_IRQHandler B I2C1_ER_IRQHandler
PUBWEAK I2C2_EV_IRQHandler PUBWEAK I2C2_EV_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
I2C2_EV_IRQHandler I2C2_EV_IRQHandler
B I2C2_EV_IRQHandler B I2C2_EV_IRQHandler
PUBWEAK I2C2_ER_IRQHandler PUBWEAK I2C2_ER_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
I2C2_ER_IRQHandler I2C2_ER_IRQHandler
B I2C2_ER_IRQHandler B I2C2_ER_IRQHandler
PUBWEAK SPI1_IRQHandler PUBWEAK SPI1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
SPI1_IRQHandler SPI1_IRQHandler
B SPI1_IRQHandler B SPI1_IRQHandler
PUBWEAK SPI2_IRQHandler PUBWEAK SPI2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
SPI2_IRQHandler SPI2_IRQHandler
B SPI2_IRQHandler B SPI2_IRQHandler
PUBWEAK USART1_IRQHandler PUBWEAK USART1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USART1_IRQHandler USART1_IRQHandler
B USART1_IRQHandler B USART1_IRQHandler
PUBWEAK USART2_IRQHandler PUBWEAK USART2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USART2_IRQHandler USART2_IRQHandler
B USART2_IRQHandler B USART2_IRQHandler
PUBWEAK USART3_IRQHandler PUBWEAK USART3_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USART3_IRQHandler USART3_IRQHandler
B USART3_IRQHandler B USART3_IRQHandler
PUBWEAK EINT15_10_IRQHandler PUBWEAK EINT15_10_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT15_10_IRQHandler EINT15_10_IRQHandler
B EINT15_10_IRQHandler B EINT15_10_IRQHandler
PUBWEAK RTCAlarm_IRQHandler PUBWEAK RTCAlarm_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
RTCAlarm_IRQHandler RTCAlarm_IRQHandler
B RTCAlarm_IRQHandler B RTCAlarm_IRQHandler
PUBWEAK USBDWakeUp_IRQHandler PUBWEAK USBDWakeUp_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USBDWakeUp_IRQHandler USBDWakeUp_IRQHandler
B USBDWakeUp_IRQHandler B USBDWakeUp_IRQHandler
PUBWEAK TMR8_BRK_IRQHandler PUBWEAK TMR8_BRK_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR8_BRK_IRQHandler TMR8_BRK_IRQHandler
B TMR8_BRK_IRQHandler B TMR8_BRK_IRQHandler
PUBWEAK TMR8_UP_IRQHandler PUBWEAK TMR8_UP_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR8_UP_IRQHandler TMR8_UP_IRQHandler
B TMR8_UP_IRQHandler B TMR8_UP_IRQHandler
PUBWEAK TMR8_TRG_COM_IRQHandler PUBWEAK TMR8_TRG_COM_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR8_TRG_COM_IRQHandler TMR8_TRG_COM_IRQHandler
B TMR8_TRG_COM_IRQHandler B TMR8_TRG_COM_IRQHandler
PUBWEAK TMR8_CC_IRQHandler PUBWEAK TMR8_CC_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR8_CC_IRQHandler TMR8_CC_IRQHandler
B TMR8_CC_IRQHandler B TMR8_CC_IRQHandler
PUBWEAK ADC3_IRQHandler PUBWEAK ADC3_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
ADC3_IRQHandler ADC3_IRQHandler
B ADC3_IRQHandler B ADC3_IRQHandler
PUBWEAK EMMC_IRQHandler PUBWEAK EMMC_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EMMC_IRQHandler EMMC_IRQHandler
B EMMC_IRQHandler B EMMC_IRQHandler
PUBWEAK SDIO_IRQHandler PUBWEAK SDIO_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
SDIO_IRQHandler SDIO_IRQHandler
B SDIO_IRQHandler B SDIO_IRQHandler
PUBWEAK TMR5_IRQHandler PUBWEAK TMR5_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR5_IRQHandler TMR5_IRQHandler
B TMR5_IRQHandler B TMR5_IRQHandler
PUBWEAK SPI3_IRQHandler PUBWEAK SPI3_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
SPI3_IRQHandler SPI3_IRQHandler
B SPI3_IRQHandler B SPI3_IRQHandler
PUBWEAK UART4_IRQHandler PUBWEAK UART4_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
UART4_IRQHandler UART4_IRQHandler
B UART4_IRQHandler B UART4_IRQHandler
PUBWEAK UART5_IRQHandler PUBWEAK UART5_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
UART5_IRQHandler UART5_IRQHandler
B UART5_IRQHandler B UART5_IRQHandler
PUBWEAK TMR6_IRQHandler PUBWEAK TMR6_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR6_IRQHandler TMR6_IRQHandler
B TMR6_IRQHandler B TMR6_IRQHandler
PUBWEAK TMR7_IRQHandler PUBWEAK TMR7_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR7_IRQHandler TMR7_IRQHandler
B TMR7_IRQHandler B TMR7_IRQHandler
PUBWEAK DMA2_Channel1_IRQHandler PUBWEAK DMA2_Channel1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA2_Channel1_IRQHandler DMA2_Channel1_IRQHandler
B DMA2_Channel1_IRQHandler B DMA2_Channel1_IRQHandler
PUBWEAK DMA2_Channel2_IRQHandler PUBWEAK DMA2_Channel2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA2_Channel2_IRQHandler DMA2_Channel2_IRQHandler
B DMA2_Channel2_IRQHandler B DMA2_Channel2_IRQHandler
PUBWEAK DMA2_Channel3_IRQHandler PUBWEAK DMA2_Channel3_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA2_Channel3_IRQHandler DMA2_Channel3_IRQHandler
B DMA2_Channel3_IRQHandler B DMA2_Channel3_IRQHandler
PUBWEAK DMA2_Channel4_5_IRQHandler PUBWEAK DMA2_Channel4_5_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA2_Channel4_5_IRQHandler DMA2_Channel4_5_IRQHandler
B DMA2_Channel4_5_IRQHandler B DMA2_Channel4_5_IRQHandler
PUBWEAK USBD2_HP_CAN2_TX_IRQHandler PUBWEAK USBD2_HP_CAN2_TX_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USBD2_HP_CAN2_TX_IRQHandler USBD2_HP_CAN2_TX_IRQHandler
B USBD2_HP_CAN2_TX_IRQHandler B USBD2_HP_CAN2_TX_IRQHandler
PUBWEAK USBD2_LP_CAN2_RX0_IRQHandler PUBWEAK USBD2_LP_CAN2_RX0_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USBD2_LP_CAN2_RX0_IRQHandler USBD2_LP_CAN2_RX0_IRQHandler
B USBD2_LP_CAN2_RX0_IRQHandler B USBD2_LP_CAN2_RX0_IRQHandler
PUBWEAK CAN2_RX1_IRQHandler PUBWEAK CAN2_RX1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
CAN2_RX1_IRQHandler CAN2_RX1_IRQHandler
B CAN2_RX1_IRQHandler B CAN2_RX1_IRQHandler
PUBWEAK CAN2_SCE_IRQHandler PUBWEAK CAN2_SCE_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
CAN2_SCE_IRQHandler CAN2_SCE_IRQHandler
B CAN2_SCE_IRQHandler B CAN2_SCE_IRQHandler

View File

@ -25,15 +25,10 @@
MODULE ?cstartup MODULE ?cstartup
;; ;; Forward declaration of sections.
Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3)
SECTION CSTACK:
DATA:
NOROOT(3)
SECTION .intvec: SECTION .intvec:CODE:NOROOT(2)
CODE:
NOROOT(2)
EXTERN __iar_program_start EXTERN __iar_program_start
@ -44,147 +39,80 @@ DATA
__vector_table __vector_table
DCD sfe(CSTACK) DCD sfe(CSTACK)
DCD Reset_Handler ; DCD Reset_Handler ; Reset Handler
Reset Handler DCD NMI_Handler ; NMI Handler
DCD NMI_Handler ; DCD HardFault_Handler ; Hard Fault Handler
NMI Handler DCD MemManage_Handler ; MPU Fault Handler
DCD HardFault_Handler ; DCD BusFault_Handler ; Bus Fault Handler
Hard Fault Handler DCD UsageFault_Handler ; Usage Fault Handler
DCD MemManage_Handler ; DCD 0 ; Reserved
MPU Fault Handler DCD 0 ; Reserved
DCD BusFault_Handler ; DCD 0 ; Reserved
Bus Fault Handler DCD 0 ; Reserved
DCD UsageFault_Handler ; DCD SVC_Handler ; SVCall Handler
Usage Fault Handler DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; DCD 0 ; Reserved
Reserved DCD PendSV_Handler ; PendSV Handler
DCD 0 ; DCD SysTick_Handler ; SysTick Handler
Reserved
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD SVC_Handler ;
SVCall Handler
DCD DebugMon_Handler ;
Debug Monitor Handler
DCD 0 ;
Reserved
DCD PendSV_Handler ;
PendSV Handler
DCD SysTick_Handler ;
SysTick Handler
; ; External Interrupts
External Interrupts DCD WWDT_IRQHandler ; Window Watchdog
DCD WWDT_IRQHandler ; DCD PVD_IRQHandler ; PVD through EINT Line detect
Window Watchdog DCD TAMPER_IRQHandler ; Tamper
DCD PVD_IRQHandler ; DCD RTC_IRQHandler ; RTC
PVD through EINT Line detect DCD FLASH_IRQHandler ; Flash
DCD TAMPER_IRQHandler ; DCD RCM_IRQHandler ; RCM
Tamper DCD EINT0_IRQHandler ; EINT Line 0
DCD RTC_IRQHandler ; DCD EINT1_IRQHandler ; EINT Line 1
RTC DCD EINT2_IRQHandler ; EINT Line 2
DCD FLASH_IRQHandler ; DCD EINT3_IRQHandler ; EINT Line 3
Flash DCD EINT4_IRQHandler ; EINT Line 4
DCD RCM_IRQHandler ; DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
RCM DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD EINT0_IRQHandler ; DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
EINT Line 0 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD EINT1_IRQHandler ; DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
EINT Line 1 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD EINT2_IRQHandler ; DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
EINT Line 2 DCD ADC1_2_IRQHandler ; ADC1 & ADC2
DCD EINT3_IRQHandler ; DCD USBD1_HP_CAN1_TX_IRQHandler ; USBD1 High Priority or CAN1 TX
EINT Line 3 DCD USBD1_LP_CAN1_RX0_IRQHandler ; USBD1 Low Priority or CAN1 RX0
DCD EINT4_IRQHandler ; DCD CAN1_RX1_IRQHandler ; CAN1 RX1
EINT Line 4 DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD DMA1_Channel1_IRQHandler ; DCD EINT9_5_IRQHandler ; EINT Line 9..5
DMA1 Channel 1 DCD TMR1_BRK_IRQHandler ; TMR1 Break
DCD DMA1_Channel2_IRQHandler ; DCD TMR1_UP_IRQHandler ; TMR1 Update
DMA1 Channel 2 DCD TMR1_TRG_COM_IRQHandler ; TMR1 Trigger and Commutation
DCD DMA1_Channel3_IRQHandler ; DCD TMR1_CC_IRQHandler ; TMR1 Capture Compare
DMA1 Channel 3 DCD TMR2_IRQHandler ; TMR2
DCD DMA1_Channel4_IRQHandler ; DCD TMR3_IRQHandler ; TMR3
DMA1 Channel 4 DCD TMR4_IRQHandler ; TMR4
DCD DMA1_Channel5_IRQHandler ; DCD I2C1_EV_IRQHandler ; I2C1 Event
DMA1 Channel 5 DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD DMA1_Channel6_IRQHandler ; DCD I2C2_EV_IRQHandler ; I2C2 Event
DMA1 Channel 6 DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD DMA1_Channel7_IRQHandler ; DCD SPI1_IRQHandler ; SPI1
DMA1 Channel 7 DCD SPI2_IRQHandler ; SPI2
DCD ADC1_2_IRQHandler ; DCD USART1_IRQHandler ; USART1
ADC1 &ADC2 DCD USART2_IRQHandler ; USART2
DCD USBD1_HP_CAN1_TX_IRQHandler ; DCD USART3_IRQHandler ; USART3
USBD1 High Priority or CAN1 TX DCD EINT15_10_IRQHandler ; EINT Line 15..10
DCD USBD1_LP_CAN1_RX0_IRQHandler ; DCD RTCAlarm_IRQHandler ; RTC Alarm through EINT Line
USBD1 Low Priority or CAN1 RX0 DCD USBDWakeUp_IRQHandler ; USBD Wakeup from suspend
DCD CAN1_RX1_IRQHandler ; DCD FPU_IRQHandler ; FPU
CAN1 RX1 DCD QSPI_IRQHandler ; QSPI
DCD CAN1_SCE_IRQHandler ; DCD USBD2_HP_IRQHandler ; USBD2 High Priority
CAN1 SCE DCD USBD2_LP_IRQHandler ; USBD2 Low Priority
DCD EINT9_5_IRQHandler ;
EINT Line 9..5
DCD TMR1_BRK_IRQHandler ;
TMR1 Break
DCD TMR1_UP_IRQHandler ;
TMR1 Update
DCD TMR1_TRG_COM_IRQHandler ;
TMR1 Trigger and Commutation
DCD TMR1_CC_IRQHandler ;
TMR1 Capture Compare
DCD TMR2_IRQHandler ;
TMR2
DCD TMR3_IRQHandler ;
TMR3
DCD TMR4_IRQHandler ;
TMR4
DCD I2C1_EV_IRQHandler ;
I2C1 Event
DCD I2C1_ER_IRQHandler ;
I2C1 Error
DCD I2C2_EV_IRQHandler ;
I2C2 Event
DCD I2C2_ER_IRQHandler ;
I2C2 Error
DCD SPI1_IRQHandler ;
SPI1
DCD SPI2_IRQHandler ;
SPI2
DCD USART1_IRQHandler ;
USART1
DCD USART2_IRQHandler ;
USART2
DCD USART3_IRQHandler ;
USART3
DCD EINT15_10_IRQHandler ;
EINT Line 15..10
DCD RTCAlarm_IRQHandler ;
RTC Alarm through EINT Line
DCD USBDWakeUp_IRQHandler ;
USBD Wakeup from suspend
DCD FPU_IRQHandler ;
FPU
DCD QSPI_IRQHandler ;
QSPI
DCD USBD2_HP_IRQHandler ;
USBD2 High Priority
DCD USBD2_LP_IRQHandler ;
USBD2 Low Priority
__Vectors_End __Vectors_End
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; ;; Default interrupt handlers.
Default interrupt handlers.
;; ;;
THUMB THUMB
PUBWEAK Reset_Handler PUBWEAK Reset_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(2)
CODE:
REORDER:
NOROOT(2)
Reset_Handler Reset_Handler
LDR R0, =SystemInit LDR R0, =SystemInit
BLX R0 BLX R0
@ -192,450 +120,282 @@ LDR R0, = SystemInit
BX R0 BX R0
PUBWEAK NMI_Handler PUBWEAK NMI_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
NMI_Handler NMI_Handler
B NMI_Handler B NMI_Handler
PUBWEAK HardFault_Handler PUBWEAK HardFault_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
HardFault_Handler HardFault_Handler
B HardFault_Handler B HardFault_Handler
PUBWEAK MemManage_Handler PUBWEAK MemManage_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
MemManage_Handler MemManage_Handler
B MemManage_Handler B MemManage_Handler
PUBWEAK BusFault_Handler PUBWEAK BusFault_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
BusFault_Handler BusFault_Handler
B BusFault_Handler B BusFault_Handler
PUBWEAK UsageFault_Handler PUBWEAK UsageFault_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
UsageFault_Handler UsageFault_Handler
B UsageFault_Handler B UsageFault_Handler
PUBWEAK SVC_Handler PUBWEAK SVC_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
SVC_Handler SVC_Handler
B SVC_Handler B SVC_Handler
PUBWEAK DebugMon_Handler PUBWEAK DebugMon_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DebugMon_Handler DebugMon_Handler
B DebugMon_Handler B DebugMon_Handler
PUBWEAK PendSV_Handler PUBWEAK PendSV_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
PendSV_Handler PendSV_Handler
B PendSV_Handler B PendSV_Handler
PUBWEAK SysTick_Handler PUBWEAK SysTick_Handler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
SysTick_Handler SysTick_Handler
B SysTick_Handler B SysTick_Handler
PUBWEAK WWDT_IRQHandler PUBWEAK WWDT_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
WWDT_IRQHandler WWDT_IRQHandler
B WWDT_IRQHandler B WWDT_IRQHandler
PUBWEAK PVD_IRQHandler PUBWEAK PVD_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
PVD_IRQHandler PVD_IRQHandler
B PVD_IRQHandler B PVD_IRQHandler
PUBWEAK TAMPER_IRQHandler PUBWEAK TAMPER_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TAMPER_IRQHandler TAMPER_IRQHandler
B TAMPER_IRQHandler B TAMPER_IRQHandler
PUBWEAK RTC_IRQHandler PUBWEAK RTC_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
RTC_IRQHandler RTC_IRQHandler
B RTC_IRQHandler B RTC_IRQHandler
PUBWEAK FLASH_IRQHandler PUBWEAK FLASH_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
FLASH_IRQHandler FLASH_IRQHandler
B FLASH_IRQHandler B FLASH_IRQHandler
PUBWEAK RCM_IRQHandler PUBWEAK RCM_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
RCM_IRQHandler RCM_IRQHandler
B RCM_IRQHandler B RCM_IRQHandler
PUBWEAK EINT0_IRQHandler PUBWEAK EINT0_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT0_IRQHandler EINT0_IRQHandler
B EINT0_IRQHandler B EINT0_IRQHandler
PUBWEAK EINT1_IRQHandler PUBWEAK EINT1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT1_IRQHandler EINT1_IRQHandler
B EINT1_IRQHandler B EINT1_IRQHandler
PUBWEAK EINT2_IRQHandler PUBWEAK EINT2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT2_IRQHandler EINT2_IRQHandler
B EINT2_IRQHandler B EINT2_IRQHandler
PUBWEAK EINT3_IRQHandler PUBWEAK EINT3_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT3_IRQHandler EINT3_IRQHandler
B EINT3_IRQHandler B EINT3_IRQHandler
PUBWEAK EINT4_IRQHandler PUBWEAK EINT4_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT4_IRQHandler EINT4_IRQHandler
B EINT4_IRQHandler B EINT4_IRQHandler
PUBWEAK DMA1_Channel1_IRQHandler PUBWEAK DMA1_Channel1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel1_IRQHandler DMA1_Channel1_IRQHandler
B DMA1_Channel1_IRQHandler B DMA1_Channel1_IRQHandler
PUBWEAK DMA1_Channel2_IRQHandler PUBWEAK DMA1_Channel2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel2_IRQHandler DMA1_Channel2_IRQHandler
B DMA1_Channel2_IRQHandler B DMA1_Channel2_IRQHandler
PUBWEAK DMA1_Channel3_IRQHandler PUBWEAK DMA1_Channel3_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel3_IRQHandler DMA1_Channel3_IRQHandler
B DMA1_Channel3_IRQHandler B DMA1_Channel3_IRQHandler
PUBWEAK DMA1_Channel4_IRQHandler PUBWEAK DMA1_Channel4_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel4_IRQHandler DMA1_Channel4_IRQHandler
B DMA1_Channel4_IRQHandler B DMA1_Channel4_IRQHandler
PUBWEAK DMA1_Channel5_IRQHandler PUBWEAK DMA1_Channel5_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel5_IRQHandler DMA1_Channel5_IRQHandler
B DMA1_Channel5_IRQHandler B DMA1_Channel5_IRQHandler
PUBWEAK DMA1_Channel6_IRQHandler PUBWEAK DMA1_Channel6_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel6_IRQHandler DMA1_Channel6_IRQHandler
B DMA1_Channel6_IRQHandler B DMA1_Channel6_IRQHandler
PUBWEAK DMA1_Channel7_IRQHandler PUBWEAK DMA1_Channel7_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
DMA1_Channel7_IRQHandler DMA1_Channel7_IRQHandler
B DMA1_Channel7_IRQHandler B DMA1_Channel7_IRQHandler
PUBWEAK ADC1_2_IRQHandler PUBWEAK ADC1_2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
ADC1_2_IRQHandler ADC1_2_IRQHandler
B ADC1_2_IRQHandler B ADC1_2_IRQHandler
PUBWEAK USBD1_HP_CAN1_TX_IRQHandler PUBWEAK USBD1_HP_CAN1_TX_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USBD1_HP_CAN1_TX_IRQHandler USBD1_HP_CAN1_TX_IRQHandler
B USBD1_HP_CAN1_TX_IRQHandler B USBD1_HP_CAN1_TX_IRQHandler
PUBWEAK USBD1_LP_CAN1_RX0_IRQHandler PUBWEAK USBD1_LP_CAN1_RX0_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USBD1_LP_CAN1_RX0_IRQHandler USBD1_LP_CAN1_RX0_IRQHandler
B USBD1_LP_CAN1_RX0_IRQHandler B USBD1_LP_CAN1_RX0_IRQHandler
PUBWEAK CAN1_RX1_IRQHandler PUBWEAK CAN1_RX1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
CAN1_RX1_IRQHandler CAN1_RX1_IRQHandler
B CAN1_RX1_IRQHandler B CAN1_RX1_IRQHandler
PUBWEAK CAN1_SCE_IRQHandler PUBWEAK CAN1_SCE_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
CAN1_SCE_IRQHandler CAN1_SCE_IRQHandler
B CAN1_SCE_IRQHandler B CAN1_SCE_IRQHandler
PUBWEAK EINT9_5_IRQHandler PUBWEAK EINT9_5_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT9_5_IRQHandler EINT9_5_IRQHandler
B EINT9_5_IRQHandler B EINT9_5_IRQHandler
PUBWEAK TMR1_BRK_IRQHandler PUBWEAK TMR1_BRK_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR1_BRK_IRQHandler TMR1_BRK_IRQHandler
B TMR1_BRK_IRQHandler B TMR1_BRK_IRQHandler
PUBWEAK TMR1_UP_IRQHandler PUBWEAK TMR1_UP_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR1_UP_IRQHandler TMR1_UP_IRQHandler
B TMR1_UP_IRQHandler B TMR1_UP_IRQHandler
PUBWEAK TMR1_TRG_COM_IRQHandler PUBWEAK TMR1_TRG_COM_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR1_TRG_COM_IRQHandler TMR1_TRG_COM_IRQHandler
B TMR1_TRG_COM_IRQHandler B TMR1_TRG_COM_IRQHandler
PUBWEAK TMR1_CC_IRQHandler PUBWEAK TMR1_CC_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR1_CC_IRQHandler TMR1_CC_IRQHandler
B TMR1_CC_IRQHandler B TMR1_CC_IRQHandler
PUBWEAK TMR2_IRQHandler PUBWEAK TMR2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR2_IRQHandler TMR2_IRQHandler
B TMR2_IRQHandler B TMR2_IRQHandler
PUBWEAK TMR3_IRQHandler PUBWEAK TMR3_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR3_IRQHandler TMR3_IRQHandler
B TMR3_IRQHandler B TMR3_IRQHandler
PUBWEAK TMR4_IRQHandler PUBWEAK TMR4_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
TMR4_IRQHandler TMR4_IRQHandler
B TMR4_IRQHandler B TMR4_IRQHandler
PUBWEAK I2C1_EV_IRQHandler PUBWEAK I2C1_EV_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
I2C1_EV_IRQHandler I2C1_EV_IRQHandler
B I2C1_EV_IRQHandler B I2C1_EV_IRQHandler
PUBWEAK I2C1_ER_IRQHandler PUBWEAK I2C1_ER_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
I2C1_ER_IRQHandler I2C1_ER_IRQHandler
B I2C1_ER_IRQHandler B I2C1_ER_IRQHandler
PUBWEAK I2C2_EV_IRQHandler PUBWEAK I2C2_EV_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
I2C2_EV_IRQHandler I2C2_EV_IRQHandler
B I2C2_EV_IRQHandler B I2C2_EV_IRQHandler
PUBWEAK I2C2_ER_IRQHandler PUBWEAK I2C2_ER_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
I2C2_ER_IRQHandler I2C2_ER_IRQHandler
B I2C2_ER_IRQHandler B I2C2_ER_IRQHandler
PUBWEAK SPI1_IRQHandler PUBWEAK SPI1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
SPI1_IRQHandler SPI1_IRQHandler
B SPI1_IRQHandler B SPI1_IRQHandler
PUBWEAK SPI2_IRQHandler PUBWEAK SPI2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
SPI2_IRQHandler SPI2_IRQHandler
B SPI2_IRQHandler B SPI2_IRQHandler
PUBWEAK USART1_IRQHandler PUBWEAK USART1_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USART1_IRQHandler USART1_IRQHandler
B USART1_IRQHandler B USART1_IRQHandler
PUBWEAK USART2_IRQHandler PUBWEAK USART2_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USART2_IRQHandler USART2_IRQHandler
B USART2_IRQHandler B USART2_IRQHandler
PUBWEAK USART3_IRQHandler PUBWEAK USART3_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USART3_IRQHandler USART3_IRQHandler
B USART3_IRQHandler B USART3_IRQHandler
PUBWEAK EINT15_10_IRQHandler PUBWEAK EINT15_10_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
EINT15_10_IRQHandler EINT15_10_IRQHandler
B EINT15_10_IRQHandler B EINT15_10_IRQHandler
PUBWEAK RTCAlarm_IRQHandler PUBWEAK RTCAlarm_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
RTCAlarm_IRQHandler RTCAlarm_IRQHandler
B RTCAlarm_IRQHandler B RTCAlarm_IRQHandler
PUBWEAK USBDWakeUp_IRQHandler PUBWEAK USBDWakeUp_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USBDWakeUp_IRQHandler USBDWakeUp_IRQHandler
B USBDWakeUp_IRQHandler B USBDWakeUp_IRQHandler
PUBWEAK FPU_IRQHandler PUBWEAK FPU_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
FPU_IRQHandler FPU_IRQHandler
B FPU_IRQHandler B FPU_IRQHandler
PUBWEAK QSPI_IRQHandler PUBWEAK QSPI_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
QSPI_IRQHandler QSPI_IRQHandler
B QSPI_IRQHandler B QSPI_IRQHandler
PUBWEAK USBD2_HP_IRQHandler PUBWEAK USBD2_HP_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USBD2_HP_IRQHandler USBD2_HP_IRQHandler
B USBD2_HP_IRQHandler B USBD2_HP_IRQHandler
PUBWEAK USBD2_LP_IRQHandler PUBWEAK USBD2_LP_IRQHandler
SECTION .text: SECTION .text:CODE:REORDER:NOROOT(1)
CODE:
REORDER:
NOROOT(1)
USBD2_LP_IRQHandler USBD2_LP_IRQHandler
B USBD2_LP_IRQHandler B USBD2_LP_IRQHandler

View File

@ -91,7 +91,7 @@ void rt_hw_us_delay(rt_uint32_t us)
} }
/** /**
* This function will initial STM32 board. * This function will config the board for initialization.
*/ */
RT_WEAK void rt_hw_board_init() RT_WEAK void rt_hw_board_init()
{ {

View File

@ -0,0 +1,22 @@
import os
import sys
import shutil
cwd_path = os.getcwd()
sys.path.append(os.path.join(os.path.dirname(cwd_path), 'rt-thread', 'tools'))
# BSP dist function
def dist_do_building(BSP_ROOT, dist_dir):
from mkdist import bsp_copy_files
import rtconfig
print("=> copy apm32 bsp library")
library_dir = os.path.join(dist_dir, 'libraries')
library_path = os.path.join(os.path.dirname(BSP_ROOT), 'libraries')
bsp_copy_files(os.path.join(library_path, rtconfig.BSP_LIBRARY_TYPE),
os.path.join(library_dir, rtconfig.BSP_LIBRARY_TYPE))
print("=> copy bsp drivers")
bsp_copy_files(os.path.join(library_path, 'Drivers'), os.path.join(library_dir, 'Drivers'))
shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig'))