[nxp][imxrt1170]Fix building problem (#6297)
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@ -35,7 +35,7 @@ extern uint32_t ENET_GetInstance(ENET_Type *base);
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/*! @brief Pointers to enet clocks for each instance. */
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extern clock_ip_name_t s_enetClock[FSL_FEATURE_SOC_ENET_COUNT];
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extern const clock_ip_name_t s_enetClock[FSL_FEATURE_SOC_ENET_COUNT];
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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static rt_bool_t rt_hw_mdio_init(void *bus, rt_uint32_t src_clock_hz)
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@ -1,11 +1,12 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-10-14 wangqiang the first version
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* 2022-08-17 xjy198903 add 1000M definition
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*/
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#ifndef __PHY_H__
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@ -21,6 +22,7 @@ extern "C"
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/* Defines the PHY link speed. This is align with the speed for MAC. */
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#define PHY_SPEED_10M 0U /* PHY 10M speed. */
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#define PHY_SPEED_100M 1U /* PHY 100M speed. */
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#define PHY_SPEED_1000M 2U /* PHY 1000M speed. */
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/* Defines the PHY link duplex. */
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#define PHY_HALF_DUPLEX 0U /* PHY half duplex. */
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