[nxp][imxrt1170]Fix building problem (#6297)

bsp/imxrt/libraries/drivers/drv_mdio.c

@@ -35,7 +35,7 @@ extern uint32_t ENET_GetInstance(ENET_Type *base);
 
 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
 /*! @brief Pointers to enet clocks for each instance. */
-extern clock_ip_name_t s_enetClock[FSL_FEATURE_SOC_ENET_COUNT];
+extern const clock_ip_name_t s_enetClock[FSL_FEATURE_SOC_ENET_COUNT];
 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
 
 static rt_bool_t rt_hw_mdio_init(void *bus, rt_uint32_t src_clock_hz)

bsp/imxrt/libraries/drivers/drv_sdram.c

@@ -26,7 +26,7 @@ int rt_hw_sdram_init(void)
     int result = RT_EOK;
     semc_config_t config;
     semc_sdram_config_t sdramconfig;
-    
+
 #if defined(SOC_IMXRT1170_SERIES)
     rt_uint32_t clockFrq = CLOCK_GetRootClockFreq(kCLOCK_Root_Semc);
 #else

components/drivers/include/drivers/phy.h

@@ -1,11 +1,12 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
  * 2020-10-14     wangqiang    the first version
+ * 2022-08-17     xjy198903    add 1000M definition
  */
 
 #ifndef __PHY_H__
@@ -21,6 +22,7 @@ extern "C"
 /* Defines the PHY link speed. This is align with the speed for MAC. */
 #define PHY_SPEED_10M   0U     /* PHY 10M speed. */
 #define PHY_SPEED_100M  1U     /* PHY 100M speed. */
+#define PHY_SPEED_1000M 2U     /* PHY 1000M speed. */
 
 /* Defines the PHY link duplex. */
 #define PHY_HALF_DUPLEX 0U     /* PHY half duplex. */