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rt-thread-official
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[bsp][stm32][rt-spark] 更新 cubemx ports

This commit is contained in:
zhkag 2023-08-10 15:11:21 +08:00 committed by guo
parent 8061503171
commit 83a2863ab6
46 changed files with 8269 additions and 1248 deletions
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488
bsp/stm32/stm32f407-rt-spark/.config
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@ -32,18 +32,10 @@ CONFIG_IDLE_THREAD_STACK_SIZE=1024
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT is not set
# CONFIG_RT_DEBUG_THREAD is not set
# CONFIG_RT_DEBUG_SCHEDULER is not set
# CONFIG_RT_DEBUG_IPC is not set
# CONFIG_RT_DEBUG_TIMER is not set
# CONFIG_RT_DEBUG_IRQ is not set
# CONFIG_RT_DEBUG_MEM is not set
# CONFIG_RT_DEBUG_SLAB is not set
# CONFIG_RT_DEBUG_MEMHEAP is not set
# CONFIG_RT_DEBUG_MODULE is not set
CONFIG_RT_USING_DEBUG=y
CONFIG_RT_DEBUGING_COLOR=y
CONFIG_RT_DEBUGING_CONTEXT=y
CONFIG_RT_DEBUGING_INIT=y
#
# Inter-Thread communication
@ -148,7 +140,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_NULL is not set
# CONFIG_RT_USING_ZERO is not set
# CONFIG_RT_USING_RANDOM is not set
# CONFIG_RT_USING_PWM is not set
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -217,15 +209,87 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_ADT is not set
# CONFIG_RT_USING_RESOURCE_ID is not set
# CONFIG_RT_USING_ADT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_VBUS is not set
# CONFIG_RT_USING_KTIME is not set
#
# RT-Thread Utestcases
#
# CONFIG_RT_USING_UTESTCASES is not set
CONFIG_SOC_FAMILY_STM32=y
CONFIG_SOC_SERIES_STM32F4=y
#
# Hardware Drivers Config
#
CONFIG_SOC_STM32F407ZG=y
CONFIG_BOARD_STM32F407_SPARK=y
#
# Onboard Peripheral Drivers
#
CONFIG_BSP_USING_USB_TO_USART=y
# CONFIG_BSP_USING_COM2 is not set
# CONFIG_BSP_USING_COM3 is not set
# CONFIG_BSP_USING_RS485 is not set
# CONFIG_BSP_USING_SRAM is not set
# CONFIG_BSP_USING_ONBOARD_LCD is not set
# CONFIG_BSP_USING_ONBOARD_LED_MATRIX is not set
# CONFIG_BSP_USING_LVGL is not set
# CONFIG_BSP_USING_SPI_FLASH is not set
# CONFIG_BSP_USING_EEPROM is not set
# CONFIG_BSP_USING_ENC28j60 is not set
# CONFIG_BSP_USING_FS is not set
# CONFIG_BSP_USING_FAL is not set
# CONFIG_BSP_USING_EASYFLASH is not set
# CONFIG_BSP_USING_RW007_WLAN is not set
# CONFIG_BSP_USING_AHT21 is not set
# CONFIG_BSP_USING_AP3216C is not set
# CONFIG_BSP_USING_ICM20608 is not set
# CONFIG_BSP_USING_USB_MOUSE is not set
# CONFIG_BSP_USING_CAN is not set
# CONFIG_BSP_USING_AUDIO is not set
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART1=y
# CONFIG_BSP_UART1_RX_USING_DMA is not set
# CONFIG_BSP_UART1_TX_USING_DMA is not set
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_UART4 is not set
# CONFIG_BSP_USING_UART5 is not set
# CONFIG_BSP_USING_UART6 is not set
# CONFIG_BSP_USING_TIM is not set
# CONFIG_BSP_USING_ONCHIP_RTC is not set
# CONFIG_BSP_USING_PWM is not set
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
# CONFIG_BSP_USING_SOFT_SPI is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_ONBOARD_PM is not set
# CONFIG_BSP_USING_DAC is not set
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_SDIO is not set
# CONFIG_BSP_USING_USBD is not set
# CONFIG_BSP_USING_USBH is not set
# CONFIG_BSP_USING_PULSE_ENCODER is not set
# CONFIG_BSP_USING_EXT_FMC_IO is not set
# CONFIG_BSP_USING_FMC is not set
# CONFIG_BSP_USING_RNG is not set
# CONFIG_BSP_USING_UDID is not set
#
# Board extended module Drivers
#
# CONFIG_BSP_USING_AT_ESP8266 is not set
#
# RT-Thread online packages
@ -245,7 +309,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
@ -263,6 +326,11 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
#
# CYW43012 WiFi
#
# CONFIG_PKG_USING_WLAN_CYW43012 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
@ -313,6 +381,8 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
# CONFIG_PKG_USING_RT_LINK_HW is not set
# CONFIG_PKG_USING_RYANMQTT is not set
# CONFIG_PKG_USING_RYANW5500 is not set
# CONFIG_PKG_USING_LORA_PKT_FWD is not set
# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
@ -320,6 +390,8 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_SMALL_MODBUS is not set
# CONFIG_PKG_USING_NET_SERVER is not set
# CONFIG_PKG_USING_ZFTP is not set
# CONFIG_PKG_USING_WOL is not set
# CONFIG_PKG_USING_ZEPHYR_POLLING is not set
#
# security packages
@ -366,7 +438,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# LVGL: powerful and easy-to-use embedded GUI library
#
# CONFIG_PKG_USING_LVGL is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
@ -388,18 +459,13 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_MP3PLAYER is not set
# CONFIG_PKG_USING_TINYJPEG is not set
# CONFIG_PKG_USING_UGUI is not set
#
# PainterEngine: A cross-platform graphics application framework written in C language
#
# CONFIG_PKG_USING_PAINTERENGINE is not set
# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_TERMBOX is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_3GPP_AMRNB is not set
#
# tools packages
@ -412,7 +478,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_RTT_AUTO_EXE_CMD is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ULOG_FILE is not set
# CONFIG_PKG_USING_LOGMGR is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
@ -446,8 +511,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_CBOX is not set
# CONFIG_PKG_USING_SNOWFLAKE is not set
# CONFIG_PKG_USING_HASH_MATCH is not set
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
# CONFIG_PKG_USING_VOFA_PLUS is not set
# CONFIG_PKG_USING_RT_TRACE is not set
# CONFIG_PKG_USING_ZDEBUG is not set
#
# system packages
@ -483,8 +550,8 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_PKG_USING_RTDUINO is not set
# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
# CONFIG_PKG_USING_LITEOS_SDK is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_PARTITION is not set
@ -518,19 +585,99 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_KMULTI_RTIMER is not set
# CONFIG_PKG_USING_TFDB is not set
# CONFIG_PKG_USING_QPC is not set
# CONFIG_PKG_USING_AGILE_UPGRADE is not set
# CONFIG_PKG_USING_FLASH_BLOB is not set
# CONFIG_PKG_USING_MLIBC is not set
# CONFIG_PKG_USING_TASK_MSG_BUS is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
#
# sensors drivers
#
# CONFIG_PKG_USING_LSM6DSM is not set
# CONFIG_PKG_USING_LSM6DSL is not set
# CONFIG_PKG_USING_LPS22HB is not set
# CONFIG_PKG_USING_HTS221 is not set
# CONFIG_PKG_USING_LSM303AGR is not set
# CONFIG_PKG_USING_BME280 is not set
# CONFIG_PKG_USING_BME680 is not set
# CONFIG_PKG_USING_BMA400 is not set
# CONFIG_PKG_USING_BMI160_BMX160 is not set
# CONFIG_PKG_USING_SPL0601 is not set
# CONFIG_PKG_USING_MS5805 is not set
# CONFIG_PKG_USING_DA270 is not set
# CONFIG_PKG_USING_DF220 is not set
# CONFIG_PKG_USING_HSHCAL001 is not set
# CONFIG_PKG_USING_BH1750 is not set
# CONFIG_PKG_USING_MPU6XXX is not set
# CONFIG_PKG_USING_AHT10 is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_TSL4531 is not set
# CONFIG_PKG_USING_DS18B20 is not set
# CONFIG_PKG_USING_DHT11 is not set
# CONFIG_PKG_USING_DHTXX is not set
# CONFIG_PKG_USING_GY271 is not set
# CONFIG_PKG_USING_GP2Y10 is not set
# CONFIG_PKG_USING_SGP30 is not set
# CONFIG_PKG_USING_HDC1000 is not set
# CONFIG_PKG_USING_BMP180 is not set
# CONFIG_PKG_USING_BMP280 is not set
# CONFIG_PKG_USING_SHTC1 is not set
# CONFIG_PKG_USING_BMI088 is not set
# CONFIG_PKG_USING_HMC5883 is not set
# CONFIG_PKG_USING_MAX6675 is not set
# CONFIG_PKG_USING_TMP1075 is not set
# CONFIG_PKG_USING_SR04 is not set
# CONFIG_PKG_USING_CCS811 is not set
# CONFIG_PKG_USING_PMSXX is not set
# CONFIG_PKG_USING_RT3020 is not set
# CONFIG_PKG_USING_MLX90632 is not set
# CONFIG_PKG_USING_MLX90393 is not set
# CONFIG_PKG_USING_MLX90392 is not set
# CONFIG_PKG_USING_MLX90397 is not set
# CONFIG_PKG_USING_MS5611 is not set
# CONFIG_PKG_USING_MAX31865 is not set
# CONFIG_PKG_USING_VL53L0X is not set
# CONFIG_PKG_USING_INA260 is not set
# CONFIG_PKG_USING_MAX30102 is not set
# CONFIG_PKG_USING_INA226 is not set
# CONFIG_PKG_USING_LIS2DH12 is not set
# CONFIG_PKG_USING_HS300X is not set
# CONFIG_PKG_USING_ZMOD4410 is not set
# CONFIG_PKG_USING_ISL29035 is not set
# CONFIG_PKG_USING_MMC3680KJ is not set
# CONFIG_PKG_USING_QMP6989 is not set
# CONFIG_PKG_USING_BALANCE is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_SHT4X is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_ADT74XX is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_AS7341 is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_RTT_ESP_IDF is not set
# CONFIG_PKG_USING_CW2015 is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_STHS34PF80 is not set
#
# touch drivers
#
# CONFIG_PKG_USING_GT9147 is not set
# CONFIG_PKG_USING_GT1151 is not set
# CONFIG_PKG_USING_GT917S is not set
# CONFIG_PKG_USING_GT911 is not set
# CONFIG_PKG_USING_FT6206 is not set
# CONFIG_PKG_USING_FT5426 is not set
# CONFIG_PKG_USING_FT6236 is not set
# CONFIG_PKG_USING_XPT2046_TOUCH is not set
# CONFIG_PKG_USING_CST816X is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ESP_IDF is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
@ -540,10 +687,9 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
#
# kendryte-sdk: Kendryte SDK
# Kendryte SDK
#
# CONFIG_PKG_USING_K210_SDK is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
@ -553,12 +699,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_ILI9341 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
@ -573,7 +717,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set
@ -601,12 +744,18 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
# CONFIG_PKG_USING_CW2015 is not set
# CONFIG_PKG_USING_RFM300 is not set
# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
# CONFIG_PKG_USING_LRF_NV7LIDAR is not set
# CONFIG_PKG_USING_AIP650 is not set
# CONFIG_PKG_USING_FINGERPRINT is not set
# CONFIG_PKG_USING_BT_ECB02C is not set
# CONFIG_PKG_USING_UAT is not set
# CONFIG_PKG_USING_ST7789 is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
#
# AI packages
@ -621,6 +770,16 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_QUEST is not set
# CONFIG_PKG_USING_NAXOS is not set
#
# Signal Processing and Control Algorithm Packages
#
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_KISSFFT is not set
# CONFIG_PKG_USING_CMSIS_DSP is not set
#
# miscellaneous packages
#
@ -628,7 +787,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# project laboratory
#
# CONFIG_PROJECT_USING_INDUSTRIAL_DATEWAY is not set
#
# samples: kernel and components samples
@ -651,6 +809,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_DONUT is not set
# CONFIG_PKG_USING_COWSAY is not set
# CONFIG_PKG_USING_MORSE is not set
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
@ -666,14 +825,12 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_STATE_MACHINE is not set
@ -683,55 +840,226 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_MFBD is not set
# CONFIG_PKG_USING_SLCAN2RTT is not set
# CONFIG_PKG_USING_SOEM is not set
CONFIG_SOC_FAMILY_STM32=y
CONFIG_SOC_SERIES_STM32F4=y
# CONFIG_PKG_USING_QPARAM is not set
# CONFIG_PKG_USING_CorevMCU_CLI is not set
# CONFIG_PKG_USING_GET_IRQ_PRIORITY is not set
#
# Hardware Drivers Config
# Arduino libraries
#
CONFIG_SOC_STM32F407ZG=y
CONFIG_BOARD_STM32F407_ATK_EXPLORER=y
# CONFIG_PKG_USING_RTDUINO is not set
#
# Onboard Peripheral Drivers
# Projects and Demos
#
CONFIG_BSP_USING_USB_TO_USART=y
# CONFIG_BSP_USING_ONBOARD_LCD is not set
# CONFIG_BSP_USING_LVGL is not set
# CONFIG_BSP_USING_SOFT_SPI_FLASH is not set
# CONFIG_BSP_USING_FS is not set
# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
#
# On-chip Peripheral Drivers
# Sensors
#
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART1=y
# CONFIG_BSP_UART1_RX_USING_DMA is not set
# CONFIG_BSP_UART1_TX_USING_DMA is not set
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_UART4 is not set
# CONFIG_BSP_USING_UART5 is not set
# CONFIG_BSP_USING_UART6 is not set
# CONFIG_BSP_USING_TIM is not set
# CONFIG_BSP_USING_PWM is not set
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
# CONFIG_BSP_USING_SOFT_SPI is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_I2C1 is not set
# CONFIG_BSP_USING_I2C2 is not set
# CONFIG_BSP_USING_DAC is not set
# CONFIG_BSP_USING_ONCHIP_RTC is not set
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_SDIO is not set
# CONFIG_BSP_USING_USBD is not set
# CONFIG_BSP_USING_USBH is not set
# CONFIG_BSP_USING_PULSE_ENCODER is not set
# CONFIG_BSP_USING_RNG is not set
# CONFIG_BSP_USING_UDID is not set
# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set
# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set
# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set
# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set
# CONFIG_PKG_USING_SEEED_ITG3200 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set
# CONFIG_PKG_USING_SEEED_MP503 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
#
# Board extended module Drivers
# Display
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set
# CONFIG_PKG_USING_ARDUINO_U8G2 is not set
# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
# CONFIG_PKG_USING_SEEED_TM1637 is not set
#
# Timing
#
# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set
# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
# CONFIG_PKG_USING_ARDUINO_TICKER is not set
# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
#
# Data Processing
#
# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set
# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set
#
# Data Storage
#
#
# Communication
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set
#
# Device Control
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set
#
# Other
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set
#
# Signal IO
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set
#
# Uncategorized
#

2
bsp/stm32/stm32f407-rt-spark/Kconfig
View File

@ -16,6 +16,6 @@ config PKGS_DIR
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "../libraries/Kconfig"
source "board/Kconfig"
source "$PKGS_DIR/Kconfig"

6
bsp/stm32/stm32f407-rt-spark/board/CubeMX_Config/.mxproject
View File

File diff suppressed because one or more lines are too long

327
bsp/stm32/stm32f407-rt-spark/board/CubeMX_Config/CubeMX_Config.ioc
View File

@ -1,23 +1,28 @@
#MicroXplorer Configuration settings - do not modify
CAD.formats=
CAD.pinconfig=
CAD.provider=
ETH.IPParameters=MediaInterface
ETH.MediaInterface=ETH_MEDIA_INTERFACE_RMII
ETH.MediaInterface=HAL_ETH_RMII_MODE
FSMC.IPParameters=WriteOperation1
FSMC.WriteOperation1=FSMC_WRITE_OPERATION_ENABLE
File.Version=6
GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false
Mcu.CPN=STM32F407ZGT6
Mcu.Family=STM32F4
Mcu.IP0=DAC
Mcu.IP1=ETH
Mcu.IP10=SYS
Mcu.IP11=TIM2
Mcu.IP12=TIM4
Mcu.IP13=TIM11
Mcu.IP14=TIM13
Mcu.IP15=TIM14
Mcu.IP16=USART1
Mcu.IP17=USART3
Mcu.IP18=USB_OTG_FS
Mcu.IP12=TIM3
Mcu.IP13=TIM4
Mcu.IP14=TIM11
Mcu.IP15=TIM13
Mcu.IP16=TIM14
Mcu.IP17=USART1
Mcu.IP18=USART3
Mcu.IP19=USB_OTG_FS
Mcu.IP2=FSMC
Mcu.IP3=IWDG
Mcu.IP4=NVIC
@ -26,120 +31,91 @@ Mcu.IP6=RTC
Mcu.IP7=SDIO
Mcu.IP8=SPI1
Mcu.IP9=SPI2
Mcu.IPNb=19
Mcu.IPNb=20
Mcu.Name=STM32F407Z(E-G)Tx
Mcu.Package=LQFP144
Mcu.Pin0=PC14-OSC32_IN
Mcu.Pin1=PC15-OSC32_OUT
Mcu.Pin10=PC1
Mcu.Pin11=PC2
Mcu.Pin12=PC3
Mcu.Pin13=PA1
Mcu.Pin14=PA2
Mcu.Pin15=PA3
Mcu.Pin16=PA4
Mcu.Pin17=PA5
Mcu.Pin18=PA7
Mcu.Pin19=PC4
Mcu.Pin2=PF0
Mcu.Pin20=PC5
Mcu.Pin21=PF12
Mcu.Pin22=PF13
Mcu.Pin23=PF14
Mcu.Pin24=PF15
Mcu.Pin25=PG0
Mcu.Pin26=PG1
Mcu.Pin27=PE7
Mcu.Pin28=PE8
Mcu.Pin29=PE9
Mcu.Pin3=PF1
Mcu.Pin30=PE10
Mcu.Pin31=PE11
Mcu.Pin32=PE12
Mcu.Pin33=PE13
Mcu.Pin34=PE14
Mcu.Pin35=PE15
Mcu.Pin36=PB10
Mcu.Pin37=PB11
Mcu.Pin38=PB13
Mcu.Pin39=PD8
Mcu.Pin4=PF2
Mcu.Pin40=PD9
Mcu.Pin41=PD10
Mcu.Pin42=PD11
Mcu.Pin43=PD12
Mcu.Pin44=PD13
Mcu.Pin45=PD14
Mcu.Pin46=PD15
Mcu.Pin47=PG2
Mcu.Pin48=PG3
Mcu.Pin49=PG4
Mcu.Pin5=PF3
Mcu.Pin50=PG5
Mcu.Pin51=PC8
Mcu.Pin52=PC9
Mcu.Pin53=PA9
Mcu.Pin54=PA10
Mcu.Pin55=PA11
Mcu.Pin56=PA12
Mcu.Pin57=PA13
Mcu.Pin58=PA14
Mcu.Pin59=PC10
Mcu.Pin6=PF4
Mcu.Pin60=PC11
Mcu.Pin61=PC12
Mcu.Pin62=PD0
Mcu.Pin63=PD1
Mcu.Pin64=PD2
Mcu.Pin65=PD4
Mcu.Pin66=PD5
Mcu.Pin67=PG10
Mcu.Pin68=PG11
Mcu.Pin69=PG13
Mcu.Pin7=PF5
Mcu.Pin70=PG14
Mcu.Pin71=PB3
Mcu.Pin72=PB4
Mcu.Pin73=PB5
Mcu.Pin74=PB6
Mcu.Pin75=PB7
Mcu.Pin76=PE0
Mcu.Pin77=PE1
Mcu.Pin78=VP_IWDG_VS_IWDG
Mcu.Pin79=VP_RTC_VS_RTC_Activate
Mcu.Pin8=PH0-OSC_IN
Mcu.Pin80=VP_SYS_VS_Systick
Mcu.Pin81=VP_TIM2_VS_ClockSourceINT
Mcu.Pin82=VP_TIM11_VS_ClockSourceINT
Mcu.Pin83=VP_TIM13_VS_ClockSourceINT
Mcu.Pin84=VP_TIM14_VS_ClockSourceINT
Mcu.Pin9=PH1-OSC_OUT
Mcu.PinsNb=85
Mcu.Pin10=PA3
Mcu.Pin11=PA4
Mcu.Pin12=PA5
Mcu.Pin13=PA7
Mcu.Pin14=PC4
Mcu.Pin15=PC5
Mcu.Pin16=PB1
Mcu.Pin17=PE7
Mcu.Pin18=PE8
Mcu.Pin19=PE9
Mcu.Pin2=PF9
Mcu.Pin20=PE10
Mcu.Pin21=PB10
Mcu.Pin22=PB11
Mcu.Pin23=PB13
Mcu.Pin24=PD13
Mcu.Pin25=PD14
Mcu.Pin26=PD15
Mcu.Pin27=PC8
Mcu.Pin28=PC9
Mcu.Pin29=PA9
Mcu.Pin3=PH0-OSC_IN
Mcu.Pin30=PA10
Mcu.Pin31=PA11
Mcu.Pin32=PA12
Mcu.Pin33=PA13
Mcu.Pin34=PA14
Mcu.Pin35=PC10
Mcu.Pin36=PC11
Mcu.Pin37=PC12
Mcu.Pin38=PD0
Mcu.Pin39=PD1
Mcu.Pin4=PH1-OSC_OUT
Mcu.Pin40=PD2
Mcu.Pin41=PD4
Mcu.Pin42=PD5
Mcu.Pin43=PG10
Mcu.Pin44=PG11
Mcu.Pin45=PG13
Mcu.Pin46=PG14
Mcu.Pin47=PB3
Mcu.Pin48=PB4
Mcu.Pin49=PB5
Mcu.Pin5=PC1
Mcu.Pin50=PB6
Mcu.Pin51=PB7
Mcu.Pin52=VP_IWDG_VS_IWDG
Mcu.Pin53=VP_RTC_VS_RTC_Activate
Mcu.Pin54=VP_SYS_VS_Systick
Mcu.Pin55=VP_TIM2_VS_ClockSourceINT
Mcu.Pin56=VP_TIM3_VS_ClockSourceINT
Mcu.Pin57=VP_TIM11_VS_ClockSourceINT
Mcu.Pin58=VP_TIM13_VS_ClockSourceINT
Mcu.Pin59=VP_TIM14_VS_ClockSourceINT
Mcu.Pin6=PC2
Mcu.Pin7=PC3
Mcu.Pin8=PA1
Mcu.Pin9=PA2
Mcu.PinsNb=60
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F407ZGTx
MxCube.Version=6.0.1
MxDb.Version=DB.6.0.0
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
MxCube.Version=6.9.0
MxDb.Version=DB.6.0.90
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SPI1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SPI1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA1.Mode=RMII
PA1.Signal=ETH_REF_CLK
PA9.GPIOParameters=GPIO_PuPd
PA9.GPIO_PuPd=GPIO_PULLUP
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
PA10.GPIOParameters=GPIO_PuPd
PA10.GPIO_PuPd=GPIO_PULLUP
PA10.Mode=Asynchronous
@ -160,6 +136,11 @@ PA5.Locked=true
PA5.Signal=COMP_DAC2_group
PA7.Mode=RMII
PA7.Signal=ETH_CRS_DV
PA9.GPIOParameters=GPIO_PuPd
PA9.GPIO_PuPd=GPIO_PULLUP
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
PB1.Signal=S_TIM3_CH4
PB10.GPIOParameters=GPIO_PuPd
PB10.GPIO_PuPd=GPIO_PULLUP
PB10.Mode=Asynchronous
@ -209,9 +190,6 @@ PC9.Mode=SD_4_bits_Wide_bus
PC9.Signal=SDIO_D1
PD0.Signal=FSMC_D2_DA2
PD1.Signal=FSMC_D3_DA3
PD10.Signal=FSMC_D15_DA15
PD11.Signal=FSMC_A16_CLE
PD12.Signal=FSMC_A17_ALE
PD13.Signal=FSMC_A18
PD14.Signal=FSMC_D0_DA0
PD15.Signal=FSMC_D1_DA1
@ -219,31 +197,11 @@ PD2.Mode=SD_4_bits_Wide_bus
PD2.Signal=SDIO_CMD
PD4.Signal=FSMC_NOE
PD5.Signal=FSMC_NWE
PD8.Signal=FSMC_D13_DA13
PD9.Signal=FSMC_D14_DA14
PE0.Signal=FSMC_NBL0
PE1.Signal=FSMC_NBL1
PE10.Signal=FSMC_D7_DA7
PE11.Signal=FSMC_D8_DA8
PE12.Signal=FSMC_D9_DA9
PE13.Signal=FSMC_D10_DA10
PE14.Signal=FSMC_D11_DA11
PE15.Signal=FSMC_D12_DA12
PE7.Signal=FSMC_D4_DA4
PE8.Signal=FSMC_D5_DA5
PE9.Signal=FSMC_D6_DA6
PF0.Signal=FSMC_A0
PF1.Signal=FSMC_A1
PF12.Signal=FSMC_A6
PF13.Signal=FSMC_A7
PF14.Signal=FSMC_A8
PF15.Signal=FSMC_A9
PF2.Signal=FSMC_A2
PF3.Signal=FSMC_A3
PF4.Signal=FSMC_A4
PF5.Signal=FSMC_A5
PG0.Signal=FSMC_A10
PG1.Signal=FSMC_A11
PF9.Signal=S_TIM14_CH1
PG10.Mode=NorPsramChipSelect3_1
PG10.Signal=FSMC_NE3
PG11.Locked=true
@ -255,10 +213,6 @@ PG13.Signal=ETH_TXD0
PG14.Locked=true
PG14.Mode=RMII
PG14.Signal=ETH_TXD1
PG2.Signal=FSMC_A12
PG3.Signal=FSMC_A13
PG4.Signal=FSMC_A14
PG5.Signal=FSMC_A15
PH0-OSC_IN.Mode=HSE-External-Oscillator
PH0-OSC_IN.Signal=RCC_OSC_IN
PH1-OSC_OUT.Mode=HSE-External-Oscillator
@ -273,7 +227,7 @@ ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32F407ZGTx
ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.25.2
ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.27.1
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
@ -286,12 +240,15 @@ ProjectManager.PreviousToolchain=
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=CubeMX_Config.ioc
ProjectManager.ProjectName=CubeMX_Config
ProjectManager.ProjectStructure=
ProjectManager.RegisterCallBack=
ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=MDK-ARM V5
ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_ETH_Init-ETH-false-HAL-true,6-MX_USART3_UART_Init-USART3-false-HAL-true,7-MX_ADC1_Init-ADC1-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_IWDG_Init-IWDG-false-HAL-true,10-MX_TIM14_Init-TIM14-false-HAL-true,11-MX_TIM13_Init-TIM13-false-HAL-true,12-MX_TIM11_Init-TIM11-false-HAL-true,13-MX_SDIO_SD_Init-SDIO-false-HAL-true,14-MX_TIM2_Init-TIM2-false-HAL-true,15-MX_SPI2_Init-SPI2-false-HAL-true,16-MX_TIM4_Init-TIM4-false-HAL-true,17-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,18-MX_FSMC_Init-FSMC-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_ETH_Init-ETH-false-HAL-true,6-MX_USART3_UART_Init-USART3-false-HAL-true,7-MX_RTC_Init-RTC-false-HAL-true,8-MX_IWDG_Init-IWDG-false-HAL-true,9-MX_TIM14_Init-TIM14-false-HAL-true,10-MX_TIM13_Init-TIM13-false-HAL-true,11-MX_TIM11_Init-TIM11-false-HAL-true,12-MX_SDIO_SD_Init-SDIO-false-HAL-true,13-MX_TIM2_Init-TIM2-false-HAL-true,14-MX_SPI2_Init-SPI2-false-HAL-true,15-MX_TIM4_Init-TIM4-false-HAL-true,16-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,17-MX_FSMC_Init-FSMC-false-HAL-true,18-MX_DAC_Init-DAC-false-HAL-true,19-MX_TIM3_Init-TIM3-false-HAL-true
RCC.48MHZClocksFreq_Value=48000000
RCC.AHBFreq_Value=168000000
RCC.APB1CLKDivider=RCC_HCLK_DIV4
@ -330,86 +287,34 @@ SH.COMP_DAC1_group.0=DAC_OUT1,DAC_OUT1
SH.COMP_DAC1_group.ConfNb=1
SH.COMP_DAC2_group.0=DAC_OUT2,DAC_OUT2
SH.COMP_DAC2_group.ConfNb=1
SH.FSMC_A0.0=FSMC_A0,19b-a1
SH.FSMC_A0.ConfNb=1
SH.FSMC_A1.0=FSMC_A1,19b-a1
SH.FSMC_A1.ConfNb=1
SH.FSMC_A10.0=FSMC_A10,19b-a1
SH.FSMC_A10.ConfNb=1
SH.FSMC_A11.0=FSMC_A11,19b-a1
SH.FSMC_A11.ConfNb=1
SH.FSMC_A12.0=FSMC_A12,19b-a1
SH.FSMC_A12.ConfNb=1
SH.FSMC_A13.0=FSMC_A13,19b-a1
SH.FSMC_A13.ConfNb=1
SH.FSMC_A14.0=FSMC_A14,19b-a1
SH.FSMC_A14.ConfNb=1
SH.FSMC_A15.0=FSMC_A15,19b-a1
SH.FSMC_A15.ConfNb=1
SH.FSMC_A16_CLE.0=FSMC_A16,19b-a1
SH.FSMC_A16_CLE.ConfNb=1
SH.FSMC_A17_ALE.0=FSMC_A17,19b-a1
SH.FSMC_A17_ALE.ConfNb=1
SH.FSMC_A18.0=FSMC_A18,19b-a1
SH.FSMC_A18.0=FSMC_A18,A18_1
SH.FSMC_A18.ConfNb=1
SH.FSMC_A2.0=FSMC_A2,19b-a1
SH.FSMC_A2.ConfNb=1
SH.FSMC_A3.0=FSMC_A3,19b-a1
SH.FSMC_A3.ConfNb=1
SH.FSMC_A4.0=FSMC_A4,19b-a1
SH.FSMC_A4.ConfNb=1
SH.FSMC_A5.0=FSMC_A5,19b-a1
SH.FSMC_A5.ConfNb=1
SH.FSMC_A6.0=FSMC_A6,19b-a1
SH.FSMC_A6.ConfNb=1
SH.FSMC_A7.0=FSMC_A7,19b-a1
SH.FSMC_A7.ConfNb=1
SH.FSMC_A8.0=FSMC_A8,19b-a1
SH.FSMC_A8.ConfNb=1
SH.FSMC_A9.0=FSMC_A9,19b-a1
SH.FSMC_A9.ConfNb=1
SH.FSMC_D0_DA0.0=FSMC_D0,16b-d1
SH.FSMC_D0_DA0.0=FSMC_D0,8b-d1
SH.FSMC_D0_DA0.ConfNb=1
SH.FSMC_D10_DA10.0=FSMC_D10,16b-d1
SH.FSMC_D10_DA10.ConfNb=1
SH.FSMC_D11_DA11.0=FSMC_D11,16b-d1
SH.FSMC_D11_DA11.ConfNb=1
SH.FSMC_D12_DA12.0=FSMC_D12,16b-d1
SH.FSMC_D12_DA12.ConfNb=1
SH.FSMC_D13_DA13.0=FSMC_D13,16b-d1
SH.FSMC_D13_DA13.ConfNb=1
SH.FSMC_D14_DA14.0=FSMC_D14,16b-d1
SH.FSMC_D14_DA14.ConfNb=1
SH.FSMC_D15_DA15.0=FSMC_D15,16b-d1
SH.FSMC_D15_DA15.ConfNb=1
SH.FSMC_D1_DA1.0=FSMC_D1,16b-d1
SH.FSMC_D1_DA1.0=FSMC_D1,8b-d1
SH.FSMC_D1_DA1.ConfNb=1
SH.FSMC_D2_DA2.0=FSMC_D2,16b-d1
SH.FSMC_D2_DA2.0=FSMC_D2,8b-d1
SH.FSMC_D2_DA2.ConfNb=1
SH.FSMC_D3_DA3.0=FSMC_D3,16b-d1
SH.FSMC_D3_DA3.0=FSMC_D3,8b-d1
SH.FSMC_D3_DA3.ConfNb=1
SH.FSMC_D4_DA4.0=FSMC_D4,16b-d1
SH.FSMC_D4_DA4.0=FSMC_D4,8b-d1
SH.FSMC_D4_DA4.ConfNb=1
SH.FSMC_D5_DA5.0=FSMC_D5,16b-d1
SH.FSMC_D5_DA5.0=FSMC_D5,8b-d1
SH.FSMC_D5_DA5.ConfNb=1
SH.FSMC_D6_DA6.0=FSMC_D6,16b-d1
SH.FSMC_D6_DA6.0=FSMC_D6,8b-d1
SH.FSMC_D6_DA6.ConfNb=1
SH.FSMC_D7_DA7.0=FSMC_D7,16b-d1
SH.FSMC_D7_DA7.0=FSMC_D7,8b-d1
SH.FSMC_D7_DA7.ConfNb=1
SH.FSMC_D8_DA8.0=FSMC_D8,16b-d1
SH.FSMC_D8_DA8.ConfNb=1
SH.FSMC_D9_DA9.0=FSMC_D9,16b-d1
SH.FSMC_D9_DA9.ConfNb=1
SH.FSMC_NBL0.0=FSMC_NBL0,2ByteEnable1
SH.FSMC_NBL0.ConfNb=1
SH.FSMC_NBL1.0=FSMC_NBL1,2ByteEnable1
SH.FSMC_NBL1.ConfNb=1
SH.FSMC_NOE.0=FSMC_NOE,Sram1
SH.FSMC_NOE.0=FSMC_NOE,Lcd1
SH.FSMC_NOE.ConfNb=1
SH.FSMC_NWE.0=FSMC_NWE,Sram1
SH.FSMC_NWE.0=FSMC_NWE,Lcd1
SH.FSMC_NWE.ConfNb=1
SH.S_TIM14_CH1.0=TIM14_CH1,PWM Generation1 CH1
SH.S_TIM14_CH1.ConfNb=1
SH.S_TIM2_CH4.0=TIM2_CH4,PWM Generation4 CH4
SH.S_TIM2_CH4.ConfNb=1
SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4
SH.S_TIM3_CH4.ConfNb=1
SH.S_TIM4_CH1.0=TIM4_CH1,Encoder_Interface
SH.S_TIM4_CH1.ConfNb=1
SH.S_TIM4_CH2.0=TIM4_CH2,Encoder_Interface
@ -424,8 +329,12 @@ SPI2.Direction=SPI_DIRECTION_2LINES
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
SPI2.Mode=SPI_MODE_MASTER
SPI2.VirtualType=VM_MASTER
TIM14.Channel=TIM_CHANNEL_1
TIM14.IPParameters=Channel
TIM2.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
TIM2.IPParameters=Channel-PWM Generation4 CH4
TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
TIM3.IPParameters=Channel-PWM Generation4 CH4
USART1.IPParameters=VirtualMode
USART1.VirtualMode=VM_ASYNC
USART3.IPParameters=VirtualMode
@ -446,4 +355,6 @@ VP_TIM14_VS_ClockSourceINT.Mode=Enable_Timer
VP_TIM14_VS_ClockSourceINT.Signal=TIM14_VS_ClockSourceINT
VP_TIM2_VS_ClockSourceINT.Mode=Internal
VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
VP_TIM3_VS_ClockSourceINT.Mode=Internal
VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT
board=custom

3
bsp/stm32/stm32f407-rt-spark/board/CubeMX_Config/Inc/main.h
View File

@ -80,6 +80,7 @@ void Error_Handler(void);
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
@ -89,5 +90,3 @@ void Error_Handler(void);
#endif
#endif /* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

248
bsp/stm32/stm32f407-rt-spark/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f4xx_hal_conf_template.h
@ -8,23 +9,23 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_HAL_CONF_H
#define __STM32F4xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
@ -36,49 +37,50 @@ extern "C" {
*/
#define HAL_MODULE_ENABLED
/* #define HAL_ADC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_CAN_MODULE_ENABLED */
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_ADC_MODULE_ENABLED */
/* #define HAL_CAN_MODULE_ENABLED */
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
#define HAL_DAC_MODULE_ENABLED
/* #define HAL_DCMI_MODULE_ENABLED */
/* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */
/* #define HAL_DMA2D_MODULE_ENABLED */
#define HAL_ETH_MODULE_ENABLED
/* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_PCCARD_MODULE_ENABLED */
/* #define HAL_ETH_LEGACY_MODULE_ENABLED */
/* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_PCCARD_MODULE_ENABLED */
#define HAL_SRAM_MODULE_ENABLED
/* #define HAL_SDRAM_MODULE_ENABLED */
/* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_I2C_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_SDRAM_MODULE_ENABLED */
/* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_I2C_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */
#define HAL_RTC_MODULE_ENABLED
/* #define HAL_SAI_MODULE_ENABLED */
/* #define HAL_SAI_MODULE_ENABLED */
#define HAL_SD_MODULE_ENABLED
/* #define HAL_MMC_MODULE_ENABLED */
/* #define HAL_MMC_MODULE_ENABLED */
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
#define HAL_PCD_MODULE_ENABLED
/* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_DSI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_CEC_MODULE_ENABLED */
/* #define HAL_FMPI2C_MODULE_ENABLED */
/* #define HAL_SPDIFRX_MODULE_ENABLED */
/* #define HAL_DFSDM_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
/* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_DSI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_CEC_MODULE_ENABLED */
/* #define HAL_FMPI2C_MODULE_ENABLED */
/* #define HAL_FMPSMBUS_MODULE_ENABLED */
/* #define HAL_SPDIFRX_MODULE_ENABLED */
/* #define HAL_DFSDM_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
@ -94,11 +96,11 @@ extern "C" {
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
@ -107,26 +109,26 @@ extern "C" {
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature.*/
The real value may vary depending on the variations
in voltage and temperature.*/
/**
* @brief External Low Speed oscillator (LSE) value.
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
/**
@ -135,7 +137,7 @@ in voltage and temperature.*/
* frequency, this source is inserted directly through I2S_CKIN pad.
*/
#if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External audio frequency in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
@ -145,8 +147,8 @@ in voltage and temperature.*/
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY 0U /*!< tick interrupt priority */
#define USE_RTOS 0U
#define PREFETCH_ENABLE 1U
#define INSTRUCTION_CACHE_ENABLE 1U
@ -166,6 +168,7 @@ in voltage and temperature.*/
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
#define USE_HAL_FMPSMBUS_REGISTER_CALLBACKS 0U /* FMPSMBUS register callback disabled */
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
@ -211,27 +214,27 @@ in voltage and temperature.*/
#define MAC_ADDR5 0U
/* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
#define ETH_RX_BUF_SIZE 1524 /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
/* Section 2: PHY configuration section */
/* LAN8742A_PHY_ADDRESS Address*/
#define LAN8742A_PHY_ADDRESS 1U
/* DP83848_PHY_ADDRESS Address*/
#define DP83848_PHY_ADDRESS
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
#define PHY_RESET_DELAY 0x000000FFU
/* PHY Configuration delay */
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)
#define PHY_CONFIG_DELAY 0x00000FFFU
#define PHY_READ_TO ((uint32_t)0x0000FFFFU)
#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU)
#define PHY_READ_TO 0x0000FFFFU
#define PHY_WRITE_TO 0x0000FFFFU
/* Section 3: Common PHY Registers */
#define PHY_BCR ((uint16_t)0x00U) /*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x01U) /*!< Transceiver Basic Status Register */
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
@ -249,13 +252,10 @@ in voltage and temperature.*/
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x1FU) /*!< PHY status register Offset */
#define PHY_SR ((uint16_t)) /*!< PHY status register Offset */
#define PHY_SPEED_STATUS ((uint16_t)0x0004U) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0010U) /*!< PHY Duplex mask */
#define PHY_ISFR ((uint16_t)0x001DU) /*!< PHY Interrupt Source Flag register Offset */
#define PHY_ISFR_INT4 ((uint16_t)0x000BU) /*!< PHY Link down inturrupt */
#define PHY_SPEED_STATUS ((uint16_t)) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)) /*!< PHY Duplex mask */
/* ################## SPI peripheral configuration ########################## */
@ -272,195 +272,203 @@ in voltage and temperature.*/
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f4xx_hal_rcc.h"
#include "stm32f4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f4xx_hal_gpio.h"
#include "stm32f4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32f4xx_hal_exti.h"
#include "stm32f4xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f4xx_hal_dma.h"
#include "stm32f4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f4xx_hal_cortex.h"
#include "stm32f4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f4xx_hal_adc.h"
#include "stm32f4xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f4xx_hal_can.h"
#include "stm32f4xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#include "stm32f4xx_hal_can_legacy.h"
#include "stm32f4xx_hal_can_legacy.h"
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f4xx_hal_crc.h"
#include "stm32f4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32f4xx_hal_cryp.h"
#include "stm32f4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DMA2D_MODULE_ENABLED
#include "stm32f4xx_hal_dma2d.h"
#include "stm32f4xx_hal_dma2d.h"
#endif /* HAL_DMA2D_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f4xx_hal_dac.h"
#include "stm32f4xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_DCMI_MODULE_ENABLED
#include "stm32f4xx_hal_dcmi.h"
#include "stm32f4xx_hal_dcmi.h"
#endif /* HAL_DCMI_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED
#include "stm32f4xx_hal_eth.h"
#include "stm32f4xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
#include "stm32f4xx_hal_eth_legacy.h"
#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f4xx_hal_flash.h"
#include "stm32f4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sram.h"
#include "stm32f4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32f4xx_hal_nor.h"
#include "stm32f4xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32f4xx_hal_nand.h"
#include "stm32f4xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f4xx_hal_pccard.h"
#include "stm32f4xx_hal_pccard.h"
#endif /* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_SDRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sdram.h"
#include "stm32f4xx_hal_sdram.h"
#endif /* HAL_SDRAM_MODULE_ENABLED */
#ifdef HAL_HASH_MODULE_ENABLED
#include "stm32f4xx_hal_hash.h"
#include "stm32f4xx_hal_hash.h"
#endif /* HAL_HASH_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f4xx_hal_i2c.h"
#include "stm32f4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32f4xx_hal_smbus.h"
#include "stm32f4xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f4xx_hal_i2s.h"
#include "stm32f4xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f4xx_hal_iwdg.h"
#include "stm32f4xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LTDC_MODULE_ENABLED
#include "stm32f4xx_hal_ltdc.h"
#include "stm32f4xx_hal_ltdc.h"
#endif /* HAL_LTDC_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f4xx_hal_pwr.h"
#include "stm32f4xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32f4xx_hal_rng.h"
#include "stm32f4xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f4xx_hal_rtc.h"
#include "stm32f4xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32f4xx_hal_sai.h"
#include "stm32f4xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32f4xx_hal_sd.h"
#include "stm32f4xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f4xx_hal_spi.h"
#include "stm32f4xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f4xx_hal_tim.h"
#include "stm32f4xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f4xx_hal_uart.h"
#include "stm32f4xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f4xx_hal_usart.h"
#include "stm32f4xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f4xx_hal_irda.h"
#include "stm32f4xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f4xx_hal_smartcard.h"
#include "stm32f4xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f4xx_hal_wwdg.h"
#include "stm32f4xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f4xx_hal_pcd.h"
#include "stm32f4xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32f4xx_hal_hcd.h"
#include "stm32f4xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */
#ifdef HAL_DSI_MODULE_ENABLED
#include "stm32f4xx_hal_dsi.h"
#include "stm32f4xx_hal_dsi.h"
#endif /* HAL_DSI_MODULE_ENABLED */
#ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32f4xx_hal_qspi.h"
#include "stm32f4xx_hal_qspi.h"
#endif /* HAL_QSPI_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f4xx_hal_cec.h"
#include "stm32f4xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_FMPI2C_MODULE_ENABLED
#include "stm32f4xx_hal_fmpi2c.h"
#include "stm32f4xx_hal_fmpi2c.h"
#endif /* HAL_FMPI2C_MODULE_ENABLED */
#ifdef HAL_FMPSMBUS_MODULE_ENABLED
#include "stm32f4xx_hal_fmpsmbus.h"
#endif /* HAL_FMPSMBUS_MODULE_ENABLED */
#ifdef HAL_SPDIFRX_MODULE_ENABLED
#include "stm32f4xx_hal_spdifrx.h"
#include "stm32f4xx_hal_spdifrx.h"
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
#ifdef HAL_DFSDM_MODULE_ENABLED
#include "stm32f4xx_hal_dfsdm.h"
#include "stm32f4xx_hal_dfsdm.h"
#endif /* HAL_DFSDM_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32f4xx_hal_lptim.h"
#include "stm32f4xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_MMC_MODULE_ENABLED
#include "stm32f4xx_hal_mmc.h"
#include "stm32f4xx_hal_mmc.h"
#endif /* HAL_MMC_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
@ -473,11 +481,11 @@ in voltage and temperature.*/
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t *file, uint32_t line);
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
@ -485,5 +493,3 @@ void assert_failed(uint8_t *file, uint32_t line);
#endif
#endif /* __STM32F4xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

4
bsp/stm32/stm32f407-rt-spark/board/CubeMX_Config/Inc/stm32f4xx_it.h
View File

@ -38,7 +38,7 @@
#define __STM32F4xx_IT_H
#ifdef __cplusplus
extern "C" {
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
@ -83,5 +83,3 @@ void OTG_FS_IRQHandler(void);
#endif
#endif /* __STM32F4xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

975
bsp/stm32/stm32f407-rt-spark/board/CubeMX_Config/Src/main.c Normal file
View File

@ -0,0 +1,975 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "string.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
ETH_TxPacketConfig TxConfig;
ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
DAC_HandleTypeDef hdac;
ETH_HandleTypeDef heth;
IWDG_HandleTypeDef hiwdg;
RTC_HandleTypeDef hrtc;
SD_HandleTypeDef hsd;
SPI_HandleTypeDef hspi1;
SPI_HandleTypeDef hspi2;
TIM_HandleTypeDef htim2;
TIM_HandleTypeDef htim3;
TIM_HandleTypeDef htim4;
TIM_HandleTypeDef htim11;
TIM_HandleTypeDef htim13;
TIM_HandleTypeDef htim14;
UART_HandleTypeDef huart1;
UART_HandleTypeDef huart3;
PCD_HandleTypeDef hpcd_USB_OTG_FS;
SRAM_HandleTypeDef hsram1;
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_USART1_UART_Init(void);
static void MX_SPI1_Init(void);
static void MX_ETH_Init(void);
static void MX_USART3_UART_Init(void);
static void MX_RTC_Init(void);
static void MX_IWDG_Init(void);
static void MX_TIM14_Init(void);
static void MX_TIM13_Init(void);
static void MX_TIM11_Init(void);
static void MX_SDIO_SD_Init(void);
static void MX_TIM2_Init(void);
static void MX_SPI2_Init(void);
static void MX_TIM4_Init(void);
static void MX_USB_OTG_FS_PCD_Init(void);
static void MX_FSMC_Init(void);
static void MX_DAC_Init(void);
static void MX_TIM3_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_USART1_UART_Init();
MX_SPI1_Init();
MX_ETH_Init();
MX_USART3_UART_Init();
MX_RTC_Init();
MX_IWDG_Init();
MX_TIM14_Init();
MX_TIM13_Init();
MX_TIM11_Init();
MX_SDIO_SD_Init();
MX_TIM2_Init();
MX_SPI2_Init();
MX_TIM4_Init();
MX_USB_OTG_FS_PCD_Init();
MX_FSMC_Init();
MX_DAC_Init();
MX_TIM3_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE
|RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 4;
RCC_OscInitStruct.PLL.PLLN = 168;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 7;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief DAC Initialization Function
* @param None
* @retval None
*/
static void MX_DAC_Init(void)
{
/* USER CODE BEGIN DAC_Init 0 */
/* USER CODE END DAC_Init 0 */
DAC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN DAC_Init 1 */
/* USER CODE END DAC_Init 1 */
/** DAC Initialization
*/
hdac.Instance = DAC;
if (HAL_DAC_Init(&hdac) != HAL_OK)
{
Error_Handler();
}
/** DAC channel OUT1 config
*/
sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
if (HAL_DAC_ConfigChannel(&hdac, &sConfig, DAC_CHANNEL_1) != HAL_OK)
{
Error_Handler();
}
/** DAC channel OUT2 config
*/
if (HAL_DAC_ConfigChannel(&hdac, &sConfig, DAC_CHANNEL_2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN DAC_Init 2 */
/* USER CODE END DAC_Init 2 */
}
/**
* @brief ETH Initialization Function
* @param None
* @retval None
*/
static void MX_ETH_Init(void)
{
/* USER CODE BEGIN ETH_Init 0 */
/* USER CODE END ETH_Init 0 */
static uint8_t MACAddr[6];
/* USER CODE BEGIN ETH_Init 1 */
/* USER CODE END ETH_Init 1 */
heth.Instance = ETH;
MACAddr[0] = 0x00;
MACAddr[1] = 0x80;
MACAddr[2] = 0xE1;
MACAddr[3] = 0x00;
MACAddr[4] = 0x00;
MACAddr[5] = 0x00;
heth.Init.MACAddr = &MACAddr[0];
heth.Init.MediaInterface = HAL_ETH_RMII_MODE;
heth.Init.TxDesc = DMATxDscrTab;
heth.Init.RxDesc = DMARxDscrTab;
heth.Init.RxBuffLen = 1524;
/* USER CODE BEGIN MACADDRESS */
/* USER CODE END MACADDRESS */
if (HAL_ETH_Init(&heth) != HAL_OK)
{
Error_Handler();
}
memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
/* USER CODE BEGIN ETH_Init 2 */
/* USER CODE END ETH_Init 2 */
}
/**
* @brief IWDG Initialization Function
* @param None
* @retval None
*/
static void MX_IWDG_Init(void)
{
/* USER CODE BEGIN IWDG_Init 0 */
/* USER CODE END IWDG_Init 0 */
/* USER CODE BEGIN IWDG_Init 1 */
/* USER CODE END IWDG_Init 1 */
hiwdg.Instance = IWDG;
hiwdg.Init.Prescaler = IWDG_PRESCALER_4;
hiwdg.Init.Reload = 4095;
if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN IWDG_Init 2 */
/* USER CODE END IWDG_Init 2 */
}
/**
* @brief RTC Initialization Function
* @param None
* @retval None
*/
static void MX_RTC_Init(void)
{
/* USER CODE BEGIN RTC_Init 0 */
/* USER CODE END RTC_Init 0 */
/* USER CODE BEGIN RTC_Init 1 */
/* USER CODE END RTC_Init 1 */
/** Initialize RTC Only
*/
hrtc.Instance = RTC;
hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
hrtc.Init.AsynchPrediv = 127;
hrtc.Init.SynchPrediv = 255;
hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
if (HAL_RTC_Init(&hrtc) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN RTC_Init 2 */
/* USER CODE END RTC_Init 2 */
}
/**
* @brief SDIO Initialization Function
* @param None
* @retval None
*/
static void MX_SDIO_SD_Init(void)
{
/* USER CODE BEGIN SDIO_Init 0 */
/* USER CODE END SDIO_Init 0 */
/* USER CODE BEGIN SDIO_Init 1 */
/* USER CODE END SDIO_Init 1 */
hsd.Instance = SDIO;
hsd.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
hsd.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
hsd.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
hsd.Init.BusWide = SDIO_BUS_WIDE_4B;
hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
hsd.Init.ClockDiv = 0;
if (HAL_SD_Init(&hsd) != HAL_OK)
{
Error_Handler();
}
if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SDIO_Init 2 */
/* USER CODE END SDIO_Init 2 */
}
/**
* @brief SPI1 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI1_Init(void)
{
/* USER CODE BEGIN SPI1_Init 0 */
/* USER CODE END SPI1_Init 0 */
/* USER CODE BEGIN SPI1_Init 1 */
/* USER CODE END SPI1_Init 1 */
/* SPI1 parameter configuration*/
hspi1.Instance = SPI1;
hspi1.Init.Mode = SPI_MODE_MASTER;
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1.Init.NSS = SPI_NSS_SOFT;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi1.Init.CRCPolynomial = 10;
if (HAL_SPI_Init(&hspi1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SPI1_Init 2 */
/* USER CODE END SPI1_Init 2 */
}
/**
* @brief SPI2 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI2_Init(void)
{
/* USER CODE BEGIN SPI2_Init 0 */
/* USER CODE END SPI2_Init 0 */
/* USER CODE BEGIN SPI2_Init 1 */
/* USER CODE END SPI2_Init 1 */
/* SPI2 parameter configuration*/
hspi2.Instance = SPI2;
hspi2.Init.Mode = SPI_MODE_MASTER;
hspi2.Init.Direction = SPI_DIRECTION_2LINES;
hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi2.Init.NSS = SPI_NSS_SOFT;
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi2.Init.CRCPolynomial = 10;
if (HAL_SPI_Init(&hspi2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SPI2_Init 2 */
/* USER CODE END SPI2_Init 2 */
}
/**
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
htim2.Init.Prescaler = 0;
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
htim2.Init.Period = 4294967295;
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 0;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
}
/**
* @brief TIM3 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM3_Init(void)
{
/* USER CODE BEGIN TIM3_Init 0 */
/* USER CODE END TIM3_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
/* USER CODE BEGIN TIM3_Init 1 */
/* USER CODE END TIM3_Init 1 */
htim3.Instance = TIM3;
htim3.Init.Prescaler = 0;
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
htim3.Init.Period = 65535;
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 0;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM3_Init 2 */
/* USER CODE END TIM3_Init 2 */
HAL_TIM_MspPostInit(&htim3);
}
/**
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_Encoder_InitTypeDef sConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
htim4.Init.Prescaler = 0;
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
htim4.Init.Period = 65535;
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
sConfig.EncoderMode = TIM_ENCODERMODE_TI1;
sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
sConfig.IC1Filter = 0;
sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
sConfig.IC2Filter = 0;
if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
}
/**
* @brief TIM11 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM11_Init(void)
{
/* USER CODE BEGIN TIM11_Init 0 */
/* USER CODE END TIM11_Init 0 */
/* USER CODE BEGIN TIM11_Init 1 */
/* USER CODE END TIM11_Init 1 */
htim11.Instance = TIM11;
htim11.Init.Prescaler = 0;
htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
htim11.Init.Period = 65535;
htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM11_Init 2 */
/* USER CODE END TIM11_Init 2 */
}
/**
* @brief TIM13 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM13_Init(void)
{
/* USER CODE BEGIN TIM13_Init 0 */
/* USER CODE END TIM13_Init 0 */
/* USER CODE BEGIN TIM13_Init 1 */
/* USER CODE END TIM13_Init 1 */
htim13.Instance = TIM13;
htim13.Init.Prescaler = 0;
htim13.Init.CounterMode = TIM_COUNTERMODE_UP;
htim13.Init.Period = 65535;
htim13.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim13.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim13) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM13_Init 2 */
/* USER CODE END TIM13_Init 2 */
}
/**
* @brief TIM14 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM14_Init(void)
{
/* USER CODE BEGIN TIM14_Init 0 */
/* USER CODE END TIM14_Init 0 */
TIM_OC_InitTypeDef sConfigOC = {0};
/* USER CODE BEGIN TIM14_Init 1 */
/* USER CODE END TIM14_Init 1 */
htim14.Instance = TIM14;
htim14.Init.Prescaler = 0;
htim14.Init.CounterMode = TIM_COUNTERMODE_UP;
htim14.Init.Period = 65535;
htim14.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim14.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim14) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim14) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 0;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
if (HAL_TIM_PWM_ConfigChannel(&htim14, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM14_Init 2 */
/* USER CODE END TIM14_Init 2 */
HAL_TIM_MspPostInit(&htim14);
}
/**
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
/* USER CODE BEGIN USART1_Init 0 */
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
huart1.Init.BaudRate = 115200;
huart1.Init.WordLength = UART_WORDLENGTH_8B;
huart1.Init.StopBits = UART_STOPBITS_1;
huart1.Init.Parity = UART_PARITY_NONE;
huart1.Init.Mode = UART_MODE_TX_RX;
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
if (HAL_UART_Init(&huart1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
/**
* @brief USART3 Initialization Function
* @param None
* @retval None
*/
static void MX_USART3_UART_Init(void)
{
/* USER CODE BEGIN USART3_Init 0 */
/* USER CODE END USART3_Init 0 */
/* USER CODE BEGIN USART3_Init 1 */
/* USER CODE END USART3_Init 1 */
huart3.Instance = USART3;
huart3.Init.BaudRate = 115200;
huart3.Init.WordLength = UART_WORDLENGTH_8B;
huart3.Init.StopBits = UART_STOPBITS_1;
huart3.Init.Parity = UART_PARITY_NONE;
huart3.Init.Mode = UART_MODE_TX_RX;
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
if (HAL_UART_Init(&huart3) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART3_Init 2 */
/* USER CODE END USART3_Init 2 */
}
/**
* @brief USB_OTG_FS Initialization Function
* @param None
* @retval None
*/
static void MX_USB_OTG_FS_PCD_Init(void)
{
/* USER CODE BEGIN USB_OTG_FS_Init 0 */
/* USER CODE END USB_OTG_FS_Init 0 */
/* USER CODE BEGIN USB_OTG_FS_Init 1 */
/* USER CODE END USB_OTG_FS_Init 1 */
hpcd_USB_OTG_FS.Instance = USB_OTG_FS;
hpcd_USB_OTG_FS.Init.dev_endpoints = 4;
hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL;
hpcd_USB_OTG_FS.Init.dma_enable = DISABLE;
hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE;
hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE;
hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE;
hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE;
hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE;
if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USB_OTG_FS_Init 2 */
/* USER CODE END USB_OTG_FS_Init 2 */
}
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
/* FSMC initialization function */
static void MX_FSMC_Init(void)
{
/* USER CODE BEGIN FSMC_Init 0 */
/* USER CODE END FSMC_Init 0 */
FSMC_NORSRAM_TimingTypeDef Timing = {0};
/* USER CODE BEGIN FSMC_Init 1 */
/* USER CODE END FSMC_Init 1 */
/** Perform the SRAM1 memory initialization sequence
*/
hsram1.Instance = FSMC_NORSRAM_DEVICE;
hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
/* hsram1.Init */
hsram1.Init.NSBank = FSMC_NORSRAM_BANK3;
hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_8;
hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
hsram1.Init.PageSize = FSMC_PAGE_SIZE_NONE;
/* Timing */
Timing.AddressSetupTime = 15;
Timing.AddressHoldTime = 15;
Timing.DataSetupTime = 255;
Timing.BusTurnAroundDuration = 15;
Timing.CLKDivision = 16;
Timing.DataLatency = 17;
Timing.AccessMode = FSMC_ACCESS_MODE_A;
/* ExtTiming */
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
{
Error_Handler( );
}
/* USER CODE BEGIN FSMC_Init 2 */
/* USER CODE END FSMC_Init 2 */
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

1380
bsp/stm32/stm32f407-rt-spark/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c
View File

File diff suppressed because it is too large Load Diff

129
bsp/stm32/stm32f407-rt-spark/board/CubeMX_Config/Src/stm32f4xx_it.c
View File

@ -86,12 +86,12 @@ extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
@ -99,14 +99,14 @@ void NMI_Handler(void)
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
@ -114,14 +114,14 @@ void HardFault_Handler(void)
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
@ -129,14 +129,14 @@ void MemManage_Handler(void)
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
@ -144,14 +144,14 @@ void BusFault_Handler(void)
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
@ -159,12 +159,12 @@ void UsageFault_Handler(void)
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
@ -172,12 +172,12 @@ void SVC_Handler(void)
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
@ -185,12 +185,12 @@ void DebugMon_Handler(void)
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
@ -198,13 +198,13 @@ void PendSV_Handler(void)
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
@ -219,13 +219,13 @@ void SysTick_Handler(void)
*/
void SPI1_IRQHandler(void)
{
/* USER CODE BEGIN SPI1_IRQn 0 */
/* USER CODE BEGIN SPI1_IRQn 0 */
/* USER CODE END SPI1_IRQn 0 */
HAL_SPI_IRQHandler(&hspi1);
/* USER CODE BEGIN SPI1_IRQn 1 */
/* USER CODE END SPI1_IRQn 0 */
HAL_SPI_IRQHandler(&hspi1);
/* USER CODE BEGIN SPI1_IRQn 1 */
/* USER CODE END SPI1_IRQn 1 */
/* USER CODE END SPI1_IRQn 1 */
}
/**
@ -233,13 +233,13 @@ void SPI1_IRQHandler(void)
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/**
@ -247,16 +247,15 @@ void USART1_IRQHandler(void)
*/
void OTG_FS_IRQHandler(void)
{
/* USER CODE BEGIN OTG_FS_IRQn 0 */
/* USER CODE BEGIN OTG_FS_IRQn 0 */
//You can open usb device or usb host, but open both of them is fatal error.
/* USER CODE END OTG_FS_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
/* USER CODE BEGIN OTG_FS_IRQn 1 */
/* USER CODE END OTG_FS_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
/* USER CODE BEGIN OTG_FS_IRQn 1 */
/* USER CODE END OTG_FS_IRQn 1 */
/* USER CODE END OTG_FS_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

387
bsp/stm32/stm32f407-rt-spark/board/Kconfig
View File

@ -7,7 +7,7 @@ config SOC_STM32F407ZG
select RT_USING_USER_MAIN
default y
config BOARD_STM32F407_ATK_EXPLORER
config BOARD_STM32F407_SPARK
bool
default y
@ -19,20 +19,72 @@ menu "Onboard Peripheral Drivers"
select BSP_USING_UART1
default y
config BSP_USING_COM2
bool "Enable COM2 (uart2 pin conflict with Ethernet and PWM)"
depends on (!BSP_USING_ETH && !BSP_USING_PWM)
select BSP_USING_UART
select BSP_USING_UART2
default n
config BSP_USING_COM3
bool "Enable COM3 (uart3)"
select BSP_USING_UART
select BSP_USING_UART3
default n
menuconfig BSP_USING_RS485
bool "Enable RS485 (uart6)"
select BSP_USING_UART
select BSP_USING_UART6
default n
if BSP_USING_RS485
comment "set rts pin number "
config BSP_RS485_RTS_PIN
int "RS485 rts pin number"
range 1 176
default 104
config RS485_UART_DEVICE_NAME
string "the uart name for rs485"
default "uart6"
endif
config BSP_USING_SRAM
bool "Enable SRAM"
select BSP_USING_EXT_FMC_IO
select BSP_USING_FMC
default n
config BSP_USING_ONBOARD_LCD
bool "Enable ATK LCD"
bool "Enable LCD(ST7787)"
select BSP_USING_SRAM
default n
if BSP_USING_ONBOARD_LCD
config BSP_USING_ONBOARD_LCD_TEST
bool "Enable lcd fill test"
config BSP_USING_ONBOARD_LCD_PWM_BL
bool "Enable pwm background light"
default y
select BSP_USING_PWM
select BSP_USING_PWM14
select BSP_USING_PWM14_CH1
endif
config BSP_USING_ONBOARD_LED_MATRIX
bool "Enable Led MATRIX"
default n
select BSP_USING_PWM
select BSP_USING_PWM3
select BSP_USING_PWM3_CH2
if BSP_USING_ONBOARD_LED_MATRIX
config BSP_USING_LED_MATRIX_RS485_DEMO
bool "use led matrix rs485 example"
default n
select BSP_USING_RS485
endif
config BSP_USING_LVGL
bool "Enable LVGL for LCD"
select BSP_USING_ONBOARD_LCD
select BSP_USING_TOUCH
select PKG_USING_LVGL
default n
@ -42,14 +94,26 @@ menu "Onboard Peripheral Drivers"
default y
endif
config BSP_USING_SOFT_SPI_FLASH
bool "Enable soft SPI FLASH (W25Q128 sspi2)"
select BSP_USING_SOFT_SPI
select BSP_USING_SOFT_SPI2
config BSP_USING_SPI_FLASH
bool "Enable SPI FLASH (W25Q64 spi2)"
select BSP_USING_SPI
select BSP_USING_SPI2
select RT_USING_SFUD
select RT_SFUD_USING_SFDP
default n
config BSP_USING_EEPROM
bool "Enable I2C EEPROM (i2c1)"
select BSP_USING_I2C1
default n
config BSP_USING_ENC28j60
bool "Enable Ethernet 28j60"
default n
select BSP_USING_SPI
select BSP_USING_SPI1
select RT_USING_ENC28J60
menuconfig BSP_USING_FS
bool "Enable File System"
select RT_USING_DFS
@ -62,18 +126,136 @@ menu "Onboard Peripheral Drivers"
select BSP_USING_SDIO
select RT_USING_DFS_ELMFAT
default n
config BSP_USING_SPI_FLASH_LITTLEFS
bool "Enable SPI-FLASH (LittleFS)"
select RT_USING_MTD_NOR
select BSP_USING_SPI_FLASH
select RT_USING_FAL
select FAL_USING_AUTO_INIT
select FAL_PART_HAS_TABLE_CFG
select PKG_USING_LITTLEFS
default n
if BSP_USING_SDCARD_FATFS
menuconfig BSP_USING_FS_AUTO_MOUNT
bool "Enable filesystem auto mount"
default y
endif
config BSP_USING_FLASH_FATFS
bool "Enable FAL filesystem partition base on W25Q64"
select BSP_USING_FAL
default n
if BSP_USING_FLASH_FATFS
menuconfig BSP_USING_FLASH_FS_AUTO_MOUNT
bool "Enable filesystem auto mount"
default y
endif
endif
config BSP_USING_FAL
bool "Enable FAL (enable on-chip flash and spi2 flash)"
select BSP_USING_SPI_FLASH
select RT_USING_FAL
select FAL_DEBUG_CONFIG
select FAL_PART_HAS_TABLE_CFG
select FAL_USING_SFUD_PORT
if BSP_USING_FAL
menuconfig BSP_USING_BOOTLOADER
bool "Enable bootloader partition table"
default n
endif
config BSP_USING_EASYFLASH
bool "Enable Easy Flash base on FAL"
select BSP_USING_FAL
select PKG_USING_EASYFLASH
default n
menuconfig BSP_USING_RW007_WLAN
bool "Enable Rw007 Wlan Base on SPI2"
default n
select PKG_USING_RW007
select BSP_USING_SPI
select BSP_USING_SPI2
if BSP_USING_RW007_WLAN && PKG_USING_RW007
config RW007_SPI_MAX_HZ
int "RW007 SPI Max Hz"
default 30000000
config RW007_CS_PIN
int "RW007 CS pin index"
default 90
config RW007_BOOT0_PIN
int "RW007 BOOT0 pin index (same as spi clk pin)"
default 29
config RW007_BOOT1_PIN
int "RW007 BOOT1 pin index (same as spi cs pin)"
default 90
config RW007_INT_BUSY_PIN
int "RW007 INT/BUSY pin index"
default 107
config RW007_RST_PIN
int "RW007 RESET pin index"
default 111
endif
config BSP_USING_AHT21
bool "Enable AHT21(i2c3)"
select BSP_USING_I2C
select BSP_USING_I2C3
select PKG_USING_SENSORS_DRIVERS
select PKG_USING_AHT10
default n
config BSP_USING_AP3216C
bool "Enable AP3216C(i2c2)"
select BSP_USING_I2C
select BSP_USING_I2C2
select PKG_USING_SENSORS_DRIVERS
select PKG_USING_AP3216C
default n
config BSP_USING_ICM20608
bool "Enable ICM20608(i2c2)"
select BSP_USING_I2C
select BSP_USING_I2C2
select PKG_USING_SENSORS_DRIVERS
select PKG_USING_ICM20608
default n
config BSP_USING_USB_MOUSE
bool "Enable Usb Mouse(usb hid device)"
select BSP_USING_USBD
select RT_USB_DEVICE_HID
select RT_USB_DEVICE_HID_MOUSE
select BSP_USING_ICM20608
config BSP_USING_EASYFLASH
bool "Enable Easy Flash base on FAL"
select BSP_USING_FAL
select PKG_USING_EASYFLASH
default n
menuconfig BSP_USING_CAN
bool "Enable On Board CAN"
select RT_USING_CAN
default n
if BSP_USING_CAN
config BSP_USING_CAN1
bool "Enable On Board CAN1"
default n
endif
menuconfig BSP_USING_AUDIO
bool "Enable Audio Device"
select RT_USING_AUDIO
select BSP_USING_I2C
select BSP_USING_I2C2
default n
if BSP_USING_AUDIO
config BSP_USING_AUDIO_PLAY
bool "Enable Audio Play"
default y
config BSP_USING_AUDIO_RECORD
bool "Enable Audio Record"
default n
endif
endmenu
menu "On-chip Peripheral Drivers"
@ -191,6 +373,23 @@ menu "On-chip Peripheral Drivers"
default n
endif
menuconfig BSP_USING_ONCHIP_RTC
bool "Enable RTC"
select RT_USING_RTC
default n
if BSP_USING_ONCHIP_RTC
choice
prompt "Select clock source"
default BSP_RTC_USING_LSE
config BSP_RTC_USING_LSE
bool "RTC USING LSE"
config BSP_RTC_USING_LSI
bool "RTC USING LSI"
endchoice
endif
menuconfig BSP_USING_PWM
bool "Enable PWM"
default n
@ -204,6 +403,27 @@ menu "On-chip Peripheral Drivers"
bool "Enable PWM2 channel4"
default n
endif
menuconfig BSP_USING_PWM3
bool "Enable timer3 output PWM"
default n
if BSP_USING_PWM3
config BSP_USING_PWM3_CH2
bool "Enable PWM3 channel2"
default n
endif
if BSP_USING_PWM3
config BSP_USING_PWM3_CH4
bool "Enable PWM3 channel4"
default n
endif
menuconfig BSP_USING_PWM14
bool "Enable timer14 output PWM"
default n
if BSP_USING_PWM14
config BSP_USING_PWM14_CH1
bool "Enable PWM14 channel1"
default n
endif
endif
config BSP_USING_ON_CHIP_FLASH
@ -234,7 +454,7 @@ menu "On-chip Peripheral Drivers"
range 1 176
default 91
endif
menuconfig BSP_USING_SOFT_SPI2
bool "Enable soft SPI2 BUS (software simulation)"
default n
@ -300,40 +520,68 @@ menu "On-chip Peripheral Drivers"
default n
endif
menuconfig BSP_USING_I2C1
bool "Enable I2C1 BUS (software simulation)"
menuconfig BSP_USING_I2C
bool "Enable I2C"
default n
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
if BSP_USING_I2C1
config BSP_I2C1_SCL_PIN
int "i2c1 scl pin number"
range 0 143
default 24
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 0 143
default 25
if BSP_USING_I2C
menuconfig BSP_USING_I2C1
bool "Enable I2C1 BUS (software simulation)"
default n
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
if BSP_USING_I2C1
config BSP_I2C1_SCL_PIN
int "i2c1 scl pin number"
range 0 143
default 24
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 0 143
default 25
endif
menuconfig BSP_USING_I2C2
bool "Enable I2C2 BUS for AP3216C/ICM20608/ES8388/ Onboard(software simulation)"
default n
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
if BSP_USING_I2C2
config BSP_I2C2_SCL_PIN
int "i2c2 scl pin number, PF1"
range 0 143
default 81
config BSP_I2C2_SDA_PIN
int "I2C2 sda pin number, PF0"
range 0 143
default 80
endif
menuconfig BSP_USING_I2C3
bool "Enable I2C3 BUS for AHT21 Onboard(software simulation)"
default n
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
if BSP_USING_I2C3
config BSP_I2C3_SCL_PIN
int "i2c3 scl pin number, PE0"
range 0 143
default 64
config BSP_I2C3_SDA_PIN
int "I2C3 sda pin number, PE1"
range 0 143
default 65
endif
endif
menuconfig BSP_USING_I2C2
bool "Enable LCD Touch BUS (software simulation)"
config BSP_USING_ONBOARD_PM
bool "Enable Power Management"
select RT_USING_PM
select RT_USING_HOOK
default n
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
if BSP_USING_I2C2
config BSP_I2C2_SCL_PIN
int "i2c2 scl pin number, PB0"
range 0 143
default 16
config BSP_I2C2_SDA_PIN
int "I2C2 sda pin number, PF11"
range 0 143
default 91
endif
menuconfig BSP_USING_DAC
bool "Enable DAC"
default n
@ -408,12 +656,51 @@ menu "On-chip Peripheral Drivers"
default n
endif
config BSP_USING_EXT_FMC_IO
bool
default n
config BSP_USING_FMC
bool
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
menuconfig BSP_USING_AT_ESP8266
bool "Enable ESP8266(AT Command, COM3)"
default n
select BSP_USING_COM3
select PKG_USING_AT_DEVICE
select AT_DEVICE_USING_ESP8266
select AT_DEVICE_ESP8266_SAMPLE
select AT_DEVICE_ESP8266_SAMPLE_BSP_TAKEOVER
if BSP_USING_AT_ESP8266
config ESP8266_SAMPLE_WIFI_SSID
string "WIFI ssid"
default "rtthread"
config ESP8266_SAMPLE_WIFI_PASSWORD
string "WIFI password"
default "12345678"
config ESP8266_SAMPLE_CLIENT_NAME
string "AT client device name (Must be 'uart3')"
default "uart3"
config ESP8266_SAMPLE_RECV_BUFF_LEN
int "The maximum length of receive line buffer"
default 512
comment "May adjust RT_SERIAL_RB_BUFSZ up to 512 if using the Serial V1 device driver"
endif
endmenu
endmenu

9
bsp/stm32/stm32f407-rt-spark/board/SConscript
View File

@ -27,4 +27,13 @@ elif rtconfig.PLATFORM in ['iccarm']:
CPPDEFINES = ['STM32F407xx']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
# if os.path.isfile(os.path.join(cwd, "ports", 'SConscript')):
# group = group + SConscript(os.path.join("ports", 'SConscript'))
list = os.listdir(cwd)
for item in list:
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
group = group + SConscript(os.path.join(item, 'SConscript'))
Return('group')

70
bsp/stm32/stm32f407-rt-spark/board/ports/SConscript Normal file
View File

@ -0,0 +1,70 @@
import os
import rtconfig
from building import *
Import('SDK_LIB')
cwd = GetCurrentDir()
# add general drivers
src = []
path = [cwd]
if GetDepend(['BSP_USING_ETH']):
src += Glob('phy_reset.c')
if GetDepend(['BSP_USING_RS485']):
src += Glob('drv_rs485.c')
if GetDepend(['BSP_USING_SOFT_SPI_FLASH']):
src += Glob('soft_spi_flash_init.c')
if GetDepend(['BSP_USING_SPI_FLASH']):
src += Glob('spi_flash_init.c')
if GetDepend(['BSP_USING_FS']):
src += Glob('drv_filesystem.c')
if GetDepend(['BSP_USING_FAL']):
src += Glob('fal/fal_spi_flash_sfud_port.c')
path += [cwd + '/fal']
if GetDepend(['BSP_USING_SRAM']):
src += Glob('drv_sram.c')
if GetDepend(['BSP_USING_ONBOARD_LCD']):
src += Glob('lcd/drv_lcd.c')
path += [cwd + '/lcd']
if GetDepend(['BSP_USING_ONBOARD_LED_MATRIX']):
src += Glob('led_matrix/drv_matrix_led.c')
path += [cwd + '/led_matrix']
if GetDepend(['BSP_USING_EASYFLASH']):
src += Glob('ef_fal_port.c')
if GetDepend(['BSP_USING_ENC28j60']):
src += Glob('drv_enc28j60.c')
if GetDepend(['BSP_USING_ONBOARD_PM']):
src += Glob('pm/drv_pm.c')
src += Glob('pm/drv_wakeup.c')
path += [cwd + '/pm']
if GetDepend(['BSP_USING_AUDIO']):
src += Glob('audio/drv_es8388.c')
src += Glob('audio/drv_sound.c')
path += [cwd + '/audio']
if GetDepend(['BSP_USING_AUDIO_RECORD']):
src += Glob('audio/drv_mic.c')
CPPDEFINES = ['STM32F407xx']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
list = os.listdir(cwd)
for item in list:
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
group = group + SConscript(os.path.join(item, 'SConscript'))
Return('group')

316
bsp/stm32/stm32f407-rt-spark/board/ports/audio/drv_es8388.c Normal file
View File

@ -0,0 +1,316 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Date Author Notes
* 2019-07-31 Zero-Free first implementation
*/
#include <rtthread.h>
#include <rtdevice.h>
#include "drv_es8388.h"
/* ES8388 address */
#define ES8388_ADDR 0x10 /*0x11:CE=1;0x10:CE=0*/
struct es8388_device
{
struct rt_i2c_bus_device *i2c;
rt_uint16_t pin;
};
static struct es8388_device es_dev = {0};
static rt_uint16_t reg_read(rt_uint8_t addr)
{
struct rt_i2c_msg msg[2] = {0};
rt_uint8_t val = 0xff;
RT_ASSERT(es_dev.i2c != RT_NULL);
msg[0].addr = ES8388_ADDR;
msg[0].flags = RT_I2C_WR;
msg[0].len = 1;
msg[0].buf = &addr;
msg[1].addr = ES8388_ADDR;
msg[1].flags = RT_I2C_RD;
msg[1].len = 1;
msg[1].buf = &val;
if (rt_i2c_transfer(es_dev.i2c, msg, 2) != 2)
{
rt_kprintf("I2C read data failed, reg = 0x%02x. \n", addr);
return 0xff;
}
return val;
}
static void reg_write(rt_uint8_t addr, rt_uint8_t val)
{
struct rt_i2c_msg msgs[1] = {0};
rt_uint8_t buff[2] = {0};
RT_ASSERT(es_dev.i2c != RT_NULL);
buff[0] = addr;
buff[1] = val;
msgs[0].addr = ES8388_ADDR;
msgs[0].flags = RT_I2C_WR;
msgs[0].buf = buff;
msgs[0].len = 2;
if (rt_i2c_transfer(es_dev.i2c, msgs, 1) != 1)
{
rt_kprintf("I2C write data failed, reg = 0x%2x. \n", addr);
return;
}
}
static int es8388_set_adc_dac_volume(int mode, int volume, int dot)
{
int res = 0;
if (volume < -96 || volume > 0)
{
if (volume < -96)
volume = -96;
else
volume = 0;
}
dot = (dot >= 5 ? 1 : 0);
volume = (-volume << 1) + dot;
if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC)
{
reg_write(ES8388_ADCCONTROL8, volume);
reg_write(ES8388_ADCCONTROL9, volume); //ADC Right Volume=0db
}
if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC)
{
reg_write(ES8388_DACCONTROL5, volume);
reg_write(ES8388_DACCONTROL4, volume);
}
return res;
}
void es8388_set_voice_mute(rt_bool_t enable)
{
rt_uint8_t reg = 0;
reg = reg_read(ES8388_DACCONTROL3);
reg = reg & 0xFB;
reg_write(ES8388_DACCONTROL3, reg | (((int)enable) << 2));
}
rt_err_t es8388_init(const char *i2c_name, rt_uint16_t pin)
{
es_dev.i2c = rt_i2c_bus_device_find(i2c_name);
if (es_dev.i2c == RT_NULL)
{
rt_kprintf("%s bus not found\n", i2c_name);
return -RT_ERROR;
}
es_dev.pin = pin;
reg_write(ES8388_DACCONTROL3, 0x04); // 0x04 mute/0x00 unmute&ramp;DAC unmute and disabled digital volume control soft ramp
/* Chip Control and Power Management */
reg_write(ES8388_CONTROL2, 0x50);
reg_write(ES8388_CHIPPOWER, 0x00); //normal all and power up all
reg_write(ES8388_MASTERMODE, 0x00); //TODO:CODEC IN I2S SLAVE MODE
/* dac */
reg_write(ES8388_DACPOWER, 0xC0); //disable DAC and disable Lout/Rout/1/2
reg_write(ES8388_CONTROL1, 0x12); //Enfr=0,Play&Record Mode,(0x17-both of mic&paly)
// reg_write(ES8388_CONTROL2, 0); //LPVrefBuf=0,Pdn_ana=0
reg_write(ES8388_DACCONTROL1, 0x18);//1a 0x18:16bit iis , 0x00:24
reg_write(ES8388_DACCONTROL2, 0x02); //DACFsMode,SINGLE SPEED; DACFsRatio,256
reg_write(ES8388_DACCONTROL16, 0x00); // 0x00 audio on LIN1&RIN1, 0x09 LIN2&RIN2
reg_write(ES8388_DACCONTROL17, 0x9C); // only left DAC to left mixer enable 0db
reg_write(ES8388_DACCONTROL20, 0x9C); // only right DAC to right mixer enable 0db
reg_write(ES8388_DACCONTROL21, 0x80); //set internal ADC and DAC use the same LRCK clock, ADC LRCK as internal LRCK
reg_write(ES8388_DACCONTROL23, 0x00); //vroi=0
es8388_set_adc_dac_volume(ES_MODE_DAC, 0, 0); // 0db
reg_write(ES8388_DACPOWER, 0x3c); //0x3c Enable DAC and Enable Lout/Rout/1/2
/* adc */
reg_write(ES8388_ADCPOWER, 0xFF);
reg_write(ES8388_ADCCONTROL1, 0xbb); // MIC Left and Right channel PGA gain
reg_write(ES8388_ADCCONTROL2, 0x00); //0x00 LINSEL & RINSEL, LIN1/RIN1 as ADC Input; DSSEL,use one DS Reg11; DSR, LINPUT1-RINPUT1
reg_write(ES8388_ADCCONTROL3, 0x02);
reg_write(ES8388_ADCCONTROL4, 0x0d); // Left/Right data, Left/Right justified mode, Bits length, I2S format
reg_write(ES8388_ADCCONTROL5, 0x02); //ADCFsMode,singel SPEED,RATIO=256
//ALC for Microphone
es8388_set_adc_dac_volume(ES_MODE_ADC, 0, 0); // 0db
reg_write(ES8388_ADCPOWER, 0x09); //Power on ADC, Enable LIN&RIN, Power off MICBIAS, set int1lp to low power mode
/* enable es8388 PA */
es8388_pa_power(RT_TRUE);
reg_write(ES8388_DACCONTROL24, 0x1E); // LOUT1VOL balanced noise: 0x18
reg_write(ES8388_DACCONTROL25, 0x1E); // ROUT1VOL balanced noise: 0x18
return RT_EOK;
}
rt_err_t es8388_start(enum es8388_mode mode)
{
int res = 0;
rt_uint8_t prev_data = 0, data = 0;
prev_data = reg_read(ES8388_DACCONTROL21);
if (mode == ES_MODE_LINE)
{
reg_write(ES8388_DACCONTROL16, 0x09); // 0x00 audio on LIN1&RIN1, 0x09 LIN2&RIN2 by pass enable
reg_write(ES8388_DACCONTROL17, 0x50); // left DAC to left mixer enable and LIN signal to left mixer enable 0db : bupass enable
reg_write(ES8388_DACCONTROL20, 0x50); // right DAC to right mixer enable and LIN signal to right mixer enable 0db : bupass enable
reg_write(ES8388_DACCONTROL21, 0xC0); //enable adc
}
else
{
reg_write(ES8388_DACCONTROL21, 0x80); //enable dac
}
data = reg_read(ES8388_DACCONTROL21);
if (prev_data != data)
{
reg_write(ES8388_CHIPPOWER, 0xF0); //start state machine
// reg_write(ES8388_ADDR, ES8388_CONTROL1, 0x16);
// reg_write(ES8388_ADDR, ES8388_CONTROL2, 0x50);
reg_write(ES8388_CHIPPOWER, 0x00); //start state machine
}
if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC || mode == ES_MODE_LINE)
{
reg_write(ES8388_ADCPOWER, 0x00); //power up adc and line in
}
if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC || mode == ES_MODE_LINE)
{
reg_write(ES8388_DACPOWER, 0x3c); //power up dac and line out
es8388_set_voice_mute(RT_FALSE);
}
return res;
}
rt_err_t es8388_stop(enum es8388_mode mode)
{
int res = 0;
if (mode == ES_MODE_LINE)
{
reg_write(ES8388_DACCONTROL21, 0x80); //enable dac
reg_write(ES8388_DACCONTROL16, 0x00); // 0x00 audio on LIN1&RIN1, 0x09 LIN2&RIN2
reg_write(ES8388_DACCONTROL17, 0x90); // only left DAC to left mixer enable 0db
reg_write(ES8388_DACCONTROL20, 0x90); // only right DAC to right mixer enable 0db
return res;
}
if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC)
{
reg_write(ES8388_DACPOWER, 0x00);
es8388_set_voice_mute(RT_TRUE); //res |= Es8388SetAdcDacVolume(ES_MODULE_DAC, -96, 5); // 0db
// reg_write(ES8388_ADDR, ES8388_DACPOWER, 0xC0); //power down dac and line out
}
if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC)
{
// Es8388SetAdcDacVolume(ES_MODULE_ADC, -96, 5); // 0db
reg_write(ES8388_ADCPOWER, 0xFF); //power down adc and line in
}
if (mode == ES_MODE_DAC_ADC)
{
reg_write(ES8388_DACCONTROL21, 0x9C); //disable mclk
// reg_write(ES8388_CONTROL1, 0x00);
// reg_write(ES8388_CONTROL2, 0x58);
// reg_write(ES8388_CHIPPOWER, 0xF3); //stop state machine
}
return RT_EOK;
}
rt_err_t es8388_fmt_set(enum es8388_mode mode, enum es8388_format fmt)
{
rt_uint8_t reg = 0;
if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC)
{
reg = reg_read(ES8388_ADCCONTROL4);
reg = reg & 0xfc;
reg_write(ES8388_ADCCONTROL4, reg | fmt);
}
if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC)
{
reg = reg_read(ES8388_DACCONTROL1);
reg = reg & 0xf9;
reg_write(ES8388_DACCONTROL1, reg | (fmt << 1));
}
return RT_EOK;
}
void es8388_volume_set(rt_uint8_t volume)
{
uint32_t real_vol = 0;
volume = 100 - volume;
if (volume > 100)
volume = 100;
real_vol = 192 * volume / 100;
reg_write(ES8388_DACCONTROL4, (rt_uint8_t)real_vol); // DAC L
reg_write(ES8388_DACCONTROL5, (rt_uint8_t)real_vol); // DAC R
}
rt_uint8_t es8388_volume_get(void)
{
rt_uint8_t volume;
volume = reg_read(ES8388_DACCONTROL24);
if (volume == 0xff)
{
volume = 0;
}
else
{
volume *= 3;
if (volume == 99)
volume = 100;
}
return volume;
}
void es8388_pa_power(rt_bool_t enable)
{
rt_pin_mode(es_dev.pin, PIN_MODE_OUTPUT);
if (enable)
{
rt_pin_write(es_dev.pin, PIN_HIGH);
}
else
{
rt_pin_write(es_dev.pin, PIN_LOW);
}
}
void estest()
{
// reg_write(ES8388_DACCONTROL24, volume);
reg_write(ES8388_ADCCONTROL1, 0x88); /* R9,左右通道PGA增益设置 */
reg_write(ES8388_ADCCONTROL2, 0x10); // 使用板载麦克风
// reg_write(ES8388_ADCCONTROL2,0x50); // 使用耳机麦克风
// reg_write(ES8388_ADCCONTROL3, 0xC0);
reg_write(ES8388_ADCCONTROL8, 0x00); // LADCVOL
reg_write(ES8388_ADCCONTROL9, 0x00); // RADCVOL
reg_write(ES8388_DACCONTROL16, 0x1B); // LMIXSEL RMIXSEL
reg_write(ES8388_DACCONTROL17, 0x40); // LI2LOVOL
reg_write(ES8388_DACCONTROL24, 0x21); // LOUT1VOL
reg_write(ES8388_DACCONTROL25, 0x21); // ROUT1VOL
reg_write(ES8388_DACCONTROL24, 33); // LOUT1VOL balanced noise: 0x18
reg_write(ES8388_DACCONTROL25, 33); // ROUT1VOL balanced noise: 0x18
}
MSH_CMD_EXPORT(estest, test mic loop)

95
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Date Author Notes
* 2019-07-31 Zero-Free first implementation
*/
#ifndef __DRV_ES8388_H__
#define __DRV_ES8388_H__
/* ES8388 register space */
#define ES8388_CONTROL1 0x00
#define ES8388_CONTROL2 0x01
#define ES8388_CHIPPOWER 0x02
#define ES8388_ADCPOWER 0x03
#define ES8388_DACPOWER 0x04
#define ES8388_CHIPLOPOW1 0x05
#define ES8388_CHIPLOPOW2 0x06
#define ES8388_ANAVOLMANAG 0x07
#define ES8388_MASTERMODE 0x08
#define ES8388_ADCCONTROL1 0x09
#define ES8388_ADCCONTROL2 0x0a
#define ES8388_ADCCONTROL3 0x0b
#define ES8388_ADCCONTROL4 0x0c
#define ES8388_ADCCONTROL5 0x0d
#define ES8388_ADCCONTROL6 0x0e
#define ES8388_ADCCONTROL7 0x0f
#define ES8388_ADCCONTROL8 0x10
#define ES8388_ADCCONTROL9 0x11
#define ES8388_ADCCONTROL10 0x12
#define ES8388_ADCCONTROL11 0x13
#define ES8388_ADCCONTROL12 0x14
#define ES8388_ADCCONTROL13 0x15
#define ES8388_ADCCONTROL14 0x16
#define ES8388_DACCONTROL1 0x17
#define ES8388_DACCONTROL2 0x18
#define ES8388_DACCONTROL3 0x19
#define ES8388_DACCONTROL4 0x1a
#define ES8388_DACCONTROL5 0x1b
#define ES8388_DACCONTROL6 0x1c
#define ES8388_DACCONTROL7 0x1d
#define ES8388_DACCONTROL8 0x1e
#define ES8388_DACCONTROL9 0x1f
#define ES8388_DACCONTROL10 0x20
#define ES8388_DACCONTROL11 0x21
#define ES8388_DACCONTROL12 0x22
#define ES8388_DACCONTROL13 0x23
#define ES8388_DACCONTROL14 0x24
#define ES8388_DACCONTROL15 0x25
#define ES8388_DACCONTROL16 0x26
#define ES8388_DACCONTROL17 0x27
#define ES8388_DACCONTROL18 0x28
#define ES8388_DACCONTROL19 0x29
#define ES8388_DACCONTROL20 0x2a
#define ES8388_DACCONTROL21 0x2b
#define ES8388_DACCONTROL22 0x2c
#define ES8388_DACCONTROL23 0x2d
#define ES8388_DACCONTROL24 0x2e
#define ES8388_DACCONTROL25 0x2f
#define ES8388_DACCONTROL26 0x30
#define ES8388_DACCONTROL27 0x31
#define ES8388_DACCONTROL28 0x32
#define ES8388_DACCONTROL29 0x33
#define ES8388_DACCONTROL30 0x34
enum es8388_mode
{
ES_MODE_NONE = 0x00,
ES_MODE_DAC = 0x01,
ES_MODE_ADC = 0x02,
ES_MODE_DAC_ADC = 0x03,
ES_MODE_LINE = 0x04,
ES_MODE_MAX = 0x06,
};
enum es8388_format
{
ES_FMT_NORMAL = 0,
ES_FMT_LEFT = 1,
ES_FMT_RIGHT = 2,
ES_FMT_DSP = 3,
};
rt_err_t es8388_init(const char *i2c_name, rt_uint16_t pin);
rt_err_t es8388_start(enum es8388_mode mode);
rt_err_t es8388_stop(enum es8388_mode mode);
rt_err_t es8388_fmt_set(enum es8388_mode mode, enum es8388_format fmt);
void es8388_volume_set(rt_uint8_t volume);
rt_uint8_t es8388_volume_get(void);
void es8388_pa_power(rt_bool_t enable);
#endif

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/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Date Author Notes
* 2019-07-31 Zero-Free first implementation
*/
#include <board.h>
#include "drv_es8388.h"
#define DBG_TAG "drv.mic"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
#define RX_FIFO_SIZE (1024)
struct mic_device
{
struct rt_audio_device audio;
struct rt_audio_configure record_config;
rt_uint8_t *rx_fifo;
rt_uint8_t volume;
};
static struct mic_device mic_dev = {0};
static rt_uint16_t zero_frame[2] = {0};
static I2S_HandleTypeDef I2S3_Handler = {0};
static DMA_HandleTypeDef I2S3_RXDMA_Handler = {0};
static void I2S3_Init(void)
{
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_I2S;
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
HAL_I2S_DeInit(&I2S3_Handler);
I2S3_Handler.Instance = I2S3ext;
I2S3_Handler.Init.Mode = I2S_MODE_SLAVE_RX;
I2S3_Handler.Init.Standard = I2S_STANDARD_PHILIPS;
I2S3_Handler.Init.DataFormat = I2S_DATAFORMAT_16B;
I2S3_Handler.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
I2S3_Handler.Init.AudioFreq = I2S_AUDIOFREQ_DEFAULT;
I2S3_Handler.Init.CPOL = I2S_CPOL_LOW;
I2S3_Handler.Init.ClockSource = I2S_CLOCK_PLL;
I2S3_Handler.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_ENABLE;
if (HAL_I2S_Init(&I2S3_Handler) != HAL_OK)
{
Error_Handler();
}
SET_BIT(I2S3_Handler.Instance->CR2, SPI_CR2_RXDMAEN);
__HAL_I2S_ENABLE(&I2S3_Handler);
/* Configure DMA used for I2S3 */
__HAL_RCC_DMA1_CLK_ENABLE();
I2S3_RXDMA_Handler.Instance = DMA1_Stream2;
I2S3_RXDMA_Handler.Init.Channel = DMA_CHANNEL_2;
I2S3_RXDMA_Handler.Init.Direction = DMA_PERIPH_TO_MEMORY;
I2S3_RXDMA_Handler.Init.PeriphInc = DMA_PINC_DISABLE;
I2S3_RXDMA_Handler.Init.MemInc = DMA_MINC_ENABLE;
I2S3_RXDMA_Handler.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
I2S3_RXDMA_Handler.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
I2S3_RXDMA_Handler.Init.Mode = DMA_CIRCULAR;
I2S3_RXDMA_Handler.Init.Priority = DMA_PRIORITY_MEDIUM;
I2S3_RXDMA_Handler.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
__HAL_LINKDMA(&I2S3_Handler,hdmarx,I2S3_RXDMA_Handler);
HAL_DMA_DeInit(&I2S3_RXDMA_Handler);
HAL_DMA_Init(&I2S3_RXDMA_Handler);
__HAL_DMA_DISABLE(&I2S3_RXDMA_Handler);
__HAL_DMA_ENABLE_IT(&I2S3_RXDMA_Handler, DMA_IT_TC); /* 开启传输完成中断 */
__HAL_DMA_CLEAR_FLAG(&I2S3_RXDMA_Handler, DMA_FLAG_TCIF2_6);
HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
}
void DMA1_Stream2_IRQHandler(void)
{
rt_audio_rx_done(&mic_dev.audio, &mic_dev.rx_fifo[0], RX_FIFO_SIZE);
HAL_DMA_IRQHandler(&I2S3_RXDMA_Handler);
}
static rt_err_t mic_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
{
rt_err_t result = RT_EOK;
struct mic_device *mic_dev;
RT_ASSERT(audio != RT_NULL);
mic_dev = (struct mic_device *)audio->parent.user_data;
switch (caps->main_type)
{
case AUDIO_TYPE_QUERY: /* qurey the types of hw_codec device */
{
switch (caps->sub_type)
{
case AUDIO_TYPE_QUERY:
caps->udata.mask = AUDIO_TYPE_INPUT | AUDIO_TYPE_MIXER;
break;
default:
result = -RT_ERROR;
break;
}
break;
}
case AUDIO_TYPE_INPUT: /* Provide capabilities of INPUT unit */
{
switch (caps->sub_type)
{
case AUDIO_DSP_PARAM:
caps->udata.config.samplerate = mic_dev->record_config.samplerate;
caps->udata.config.channels = mic_dev->record_config.channels;
caps->udata.config.samplebits = mic_dev->record_config.samplebits;
break;
case AUDIO_DSP_SAMPLERATE:
caps->udata.config.samplerate = mic_dev->record_config.samplerate;
break;
case AUDIO_DSP_CHANNELS:
caps->udata.config.channels = mic_dev->record_config.channels;
break;
case AUDIO_DSP_SAMPLEBITS:
caps->udata.config.samplebits = mic_dev->record_config.samplebits;
break;
default:
result = -RT_ERROR;
break;
}
break;
}
case AUDIO_TYPE_MIXER: /* report the Mixer Units */
{
switch (caps->sub_type)
{
case AUDIO_MIXER_QUERY:
caps->udata.mask = AUDIO_MIXER_VOLUME | AUDIO_MIXER_LINE;
break;
case AUDIO_MIXER_VOLUME:
caps->udata.value = mic_dev->volume;
break;
case AUDIO_MIXER_LINE:
break;
default:
result = -RT_ERROR;
break;
}
break;
}
default:
result = -RT_ERROR;
break;
}
return result;
}
static rt_err_t mic_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
{
rt_err_t result = RT_EOK;
struct mic_device *mic_dev;
RT_ASSERT(audio != RT_NULL);
mic_dev = (struct mic_device *)audio->parent.user_data;
switch (caps->main_type)
{
case AUDIO_TYPE_MIXER:
{
switch (caps->sub_type)
{
case AUDIO_MIXER_VOLUME:
{
rt_uint32_t volume = caps->udata.value;
mic_dev->volume = volume;
LOG_D("set volume %d", volume);
break;
}
default:
result = -RT_ERROR;
break;
}
break;
}
case AUDIO_TYPE_INPUT:
{
switch (caps->sub_type)
{
case AUDIO_DSP_PARAM:
{
// SAIA_Frequency_Set(caps->udata.config.samplerate);
HAL_I2S_DMAStop(&I2S3_Handler);
// SAIB_Channels_Set(caps->udata.config.channels);
HAL_I2S_Transmit(&I2S3_Handler, (uint16_t *)&zero_frame[0], 2, 0);
HAL_I2S_Receive_DMA(&I2S3_Handler, (uint16_t *)mic_dev->rx_fifo, RX_FIFO_SIZE / 2);
/* save configs */
mic_dev->record_config.samplerate = caps->udata.config.samplerate;
mic_dev->record_config.channels = caps->udata.config.channels;
mic_dev->record_config.samplebits = caps->udata.config.samplebits;
LOG_D("set samplerate %d", mic_dev->record_config.samplerate);
LOG_D("set channels %d", mic_dev->record_config.channels);
break;
}
case AUDIO_DSP_SAMPLERATE:
{
mic_dev->record_config.samplerate = caps->udata.config.samplerate;
LOG_D("set channels %d", mic_dev->record_config.channels);
break;
}
case AUDIO_DSP_CHANNELS:
{
mic_dev->record_config.channels = caps->udata.config.channels;
LOG_D("set channels %d", mic_dev->record_config.channels);
break;
}
default:
break;
}
break;
}
default:
break;
}
return result;
}
static rt_err_t mic_init(struct rt_audio_device *audio)
{
struct mic_device *mic_dev;
RT_ASSERT(audio != RT_NULL);
mic_dev = (struct mic_device *)audio->parent.user_data;
es8388_init("i2c2", RT_NULL);
I2S3_Init();
LOG_I("ES8388 init success.");
/* set default params */
// SAIB_Channels_Set(mic_dev->record_config.channels);
return RT_EOK;
}
static rt_err_t sound_init(struct rt_audio_device *audio)
{
rt_err_t result = RT_EOK;
struct sound_device *snd_dev;
RT_ASSERT(audio != RT_NULL);
snd_dev = (struct sound_device *)audio->parent.user_data;
I2S3_Init();
es8388_init("i2c2", RT_NULL);
/* set default params */
// I2S_Frequency_Set(snd_dev->replay_config.samplerate);
// SAIA_Channels_Set(snd_dev->replay_config.channels);
return result;
}
static rt_err_t mic_start(struct rt_audio_device *audio, int stream)
{
struct mic_device *mic_dev;
RT_ASSERT(audio != RT_NULL);
mic_dev = (struct mic_device *)audio->parent.user_data;
if (stream == AUDIO_STREAM_RECORD)
{
es8388_start(ES_MODE_ADC);
HAL_I2S_Transmit(&I2S3_Handler, (uint16_t *)&zero_frame[0], 2, 0);
// HAL_I2S_Receive_DMA(&I2S3_Handler, (uint16_t *)mic_dev->rx_fifo, RX_FIFO_SIZE / 2);
while(1)
{
HAL_I2S_Receive(&I2S3_Handler, (uint16_t *)mic_dev->rx_fifo, RX_FIFO_SIZE / 2,10);
for(int i=0;i<RX_FIFO_SIZE;i++)
{
rt_kprintf("%x",mic_dev->rx_fifo[i]);
}
}
}
return RT_EOK;
}
static rt_err_t mic_stop(struct rt_audio_device *audio, int stream)
{
if (stream == AUDIO_STREAM_RECORD)
{
HAL_I2S_DMAStop(&I2S3_Handler);
es8388_stop(ES_MODE_ADC);
LOG_D("mic stop.");
}
return RT_EOK;
}
static struct rt_audio_ops mic_ops =
{
.getcaps = mic_getcaps,
.configure = mic_configure,
.init = mic_init,
.start = mic_start,
.stop = mic_stop,
.transmit = RT_NULL,
.buffer_info = RT_NULL,
};
int rt_hw_mic_init(void)
{
rt_uint8_t *rx_fifo;
if (mic_dev.rx_fifo)
return RT_EOK;
rx_fifo = rt_malloc(RX_FIFO_SIZE);
if (rx_fifo == RT_NULL)
return -RT_ENOMEM;
rt_memset(rx_fifo, 0, RX_FIFO_SIZE);
mic_dev.rx_fifo = rx_fifo;
/* init default configuration */
{
mic_dev.record_config.samplerate = 44100;
mic_dev.record_config.channels = 2;
mic_dev.record_config.samplebits = 16;
mic_dev.volume = 55;
}
/* register sound device */
mic_dev.audio.ops = &mic_ops;
rt_audio_register(&mic_dev.audio, "mic0", RT_DEVICE_FLAG_RDONLY, &mic_dev);
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_mic_init);

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/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Date Author Notes
* 2019-07-31 Zero-Free first implementation
*/
#include <board.h>
#include "drv_sound.h"
#include "drv_es8388.h"
#define DBG_TAG "drv.sound"
#define DBG_LVL DBG_LOG
#include <rtdbg.h>
#define TX_FIFO_SIZE (2048)
struct sound_device
{
struct rt_audio_device audio;
struct rt_audio_configure replay_config;
rt_uint8_t *tx_fifo;
rt_uint8_t volume;
};
static struct sound_device snd_dev = {0};
static I2S_HandleTypeDef I2S3_Handler = {0};
static DMA_HandleTypeDef I2S3_TXDMA_Handler = {0};
/**
* 采样率计算公式:Fs=I2SxCLK/[256*(2*I2SDIV+ODD)]
* I2SxCLK=(HSE/pllm)*PLLI2SN/PLLI2SR
* 一般HSE=8Mhz
* pllm:在Sys_Clock_Set设置的时候确定，一般是8
* PLLI2SN:一般是192~432
* PLLI2SR:2~7
* I2SDIV:2~255
* ODD:0/1
* I2S分频系数表@pllm=8,HSE=8Mhz,即vco输入频率为1Mhz
* 表格式:采样率/10,PLLI2SN,PLLI2SR,I2SDIV,ODD
*/
const uint16_t I2S_PSC_TBL[][5]=
{
{ 800, 256, 5, 12, 1 }, /* 8Khz采样率 */
{ 1102, 429, 4, 19, 0 }, /* 11.025Khz采样率 */
{ 1600, 213, 2, 13, 0 }, /* 16Khz采样率 */
{ 2205, 429, 4, 9, 1 }, /* 22.05Khz采样率 */
{ 3200, 213, 2, 6, 1 }, /* 32Khz采样率 */
{ 4410, 271, 2, 6, 0 }, /* 44.1Khz采样率 */
{ 4800, 258, 3, 3, 1 }, /* 48Khz采样率 */
{ 8820, 316, 2, 3, 1 }, /* 88.2Khz采样率 */
{ 9600, 344, 2, 3, 1 }, /* 96Khz采样率 */
{ 17640, 361, 2, 2, 0 }, /* 176.4Khz采样率 */
{ 19200, 393, 2, 2, 0 }, /* 192Khz采样率 */
};
static void I2S3_Init(void)
{
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_I2S;
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
HAL_I2S_DeInit(&I2S3_Handler);
I2S3_Handler.Instance = SPI3;
I2S3_Handler.Init.Mode = I2S_MODE_MASTER_TX;
I2S3_Handler.Init.Standard = I2S_STANDARD_PHILIPS;
I2S3_Handler.Init.DataFormat = I2S_DATAFORMAT_16B;
I2S3_Handler.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
I2S3_Handler.Init.AudioFreq = I2S_AUDIOFREQ_44K;
I2S3_Handler.Init.CPOL = I2S_CPOL_LOW;
I2S3_Handler.Init.ClockSource = I2S_CLOCK_PLL;
I2S3_Handler.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_ENABLE;
if (HAL_I2S_Init(&I2S3_Handler) != HAL_OK)
{
Error_Handler();
}
SET_BIT(I2S3_Handler.Instance->CR2, SPI_CR2_TXDMAEN);
__HAL_I2S_ENABLE(&I2S3_Handler);
/* Configure DMA used for I2S3 */
__HAL_RCC_DMA1_CLK_ENABLE();
I2S3_TXDMA_Handler.Instance = DMA1_Stream7;
I2S3_TXDMA_Handler.Init.Channel = DMA_CHANNEL_0;
I2S3_TXDMA_Handler.Init.Direction = DMA_MEMORY_TO_PERIPH;
I2S3_TXDMA_Handler.Init.PeriphInc = DMA_PINC_DISABLE;
I2S3_TXDMA_Handler.Init.MemInc = DMA_MINC_ENABLE;
I2S3_TXDMA_Handler.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
I2S3_TXDMA_Handler.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
I2S3_TXDMA_Handler.Init.Mode = DMA_CIRCULAR;
I2S3_TXDMA_Handler.Init.Priority = DMA_PRIORITY_HIGH;
I2S3_TXDMA_Handler.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
__HAL_LINKDMA(&I2S3_Handler,hdmatx,I2S3_TXDMA_Handler);
HAL_DMA_DeInit(&I2S3_TXDMA_Handler);
HAL_DMA_Init(&I2S3_TXDMA_Handler);
// __HAL_DMA_ENABLE(&I2S3_TXDMA_Handler);
__HAL_DMA_DISABLE(&I2S3_TXDMA_Handler);
__HAL_DMA_ENABLE_IT(&I2S3_TXDMA_Handler, DMA_IT_TC); /* 开启传输完成中断 */
__HAL_DMA_CLEAR_FLAG(&I2S3_TXDMA_Handler, DMA_FLAG_TCIF0_4);
HAL_NVIC_SetPriority(DMA1_Stream7_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream7_IRQn);
}
void DMA1_Stream7_IRQHandler(void)
{
rt_audio_tx_complete(&snd_dev.audio);
HAL_DMA_IRQHandler(&I2S3_TXDMA_Handler);
}
//void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai)
//{
// if (hsai == &SAI1A_Handler)
// {
// rt_audio_tx_complete(&snd_dev.audio);
// }
//}
//void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai)
//{
// if (hsai == &SAI1A_Handler)
// {
// rt_audio_tx_complete(&snd_dev.audio);
// }
//}
void I2S_Frequency_Set(uint32_t samplerate)
{
// uint8_t i = 0;
// uint32_t tempreg = 0;
// RCC_PeriphCLKInitTypeDef rcc_i2s_clkinit_struct;
// for (i = 0; i < (sizeof(I2S_PSC_TBL) / 10); i++) /* 看看改采样率是否可以支持 */
// {
// if ((samplerate / 10) == I2S_PSC_TBL[i][0])
// {
// break;
// }
// }
// if (i == (sizeof(I2S_PSC_TBL) / 10))
// {
// LOG_E("samplerate not supported.");
// // return 1; /* 找不到 */
// }
// rcc_i2s_clkinit_struct.PeriphClockSelection = RCC_PERIPHCLK_I2S; /* 外设时钟源选择 */
// rcc_i2s_clkinit_struct.PLLI2S.PLLI2SN = (uint32_t)I2S_PSC_TBL[i][1]; /* 设置PLLI2SN */
// rcc_i2s_clkinit_struct.PLLI2S.PLLI2SR = (uint32_t)I2S_PSC_TBL[i][2]; /* 设置PLLI2SR */
// HAL_RCCEx_PeriphCLKConfig(&rcc_i2s_clkinit_struct); /* 设置时钟 */
// RCC->CR |= 1 << 26; /* 开启I2S时钟 */
// while((RCC->CR & 1 << 27) == 0); /* 等待I2S时钟开启成功. */
// tempreg = I2S_PSC_TBL[i][3] << 0; /* 设置I2SDIV */
// tempreg |= I2S_PSC_TBL[i][4] << 8; /* 设置ODD位 */
// tempreg |= 1 << 9; /* 使能MCKOE位,输出MCK */
// I2S3_Handler.Instance->I2SPR = tempreg; /* 设置I2SPR寄存器 */
// return 0;
// RCC_PeriphCLKInitTypeDef PeriphClkInit;
// HAL_RCCEx_GetPeriphCLKConfig(&PeriphClkInit);
// if ((frequency == SAI_AUDIO_FREQUENCY_11K) || (frequency == SAI_AUDIO_FREQUENCY_22K) || (frequency == SAI_AUDIO_FREQUENCY_44K))
// {
// /* Configure and enable PLLSAI1 clock to generate 45.714286MHz */
// PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SAI1;
// PeriphClkInit.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLLSAI2;
// PeriphClkInit.PLLSAI2.PLLSAI2Source = RCC_PLLSOURCE_HSE;
// PeriphClkInit.PLLSAI2.PLLSAI2M = 1;
// PeriphClkInit.PLLSAI2.PLLSAI2N = 40;
// PeriphClkInit.PLLSAI2.PLLSAI2ClockOut = RCC_PLLSAI2_SAI2CLK;
// HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
// }
// else
// {
// /* Configure and enable PLLSAI1 clock to generate 49.142857MHz */
// PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SAI1;
// PeriphClkInit.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLLSAI2;
// PeriphClkInit.PLLSAI2.PLLSAI2Source = RCC_PLLSOURCE_HSE;
// PeriphClkInit.PLLSAI2.PLLSAI2M = 1;
// PeriphClkInit.PLLSAI2.PLLSAI2N = 43;
// PeriphClkInit.PLLSAI2.PLLSAI2P = RCC_PLLP_DIV7;
// PeriphClkInit.PLLSAI2.PLLSAI2ClockOut = RCC_PLLSAI2_SAI2CLK;
// HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
// }
// /* Disable SAI peripheral to allow access to SAI internal registers */
// __HAL_SAI_DISABLE(&SAI1A_Handler);
// /* Update the SAI audio frequency configuration */
// SAI1A_Handler.Init.AudioFrequency = frequency;
// HAL_SAI_Init(&SAI1A_Handler);
// /* Enable SAI peripheral to generate MCLK */
// __HAL_SAI_ENABLE(&SAI1A_Handler);
}
void SAIA_Channels_Set(uint8_t channels)
{
// if (channels == 1)
// {
// SAI1A_Handler.Init.MonoStereoMode = SAI_MONOMODE;
// }
// else
// {
// SAI1A_Handler.Init.MonoStereoMode = SAI_STEREOMODE;
// }
// __HAL_SAI_DISABLE(&SAI1A_Handler);
// HAL_SAI_Init(&SAI1A_Handler);
// __HAL_SAI_ENABLE(&SAI1A_Handler);
}
/**
* RT-Thread Audio Device Driver Interface
*/
static rt_err_t sound_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
{
rt_err_t result = RT_EOK;
struct sound_device *snd_dev;
RT_ASSERT(audio != RT_NULL);
snd_dev = (struct sound_device *)audio->parent.user_data;
switch (caps->main_type)
{
case AUDIO_TYPE_QUERY: /* qurey the types of hw_codec device */
{
switch (caps->sub_type)
{
case AUDIO_TYPE_QUERY:
caps->udata.mask = AUDIO_TYPE_OUTPUT | AUDIO_TYPE_MIXER;
break;
default:
result = -RT_ERROR;
break;
}
break;
}
case AUDIO_TYPE_OUTPUT: /* Provide capabilities of OUTPUT unit */
{
switch (caps->sub_type)
{
case AUDIO_DSP_PARAM:
caps->udata.config.samplerate = snd_dev->replay_config.samplerate;
caps->udata.config.channels = snd_dev->replay_config.channels;
caps->udata.config.samplebits = snd_dev->replay_config.samplebits;
break;
case AUDIO_DSP_SAMPLERATE:
caps->udata.config.samplerate = snd_dev->replay_config.samplerate;
break;
case AUDIO_DSP_CHANNELS:
caps->udata.config.channels = snd_dev->replay_config.channels;
break;
case AUDIO_DSP_SAMPLEBITS:
caps->udata.config.samplebits = snd_dev->replay_config.samplebits;
break;
default:
result = -RT_ERROR;
break;
}
break;
}
case AUDIO_TYPE_MIXER: /* report the Mixer Units */
{
switch (caps->sub_type)
{
case AUDIO_MIXER_QUERY:
caps->udata.mask = AUDIO_MIXER_VOLUME;
break;
case AUDIO_MIXER_VOLUME:
caps->udata.value = es8388_volume_get();
break;
default:
result = -RT_ERROR;
break;
}
break;
}
default:
result = -RT_ERROR;
break;
}
return result;
}
static rt_err_t sound_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
{
rt_err_t result = RT_EOK;
struct sound_device *snd_dev;
RT_ASSERT(audio != RT_NULL);
snd_dev = (struct sound_device *)audio->parent.user_data;
switch (caps->main_type)
{
case AUDIO_TYPE_MIXER:
{
switch (caps->sub_type)
{
case AUDIO_MIXER_VOLUME:
{
rt_uint8_t volume = caps->udata.value;
es8388_volume_set(volume);
snd_dev->volume = volume;
LOG_D("set volume %d", volume);
break;
}
default:
result = -RT_ERROR;
break;
}
break;
}
case AUDIO_TYPE_OUTPUT:
{
switch (caps->sub_type)
{
case AUDIO_DSP_PARAM:
{
/* set samplerate */
I2S_Frequency_Set(caps->udata.config.samplerate);
/* set channels */
SAIA_Channels_Set(caps->udata.config.channels);
/* save configs */
snd_dev->replay_config.samplerate = caps->udata.config.samplerate;
snd_dev->replay_config.channels = caps->udata.config.channels;
snd_dev->replay_config.samplebits = caps->udata.config.samplebits;
LOG_D("set samplerate %d", snd_dev->replay_config.samplerate);
break;
}
case AUDIO_DSP_SAMPLERATE:
{
I2S_Frequency_Set(caps->udata.config.samplerate);
snd_dev->replay_config.samplerate = caps->udata.config.samplerate;
LOG_D("set samplerate %d", snd_dev->replay_config.samplerate);
break;
}
case AUDIO_DSP_CHANNELS:
{
SAIA_Channels_Set(caps->udata.config.channels);
snd_dev->replay_config.channels = caps->udata.config.channels;
LOG_D("set channels %d", snd_dev->replay_config.channels);
break;
}
case AUDIO_DSP_SAMPLEBITS:
{
/* not support */
snd_dev->replay_config.samplebits = caps->udata.config.samplebits;
break;
}
default:
result = -RT_ERROR;
break;
}
break;
}
default:
break;
}
return result;
}
static rt_err_t sound_init(struct rt_audio_device *audio)
{
rt_err_t result = RT_EOK;
struct sound_device *snd_dev;
RT_ASSERT(audio != RT_NULL);
snd_dev = (struct sound_device *)audio->parent.user_data;
es8388_init("i2c2", RT_NULL);
I2S3_Init();
LOG_I("ES8388 init success.");
/* set default params */
I2S_Frequency_Set(snd_dev->replay_config.samplerate);
SAIA_Channels_Set(snd_dev->replay_config.channels);
return result;
}
static rt_err_t sound_start(struct rt_audio_device *audio, int stream)
{
struct sound_device *snd_dev;
RT_ASSERT(audio != RT_NULL);
snd_dev = (struct sound_device *)audio->parent.user_data;
if (stream == AUDIO_STREAM_REPLAY)
{
LOG_D("sound start.");
es8388_start(ES_MODE_DAC);
HAL_I2S_Transmit_DMA(&I2S3_Handler, (uint16_t*)snd_dev->tx_fifo, TX_FIFO_SIZE / 2);
}
return RT_EOK;
}
static rt_err_t sound_stop(struct rt_audio_device *audio, int stream)
{
RT_ASSERT(audio != RT_NULL);
if (stream == AUDIO_STREAM_REPLAY)
{
HAL_I2S_DMAStop(&I2S3_Handler);
es8388_stop(ES_MODE_DAC);
LOG_D("sound stop.");
}
return RT_EOK;
}
static void sound_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info)
{
struct sound_device *snd_dev;
RT_ASSERT(audio != RT_NULL);
snd_dev = (struct sound_device *)audio->parent.user_data;
/**
* TX_FIFO
* +----------------+----------------+
* | block1 | block2 |
* +----------------+----------------+
* \ block_size /
*/
info->buffer = snd_dev->tx_fifo;
info->total_size = TX_FIFO_SIZE;
info->block_size = TX_FIFO_SIZE / 2;
info->block_count = 2;
}
static struct rt_audio_ops snd_ops =
{
.getcaps = sound_getcaps,
.configure = sound_configure,
.init = sound_init,
.start = sound_start,
.stop = sound_stop,
.transmit = RT_NULL,
.buffer_info = sound_buffer_info,
};
int rt_hw_sound_init(void)
{
rt_uint8_t *tx_fifo;
if (snd_dev.tx_fifo)
return RT_EOK;
tx_fifo = rt_malloc(TX_FIFO_SIZE);
if (tx_fifo == RT_NULL)
return -RT_ENOMEM;
rt_memset(tx_fifo, 0, TX_FIFO_SIZE);
snd_dev.tx_fifo = tx_fifo;
/* init default configuration */
{
snd_dev.replay_config.samplerate = 44100;
snd_dev.replay_config.channels = 2;
snd_dev.replay_config.samplebits = 16;
snd_dev.volume = 55;
}
/* register sound device */
snd_dev.audio.ops = &snd_ops;
rt_audio_register(&snd_dev.audio, "sound0", RT_DEVICE_FLAG_WRONLY, &snd_dev);
return RT_EOK;
}
// INIT_DEVICE_EXPORT(rt_hw_sound_init);

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Date Author Notes
* 2019-07-31 Zero-Free first implementation
*/
#ifndef __DRV_SOUND_H__
#define __DRV_SOUND_H__
int rt_hw_sound_init(void);
int rt_hw_mic_init(void);
#endif

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bsp/stm32/stm32f407-rt-spark/board/ports/drv_enc28j60.c Normal file
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-08-27 ZYLX the first version
*/
#include <drivers/pin.h>
#include <enc28j60.h>
#include "drv_spi.h"
#include "board.h"
#define PIN_NRF_IRQ GET_PIN(E,2)
int enc28j60_init(void)
{
__HAL_RCC_GPIOD_CLK_ENABLE();
rt_hw_spi_device_attach("spi1", "spi11", GPIOA, GPIO_PIN_4);
/* attach enc28j60 to spi. spi11 cs - PA4 */
enc28j60_attach("spi11");
/* init interrupt pin */
rt_pin_mode(PIN_NRF_IRQ, PIN_MODE_INPUT_PULLUP);
rt_pin_attach_irq(PIN_NRF_IRQ, PIN_IRQ_MODE_FALLING, (void(*)(void*))enc28j60_isr, RT_NULL);
rt_pin_irq_enable(PIN_NRF_IRQ, PIN_IRQ_ENABLE);
return 0;
}
INIT_COMPONENT_EXPORT(enc28j60_init);

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bsp/stm32/stm32f407-rt-spark/board/ports/drv_filesystem.c Normal file
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-13 balanceTWK add sdcard port file
* 2021-05-10 Meco Man fix a bug that cannot use fatfs in the main thread at starting up
* 2021-07-28 Meco Man implement romfs as the root filesystem
*/
#include <rtthread.h>
#include <dfs_romfs.h>
#include <dfs_fs.h>
#include <dfs_file.h>
#if DFS_FILESYSTEMS_MAX < 4
#error "Please define DFS_FILESYSTEMS_MAX more than 4"
#endif
#if DFS_FILESYSTEM_TYPES_MAX < 4
#error "Please define DFS_FILESYSTEM_TYPES_MAX more than 4"
#endif
#define DBG_TAG "app.filesystem"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
#ifdef BSP_USING_FS_AUTO_MOUNT
#ifdef BSP_USING_SDCARD_FATFS
static int onboard_sdcard_mount(void)
{
if (dfs_mount("sd0", "/sdcard", "elm", 0, 0) == RT_EOK)
{
LOG_I("SD card mount to '/sdcard'");
}
else
{
LOG_E("SD card mount to '/sdcard' failed!");
}
return RT_EOK;
}
#endif /* BSP_USING_SDCARD_FATFS */
#endif /* BSP_USING_FS_AUTO_MOUNT */
#ifdef BSP_USING_FLASH_FS_AUTO_MOUNT
#ifdef BSP_USING_FLASH_FATFS
#define FS_PARTITION_NAME "filesystem"
static int onboard_fal_mount(void)
{
/* 初始化 fal 功能 */
extern int fal_init(void);
extern struct rt_device *fal_blk_device_create(const char *parition_name);
fal_init();
/* 在 spi flash 中名为 "filesystem" 的分区上创建一个块设备 */
struct rt_device *flash_dev = fal_blk_device_create(FS_PARTITION_NAME);
if (flash_dev == NULL)
{
LOG_E("Can't create a block device on '%s' partition.", FS_PARTITION_NAME);
}
else
{
LOG_D("Create a block device on the %s partition of flash successful.", FS_PARTITION_NAME);
}
/* 挂载 spi flash 中名为 "filesystem" 的分区上的文件系统 */
if (dfs_mount(flash_dev->parent.name, "/fal", "elm", 0, 0) == 0)
{
LOG_I("Filesystem initialized!");
}
else
{
LOG_E("Failed to initialize filesystem!");
LOG_D("You should create a filesystem on the block device first!");
}
return RT_EOK;
}
#endif /*BSP_USING_FLASH_FATFS*/
#endif /*BSP_USING_FLASH_FS_AUTO_MOUNT*/
const struct romfs_dirent _romfs_root[] =
{
#ifdef BSP_USING_SDCARD_FATFS
{ROMFS_DIRENT_DIR, "sdcard", RT_NULL, 0},
#endif
#ifdef BSP_USING_FLASH_FATFS
{ROMFS_DIRENT_DIR, "fal", RT_NULL, 0},
#endif
};
const struct romfs_dirent romfs_root =
{
ROMFS_DIRENT_DIR, "/", (rt_uint8_t *)_romfs_root, sizeof(_romfs_root) / sizeof(_romfs_root[0])
};
static int filesystem_mount(void)
{
#ifdef BSP_USING_FS
if (dfs_mount(RT_NULL, "/", "rom", 0, &(romfs_root)) != 0)
{
LOG_E("rom mount to '/' failed!");
}
/* 确保块设备注册成功之后再挂载文件系统 */
rt_thread_delay(500);
#endif
#ifdef BSP_USING_FS_AUTO_MOUNT
onboard_sdcard_mount();
#endif /* BSP_USING_FS_AUTO_MOUNT */
#ifdef BSP_USING_FLASH_FS_AUTO_MOUNT
onboard_fal_mount();
#endif
return RT_EOK;
}
INIT_APP_EXPORT(filesystem_mount);

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bsp/stm32/stm32f407-rt-spark/board/ports/ef_fal_port.c Normal file
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/*
* This file is part of the EasyFlash Library.
*
* Copyright (c) 2015, Armink, <armink.ztl@gmail.com>
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* 'Software'), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Function: Portable interface for FAL (Flash Abstraction Layer) partition.
* Created on: 2018-05-19
*/
#include <easyflash.h>
#include <stdio.h>
#include <stdlib.h>
#include <stdarg.h>
#include <rthw.h>
#include <rtthread.h>
#include <fal.h>
/* EasyFlash partition name on FAL partition table */
#define FAL_EF_PART_NAME "easyflash"
/* default ENV set for user */
static const ef_env default_env_set[] = {
{"iap_need_copy_app", "0"},
{"iap_need_crc32_check", "0"},
{"iap_copy_app_size", "0"},
{"stop_in_bootloader", "0"},
};
static char log_buf[RT_CONSOLEBUF_SIZE];
static struct rt_semaphore env_cache_lock;
static const struct fal_partition *part = NULL;
/**
* Flash port for hardware initialize.
*
* @param default_env default ENV set for user
* @param default_env_size default ENV size
*
* @return result
*/
EfErrCode ef_port_init(ef_env const **default_env, size_t *default_env_size) {
EfErrCode result = EF_NO_ERR;
*default_env = default_env_set;
*default_env_size = sizeof(default_env_set) / sizeof(default_env_set[0]);
rt_sem_init(&env_cache_lock, "env lock", 1, RT_IPC_FLAG_PRIO);
part = fal_partition_find(FAL_EF_PART_NAME);
EF_ASSERT(part);
return result;
}
/**
* Read data from flash.
* @note This operation's units is word.
*
* @param addr flash address
* @param buf buffer to store read data
* @param size read bytes size
*
* @return result
*/
EfErrCode ef_port_read(uint32_t addr, uint32_t *buf, size_t size) {
EfErrCode result = EF_NO_ERR;
fal_partition_read(part, addr, (uint8_t *)buf, size);
return result;
}
/**
* Erase data on flash.
* @note This operation is irreversible.
* @note This operation's units is different which on many chips.
*
* @param addr flash address
* @param size erase bytes size
*
* @return result
*/
EfErrCode ef_port_erase(uint32_t addr, size_t size) {
EfErrCode result = EF_NO_ERR;
/* make sure the start address is a multiple of FLASH_ERASE_MIN_SIZE */
EF_ASSERT(addr % EF_ERASE_MIN_SIZE == 0);
if (fal_partition_erase(part, addr, size) < 0)
{
result = EF_ERASE_ERR;
}
return result;
}
/**
* Write data to flash.
* @note This operation's units is word.
* @note This operation must after erase. @see flash_erase.
*
* @param addr flash address
* @param buf the write data buffer
* @param size write bytes size
*
* @return result
*/
EfErrCode ef_port_write(uint32_t addr, const uint32_t *buf, size_t size) {
EfErrCode result = EF_NO_ERR;
if (fal_partition_write(part, addr, (uint8_t *)buf, size) < 0)
{
result = EF_WRITE_ERR;
}
return result;
}
/**
* lock the ENV ram cache
*/
void ef_port_env_lock(void) {
rt_sem_take(&env_cache_lock, RT_WAITING_FOREVER);
}
/**
* unlock the ENV ram cache
*/
void ef_port_env_unlock(void) {
rt_sem_release(&env_cache_lock);
}
/**
* This function is print flash debug info.
*
* @param file the file which has call this function
* @param line the line number which has call this function
* @param format output format
* @param ... args
*
*/
void ef_log_debug(const char *file, const long line, const char *format, ...) {
#ifdef PRINT_DEBUG
va_list args;
/* args point to the first variable parameter */
va_start(args, format);
ef_print("[Flash] (%s:%ld) ", file, line);
/* must use vprintf to print */
rt_vsprintf(log_buf, format, args);
ef_print("%s", log_buf);
va_end(args);
#endif
}
/**
* This function is print flash routine info.
*
* @param format output format
* @param ... args
*/
void ef_log_info(const char *format, ...) {
va_list args;
/* args point to the first variable parameter */
va_start(args, format);
ef_print("[Flash] ");
/* must use vprintf to print */
rt_vsprintf(log_buf, format, args);
ef_print("%s", log_buf);
va_end(args);
}
/**
* This function is print flash non-package info.
*
* @param format output format
* @param ... args
*/
void ef_print(const char *format, ...) {
va_list args;
/* args point to the first variable parameter */
va_start(args, format);
/* must use vprintf to print */
rt_vsprintf(log_buf, format, args);
rt_kprintf("%s", log_buf);
va_end(args);
}

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bsp/stm32/stm32f407-rt-spark/board/ports/fal/fal_cfg.h Normal file
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-5 SummerGift first version
*/
#ifndef _FAL_CFG_H_
#define _FAL_CFG_H_
#include <rtthread.h>
#include <board.h>
#define FLASH_SIZE_GRANULARITY_16K (4 * 16 * 1024)
#define FLASH_SIZE_GRANULARITY_64K (8 * 64 * 1024)
#define FLASH_SIZE_GRANULARITY_128K (8 * 128 * 1024)
#define STM32_FLASH_START_ADRESS_16K STM32_FLASH_START_ADRESS
#define STM32_FLASH_START_ADRESS_64K STM32_FLASH_START_ADRESS
#define STM32_FLASH_START_ADRESS_128K STM32_FLASH_START_ADRESS
extern const struct fal_flash_dev stm32_onchip_flash_16k;
extern const struct fal_flash_dev stm32_onchip_flash_64k;
extern const struct fal_flash_dev stm32_onchip_flash_128k;
extern struct fal_flash_dev w25q64;
/* flash device table */
#define FAL_FLASH_DEV_TABLE \
{ \
&stm32_onchip_flash_128k, \
&w25q64, \
}
/* ====================== Partition Configuration ========================== */
#ifdef BSP_USING_BOOTLOADER
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WROD, "bootloader", "onchip_flash_128k", 0, 128 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "app", "onchip_flash_128k", 128 * 1024, 384 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "easyflash", "W25Q64", 0, 512 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "download", "W25Q64", 512 * 1024, 1024 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "wifi_image", "W25Q64", (512 + 1024) * 1024, 512 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "font", "W25Q64", (512 + 1024 + 512) * 1024, 3 * 1024 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "filesystem", "W25Q64", (512 + 1024 + 512 + 3 * 1024) * 1024, 3 * 1024 * 1024, 0}, \
}
#else
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WROD, "app", "onchip_flash_128k", 0, 384 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "param", "onchip_flash_128k", 384 * 1024, 640 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "easyflash", "W25Q64", 0, 512 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "download", "W25Q64", 512 * 1024, 1024 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "wifi_image", "W25Q64", (512 + 1024) * 1024, 512 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "font", "W25Q64", (512 + 1024 + 512) * 1024, 3 * 1024 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "filesystem", "W25Q64", (512 + 1024 + 512 + 3 * 1024) * 1024, 3 * 1024 * 1024, 0}, \
}
#endif /*FAL_PART_TABLE*/
#endif /*BSP_USING_BOOTLOADER*/

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bsp/stm32/stm32f407-rt-spark/board/ports/fal/fal_spi_flash_sfud_port.c Normal file
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-08-07 Meco Man first version
*/
#include <fal.h>
#include <sfud.h>
#ifdef RT_USING_SFUD
#include <spi_flash_sfud.h>
#endif
static int init(void);
static int read(long offset, uint8_t *buf, size_t size);
static int write(long offset, const uint8_t *buf, size_t size);
static int erase(long offset, size_t size);
static sfud_flash_t sfud_dev = NULL;
struct fal_flash_dev w25q64 =
{
.name = "W25Q64",
.addr = 0,
.len = 8 * 1024 * 1024,
.blk_size = 4096,
.ops = {init, read, write, erase},
.write_gran = 1
};
static int init(void)
{
sfud_dev = rt_sfud_flash_find_by_dev_name("W25Q64");
if (RT_NULL == sfud_dev)
{
return -1;
}
/* update the flash chip information */
w25q64.blk_size = sfud_dev->chip.erase_gran;
w25q64.len = sfud_dev->chip.capacity;
return 0;
}
static int read(long offset, uint8_t *buf, size_t size)
{
assert(sfud_dev);
assert(sfud_dev->init_ok);
sfud_read(sfud_dev, w25q64.addr + offset, size, buf);
return size;
}
static int write(long offset, const uint8_t *buf, size_t size)
{
assert(sfud_dev);
assert(sfud_dev->init_ok);
if (sfud_write(sfud_dev, w25q64.addr + offset, size, buf) != SFUD_SUCCESS)
{
return -1;
}
return size;
}
static int erase(long offset, size_t size)
{
assert(sfud_dev);
assert(sfud_dev->init_ok);
if (sfud_erase(sfud_dev, w25q64.addr + offset, size) != SFUD_SUCCESS)
{
return -1;
}
return size;
}

1489
bsp/stm32/stm32f407-rt-spark/board/ports/lcd/drv_lcd.c Normal file
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109
bsp/stm32/stm32f407-rt-spark/board/ports/lcd/drv_lcd.h Normal file
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/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-12-28 unknow copy by STemwin
*/
#ifndef __DRV_LCD_H
#define __DRV_LCD_H
#include <rtthread.h>
#include "rtdevice.h"
#include <drv_common.h>
#ifdef PKG_USING_QRCODE
#include <qrcode.h>
#endif
#define LCD_BASE ((uint32_t)(0x68000000 | 0x0003FFFE)) // A18 link to DCX
#define LCD ((LCD_CONTROLLER_TypeDef *)LCD_BASE)
#define LCD_W 240
#define LCD_H 240
//LCD重要参数集
typedef struct
{
uint16_t width; //LCD 宽度
uint16_t height; //LCD 高度
uint16_t id; //LCD ID
uint8_t dir; //横屏还是竖屏控制：0，竖屏；1，横屏。
uint16_t wramcmd; //开始写gram指令
uint16_t setxcmd; //设置x坐标指令
uint16_t setycmd; //设置y坐标指令
}_lcd_dev;
//LCD参数
extern _lcd_dev lcddev; //管理LCD重要参数
typedef struct
{
volatile uint8_t _u8_REG;
volatile uint8_t RESERVED;
volatile uint8_t _u8_RAM;
volatile uint16_t _u16_RAM;
}LCD_CONTROLLER_TypeDef;
//POINT_COLOR
#define WHITE 0xFFFF
#define BLACK 0x0000
#define BLUE 0x001F
#define BRED 0XF81F
#define GRED 0XFFE0
#define GBLUE 0X07FF
#define RED 0xF800
#define MAGENTA 0xF81F
#define GREEN 0x07E0
#define CYAN 0x7FFF
#define YELLOW 0xFFE0
#define BROWN 0XBC40
#define BRRED 0XFC07
#define GRAY 0X8430
#define GRAY175 0XAD75
#define GRAY151 0X94B2
#define GRAY187 0XBDD7
#define GRAY240 0XF79E
//扫描方向定义
#define L2R_U2D 0 //从左到右,从上到下
#define L2R_D2U 1 //从左到右,从下到上
#define R2L_U2D 2 //从右到左,从上到下
#define R2L_D2U 3 //从右到左,从下到上
#define U2D_L2R 4 //从上到下,从左到右
#define U2D_R2L 5 //从上到下,从右到左
#define D2U_L2R 6 //从下到上,从左到右
#define D2U_R2L 7 //从下到上,从右到左
int drv_lcd_init(void);
void lcd_clear(rt_uint16_t color);
void lcd_address_set(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
void lcd_set_color(rt_uint16_t back, rt_uint16_t fore);
rt_uint16_t change_byte_order(rt_uint16_t word);
void lcd_draw_point(rt_uint16_t x, rt_uint16_t y);
void lcd_draw_circle(rt_uint16_t x0, rt_uint16_t y0, rt_uint8_t r);
void lcd_draw_line(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
void lcd_draw_rectangle(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
void lcd_fill(rt_uint16_t x_start, rt_uint16_t y_start, rt_uint16_t x_end, rt_uint16_t y_end, rt_uint16_t color);
void lcd_address_set(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
rt_err_t lcd_write_half_word(const rt_uint16_t da);
rt_err_t lcd_write_data_buffer(const void *send_buf, rt_size_t length);
void lcd_show_num(rt_uint16_t x, rt_uint16_t y, rt_uint32_t num, rt_uint8_t len, rt_uint32_t size);
rt_err_t lcd_show_string(rt_uint16_t x, rt_uint16_t y, rt_uint32_t size, const char *fmt, ...);
rt_err_t lcd_show_image(rt_uint16_t x, rt_uint16_t y, rt_uint16_t length, rt_uint16_t wide, const rt_uint8_t *p);
#ifdef PKG_USING_QRCODE
rt_err_t lcd_show_qrcode(rt_uint16_t x, rt_uint16_t y, rt_uint8_t version, rt_uint8_t ecc, const char *data, rt_uint8_t enlargement);
#endif
void lcd_enter_sleep(void);
void lcd_exit_sleep(void);
void lcd_display_on(void);
void lcd_display_off(void);
void lcd_fill_array(rt_uint16_t x_start, rt_uint16_t y_start, rt_uint16_t x_end, rt_uint16_t y_end, void *pcolor);
#endif

795
bsp/stm32/stm32f407-rt-spark/board/ports/lcd/drv_lcd_font.h Normal file
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#ifndef __DRV_LCD_FONT_H__
#define __DRV_LCD_FONT_H__
#include <stdint.h>
/* DejaVu Sans Mono */
/*
(0) !(1) "(2) #(3) $(4) %(5) &(6) '(7)
((8) )(9) *(10) +(11) ,(12) -(13) .(14) /(15)
0(16) 1(17) 2(18) 3(19) 4(20) 5(21) 6(22) 7(23)
8(24) 9(25) :(26) ;(27) <(28) =(29) >(30) ?(31)
@(32) A(33) B(34) C(35) D(36) E(37) F(38) G(39)
H(40) I(41) J(42) K(43) L(44) M(45) N(46) O(47)
P(48) Q(49) R(50) S(51) T(52) U(53) V(54) W(55)
X(56) Y(57) Z(58) [(59) \(60) ](61) ^(62) _(63)
`(64) a(65) b(66) c(67) d(68) e(69) f(70) g(71)
h(72) i(73) j(74) k(75) l(76) m(77) n(78) o(79)
p(80) q(81) r(82) s(83) t(84) u(85) v(86) w(87)
x(88) y(89) z(90) {(91) |(92) }(93)
*/
#define ASC2_1608
#define ASC2_2412
#define ASC2_3216
#if !defined(ASC2_1608) && !defined(ASC2_2412) && !defined(ASC2_2416) && !defined(ASC2_3216)
#error "There is no any define ASC2_1608 && ASC2_2412 && ASC2_2416 && ASC2_3216 !"
#endif
#ifdef ASC2_1608
const uint8_t asc2_1608[]={
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*" ",0*/
0x00,0x00,0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x10,0x10,0x00,0x00,0x00,/*"!",1*/
0x00,0x00,0x00,0x28,0x28,0x28,0x28,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*""",2*/
0x00,0x00,0x00,0x12,0x12,0x16,0x7F,0x24,0x24,0xFE,0x28,0x48,0x48,0x00,0x00,0x00,/*"#",3*/
0x00,0x00,0x08,0x08,0x3E,0x49,0x48,0x68,0x3E,0x0B,0x09,0x49,0x3E,0x08,0x08,0x00,/*"$",4*/
0x00,0x00,0x00,0x60,0x90,0x90,0x62,0x0C,0x30,0x46,0x09,0x09,0x06,0x00,0x00,0x00,/*"%",5*/
0x00,0x00,0x00,0x1C,0x20,0x20,0x30,0x30,0x49,0x45,0x45,0x62,0x3D,0x00,0x00,0x00,/*"&",6*/
0x00,0x00,0x00,0x10,0x10,0x10,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"'",7*/
0x00,0x00,0x0C,0x08,0x08,0x10,0x10,0x10,0x10,0x10,0x10,0x08,0x08,0x04,0x00,0x00,/*"(",8*/
0x00,0x00,0x30,0x10,0x10,0x08,0x08,0x08,0x08,0x08,0x08,0x10,0x10,0x30,0x00,0x00,/*")",9*/
0x00,0x00,0x00,0x08,0x49,0x3E,0x1C,0x6B,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"*",10*/
0x00,0x00,0x00,0x00,0x00,0x10,0x10,0x10,0xFE,0x10,0x10,0x10,0x00,0x00,0x00,0x00,/*"+",11*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x10,0x20,0x00,/*",",12*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0x00,0x00,0x00,/*"-",13*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,/*".",14*/
0x00,0x00,0x00,0x02,0x04,0x04,0x04,0x08,0x08,0x10,0x10,0x20,0x20,0x20,0x40,0x00,/*"/",15*/
0x00,0x00,0x00,0x1C,0x22,0x41,0x41,0x49,0x41,0x41,0x41,0x22,0x1C,0x00,0x00,0x00,/*"0",16*/
0x00,0x00,0x00,0x18,0x28,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x3E,0x00,0x00,0x00,/*"1",17*/
0x00,0x00,0x00,0x3E,0x43,0x01,0x01,0x02,0x06,0x0C,0x10,0x20,0x7F,0x00,0x00,0x00,/*"2",18*/
0x00,0x00,0x00,0x3E,0x41,0x01,0x03,0x1C,0x03,0x01,0x01,0x43,0x3E,0x00,0x00,0x00,/*"3",19*/
0x00,0x00,0x00,0x06,0x0A,0x1A,0x12,0x22,0x42,0x7F,0x02,0x02,0x02,0x00,0x00,0x00,/*"4",20*/
0x00,0x00,0x00,0x7E,0x40,0x40,0x7C,0x42,0x01,0x01,0x01,0x42,0x3C,0x00,0x00,0x00,/*"5",21*/
0x00,0x00,0x00,0x1E,0x31,0x60,0x40,0x5E,0x63,0x41,0x41,0x23,0x1E,0x00,0x00,0x00,/*"6",22*/
0x00,0x00,0x00,0x7F,0x03,0x02,0x04,0x04,0x08,0x08,0x10,0x10,0x20,0x00,0x00,0x00,/*"7",23*/
0x00,0x00,0x00,0x3E,0x41,0x41,0x41,0x3E,0x63,0x41,0x41,0x63,0x3E,0x00,0x00,0x00,/*"8",24*/
0x00,0x00,0x00,0x3C,0x62,0x41,0x41,0x63,0x3D,0x01,0x03,0x46,0x3C,0x00,0x00,0x00,/*"9",25*/
0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,/*":",26*/
0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x10,0x20,0x00,/*";",27*/
0x00,0x00,0x00,0x00,0x00,0x01,0x0E,0x38,0x40,0x38,0x0E,0x01,0x00,0x00,0x00,0x00,/*"<",28*/
0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x00,0x00,0x7F,0x00,0x00,0x00,0x00,0x00,0x00,/*"=",29*/
0x00,0x00,0x00,0x00,0x00,0x40,0x38,0x0E,0x01,0x0E,0x38,0x40,0x00,0x00,0x00,0x00,/*">",30*/
0x00,0x00,0x00,0x38,0x44,0x04,0x0C,0x18,0x10,0x10,0x00,0x10,0x10,0x00,0x00,0x00,/*"?",31*/
0x00,0x00,0x00,0x1E,0x33,0x21,0x47,0x49,0x49,0x49,0x49,0x47,0x20,0x30,0x0E,0x00,/*"@",32*/
0x00,0x00,0x00,0x08,0x14,0x14,0x14,0x14,0x22,0x3E,0x22,0x41,0x41,0x00,0x00,0x00,/*"A",33*/
0x00,0x00,0x00,0x7E,0x41,0x41,0x41,0x7E,0x43,0x41,0x41,0x43,0x7E,0x00,0x00,0x00,/*"B",34*/
0x00,0x00,0x00,0x1E,0x21,0x40,0x40,0x40,0x40,0x40,0x40,0x21,0x1E,0x00,0x00,0x00,/*"C",35*/
0x00,0x00,0x00,0x7C,0x42,0x41,0x41,0x41,0x41,0x41,0x41,0x42,0x7C,0x00,0x00,0x00,/*"D",36*/
0x00,0x00,0x00,0x7F,0x40,0x40,0x40,0x7F,0x40,0x40,0x40,0x40,0x7F,0x00,0x00,0x00,/*"E",37*/
0x00,0x00,0x00,0x7F,0x40,0x40,0x40,0x7F,0x40,0x40,0x40,0x40,0x40,0x00,0x00,0x00,/*"F",38*/
0x00,0x00,0x00,0x1E,0x21,0x40,0x40,0x40,0x43,0x41,0x41,0x21,0x1E,0x00,0x00,0x00,/*"G",39*/
0x00,0x00,0x00,0x41,0x41,0x41,0x41,0x7F,0x41,0x41,0x41,0x41,0x41,0x00,0x00,0x00,/*"H",40*/
0x00,0x00,0x00,0x7C,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x7C,0x00,0x00,0x00,/*"I",41*/
0x00,0x00,0x00,0x1C,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x44,0x38,0x00,0x00,0x00,/*"J",42*/
0x00,0x00,0x00,0x42,0x44,0x48,0x50,0x70,0x78,0x48,0x44,0x46,0x42,0x00,0x00,0x00,/*"K",43*/
0x00,0x00,0x00,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x7F,0x00,0x00,0x00,/*"L",44*/
0x00,0x00,0x00,0x63,0x63,0x55,0x55,0x55,0x49,0x41,0x41,0x41,0x41,0x00,0x00,0x00,/*"M",45*/
0x00,0x00,0x00,0x61,0x61,0x51,0x51,0x49,0x49,0x45,0x45,0x43,0x43,0x00,0x00,0x00,/*"N",46*/
0x00,0x00,0x00,0x1C,0x22,0x41,0x41,0x41,0x41,0x41,0x41,0x22,0x1C,0x00,0x00,0x00,/*"O",47*/
0x00,0x00,0x00,0x7E,0x43,0x41,0x41,0x43,0x7E,0x40,0x40,0x40,0x40,0x00,0x00,0x00,/*"P",48*/
0x00,0x00,0x00,0x1C,0x22,0x41,0x41,0x41,0x41,0x41,0x41,0x22,0x1E,0x06,0x02,0x00,/*"Q",49*/
0x00,0x00,0x00,0x7E,0x43,0x41,0x41,0x43,0x7C,0x42,0x41,0x41,0x40,0x00,0x00,0x00,/*"R",50*/
0x00,0x00,0x00,0x1E,0x61,0x40,0x40,0x30,0x0E,0x01,0x01,0x43,0x3E,0x00,0x00,0x00,/*"S",51*/
0x00,0x00,0x00,0xFE,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00,/*"T",52*/
0x00,0x00,0x00,0x41,0x41,0x41,0x41,0x41,0x41,0x41,0x41,0x63,0x3E,0x00,0x00,0x00,/*"U",53*/
0x00,0x00,0x00,0x41,0x41,0x22,0x22,0x22,0x14,0x14,0x14,0x14,0x08,0x00,0x00,0x00,/*"V",54*/
0x00,0x00,0x00,0x81,0x81,0x81,0x5A,0x5A,0x5A,0x66,0x66,0x66,0x66,0x00,0x00,0x00,/*"W",55*/
0x00,0x00,0x00,0x41,0x22,0x14,0x14,0x08,0x14,0x14,0x22,0x22,0x41,0x00,0x00,0x00,/*"X",56*/
0x00,0x00,0x00,0x82,0x44,0x44,0x28,0x38,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00,/*"Y",57*/
0x00,0x00,0x00,0x7F,0x03,0x02,0x04,0x08,0x08,0x10,0x20,0x60,0x7F,0x00,0x00,0x00,/*"Z",58*/
0x00,0x00,0x1C,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x1C,0x00,0x00,/*"[",59*/
0x00,0x00,0x00,0x40,0x20,0x20,0x20,0x10,0x10,0x08,0x08,0x04,0x04,0x04,0x02,0x00,/*"\",60*/
0x00,0x00,0x38,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x38,0x00,0x00,/*"]",61*/
0x00,0x00,0x00,0x10,0x28,0x44,0xC6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"^",62*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,/*"_",63*/
0x00,0x30,0x10,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"`",64*/
0x00,0x00,0x00,0x00,0x00,0x1C,0x22,0x02,0x3E,0x42,0x42,0x46,0x3A,0x00,0x00,0x00,/*"a",65*/
0x00,0x00,0x40,0x40,0x40,0x7C,0x64,0x42,0x42,0x42,0x42,0x64,0x5C,0x00,0x00,0x00,/*"b",66*/
0x00,0x00,0x00,0x00,0x00,0x1C,0x22,0x40,0x40,0x40,0x40,0x22,0x1C,0x00,0x00,0x00,/*"c",67*/
0x00,0x00,0x02,0x02,0x02,0x3E,0x26,0x42,0x42,0x42,0x42,0x26,0x3A,0x00,0x00,0x00,/*"d",68*/
0x00,0x00,0x00,0x00,0x00,0x3C,0x26,0x42,0x7E,0x40,0x40,0x22,0x1C,0x00,0x00,0x00,/*"e",69*/
0x00,0x00,0x0C,0x10,0x10,0x7C,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00,/*"f",70*/
0x00,0x00,0x00,0x00,0x00,0x3A,0x26,0x42,0x42,0x42,0x42,0x26,0x3A,0x02,0x22,0x1C,/*"g",71*/
0x00,0x00,0x40,0x40,0x40,0x5C,0x62,0x42,0x42,0x42,0x42,0x42,0x42,0x00,0x00,0x00,/*"h",72*/
0x00,0x00,0x10,0x10,0x00,0x70,0x10,0x10,0x10,0x10,0x10,0x10,0x7C,0x00,0x00,0x00,/*"i",73*/
0x00,0x00,0x08,0x08,0x00,0x38,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x70,/*"j",74*/
0x00,0x00,0x40,0x40,0x40,0x44,0x48,0x50,0x70,0x48,0x48,0x44,0x42,0x00,0x00,0x00,/*"k",75*/
0x00,0x00,0x70,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x0E,0x00,0x00,0x00,/*"l",76*/
0x00,0x00,0x00,0x00,0x00,0x7E,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x00,0x00,0x00,/*"m",77*/
0x00,0x00,0x00,0x00,0x00,0x5C,0x62,0x42,0x42,0x42,0x42,0x42,0x42,0x00,0x00,0x00,/*"n",78*/
0x00,0x00,0x00,0x00,0x00,0x3C,0x66,0x42,0x42,0x42,0x42,0x66,0x3C,0x00,0x00,0x00,/*"o",79*/
0x00,0x00,0x00,0x00,0x00,0x5C,0x64,0x42,0x42,0x42,0x42,0x64,0x7C,0x40,0x40,0x40,/*"p",80*/
0x00,0x00,0x00,0x00,0x00,0x3A,0x26,0x42,0x42,0x42,0x42,0x26,0x3A,0x02,0x02,0x02,/*"q",81*/
0x00,0x00,0x00,0x00,0x00,0x3C,0x32,0x20,0x20,0x20,0x20,0x20,0x20,0x00,0x00,0x00,/*"r",82*/
0x00,0x00,0x00,0x00,0x00,0x3C,0x42,0x40,0x70,0x0E,0x02,0x42,0x3C,0x00,0x00,0x00,/*"s",83*/
0x00,0x00,0x00,0x10,0x10,0x7E,0x10,0x10,0x10,0x10,0x10,0x10,0x0E,0x00,0x00,0x00,/*"t",84*/
0x00,0x00,0x00,0x00,0x00,0x42,0x42,0x42,0x42,0x42,0x42,0x46,0x3A,0x00,0x00,0x00,/*"u",85*/
0x00,0x00,0x00,0x00,0x00,0x42,0x42,0x24,0x24,0x24,0x18,0x18,0x18,0x00,0x00,0x00,/*"v",86*/
0x00,0x00,0x00,0x00,0x00,0x81,0x81,0x5A,0x5A,0x5A,0x5A,0x24,0x24,0x00,0x00,0x00,/*"w",87*/
0x00,0x00,0x00,0x00,0x00,0x42,0x24,0x18,0x18,0x18,0x24,0x24,0x42,0x00,0x00,0x00,/*"x",88*/
0x00,0x00,0x00,0x00,0x00,0x42,0x22,0x24,0x24,0x14,0x18,0x18,0x08,0x08,0x10,0x30,/*"y",89*/
0x00,0x00,0x00,0x00,0x00,0x7E,0x02,0x04,0x08,0x10,0x20,0x40,0x7E,0x00,0x00,0x00,/*"z",90*/
0x00,0x00,0x0C,0x10,0x10,0x10,0x10,0x10,0x60,0x10,0x10,0x10,0x10,0x10,0x0C,0x00,/*"{",91*/
0x00,0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,/*"|",92*/
0x00,0x00,0x60,0x10,0x10,0x10,0x10,0x10,0x0C,0x10,0x10,0x10,0x10,0x10,0x60,0x00,/*"}",93*/
};
#endif
#ifdef ASC2_2412
const uint8_t asc2_2412[]={
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*" ",0*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"!",1*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x19,0x80,0x19,0x80,0x19,0x80,0x19,0x80,
0x19,0x80,0x19,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*""",2*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x60,0x04,0x40,0x0C,0xC0,0x0C,0xC0,
0x7F,0xF0,0x7F,0xF0,0x08,0x80,0x19,0x80,0x19,0x80,0xFF,0xE0,0xFF,0xE0,0x33,0x00,
0x33,0x00,0x22,0x00,0x22,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"#",3*/
0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x02,0x00,0x0F,0x80,0x1F,0xC0,0x3A,0x40,
0x32,0x00,0x32,0x00,0x3A,0x00,0x1F,0x00,0x07,0xC0,0x02,0xE0,0x02,0x60,0x02,0x60,
0x22,0xE0,0x3F,0xC0,0x1F,0x80,0x02,0x00,0x02,0x00,0x02,0x00,0x00,0x00,0x00,0x00,/*"$",4*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x00,0x48,0x00,0xCC,0x00,0xCC,0x00,
0xCC,0x00,0x48,0x40,0x79,0xC0,0x0E,0x00,0x73,0xC0,0x02,0x40,0x06,0x60,0x06,0x60,
0x06,0x60,0x02,0x40,0x03,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"%",5*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x80,0x1F,0x80,0x18,0x00,0x18,0x00,
0x18,0x00,0x0C,0x00,0x1E,0x00,0x36,0x30,0x63,0x30,0x63,0xB0,0x61,0xA0,0x60,0xE0,
0x30,0xC0,0x3F,0x60,0x0E,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"&",6*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"'",7*/
0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x02,0x00,0x02,0x00,0x06,0x00,0x06,0x00,
0x04,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
0x04,0x00,0x06,0x00,0x06,0x00,0x02,0x00,0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,/*"(",8*/
0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x04,0x00,0x04,0x00,0x06,0x00,0x06,0x00,
0x02,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
0x02,0x00,0x06,0x00,0x06,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x00,0x00,0x00,0x00,/*")",9*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x04,0x00,0x44,0x40,0x35,0x80,
0x0E,0x00,0x0E,0x00,0x35,0x80,0x44,0x40,0x04,0x00,0x04,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"*",10*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x7F,0xE0,0x7F,0xE0,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"+",11*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,/*",",12*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x00,0x1F,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"-",13*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*".",14*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0xC0,0x00,0xC0,0x01,0x80,
0x01,0x80,0x03,0x00,0x03,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x0C,0x00,0x0C,0x00,
0x18,0x00,0x18,0x00,0x30,0x00,0x30,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"/",15*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1E,0x00,0x3F,0x80,0x31,0x80,0x71,0xC0,
0x60,0xC0,0x60,0xC0,0x66,0xC0,0x66,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x71,0xC0,
0x31,0x80,0x3F,0x80,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"0",16*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x1F,0x00,0x1B,0x00,0x03,0x00,
0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
0x03,0x00,0x1F,0xE0,0x1F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"1",17*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x00,0x7F,0x80,0x41,0xC0,0x00,0xC0,
0x00,0xC0,0x00,0xC0,0x01,0xC0,0x01,0x80,0x03,0x00,0x06,0x00,0x0C,0x00,0x18,0x00,
0x30,0x00,0x7F,0xC0,0x7F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"2",18*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x00,0x7F,0x80,0x41,0xC0,0x00,0xC0,
0x00,0xC0,0x01,0xC0,0x0F,0x80,0x0F,0x80,0x01,0x80,0x00,0xC0,0x00,0xC0,0x00,0xC0,
0x41,0xC0,0x7F,0x80,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"3",19*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,0x07,0x80,0x05,0x80,
0x0D,0x80,0x09,0x80,0x19,0x80,0x31,0x80,0x31,0x80,0x61,0x80,0x7F,0xE0,0x7F,0xE0,
0x01,0x80,0x01,0x80,0x01,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"4",20*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x80,0x3F,0x80,0x30,0x00,0x30,0x00,
0x30,0x00,0x3F,0x00,0x3F,0x80,0x21,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,
0x41,0x80,0x7F,0x80,0x3E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"5",21*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x1F,0x80,0x38,0x80,0x30,0x00,
0x70,0x00,0x60,0x00,0x6F,0x00,0x7F,0x80,0x71,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
0x31,0xC0,0x3F,0x80,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"6",22*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xC0,0x7F,0xC0,0x01,0x80,0x01,0x80,
0x01,0x80,0x03,0x00,0x03,0x00,0x03,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x0C,0x00,
0x0C,0x00,0x0C,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"7",23*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x00,0x3F,0x80,0x71,0xC0,0x60,0xC0,
0x60,0xC0,0x31,0x80,0x1F,0x00,0x3F,0x80,0x31,0x80,0x60,0xC0,0x60,0xC0,0x60,0xC0,
0x71,0xC0,0x3F,0x80,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"8",24*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x00,0x3F,0x80,0x71,0x80,0x60,0xC0,
0x60,0xC0,0x60,0xC0,0x71,0xC0,0x3F,0xC0,0x1E,0xC0,0x00,0xC0,0x00,0xC0,0x01,0x80,
0x23,0x80,0x3F,0x00,0x1E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"9",25*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*":",26*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,/*";",27*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,
0x01,0xE0,0x07,0x80,0x1E,0x00,0x70,0x00,0x70,0x00,0x1E,0x00,0x07,0x80,0x01,0xE0,
0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"<",28*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0x00,0x00,0x00,0x7F,0xE0,0x7F,0xE0,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"=",29*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,
0x78,0x00,0x1E,0x00,0x07,0x80,0x00,0xE0,0x00,0xE0,0x07,0x80,0x1E,0x00,0x78,0x00,
0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*">",30*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x80,0x1F,0xC0,0x10,0x60,0x00,0x60,
0x00,0xE0,0x01,0xC0,0x03,0x80,0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"?",31*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x80,0x18,0xC0,0x30,0x60,
0x30,0x60,0x23,0xE0,0x62,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x66,0x60,
0x62,0x60,0x33,0xE0,0x30,0x00,0x18,0x00,0x1C,0x00,0x07,0x80,0x00,0x00,0x00,0x00,/*"@",32*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,0x0F,0x00,0x0F,0x00,
0x0F,0x00,0x1F,0x80,0x19,0x80,0x19,0x80,0x19,0x80,0x3F,0xC0,0x3F,0xC0,0x30,0xC0,
0x30,0xC0,0x60,0x60,0x60,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"A",33*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x00,0x7F,0x80,0x61,0xC0,0x60,0xC0,
0x60,0xC0,0x61,0xC0,0x7F,0x80,0x7F,0x80,0x60,0xC0,0x60,0x60,0x60,0x60,0x60,0x60,
0x60,0xE0,0x7F,0xC0,0x7F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"B",34*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xC0,0x1F,0xE0,0x38,0x20,0x30,0x00,
0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x30,0x00,
0x38,0x20,0x1F,0xE0,0x07,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"C",35*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x7F,0x80,0x61,0xC0,0x60,0xC0,
0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0xC0,
0x61,0xC0,0x7F,0x80,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"D",36*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xE0,0x7F,0xE0,0x60,0x00,0x60,0x00,
0x60,0x00,0x60,0x00,0x7F,0xE0,0x7F,0xE0,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
0x60,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"E",37*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xE0,0x7F,0xE0,0x60,0x00,0x60,0x00,
0x60,0x00,0x60,0x00,0x7F,0xC0,0x7F,0xC0,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
0x60,0x00,0x60,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"F",38*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x80,0x1F,0xC0,0x38,0x40,0x30,0x00,
0x60,0x00,0x60,0x00,0x60,0x00,0x61,0xE0,0x61,0xE0,0x60,0x60,0x60,0x60,0x30,0x60,
0x38,0x60,0x1F,0xE0,0x0F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"G",39*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,
0x60,0x60,0x60,0x60,0x7F,0xE0,0x7F,0xE0,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,
0x60,0x60,0x60,0x60,0x60,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"H",40*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xC0,0x3F,0xC0,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x3F,0xC0,0x3F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"I",41*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x80,0x1F,0x80,0x01,0x80,0x01,0x80,
0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
0x43,0x80,0x7F,0x00,0x3E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"J",42*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x60,0x60,0xC0,0x61,0x80,0x63,0x00,
0x66,0x00,0x6C,0x00,0x7C,0x00,0x7E,0x00,0x76,0x00,0x63,0x00,0x63,0x80,0x61,0x80,
0x60,0xC0,0x60,0xE0,0x60,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"K",43*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
0x60,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"L",44*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0xE0,0x70,0xE0,0x70,0xE0,0x79,0xE0,
0x69,0x60,0x69,0x60,0x6F,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x60,0x60,0x60,0x60,
0x60,0x60,0x60,0x60,0x60,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"M",45*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x60,0x70,0x60,0x78,0x60,0x78,0x60,
0x6C,0x60,0x6C,0x60,0x64,0x60,0x66,0x60,0x62,0x60,0x63,0x60,0x63,0x60,0x61,0xE0,
0x61,0xE0,0x60,0xE0,0x60,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"N",46*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x3F,0xC0,0x30,0xC0,0x70,0xE0,
0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x70,0xE0,
0x30,0xC0,0x3F,0xC0,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"O",47*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x80,0x7F,0xC0,0x60,0xE0,0x60,0x60,
0x60,0x60,0x60,0x60,0x60,0xE0,0x7F,0xC0,0x7F,0x80,0x60,0x00,0x60,0x00,0x60,0x00,
0x60,0x00,0x60,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"P",48*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x3F,0xC0,0x30,0xC0,0x70,0xE0,
0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x70,0xE0,
0x30,0xC0,0x1F,0x80,0x0F,0x00,0x01,0x80,0x00,0xC0,0x00,0x80,0x00,0x00,0x00,0x00,/*"Q",49*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x00,0x7F,0xC0,0x60,0xE0,0x60,0x60,
0x60,0x60,0x60,0x60,0x60,0xC0,0x7F,0xC0,0x7F,0x80,0x61,0xC0,0x60,0xC0,0x60,0x60,
0x60,0x60,0x60,0x30,0x60,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"R",50*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x80,0x3F,0xC0,0x70,0x40,0x60,0x00,
0x60,0x00,0x70,0x00,0x3E,0x00,0x1F,0x80,0x01,0xC0,0x00,0x60,0x00,0x60,0x00,0x60,
0x40,0xE0,0x7F,0xC0,0x3F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"S",51*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0xFF,0xF0,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"T",52*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,
0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,
0x70,0xE0,0x3F,0xC0,0x1F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"U",53*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x60,0x60,0x60,0x30,0xC0,0x30,0xC0,
0x30,0xC0,0x30,0xC0,0x19,0x80,0x19,0x80,0x19,0x80,0x1F,0x80,0x0F,0x00,0x0F,0x00,
0x0F,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"V",54*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0x30,0xC0,0x30,0xC0,0x30,0x60,0x60,
0x66,0x60,0x66,0x60,0x6F,0x60,0x6F,0x60,0x69,0x60,0x69,0x60,0x39,0xC0,0x39,0xC0,
0x39,0xC0,0x30,0xC0,0x30,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"W",55*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0xE0,0x30,0xC0,0x39,0xC0,0x19,0x80,
0x0F,0x00,0x0F,0x00,0x06,0x00,0x06,0x00,0x0F,0x00,0x0F,0x00,0x1B,0x80,0x19,0x80,
0x31,0xC0,0x30,0xC0,0x60,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"X",56*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xE0,0x70,0x60,0x60,0x30,0xC0,0x30,0xC0,
0x19,0x80,0x1F,0x80,0x0F,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"Y",57*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0xC0,0x01,0xC0,
0x01,0x80,0x03,0x00,0x07,0x00,0x06,0x00,0x0E,0x00,0x0C,0x00,0x18,0x00,0x38,0x00,
0x30,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"Z",58*/
0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x80,0x07,0x80,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x07,0x80,0x07,0x80,0x00,0x00,0x00,0x00,/*"[",59*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x30,0x00,0x30,0x00,0x18,0x00,
0x18,0x00,0x0C,0x00,0x0C,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x03,0x00,0x03,0x00,
0x01,0x80,0x01,0x80,0x00,0xC0,0x00,0xC0,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,/*"\",60*/
0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x0F,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x0F,0x00,0x0F,0x00,0x00,0x00,0x00,0x00,/*"]",61*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0F,0x80,0x0D,0x80,0x18,0xC0,
0x30,0x60,0x60,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"^",62*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0xFF,0xF0,/*"_",63*/
0x00,0x00,0x00,0x00,0x18,0x00,0x0C,0x00,0x06,0x00,0x03,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"`",64*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x00,0x3F,0x80,0x21,0xC0,0x00,0xC0,0x1F,0xC0,0x3F,0xC0,0x70,0xC0,0x60,0xC0,
0x61,0xC0,0x7F,0xC0,0x1C,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"a",65*/
0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
0x6F,0x00,0x7F,0x80,0x71,0x80,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
0x71,0x80,0x7F,0x80,0x6F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"b",66*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x0F,0x00,0x3F,0x80,0x30,0x80,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
0x30,0x80,0x3F,0x80,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"c",67*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,
0x1E,0xC0,0x3F,0xC0,0x31,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
0x31,0xC0,0x3F,0xC0,0x1E,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"d",68*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x0F,0x00,0x3F,0x80,0x31,0xC0,0x60,0xC0,0x7F,0xC0,0x7F,0xC0,0x60,0x00,0x60,0x00,
0x30,0x40,0x3F,0xC0,0x0F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"e",69*/
0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xE0,0x03,0xE0,0x06,0x00,0x06,0x00,0x06,0x00,
0x3F,0xE0,0x3F,0xE0,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"f",70*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1E,0xC0,0x3F,0xC0,0x31,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
0x31,0xC0,0x3F,0xC0,0x1E,0xC0,0x00,0xC0,0x21,0xC0,0x3F,0x80,0x1F,0x00,0x00,0x00,/*"g",71*/
0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
0x67,0x00,0x7F,0x80,0x71,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
0x60,0xC0,0x60,0xC0,0x60,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"h",72*/
0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x3E,0x00,0x3E,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"i",73*/
0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x00,0x1F,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x3E,0x00,0x3C,0x00,0x00,0x00,/*"j",74*/
0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
0x61,0xC0,0x63,0x80,0x67,0x00,0x6E,0x00,0x7C,0x00,0x7C,0x00,0x76,0x00,0x67,0x00,
0x63,0x00,0x61,0x80,0x61,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"k",75*/
0x00,0x00,0x00,0x00,0x00,0x00,0xFC,0x00,0xFC,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
0x0E,0x00,0x07,0xC0,0x03,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"l",76*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x6D,0xC0,0x7F,0xE0,0x66,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x66,0x60,
0x66,0x60,0x66,0x60,0x66,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"m",77*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x67,0x00,0x7F,0x80,0x71,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
0x60,0xC0,0x60,0xC0,0x60,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"n",78*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x00,0x3F,0x80,0x31,0x80,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
0x31,0x80,0x3F,0x80,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"o",79*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x6F,0x00,0x7F,0x80,0x71,0x80,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
0x71,0x80,0x7F,0x80,0x6F,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x00,0x00,/*"p",80*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1E,0xC0,0x3F,0xC0,0x31,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
0x31,0xC0,0x3F,0xC0,0x1E,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0x00,/*"q",81*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x0C,0xE0,0x0D,0xF0,0x0F,0x10,0x0E,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
0x0C,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"r",82*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x80,0x3F,0xC0,0x60,0x40,0x60,0x00,0x7F,0x00,0x1F,0x80,0x01,0xC0,0x00,0xC0,
0x41,0xC0,0x7F,0x80,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"s",83*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
0x7F,0xC0,0x7F,0xC0,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
0x0C,0x00,0x0F,0xC0,0x07,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"t",84*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
0x71,0xC0,0x3F,0xC0,0x1C,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"u",85*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x60,0xC0,0x71,0xC0,0x31,0x80,0x31,0x80,0x3B,0x80,0x1B,0x00,0x1B,0x00,0x1B,0x00,
0x0E,0x00,0x0E,0x00,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"v",86*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0xC0,0x30,0xC0,0x30,0x60,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x3F,0xC0,0x39,0xC0,
0x39,0xC0,0x39,0xC0,0x30,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"w",87*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x71,0xC0,0x31,0x80,0x1B,0x00,0x1F,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x1F,0x00,
0x1B,0x00,0x31,0x80,0x71,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"x",88*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x60,0xC0,0x31,0x80,0x31,0x80,0x31,0x80,0x1B,0x00,0x1B,0x00,0x1F,0x00,0x0E,0x00,
0x0E,0x00,0x06,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x38,0x00,0x38,0x00,0x00,0x00,/*"y",89*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x7F,0xC0,0x7F,0xC0,0x03,0x80,0x03,0x00,0x07,0x00,0x0E,0x00,0x1C,0x00,0x18,0x00,
0x30,0x00,0x7F,0xC0,0x7F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"z",90*/
0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xC0,0x07,0xC0,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x3C,0x00,0x3C,0x00,0x0E,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x07,0xC0,0x03,0xC0,0x00,0x00,0x00,0x00,/*"{",91*/
0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,/*"|",92*/
0x00,0x00,0x00,0x00,0x00,0x00,0x3C,0x00,0x3E,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x03,0xC0,0x03,0xC0,0x07,0x00,0x06,0x00,0x06,0x00,
0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x3E,0x00,0x3C,0x00,0x00,0x00,0x00,0x00,/*"}",93*/
};
#endif
#ifdef ASC2_3216
const uint8_t asc2_3216[]={
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*" ",0*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"!",1*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x30,0x06,0x30,
0x06,0x30,0x06,0x30,0x06,0x30,0x06,0x30,0x06,0x30,0x06,0x30,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*""",2*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x8C,0x03,0x8C,0x03,0x0C,
0x03,0x18,0x03,0x18,0x03,0x18,0x7F,0xFF,0x7F,0xFF,0x06,0x30,0x06,0x30,0x0E,0x30,
0x0C,0x70,0x0C,0x60,0xFF,0xFE,0xFF,0xFE,0x18,0x60,0x18,0xC0,0x18,0xC0,0x18,0xC0,
0x30,0xC0,0x31,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"#",3*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x80,0x00,0x80,
0x03,0xF0,0x0F,0xFC,0x0E,0x8C,0x1C,0x80,0x1C,0x80,0x1C,0x80,0x1C,0x80,0x0E,0x80,
0x0F,0xE0,0x03,0xF8,0x00,0xFC,0x00,0x9E,0x00,0x8E,0x00,0x8E,0x00,0x8E,0x10,0x9C,
0x1F,0xF8,0x07,0xF0,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x00,0x00,0x00,/*"$",4*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3C,0x00,0x7E,0x00,
0xE7,0x00,0xC3,0x00,0xC3,0x00,0xC3,0x00,0xE7,0x00,0x7E,0x1C,0x3C,0x78,0x01,0xC0,
0x07,0x00,0x3C,0x78,0x70,0xFC,0x01,0xCE,0x01,0x86,0x01,0x86,0x01,0x86,0x01,0xCE,
0x00,0xFC,0x00,0x78,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"%",5*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xC0,0x0F,0xE0,
0x1E,0x20,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1E,0x00,0x0E,0x00,0x0F,0x00,0x1F,0x00,
0x3F,0x83,0x33,0xC3,0x71,0xE3,0x70,0xE3,0x70,0xF6,0x70,0x7E,0x78,0x3C,0x3C,0x3E,
0x1F,0xEE,0x07,0xCF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"&",6*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x80,0x01,0x80,
0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"'",7*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0x60,0x00,0x60,
0x00,0xE0,0x00,0xC0,0x01,0xC0,0x01,0xC0,0x01,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x01,0x80,0x01,0xC0,
0x01,0xC0,0x00,0xC0,0x00,0xE0,0x00,0x60,0x00,0x60,0x00,0x30,0x00,0x00,0x00,0x00,/*"(",8*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x03,0x00,0x03,0x00,
0x03,0x80,0x01,0x80,0x01,0xC0,0x01,0xC0,0x00,0xC0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0x80,0x03,0x80,0x03,0x00,0x03,0x00,0x06,0x00,0x00,0x00,0x00,0x00,/*")",9*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x80,0x01,0x80,
0x21,0x84,0x39,0x9C,0x0F,0xF0,0x03,0xC0,0x03,0xC0,0x0F,0xF0,0x39,0x9C,0x21,0x84,
0x01,0x80,0x01,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"*",10*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
0x7F,0xFE,0x7F,0xFE,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"+",11*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x01,0x80,0x03,0x80,0x03,0x80,0x03,0x00,0x00,0x00,0x00,0x00,/*",",12*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x07,0xF0,0x07,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"-",13*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,
0x03,0x80,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*".",14*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x38,
0x00,0x38,0x00,0x70,0x00,0x70,0x00,0x70,0x00,0xE0,0x00,0xE0,0x01,0xC0,0x01,0xC0,
0x03,0x80,0x03,0x80,0x03,0x80,0x07,0x00,0x07,0x00,0x0E,0x00,0x0E,0x00,0x1C,0x00,
0x1C,0x00,0x1C,0x00,0x38,0x00,0x38,0x00,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"/",15*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,
0x0E,0x38,0x1C,0x1C,0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x39,0xCE,0x39,0xCE,
0x39,0xCE,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x1C,0x1C,0x0E,0x38,
0x0F,0xF8,0x03,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"0",16*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xE0,
0x0C,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
0x0F,0xFE,0x0F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"1",17*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xE0,0x3F,0xF8,
0x38,0x3C,0x20,0x1E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x1E,0x00,0x3C,
0x00,0x7C,0x00,0xF8,0x00,0xF0,0x01,0xE0,0x03,0xC0,0x07,0x00,0x0E,0x00,0x1C,0x00,
0x3F,0xFE,0x3F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"2",18*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF0,0x1F,0xF8,
0x18,0x1C,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x3C,0x07,0xF0,0x07,0xF0,
0x00,0x3C,0x00,0x1C,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x1E,0x30,0x3C,
0x3F,0xF8,0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"3",19*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x00,0xF0,
0x01,0xF0,0x01,0xF0,0x03,0x70,0x07,0x70,0x06,0x70,0x0C,0x70,0x0C,0x70,0x18,0x70,
0x38,0x70,0x30,0x70,0x60,0x70,0x7F,0xFE,0x7F,0xFE,0x00,0x70,0x00,0x70,0x00,0x70,
0x00,0x70,0x00,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"4",20*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xFC,0x1F,0xFC,
0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1F,0xE0,0x1F,0xF8,0x10,0x3C,0x00,0x1C,
0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x1C,0x20,0x3C,
0x3F,0xF8,0x1F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"5",21*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xF8,0x07,0xFC,
0x0F,0x04,0x1E,0x00,0x1C,0x00,0x1C,0x00,0x38,0x00,0x39,0xF0,0x3B,0xF8,0x3E,0x3C,
0x3C,0x1E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x18,0x0E,0x1C,0x1C,0x0E,0x3C,
0x0F,0xF8,0x03,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"6",22*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFE,0x3F,0xFE,
0x00,0x1E,0x00,0x1C,0x00,0x1C,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x70,0x00,0x70,
0x00,0xF0,0x00,0xE0,0x00,0xE0,0x01,0xE0,0x01,0xC0,0x01,0xC0,0x03,0x80,0x03,0x80,
0x03,0x80,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"7",23*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF0,0x1F,0xFC,
0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x07,0xF0,0x0F,0xF8,
0x1E,0x3C,0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x3C,0x1E,0x1E,0x3C,
0x0F,0xF8,0x07,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"8",24*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x0F,0xF8,
0x1E,0x38,0x3C,0x1C,0x38,0x0C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x3C,0x1E,
0x1E,0x3E,0x0F,0xEE,0x07,0xCE,0x00,0x0E,0x00,0x1C,0x00,0x1C,0x00,0x3C,0x10,0x78,
0x1F,0xF0,0x0F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"9",25*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,
0x03,0x80,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*":",26*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,
0x03,0x80,0x03,0x80,0x03,0x00,0x07,0x00,0x07,0x00,0x06,0x00,0x00,0x00,0x00,0x00,/*";",27*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x1E,0x00,0x7E,0x01,0xF8,0x0F,0xC0,0x3F,0x00,
0x78,0x00,0x78,0x00,0x3F,0x00,0x0F,0xC0,0x01,0xF8,0x00,0x7E,0x00,0x1E,0x00,0x02,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"<",28*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFE,0x7F,0xFE,
0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFE,0x7F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"=",29*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x40,0x00,0x78,0x00,0x7E,0x00,0x1F,0x80,0x03,0xF0,0x00,0xFC,
0x00,0x1E,0x00,0x1E,0x00,0xFC,0x03,0xF0,0x1F,0x80,0x7E,0x00,0x78,0x00,0x40,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*">",30*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,
0x1C,0x38,0x10,0x1C,0x00,0x1C,0x00,0x3C,0x00,0x3C,0x00,0x78,0x00,0xF0,0x01,0xE0,
0x03,0xC0,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x00,0x00,0x00,0x00,0x03,0x80,
0x03,0x80,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"?",31*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xF8,
0x07,0xFC,0x0E,0x0E,0x1C,0x06,0x18,0x03,0x30,0x03,0x30,0x7B,0x61,0xFF,0x61,0x87,
0x63,0x03,0x63,0x03,0x63,0x03,0x63,0x03,0x63,0x03,0x61,0x87,0x71,0xFF,0x30,0x7B,
0x30,0x00,0x18,0x00,0x1C,0x00,0x0F,0x04,0x03,0xFC,0x00,0xFC,0x00,0x00,0x00,0x00,/*"@",32*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,0x03,0xE0,
0x03,0xE0,0x03,0xE0,0x03,0xE0,0x07,0x70,0x07,0x70,0x07,0x70,0x0F,0x78,0x0E,0x38,
0x0E,0x38,0x0E,0x38,0x1F,0xFC,0x1F,0xFC,0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,
0x78,0x0F,0x70,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"A",33*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xE0,0x3F,0xF8,
0x38,0x38,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x38,0x3F,0xF0,0x3F,0xF0,
0x38,0x3C,0x38,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x1E,0x38,0x3C,
0x3F,0xF8,0x3F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"B",34*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xF8,0x07,0xFC,
0x0F,0x0C,0x1E,0x04,0x1C,0x00,0x1C,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,
0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x1C,0x00,0x1C,0x00,0x1E,0x04,0x0F,0x0C,
0x07,0xFC,0x01,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"C",35*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xC0,0x3F,0xF0,
0x38,0x78,0x38,0x1C,0x38,0x1C,0x38,0x0C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,
0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0C,0x38,0x1C,0x38,0x1C,0x38,0x78,
0x3F,0xF0,0x3F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"D",36*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xFE,0x1F,0xFE,
0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1F,0xFC,0x1F,0xFC,
0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
0x1F,0xFE,0x1F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"E",37*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xFE,0x1F,0xFE,
0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1F,0xFC,0x1F,0xFC,
0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
0x1C,0x00,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"F",38*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xF8,0x07,0xFC,
0x0F,0x0C,0x1E,0x04,0x1C,0x00,0x1C,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x7E,
0x38,0x7E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x0E,0x1C,0x0E,0x1C,0x0E,0x0F,0x1E,
0x07,0xFE,0x01,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"G",39*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x0E,0x38,0x0E,
0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x3F,0xFE,0x3F,0xFE,
0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,
0x38,0x0E,0x38,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"H",40*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xFC,0x1F,0xFC,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x1F,0xFC,0x1F,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"I",41*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF8,0x07,0xF8,
0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,
0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x20,0x38,0x30,0x70,
0x3F,0xF0,0x0F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"J",42*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x07,0x38,0x0E,
0x38,0x1C,0x38,0x38,0x38,0x70,0x38,0xE0,0x39,0xC0,0x3B,0x80,0x3F,0x80,0x3F,0xC0,
0x3F,0xC0,0x3D,0xE0,0x38,0xF0,0x38,0x70,0x38,0x78,0x38,0x3C,0x38,0x1C,0x38,0x1E,
0x38,0x0F,0x38,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"K",43*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x1C,0x00,
0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
0x1F,0xFE,0x1F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"L",44*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x1E,0x78,0x1E,
0x7C,0x3E,0x7C,0x3E,0x7C,0x3E,0x76,0x6E,0x76,0x6E,0x76,0x6E,0x72,0x4E,0x73,0xCE,
0x73,0xCE,0x71,0x8E,0x71,0x8E,0x70,0x0E,0x70,0x0E,0x70,0x0E,0x70,0x0E,0x70,0x0E,
0x70,0x0E,0x70,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"M",45*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3C,0x0E,0x3C,0x0E,
0x3E,0x0E,0x3E,0x0E,0x3E,0x0E,0x3B,0x0E,0x3B,0x0E,0x3B,0x8E,0x39,0x8E,0x39,0x8E,
0x38,0xCE,0x38,0xCE,0x38,0xEE,0x38,0x6E,0x38,0x6E,0x38,0x3E,0x38,0x3E,0x38,0x3E,
0x38,0x1E,0x38,0x1E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"N",46*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,
0x0E,0x38,0x1C,0x1C,0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,
0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x1C,0x1C,0x0E,0x38,
0x0F,0xF8,0x03,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"O",47*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xF0,0x1F,0xFC,
0x1C,0x1E,0x1C,0x0F,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x0F,0x1C,0x1E,
0x1F,0xFC,0x1F,0xF0,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
0x1C,0x00,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"P",48*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,
0x0E,0x38,0x1C,0x1C,0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,
0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x1C,0x1C,0x0E,0x38,
0x0F,0xF8,0x03,0xE0,0x00,0x70,0x00,0x38,0x00,0x1C,0x00,0x10,0x00,0x00,0x00,0x00,/*"Q",49*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xE0,0x3F,0xF0,
0x38,0x78,0x38,0x3C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x38,
0x3F,0xF0,0x3F,0xE0,0x38,0xF0,0x38,0x78,0x38,0x38,0x38,0x3C,0x38,0x1C,0x38,0x1E,
0x38,0x0E,0x38,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"R",50*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xF0,0x0F,0xFC,
0x1E,0x0C,0x3C,0x04,0x38,0x00,0x38,0x00,0x38,0x00,0x3E,0x00,0x1F,0xC0,0x0F,0xF8,
0x03,0xFC,0x00,0x3C,0x00,0x1E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x20,0x1E,0x38,0x3C,
0x3F,0xF8,0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"S",51*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFF,0x7F,0xFF,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"T",52*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x1C,0x38,0x1C,
0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,
0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x1C,0x38,
0x0F,0xF0,0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"U",53*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x07,0x78,0x0F,
0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1E,0x3C,0x0E,0x38,
0x0E,0x38,0x0E,0x38,0x07,0x70,0x07,0x70,0x07,0x70,0x03,0xE0,0x03,0xE0,0x03,0xE0,
0x03,0xE0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"V",54*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xE0,0x07,0xE0,0x07,
0xE0,0x07,0x70,0x0E,0x70,0x0E,0x70,0x0E,0x73,0xCE,0x73,0xCE,0x73,0xCE,0x73,0xCE,
0x3B,0xDC,0x3E,0x7C,0x3E,0x7C,0x3E,0x7C,0x3E,0x7C,0x3C,0x3C,0x3C,0x3C,0x1C,0x38,
0x1C,0x38,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"W",55*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x07,0x3C,0x0F,
0x1C,0x0E,0x1E,0x1E,0x0F,0x3C,0x07,0x38,0x07,0xF0,0x03,0xF0,0x01,0xE0,0x01,0xE0,
0x01,0xE0,0x03,0xF0,0x07,0xF0,0x07,0x78,0x0F,0x3C,0x0E,0x1C,0x1E,0x1E,0x3C,0x0E,
0x38,0x07,0x78,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"X",56*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x0F,0x38,0x0E,
0x3C,0x1E,0x1C,0x1C,0x1E,0x3C,0x0E,0x38,0x07,0x70,0x07,0xF0,0x03,0xE0,0x03,0xE0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"Y",57*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFE,0x3F,0xFE,
0x00,0x1E,0x00,0x1C,0x00,0x3C,0x00,0x78,0x00,0x70,0x00,0xF0,0x00,0xE0,0x01,0xE0,
0x03,0xC0,0x03,0x80,0x07,0x80,0x07,0x00,0x0F,0x00,0x1E,0x00,0x1C,0x00,0x3C,0x00,
0x3F,0xFE,0x3F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"Z",58*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xF0,0x03,0xF0,0x03,0x80,
0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0xF0,0x03,0xF0,0x00,0x00,0x00,0x00,/*"[",59*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x00,0x38,0x00,
0x38,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x0E,0x00,0x0E,0x00,0x07,0x00,0x07,0x00,
0x03,0x80,0x03,0x80,0x03,0x80,0x01,0xC0,0x01,0xC0,0x00,0xE0,0x00,0xE0,0x00,0x70,
0x00,0x70,0x00,0x70,0x00,0x38,0x00,0x38,0x00,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,/*"\",60*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x07,0xE0,0x00,0xE0,
0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x07,0xE0,0x07,0xE0,0x00,0x00,0x00,0x00,/*"]",61*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xC0,0x03,0xC0,
0x07,0xE0,0x0E,0x70,0x0C,0x30,0x18,0x18,0x38,0x1C,0x70,0x0E,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"^",62*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,/*"_",63*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0E,0x00,0x07,0x00,0x03,0x00,0x01,0x80,
0x00,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"`",64*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF0,0x1F,0xFC,0x18,0x1C,0x00,0x0E,0x00,0x0E,
0x07,0xFE,0x0F,0xFE,0x1C,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x1E,0x38,0x1E,0x3C,0x3E,
0x1F,0xEE,0x07,0xCE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"a",65*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0xF8,0x1F,0xFC,0x1F,0x1E,0x1E,0x0E,0x1C,0x07,
0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1E,0x0E,0x1F,0x1E,
0x1F,0xFC,0x1C,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"b",66*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xF0,0x07,0xF8,0x0F,0x0C,0x0E,0x00,0x1C,0x00,
0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1E,0x00,0x0E,0x00,0x0F,0x0C,
0x07,0xF8,0x01,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"c",67*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0E,0x00,0x0E,0x00,0x0E,
0x00,0x0E,0x00,0x0E,0x00,0x0E,0x07,0xCE,0x0F,0xFE,0x1E,0x3E,0x1C,0x1E,0x38,0x0E,
0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1E,0x1E,0x3E,
0x0F,0xFE,0x07,0xCE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"d",68*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,0x1E,0x3C,0x1C,0x1C,0x3C,0x0E,
0x38,0x0E,0x38,0x0E,0x3F,0xFE,0x3F,0xFE,0x38,0x00,0x38,0x00,0x1C,0x04,0x1E,0x0C,
0x0F,0xF8,0x03,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"e",69*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0xFE,0x01,0xE0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x1F,0xFE,0x1F,0xFE,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"f",70*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xCE,0x0F,0xEE,0x1E,0x3E,0x1C,0x1E,0x38,0x0E,
0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1E,0x1E,0x3E,
0x0F,0xEE,0x07,0xCE,0x00,0x0E,0x00,0x0E,0x00,0x1C,0x08,0x3C,0x0F,0xF8,0x07,0xE0,/*"g",71*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0xF0,0x1D,0xF8,0x1E,0x3C,0x1E,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"h",72*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xC0,0x1F,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x3F,0xFE,0x3F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"i",73*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xE0,0x00,0xE0,0x00,0xE0,
0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xE0,0x0F,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x01,0xC0,0x1F,0xC0,0x1F,0x00,/*"j",74*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x0F,0x1C,0x1E,0x1C,0x3C,0x1C,0x78,0x1C,0xF0,
0x1D,0xE0,0x1F,0xC0,0x1F,0xE0,0x1F,0xE0,0x1E,0xF0,0x1C,0x78,0x1C,0x3C,0x1C,0x1C,
0x1C,0x1E,0x1C,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"k",75*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x80,0x7F,0x80,0x03,0x80,
0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x01,0xC0,
0x01,0xFC,0x00,0x7C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"l",76*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x77,0x1C,0x7F,0xBE,0x71,0xE7,0x71,0xC7,0x71,0xC7,
0x71,0xC7,0x71,0xC7,0x71,0xC7,0x71,0xC7,0x71,0xC7,0x71,0xC7,0x71,0xC7,0x71,0xC7,
0x71,0xC7,0x71,0xC7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"m",77*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0xF0,0x1D,0xF8,0x1E,0x3C,0x1E,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"n",78*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,0x1E,0x3C,0x1C,0x1C,0x38,0x0E,
0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x1E,0x3C,
0x0F,0xF8,0x03,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"o",79*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0xF8,0x1F,0xFC,0x1F,0x1E,0x1E,0x0E,0x1C,0x07,
0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1E,0x0E,0x1F,0x1E,
0x1F,0xFC,0x1C,0xF8,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,/*"p",80*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xCE,0x0F,0xFE,0x1E,0x3E,0x1C,0x1E,0x38,0x0E,
0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1E,0x1E,0x3E,
0x0F,0xFE,0x07,0xCE,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,/*"q",81*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x3C,0x07,0x7E,0x07,0xC2,0x07,0x80,0x07,0x80,
0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,
0x07,0x00,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"r",82*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xF0,0x0F,0xF8,0x1E,0x08,0x1C,0x00,0x1C,0x00,
0x1F,0x00,0x0F,0xF0,0x07,0xF8,0x00,0xFC,0x00,0x3C,0x00,0x1C,0x00,0x1C,0x10,0x3C,
0x1F,0xF8,0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"s",83*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,
0x03,0x80,0x03,0x80,0x03,0x80,0x3F,0xFE,0x3F,0xFE,0x03,0x80,0x03,0x80,0x03,0x80,
0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0xC0,
0x01,0xFE,0x00,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"t",84*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x3C,0x1E,0x3C,
0x0F,0xDC,0x07,0x9C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"u",85*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x0E,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x1C,0x38,
0x1C,0x38,0x1E,0x78,0x0E,0x70,0x0E,0x70,0x0F,0xF0,0x07,0xE0,0x07,0xE0,0x07,0xE0,
0x03,0xC0,0x03,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"v",86*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0xE0,0x07,0xE0,0x07,0x70,0x0E,0x70,0x0E,0x71,0x8E,
0x71,0x8E,0x7B,0xDE,0x3B,0xDC,0x3A,0x5C,0x3A,0x5C,0x3E,0x7C,0x1E,0x78,0x1C,0x38,
0x1C,0x38,0x1C,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"w",87*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x3C,0x3C,0x1E,0x78,0x0E,0x70,0x0F,0xF0,0x07,0xE0,
0x03,0xC0,0x03,0xC0,0x01,0x80,0x03,0xC0,0x07,0xE0,0x0F,0xF0,0x0E,0x70,0x1E,0x78,
0x3C,0x3C,0x78,0x1E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"x",88*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x0E,0x38,0x1C,0x38,0x1C,0x3C,0x3C,0x1C,0x38,
0x1C,0x38,0x1E,0x78,0x0E,0x70,0x0E,0x70,0x07,0xE0,0x07,0xE0,0x07,0xE0,0x03,0xC0,
0x03,0xC0,0x03,0x80,0x03,0x80,0x03,0x80,0x07,0x00,0x0F,0x00,0x3E,0x00,0x3C,0x00,/*"y",89*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xFC,0x1F,0xFC,0x00,0x3C,0x00,0x78,0x00,0x70,
0x00,0xF0,0x01,0xE0,0x01,0xC0,0x03,0xC0,0x07,0x80,0x07,0x00,0x0F,0x00,0x1E,0x00,
0x1F,0xFC,0x1F,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"z",90*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7C,0x00,0xFC,0x01,0xE0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x03,0x80,0x1F,0x00,0x1F,0x00,0x03,0x80,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xE0,0x00,0xFC,0x00,0x7C,0x00,0x00,/*"{",91*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x80,0x01,0x80,0x01,0x80,
0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,/*"|",92*/
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x00,0x1F,0x80,0x03,0xC0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x00,0xE0,0x00,0x7C,0x00,0x7C,0x00,0xE0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x03,0xC0,0x1F,0x80,0x1F,0x00,0x00,0x00,/*"}",93*/
};
#endif
#endif

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bsp/stm32/stm32f407-rt-spark/board/ports/led_matrix/drv_matrix_led.c Normal file
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@ -0,0 +1,303 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-05-22 yuanjie first version, function
*/
/**
* WS2812B serial LED data timing flow:
* | T0H | H | 350ns | ±150ns |
* | T0L | L | 800ns | ±150ns |
* | T1H | H | 700ns | ±150ns |
* | T1L | L | 600ns | ±150ns |
* | RES | L | ≥50us | -- |
* When using TIM peripheral, to meet 800kHz (1250ns) refresh rate:
* - period is: 1250ns
* - logic 0 is: 400ns(H) + 900ns(L)
* - logic 1 is: 900ns(H) + 400ns(L)
*/
#include <board.h>
#include <drv_matrix_led.h>
#ifndef LED_NUM
#define LED_NUM 19 // LED灯珠个数
#endif
#define LED_MATRIX_EN_PIN GET_PIN(F, 2)
TIM_HandleTypeDef htim3;
DMA_HandleTypeDef hdma_tim3_ch2;
ALIGN(4)
uint8_t led_buffer[LED_NUM * 24 * 2];
extern void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
// 模拟bit码: 2为逻辑0, 7为逻辑1
const uint8_t tile[] = {2, 7};
// 常见颜色定义
const RGBColor_TypeDef DARK = {0, 0, 0};
const RGBColor_TypeDef GREEN = {255, 0, 0};
const RGBColor_TypeDef RED = {0, 255, 0};
const RGBColor_TypeDef BLUE = {0, 0, 255};
const RGBColor_TypeDef WHITE = {255, 255, 255};
const RGBColor_TypeDef LT_RED = {0, 32, 0};
const RGBColor_TypeDef LT_GREEN = {32, 0, 0};
const RGBColor_TypeDef LT_BLUE = {0, 0, 32};
const RGBColor_TypeDef LT_WHITE = {16, 16, 16};
// 灯颜色缓存
RGBColor_TypeDef RGB_Data[LED_NUM] = {0};
void led_matrix_rst();
/**
* @brief This function handles DMA2 stream3 global interrupt.
*/
void DMA1_Stream5_IRQHandler(void)
{
HAL_DMA_IRQHandler(&hdma_tim3_ch2);
}
void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
if (htim->Channel == HAL_TIM_ACTIVE_CHANNEL_2)
{
__HAL_TIM_SetCompare(htim, TIM_CHANNEL_2,0); //占空比清0
}
}
/**
* @brief matrix Initialization Function
* @param None
* @retval None
*/
static int matrix_init(void)
{
TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
/* TIM3_CH2 Init */
__HAL_RCC_TIM3_CLK_ENABLE();
htim3.Instance = TIM3;
htim3.Init.Prescaler = 10-1;
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
htim3.Init.Period = 10-1; // 840kHz
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim3.Init.RepetitionCounter = 0;
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 0;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
{
Error_Handler();
}
HAL_TIM_MspPostInit(&htim3);
/* TIM3 DMA Init */
__HAL_RCC_DMA1_CLK_ENABLE();
hdma_tim3_ch2.Instance = DMA1_Stream5;
hdma_tim3_ch2.Init.Channel = DMA_CHANNEL_5;
hdma_tim3_ch2.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_tim3_ch2.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_tim3_ch2.Init.MemInc = DMA_MINC_ENABLE;
hdma_tim3_ch2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_tim3_ch2.Init.MemDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_tim3_ch2.Init.Mode = DMA_NORMAL;
hdma_tim3_ch2.Init.Priority = DMA_PRIORITY_HIGH;
hdma_tim3_ch2.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_tim3_ch2) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(&htim3, hdma[TIM_DMA_ID_CC2], hdma_tim3_ch2);
/* NVIC configuration for DMA transfer complete interrupt */
HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
rt_pin_mode(LED_MATRIX_EN_PIN, PIN_MODE_OUTPUT);
rt_pin_write(LED_MATRIX_EN_PIN, PIN_LOW);
led_matrix_rst();
return RT_EOK;
}
INIT_APP_EXPORT(matrix_init);
/**
* @brief 设置灯带颜色发送缓存
* @param[in] ID 颜色
*/
void Set_LEDColor(uint16_t LedId, RGBColor_TypeDef Color)
{
RGB_Data[LedId].G = Color.G;
RGB_Data[LedId].R = Color.R;
RGB_Data[LedId].B = Color.B;
}
/**
* @brief TIM发送控制ws2812
* @param[in] 待发送缓存
*/
static void TIM_Send_WS2812(uint8_t *rgb_buffer, uint32_t size)
{
// 判断上次DMA有没有传输完成
while (HAL_DMA_GetState(&hdma_tim3_ch2) != HAL_DMA_STATE_READY);
// 发送一个24bit的RGB数据
HAL_TIM_PWM_Start_DMA(&htim3, TIM_CHANNEL_2, (uint32_t *)rgb_buffer, size);
}
/**
* @brief 控制WS2812
* @param[in] 待发送缓存
*/
void RGB_Reflash(void)
{
uint8_t dat_b,dat_r,dat_g;
// 将数组颜色转化为24个要发送的字节数据
for (uint16_t i = 0; i < LED_NUM; i++)
{
dat_g = RGB_Data[i].G;
dat_r = RGB_Data[i].R;
dat_b = RGB_Data[i].B;
for (uint16_t j = 0; j < 8; j++) {
led_buffer[(14 + (i * 48))-(j<<1)] = tile[dat_g & 0x01];
led_buffer[(14 + (i * 48))-(j<<1) + 1] = 0;
led_buffer[(30 + (i * 48))-(j<<1)] = tile[dat_r & 0x01];
led_buffer[(30 + (i * 48))-(j<<1) + 1] = 0;
led_buffer[(46 + (i * 48))-(j<<1)] = tile[dat_b & 0x01];
led_buffer[(46 + (i * 48))-(j<<1) + 1] = 0;
dat_g >>=1;
dat_r >>=1;
dat_b >>=1;
}
}
TIM_Send_WS2812(led_buffer, sizeof(led_buffer) / 2);
}
void led_matrix_rst()
{
for (uint32_t i = 0; i < (LED_NUM * 24); i++)
{
led_buffer[ (i<<1) ] = 3;
led_buffer[ (i<<1) + 1] = 0;
}
TIM_Send_WS2812(led_buffer, sizeof(led_buffer) / 2 );
}
MSH_CMD_EXPORT(led_matrix_rst, Test led matrix on board)
void led_matrix_fill(RGBColor_TypeDef Color)
{
rt_memset(RGB_Data, 0x00, sizeof(RGB_Data));
for (uint8_t i = 0; i < LED_NUM; i++)
{
Set_LEDColor(i, Color);
}
RGB_Reflash();
}
void led_matrix_fill_test(uint8_t index)
{
switch (index)
{
case 0:
led_matrix_fill(LT_RED);
break;
case 1:
led_matrix_fill(LT_GREEN);
break;
case 2:
led_matrix_fill(LT_BLUE);
break;
case 3:
led_matrix_fill(LT_WHITE);
break;
default:
break;
}
}
void led_matrix_test1()
{
rt_memset(RGB_Data, 0x00, sizeof(RGB_Data));
Set_LEDColor(0, RED);
Set_LEDColor(1, GREEN);
Set_LEDColor(2, BLUE);
Set_LEDColor(3, RED);
Set_LEDColor(4, GREEN);
Set_LEDColor(5, BLUE);
Set_LEDColor(6, RED);
Set_LEDColor(7, GREEN);
Set_LEDColor(8, BLUE);
Set_LEDColor(9, WHITE);
// led_matrix_rst();
RGB_Reflash();
}
MSH_CMD_EXPORT(led_matrix_test1, Test led matrix on board)
void led_matrix_test2()
{
rt_memset(RGB_Data, 0x00, sizeof(RGB_Data));
Set_LEDColor(0, BLUE);
Set_LEDColor(1, RED);
Set_LEDColor(2, GREEN);
Set_LEDColor(3, BLUE);
Set_LEDColor(4, RED);
Set_LEDColor(5, GREEN);
Set_LEDColor(6, BLUE);
Set_LEDColor(7, RED);
Set_LEDColor(8, GREEN);
Set_LEDColor(9, RED);
Set_LEDColor(14, GREEN);
Set_LEDColor(15, GREEN);
Set_LEDColor(16, BLUE);
Set_LEDColor(17, RED);
Set_LEDColor(18, WHITE);
RGB_Reflash();
}
MSH_CMD_EXPORT(led_matrix_test2, Test led matrix on board)
void led_matrix_test3()
{
for (uint8_t i = 0; i < 4; i++)
{
led_matrix_fill_test(i);
rt_thread_mdelay(1000);
}
led_matrix_rst();
}
MSH_CMD_EXPORT(led_matrix_test3, Test led matrix on board)
void led_matrix_show_color(uint8_t r, uint8_t g, uint8_t b)
{
RGBColor_TypeDef color = {g,r,b};
led_matrix_fill(color);
}

21
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#ifndef _LED_MATRIX
#define _LED_MATRIX
#include <rtthread.h>
typedef struct RGBColor_TypeDef
{
uint8_t G;
uint8_t R;
uint8_t B;
} RGBColor_TypeDef; // 颜色结构体
extern const RGBColor_TypeDef DARK;
extern const RGBColor_TypeDef GREEN;
extern const RGBColor_TypeDef RED;
extern const RGBColor_TypeDef BLUE;
extern const RGBColor_TypeDef WHITE;
extern void Set_LEDColor(uint16_t LedId, RGBColor_TypeDef Color);
extern void RGB_Reflash(void);
extern void led_matrix_rst();
#endif

16
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/SConscript Normal file
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from building import *
import os
cwd = GetCurrentDir()
group = []
src = Glob('*.c')
CPPPATH = [cwd]
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
group = group + SConscript(os.path.join(d, 'SConscript'))
group = group + DefineGroup('LVGL-port', src, depend = ['BSP_USING_LVGL'], CPPPATH = CPPPATH)
Return('group')

17
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/demo/SConscript Normal file
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from building import *
import os
cwd = GetCurrentDir()
group = []
src = Glob('*.c')
CPPPATH = [cwd]
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
group = group + SConscript(os.path.join(d, 'SConscript'))
group = group + DefineGroup('LVGL-demo', src, depend = ['BSP_USING_LVGL', 'BSP_USING_LVGL_DEMO'], CPPPATH = CPPPATH)
Return('group')

30
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/demo/lv_demo.c Normal file
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-17 Meco Man first version
* 2022-05-10 Meco Man improve rt-thread initialization process
*/
#include <lvgl.h>
void lv_user_gui_init(void)
{
/* display demo; you may replace with your LVGL application at here */
// extern void lv_demo_pingpong(void);
// extern lv_demo_calendar();
// lv_demo_calendar();
// extern void lv_demo_music(void);
// lv_demo_music();
extern void lv_demo_benchmark(void);
lv_demo_benchmark();
// extern lv_demo_widgets();
// lv_demo_widgets();
}

50
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/demo/lv_demo_calendar.c Normal file
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#include <lvgl.h>
#include <board.h>
#include <drv_lcd.h>
static void event_handler(lv_event_t * e)
{
lv_event_code_t code = lv_event_get_code(e);
lv_obj_t * obj = lv_event_get_current_target(e);
if(code == LV_EVENT_VALUE_CHANGED) {
lv_calendar_date_t date;
if(lv_calendar_get_pressed_date(obj, &date)) {
LV_LOG_USER("Clicked date: %02d.%02d.%d", date.day, date.month, date.year);
}
}
}
void lv_demo_calendar(void)
{
lv_obj_t * calendar = lv_calendar_create(lv_scr_act());
lv_obj_set_size(calendar, LCD_W, LCD_H);
lv_obj_align(calendar, LV_ALIGN_CENTER, 0, 0);
lv_obj_add_event_cb(calendar, event_handler, LV_EVENT_ALL, NULL);
lv_calendar_set_today_date(calendar, 2021, 02, 23);
lv_calendar_set_showed_date(calendar, 2021, 02);
/*Highlight a few days*/
static lv_calendar_date_t highlighted_days[3]; /*Only its pointer will be saved so should be static*/
highlighted_days[0].year = 2021;
highlighted_days[0].month = 02;
highlighted_days[0].day = 6;
highlighted_days[1].year = 2021;
highlighted_days[1].month = 02;
highlighted_days[1].day = 11;
highlighted_days[2].year = 2022;
highlighted_days[2].month = 02;
highlighted_days[2].day = 22;
lv_calendar_set_highlighted_dates(calendar, highlighted_days, 3);
#if LV_USE_CALENDAR_HEADER_DROPDOWN
lv_calendar_header_dropdown_create(calendar);
#elif LV_USE_CALENDAR_HEADER_ARROW
lv_calendar_header_arrow_create(calendar);
#endif
lv_calendar_set_showed_date(calendar, 2021, 10);
}

43
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/lv_conf.h Normal file
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-18 Meco Man First version
*/
#ifndef LV_CONF_H
#define LV_CONF_H
#include <rtconfig.h>
#define LV_COLOR_DEPTH 16
#define LV_USE_PERF_MONITOR 1
#define MY_DISP_HOR_RES 240
#define MY_DISP_VER_RES 240
//#define LV_USE_LOG 1
#ifdef PKG_USING_LV_MUSIC_DEMO
/* music player demo */
#define LV_HOR_RES_MAX MY_DISP_HOR_RES
#define LV_VER_RES_MAX MY_DISP_VER_RES
#define LV_USE_DEMO_RTT_MUSIC 1
#define LV_DEMO_RTT_MUSIC_AUTO_PLAY 1
#define LV_FONT_MONTSERRAT_12 1
#define LV_FONT_MONTSERRAT_16 1
#define LV_COLOR_SCREEN_TRANSP 1
#endif
#define LV_USE_DEMO_BENCHMARK 1
//#define LV_USE_DEMO_WIDGETS 1
//#define LV_USE_DEMO_MUSIC 1
#endif

189
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/lv_port_disp.c Normal file
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/**
* @file lv_port_disp_templ.c
*
*/
/*Copy this file as "lv_port_disp.c" and set this value to "1" to enable content*/
#if 1
/*********************
* INCLUDES
*********************/
#include <lv_conf.h>
#include "lv_port_disp.h"
#include <stdbool.h>
/*********************
* DEFINES
*********************/
#ifndef MY_DISP_HOR_RES
#warning Please define or replace the macro MY_DISP_HOR_RES with the actual screen width, default value 320 is used for now.
#define MY_DISP_HOR_RES 240
#endif
#ifndef MY_DISP_VER_RES
#warning Please define or replace the macro MY_DISP_HOR_RES with the actual screen height, default value 240 is used for now.
#define MY_DISP_VER_RES 240
#endif
/**********************
* TYPEDEFS
**********************/
/**********************
* STATIC PROTOTYPES
**********************/
static void disp_init(void);
static void disp_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p);
//static void gpu_fill(lv_disp_drv_t * disp_drv, lv_color_t * dest_buf, lv_coord_t dest_width,
// const lv_area_t * fill_area, lv_color_t color);
/**********************
* STATIC VARIABLES
**********************/
/**********************
* MACROS
**********************/
/**********************
* GLOBAL FUNCTIONS
**********************/
void lv_port_disp_init(void)
{
/*-------------------------
* Initialize your display
* -----------------------*/
disp_init();
/*-----------------------------
* Create a buffer for drawing
*----------------------------*/
/**
* LVGL requires a buffer where it internally draws the widgets.
* Later this buffer will passed to your display driver's `flush_cb` to copy its content to your display.
* The buffer has to be greater than 1 display row
*
* There are 3 buffering configurations:
* 1. Create ONE buffer:
* LVGL will draw the display's content here and writes it to your display
*
* 2. Create TWO buffer:
* LVGL will draw the display's content to a buffer and writes it your display.
* You should use DMA to write the buffer's content to the display.
* It will enable LVGL to draw the next part of the screen to the other buffer while
* the data is being sent form the first buffer. It makes rendering and flushing parallel.
*
* 3. Double buffering
* Set 2 screens sized buffers and set disp_drv.full_refresh = 1.
* This way LVGL will always provide the whole rendered screen in `flush_cb`
* and you only need to change the frame buffer's address.
*/
/* Example for 1) */
static lv_disp_draw_buf_t draw_buf_dsc_1;
/*GCC*/
#if defined ( __GNUC__ )
static lv_color_t buf_1[MY_DISP_HOR_RES * MY_DISP_HOR_RES / 2] __attribute__((section(".LVGLccm"))); /*A buffer for 10 rows*/
/*MDK*/
#elif defined ( __CC_ARM )
__attribute__((at(0x10000000))) lv_color_t buf_1[LCD_H * LCD_W / 2];
#endif
lv_disp_draw_buf_init(&draw_buf_dsc_1, buf_1, NULL, MY_DISP_HOR_RES * MY_DISP_HOR_RES / 2); /*Initialize the display buffer*/
/*-----------------------------------
* Register the display in LVGL
*----------------------------------*/
static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/
lv_disp_drv_init(&disp_drv); /*Basic initialization*/
/*Set up the functions to access to your display*/
/*Set the resolution of the display*/
disp_drv.hor_res = MY_DISP_HOR_RES;
disp_drv.ver_res = MY_DISP_VER_RES;
/*Used to copy the buffer's content to the display*/
disp_drv.flush_cb = disp_flush;
/*Set a display buffer*/
disp_drv.draw_buf = &draw_buf_dsc_1;
/*Required for Example 3)*/
//disp_drv.full_refresh = 1;
/* Fill a memory array with a color if you have GPU.
* Note that, in lv_conf.h you can enable GPUs that has built-in support in LVGL.
* But if you have a different GPU you can use with this callback.*/
//disp_drv.gpu_fill_cb = gpu_fill;
/*Finally register the driver*/
lv_disp_drv_register(&disp_drv);
}
/**********************
* STATIC FUNCTIONS
**********************/
/*Initialize your display and the required peripherals.*/
static void disp_init(void)
{
/*You code here*/
}
volatile bool disp_flush_enabled = true;
/* Enable updating the screen (the flushing process) when disp_flush() is called by LVGL
*/
void disp_enable_update(void)
{
disp_flush_enabled = true;
}
/* Disable updating the screen (the flushing process) when disp_flush() is called by LVGL
*/
void disp_disable_update(void)
{
disp_flush_enabled = false;
}
/*Flush the content of the internal buffer the specific area on the display
*You can use DMA or any hardware acceleration to do this operation in the background but
*'lv_disp_flush_ready()' has to be called when finished.*/
static void disp_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p)
{
extern void lcd_fill_array(rt_uint16_t x_start, rt_uint16_t y_start, rt_uint16_t x_end, rt_uint16_t y_end, void *pcolor);
lcd_fill_array(area->x1, area->y1, area->x2, area->y2, color_p);
lv_disp_flush_ready(disp_drv);
}
/*OPTIONAL: GPU INTERFACE*/
/*If your MCU has hardware accelerator (GPU) then you can use it to fill a memory with a color*/
//static void gpu_fill(lv_disp_drv_t * disp_drv, lv_color_t * dest_buf, lv_coord_t dest_width,
// const lv_area_t * fill_area, lv_color_t color)
//{
// /*It's an example code which should be done by your GPU*/
// int32_t x, y;
// dest_buf += dest_width * fill_area->y1; /*Go to the first line*/
//
// for(y = fill_area->y1; y <= fill_area->y2; y++) {
// for(x = fill_area->x1; x <= fill_area->x2; x++) {
// dest_buf[x] = color;
// }
// dest_buf+=dest_width; /*Go to the next line*/
// }
//}
#else /*Enable this file at the top*/
/*This dummy typedef exists purely to silence -Wpedantic.*/
typedef int keep_pedantic_happy;
#endif

57
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/lv_port_disp.h Normal file
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/**
* @file lv_port_disp_templ.h
*
*/
/*Copy this file as "lv_port_disp.h" and set this value to "1" to enable content*/
#if 1
#ifndef LV_PORT_DISP_TEMPL_H
#define LV_PORT_DISP_TEMPL_H
#ifdef __cplusplus
extern "C" {
#endif
/*********************
* INCLUDES
*********************/
#if defined(LV_LVGL_H_INCLUDE_SIMPLE)
#include "lvgl.h"
#else
#include "lvgl.h"
#endif
/*********************
* DEFINES
*********************/
/**********************
* TYPEDEFS
**********************/
/**********************
* GLOBAL PROTOTYPES
**********************/
/* Initialize low level display driver */
void lv_port_disp_init(void);
/* Enable updating the screen (the flushing process) when disp_flush() is called by LVGL
*/
void disp_enable_update(void);
/* Disable updating the screen (the flushing process) when disp_flush() is called by LVGL
*/
void disp_disable_update(void);
/**********************
* MACROS
**********************/
#ifdef __cplusplus
} /*extern "C"*/
#endif
#endif /*LV_PORT_DISP_TEMPL_H*/
#endif /*Disable/Enable content*/

18
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/lv_port_indev.c Normal file
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/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-18 Meco Man The first version
*/
#include <lvgl.h>
#include <stdbool.h>
#include <rtdevice.h>
#include <board.h>
void lv_port_indev_init(void)
{
}

28
bsp/stm32/stm32f407-rt-spark/board/ports/phy_reset.c Normal file
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-23 flybreak first version
*/
#include <board.h>
#define RESET_IO GET_PIN(D, 3)
void phy_reset(void)
{
rt_pin_write(RESET_IO, PIN_LOW);
rt_thread_mdelay(50);
rt_pin_write(RESET_IO, PIN_HIGH);
}
int phy_init(void)
{
rt_pin_mode(RESET_IO, PIN_MODE_OUTPUT);
rt_pin_write(RESET_IO, PIN_HIGH);
return RT_EOK;
}
INIT_BOARD_EXPORT(phy_init);

121
bsp/stm32/stm32f407-rt-spark/board/ports/pm/drv_pm.c Normal file
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/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-07-31 tanek first version
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
/**
* This function will put STM32F4xx into sleep mode.
*
* @param pm pointer to power manage structure
*/
static void sleep(struct rt_pm *pm, uint8_t mode)
{
switch (mode)
{
case PM_SLEEP_MODE_NONE:
break;
case PM_SLEEP_MODE_IDLE:
break;
case PM_SLEEP_MODE_LIGHT:
HAL_SuspendTick(); /* 关闭系统时钟中断 */
HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); /* 进入 F407 sleep 模式，这个模式会停掉所有时钟，可被任意中断唤醒 */
break;
case PM_SLEEP_MODE_DEEP:
HAL_SuspendTick(); /* 关闭系统时钟中断 */
HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); /* 进入 F407 stop 模式，这个模式会停掉所有时钟，可被任意中断唤醒 */
break;
case PM_SLEEP_MODE_STANDBY:
break;
case PM_SLEEP_MODE_SHUTDOWN:
break;
default:
RT_ASSERT(0);
break;
}
}
/**
* This function will be Called in Wake up interrupt callback
*
* @param pm pointer to power manage structure
*/
static struct rt_device *device = RT_NULL;
static struct rt_pm *pm = RT_NULL;
void pm_wk_up()
{
switch (pm->sleep_mode)
{
case PM_SLEEP_MODE_NONE:
break;
case PM_SLEEP_MODE_IDLE:
break;
case PM_SLEEP_MODE_LIGHT:
HAL_ResumeTick(); /* 启动系统时钟中断 */
break;
case PM_SLEEP_MODE_DEEP:
SystemClock_Config(); /* 重新配置系统时钟 */
HAL_ResumeTick(); /* 启动系统时钟中断 */
break;
case PM_SLEEP_MODE_STANDBY:
break;
case PM_SLEEP_MODE_SHUTDOWN:
break;
default:
RT_ASSERT(0);
break;
}
}
/**
* This function initialize the power manager
*/
static int drv_pm_hw_init(void)
{
static const struct rt_pm_ops _ops =
{
sleep,
RT_NULL,
RT_NULL,
RT_NULL,
RT_NULL
};
/* initialize system pm module */
rt_system_pm_init(&_ops, 0, RT_NULL);
/* get pm device */
device = rt_device_find("pm");
if(device == RT_NULL)
{
rt_kprintf("rt_pm find error");
return 0;
}
pm = rt_container_of(device,struct rt_pm,parent);
return 1;
}
INIT_DEVICE_EXPORT(drv_pm_hw_init);

44
bsp/stm32/stm32f407-rt-spark/board/ports/pm/drv_wakeup.c Normal file
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@ -0,0 +1,44 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-08-07 Tanek first implementation
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <stm32F4xx.h>
#include "board.h"
#include "drv_gpio.h"
#define USER_WAKEUP_PIN GET_PIN(C, 5)
#define DRV_WKUP_PIN_IRQ_MODE PIN_IRQ_MODE_FALLING
static void (*_wakeup_hook)(void);
void bsp_register_wakeup(void (*hook)(void))
{
RT_ASSERT(hook != RT_NULL);
_wakeup_hook = hook;
}
static void _wakeup_callback(void *args)
{
extern void pm_wk_up();
pm_wk_up(); /* wakeup from deep sleep */
if (_wakeup_hook)
_wakeup_hook();
}
static int rt_hw_wakeup_init(void)
{
rt_pin_mode(USER_WAKEUP_PIN, PIN_MODE_INPUT_PULLUP);
rt_pin_attach_irq(USER_WAKEUP_PIN, DRV_WKUP_PIN_IRQ_MODE, _wakeup_callback, RT_NULL);
rt_pin_irq_enable(USER_WAKEUP_PIN, 1);
return 0;
}
INIT_BOARD_EXPORT(rt_hw_wakeup_init);

17
bsp/stm32/stm32f407-rt-spark/board/ports/pm/drv_wakeup.h Normal file
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@ -0,0 +1,17 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-08-07 Tanek first implementation
*/
#ifndef __DRV_WAKEUP_H__
#define __DRV_WAKEUP_H__
extern void bsp_register_wakeup(void (*hook)(void));
#endif /* __DRV_WAKEUP_H__ */

16
bsp/stm32/stm32f407-rt-spark/board/ports/rs485/SConscript Normal file
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@ -0,0 +1,16 @@
from building import *
import os
cwd = GetCurrentDir()
group = []
src = Glob('*.c')
CPPPATH = [cwd]
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
group = group + SConscript(os.path.join(d, 'SConscript'))
group = group + DefineGroup('RS485_port', src, depend = ['BSP_USING_RS485'], CPPPATH = CPPPATH)
Return('group')

137
bsp/stm32/stm32f407-rt-spark/board/ports/rs485/drv_rs485.c Normal file
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@ -0,0 +1,137 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-10-24 thread-liu first version
* 2023-05-05 yuanjie add test method
*/
#include <board.h>
#include "drv_rs485.h"
#ifdef BSP_USING_RS485
#define RS485_OUT rt_pin_write(BSP_RS485_RTS_PIN, PIN_HIGH)
#define RS485_IN rt_pin_write(BSP_RS485_RTS_PIN, PIN_LOW)
rt_device_t rs485_serial = {0};
struct rt_semaphore rs485_rx_sem = {0};
/* uart send data callback function */
static rt_err_t rs485_output(rt_device_t dev, void * buffer)
{
return RT_EOK;
}
/* uart receive data callback function */
static rt_err_t rs485_input(rt_device_t dev, rt_size_t size)
{
rt_sem_release(&rs485_rx_sem);
return RT_EOK;
}
/* send string */
int rs485_send_data(char *tbuf, rt_uint16_t t_len)
{
/* change rs485 mode */
RS485_OUT;
/* send data */
rt_device_write(rs485_serial, 0, tbuf, t_len);
/* change rs485 mode */
RS485_IN;
rt_kprintf("\nsend:");
for(int i =0;i<t_len;i++)
{
rt_kprintf("%d:%x ",i,tbuf[i]);
}
return RT_EOK;
}
#ifndef BSP_USING_LED_MATRIX_RS485_DEMO
static void rs485_thread_entry(void *parameter)
{
char ch;
while (1)
{
/* A byte of data is read from a rs485_serial port, and if it is not read, it waits for the received semaphore */
while (rt_device_read(rs485_serial, -1, &ch, 1) != 1)
{
rt_sem_take(&rs485_rx_sem, RT_WAITING_FOREVER);
}
// rt_kprintf("%c",ch);
}
}
#endif
/* rs485 rts pin init */
int rs485_init(void)
{
/* find uart device */
rs485_serial = rt_device_find(RS485_UART_DEVICE_NAME);
if (!rs485_serial)
{
rt_kprintf("find %s failed!\n", RS485_UART_DEVICE_NAME);
return -RT_ERROR;
}
rt_device_open(rs485_serial, RT_DEVICE_FLAG_INT_RX);
/* set receive data callback function */
rt_device_set_rx_indicate(rs485_serial, rs485_input);
/* set the send completion callback function */
rt_device_set_tx_complete(rs485_serial, rs485_output);
rt_pin_mode(BSP_RS485_RTS_PIN, PIN_MODE_OUTPUT);
RS485_IN;
rt_sem_init(&rs485_rx_sem, "rs485_rx_sem", 0, RT_IPC_FLAG_FIFO);
#ifndef BSP_USING_LED_MATRIX_RS485_DEMO
/* create rs485 receive thread */
rt_thread_t thread = rt_thread_create("rs485", rs485_thread_entry, RT_NULL, 1024, 25, 10);
#else
extern void led_matrix_receieve_task(void *parameter);
rt_thread_t thread = rt_thread_create("rs485", led_matrix_receieve_task, RT_NULL, 1024, 20, 10);
#endif
if (thread != RT_NULL)
{
rt_thread_startup(thread);
}
else
{
return -RT_ERROR;
}
return RT_EOK;
}
// INIT_DEVICE_EXPORT(rs485_init);
void rs485_test(int argc, void **argv)
{
char *str;
if (argc == 1)
{
rt_kprintf("-t --Enter any keys to send.\n");
}
else if (argc == 3)
{
if (rt_strcmp(argv[1], "-t") == 0)
{
str = argv[2];
rs485_send_data(str, rt_strnlen(str, 32));
}
}
}
MSH_CMD_EXPORT(rs485_test, test rs485 transmission);
#endif /* bsp_using_RS485 */

29
bsp/stm32/stm32f407-rt-spark/board/ports/rs485/drv_rs485.h Normal file
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@ -0,0 +1,29 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-10-24 thread-liu first version
*/
#ifndef __DRV_RS485_H__
#define __DRV_RS485_H__
#ifdef __cplusplus
extern "C" {
#endif
#define RS485_SEND_MODE 0
#define RS485_RECV_MODE 1
extern rt_device_t rs485_serial;
extern struct rt_semaphore rs485_rx_sem;
extern int rs485_send_data(char *tbuf, rt_uint16_t t_len);
extern int rs485_init(void);
#ifdef __cplusplus
}
#endif
#endif /* drv_rs485.h */

32
bsp/stm32/stm32f407-rt-spark/board/ports/soft_spi_flash_init.c Normal file
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@ -0,0 +1,32 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-6-14 solar first version
*/
#include <rtthread.h>
#include "spi_flash.h"
#include "spi_flash_sfud.h"
#include "drv_spi.h"
#include "drv_soft_spi.h"
#ifdef BSP_USING_SOFT_SPI_FLASH
static int rt_soft_spi_flash_init(void)
{
__HAL_RCC_GPIOB_CLK_ENABLE();
rt_hw_soft_spi_device_attach("sspi2", "sspi20", "PB.14");
if (RT_NULL == rt_sfud_flash_probe("W25Q128", "sspi20"))
{
return -RT_ERROR;
}
return RT_EOK;
}
INIT_COMPONENT_EXPORT(rt_soft_spi_flash_init);
#endif /* BSP_USING_SOFT_SPI_FLASH */

32
bsp/stm32/stm32f407-rt-spark/board/ports/spi_flash_init.c Normal file
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@ -0,0 +1,32 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-27 SummerGift add spi flash port file
*/
#include <rtthread.h>
#include "spi_flash.h"
#include "spi_flash_sfud.h"
#include "drv_spi.h"
#if defined(BSP_USING_SPI_FLASH)
static int rt_hw_spi_flash_init(void)
{
__HAL_RCC_GPIOB_CLK_ENABLE();
rt_hw_spi_device_attach("spi2", "spi20", GPIOB, GPIO_PIN_12);
if (RT_NULL == rt_sfud_flash_probe("W25Q64", "spi20"))
{
return -RT_ERROR;
}
return RT_EOK;
}
INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init);
#endif

83
bsp/stm32/stm32f407-rt-spark/rtconfig.h
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@ -20,8 +20,10 @@
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */
@ -85,6 +87,7 @@
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_PIN
#define RT_USING_PWM
/* Using USB */
@ -110,6 +113,26 @@
/* RT-Thread Utestcases */
#define SOC_FAMILY_STM32
#define SOC_SERIES_STM32F4
/* Hardware Drivers Config */
#define SOC_STM32F407ZG
#define BOARD_STM32F407_SPARK
/* Onboard Peripheral Drivers */
#define BSP_USING_USB_TO_USART
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define BSP_USING_UART
#define BSP_USING_UART1
/* Board extended module Drivers */
/* RT-Thread online packages */
@ -124,6 +147,9 @@
/* Wiced WiFi */
/* CYW43012 WiFi */
/* IoT Cloud */
@ -146,9 +172,6 @@
/* u8g2: a monochrome graphic library */
/* PainterEngine: A cross-platform graphics application framework written in C language */
/* tools packages */
@ -168,42 +191,64 @@
/* peripheral libraries and drivers */
/* sensors drivers */
/* kendryte-sdk: Kendryte SDK */
/* touch drivers */
/* Kendryte SDK */
/* AI packages */
/* Signal Processing and Control Algorithm Packages */
/* miscellaneous packages */
/* project laboratory */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
#define SOC_FAMILY_STM32
#define SOC_SERIES_STM32F4
/* Hardware Drivers Config */
/* Arduino libraries */
#define SOC_STM32F407ZG
#define BOARD_STM32F407_ATK_EXPLORER
/* Onboard Peripheral Drivers */
/* Projects and Demos */
#define BSP_USING_USB_TO_USART
/* On-chip Peripheral Drivers */
/* Sensors */
#define BSP_USING_GPIO
#define BSP_USING_UART
#define BSP_USING_UART1
/* Board extended module Drivers */
/* Display */
/* Timing */
/* Data Processing */
/* Data Storage */
/* Communication */
/* Device Control */
/* Other */
/* Signal IO */
/* Uncategorized */
#endif