Merge pull request #3613 from whj4674672/master
[bsp/stm32/stm32h743-atk-apollo]support stm32h7 fal
This commit is contained in:
Bernard Xiong
GitHub
commit
83737fa7ce
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@ -73,6 +73,9 @@ if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32F7']):
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if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32L4']):
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src += ['drv_flash/drv_flash_l4.c']
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if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32H7']):
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src += ['drv_flash/drv_flash_h7.c']
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if GetDepend('RT_USING_HWCRYPTO'):
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src += ['drv_crypto.c']
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@ -0,0 +1,301 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-12-5 SummerGift first version
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* 2019-3-2 jinsheng add Macro judgment
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* 2020-1-6 duminmin support single bank mode
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* 2020-5-17 yufanyufan77 support support H7
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*/
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#include "board.h"
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#ifdef BSP_USING_ON_CHIP_FLASH
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#include "drv_config.h"
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#include "drv_flash.h"
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#if defined(PKG_USING_FAL)
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#include "fal.h"
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#endif
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//#define DRV_DEBUG
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#define LOG_TAG "drv.flash"
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#include <drv_log.h>
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#define ADDR_FLASH_SECTOR_0 ((rt_uint32_t)0x08000000) /* Base address of Sector 0, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_1 ((rt_uint32_t)0x08020000) /* Base address of Sector 1, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_2 ((rt_uint32_t)0x08040000) /* Base address of Sector 2, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_3 ((rt_uint32_t)0x08060000) /* Base address of Sector 3, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_4 ((rt_uint32_t)0x08080000) /* Base address of Sector 4, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_5 ((rt_uint32_t)0x080A0000) /* Base address of Sector 5, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_6 ((rt_uint32_t)0x080C0000) /* Base address of Sector 6, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_7 ((rt_uint32_t)0x080E0000) /* Base address of Sector 7, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_8 ((rt_uint32_t)0x08100000) /* Base address of Sector 8, 128 Kbytes */
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#define FLASH_SECTOR_0 0U /* Sector Number 0 */
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#define FLASH_SECTOR_1 1U /* Sector Number 1 */
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#define FLASH_SECTOR_2 2U /* Sector Number 2 */
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#define FLASH_SECTOR_3 3U /* Sector Number 3 */
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#define FLASH_SECTOR_4 4U /* Sector Number 4 */
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#define FLASH_SECTOR_5 5U /* Sector Number 5 */
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#define FLASH_SECTOR_6 6U /* Sector Number 6 */
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#define FLASH_SECTOR_7 7U /* Sector Number 7 */
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/**
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* @brief Gets the sector of a given address
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* @param addr flash address
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* @param flash bank
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* @param flash sector
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* @retval The sector of a given address
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*/
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static void GetSector(rt_uint32_t Address,uint32_t* bank,uint32_t* sector)
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{
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#if defined (FLASH_OPTCR_nDBANK)
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FLASH_OBProgramInitTypeDef OBInit;
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uint32_t nbank = 0;
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/* get duel bank ability:nDBANK(Bit29) */
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HAL_FLASHEx_OBGetConfig(&OBInit);
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nbank = ((OBInit.USERConfig & 0x20000000U) >> 29);
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/* 1:single bank mode */
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if (1 == nbank)
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{
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if ((Address < ADDR_FLASH_SECTOR_1) && (Address >= ADDR_FLASH_SECTOR_0))
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{
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sector = FLASH_SECTOR_0;
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}
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else if ((Address < ADDR_FLASH_SECTOR_2) && (Address >= ADDR_FLASH_SECTOR_1))
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{
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sector = FLASH_SECTOR_1;
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}
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else if ((Address < ADDR_FLASH_SECTOR_3) && (Address >= ADDR_FLASH_SECTOR_2))
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{
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sector = FLASH_SECTOR_2;
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}
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else if ((Address < ADDR_FLASH_SECTOR_4) && (Address >= ADDR_FLASH_SECTOR_3))
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{
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sector = FLASH_SECTOR_3;
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}
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else if ((Address < ADDR_FLASH_SECTOR_5) && (Address >= ADDR_FLASH_SECTOR_4))
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{
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sector = FLASH_SECTOR_4;
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}
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else if ((Address < ADDR_FLASH_SECTOR_6) && (Address >= ADDR_FLASH_SECTOR_5))
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{
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sector = FLASH_SECTOR_5;
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}
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else if ((Address < ADDR_FLASH_SECTOR_7) && (Address >= ADDR_FLASH_SECTOR_6))
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{
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sector = FLASH_SECTOR_6;
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}
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else if ((Address < ADDR_FLASH_SECTOR_8) && (Address >= ADDR_FLASH_SECTOR_7))
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{
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sector = FLASH_SECTOR_7;
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}
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else if ((Address < ADDR_FLASH_SECTOR_9) && (Address >= ADDR_FLASH_SECTOR_8))
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{
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sector = FLASH_SECTOR_8;
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}
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else if ((Address < ADDR_FLASH_SECTOR_10) && (Address >= ADDR_FLASH_SECTOR_9))
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{
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sector = FLASH_SECTOR_9;
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}
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else if ((Address < ADDR_FLASH_SECTOR_11) && (Address >= ADDR_FLASH_SECTOR_10))
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{
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sector = FLASH_SECTOR_10;
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}
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else
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{
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sector = FLASH_SECTOR_11;
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}
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}
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else /* 0:dual bank mode */
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{
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LOG_E("rtthread doesn't support duel bank mode yet!");
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RT_ASSERT(0);
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}
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#else /* no dual bank ability */
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*sector = (Address&0xffffff)/FLASH_SIZE_GRANULARITY_128K;
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if(*sector>7)
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{
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*bank = FLASH_BANK_1;
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*sector = *sector/2;
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}
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else
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{
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*bank = FLASH_BANK_2;
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}
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#endif
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}
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/**
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* Read data from flash.
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* @note This operation's units is word.
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*
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* @param addr flash address
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* @param buf buffer to store read data
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* @param size read bytes size
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*
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* @return result
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*/
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int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
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{
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size_t i;
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if ((addr + size) > STM32_FLASH_END_ADDRESS)
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{
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LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size));
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return -1;
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}
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for (i = 0; i < size; i++, buf++, addr++)
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{
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*buf = *(rt_uint8_t *) addr;
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}
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return size;
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}
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/**
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* Write data to flash.
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* @note This operation's units is word.
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* @note This operation must after erase. @see flash_erase.
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*
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* @param addr flash address
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* @param buf the write data buffer
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* @param size write bytes size
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*
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* @return result
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*/
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int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
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{
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rt_err_t result = RT_EOK;
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rt_uint32_t end_addr = addr + size;
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rt_uint32_t bank = addr/ADDR_FLASH_SECTOR_8;;
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if ((end_addr) > STM32_FLASH_END_ADDRESS)
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{
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LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size));
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return -RT_EINVAL;
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}
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if (size < 1)
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{
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return -RT_EINVAL;
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}
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/* Unlock the Flash to enable the flash control register access */
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HAL_FLASH_Unlock();
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR );
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for (size_t i = 0; i < size/32; i++, addr+=32, buf+=32)
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{
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/* write data to flash */
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if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, addr, (uint64_t)((uint32_t)buf)) == HAL_OK)
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{
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if (*(rt_uint8_t *)addr != *buf)
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{
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result = -RT_ERROR;
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break;
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}
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}
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else
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{
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result = -RT_ERROR;
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break;
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}
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}
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HAL_FLASH_Lock();
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if (result != RT_EOK)
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{
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return result;
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}
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return size;
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}
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/**
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* Erase data on flash.
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* @note This operation is irreversible.
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* @note This operation's units is different which on many chips.
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*
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* @param addr flash address
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* @param size erase bytes size
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*
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* @return result
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*/
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int stm32_flash_erase(rt_uint32_t addr, size_t size)
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{
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rt_err_t result = RT_EOK;
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rt_uint32_t FirstSector = 0, NbOfSectors = 0;
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rt_uint32_t SECTORError = 0;
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rt_uint32_t bank = 0;
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if ((addr + size) > STM32_FLASH_END_ADDRESS)
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{
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LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
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return -RT_EINVAL;
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}
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/*Variable used for Erase procedure*/
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FLASH_EraseInitTypeDef EraseInitStruct;
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/* Unlock the Flash to enable the flash control register access */
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HAL_FLASH_Unlock();
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/* Get the 1st sector to erase */
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GetSector(addr,&bank,&FirstSector);
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/* Get the number of sector to erase from 1st sector */
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GetSector(addr + size,0,&NbOfSectors);
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NbOfSectors = NbOfSectors - FirstSector + 1;
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/* Fill EraseInit structure */
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EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS;
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EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_3;
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EraseInitStruct.Sector = FirstSector;
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EraseInitStruct.NbSectors = NbOfSectors;
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EraseInitStruct.Banks = bank;
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if (HAL_FLASHEx_Erase(&EraseInitStruct, &SECTORError) != HAL_OK)
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{
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result = -RT_ERROR;
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goto __exit;
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}
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__exit:
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HAL_FLASH_Lock();
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if (result != RT_EOK)
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{
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return result;
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}
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LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size);
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return size;
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}
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#if defined(PKG_USING_FAL)
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static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size);
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static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size);
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static int fal_flash_erase_128k(long offset, size_t size);
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const struct fal_flash_dev stm32_onchip_flash_128k = { "onchip_flash_128k", STM32_FLASH_START_ADRESS, FLASH_SIZE_GRANULARITY_128K, (128 * 1024), {NULL, fal_flash_read_128k, fal_flash_write_128k, fal_flash_erase_128k} };
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static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size)
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{
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return stm32_flash_read(stm32_onchip_flash_128k.addr + offset, buf, size);
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}
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static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size)
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{
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return stm32_flash_write(stm32_onchip_flash_128k.addr + offset, buf, size);
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}
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static int fal_flash_erase_128k(long offset, size_t size)
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{
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return stm32_flash_erase(stm32_onchip_flash_128k.addr + offset, size);
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}
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#endif
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#endif /* BSP_USING_ON_CHIP_FLASH */
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@ -60,6 +60,7 @@
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| USB Device | 暂不支持 | |
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| USB Host | 暂不支持 | |
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| IWG | 支持 | |
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| FLASH | 支持 | 已适配 [FAL](https://github.com/RT-Thread-packages/fal) |
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## 使用说明
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@ -118,6 +119,7 @@ msh >
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## 注意事项
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1. 使用UART2 DMA模式时，HEAP的CACHE策略设置了WT模式，所以在使用rt_device_read读取数据之前必须调用用SCB_InvalidateDCache_by_Addr或者SCB_InvalidateDCache，已确保读取到数据的正确性。
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2. 使用FAL操作片内FLASH，每次读写必须是32字节的整数倍。
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## 联系人信息
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@ -110,6 +110,10 @@ menu "On-chip Peripheral Drivers"
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default 117
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endif
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config BSP_USING_ON_CHIP_FLASH
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bool "Enable on-chip FLASH"
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default n
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menuconfig BSP_USING_ONCHIP_RTC
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bool "Enable RTC"
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select RT_USING_RTC
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@ -0,0 +1,40 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-12-5 SummerGift first version
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* 2020-5-17 yufanyufan77 support H7
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*/
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#ifndef __FAL_CFG_H__
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#define __FAL_CFG_H__
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#include <rtthread.h>
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#include <board.h>
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#define FLASH_SIZE_GRANULARITY_128K (16 * 128 * 1024)
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#define STM32_FLASH_START_ADRESS_128K (0x8000000)
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extern const struct fal_flash_dev stm32_onchip_flash_128k;
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/* flash device table */
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#define FAL_FLASH_DEV_TABLE \
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{ \
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&stm32_onchip_flash_128k, \
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}
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/* ====================== Partition Configuration ========================== */
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#ifdef FAL_PART_HAS_TABLE_CFG
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/* partition table */
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#define FAL_PART_TABLE \
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{ \
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{FAL_PART_MAGIC_WROD, "app", "onchip_flash_128k", 0 , 8*128*1024, 0}, \
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{FAL_PART_MAGIC_WROD, "param", "onchip_flash_128k", 8*128*1024 , 128*1024, 0}, \
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{FAL_PART_MAGIC_WROD, "factory", "onchip_flash_128k", 9*128*1024 , 7*128*1024, 0}, \
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}
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#endif /* FAL_PART_HAS_TABLE_CFG */
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#endif /* _FAL_CFG_H_ */
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