From 835ee58a4be3e5d0605adc5b7851661cd78e1a59 Mon Sep 17 00:00:00 2001
From: "dennis.zhang.os@gmail.com" <dennis.zhang.os@gmail.com>
Date: Sat, 26 Feb 2011 09:25:51 +0000
Subject: [PATCH] delete the evb4020 and sep4020 branches, now We only maintain
 mini4020 branch.

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1291 bbd45198-f89e-11dd-88c7-29a3b14d5316
---
 bsp/evb4020/ExtDll.iex                     |    2 -
 bsp/evb4020/Ext_SDRAM.ini                  |   25 -
 bsp/evb4020/JLinkArm_EVB4020.ini           |   14 -
 bsp/evb4020/Rt-thread sep4020 分支介绍.doc |  Bin 33792 -> 0 bytes
 bsp/evb4020/divsi3.lst                     |    0
 bsp/evb4020/evb4020.sct                    |   25 -
 bsp/evb4020/evb4020.tra                    |   21 -
 bsp/evb4020/evb4020.uvopt                  | 4492 --------------------
 bsp/evb4020/evb4020.uvproj                 |  939 ----
 bsp/evb4020/evb4020_Target 1.dep           |    1 -
 bsp/evb4020/evb4020_nor.sct                |   18 -
 bsp/evb4020/evb4020_uvopt.bak              | 4492 --------------------
 bsp/evb4020/evb4020_uvproj.bak             |  939 ----
 bsp/evb4020/output/evb4020.plg             |  154 -
 bsp/evb4020/output/evb4020.tra             |  121 -
 bsp/evb4020/src/application.c              |  128 -
 bsp/evb4020/src/board.c                    |  159 -
 bsp/evb4020/src/board.h                    |   24 -
 bsp/evb4020/src/dm9161.c                   |  700 ---
 bsp/evb4020/src/dm9161.h                   |   65 -
 bsp/evb4020/src/export.c                   |    9 -
 bsp/evb4020/src/mii.h                      |  130 -
 bsp/evb4020/src/rtconfig.h                 |  200 -
 bsp/evb4020/src/sdcard.c                   |  790 ----
 bsp/evb4020/src/sdcard.h                   |   51 -
 bsp/evb4020/src/sep4020.h                  |  867 ----
 bsp/evb4020/src/serial.c                   |  282 --
 bsp/evb4020/src/serial.h                   |   90 -
 bsp/evb4020/src/startup.c                  |  119 -
 bsp/evb4020/src/tcpsendpacket.c            |   63 -
 bsp/sep4020/Ext_SDRAM.ini                  |   40 -
 bsp/sep4020/Memory.ini                     |   14 -
 bsp/sep4020/application.c                  |   86 -
 bsp/sep4020/board.c                        |  140 -
 bsp/sep4020/board.h                        |   26 -
 bsp/sep4020/project.uvopt                  | 4139 ------------------
 bsp/sep4020/project.uvproj                 | 1007 -----
 bsp/sep4020/rtconfig.h                     |  150 -
 bsp/sep4020/rtthread-sep4020-rom.sct       |   15 -
 bsp/sep4020/rtthread-sep4020-sdram.sct     |   15 -
 bsp/sep4020/sep4020.h                      |  637 ---
 bsp/sep4020/startup.c                      |  132 -
 42 files changed, 21321 deletions(-)
 delete mode 100755 bsp/evb4020/ExtDll.iex
 delete mode 100755 bsp/evb4020/Ext_SDRAM.ini
 delete mode 100755 bsp/evb4020/JLinkArm_EVB4020.ini
 delete mode 100755 bsp/evb4020/Rt-thread sep4020 分支介绍.doc
 delete mode 100755 bsp/evb4020/divsi3.lst
 delete mode 100755 bsp/evb4020/evb4020.sct
 delete mode 100755 bsp/evb4020/evb4020.tra
 delete mode 100755 bsp/evb4020/evb4020.uvopt
 delete mode 100755 bsp/evb4020/evb4020.uvproj
 delete mode 100755 bsp/evb4020/evb4020_Target 1.dep
 delete mode 100755 bsp/evb4020/evb4020_nor.sct
 delete mode 100755 bsp/evb4020/evb4020_uvopt.bak
 delete mode 100755 bsp/evb4020/evb4020_uvproj.bak
 delete mode 100755 bsp/evb4020/output/evb4020.plg
 delete mode 100755 bsp/evb4020/output/evb4020.tra
 delete mode 100755 bsp/evb4020/src/application.c
 delete mode 100755 bsp/evb4020/src/board.c
 delete mode 100755 bsp/evb4020/src/board.h
 delete mode 100755 bsp/evb4020/src/dm9161.c
 delete mode 100755 bsp/evb4020/src/dm9161.h
 delete mode 100755 bsp/evb4020/src/export.c
 delete mode 100755 bsp/evb4020/src/mii.h
 delete mode 100755 bsp/evb4020/src/rtconfig.h
 delete mode 100755 bsp/evb4020/src/sdcard.c
 delete mode 100755 bsp/evb4020/src/sdcard.h
 delete mode 100755 bsp/evb4020/src/sep4020.h
 delete mode 100755 bsp/evb4020/src/serial.c
 delete mode 100755 bsp/evb4020/src/serial.h
 delete mode 100755 bsp/evb4020/src/startup.c
 delete mode 100755 bsp/evb4020/src/tcpsendpacket.c
 delete mode 100644 bsp/sep4020/Ext_SDRAM.ini
 delete mode 100644 bsp/sep4020/Memory.ini
 delete mode 100644 bsp/sep4020/application.c
 delete mode 100644 bsp/sep4020/board.c
 delete mode 100644 bsp/sep4020/board.h
 delete mode 100644 bsp/sep4020/project.uvopt
 delete mode 100644 bsp/sep4020/project.uvproj
 delete mode 100644 bsp/sep4020/rtconfig.h
 delete mode 100644 bsp/sep4020/rtthread-sep4020-rom.sct
 delete mode 100644 bsp/sep4020/rtthread-sep4020-sdram.sct
 delete mode 100644 bsp/sep4020/sep4020.h
 delete mode 100644 bsp/sep4020/startup.c

diff --git a/bsp/evb4020/ExtDll.iex b/bsp/evb4020/ExtDll.iex
deleted file mode 100755
index b661f48f48..0000000000
--- a/bsp/evb4020/ExtDll.iex
+++ /dev/null
@@ -1,2 +0,0 @@
-[EXTDLL]
-Count=0
diff --git a/bsp/evb4020/Ext_SDRAM.ini b/bsp/evb4020/Ext_SDRAM.ini
deleted file mode 100755
index e98270365b..0000000000
--- a/bsp/evb4020/Ext_SDRAM.ini
+++ /dev/null
@@ -1,25 +0,0 @@
-/******************************************************************************/
-/* MEMORY.INI: Memory Debug Initialization File                               */
-/******************************************************************************/
-/* This file is part of the uVision/ARM development tools.                    */
-/* Copyright (c) 2005-2006 Keil Software. All rights reserved.                */
-/* This software may only be used under the terms of a valid, current,        */
-/* end user licence from KEIL for a compatible version of KEIL software       */
-/* development tools. Nothing else gives you the right to use this software.  */
-/******************************************************************************/
-RESET
-FUNC void InitEmi(void)
-{
-	_WWORD(0x11000000,0x08a6a6a1);
-	_WWORD(0x11000010,0x8cfffff1);
-	_WWORD(0x11000018,0x1e104177);
-	_WWORD(0x1100001C,0x80001860);
-	_WWORD(0x11000020,0x0000000b);
-}
-InitEmi();
-Load %L INCREMENTAL;
-PC = 0x30000000;
-
-
-
-
diff --git a/bsp/evb4020/JLinkArm_EVB4020.ini b/bsp/evb4020/JLinkArm_EVB4020.ini
deleted file mode 100755
index e49918734a..0000000000
--- a/bsp/evb4020/JLinkArm_EVB4020.ini
+++ /dev/null
@@ -1,14 +0,0 @@
-[FLASH]
-SkipProgOnCRCMatch = 1
-VerifyDownload = 1
-AllowCaching = 1
-EnableFlashDL = 2
-Override = 0
-Device="ADUC7020X62"
-[BREAKPOINTS]
-ShowInfoWin = 1
-EnableFlashBP = 2
-BPDuringExecution = 0
-[CPU]
-OverrideMemMap = 0
-AllowSimulation = 1
diff --git a/bsp/evb4020/Rt-thread sep4020 分支介绍.doc b/bsp/evb4020/Rt-thread sep4020 分支介绍.doc
deleted file mode 100755
index eabd3d60ac28e8ad31164991a2e9795f14dce477..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

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diff --git a/bsp/evb4020/divsi3.lst b/bsp/evb4020/divsi3.lst
deleted file mode 100755
index e69de29bb2..0000000000
diff --git a/bsp/evb4020/evb4020.sct b/bsp/evb4020/evb4020.sct
deleted file mode 100755
index f491876a08..0000000000
--- a/bsp/evb4020/evb4020.sct
+++ /dev/null
@@ -1,25 +0,0 @@
-; *************************************************************
-; *** Scatter-Loading Description File generated by uVision ***
-; *************************************************************
-
-; *************************************************************
-; *** Scatter-Loadig Description File generated by uVision ***n
-; *************************************************************
-
-
-LR_ROM1 0x30000000 0x0FFD00 ; load region size_region 
-  {    
-  	ER_ROM1 0x30000000 0x0FFD00  ; load address = execution address
-	{  
-   		*.o (RESET, +First)
-		*(InRoot$$Sections)
-		.ANY (+RO)
-  	}
-  	RW_RAM1 0x30100000 0x100000 ; RW data 
-  	{  
-   		.ANY (+RW +ZI)
-  	}
-
-
-}
-
diff --git a/bsp/evb4020/evb4020.tra b/bsp/evb4020/evb4020.tra
deleted file mode 100755
index f271ac3be6..0000000000
--- a/bsp/evb4020/evb4020.tra
+++ /dev/null
@@ -1,21 +0,0 @@
-*** Creating Trace Output File 'evb4020.tra' Ok.
-### Preparing for ADS-LD.
-### Creating ADS-LD Command Line
-### List of Objects: adding '"startup.o"'
-### List of Objects: adding '".\context_rvds.o"'
-### List of Objects: adding '".\start_rvds.o"'
-### ADS-LD Command completed:
---cpu ARM7TDMI "startup.o" ".\context_rvds.o" ".\start_rvds.o" --strict --scatter "evb4020.sct" 

---autoat --summary_stderr --info summarysizes --map --xref --callgraph --symbols 

---info sizes --info totals --info unused --info veneers 

- --list ".\evb4020.map" -o "evb4020.axf"### Preparing Environment (PrepEnvAds)
-### ADS-LD Output File: 'evb4020.axf'
-### ADS-LD Command File: 'evb4020.lnp'
-### Checking for dirty Components...
-### Creating CmdFile 'evb4020.lnp', Handle=0x000006D0
-### Writing '.lnp' file
-### ADS-LD Command file 'evb4020.lnp' is ready.
-### ADS-LD: About to start ADS-LD Thread.
-### ADS-LD: executed with 0 errors
-### Updating obj list
-### LDADS_file() completed.
diff --git a/bsp/evb4020/evb4020.uvopt b/bsp/evb4020/evb4020.uvopt
deleted file mode 100755
index ac38dabe02..0000000000
--- a/bsp/evb4020/evb4020.uvopt
+++ /dev/null
@@ -1,4492 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
-
-  <SchemaVersion>1.0</SchemaVersion>
-
-  <Header>### uVision Project, (C) Keil Software</Header>
-
-  <Extensions>
-    <cExt>*.c</cExt>
-    <aExt>*.s*; *.src; *.a*</aExt>
-    <oExt>*.obj</oExt>
-    <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
-    <pExt>*.plm</pExt>
-    <CppX>*.cpp</CppX>
-  </Extensions>
-
-  <DaveTm>
-    <dwLowDateTime>0</dwLowDateTime>
-    <dwHighDateTime>0</dwHighDateTime>
-  </DaveTm>
-
-  <Target>
-    <TargetName>EVB4020</TargetName>
-    <ToolsetNumber>0x4</ToolsetNumber>
-    <ToolsetName>ARM-ADS</ToolsetName>
-    <TargetOption>
-      <CLKADS>60000000</CLKADS>
-      <OPTTT>
-        <gFlags>1</gFlags>
-        <BeepAtEnd>1</BeepAtEnd>
-        <RunSim>1</RunSim>
-        <RunTarget>0</RunTarget>
-      </OPTTT>
-      <OPTHX>
-        <HexSelection>1</HexSelection>
-        <FlashByte>65535</FlashByte>
-        <HexRangeLowAddress>0</HexRangeLowAddress>
-        <HexRangeHighAddress>0</HexRangeHighAddress>
-        <HexOffset>0</HexOffset>
-      </OPTHX>
-      <OPTLEX>
-        <PageWidth>79</PageWidth>
-        <PageLength>66</PageLength>
-        <TabStop>8</TabStop>
-        <ListingPath>.\</ListingPath>
-      </OPTLEX>
-      <ListingPage>
-        <CreateCListing>1</CreateCListing>
-        <CreateAListing>1</CreateAListing>
-        <CreateLListing>1</CreateLListing>
-        <CreateIListing>0</CreateIListing>
-        <AsmCond>1</AsmCond>
-        <AsmSymb>1</AsmSymb>
-        <AsmXref>0</AsmXref>
-        <CCond>1</CCond>
-        <CCode>0</CCode>
-        <CListInc>0</CListInc>
-        <CSymb>0</CSymb>
-        <LinkerCodeListing>0</LinkerCodeListing>
-      </ListingPage>
-      <OPTXL>
-        <LMap>1</LMap>
-        <LComments>1</LComments>
-        <LGenerateSymbols>1</LGenerateSymbols>
-        <LLibSym>1</LLibSym>
-        <LLines>1</LLines>
-        <LLocSym>1</LLocSym>
-        <LPubSym>1</LPubSym>
-        <LXref>0</LXref>
-        <LExpSel>0</LExpSel>
-      </OPTXL>
-      <OPTFL>
-        <tvExp>1</tvExp>
-        <tvExpOptDlg>0</tvExpOptDlg>
-        <IsCurrentTarget>1</IsCurrentTarget>
-      </OPTFL>
-      <CpuCode>255</CpuCode>
-      <DllOpt>
-        <SimDllName>SARM.DLL</SimDllName>
-        <SimDllArguments></SimDllArguments>
-        <SimDlgDllName>DARMP.DLL</SimDlgDllName>
-        <SimDlgDllArguments></SimDlgDllArguments>
-        <TargetDllName>SARM.DLL</TargetDllName>
-        <TargetDllArguments></TargetDllArguments>
-        <TargetDlgDllName>TARMP.DLL</TargetDlgDllName>
-        <TargetDlgDllArguments></TargetDlgDllArguments>
-      </DllOpt>
-      <DebugOpt>
-        <uSim>0</uSim>
-        <uTrg>1</uTrg>
-        <sLdApp>0</sLdApp>
-        <sGomain>1</sGomain>
-        <sRbreak>1</sRbreak>
-        <sRwatch>1</sRwatch>
-        <sRmem>1</sRmem>
-        <sRfunc>1</sRfunc>
-        <sRbox>1</sRbox>
-        <tLdApp>0</tLdApp>
-        <tGomain>0</tGomain>
-        <tRbreak>1</tRbreak>
-        <tRwatch>1</tRwatch>
-        <tRmem>1</tRmem>
-        <tRfunc>0</tRfunc>
-        <tRbox>1</tRbox>
-        <sRunDeb>0</sRunDeb>
-        <sLrtime>0</sLrtime>
-        <nTsel>6</nTsel>
-        <sDll></sDll>
-        <sDllPa></sDllPa>
-        <sDlgDll></sDlgDll>
-        <sDlgPa></sDlgPa>
-        <sIfile></sIfile>
-        <tDll></tDll>
-        <tDllPa></tDllPa>
-        <tDlgDll></tDlgDll>
-        <tDlgPa></tDlgPa>
-        <tIfile>.\Ext_SDRAM.ini</tIfile>
-        <pMon>Segger\JLTAgdi.dll</pMon>
-      </DebugOpt>
-      <TargetDriverDllRegistry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DLGTARM</Key>
-          <Name>(134=-1,-1,-1,-1,0)(135=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)(108=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(105=-1,-1,-1,-1,0)(80=-1,-1,-1,-1,0)(104=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(112=-1,-1,-1,-1,0)(136=-1,-1,-1,-1,0)(117=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(114=-1,-1,-1,-1,0)(115=-1,-1,-1,-1,0)(116=-1,-1,-1,-1,0)</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>ARMDBGFLAGS</Key>
-          <Name></Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>JLTDLG</Key>
-          <Name></Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>JLTAgdi</Key>
-          <Name>-O302 -J1 -Y1000 -Z0 -FO7 -FD0 -FC800 -FN0</Name>
-        </SetRegEntry>
-      </TargetDriverDllRegistry>
-      <MemoryWindow1>
-        <Mm>
-          <WinNumber>1</WinNumber>
-          <SubType>0</SubType>
-          <ItemText>0x300000A8</ItemText>
-        </Mm>
-      </MemoryWindow1>
-      <MemoryWindow2>
-        <Mm>
-          <WinNumber>2</WinNumber>
-          <SubType>0</SubType>
-          <ItemText>0x301002f8</ItemText>
-        </Mm>
-      </MemoryWindow2>
-      <DebugFlag>
-        <trace>0</trace>
-        <periodic>1</periodic>
-        <aLwin>0</aLwin>
-        <aCover>0</aCover>
-        <aSer1>0</aSer1>
-        <aSer2>0</aSer2>
-        <aPa>0</aPa>
-        <viewmode>1</viewmode>
-        <vrSel>0</vrSel>
-        <aSym>0</aSym>
-        <aTbox>0</aTbox>
-        <AscS1>0</AscS1>
-        <AscS2>0</AscS2>
-        <AscS3>0</AscS3>
-        <aSer3>0</aSer3>
-        <eProf>0</eProf>
-        <aLa>0</aLa>
-        <aPa1>0</aPa1>
-        <AscS4>0</AscS4>
-        <aSer4>0</aSer4>
-        <StkLoc>0</StkLoc>
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index 5051949c9f..0000000000
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-            <File>
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-            <File>
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-            <File>
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-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\tcp_out.c</FilePath>
-            </File>
-            <File>
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-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\udp.c</FilePath>
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-            <File>
-              <FileName>autoip.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\autoip.c</FilePath>
-            </File>
-            <File>
-              <FileName>icmp.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\icmp.c</FilePath>
-            </File>
-            <File>
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-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\igmp.c</FilePath>
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-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\inet.c</FilePath>
-            </File>
-            <File>
-              <FileName>inet_chksum.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\inet_chksum.c</FilePath>
-            </File>
-            <File>
-              <FileName>ip.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\ip.c</FilePath>
-            </File>
-            <File>
-              <FileName>ip_addr.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\ip_addr.c</FilePath>
-            </File>
-            <File>
-              <FileName>ip_frag.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\ip_frag.c</FilePath>
-            </File>
-            <File>
-              <FileName>asn1_dec.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\snmp\asn1_dec.c</FilePath>
-            </File>
-            <File>
-              <FileName>asn1_enc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\snmp\asn1_enc.c</FilePath>
-            </File>
-            <File>
-              <FileName>mib_structs.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\snmp\mib_structs.c</FilePath>
-            </File>
-            <File>
-              <FileName>mib2.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\snmp\mib2.c</FilePath>
-            </File>
-            <File>
-              <FileName>msg_in.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\snmp\msg_in.c</FilePath>
-            </File>
-            <File>
-              <FileName>msg_out.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\snmp\msg_out.c</FilePath>
-            </File>
-            <File>
-              <FileName>etharp.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\netif\etharp.c</FilePath>
-            </File>
-            <File>
-              <FileName>ethernetif.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\netif\ethernetif.c</FilePath>
-            </File>
-            <File>
-              <FileName>loopif.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\netif\loopif.c</FilePath>
-            </File>
-            <File>
-              <FileName>slipif.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\netif\slipif.c</FilePath>
-            </File>
-            <File>
-              <FileName>auth.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\netif\ppp\auth.c</FilePath>
-            </File>
-            <File>
-              <FileName>chap.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\netif\ppp\chap.c</FilePath>
-            </File>
-            <File>
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-              <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\netif\ppp\chpms.c</FilePath>
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-              <FileType>1</FileType>
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diff --git a/bsp/evb4020/output/evb4020.plg b/bsp/evb4020/output/evb4020.plg
deleted file mode 100755
index 8be74bdb40..0000000000
--- a/bsp/evb4020/output/evb4020.plg
+++ /dev/null
@@ -1,154 +0,0 @@
-<html>
-<body>
-<pre>
-<h1>�Vision Build Log</h1>
-<h2>Project:</h2>
-F:\rtt\bsp\evb4020\evb4020.uvproj
-Project File Date:  10/26/2010
-
-<h2>Output:</h2>
-Build target 'EVB4020'
-compiling startup.c...
-compiling application.c...
-compiling export.c...
-compiling clock.c...
-compiling device.c...
-compiling idle.c...
-compiling ipc.c...
-compiling irq.c...
-compiling kservice.c...
-compiling mem.c...
-compiling mempool.c...
-compiling object.c...
-compiling scheduler.c...
-compiling slab.c...
-compiling thread.c...
-compiling timer.c...
-assembling context_rvds.S...
-assembling start_rvds.S...
-compiling stack.c...
-compiling trap.c...
-compiling interrupt.c...
-compiling cpu.c...
-..\..\libcpu\arm\sep4020\cpu.c(21): warning:  #1215-D: #warning directive: I DON'T KNOW IF THE MMU OPERATION WORKS ON SEP4020
-..\..\libcpu\arm\sep4020\cpu.c:   #warning I DON'T KNOW IF THE MMU OPERATION WORKS ON SEP4020
-..\..\libcpu\arm\sep4020\cpu.c:    ^
-..\..\libcpu\arm\sep4020\cpu.c(187): warning:  #236-D: controlling expression is constant
-..\..\libcpu\arm\sep4020\cpu.c:         RT_ASSERT(RT_NULL);
-..\..\libcpu\arm\sep4020\cpu.c:         ^
-..\..\libcpu\arm\sep4020\cpu.c: ..\..\libcpu\arm\sep4020\cpu.c: 2 warnings, 0 errors
-compiling board.c...
-compiling serial.c...
-compiling sdcard.c...
-src\sdcard.c(359): warning:  #177-D: function "sd_readmultiblock" was declared but never referenced
-src\sdcard.c:   static rt_uint8_t sd_readmultiblock(rt_uint32_t address, rt_uint8_t* buf,rt_uint32_t size)
-src\sdcard.c:                     ^
-src\sdcard.c: src\sdcard.c: 1 warning, 0 errors
-compiling dm9161.c...
-src\dm9161.c(363): warning:  #1215-D: #warning directive: SHOULD SET MAC ADDR
-src\dm9161.c:                                   #warning SHOULD SET MAC ADDR
-src\dm9161.c:                                    ^
-src\dm9161.c(369): warning:  #1215-D: #warning directive: SHOULD DETERMIN LINK SPEED
-src\dm9161.c:                                   #warning SHOULD DETERMIN LINK SPEED
-src\dm9161.c:                                    ^
-src\dm9161.c(487): warning:  #1215-D: #warning directive: disable ether;
-src\dm9161.c:           #warning disable ether;
-src\dm9161.c:            ^
-src\dm9161.c(534): warning:  #1215-D: #warning directive: SHOULD DISABLE INTEERUPT?
-src\dm9161.c:       #warning SHOULD DISABLE INTEERUPT?
-src\dm9161.c:        ^
-src\dm9161.c(563): warning:  #1215-D: #warning directive: SHOULD NOTICE IT'S LENGTH
-src\dm9161.c:           #warning SHOULD NOTICE IT'S LENGTH
-src\dm9161.c:            ^
-src\dm9161.c(616): warning:  #177-D: variable "len" was declared but never referenced
-src\dm9161.c:                                   rt_int32_t len;
-src\dm9161.c:                                              ^
-src\dm9161.c(664): warning:  #1215-D: #warning directive: NOTICE:
-src\dm9161.c:           #warning NOTICE:
-src\dm9161.c:            ^
-src\dm9161.c(688): warning:  #1215-D: #warning directive: TODO
-src\dm9161.c:           #warning TODO
-src\dm9161.c:            ^
-src\dm9161.c: src\dm9161.c: 8 warnings, 0 errors
-compiling backtrace.c...
-compiling div0.c...
-compiling showmem.c...
-compiling dfs.c...
-compiling dfs_file.c...
-compiling dfs_fs.c...
-compiling dfs_posix.c...
-compiling dfs_elm.c...
-compiling ff.c...
-compiling cmd.c...
-compiling finsh_compiler.c...
-compiling finsh_error.c...
-compiling finsh_heap.c...
-compiling finsh_init.c...
-compiling finsh_node.c...
-compiling finsh_ops.c...
-compiling finsh_parser.c...
-compiling finsh_token.c...
-compiling finsh_var.c...
-compiling finsh_vm.c...
-compiling shell.c...
-compiling symbol.c...
-compiling api_lib.c...
-compiling api_msg.c...
-compiling err.c...
-compiling netbuf.c...
-compiling netdb.c...
-compiling netifapi.c...
-compiling sockets.c...
-compiling tcpip.c...
-compiling sys_arch.c...
-compiling sys_arch_init.c...
-compiling dhcp.c...
-compiling dns.c...
-compiling init.c...
-compiling memp.c...
-compiling netif.c...
-compiling pbuf.c...
-compiling raw.c...
-compiling stats.c...
-compiling sys.c...
-compiling tcp.c...
-compiling tcp_in.c...
-compiling tcp_out.c...
-compiling udp.c...
-compiling autoip.c...
-compiling icmp.c...
-compiling igmp.c...
-compiling inet.c...
-compiling inet_chksum.c...
-compiling ip.c...
-compiling ip_addr.c...
-compiling ip_frag.c...
-compiling asn1_dec.c...
-compiling asn1_enc.c...
-compiling mib_structs.c...
-compiling mib2.c...
-compiling msg_in.c...
-compiling msg_out.c...
-compiling etharp.c...
-compiling ethernetif.c...
-compiling loopif.c...
-compiling slipif.c...
-compiling auth.c...
-compiling chap.c...
-compiling chpms.c...
-compiling fsm.c...
-compiling ipcp.c...
-compiling lcp.c...
-compiling magic.c...
-compiling md5.c...
-compiling pap.c...
-compiling ppp.c...
-compiling ppp_oe.c...
-compiling randm.c...
-compiling vj.c...
-compiling ping.c...
-linking...
-Program Size: Code=96692 RO-data=3264 RW-data=468 ZI-data=17844  
-".\output\evb4020.axf" - 0 Error(s), 11 Warning(s).
-Clean started: Project: 'evb4020'
-   deleting intermediate output files for target 'EVB4020'
diff --git a/bsp/evb4020/output/evb4020.tra b/bsp/evb4020/output/evb4020.tra
deleted file mode 100755
index fca6a1a1c1..0000000000
--- a/bsp/evb4020/output/evb4020.tra
+++ /dev/null
@@ -1,121 +0,0 @@
-*** Creating Trace Output File '.\output\evb4020.tra' Ok.
-### Preparing for ADS-LD.
-### Creating ADS-LD Command Line
-### List of Objects: adding '".\output\startup.o"'
-### List of Objects: adding '".\output\application.o"'
-### List of Objects: adding '".\output\export.o"'
-### List of Objects: adding '".\output\clock.o"'
-### List of Objects: adding '".\output\device.o"'
-### List of Objects: adding '".\output\idle.o"'
-### List of Objects: adding '".\output\ipc.o"'
-### List of Objects: adding '".\output\irq.o"'
-### List of Objects: adding '".\output\kservice.o"'
-### List of Objects: adding '".\output\mem.o"'
-### List of Objects: adding '".\output\mempool.o"'
-### List of Objects: adding '".\output\object.o"'
-### List of Objects: adding '".\output\scheduler.o"'
-### List of Objects: adding '".\output\slab.o"'
-### List of Objects: adding '".\output\thread.o"'
-### List of Objects: adding '".\output\timer.o"'
-### List of Objects: adding '".\output\context_rvds.o"'
-### List of Objects: adding '".\output\start_rvds.o"'
-### List of Objects: adding '".\output\stack.o"'
-### List of Objects: adding '".\output\trap.o"'
-### List of Objects: adding '".\output\interrupt.o"'
-### List of Objects: adding '".\output\cpu.o"'
-### List of Objects: adding '".\output\board.o"'
-### List of Objects: adding '".\output\serial.o"'
-### List of Objects: adding '".\output\sdcard.o"'
-### List of Objects: adding '".\output\dm9161.o"'
-### List of Objects: adding '".\output\backtrace.o"'
-### List of Objects: adding '".\output\div0.o"'
-### List of Objects: adding '".\output\showmem.o"'
-### List of Objects: adding '".\output\dfs.o"'
-### List of Objects: adding '".\output\dfs_file.o"'
-### List of Objects: adding '".\output\dfs_fs.o"'
-### List of Objects: adding '".\output\dfs_posix.o"'
-### List of Objects: adding '".\output\dfs_elm.o"'
-### List of Objects: adding '".\output\ff.o"'
-### List of Objects: adding '".\output\cmd.o"'
-### List of Objects: adding '".\output\finsh_compiler.o"'
-### List of Objects: adding '".\output\finsh_error.o"'
-### List of Objects: adding '".\output\finsh_heap.o"'
-### List of Objects: adding '".\output\finsh_init.o"'
-### List of Objects: adding '".\output\finsh_node.o"'
-### List of Objects: adding '".\output\finsh_ops.o"'
-### List of Objects: adding '".\output\finsh_parser.o"'
-### List of Objects: adding '".\output\finsh_token.o"'
-### List of Objects: adding '".\output\finsh_var.o"'
-### List of Objects: adding '".\output\finsh_vm.o"'
-### List of Objects: adding '".\output\shell.o"'
-### List of Objects: adding '".\output\symbol.o"'
-### List of Objects: adding '".\output\api_lib.o"'
-### List of Objects: adding '".\output\api_msg.o"'
-### List of Objects: adding '".\output\err.o"'
-### List of Objects: adding '".\output\netbuf.o"'
-### List of Objects: adding '".\output\netdb.o"'
-### List of Objects: adding '".\output\netifapi.o"'
-### List of Objects: adding '".\output\sockets.o"'
-### List of Objects: adding '".\output\tcpip.o"'
-### List of Objects: adding '".\output\sys_arch.o"'
-### List of Objects: adding '".\output\sys_arch_init.o"'
-### List of Objects: adding '".\output\dhcp.o"'
-### List of Objects: adding '".\output\dns.o"'
-### List of Objects: adding '".\output\init.o"'
-### List of Objects: adding '".\output\memp.o"'
-### List of Objects: adding '".\output\netif.o"'
-### List of Objects: adding '".\output\pbuf.o"'
-### List of Objects: adding '".\output\raw.o"'
-### List of Objects: adding '".\output\stats.o"'
-### List of Objects: adding '".\output\sys.o"'
-### List of Objects: adding '".\output\tcp.o"'
-### List of Objects: adding '".\output\tcp_in.o"'
-### List of Objects: adding '".\output\tcp_out.o"'
-### List of Objects: adding '".\output\udp.o"'
-### List of Objects: adding '".\output\autoip.o"'
-### List of Objects: adding '".\output\icmp.o"'
-### List of Objects: adding '".\output\igmp.o"'
-### List of Objects: adding '".\output\inet.o"'
-### List of Objects: adding '".\output\inet_chksum.o"'
-### List of Objects: adding '".\output\ip.o"'
-### List of Objects: adding '".\output\ip_addr.o"'
-### List of Objects: adding '".\output\ip_frag.o"'
-### List of Objects: adding '".\output\asn1_dec.o"'
-### List of Objects: adding '".\output\asn1_enc.o"'
-### List of Objects: adding '".\output\mib_structs.o"'
-### List of Objects: adding '".\output\mib2.o"'
-### List of Objects: adding '".\output\msg_in.o"'
-### List of Objects: adding '".\output\msg_out.o"'
-### List of Objects: adding '".\output\etharp.o"'
-### List of Objects: adding '".\output\ethernetif.o"'
-### List of Objects: adding '".\output\loopif.o"'
-### List of Objects: adding '".\output\slipif.o"'
-### List of Objects: adding '".\output\auth.o"'
-### List of Objects: adding '".\output\chap.o"'
-### List of Objects: adding '".\output\chpms.o"'
-### List of Objects: adding '".\output\fsm.o"'
-### List of Objects: adding '".\output\ipcp.o"'
-### List of Objects: adding '".\output\lcp.o"'
-### List of Objects: adding '".\output\magic.o"'
-### List of Objects: adding '".\output\md5.o"'
-### List of Objects: adding '".\output\pap.o"'
-### List of Objects: adding '".\output\ppp.o"'
-### List of Objects: adding '".\output\ppp_oe.o"'
-### List of Objects: adding '".\output\randm.o"'
-### List of Objects: adding '".\output\vj.o"'
-### List of Objects: adding '".\output\ping.o"'
-### ADS-LD Command completed:
---cpu ARM7TDMI ".\output\startup.o" ".\output\application.o" ".\output\export.o" ".\output\clock.o" ".\output\device.o" ".\output\idle.o" ".\output\ipc.o" ".\output\irq.o" ".\output\kservice.o" ".\output\mem.o" ".\output\mempool.o" ".\output\object.o" ".\output\scheduler.o" ".\output\slab.o" ".\output\thread.o" ".\output\timer.o" ".\output\context_rvds.o" ".\output\start_rvds.o" ".\output\stack.o" ".\output\trap.o" ".\output\interrupt.o" ".\output\cpu.o" ".\output\board.o" ".\output\serial.o" ".\output\sdcard.o" ".\output\dm9161.o" ".\output\backtrace.o" ".\output\div0.o" ".\output\showmem.o" ".\output\dfs.o" ".\output\dfs_file.o" ".\output\dfs_fs.o" ".\output\dfs_posix.o" ".\output\dfs_elm.o" ".\output\ff.o" ".\output\cmd.o" ".\output\finsh_compiler.o" ".\output\finsh_error.o" ".\output\finsh_heap.o" ".\output\finsh_init.o" ".\output\finsh_node.o" ".\output\finsh_ops.o" ".\output\finsh_parser.o" ".\output\finsh_token.o" ".\output\finsh_var.o" ".\output\finsh_vm.o" ".\output\shell.o" ".\output\symbol.o" ".\output\api_lib.o" ".\output\api_msg.o" ".\output\err.o" ".\output\netbuf.o" ".\output\netdb.o" ".\output\netifapi.o" ".\output\sockets.o" ".\output\tcpip.o" ".\output\sys_arch.o" ".\output\sys_arch_init.o" ".\output\dhcp.o" ".\output\dns.o" ".\output\init.o" ".\output\memp.o" ".\output\netif.o" ".\output\pbuf.o" ".\output\raw.o" ".\output\stats.o" ".\output\sys.o" ".\output\tcp.o" ".\output\tcp_in.o" ".\output\tcp_out.o" ".\output\udp.o" ".\output\autoip.o" ".\output\icmp.o" ".\output\igmp.o" ".\output\inet.o" ".\output\inet_chksum.o" ".\output\ip.o" ".\output\ip_addr.o" ".\output\ip_frag.o" ".\output\asn1_dec.o" ".\output\asn1_enc.o" ".\output\mib_structs.o" ".\output\mib2.o" ".\output\msg_in.o" ".\output\msg_out.o" ".\output\etharp.o" ".\output\ethernetif.o" ".\output\loopif.o" ".\output\slipif.o" ".\output\auth.o" ".\output\chap.o" ".\output\chpms.o" ".\output\fsm.o" ".\output\ipcp.o" ".\output\lcp.o" ".\output\magic.o" ".\output\md5.o" ".\output\pap.o" ".\output\ppp.o" ".\output\ppp_oe.o" ".\output\randm.o" ".\output\vj.o" ".\output\ping.o" --strict --scatter "evb4020.sct" 

---verbose --list=out.txt --autoat --summary_stderr --info summarysizes --map --xref --callgraph --symbols 

---info sizes --info totals --info unused --info veneers 

- --list ".\evb4020.map" -o ".\output\evb4020.axf"### Preparing Environment (PrepEnvAds)
-### ADS-LD Output File: '.\output\evb4020.axf'
-### ADS-LD Command File: '.\output\evb4020.lnp'
-### Checking for dirty Components...
-### Creating CmdFile '.\output\evb4020.lnp', Handle=0x000002E8
-### Writing '.lnp' file
-### ADS-LD Command file '.\output\evb4020.lnp' is ready.
-### ADS-LD: About to start ADS-LD Thread.
-### ADS-LD: executed with 0 errors
-### Updating obj list
-### LDADS_file() completed.
diff --git a/bsp/evb4020/src/application.c b/bsp/evb4020/src/application.c
deleted file mode 100755
index 3ada483834..0000000000
--- a/bsp/evb4020/src/application.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * File      : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author		Notes
- * 2007-11-20     Yi.Qiu		add rtgui application
- * 2008-6-28      Bernard		no rtgui init
- */
-
-/**
- * @addtogroup mini2440
- */
-/*@{*/
-
-#include <board.h>
-#include <rtthread.h>
-
-#ifdef RT_USING_DFS
-#include <dfs_init.h>
-#include <dfs_elm.h>
-#include <dfs_fs.h>
-#include <dfs_posix.h>
-#endif
-
-static rt_uint8_t buf_init[0x200];
-static struct rt_thread thread_test;
-
-
-void rt_init_thread_entry(void* parameter)
-{
-	int fd;
-	rt_uint32_t sz;
-	char buffer[20];
-#ifdef RT_USING_DFS
-	dfs_init();
-#ifdef RT_USING_DFS_ELMFATFS
-	elm_init();
-	/* mount sd card fat partition 1 as root directory */
-	if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
-	{
-		rt_kprintf("File System initialized!\n");
-
-		/*Open a file*/
-		fd = open("/fattest.txt", O_RDWR|O_CREAT, 0);
-		if (fd < 0)
-		{
-			rt_kprintf("open file for write failed\n");
-			return;
-		}
-
-		sz = write(fd,"Hello RT-Thread!",sizeof("Hello RT-Thread!"));
-
-		if(sz!=0)
-		{
-			rt_kprintf("written %d\n",sz);
-		}
-		else
-			rt_kprintf("haven't written\n");
-
-		lseek(fd,0,SEEK_SET);
-		
-		sz = read(fd,buffer,sizeof(buffer));
-
-		if(sz!=0)
-		{
-			rt_kprintf("READ %d:",sz);
-			while(sz--)
-				rt_kprintf("%c",buffer[sz]);//opposite
-			rt_kprintf("\n");
-		}
-		else
-			rt_kprintf("haven't read\n");
-
-		close(fd);
-	}
-	else
-		rt_kprintf("File System initialzation failed!\n");
-#endif	
-#endif
-}
-
-void rt_led_thread_entry(void* parameter)
-{
-	/*
-	rt_uint32_t flag = 0;
-	while(1)
-	{
-		//Add your led implemention here
-		
-		rt_led_put(flag^0x01);
-		rt_kprintf("rt led test %s\n",flag?"on":"off" );
-		rt_thread_delay(100);
-		
-		
-	} */
-	//rt_thread_suspend(rt_thread_self());
-}
-
-
-int rt_application_init()
-{
-	rt_thread_t led_thread;
-	rt_err_t err;
-
- 	err = rt_thread_init(&thread_test,"init",
-								rt_init_thread_entry, RT_NULL,buf_init,
-								sizeof(buf_init), 19, 20);
-
-	led_thread = rt_thread_create("led",
-								rt_led_thread_entry, RT_NULL,
-								512, 200, 20);
-
-	if(err == RT_EOK)
-		rt_thread_startup(&thread_test);
-
-	if (led_thread != RT_NULL)
-		rt_thread_startup(led_thread);
-
-	return 0;
-}
-
-/*@}*/
diff --git a/bsp/evb4020/src/board.c b/bsp/evb4020/src/board.c
deleted file mode 100755
index 58054d34f3..0000000000
--- a/bsp/evb4020/src/board.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * File      : board.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-05-16     Bernard      first implementation
- * 2010-10-5      Wangmeng     sep4020 implementation
- */
-#include <rthw.h>
-#include <rtthread.h>
-
-#include <sep4020.h>
-#include <serial.h>
-
-void rt_hw_serial_putc(const char c);
-
-#define UART0	((struct uartport *)UART0_BASE)
-struct rt_device uart0_device;
-struct serial_int_rx uart0_int_rx;
-struct serial_device uart0 =
-{
-	UART0,
-	&uart0_int_rx,
-	RT_NULL
-};
-
-
-/**
- * This function will handle rtos timer
- */
-void rt_timer_handler(int vector)
-{
-	rt_uint32_t clear_int;
-	rt_tick_increase();
-
-	/*Clear timer interrupt*/
-	clear_int = *(RP)TIMER_T1ISCR; 
-    *(RP)TIMER_T1ISCR=clear_int;
-}
-
-/**
- * This function will handle serial
- */
-void rt_serial_handler(int vector)
-{
-	//rt_kprintf("in rt_serial_handler\n");
-    rt_int32_t stat = *(RP)UART0_IIR ;
-	UNUSED char c;
-
-	/*Received data*/
-	if(((stat & 0x0E) >> 1) == 0x02)
-	{
-	  
-	  rt_hw_serial_isr(&uart0_device);
-	  /*while (((*(RP)UART0_LSR) & 0x40))
-		{
-			c = (char)(*(RP)UART0_BASE);
-			if(c == '\r')
-			{
-				rt_hw_serial_putc('\r');
-				rt_hw_serial_putc('\n');
-			}
-			else
-				rt_hw_serial_putc(c);
-		} */
-			
-	}
-	else
-	{
-		/*clear the timeout interrupt*/
-		while (uart0.uart_device->lsr & USTAT_RCV_READY)
-			c = uart0.uart_device->dlbl_fifo.rxfifo;	
-	}
-}
-
-/**
- * This function will init timer4 for system ticks
- */
- void rt_hw_timer_init()
- {
- 	/*Set timer1*/
- 	*(RP)TIMER_T1LCR = 880000;
-	*(RP)TIMER_T1CR = 0x06;
-
-	rt_hw_interrupt_install(INTSRC_TIMER1, rt_timer_handler, RT_NULL);
-	rt_hw_interrupt_umask(INTSRC_TIMER1);
-
-	/*Enable timer1*/
-	*(RP)TIMER_T1CR |= 0x01;
- }
-
-/**
- * This function will handle init uart
- */
-void rt_hw_uart_init(void)
-{
-	const rt_int32_t sysclk = 72000000;
-	
-	/*Set data bit:8*/
-	*(RP)(UART0_LCR) = 0x83;
-	/*Set baud rate high*/
-	*(RP)(UART0_DLBH) = (sysclk/16/115200) >> 8;
-	/*Set baud rate low*/
-	*(RP)(UART0_DLBL) = (sysclk/16/115200) & 0xff;
-
-	*(RP)(UART0_LCR) = 0x83&(~(0x1 << 7));
-
-	/*Set trigger level*/
-	*(RP)(UART0_FCR) = 0x0;
-	*(RP)(UART0_IER) = 0x0;
-
-	/*Enable rx interrupt*/
-	*(RP)(UART0_IER) |= 0x01;
-	/*Disable tx interrupt*/
-	*(RP)(UART0_IER) &= ~(0x1<<1);
-	
-	rt_hw_interrupt_install(INTSRC_UART0, rt_serial_handler, RT_NULL);
-	rt_hw_interrupt_umask(INTSRC_UART0);
-
-}
-
-void rt_hw_board_init()
-{
-   	/* initialize uart */
-	rt_hw_uart_init();
-	rt_hw_timer_init();
-}
-
-/* write one character to serial, must not trigger interrupt */
-void rt_hw_serial_putc(const char c)
-{
-	/*
-		to be polite with serial console add a line feed
-		to the carriage return character
-	*/
-	if (c=='\n')rt_hw_serial_putc('\r');
-
-	while (!((*(RP)UART0_LSR) & 0x40));
-	*(RP)(UART0_BASE) = c;
-}
-
-/**
- * This function is used by rt_kprintf to display a string on console.
- *
- * @param str the displayed string
- */
-void rt_hw_console_output(const char* str)
-{
-	while (*str)
-	{
-		rt_hw_serial_putc(*str++);
-	}
-}
diff --git a/bsp/evb4020/src/board.h b/bsp/evb4020/src/board.h
deleted file mode 100755
index 2d0ac8a22a..0000000000
--- a/bsp/evb4020/src/board.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * File      : board.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2006-10-08     Bernard      add board.h to this bsp
- * 2010-10-5      Wangmeng     sep4020 implemention
- */
-
-#ifndef __BOARD_H__
-#define __BOARD_H__
-
-#include <sep4020.h>
-
-void rt_hw_board_init(void);
-void rt_hw_sdcard_init(void);
-
-#endif
diff --git a/bsp/evb4020/src/dm9161.c b/bsp/evb4020/src/dm9161.c
deleted file mode 100755
index e189f4b4cd..0000000000
--- a/bsp/evb4020/src/dm9161.c
+++ /dev/null
@@ -1,700 +0,0 @@
-#include <rtthread.h>
-#include <netif/ethernetif.h>
-
-#include "dm9161.h"
-#include <sep4020.h>
-#include "mii.h"
-
-#define SPEED_10    10
-#define SPEED_100   100
-#define SPEED_1000  1000
-/* Duplex, half or full. */
-#define DUPLEX_HALF		0x00
-#define DUPLEX_FULL		0x01
-
-/*
- * Davicom dm9161EP driver
- *
- * IRQ_LAN connects to EINT7(GPF7)
- * nLAN_CS connects to nGCS4
- */
-
-/* #define dm9161_DEBUG		1 */
-#if DM9161_DEBUG
-#define DM9161_TRACE	rt_kprintf
-#else
-#define DM9161_TRACE(...)
-#endif
-
-/*
- * dm9161 interrupt line is connected to PF7
- */
-//--------------------------------------------------------
-
-#define DM9161_PHY          0x40    /* PHY address 0x01 */
-
-#define MAX_ADDR_LEN 6
-enum DM9161_PHY_mode
-{
-    DM9161_10MHD = 0, DM9161_100MHD = 1,
-    DM9161_10MFD = 4, DM9161_100MFD = 5,
-    DM9161_AUTO  = 8, DM9161_1M_HPNA = 0x10
-};
-
-enum DM9161_TYPE
-{
-    TYPE_DM9161,
-};
-
-struct rt_dm9161_eth
-{
-    /* inherit from ethernet device */
-    struct eth_device parent;
-
-    enum DM9161_TYPE type;
-	enum DM9161_PHY_mode mode;
-
-    rt_uint8_t imr_all;
-	rt_uint8_t phy_addr;
-
-	rt_uint32_t tx_index;
-
-    rt_uint8_t packet_cnt;                  /* packet I or II */
-    rt_uint16_t queue_packet_len;           /* queued packet (packet II) */
-
-    /* interface address info. */
-    rt_uint8_t  dev_addr[MAX_ADDR_LEN];		/* hw address	*/
-};
-static struct rt_dm9161_eth dm9161_device;
-static struct rt_semaphore sem_ack, sem_lock;
-
-void rt_dm9161_isr(int irqno);
-
-static void udelay(unsigned long ns)
-{
-	unsigned long i;
-	while(ns--)
-	{
-		i = 100;
-		while(i--);
-	}
-}
-
-static __inline unsigned long sep_emac_read(unsigned int reg)
-{
-	void __iomem *emac_base = (void __iomem *)reg; 
-	return read_reg(emac_base);
-}
- 
-/*
-* Write to a EMAC register.
-*/
-static __inline void sep_emac_write(unsigned int reg, unsigned long value)
-{
-	void __iomem *emac_base = (void __iomem *)reg;
- 
-	write_reg(emac_base,value);
-}
-
-  
-/* ........................... PHY INTERFACE ........................... */
-/*         CAN DO MAC CONFIGRATION
-* Enable the MDIO bit in MAC control register
-* When not called from an interrupt-handler, access to the PHY must be
-*  protected by a spinlock.
-*/
-static void enable_mdi(void)           //need think more
-{
-	unsigned long ctl;
-  
-	ctl = sep_emac_read(MAC_CTRL);
-	sep_emac_write(MAC_CTRL, ctl&(~0x3));    /* enable management port */
-	return;
-}
-
-/*          CANNOT DO MAC CONFIGRATION
-* Disable the MDIO bit in the MAC control register
-*/
-static void disable_mdi(void)
-{
-	unsigned long ctl;
-  
-	ctl = sep_emac_read(MAC_CTRL);
-	sep_emac_write(MAC_CTRL, ctl|(0x3));    /* disable management port */
-	return;
-}
-
-/*
-* Wait until the PHY operation is complete.
-*/
-static __inline void sep_phy_wait(void) 
-{
-	unsigned long timeout = 2;
-
-	while ((sep_emac_read(MAC_MII_STATUS) & 0x2)) 
-	{
-		timeout--;
-		if (!timeout) 
-		{
-			EOUT("sep_ether: MDIO timeout\n");
-			break;
-		}		
-	}
-	return;
-}
- 
-/*
-* Write value to the a PHY register
-* Note: MDI interface is assumed to already have been enabled.
-*/
-static void write_phy(unsigned char phy_addr, unsigned char address, unsigned int value)
-{
-	unsigned short mii_txdata;
-	
-	mii_txdata = value;
-	sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
-	sep_emac_write(MAC_MII_TXDATA ,mii_txdata);
-	sep_emac_write(MAC_MII_CMD ,0x4);
-	udelay(40);
-
-	sep_phy_wait();
-	return;	
-}
- 
-/*
-* Read value stored in a PHY register.
-* Note: MDI interface is assumed to already have been enabled.
-*/
-static void read_phy(unsigned char phy_addr, unsigned char address, unsigned int *value)
-{
-	unsigned short mii_rxdata;
-//	unsigned long mii_status;
-	
-	sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
-	sep_emac_write(MAC_MII_CMD ,0x2);
-	udelay(40);
-	sep_phy_wait();
-		
-	mii_rxdata = sep_emac_read(MAC_MII_RXDATA);
-	*value =  mii_rxdata;
-	return;
-}  
-
-
-
-
-/* interrupt service routine */
-void rt_dm9161_isr(int irqno)
-{
-	  unsigned long intstatus;
-	  rt_uint32_t address;
-
- 	  mask_irq(INTSRC_MAC);
-	  intstatus = sep_emac_read(MAC_INTSRC);
-
-	  sep_emac_write(MAC_INTSRC,intstatus);
-	  
-	  /*Receive complete*/
-	  if(intstatus & 0x04)
-	  {
-	  	eth_device_ready(&(dm9161_device.parent));
-	  }	
-	  /*Receive error*/
-	  else if(intstatus & 0x08)
-	  {
-	  	rt_kprintf("Receive error\n");
-	  }
-	  /*Transmit complete*/
-	  else if(intstatus & 0x03)
-	  {
-	  	  	if(dm9161_device.tx_index == 0)
-				address = (MAC_TX_BD +(MAX_TX_DESCR-2)*8);
-			else if(dm9161_device.tx_index == 1) 
-				address = (MAC_TX_BD +(MAX_TX_DESCR-1)*8);
-			else 
-				address = (MAC_TX_BD + dm9161_device.tx_index*8-16);
-			//printk("free tx skb 0x%x in inter!!\n",lp->txBuffIndex);	
-			sep_emac_write(address,0x0);
-	  }
-	  else if (intstatus & 0x10)
-	  {
-	  	rt_kprintf("ROVER ERROR\n");
-
-	  }
-
-	while(intstatus)
-	{
-		sep_emac_write(MAC_INTSRC,intstatus);
-		intstatus = sep_emac_read(MAC_INTSRC);
-	}
-
-	unmask_irq(INTSRC_MAC);
-
-}
-
-static rt_err_t update_mac_address()
-{
-	rt_uint32_t lo,hi;
-	hi = sep_emac_read(MAC_ADDR1);
-	lo = sep_emac_read(MAC_ADDR0);
-	DBOUT("Before MAC: hi=%x lo=%x\n",hi,lo);
-
-	sep_emac_write(MAC_ADDR0,(dm9161_device.dev_addr[2] << 24) | (dm9161_device.dev_addr[3] << 16) | (dm9161_device.dev_addr[4] << 8) | (dm9161_device.dev_addr[5]));
-	sep_emac_write(MAC_ADDR1,dm9161_device.dev_addr[1]|(dm9161_device.dev_addr[0]<<8));
-
-	hi = sep_emac_read(MAC_ADDR1);
-	lo = sep_emac_read(MAC_ADDR0);
-	DBOUT("After MAC: hi=%x lo=%x\n",hi,lo);
-
-	return RT_EOK;
-}
-
-static int mii_link_ok (unsigned long phy_id)
-{
-	/* first, a dummy read, needed to latch some MII phys */
-
-	unsigned int value;
-
-	read_phy(phy_id, MII_BMSR,&value);
-	if (value & BMSR_LSTATUS)
-		return 1;
-	return 0;
-}
-
-static void update_link_speed(unsigned short phy_addr)
-{
-	unsigned int bmsr, bmcr, lpa, mac_cfg;
-	unsigned int speed, duplex;
-
-	if(!mii_link_ok(phy_addr))
-	{
-		EOUT("Link Down\n");
-		//goto result;
-	}
-
-	read_phy(phy_addr,MII_BMSR,&bmsr);
-	read_phy(phy_addr,MII_BMCR,&bmcr);
-
-	if (bmcr & BMCR_ANENABLE)                /* AutoNegotiation is enabled */
-	{                         
-		if (!(bmsr & BMSR_ANEGCOMPLETE))              /* Do nothing - another interrupt generated when negotiation complete */
-			goto result;              
-
-		read_phy(phy_addr, MII_LPA, &lpa);
-		
-		if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF)) 
-			speed = SPEED_100;
-		else 
-			speed = SPEED_10;
-			
-		if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL)) 
-			duplex = DUPLEX_FULL;
-		else 
-			duplex = DUPLEX_HALF;
-	} 
-	else 
-	{
-		speed = (bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10;
-		duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
-	 }
- 
-    /* Update the MAC */
-	mac_cfg = sep_emac_read(MAC_CTRL);
-	if (speed == SPEED_100) 
-	{
-		mac_cfg |= 0x800;			/* set speed 100 M */
-		//bmcr &=(~0x2000);
-		//write_phy(lp->phy_address, MII_BMCR, bmcr); //��dm9161���ٶ���Ϊ10M
-		if (duplex == DUPLEX_FULL)              /* 100 Full Duplex */
-			mac_cfg |= 0x400;
-		else                                    /* 100 Half Duplex */
-			mac_cfg &= (~0x400);
-	} 
-	else 
-	{
-		mac_cfg &= (~0x800);             /* set speed 10 M */
-		
-		if (duplex == DUPLEX_FULL)              /* 10 Full Duplex */
-			mac_cfg |= 0x400;
-		else                                /* 10 Half Duplex */
-			mac_cfg &= (~0x400);
-	}
-	
-	sep_emac_write(MAC_CTRL, mac_cfg);
-	rt_kprintf("Link now %i M-%s\n",  speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex");
-			
-result:
-	mac_cfg = sep_emac_read(MAC_CTRL);
-	DBOUT("After mac_cfg=%d\n",mac_cfg);
-	return;
-}
-
-static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag);
-/* RT-Thread Device Interface */
-/* initialize the interface */
-static rt_err_t rt_dm9161_init(rt_device_t dev)
-{
-	unsigned int phyid1, phyid2;
-	int detected = -1;
-	unsigned long phy_id;
-	unsigned short phy_address = 0;
-
-	while ((detected != 0) && (phy_address < 32)) 
-	{
-		/* Read the PHY ID registers */
-		enable_mdi();
-		read_phy(phy_address, MII_PHYSID1, &phyid1);
-		read_phy(phy_address, MII_PHYSID2, &phyid2);
-	
-		disable_mdi();
-
-		phy_id = (phyid1 << 16) | (phyid2 & 0xfff0);
-		switch (phy_id) 
-		{
-			case MII_DM9161_ID:		/* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */
-			case MII_DM9161A_ID:		/* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */
-			case MII_RTL8201_ID:		/* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */
-			case MII_BCM5221_ID:		/* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */
-			case MII_DP83847_ID:		/* National Semiconductor DP83847:  */
-			case MII_AC101L_ID:		/* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */
-			case MII_KS8721_ID:		/* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */
-			{
-				enable_mdi();
-				#warning SHOULD SET MAC ADDR
-				//get_mac_address(dev);		/* Get ethernet address and store it in dev->dev_addr */
-				update_mac_address();	/* Program ethernet address into MAC */
-			
-				//�ù�ϣ�Ĵ����Ƚϵ�ǰȺ����ַ��ȫ˫��������CRCУ�飬������֡�������
-				sep_emac_write(MAC_CTRL, 0xa413);
-				#warning SHOULD DETERMIN LINK SPEED
-				update_link_speed(phy_address);
-				dm9161_device.phy_addr = phy_address;
-				disable_mdi();
-				break;
-			}
-				
-		}
-
-		phy_address++;
-	}
-
-	rt_dm9161_open(dev,0);
-
-    return RT_EOK;
-}
-
-
-
-/* ................................ MAC ................................ */
-
-/*
- * Initialize and start the Receiver and Transmit subsystems
- */
-static void sepether_start()
-{
-	int i;
-	unsigned int tempaddr;
-		 
-    sep_emac_write(MAC_TXBD_NUM,MAX_TX_DESCR);
-   
-	 //��ʼ�����ͺͽ���������
-	for (i = 0; i < MAX_TX_DESCR; i++)
-	{
-		tempaddr=(MAC_TX_BD+i*8);
-        sep_emac_write(tempaddr,0);
-        tempaddr=(MAC_TX_BD+i*8+4);
-        sep_emac_write(tempaddr,0);
-	}
-	for (i = 0; i < MAX_RX_DESCR; i++)
-	{
-        tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
-        sep_emac_write(tempaddr,0);
-        tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
-        sep_emac_write(tempaddr,0);
-	}
-    
-	for (i = 0; i < MAX_RX_DESCR; i++) 
-	{
-		tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
-        sep_emac_write(tempaddr,0xc000);
-        tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
-		sep_emac_write(tempaddr,ESRAM_BASE+ MAX_TX_DESCR*0x600+i*0x600);
-	}
-
-	/* Set the Wrap bit on the last descriptor */
-	tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8-8);
-	sep_emac_write(tempaddr,0xe000);
-  
-
-	for (i = 0; i < MAX_TX_DESCR; i++) 
-	{
-        tempaddr=(MAC_TX_BD+i*8);
-        sep_emac_write(tempaddr,0x0);
-        tempaddr=(MAC_TX_BD+i*8+4);
-        sep_emac_write(tempaddr,ESRAM_BASE+i*0x600);
-	}
-	
-	return;
-}
-
-static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag)
-{
-	unsigned int dsintr;
-	enable_mdi();
-  	mask_irq(28);
- 	
-  	sep_emac_write(MAC_INTMASK,0x0);  //���������ж�
-  
-
- 	sepether_start();
-
-	/* Enable PHY interrupt */
-	*(volatile unsigned long*)GPIO_PORTA_DIR |= 0x0080 ;          //1 stands for in
-	*(volatile unsigned long*)GPIO_PORTA_SEL |= 0x0080 ;       //for common use
-	*(volatile unsigned long*)GPIO_PORTA_INCTL |= 0x0080;      //�ж����뷽ʽ
-	*(volatile unsigned long*)GPIO_PORTA_INTRCTL |= (0x3UL<<14);    //�ж�����Ϊ�͵�ƽ�ⷢ
-	*(volatile unsigned long*)GPIO_PORTA_INTRCLR |= 0x0080;    //����ж�
-	*(volatile unsigned long*)GPIO_PORTA_INTRCLR = 0x0000;          //����ж�
-
-	rt_hw_interrupt_install(INTSRC_MAC, rt_dm9161_isr, RT_NULL);
-	enable_irq(INTSRC_EXINT7);
-
-
-	read_phy(dm9161_device.phy_addr, MII_DSINTR_REG, &dsintr);
-	dsintr = dsintr & ~0xf00;		/* clear bits 8..11 */
-	write_phy(dm9161_device.phy_addr, MII_DSINTR_REG, dsintr);
-
-	update_link_speed(dm9161_device.phy_addr);
-	
-	
-	/************************************************************************************/
-	/* Enable MAC interrupts */
-	sep_emac_write(MAC_INTMASK,0xff);  //open�ж�
-  	sep_emac_write(MAC_INTSRC,0xff);   //clear all mac irq
-	unmask_irq(28);
-	disable_mdi();
-	
-	rt_kprintf("SEP4020 ethernet interface open!\n\r");
-    return RT_EOK;
-}
-
-static rt_err_t rt_dm9161_close(rt_device_t dev)
-{
-	rt_kprintf("SEP4020 ethernet interface close!\n\r");
-	
-	/* Disable Receiver and Transmitter */
-	disable_mdi();
-	#warning disable ether;
-	
-//	INT_ENABLE(28);
-	/* Disable PHY interrupt */
-//	disable_phyirq(dev);
-	
-	/* Disable MAC interrupts */
-	sep_emac_write(MAC_INTMASK,0);  //�����ж�
-
-	
-//	INT_DISABLE(28);
-	
-    return RT_EOK;
-}
-
-static rt_size_t rt_dm9161_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
-{
-    rt_set_errno(-RT_ENOSYS);
-    return 0;
-}
-
-static rt_size_t rt_dm9161_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
-{
-    rt_set_errno(-RT_ENOSYS);
-    return 0;
-}
-
-static rt_err_t rt_dm9161_control(rt_device_t dev, rt_uint8_t cmd, void *args)
-{
-
-    return RT_EOK;
-}
-
-/* ethernet device interface */
-/* transmit packet. */
-rt_err_t rt_dm9161_tx( rt_device_t dev, struct pbuf* p)
-{
-	rt_uint8_t i;
-	rt_uint32_t length = 0;
-	struct pbuf *q;
-	unsigned long  address;
-	unsigned long tmp_tx_bd;
-
-    /* lock DM9000 device */
-//    rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
-
-    /* disable dm9000a interrupt */
-    #warning SHOULD DISABLE INTEERUPT?
-
-	/*Search for available BD*/
-	for(i = 0;i<MAX_TX_DESCR;)
-	{
-		address	= MAC_TX_BD + i*8;
-		tmp_tx_bd = sep_emac_read(address);
-		if(!(tmp_tx_bd & 0x8000))
-		{
-			if(i == (MAX_TX_DESCR-1)) 
-				i = 0;
-			else 
-				i = i+1;
-			break;
-		}
-		if(i == MAX_TX_DESCR-1) 
-			i = 0;
-		else 
-			i++;
-	}
-	
-	q = p;
-	while (q)
-	{
-		rt_memcpy((u8_t*)(ESRAM_BASE + i*0x600 + length),(u8_t*)q->payload,q->len);
-		length += q->len;
-		q = q->next;
-	}
-
-	#warning SHOULD NOTICE IT'S LENGTH
-
-	length = length << 16;
-
-	if(i == MAX_TX_DESCR - 1)
-		length |= 0xb800;
-	else 
-		length |= 0x9800;
-
-	address = (MAC_TX_BD + i*8);
-	dm9161_device.tx_index = i;
-	sep_emac_write(address,length);
-
-	//wait for tranfer complete
-	while(!(sep_emac_read(address)&0x8000));
-
-	/* unlock DM9000 device */
-//    rt_sem_release(&sem_lock);
-
-    /* wait ack */
-//    rt_sem_take(&sem_ack, RT_WAITING_FOREVER);
-
-    return RT_EOK;
-}
-
-/* reception packet. */
-struct pbuf *rt_dm9161_rx(rt_device_t dev)
-{
-	unsigned int temp_rx_bd,address;
-	rt_uint32_t i = 0;
-	rt_uint32_t length;
-	unsigned char *p_recv;
-	struct pbuf* p = RT_NULL;
-
-	/* lock DM9000 device */
-    rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
-
-	while(1)
-	{
-	
-		address = MAC_TX_BD +  (MAX_TX_DESCR + i) * 8;
-		temp_rx_bd = sep_emac_read(address);
-	
-		if(!(temp_rx_bd & 0x8000))
-		{
-			length = temp_rx_bd;
-			length = length >> 16;
-	
-			p_recv = (unsigned char*)(ESRAM_BASE + (MAX_TX_DESCR + i) * 0x600);
-			p = pbuf_alloc(PBUF_LINK,length,PBUF_RAM);
-			if(p != RT_NULL)
-			{
-				struct pbuf* q;
-				rt_int32_t len;
-	
-				for(q = p;q != RT_NULL;q = q->next)
-				{
-					rt_memcpy((rt_uint8_t*)(q->payload),p_recv,q->len);
-				}
-			}
-			else
-			{
-				 rt_kprintf("Droping %d packet \n",length);
-			}
-	
-			if(i == (MAX_RX_DESCR-1))
-			{
-				sep_emac_write(address,0xe000);
-				i = 0;
-			}
-			else
-			{
-				sep_emac_write(address,0xc000);
-				i++;
-			}
-		}
-		else
-			break;
-	}
-
-	 rt_sem_release(&sem_lock);
-
-	
-	return p;
-}
-
-
-void rt_hw_dm9161_init()
-{
-	rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO);
-    rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
-
-    dm9161_device.type  = TYPE_DM9161;
-	dm9161_device.mode	= DM9161_AUTO;
-	dm9161_device.packet_cnt = 0;
-	dm9161_device.queue_packet_len = 0;
-
-    /*
-     * SRAM Tx/Rx pointer automatically return to start address,
-     * Packet Transmitted, Packet Received
-     */
-	#warning NOTICE:
-    //dm9161_device.imr_all = IMR_PAR | IMR_PTM | IMR_PRM;
-
-    dm9161_device.dev_addr[0] = 0x01;
-    dm9161_device.dev_addr[1] = 0x60;
-    dm9161_device.dev_addr[2] = 0x6E;
-    dm9161_device.dev_addr[3] = 0x11;
-    dm9161_device.dev_addr[4] = 0x02;
-    dm9161_device.dev_addr[5] = 0x0F;
-
-    dm9161_device.parent.parent.init       = rt_dm9161_init;
-    dm9161_device.parent.parent.open       = rt_dm9161_open;
-    dm9161_device.parent.parent.close      = rt_dm9161_close;
-    dm9161_device.parent.parent.read       = rt_dm9161_read;
-    dm9161_device.parent.parent.write      = rt_dm9161_write;
-    dm9161_device.parent.parent.control    = rt_dm9161_control;
-    dm9161_device.parent.parent.user_data  = RT_NULL;
-
-    dm9161_device.parent.eth_rx     = rt_dm9161_rx;
-    dm9161_device.parent.eth_tx     = rt_dm9161_tx;
-
-    eth_device_init(&(dm9161_device.parent), "e0");
-
-    /* instal interrupt */
-	#warning TODO
-	//rt_hw_interrupt_install(INTEINT4_7, rt_dm9161_isr, RT_NULL);
-	//rt_hw_interrupt_umask(INTEINT4_7);
-}
-
-void dm9161a(void)
-{
-}
-
-#ifdef RT_USING_FINSH
-#include <finsh.h>
-FINSH_FUNCTION_EXPORT(dm9161a, dm9161a register dump);
-#endif
diff --git a/bsp/evb4020/src/dm9161.h b/bsp/evb4020/src/dm9161.h
deleted file mode 100755
index e8c2faa1a9..0000000000
--- a/bsp/evb4020/src/dm9161.h
+++ /dev/null
@@ -1,65 +0,0 @@
-#ifndef __DM9000_H__
-#define __DM9000_H__
-
-/*MACRO DEFINATIONS*/
-
-
- #define SEP4020_ID_EMAC   ((unsigned int) 28) // Ethernet Mac
- /* Davicom 9161 PHY */
- #define MII_DM9161_ID   0x0181b880
- #define MII_DM9161A_ID  0x0181b8a0
-  
- /* Davicom specific registers */
- #define MII_DSCR_REG    16
- #define MII_DSCSR_REG   17
- #define MII_DSINTR_REG  21
-  
-  /* Intel LXT971A PHY */
- #define MII_LXT971A_ID  0x001378E0
-  
-  /* Intel specific registers */
- #define MII_ISINTE_REG  18
- #define MII_ISINTS_REG  19
- #define MII_LEDCTRL_REG 20
-
- /* Realtek RTL8201 PHY */
- #define MII_RTL8201_ID  0x00008200
-  
- /* Broadcom BCM5221 PHY */
- #define MII_BCM5221_ID  0x004061e0
-  
- /* Broadcom specific registers */
- #define MII_BCMINTR_REG 26
-  
-  /* National Semiconductor DP83847 */
- #define MII_DP83847_ID  0x20005c30
- 
-  /* Altima AC101L PHY */
- #define MII_AC101L_ID   0x00225520
-  
- /* Micrel KS8721 PHY */
- #define MII_KS8721_ID   0x00221610
- 
- /* ........................................................................ */
-  
- #define MAX_RBUFF_SZ    0x600           /* 1518 rounded up */
- #define MAX_RX_DESCR    20           /* max number of receive buffers */
-  
- #define MAX_TBUFF_SZ    0x600           /* 1518 rounded up */
- #define MAX_TX_DESCR    20               /* max number of receive buffers */
-  
- #define EMAC_DESC_DONE  0x00000001      /* bit for if DMA is done */
- #define EMAC_DESC_WRAP  0x00000002      /* bit for wrap */
-  
- #define EMAC_BROADCAST  0x80000000      /* broadcast address */
- #define EMAC_MULTICAST  0x40000000      /* multicast address */
- #define EMAC_UNICAST    0x20000000      /* unicast address */
- 
-#define DM9161_inb(r) 		(*(volatile rt_uint8_t  *)r)
-#define DM9161_outb(r, d) 	(*(volatile rt_uint8_t  *)r = d)
-#define DM9161_inw(r) 		(*(volatile rt_uint16_t *)r)
-#define DM9161_outw(r, d) 	(*(volatile rt_uint16_t *)r = d)
-
-void rt_hw_dm9616_init(void);
-
-#endif
diff --git a/bsp/evb4020/src/export.c b/bsp/evb4020/src/export.c
deleted file mode 100755
index a79e299172..0000000000
--- a/bsp/evb4020/src/export.c
+++ /dev/null
@@ -1,9 +0,0 @@
-#include <rtthread.h>
-#include <finsh.h>
-
-void testkkkk(void)
-{
-	rt_kprintf("Hello wangmengmeng!\n");	
-	return;
-}
-FINSH_FUNCTION_EXPORT(testkkkk,a test);
diff --git a/bsp/evb4020/src/mii.h b/bsp/evb4020/src/mii.h
deleted file mode 100755
index 349b8db309..0000000000
--- a/bsp/evb4020/src/mii.h
+++ /dev/null
@@ -1,130 +0,0 @@
-
-#ifndef __MII_H__
-#define __MII_H__
-
-/* Generic MII registers. */
-
-#define MII_BMCR            0x00        /* Basic mode control register */
-#define MII_BMSR            0x01        /* Basic mode status register  */
-#define MII_PHYSID1         0x02        /* PHYS ID 1                   */
-#define MII_PHYSID2         0x03        /* PHYS ID 2                   */
-#define MII_ADVERTISE       0x04        /* Advertisement control reg   */
-#define MII_LPA             0x05        /* Link partner ability reg    */
-#define MII_EXPANSION       0x06        /* Expansion register          */
-#define MII_CTRL1000        0x09        /* 1000BASE-T control          */
-#define MII_STAT1000        0x0a        /* 1000BASE-T status           */
-#define MII_ESTATUS	    0x0f	/* Extended Status */
-#define MII_DCOUNTER        0x12        /* Disconnect counter          */
-#define MII_FCSCOUNTER      0x13        /* False carrier counter       */
-#define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */
-#define MII_RERRCOUNTER     0x15        /* Receive error counter       */
-#define MII_SREVISION       0x16        /* Silicon revision            */
-#define MII_RESV1           0x17        /* Reserved...                 */
-#define MII_LBRERROR        0x18        /* Lpback, rx, bypass error    */
-#define MII_PHYADDR         0x19        /* PHY address                 */
-#define MII_RESV2           0x1a        /* Reserved...                 */
-#define MII_TPISTATUS       0x1b        /* TPI status for 10mbps       */
-#define MII_NCONFIG         0x1c        /* Network interface config    */
-
-/* Basic mode control register. */
-#define BMCR_RESV               0x003f  /* Unused...                   */
-#define BMCR_SPEED1000		0x0040  /* MSB of Speed (1000)         */
-#define BMCR_CTST               0x0080  /* Collision test              */
-#define BMCR_FULLDPLX           0x0100  /* Full duplex                 */
-#define BMCR_ANRESTART          0x0200  /* Auto negotiation restart    */
-#define BMCR_ISOLATE            0x0400  /* Disconnect DP83840 from MII */
-#define BMCR_PDOWN              0x0800  /* Powerdown the DP83840       */
-#define BMCR_ANENABLE           0x1000  /* Enable auto negotiation     */
-#define BMCR_SPEED100           0x2000  /* Select 100Mbps              */
-#define BMCR_LOOPBACK           0x4000  /* TXD loopback bits           */
-#define BMCR_RESET              0x8000  /* Reset the DP83840           */
-
-/* Basic mode status register. */
-#define BMSR_ERCAP              0x0001  /* Ext-reg capability          */
-#define BMSR_JCD                0x0002  /* Jabber detected             */
-#define BMSR_LSTATUS            0x0004  /* Link status                 */
-#define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */
-#define BMSR_RFAULT             0x0010  /* Remote fault detected       */
-#define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */
-#define BMSR_RESV               0x00c0  /* Unused...                   */
-#define BMSR_ESTATEN		0x0100	/* Extended Status in R15 */
-#define BMSR_100FULL2		0x0200	/* Can do 100BASE-T2 HDX */
-#define BMSR_100HALF2		0x0400	/* Can do 100BASE-T2 FDX */
-#define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
-#define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
-#define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
-#define BMSR_100FULL            0x4000  /* Can do 100mbps, full-duplex */
-#define BMSR_100BASE4           0x8000  /* Can do 100mbps, 4k packets  */
-
-/* Advertisement control register. */
-#define ADVERTISE_SLCT          0x001f  /* Selector bits               */
-#define ADVERTISE_CSMA          0x0001  /* Only selector supported     */
-#define ADVERTISE_10HALF        0x0020  /* Try for 10mbps half-duplex  */
-#define ADVERTISE_1000XFULL     0x0020  /* Try for 1000BASE-X full-duplex */
-#define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */
-#define ADVERTISE_1000XHALF     0x0040  /* Try for 1000BASE-X half-duplex */
-#define ADVERTISE_100HALF       0x0080  /* Try for 100mbps half-duplex */
-#define ADVERTISE_1000XPAUSE    0x0080  /* Try for 1000BASE-X pause    */
-#define ADVERTISE_100FULL       0x0100  /* Try for 100mbps full-duplex */
-#define ADVERTISE_1000XPSE_ASYM 0x0100  /* Try for 1000BASE-X asym pause */
-#define ADVERTISE_100BASE4      0x0200  /* Try for 100mbps 4k packets  */
-#define ADVERTISE_PAUSE_CAP     0x0400  /* Try for pause               */
-#define ADVERTISE_PAUSE_ASYM    0x0800  /* Try for asymetric pause     */
-#define ADVERTISE_RESV          0x1000  /* Unused...                   */
-#define ADVERTISE_RFAULT        0x2000  /* Say we can detect faults    */
-#define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */
-#define ADVERTISE_NPAGE         0x8000  /* Next page bit               */
-
-#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
-			ADVERTISE_CSMA)
-#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
-                       ADVERTISE_100HALF | ADVERTISE_100FULL)
-
-/* Link partner ability register. */
-#define LPA_SLCT                0x001f  /* Same as advertise selector  */
-#define LPA_10HALF              0x0020  /* Can do 10mbps half-duplex   */
-#define LPA_1000XFULL           0x0020  /* Can do 1000BASE-X full-duplex */
-#define LPA_10FULL              0x0040  /* Can do 10mbps full-duplex   */
-#define LPA_1000XHALF           0x0040  /* Can do 1000BASE-X half-duplex */
-#define LPA_100HALF             0x0080  /* Can do 100mbps half-duplex  */
-#define LPA_1000XPAUSE          0x0080  /* Can do 1000BASE-X pause     */
-#define LPA_100FULL             0x0100  /* Can do 100mbps full-duplex  */
-#define LPA_1000XPAUSE_ASYM     0x0100  /* Can do 1000BASE-X pause asym*/
-#define LPA_100BASE4            0x0200  /* Can do 100mbps 4k packets   */
-#define LPA_PAUSE_CAP           0x0400  /* Can pause                   */
-#define LPA_PAUSE_ASYM          0x0800  /* Can pause asymetrically     */
-#define LPA_RESV                0x1000  /* Unused...                   */
-#define LPA_RFAULT              0x2000  /* Link partner faulted        */
-#define LPA_LPACK               0x4000  /* Link partner acked us       */
-#define LPA_NPAGE               0x8000  /* Next page bit               */
-
-#define LPA_DUPLEX		(LPA_10FULL | LPA_100FULL)
-#define LPA_100			(LPA_100FULL | LPA_100HALF | LPA_100BASE4)
-
-/* Expansion register for auto-negotiation. */
-#define EXPANSION_NWAY          0x0001  /* Can do N-way auto-nego      */
-#define EXPANSION_LCWP          0x0002  /* Got new RX page code word   */
-#define EXPANSION_ENABLENPAGE   0x0004  /* This enables npage words    */
-#define EXPANSION_NPCAPABLE     0x0008  /* Link partner supports npage */
-#define EXPANSION_MFAULTS       0x0010  /* Multiple faults detected    */
-#define EXPANSION_RESV          0xffe0  /* Unused...                   */
-
-#define ESTATUS_1000_TFULL	0x2000	/* Can do 1000BT Full */
-#define ESTATUS_1000_THALF	0x1000	/* Can do 1000BT Half */
-
-/* N-way test register. */
-#define NWAYTEST_RESV1          0x00ff  /* Unused...                   */
-#define NWAYTEST_LOOPBACK       0x0100  /* Enable loopback for N-way   */
-#define NWAYTEST_RESV2          0xfe00  /* Unused...                   */
-
-/* 1000BASE-T Control register */
-#define ADVERTISE_1000FULL      0x0200  /* Advertise 1000BASE-T full duplex */
-#define ADVERTISE_1000HALF      0x0100  /* Advertise 1000BASE-T half duplex */
-
-/* 1000BASE-T Status register */
-#define LPA_1000LOCALRXOK       0x2000  /* Link partner local receiver status */
-#define LPA_1000REMRXOK         0x1000  /* Link partner remote receiver status */
-#define LPA_1000FULL            0x0800  /* Link partner 1000BASE-T full duplex */
-#define LPA_1000HALF            0x0400  /* Link partner 1000BASE-T half duplex */
-
-#endif
diff --git a/bsp/evb4020/src/rtconfig.h b/bsp/evb4020/src/rtconfig.h
deleted file mode 100755
index ce5a572f2c..0000000000
--- a/bsp/evb4020/src/rtconfig.h
+++ /dev/null
@@ -1,200 +0,0 @@
-/* RT-Thread config file */
-#ifndef __RTTHREAD_CFG_H__
-#define __RTTHREAD_CFG_H__
-
-/* RT_NAME_MAX*/
-#define RT_NAME_MAX	8
-
-/* RT_ALIGN_SIZE*/
-#define RT_ALIGN_SIZE	4
-
-/* PRIORITY_MAX */
-#define RT_THREAD_PRIORITY_MAX	256
-
-/* Tick per Second */
-#define RT_TICK_PER_SECOND	100
-
-/* SECTION: RT_DEBUG */
-/* Thread Debug */
-#define RT_DEBUG
-/* #define RT_THREAD_DEBUG */
-
-#define RT_USING_OVERFLOW_CHECK
-
-/* Using Hook */
-#define RT_USING_HOOK
-
-/* Using Software Timer */
-#define RT_USING_TIMER_SOFT
-#define RT_TIMER_THREAD_PRIO		8
-#define RT_TIMER_THREAD_STACK_SIZE	512
-#define RT_TIMER_TICK_PER_SECOND	10
-
-/* SECTION: IPC */
-/* Using Semaphore */
-#define RT_USING_SEMAPHORE
-
-/* Using Mutex */
-#define RT_USING_MUTEX
-
-/* Using Event */
-#define RT_USING_EVENT
-
-/* Using MailBox */
-#define RT_USING_MAILBOX
-
-/* Using Message Queue */
-#define RT_USING_MESSAGEQUEUE
-
-/* SECTION: Memory Management */
-/* Using Memory Pool Management*/
-#define RT_USING_MEMPOOL
-
-/* Using Dynamic Heap Management */
-#define RT_USING_HEAP
-
-/* Using Small MM */
-/* #define RT_USING_SMALL_MEM */
-
-/* Using SLAB Allocator */
-#define RT_USING_SLAB
-
-/* SECTION: Device System */
-/* Using Device System */
-#define RT_USING_DEVICE
-
-/* SECTION: Console options */
-/* the buffer size of console */
-#define RT_CONSOLEBUF_SIZE	128
-
-/* SECTION: finsh, a C-Express shell */
-/* Using FinSH as Shell*/
-#define RT_USING_FINSH
-#define FINSH_USING_SYMTAB
-#define FINSH USING DESCRIPTION
-
-/* SECTION: a runtime libc library */
-/* a runtime libc library */
-/* #define RT_USING_NEWLIB */
-
-/* SECTION: a mini libc */
-
-/* SECTION: C++ support */
-/* Using C++ support */
-/* #define RT_USING_CPLUSPLUS */
-
-/* SECTION: Device filesystem support */
-/* using DFS support */
-#define RT_USING_DFS
-#define RT_USING_DFS_ELMFATFS
-/* #define RT_USING_DFS_YAFFS2 */
-
-/* #define DFS_USING_WORKDIR */
-
-/* the max number of mounted filesystem */
-#define DFS_FILESYSTEMS_MAX		2
-/* the max number of opened files 		*/
-#define DFS_FD_MAX					16
-/* the max number of cached sector 		*/
-#define DFS_CACHE_MAX_NUM   		4
-
-/* SECTION: lwip, a lighwight TCP/IP protocol stack */
-/* Using lighweight TCP/IP protocol stack */
-//#define RT_USING_LWIP
-#define RT_LWIP_DNS
-
-/* Trace LwIP protocol */
-/* #define RT_LWIP_DEBUG */
-
-/* Enable ICMP protocol */
-#define RT_LWIP_ICMP
-
-/* Enable IGMP protocol */
-#define RT_LWIP_IGMP
-
-/* Enable UDP protocol */
-#define RT_LWIP_UDP
-
-/* Enable TCP protocol */
-#define RT_LWIP_TCP
-
-/* the number of simulatenously active TCP connections*/
-#define RT_LWIP_TCP_PCB_NUM	5
-
-/* TCP sender buffer space */
-#define RT_LWIP_TCP_SND_BUF	1024*10
-
-/* TCP receive window. */
-#define RT_LWIP_TCP_WND	1024
-
-/* Enable SNMP protocol */
-/* #define RT_LWIP_SNMP */
-
-/* Using DHCP */
-/* #define RT_LWIP_DHCP */
-
-#define RT_LWIP_DNS
-
-/* ip address of target */
-#define RT_LWIP_IPADDR0	192
-#define RT_LWIP_IPADDR1	168
-#define RT_LWIP_IPADDR2	1
-#define RT_LWIP_IPADDR3	30
-
-/* gateway address of target */
-#define RT_LWIP_GWADDR0	192
-#define RT_LWIP_GWADDR1	168
-#define RT_LWIP_GWADDR2	1
-#define RT_LWIP_GWADDR3	1
-
-/* mask address of target */
-#define RT_LWIP_MSKADDR0	255
-#define RT_LWIP_MSKADDR1	255
-#define RT_LWIP_MSKADDR2	255
-#define RT_LWIP_MSKADDR3	0
-
-/* the number of blocks for pbuf */
-#define RT_LWIP_PBUF_NUM	16
-
-/* thread priority of tcpip thread */
-#define RT_LWIP_TCPTHREAD_PRIORITY	128
-
-/* mail box size of tcpip thread to wait for */
-#define RT_LWIP_TCPTHREAD_MBOX_SIZE	8
-
-/* thread stack size of tcpip thread */
-#define RT_LWIP_TCPTHREAD_STACKSIZE	4096
-
-/* thread priority of ethnetif thread */
-#define RT_LWIP_ETHTHREAD_PRIORITY	144
-
-/* mail box size of ethnetif thread to wait for */
-#define RT_LWIP_ETHTHREAD_MBOX_SIZE	32
-
-/* thread stack size of ethnetif thread */
-#define RT_LWIP_ETHTHREAD_STACKSIZE	1024
-
-/* SECTION: RTGUI support */
-/* using RTGUI support */
-#define RT_USING_RTGUI
-
-/* name length of RTGUI object */
-#define RTGUI_NAME_MAX		16
-/* support 16 weight font */
-#define RTGUI_USING_FONT16
-/* support 16 weight font */
-#define RTGUI_USING_FONT12
-/* support Chinese font */
-#define RTGUI_USING_FONTHZ
-/* use DFS as file interface */
-#define RTGUI_USING_DFS_FILERW
-/* use font file as Chinese font */
-/* #define RTGUI_USING_HZ_FILE */
-/* use Chinese bitmap font */
-#define RTGUI_USING_HZ_BMP
-/* use small size in RTGUI */
-/* #define RTGUI_USING_SMALL_SIZE */
-/* use mouse cursor */
-/* #define RTGUI_USING_MOUSE_CURSOR */
-
-#endif
diff --git a/bsp/evb4020/src/sdcard.c b/bsp/evb4020/src/sdcard.c
deleted file mode 100755
index b2b4b17bd5..0000000000
--- a/bsp/evb4020/src/sdcard.c
+++ /dev/null
@@ -1,790 +0,0 @@
-/*
- * File      : sdcard.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, 2007, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author      Notes
- * 2007-12-02     Yi.Qiu      the first version
- * 2010-01-01     Bernard     Modify for mini2440
- * 2010-10-13     Wangmeng    Added sep4020 support
- */
-
-#include "sdcard.h"
-#include <dfs_config.h>
-
-volatile rt_int32_t RCA;
-
-#ifdef RT_USING_DFS
-
-/* RT-Thread Device Driver Interface */
-#include <rtthread.h>						  
-#include <dfs_fs.h>
-
-/*GLOBAL SD DEVICE PONITER*/
-static struct sd_device *ptr_sddev;
-static rt_uint8_t gsec_buf[SECTOR_SIZE];
-
-#define USE_TIMEOUT
-
-/*This file is to power on/off the SEP4020 SDC*/
-/**
- * This function will power on/off the SEP4020 SDC
- *
- * @param sd_ctl: 0/power on; 1/power off
- * @return none
- *
- */
-static void sd_pwr(int sd_ctl)
-{
-	if (sd_ctl)
-	{
-	    *(RP)GPIO_PORTA_SEL  |= 0x0200;
-	    *(RP)GPIO_PORTA_DIR  &= (~0x0200);
-	    *(RP)GPIO_PORTA_DATA |= 0x0200;
-	}
-	else
-	{
-	     
-	   *(RP)GPIO_PORTA_SEL |= 0x0200;
-	   *(RP)GPIO_PORTA_DIR &= (~0x0200);
-	   *(RP)GPIO_PORTA_DATA &= (~0x0200);     
-	}
-}
-
-/*a nop operation to delay*/
-static void delay (U32 j)
-{ 
-  U32 i;
-  
-  for (i=0;i<j;i++)
-  {};
-
-}
-/*
-* Send the command to set the data transfer mode
-* @param cmd:the command to sent
-* @param arg:the argument of the command
-* @param mode:SDC transfer mode
-* @param blk_len:the block size of each data
-* @param num:number of blocks
-* @param mask:sdc interrupt mask
-*/
-static rt_err_t cmd_data(U16 cmd,U32 arg,U16 mode,U16 blk_len,U16 num,U16 mask)
-{
-    U32 i;
-	#ifdef USE_TIMEOUT
-	U32 to = 10000;
-	#endif
-    
-    *(RP)SDC_CLOCK_CONTROL = 0Xff00;                  //����SDʱ�ӣ�512��Ƶ,�ر�SD ʱ��
-    *(RP)SDC_CLOCK_CONTROL = 0Xff04;                  //��SDʱ�ӣ�512��Ƶ,����SD ʱ��
-    *(RP)SDC_INTERRUPT_STATUS_MASK = mask;         //�ж�״̬���μĴ�����ֵ
-    
-    *(RP)SDC_TRANSFER_MODE = mode;               //����ģʽѡ��Ĵ�����ֵ
-    
-    *(RP)SDC_BLOCK_SIZE = blk_len;                     //���ݿ鳤�ȼĴ�����ֵ
-    *(RP)SDC_BLOCK_COUNT = num;                       //���ݿ���Ŀ�Ĵ�����ֵ
-    *(RP)SDC_ARGUMENT = arg;                          //��������Ĵ�����ֵ
-    *(RP)SDC_COMMAND = cmd;                           //������ƼĴ�����ֵ
-    
-    delay(10);                                  
-   
-    i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
-	
-    while(i != 0x1000)                             //�жϣ��Ƿ��������ϣ������յ���Ӧ
-    {
-	   i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
-	   #ifdef USE_TIMEOUT
-	   to --;
-	   if(!to)
-	   {
-	   		EOUT("%s TIMEOUT\n",__FUNCTION__);
-			return RT_ETIMEOUT;
-	   }
-	   #endif
-    }
-    delay(160);
-
-	#ifdef USE_TIMEOUT
-	//DBOUT("cmd_data TO is %d\n",to);
-	#endif
-
-    return *(RP)SDC_RESPONSE0;                     //�����������Ϣ
-}
-
-static rt_err_t cmd_response(U16 Cmd,U32 Arg,U16 TransMode,U16 BlkLen,U16 Nob,U16 IntMask)
-{
-   U32 i;
-   #ifdef USE_TIMEOUT
-   U32 to = 50000;
-   #endif
-    
-   *(RP)SDC_CLOCK_CONTROL=0Xff00;               //����SDʱ��
-   
-   *(RP)SDC_CLOCK_CONTROL=0Xff04;               //��SDʱ��		
-    
-    
-    *(RP)SDC_INTERRUPT_STATUS_MASK=IntMask;     //�ж�״̬���μĴ�����ֵ
-    *(RP)SDC_TRANSFER_MODE=TransMode;           //����ģʽѡ��Ĵ�����ֵ
-    *(RP)SDC_BLOCK_SIZE=BlkLen;                 //���ݿ鳤�ȼĴ�����ֵ
-    *(RP)SDC_BLOCK_COUNT=Nob;                   //���ݿ���Ŀ�Ĵ�����ֵ
-    *(RP)SDC_ARGUMENT=Arg;                      //��������Ĵ�����ֵ
-    *(RP)SDC_COMMAND=Cmd;                       //������ƼĴ�����ֵ
-    
-    delay(10);    
-        
-    i = *(RP)SDC_INTERRUPT_STATUS & 0x1040;
-	
-    while(i != 0x1040)                         //�жϣ��������ϣ������յ���Ӧ�����ݴ�����ϡ��������Ƿ��Ѿ�����ɡ�
-    {
-		i = *(RP)SDC_INTERRUPT_STATUS & 0x1040;
-		#ifdef USE_TIMEOUT
-		to--;
-		if(!to)
-		{
-			EOUT("%s Timeout\n",__FUNCTION__);
-			return RT_ETIMEOUT;
-		}
-		#endif
-    }
-    
-	//DBOUT("cmd_response TO is %d\n",to);
-    delay(100);
-    
-    return RT_EOK;                  //�����������Ϣ
-}
-static rt_err_t cmd_wait(U16 Cmd,U32 Arg,U16 IntMask )
-{
-    int i;
-	#ifdef USE_TIMEOUT
-	U32 to=200000;
-	#endif
-
-    *(RP)SDC_CLOCK_CONTROL=0Xff00;                       //����SDʱ��
-    
-    *(RP)SDC_CLOCK_CONTROL=0Xff04;                       //��SDʱ��
-       
-    *(RP)SDC_COMMAND=Cmd;                                //������ƼĴ�����ֵ    
-                    
-    *(RP)SDC_INTERRUPT_STATUS_MASK=IntMask;              //�ж�״̬���μĴ�����ֵ
-    
-    *(RP)SDC_ARGUMENT=Arg;                               //��������Ĵ�����ֵ
-	
-    i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
-	
-    while(i != 0x1000)                                  //�жϣ��Ƿ��������ϣ������յ���Ӧ
-    {
-		i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
-		#ifdef USE_TIMEOUT
-		to--;
-		if(!to)
-		{
-			EOUT("%s Timeout\n",__FUNCTION__);
-			return RT_ETIMEOUT;
-		}
-		#endif
-
-    }
-
-	//DBOUT("cmd_wait TO is %d\n",to);    
-
-    delay(10);
-        	                	             
-    return RT_EOK;                           //�����������Ϣ�Լ���ֵ1
-}
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t sd_init(void)
-{
-	rt_err_t err;
-	#ifdef USE_TIMEOUT
-	rt_uint32_t to=1000;
-	#endif
-	sd_pwr(1);
-    
-    *(RP)SDC_SOFTWARE_RESET=0x0;                   //��������λ,����д0�ǽ���reset    
-    delay(200);
-    *(RP)SDC_SOFTWARE_RESET=0x1;                   //����������λ    
-    delay(200);
- 
-    cmd_wait(0x08,0x0,0xfff);               //CMD0�������ʹ��
-       
-	do
-    {
-    	err = cmd_wait(0x6ea,0x0,0xfff);          //CMD55,�����ACMD����
-
-		#ifdef USE_TIMEOUT
-		if(err != RT_EOK)
-		{	
-			EOUT("cmd_wait err in %s\n",__FUNCTION__);
-			return RT_ETIMEOUT;
-		}
-		#endif
-    	
-    	delay(3);  
-    	err = cmd_wait(0x52a,0x80ff8000,0xfff);   //ACMD41����SD��������������ȴ�SD������ȷ���յ�����
-		if(err != RT_EOK)
-		{	
-			EOUT("cmd_wait err in %s\n",__FUNCTION__);
-			return RT_ETIMEOUT;
-		}
-		#ifdef USE_TIMEOUT
-		to--;
-		if(!to)
-		{
-			EOUT("%s timeout\n",__FUNCTION__);
-			return RT_ETIMEOUT;
-		}
-		#endif
-       
-    }while(*(RP)SDC_RESPONSE0<0X80008000);
-
-	#ifdef USE_TIMEOUT
-    //DBOUT("%s TO is %d\n",__FUNCTION__,to);
-	#endif
-
-    cmd_data(0x49,0X0,0X0,0x0,0x0,0Xfff);//CMD2������CID    
-    cmd_data(0x6a,0X0,0X0,0x0,0x0,0Xfff);//CMD3��ѯ�ʿ�Ƭ�����µ���ص�ַ    
-    RCA = *(RP)SDC_RESPONSE0;    
-    cmd_data(0xea,RCA,0X0,0x0,0x0,0Xfff);//CMD7������ѡ���Ե���ز���
-
-	return RT_EOK;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t sd_readblock(rt_uint32_t address, rt_uint8_t* buf)
-{
-	U32 complete,i;
-	rt_uint8_t temp;
-	rt_err_t err;
-	UNUSED rt_uint32_t discard;
-	#ifdef USE_TIMEOUT
-	rt_uint32_t to = 10;
-	#endif
-
-
-	//rt_kprintf("in readblock:%x\n",address);
-	//Clear all the errors & interrups
-	*(RP)DMAC_INTINTERRCLR  |= 0x1;
-	*(RP)DMAC_INTINTERRCLR	&= ~0x1;
-	*(RP)DMAC_INTTCCLEAR	|= 0x1;
-	*(RP)DMAC_INTTCCLEAR	&= ~0x1; 
-
-	/*Clear read fifo*/
-	*(RP)(SDC_INTERRUPT_STATUS_MASK) = ~(0x1<<9); //don't mask fifo empty
-	while((*(RP)SDC_INTERRUPT_STATUS)&0x200 != 0x200)
-		discard = *(RP)SDC_READ_BUFER_ACCESS;
-
-	/*DMAC2,word,size=0x80*/
-    *(RP)DMAC_C2SRCADDR  = SDC_READ_BUFER_ACCESS;           
-    *(RP)DMAC_C2DESTADDR = (rt_uint32_t)buf;                
-    *(RP)DMAC_C2CONTROL  =0x20249b;                        
-    *(RP)DMAC_C2CONFIGURATION = 0x38d;                      	
-
-    err = cmd_wait(0x6ea,RCA,0xfff);                       
-	if(err != RT_EOK)
-	{
-		rt_set_errno(err);
-		return err;
-	}
-
-    err = cmd_wait(0xca,0x2,0xfff);
-	if(err != RT_EOK)
-	{
-		rt_set_errno(err);
-		return err;
-	}                       
-   						
-    err = cmd_response(0x22e,address,0X1,0x0200,0x1,0Xfff); //CMD17 4bit mode
-	if(err != RT_EOK)
-	{
-		rt_set_errno(err);
-		return err;
-	}
-    
-    complete = *(RP)SDC_INTERRUPT_STATUS;
-    
-	/*CRC*/
-    if((complete |0xfffffffd) !=0xfffffffd)              
-    {
-     	rt_kprintf("CRC ERROR!!!\n");
-      	complete = *(RP)SDC_INTERRUPT_STATUS;
-    }
-	while(((*(RP)( DMAC_INTTCSTATUS)) & 0x4) != 0x4 )
-	{
-		delay(10);
-		#ifdef USE_TIMEOUT
-		to--;
-		if(!to)
-		{
-			EOUT("%s TIMEOUT\n",__FUNCTION__);
-			return RT_ETIMEOUT;
-		}
-		#endif
-	}
-	#ifdef USE_TIMEOUT
-	//DBOUT("%s timeout is %d\n",__FUNCTION__,to);
-	#endif
-	/*for the buf is big-endian we must reverse it*/
-	for(i = 0;i<0x80;i++)
-	{
-		temp = buf[0];
-		buf[0] = buf[3];
-		buf[3] = temp;
-
-		temp = buf[1];
-		buf[1] = buf[2];
-		buf[2] = temp;
-
-		buf += 4;
-	}  
-
-	return RT_EOK;
-}
-
-static rt_uint8_t sd_readmultiblock(rt_uint32_t address, rt_uint8_t* buf,rt_uint32_t size)
-{
-	rt_int32_t index;
-	rt_uint8_t status=RT_EOK;
-	
-	for(index = 0;index < size;index++)
-	{
-		status = sd_readblock(address+index*SECTOR_SIZE,buf+index*SECTOR_SIZE);
-		if(status!=RT_EOK)
-			break;	
-	}
-	return status;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_uint8_t sd_writeblock(rt_uint32_t address, rt_uint8_t* buf)
-{
-	U32 complete;
-	rt_uint8_t temp;
-	rt_uint8_t *ptr = buf;
-	rt_err_t err;
-	#ifdef USE_TIMEOUT
-	rt_uint32_t to = 10;
-	#endif
-
-	int i;
-
-	rt_kprintf("in writeblock:%x\n",address);
-
-	/*for the buf is big-endian we must reverse it*/
-	for(i = 0;i<0x80;i++)
-	{
-		temp = ptr[0];
-		ptr[0] = ptr[3];
-		ptr[3] = temp;
-
-		temp = ptr[1];
-		ptr[1] = ptr[2];
-		ptr[2] = temp;
-
-		ptr += 4;
-	} 
-	//Clear all the errors & interrups
-	*(RP)DMAC_INTINTERRCLR  |= 0x1;
-	*(RP)DMAC_INTINTERRCLR	&= ~0x1;
-	*(RP)DMAC_INTTCCLEAR	|= 0x1;
-	*(RP)DMAC_INTTCCLEAR	&= ~0x1; 
-
-    //***********************����DMA2������λд*************************
-    *(RP)DMAC_C2SRCADDR  = (U32)buf;                  //DMAC��2Դ��ַ��Ϊ0x30200000
-    *(RP)DMAC_C2DESTADDR = SDC_WRITE_BUFER_ACCESS;           //DMAC��2Ŀ�ĵ�ַ��Ϊ����FIFO�ĵ�ַ
-    *(RP)DMAC_C2CONTROL  = 0x20149b;                         //����ߴ�0x080,Դ��ַ����Ŀ�ĵ�ַ�����ӣ��������32bit���������Ŀ4                                                  				
-    *(RP)DMAC_C2CONFIGURATION = 0x380b;	                     //�����δ����жϣ����δ����жϣ�ͨ��ʹ�ܣ��������ͣ��洢��������							       				 	    
-    
-    
-    err = cmd_wait(0x6ea,RCA,0xfff);                        //CMD55�������ACMD����
-	if(err != RT_EOK)
-	{
-		rt_set_errno(err);
-		return err;
-	}
-
-    err = cmd_wait(0xca,0x2,0xfff);                         //ACMD6�����������߿��ȣ�48 λ�̷����������ݴ���
-    if(err != RT_EOK)
-	{
-		rt_set_errno(err);
-		return err;
-	}
-  
-    err = cmd_response(0x30e,address,0X3,0x0200,0x1,0Xfff);  //CMD24  1bit mode
-    if(err != RT_EOK)
-	{
-		rt_set_errno(err);
-		return err;
-	}
- 
-    complete = *(RP)SDC_INTERRUPT_STATUS;
-    
-    if((complete |0xfffffffe) !=0xfffffffe)               //��Ӧ��ʱ����
-    {
-      //printf("CRC ERROR");
-      complete = *(RP)SDC_INTERRUPT_STATUS;
-    } 
-	
-	while(((*(RP)( DMAC_INTTCSTATUS)) & 0x4) != 0x4 )
-	{
-		delay(10);
-		#ifdef USE_TIMEOUT
-		to--;
-		if(!to)
-		{
-			EOUT("%s TIMEOUT\n",__FUNCTION__);
-		}
-		#endif
-	}
-	#ifdef USE_TIMEOUT
-	//DBOUT("%s timeout is %d\n",__FUNCTION__,to);
-	#endif
-
-	return RT_EOK;
-}
-
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t rt_sdcard_init(rt_device_t dev)
-{
-	return 0;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag)
-{
-	return 0;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t rt_sdcard_close(rt_device_t dev)
-{
-	return 0;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t rt_sdcard_control(rt_device_t dev, rt_uint8_t cmd, void *args)
-{
-	rt_kprintf("cmd = %d\n",cmd);
-	    RT_ASSERT(dev != RT_NULL);
-
-    if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME)
-    {
-        struct rt_device_blk_geometry *geometry;
-
-        geometry = (struct rt_device_blk_geometry *)args;
-        if (geometry == RT_NULL) return -RT_ERROR;
-
-        geometry->bytes_per_sector = 512;
-        geometry->block_size = 0x200000;
-		//if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
-		//	geometry->sector_count = (SDCardInfo.SD_csd.DeviceSize + 1)  * 1024;
-		//else
-        	geometry->sector_count = 0x200000;//SDCardInfo.CardCapacity/SDCardInfo.CardBlockSize;
-    }
-
-    return RT_EOK;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
-{
-	rt_uint32_t retry = 3;
-	rt_uint8_t	status;
-	rt_uint32_t index;
-
-	///*take the semaphore
-	struct dfs_partition *part = (struct dfs_partition *)dev->private;
-	rt_sem_take(part->lock, RT_WAITING_FOREVER);
-    while(retry--)
-    {
-		if (((rt_uint32_t)buffer % 4 != 0) ||
-        ((rt_uint32_t)buffer > 0x20080000))
-		{
-			for(index = 0;index < size;index++)
-			{
-				status = sd_readblock((part->offset + pos) * SECTOR_SIZE,ptr_sddev->sec_buf);
-				if(status != RT_EOK)
-					break;
-	
-				rt_memcpy((rt_uint8_t *)buffer + (index * SECTOR_SIZE),ptr_sddev->sec_buf,SECTOR_SIZE);
-			}
-		}
-		else
-		{
-			 for(index = 0;index<size;index++)
-			 {
-			 	status = sd_readblock((pos) * SECTOR_SIZE,(rt_uint8_t*)buffer + index * SECTOR_SIZE);
-				if(status != RT_EOK)
-					break;
-			 }
-		}
-
-    } 
-	rt_sem_release(part->lock);
-
-	if (status == RT_EOK) 
-		return size;
-
-	rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer);
-	return 0;  
-
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
-{
-	int i;
-	rt_uint8_t status;
-
-	struct dfs_partition *part = (struct dfs_partition *)dev->private;
-
-	if ( dev == RT_NULL )
-	{
-		rt_set_errno(-DFS_STATUS_EINVAL);
-		return 0;
-	}
-
-	rt_sem_take(part->lock, RT_WAITING_FOREVER);
-
-    if (((rt_uint32_t)buffer % 4 != 0) ||
-        ((rt_uint32_t)buffer > 0x20080000))
-	{
-		rt_uint32_t index;
-
-		for(index=0;index<size;index++)
-		{
-			 rt_memcpy(ptr_sddev->sec_buf, ((rt_uint8_t*)buffer + index * SECTOR_SIZE), SECTOR_SIZE);
-			 status = sd_writeblock((part->offset + index + pos)*SECTOR_SIZE,ptr_sddev->sec_buf);
-		}
-	}
-	else
-	{  
-
-		for(i=0;i<size;i++)
-		{
-			status = sd_writeblock((part->offset + i + pos)*SECTOR_SIZE,
-				(rt_uint8_t*)((rt_uint8_t*)buffer + i * SECTOR_SIZE));	
-			if (status != RT_EOK) break;
-		}
-	}
-
-	rt_sem_release(part->lock);
-
-	if (status == RT_EOK) 
-		return size;
-
-	rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer);
-	return 0;
-}
-
-
-rt_err_t rt_hw_sdcard_exit()
-{
-	if(ptr_sddev->device != RT_NULL)
-		rt_free(ptr_sddev->device);
-	if(ptr_sddev->part != RT_NULL)
-		rt_free(ptr_sddev->part);
-	if(ptr_sddev != RT_NULL)
-		rt_free(ptr_sddev);
-
-	return RT_EOK;
-}
-
-/**
- * This function will init sd card
- *
- * @param void
- */
-rt_err_t rt_hw_sdcard_init()
-{
-	/*For test*/
-	rt_err_t err;
-	rt_int32_t i;
-
-	char dname[4];
-	char sname[8];
-
-	/*Initialize structure*/
-
-	ptr_sddev = (struct sd_device*)rt_malloc(sizeof(struct sd_device));
-	if(ptr_sddev == RT_NULL)
-	{
-		EOUT("Failed to allocate sdcard device structure\n");
-		return RT_ENOMEM;		 	
-	}
-
-	/*sdcard intialize*/
-	err = sd_init();
-	if(err != RT_EOK)
-	 	goto FAIL2;
-
-	/*set sector buffer*/
-	ptr_sddev->sec_buf = gsec_buf;
-	ptr_sddev->buf_size = SECTOR_SIZE;
-	ptr_sddev->sdc = (struct sd_c*)SD_BASE;
-
-	//DBOUT("allocate partition sector buffer OK!");
-
-	err = sd_readblock(0,ptr_sddev->sec_buf);
-	if(err != RT_EOK)
-	{
-		EOUT("read first block error\n");
-		goto FAIL2;
-	}
-
-	/*sdcard driver initialize*/
-	ptr_sddev->part = (struct dfs_partition*)rt_malloc(4 * sizeof(struct dfs_partition));
-	if(ptr_sddev->part == RT_NULL)
-	{
-		 EOUT("allocate partition failed\n");
-		 err = 	RT_ENOMEM;
-		 goto FAIL2;
-	}
-
-	/*alloc device buffer*/
-	ptr_sddev->device = (struct rt_device*)rt_malloc(4 * sizeof(struct rt_device));
-	if(ptr_sddev->device == RT_NULL)
-	{
-		 EOUT("allocate device failed\n");
-		 err = RT_ENOMEM;
-		 goto FAIL1;
-	}
-
-	ptr_sddev->part_num = 0;
-
-	err = sd_readblock(0,ptr_sddev->sec_buf);
-
-	if(err != RT_EOK)
-	{
-		EOUT("Read block 0 to initialize ERROR\n");
-		goto FAIL1;
-	}
-
-	for(i=0; i<4; i++)
-	{
-		/* get the first partition */
-		err = dfs_filesystem_get_partition(&(ptr_sddev->part[i]), ptr_sddev->sec_buf, i);
-		if (err == RT_EOK)
-		{
-			rt_snprintf(dname, 4, "sd%d",  i);
-			rt_snprintf(sname, 8, "sem_sd%d",  i);
-			ptr_sddev->part[i].lock = rt_sem_create(sname, 1, RT_IPC_FLAG_FIFO);
-
-			/* register sdcard device */
-			ptr_sddev->device[i].init = rt_sdcard_init;
-			ptr_sddev->device[i].open = rt_sdcard_open;
-			ptr_sddev->device[i].close = rt_sdcard_close;
-			ptr_sddev->device[i].read = rt_sdcard_read;
-			ptr_sddev->device[i].write = rt_sdcard_write;
-			ptr_sddev->device[i].control = rt_sdcard_control;
-			ptr_sddev->device[i].private= &ptr_sddev->part[i];
-
-			err = rt_device_register(&ptr_sddev->device[i], dname,
-				RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
-
-			if(err == RT_EOK)
-				ptr_sddev->part_num++;
-		}
-		else
-		{
-			if(i == 0)
-			{
-				/* there is no partition table */
-				ptr_sddev->part[0].offset = 0;
-				ptr_sddev->part[0].size   = 0;
-				ptr_sddev->part[0].lock = rt_sem_create("sem_sd0", 1, RT_IPC_FLAG_FIFO);
-
-				/* register sdcard device */
-				ptr_sddev->device[0].init = rt_sdcard_init;
-				ptr_sddev->device[0].open = rt_sdcard_open;
-				ptr_sddev->device[0].close = rt_sdcard_close;
-				ptr_sddev->device[0].read = rt_sdcard_read;
-				ptr_sddev->device[0].write = rt_sdcard_write;
-				ptr_sddev->device[0].control = rt_sdcard_control;
-				ptr_sddev->device[0].private= &ptr_sddev->part[0];
-
-				err = rt_device_register(&ptr_sddev->device[0], "sd0",
-					RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
-
-				if(err == RT_EOK)
-					ptr_sddev->part_num++;
-
-				break;
-			}
-		}
-	}
-
-	if(ptr_sddev->part_num == 0)
-		goto FAIL0;
-	
-	return err;
-
-	FAIL0:
-	rt_free(ptr_sddev->device);
-	ptr_sddev->device = RT_NULL;
-
-	FAIL1:
-	rt_free(ptr_sddev->part);
-	ptr_sddev->part = RT_NULL;
-
-	FAIL2:
-	rt_free(ptr_sddev);
-	ptr_sddev = RT_NULL;
-
-	return err;
-
-
-}
-
-#endif
diff --git a/bsp/evb4020/src/sdcard.h b/bsp/evb4020/src/sdcard.h
deleted file mode 100755
index f4b1ba10aa..0000000000
--- a/bsp/evb4020/src/sdcard.h
+++ /dev/null
@@ -1,51 +0,0 @@
-
-#ifndef __SDCARD_H
-#define __SDCARD_H
-
-#include <rtthread.h>
-
-#ifdef RT_USING_DFS
- 
-#include  <sep4020.h>
-
-#define INICLK	300000
-#define SDCLK	24000000	//PCLK=49.392MHz
-#define MMCCLK	15000000	//PCLK=49.392MHz
-
-/*struct of the SDC*/
-struct 	sd_c
-{
- 	__IO rt_uint32_t	clk_ctl;  		 
- 	__IO rt_uint32_t	soft_rst;
-	__IO rt_uint32_t	arg;
-	__IO rt_uint32_t	cmd;
-	__IO rt_uint32_t	blk_sz;
-	__IO rt_uint32_t	blk_cnt;
-	__IO rt_uint32_t	trans_mode;
-	__O  rt_uint32_t	response0;
-	__O  rt_uint32_t	response1;
-	__O  rt_uint32_t	response2;
-	__O  rt_uint32_t	response3;
-	__IO rt_uint32_t	rd_to_ctl;
-	__IO rt_uint32_t	int_stat;
-	__IO rt_uint32_t	int_stat_mask;
-	__O  rt_uint32_t	rx_fifo;
-	__I  rt_uint32_t	tx_fifo;                
-};
-
-/*sdcard driver structure*/
-struct	sd_device
-{
-	struct rt_device		*device; 	/*rt_device*/
-	struct sd_c			*sdc;	 	/*SDCARD register*/
-	struct dfs_partition	*part;		/*dfs partitions*/
-	rt_uint8_t		*sec_buf;	/*sdcard buffer*/
-	rt_uint32_t		part_num;	/*partiont numbers*/
-	rt_uint32_t		buf_size;	/*buffer size*/
-};
-
-
-
-#endif
-#endif
-
diff --git a/bsp/evb4020/src/sep4020.h b/bsp/evb4020/src/sep4020.h
deleted file mode 100755
index b4590c2ef0..0000000000
--- a/bsp/evb4020/src/sep4020.h
+++ /dev/null
@@ -1,867 +0,0 @@
-#ifndef __SEP4020_H
-#define __SEP4020_H
-
-#include <rtthread.h>
-
-/*Core definations*/
-#define SVCMODE
-#define	Mode_USR	0x10
-#define	Mode_FIQ	0x11
-#define	Mode_IRQ	0x12
-#define	Mode_SVC	0x13
-#define	Mode_ABT	0x17
-#define	Mode_UND	0x1B
-#define	Mode_SYS	0x1F
-
-
-
-/*
- *  ��ģ��Ĵ�����ֵ
- */
-
-#define   ESRAM_BASE    0x04000000
-#define   INTC_BASE     0x10000000
-#define   PMU_BASE      0x10001000
-#define   RTC_BASE      0x10002000
-#define   WD_BASE       0x10002000
-#define   TIMER_BASE    0x10003000
-#define   PWM_BASE      0x10004000
-#define   UART0_BASE    0X10005000
-#define   UART1_BASE    0X10006000
-#define   UART2_BASE    0X10007000
-#define   UART3_BASE    0X10008000
-#define   SSI_BASE      0X10009000
-#define   I2S_BASE      0x1000A000
-#define   MMC_BASE      0x1000B000
-#define   SD_BASE       0x1000B000
-#define   SMC0_BASE     0x1000C000
-#define   SMC1_BASE     0x1000D000
-#define   USBD_BASE     0x1000E000
-#define   GPIO_BASE     0x1000F000
-#define   EMI_BASE      0x11000000
-#define   DMAC_BASE     0x11001000
-#define   LCDC_BASE     0x11002000
-#define   MAC_BASE      0x11003000
-#define   AMBA_BASE     0x11005000
-
-
-/*
- *  INTCģ��
- *  ��ַ: 0x10000000
- */
-
-#define INTC_IER                  (INTC_BASE+0X000)       /* IRQ�ж������Ĵ��� */
-#define INTC_IMR                  (INTC_BASE+0X008)       /* IRQ�ж����μĴ��� */
-#define INTC_IFR                  (INTC_BASE+0X010)       /* IRQ����ǿ���жϼĴ��� */
-#define INTC_IRSR                 (INTC_BASE+0X018)       /* IRQδ�����ж�״̬�Ĵ��� */
-#define INTC_ISR                  (INTC_BASE+0X020)       /* IRQ�ж�״̬�Ĵ��� */
-#define INTC_IMSR                 (INTC_BASE+0X028)       /* IRQ�����ж�״̬�Ĵ��� */
-#define INTC_IFSR                 (INTC_BASE+0X030)       /* IRQ�ж�����״̬�Ĵ��� */
-#define INTC_FIER                 (INTC_BASE+0X0C0)       /* FIQ�ж������Ĵ��� */
-#define INTC_FIMR                 (INTC_BASE+0X0C4)       /* FIQ�ж����μĴ��� */
-#define INTC_FIFR                 (INTC_BASE+0X0C8)       /* FIQ����ǿ���жϼĴ��� */
-#define INTC_FIRSR                (INTC_BASE+0X0CC)       /* FIQδ�����ж�״̬�Ĵ��� */
-#define INTC_FISR                 (INTC_BASE+0X0D0)       /* FIQ�ж�״̬�Ĵ��� */
-#define INTC_FIFSR                (INTC_BASE+0X0D4)       /* FIQ�ж�����״̬�Ĵ��� */
-#define INTC_IPLR                 (INTC_BASE+0X0D8)       /* IRQ�ж����ȼ��Ĵ��� */
-#define INTC_ICR1                 (INTC_BASE+0X0DC)       /* IRQ�ڲ��ж����ȼ����ƼĴ���1 */
-#define INTC_ICR2                 (INTC_BASE+0X0E0)       /* IRQ�ڲ��ж����ȼ����ƼĴ���2 */
-#define INTC_EXICR1               (INTC_BASE+0X0E4)       /* IRQ�ⲿ�ж����ȼ����ƼĴ���1 */
-#define INTC_EXICR2               (INTC_BASE+0X0E8)       /* IRQ�ⲿ�ж����ȼ����ƼĴ���2 */
-
-
-/*
- *  PMUģ��
- *  ��ַ: 0x10001000
- */
-
-#define PMU_PLTR                  (PMU_BASE+0X000)        /* PLL���ȶ�����ʱ�� */
-#define PMU_PMCR                  (PMU_BASE+0X004)        /* ϵͳ��ʱ��PLL�Ŀ��ƼĴ��� */
-#define PMU_PUCR                  (PMU_BASE+0X008)        /* USBʱ��PLL�Ŀ��ƼĴ��� */
-#define PMU_PCSR                  (PMU_BASE+0X00C)        /* �ڲ�ģ��ʱ��Դ�����Ŀ��ƼĴ��� */
-#define PMU_PDSLOW                (PMU_BASE+0X010)        /* SLOW״̬��ʱ�ӵķ�Ƶ���� */
-#define PMU_PMDR                  (PMU_BASE+0X014)        /* оƬ����ģʽ�Ĵ��� */
-#define PMU_RCTR                  (PMU_BASE+0X018)        /* Reset���ƼĴ��� */
-#define PMU_CLRWAKUP              (PMU_BASE+0X01C)        /* WakeUp����Ĵ��� */
-
-
-/*
- *  RTCģ��
- *  ��ַ: 0x10002000
- */
-
-#define RTC_STA_YMD               (RTC_BASE+0X000)        /* ��, ��, �ռ����Ĵ��� */
-#define RTC_STA_HMS               (RTC_BASE+0X004)        /* Сʱ, ����, ��Ĵ��� */
-#define RTC_ALARM_ALL             (RTC_BASE+0X008)        /* ��ʱ��, ��, ʱ, �ּĴ��� */
-#define RTC_CTR                   (RTC_BASE+0X00C)        /* ���ƼĴ��� */
-#define RTC_INT_EN                (RTC_BASE+0X010)        /* �ж�ʹ�ܼĴ��� */
-#define RTC_INT_STS               (RTC_BASE+0X014)        /* �ж�״̬�Ĵ��� */
-#define RTC_SAMP                  (RTC_BASE+0X018)        /* �������ڼĴ��� */
-#define RTC_WD_CNT                (RTC_BASE+0X01C)        /* Watch-Dog����ֵ�Ĵ��� */
-#define RTC_WD_SEV                (RTC_BASE+0X020)        /* Watch-Dog����Ĵ��� */ 
-#define RTC_CONFIG_CHECK          (RTC_BASE+0X024)        /* ����ʱ��ȷ�ϼĴ��� (������ʱ��֮ǰ��д0xaaaaaaaa) */
-#define RTC_KEY0                  (RTC_BASE+0X02C)        /* ��Կ�Ĵ��� */
-
-/*
- *  TIMERģ��
- *  ��ַ: 0x10003000
- */
-
-#define TIMER_T1LCR               (TIMER_BASE+0X000)      /* ͨ��1���ؼ����Ĵ��� */
-#define TIMER_T1CCR               (TIMER_BASE+0X004)      /* ͨ��1��ǰ����ֵ�Ĵ��� */
-#define TIMER_T1CR                (TIMER_BASE+0X008)      /* ͨ��1���ƼĴ��� */
-#define TIMER_T1ISCR              (TIMER_BASE+0X00C)      /* ͨ��1�ж�״̬����Ĵ��� */
-#define TIMER_T1IMSR              (TIMER_BASE+0X010)      /* ͨ��1�ж�����״̬�Ĵ��� */
-#define TIMER_T2LCR               (TIMER_BASE+0X020)      /* ͨ��2���ؼ����Ĵ��� */
-#define TIMER_T2CCR               (TIMER_BASE+0X024)      /* ͨ��2��ǰ����ֵ�Ĵ��� */
-#define TIMER_T2CR                (TIMER_BASE+0X028)      /* ͨ��2���ƼĴ��� */
-#define TIMER_T2ISCR              (TIMER_BASE+0X02C)      /* ͨ��2�ж�״̬����Ĵ��� */
-#define TIMER_T2IMSR              (TIMER_BASE+0X030)      /* ͨ��2�ж�����״̬�Ĵ��� */
-#define TIMER_T3LCR               (TIMER_BASE+0X040)      /* ͨ��3���ؼ����Ĵ��� */
-#define TIMER_T3CCR               (TIMER_BASE+0X044)      /* ͨ��3��ǰ����ֵ�Ĵ��� */
-#define TIMER_T3CR                (TIMER_BASE+0X048)      /* ͨ��3���ƼĴ��� */
-#define TIMER_T3ISCR              (TIMER_BASE+0X04C)      /* ͨ��3�ж�״̬����Ĵ��� */
-#define TIMER_T3IMSR              (TIMER_BASE+0X050)      /* ͨ��3�ж�����״̬�Ĵ��� */
-#define TIMER_T3CAPR              (TIMER_BASE+0X054)      /* ͨ��3����Ĵ��� */
-#define TIMER_T4LCR               (TIMER_BASE+0X060)      /* ͨ��4���ؼ����Ĵ��� */
-#define TIMER_T4CCR               (TIMER_BASE+0X064)      /* ͨ��4��ǰ����ֵ�Ĵ��� */
-#define TIMER_T4CR                (TIMER_BASE+0X068)      /* ͨ��4���ƼĴ��� */
-#define TIMER_T4ISCR              (TIMER_BASE+0X06C)      /* ͨ��4�ж�״̬����Ĵ��� */
-#define TIMER_T4IMSR              (TIMER_BASE+0X070)      /* ͨ��4�ж�����״̬�Ĵ��� */
-#define TIMER_T4CAPR              (TIMER_BASE+0X074)      /* ͨ��4����Ĵ��� */
-#define TIMER_T5LCR               (TIMER_BASE+0X080)      /* ͨ��5���ؼ����Ĵ��� */
-#define TIMER_T5CCR               (TIMER_BASE+0X084)      /* ͨ��5��ǰ����ֵ�Ĵ��� */
-#define TIMER_T5CR                (TIMER_BASE+0X088)      /* ͨ��5���ƼĴ��� */
-#define TIMER_T5ISCR              (TIMER_BASE+0X08C)      /* ͨ��5�ж�״̬����Ĵ��� */
-#define TIMER_T5IMSR              (TIMER_BASE+0X090)      /* ͨ��5�ж�����״̬�Ĵ��� */
-#define TIMER_T5CAPR              (TIMER_BASE+0X094)      /* ͨ��5����Ĵ��� */
-#define TIMER_T6LCR               (TIMER_BASE+0X0A0)      /* ͨ��6���ؼ����Ĵ��� */
-#define TIMER_T6CCR               (TIMER_BASE+0X0A4)      /* ͨ��6��ǰ����ֵ�Ĵ��� */
-#define TIMER_T6CR                (TIMER_BASE+0X0A8)      /* ͨ��6���ƼĴ��� */
-#define TIMER_T6ISCR              (TIMER_BASE+0X0AC)      /* ͨ��6�ж�״̬����Ĵ��� */
-#define TIMER_T6IMSR              (TIMER_BASE+0X0B0)      /* ͨ��6�ж�����״̬�Ĵ��� */
-#define TIMER_T6CAPR              (TIMER_BASE+0X0B4)      /* ͨ��6����Ĵ��� */
-#define TIMER_T7LCR               (TIMER_BASE+0X0C0)      /* ͨ��7���ؼ����Ĵ��� */
-#define TIMER_T7CCR               (TIMER_BASE+0X0C4)      /* ͨ��7��ǰ����ֵ�Ĵ��� */
-#define TIMER_T7CR                (TIMER_BASE+0X0C8)      /* ͨ��7���ƼĴ��� */
-#define TIMER_T7ISCR              (TIMER_BASE+0X0CC)      /* ͨ��7�ж�״̬����Ĵ��� */
-#define TIMER_T7IMSR              (TIMER_BASE+0X0D0)      /* ͨ��7�ж�����״̬�Ĵ��� */
-#define TIMER_T8LCR               (TIMER_BASE+0X0E0)      /* ͨ��8���ؼ����Ĵ��� */
-#define TIMER_T8CCR               (TIMER_BASE+0X0E4)      /* ͨ��8��ǰ����ֵ�Ĵ��� */
-#define TIMER_T8CR                (TIMER_BASE+0X0E8)      /* ͨ��8���ƼĴ��� */
-#define TIMER_T8ISCR              (TIMER_BASE+0X0EC)      /* ͨ��8�ж�״̬����Ĵ��� */
-#define TIMER_T8IMSR              (TIMER_BASE+0X0F0)      /* ͨ��8�ж�����״̬�Ĵ��� */
-#define TIMER_T9LCR               (TIMER_BASE+0X100)      /* ͨ��9���ؼ����Ĵ��� */
-#define TIMER_T9CCR               (TIMER_BASE+0X104)      /* ͨ��9��ǰ����ֵ�Ĵ��� */
-#define TIMER_T9CR                (TIMER_BASE+0X108)      /* ͨ��9���ƼĴ��� */
-#define TIMER_T9ISCR              (TIMER_BASE+0X10C)      /* ͨ��9�ж�״̬����Ĵ��� */
-#define TIMER_T9IMSR              (TIMER_BASE+0X110)      /* ͨ��9�ж�����״̬�Ĵ��� */
-#define TIMER_T10LCR              (TIMER_BASE+0X120)      /* ͨ��10���ؼ����Ĵ��� */
-#define TIMER_T10CCR              (TIMER_BASE+0X124)      /* ͨ��10��ǰ����ֵ�Ĵ��� */
-#define TIMER_T10CR               (TIMER_BASE+0X128)      /* ͨ��10���ƼĴ��� */
-#define TIMER_T10ISCR             (TIMER_BASE+0X12C)      /* ͨ��10�ж�״̬����Ĵ��� */
-#define TIMER_T10IMSR             (TIMER_BASE+0X130)      /* ͨ��10�ж�����״̬�Ĵ��� */
-#define TIMER_TIMSR               (TIMER_BASE+0X140)      /* TIMER�ж�����״̬�Ĵ��� */
-#define TIMER_TISCR               (TIMER_BASE+0X144)      /* TIMER�ж�״̬����Ĵ��� */
-#define TIMER_TISR                (TIMER_BASE+0X148)      /* TIMER�ж�״̬�Ĵ��� */
-
-
-
-/*
- *  PWMģ��
- *  ��ַ: 0x10004000
- */
-
-#define PWM0_CTRL                 (PWM_BASE+0X000)        /* PWM0���ƼĴ��� */
-#define PWM0_DIV                  (PWM_BASE+0X004)        /* PWM0��Ƶ�Ĵ��� */
-#define PWM0_PERIOD               (PWM_BASE+0X008)        /* PWM0���ڼĴ��� */
-#define PWM0_DATA                 (PWM_BASE+0X00C)        /* PWM0���ݼĴ��� */
-#define PWM0_CNT                  (PWM_BASE+0X010)        /* PWM0�����Ĵ��� */
-#define PWM0_STATUS               (PWM_BASE+0X014)        /* PWM0״̬�Ĵ��� */
-#define PWM1_CTRL                 (PWM_BASE+0X020)        /* PWM1���ƼĴ��� */
-#define PWM1_DIV                  (PWM_BASE+0X024)        /* PWM1��Ƶ�Ĵ��� */
-#define PWM1_PERIOD               (PWM_BASE+0X028)        /* PWM1���ڼĴ��� */
-#define PWM1_DATA                 (PWM_BASE+0X02C)        /* PWM1���ݼĴ��� */
-#define PWM1_CNT                  (PWM_BASE+0X030)        /* PWM1�����Ĵ��� */
-#define PWM1_STATUS               (PWM_BASE+0X034)        /* PWM1״̬�Ĵ��� */
-#define PWM2_CTRL                 (PWM_BASE+0X040)        /* PWM2���ƼĴ��� */
-#define PWM2_DIV                  (PWM_BASE+0X044)        /* PWM2��Ƶ�Ĵ��� */
-#define PWM2_PERIOD               (PWM_BASE+0X048)        /* PWM2���ڼĴ��� */
-#define PWM2_DATA                 (PWM_BASE+0X04C)        /* PWM2���ݼĴ��� */
-#define PWM2_CNT                  (PWM_BASE+0X050)        /* PWM2�����Ĵ��� */
-#define PWM2_STATUS               (PWM_BASE+0X054)        /* PWM2״̬�Ĵ��� */
-#define PWM3_CTRL                 (PWM_BASE+0X060)        /* PWM3���ƼĴ��� */
-#define PWM3_DIV                  (PWM_BASE+0X064)        /* PWM3��Ƶ�Ĵ��� */
-#define PWM3_PERIOD               (PWM_BASE+0X068)        /* PWM3���ڼĴ��� */
-#define PWM3_DATA                 (PWM_BASE+0X06C)        /* PWM3���ݼĴ��� */
-#define PWM3_CNT                  (PWM_BASE+0X070)        /* PWM3�����Ĵ��� */
-#define PWM3_STATUS               (PWM_BASE+0X074)        /* PWM3״̬�Ĵ��� */
-#define PWM_INTMASK               (PWM_BASE+0X080)        /* PWM�ж����μĴ��� */
-#define PWM_INT                   (PWM_BASE+0X084)        /* PWM�жϼĴ��� */
-#define PWM_ENABLE                (PWM_BASE+0X088)        /* PWMʹ�ܼĴ��� */
-
-
-/*
- *  UART0ģ��
- *  ��ַ: 0x10005000
- */
-
-#define UART0_DLBL                (UART0_BASE+0X000)      /* ���������õͰ�λ�Ĵ��� */
-#define UART0_RXFIFO              (UART0_BASE+0X000)      /* ����FIFO */
-#define UART0_TXFIFO              (UART0_BASE+0X000)      /* ����FIFO */
-#define UART0_DLBH                (UART0_BASE+0X004)      /* ���������ø߰�λ�Ĵ��� */
-#define UART0_IER                 (UART0_BASE+0X004)      /* �ж�ʹ�ܼĴ��� */
-#define UART0_IIR                 (UART0_BASE+0X008)      /* �ж�ʶ��Ĵ��� */
-#define UART0_FCR                 (UART0_BASE+0X008)      /* FIFO���ƼĴ��� */
-#define UART0_LCR                 (UART0_BASE+0X00C)      /* �п��ƼĴ��� */
-#define UART0_MCR                 (UART0_BASE+0X010)      /* Modem���ƼĴ��� */
-#define UART0_LSR                 (UART0_BASE+0X014)      /* ��״̬�Ĵ��� */
-#define UART0_MSR                 (UART0_BASE+0X018)      /* Modem״̬�Ĵ��� */
-
-
-/*
- *  UART1ģ��
- *  ��ַ: 0x10006000
- */
-
-#define UART1_DLBL                (UART1_BASE+0X000)      /* ���������õͰ�λ�Ĵ��� */
-#define UART1_RXFIFO              (UART1_BASE+0X000)      /* ����FIFO */
-#define UART1_TXFIFO              (UART1_BASE+0X000)      /* ����FIFO */
-#define UART1_DLBH                (UART1_BASE+0X004)      /* ���������ø߰�λ�Ĵ��� */
-#define UART1_IER                 (UART1_BASE+0X004)      /* �ж�ʹ�ܼĴ��� */
-#define UART1_IIR                 (UART1_BASE+0X008)      /* �ж�ʶ��Ĵ��� */
-#define UART1_FCR                 (UART1_BASE+0X008)      /* FIFO���ƼĴ��� */
-#define UART1_LCR                 (UART1_BASE+0X00C)      /* �п��ƼĴ��� */
-#define UART1_MCR                 (UART1_BASE+0X010)      /* Modem���ƼĴ��� */
-#define UART1_LSR                 (UART1_BASE+0X014)      /* ��״̬�Ĵ��� */
-#define UART1_MSR                 (UART1_BASE+0X018)      /* Modem״̬�Ĵ��� */
-
-
-/*
- *  UART2ģ��
- *  ��ַ: 0x10007000
- */
-
-#define UART2_DLBL                (UART2_BASE+0X000)      /* ���������õͰ�λ�Ĵ��� */
-#define UART2_RXFIFO              (UART2_BASE+0X000)      /* ����FIFO */
-#define UART2_TXFIFO              (UART2_BASE+0X000)      /* ����FIFO */
-#define UART2_DLBH                (UART2_BASE+0X004)      /* ���������ø߰�λ�Ĵ��� */
-#define UART2_IER                 (UART2_BASE+0X004)      /* �ж�ʹ�ܼĴ��� */
-#define UART2_IIR                 (UART2_BASE+0X008)      /* �ж�ʶ��Ĵ��� */
-#define UART2_FCR                 (UART2_BASE+0X008)      /* FIFO���ƼĴ��� */
-#define UART2_LCR                 (UART2_BASE+0X00C)      /* �п��ƼĴ��� */
-#define UART2_MCR                 (UART2_BASE+0X010)      /* Modem���ƼĴ��� */
-#define UART2_LSR                 (UART2_BASE+0X014)      /* ��״̬�Ĵ��� */
-#define UART2_MSR                 (UART2_BASE+0X018)      /* Modem״̬�Ĵ��� */
-
-
-/*
- *  UART3ģ��
- *  ��ַ: 0x10008000
- */
-
-#define UART3_DLBL                (UART3_BASE+0X000)      /* ���������õͰ�λ�Ĵ��� */
-#define UART3_RXFIFO              (UART3_BASE+0X000)      /* ����FIFO */
-#define UART3_TXFIFO              (UART3_BASE+0X000)      /* ����FIFO */
-#define UART3_DLBH                (UART3_BASE+0X004)      /* ���������ø߰�λ�Ĵ��� */
-#define UART3_IER                 (UART3_BASE+0X004)      /* �ж�ʹ�ܼĴ��� */
-#define UART3_IIR                 (UART3_BASE+0X008)      /* �ж�ʶ��Ĵ��� */
-#define UART3_FCR                 (UART3_BASE+0X008)      /* FIFO���ƼĴ��� */
-#define UART3_LCR                 (UART3_BASE+0X00C)      /* �п��ƼĴ��� */
-#define UART3_MCR                 (UART3_BASE+0X010)      /* Modem���ƼĴ��� */
-#define UART3_LSR                 (UART3_BASE+0X014)      /* ��״̬�Ĵ��� */
-#define UART3_MSR                 (UART3_BASE+0X018)      /* Modem״̬�Ĵ��� */
-
-
-/*
- *  SSIģ��
- *  ��ַ: 0x10009000
- */
-
-#define SSI_CONTROL0              (SSI_BASE+0X000)        /* ���ƼĴ���0 */
-#define SSI_CONTROL1              (SSI_BASE+0X004)        /* ���ƼĴ���1 */
-#define SSI_SSIENR                (SSI_BASE+0X008)        /* SSIʹ�ܼĴ��� */
-#define SSI_MWCR                  (SSI_BASE+0X00C)        /* Microwire���ƼĴ��� */
-#define SSI_SER                   (SSI_BASE+0X010)        /* ���豸ʹ�ܼĴ��� */
-#define SSI_BAUDR                 (SSI_BASE+0X014)        /* ���������üĴ��� */
-#define SSI_TXFTLR                (SSI_BASE+0X018)        /* ����FIFO��ֵ�Ĵ��� */
-#define SSI_RXFTLR                (SSI_BASE+0X01C)        /* ����FIFO��ֵ�Ĵ��� */
-#define SSI_TXFLR                 (SSI_BASE+0X020)        /* ����FIFO״̬�Ĵ��� */
-#define SSI_RXFLR                 (SSI_BASE+0X024)        /* ����FIFO״̬�Ĵ��� */
-#define SSI_SR                    (SSI_BASE+0X028)        /* ״̬�Ĵ��� */
-#define SSI_IMR                   (SSI_BASE+0X02C)        /* �ж����μĴ��� */
-#define SSI_ISR                   (SSI_BASE+0X030)        /* �ж�����״̬�Ĵ��� */
-#define SSI_RISR                  (SSI_BASE+0X034)        /* �ж�ԭʼ״̬�Ĵ��� */
-#define SSI_TXOICR                (SSI_BASE+0X038)        /* ����FIFO�����ж�����Ĵ��� */
-#define SSI_RXOICR                (SSI_BASE+0X03C)        /* ����FIFO�����ж�����Ĵ��� */
-#define SSI_RXUICR                (SSI_BASE+0X040)        /* ����FIFO�����ж�����Ĵ��� */
-#define SSI_ICR                   (SSI_BASE+0X02C)        /* �ж�����Ĵ��� */
-#define SSI_DMACR                 (SSI_BASE+0X04C)        /* DMA���ƼĴ��� */
-#define SSI_DMATDLR               (SSI_BASE+0X050)        /* DMA����״̬�Ĵ��� */
-#define SSI_DMARDLR               (SSI_BASE+0X054)        /* DMA����״̬�Ĵ��� */
-#define SSI_DR                    (SSI_BASE+0X060)        /* ���ݼĴ��� */
-
-
-/*
- *  I2Sģ��
- *  ��ַ: 0x1000A000
- */
-
-#define I2S_CTRL                  (I2S_BASE+0X000)        /* I2S���ƼĴ��� */
-#define I2S_DATA                  (I2S_BASE+0X004)        /* I2S���ݼĴ��� */
-#define I2S_INT                   (I2S_BASE+0X008)        /* I2S�жϼĴ��� */
-#define I2S_STATUS                (I2S_BASE+0X00C)        /* I2S״̬�Ĵ��� */
-
-
-/*
- *  SDģ��
- *  ��ַ: 0x1000B000
- */
- 
-#define SDC_CLOCK_CONTROL  		  (SD_BASE+0x00)          /* SDIOʱ�ӿ��ƼĴ��� */
-#define SDC_SOFTWARE_RESET 		  (SD_BASE+0X04)          /* SDIO������λ�Ĵ��� */
-#define SDC_ARGUMENT     		  (SD_BASE+0X08)          /* SDIO��������Ĵ��� */
-#define SDC_COMMAND       	      (SD_BASE+0X0C)          /* SDIO������ƼĴ��� */
-#define SDC_BLOCK_SIZE            (SD_BASE+0X10)          /* SDIO���ݿ鳤�ȼĴ��� */
-#define SDC_BLOCK_COUNT    		  (SD_BASE+0X14)          /* SDIO���ݿ���Ŀ�Ĵ��� */
-#define SDC_TRANSFER_MODE  		  (SD_BASE+0X18)          /* SDIO����ģʽѡ��Ĵ��� */
-#define SDC_RESPONSE0    		  (SD_BASE+0X1c)          /* SDIO��Ӧ�Ĵ���0 */
-#define SDC_RESPONSE1    		  (SD_BASE+0X20)          /* SDIO��Ӧ�Ĵ���1 */
-#define SDC_RESPONSE2    		  (SD_BASE+0X24)          /* SDIO��Ӧ�Ĵ���2 */
-#define SDC_RESPONSE3    		  (SD_BASE+0X28)          /* SDIO��Ӧ�Ĵ���3 */
-#define SDC_READ_TIMEOUT_CONTROL  (SD_BASE+0X2c)          /* SDIO����ʱ���ƼĴ��� */
-#define SDC_INTERRUPT_STATUS      (SD_BASE+0X30)          /* SDIO�ж�״̬�Ĵ��� */
-#define SDC_INTERRUPT_STATUS_MASK (SD_BASE+0X34)          /* SDIO�ж�״̬���μĴ��� */
-#define SDC_READ_BUFER_ACCESS     (SD_BASE+0X38)          /* SDIO����FIFO */
-#define SDC_WRITE_BUFER_ACCESS    (SD_BASE+0X3c)          /* SDIO����FIFO */
-
-
-
-/*
- *  SMC0ģ��
- *  ��ַ: 0x1000C000
- */
-
-#define SMC0_CTRL                 (SMC0_BASE+0X000)       /* SMC0���ƼĴ��� */
-#define SMC0_INT                  (SMC0_BASE+0X004)       /* SMC0�жϼĴ��� */
-#define SMC0_FD                   (SMC0_BASE+0X008)       /* SMC0������Ԫʱ��Ĵ��� */
-#define SMC0_CT                   (SMC0_BASE+0X00C)       /* SMC0�ַ�����ʱ��Ĵ��� */
-#define SMC0_BT                   (SMC0_BASE+0X010)       /* SMC0�鴫��ʱ��Ĵ��� */
-
-
-
-/*
- *  SMC1ģ��
- *  ��ַ: 0x1000D000
- */
-
-#define SMC1_CTRL                 (SMC1_BASE+0X000)       /* SMC1���ƼĴ��� */
-#define SMC1_INT                  (SMC1_BASE+0X004)       /* SMC1�жϼĴ��� */
-#define SMC1_FD                   (SMC1_BASE+0X008)       /* SMC1������Ԫʱ��Ĵ��� */
-#define SMC1_CT                   (SMC1_BASE+0X00C)       /* SMC1�ַ�����ʱ��Ĵ��� */
-#define SMC1_BT                   (SMC1_BASE+0X010)       /* SMC1�鴫��ʱ��Ĵ��� */
-
-
-
-/*
- *  USBDģ��
- *  ��ַ: 0x1000E000
- */
-
-#define USBD_PROTOCOLINTR         (USBD_BASE+0X000)       /* USBЭ���жϼĴ��� */
-#define USBD_INTRMASK             (USBD_BASE+0X004)       /* USB�ж����μĴ��� */
-#define USBD_INTRCTRL             (USBD_BASE+0X008)       /* USB�ж����Ϳ��ƼĴ��� */
-#define USBD_EPINFO               (USBD_BASE+0X00C)       /* USB��˵�״̬�Ĵ��� */
-#define USBD_BCONFIGURATIONVALUE  (USBD_BASE+0X010)       /* SET_CCONFIGURATION��¼ */
-#define USBD_BMATTRIBUTES         (USBD_BASE+0X014)       /* ��ǰ�������ԼĴ��� */
-#define USBD_DEVSPEED             (USBD_BASE+0X018)       /* ��ǰ�豸�����ٶȼĴ��� */
-#define USBD_FRAMENUMBER          (USBD_BASE+0X01C)       /* ��¼��ǰSOF���ڵ�֡�� */
-#define USBD_EPTRANSACTIONS0      (USBD_BASE+0X020)       /* ��¼�´�Ҫ��Ĵ������ */
-#define USBD_EPTRANSACTIONS1      (USBD_BASE+0X024)       /* ��¼�´�Ҫ��Ĵ������ */
-#define USBD_APPIFUPDATE          (USBD_BASE+0X028)       /* �ӿںſ��ٸ��¼Ĵ��� */
-#define USBD_CFGINTERFACE0        (USBD_BASE+0X02C)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE1        (USBD_BASE+0X030)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE2        (USBD_BASE+0X034)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE3        (USBD_BASE+0X038)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE4        (USBD_BASE+0X03C)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE5        (USBD_BASE+0X040)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE6        (USBD_BASE+0X044)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE7        (USBD_BASE+0X048)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE8        (USBD_BASE+0X04C)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE9        (USBD_BASE+0X050)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE10       (USBD_BASE+0X054)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE11       (USBD_BASE+0X058)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE12       (USBD_BASE+0X05C)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE13       (USBD_BASE+0X060)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE14       (USBD_BASE+0X064)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE15       (USBD_BASE+0X068)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE16       (USBD_BASE+0X06C)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE17       (USBD_BASE+0X070)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE18       (USBD_BASE+0X074)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE19       (USBD_BASE+0X078)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE20       (USBD_BASE+0X07C)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE21       (USBD_BASE+0X080)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE22       (USBD_BASE+0X084)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE23       (USBD_BASE+0X088)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE24       (USBD_BASE+0X08C)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE25       (USBD_BASE+0X090)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE26       (USBD_BASE+0X094)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE27       (USBD_BASE+0X098)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE28       (USBD_BASE+0X09C)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE29       (USBD_BASE+0X0A0)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE30       (USBD_BASE+0X0A4)       /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE31       (USBD_BASE+0X0A8)       /* ��¼�ӿڵ�ֵ */
-#define USBD_PKTPASSEDCTRL        (USBD_BASE+0X0AC)       /* ��¼�ɹ����յİ��� */
-#define USBD_PKTDROPPEDCTRL       (USBD_BASE+0X0B0)       /* ��¼��ʧ�İ��� */
-#define USBD_CRCERRCTRL           (USBD_BASE+0X0B4)       /* ��¼CRC����İ��� */
-#define USBD_BITSTUFFERRCTRL      (USBD_BASE+0X0B8)       /* ��¼λ������İ��� */
-#define USBD_PIDERRCTRL           (USBD_BASE+0X0BC)       /* ��¼PID����İ��� */
-#define USBD_FRAMINGERRCTL        (USBD_BASE+0X0C0)       /* ��¼��SYNC��EOP�İ��� */
-#define USBD_TXPKTCTRL            (USBD_BASE+0X0C4)       /* ��¼���Ͱ������� */
-#define USBD_STATCTRLOV           (USBD_BASE+0X0C8)       /* ��¼ͳ�ƼĴ��������� */
-#define USBD_TXLENGTH             (USBD_BASE+0X0CC)       /* ��¼ÿ��IN������������� */
-#define USBD_RXLENGTH             (USBD_BASE+0X0D0)       /* ��¼OUT������������� */
-#define USBD_RESUME               (USBD_BASE+0X0D4)       /* USB���ѼĴ��� */
-#define USBD_READFLAG             (USBD_BASE+0X0D8)       /* ���첽״̬�Ĵ�����־ */
-#define USBD_RECEIVETYPE          (USBD_BASE+0X0DC)       /* ����״̬�Ĵ��� */
-#define USBD_APPLOCK              (USBD_BASE+0X0E0)       /* ���źżĴ��� */
-#define USBD_EP0OUTADDR           (USBD_BASE+0X100)       /* �˵�0�˵�źͷ��� */
-#define USBD_EP0OUTBMATTR         (USBD_BASE+0X104)       /* �˵�0���ͼĴ��� */
-#define USBD_EP0OUTMAXPKTSIZE     (USBD_BASE+0X108)       /* �˵�0�����ߴ�Ĵ��� */
-#define USBD_EP0OUTIFNUM          (USBD_BASE+0X10C)       /* �˵�0�ӿںżĴ��� */
-#define USBD_EP0OUTSTAT           (USBD_BASE+0X110)       /* �˵�0״̬�Ĵ��� */
-#define USBD_EP0OUTBMREQTYPE      (USBD_BASE+0X114)       /* �˵�0 SETUP���������� */
-#define USBD_EP0OUTBREQUEST       (USBD_BASE+0X118)       /* �˵�0 SETUP������������ */
-#define USBD_EP0OUTWVALUE         (USBD_BASE+0X11C)       /* �˵�0 SETUP��������ֵ */
-#define USBD_EP0OUTWINDEX         (USBD_BASE+0X120)       /* �˵�0 SETUP������������ */
-#define USBD_EP0OUTWLENGTH        (USBD_BASE+0X120)       /* �˵�0 SETUP�������󳤶� */
-#define USBD_EP0OUTSYNCHFRAME     (USBD_BASE+0X128)       /* �˵�0ͬ����֡�� */
-#define USBD_EP1OUTADDR           (USBD_BASE+0X12C)       /* �˵�1����˵�źͷ��� */
-#define USBD_EP1OUTBMATTR         (USBD_BASE+0X130)       /* �˵�1������ͼĴ��� */
-#define USBD_EP1OUTMAXPKTSIZE     (USBD_BASE+0X134)       /* �˵�1��������ߴ�Ĵ��� */
-#define USBD_EP1OUTIFNUM          (USBD_BASE+0X138)       /* �˵�1����ӿںżĴ��� */
-#define USBD_EP1OUTSTAT           (USBD_BASE+0X13C)       /* �˵�1���״̬�Ĵ��� */
-#define USBD_EP1OUTBMREQTYPE      (USBD_BASE+0X140)       /* �˵�1���SETUP������������ */
-#define USBD_EP1OUTBREQUEST       (USBD_BASE+0X144)       /* �˵�1���SETUP������������ */
-#define USBD_EP1OUTWVALUE         (USBD_BASE+0X148)       /* �˵�1���SETUP��������ֵ */
-#define USBD_EP1OUTWINDX          (USBD_BASE+0X14C)       /* �˵�1���SETUP������������ */
-#define USBD_EP1OUTWLENGH         (USBD_BASE+0X150)       /* �˵�1���SETUP���������򳤶� */
-#define USBD_EP1OUTSYNCHFRAME     (USBD_BASE+0X154)       /* �˵�1���ͬ����֡�� */
-#define USBD_EP1INADDR            (USBD_BASE+0X158)       /* �˵�1����˵�źͷ��� */
-#define USBD_EP1INBMATTR          (USBD_BASE+0X15C)       /* �˵�1�������ͼĴ��� */
-#define USBD_EP1INMAXPKTSIZE      (USBD_BASE+0X160)       /* �˵�1���������ߴ�Ĵ��� */
-#define USBD_EP1INIFNUM           (USBD_BASE+0X164)       /* �˵�1����ӿںżĴ��� */
-#define USBD_EP1INSTAT            (USBD_BASE+0X168)       /* �˵�1����״̬�Ĵ��� */
-#define USBD_EP1INBMREQTYPE       (USBD_BASE+0X16C)       /* �˵�1����SETUP������������ */
-#define USBD_EP1INBREQUEST        (USBD_BASE+0X170)       /* �˵�1����SETUP������������ */
-#define USBD_EP1INWVALUE          (USBD_BASE+0X174)       /* �˵�1����SETUP��������ֵ */
-#define USBD_EP1INWINDEX          (USBD_BASE+0X178)       /* �˵�1����SETUP������������ */
-#define USBD_EP1INWLENGTH         (USBD_BASE+0X17C)       /* �˵�1����SETUP���������򳤶� */
-#define USBD_EP1INSYNCHFRAME      (USBD_BASE+0X180)       /* �˵�1����ͬ����֡�� */
-#define USBD_EP2OUTADDR           (USBD_BASE+0X184)       /* �˵�2����˵�źͷ��� */
-#define USBD_EP2OUTBMATTR         (USBD_BASE+0X188)       /* �˵�2������ͼĴ��� */
-#define USBD_EP2OUTMAXPKTSIZE     (USBD_BASE+0X18C)       /* �˵�2��������ߴ�Ĵ��� */
-#define USBD_EP2OUTIFNUM          (USBD_BASE+0X190)       /* �˵�2����ӿںżĴ��� */
-#define USBD_EP2OUTSTAT           (USBD_BASE+0X194)       /* �˵�2���״̬�Ĵ��� */
-#define USBD_EP2OUTBMREQTYPE      (USBD_BASE+0X198)       /* �˵�2���SETUP������������ */
-#define USBD_EP2OUTBREQUEST       (USBD_BASE+0X19C)       /* �˵�2���SETUP������������ */
-#define USBD_EP2OUTWVALUE         (USBD_BASE+0X1A0)       /* �˵�2���SETUP��������ֵ */
-#define USBD_EP2OUTWINDEX         (USBD_BASE+0X1A4)       /* �˵�2���SETUP������������ */
-#define USBD_EP2OUTWLENGTH        (USBD_BASE+0X1A8)       /* �˵�2���SETUP���������򳤶� */
-#define USBD_EP2OUTSYNCHFRAME     (USBD_BASE+0X1AC)       /* �˵�2���ͬ����֡�� */
-#define USBD_EP2INADDR            (USBD_BASE+0X1B0)       /* �˵�2����˵�źͷ��� */
-#define USBD_EP2INBMATTR          (USBD_BASE+0X1B4)       /* �˵�2�������ͼĴ��� */
-#define USBD_EP2INMAXPKTSIZE      (USBD_BASE+0X1B8)       /* �˵�2���������ߴ�Ĵ��� */
-#define USBD_EP2INIFNUM           (USBD_BASE+0X1BC)       /* �˵�2����ӿںżĴ��� */
-#define USBD_EP2INSTAT            (USBD_BASE+0X1C0)       /* �˵�2����״̬�Ĵ��� */
-#define USBD_EP2INBMREQTYPE       (USBD_BASE+0X1C4)       /* �˵�2����SETUP������������ */
-#define USBD_EP2INBREQUEST        (USBD_BASE+0X1C8)       /* �˵�2����SETUP������������ */
-#define USBD_EP2INWVALUE          (USBD_BASE+0X1CC)       /* �˵�2����SETUP��������ֵ */
-#define USBD_EP2INWINDEX          (USBD_BASE+0X1D0)       /* �˵�2����SETUP������������ */
-#define USBD_EP2INWLENGTH         (USBD_BASE+0X1D4)       /* �˵�2����SETUP���������򳤶� */
-#define USBD_EP2INSYNCHFRAME      (USBD_BASE+0X1D8)       /* �˵�2����ͬ����֡�� */
-#define USBD_RXFIFO               (USBD_BASE+0X200)       /* ����FIFO */
-#define USBD_TXFIFO               (USBD_BASE+0X300)       /* ����FIFO */
-
-
-/*
- *  GPIOģ��
- *  ��ַ: 0x1000F000
- */
-
-#define GPIO_DBCLK_DIV            (GPIO_BASE+0X000)       /* ȥë�̲���ʱ�ӷ�Ƶ�����üĴ��� */
-#define GPIO_PORTA_DIR            (GPIO_BASE+0X004)       /* A��˿���������������üĴ��� */
-#define GPIO_PORTA_SEL            (GPIO_BASE+0X008)       /* A��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTA_INCTL          (GPIO_BASE+0X00C)       /* A��˿�ͨ����;����ʱ�������üĴ��� */
-#define GPIO_PORTA_INTRCTL        (GPIO_BASE+0X010)       /* A��˿��жϴ����������üĴ��� */
-#define GPIO_PORTA_INTRCLR        (GPIO_BASE+0X014)       /* A��˿�ͨ����;�ж�������üĴ��� */
-#define GPIO_PORTA_DATA           (GPIO_BASE+0X018)       /* A��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTB_DIR            (GPIO_BASE+0X01C)       /* B��˿���������������üĴ��� */
-#define GPIO_PORTB_SEL            (GPIO_BASE+0X020)       /* B��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTB_DATA           (GPIO_BASE+0X024)       /* B��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTC_DIR            (GPIO_BASE+0X028)       /* C��˿���������������üĴ��� */
-#define GPIO_PORTC_SEL            (GPIO_BASE+0X02C)       /* C��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTC_DATA           (GPIO_BASE+0X030)       /* C��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTD_DIR            (GPIO_BASE+0X034)       /* D��˿���������������üĴ��� */
-#define GPIO_PORTD_SEL            (GPIO_BASE+0X038)       /* D��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTD_SPECII         (GPIO_BASE+0X03C)       /* D��˿�ר����;2ѡ�����üĴ��� */
-#define GPIO_PORTD_DATA           (GPIO_BASE+0X040)       /* D��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTE_DIR            (GPIO_BASE+0X044)       /* E��˿���������������üĴ��� */
-#define GPIO_PORTE_SEL            (GPIO_BASE+0X048)       /* E��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTE_DATA           (GPIO_BASE+0X04C)       /* E��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTF_DIR            (GPIO_BASE+0X050)       /* F��˿���������������üĴ��� */
-#define GPIO_PORTF_SEL            (GPIO_BASE+0X054)       /* F��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTF_INCTL          (GPIO_BASE+0X058)       /* F��˿�ͨ����;����ʱ�������üĴ��� */
-#define GPIO_PORTF_INTRCTL        (GPIO_BASE+0X05C)       /* F��˿��жϴ����������üĴ��� */
-#define GPIO_PORTF_INTRCLR        (GPIO_BASE+0X060)       /* F��˿�ͨ����;�ж�������üĴ��� */
-#define GPIO_PORTF_DATA           (GPIO_BASE+0X064)       /* F��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTG_DIR            (GPIO_BASE+0X068)       /* G��˿���������������üĴ��� */
-#define GPIO_PORTG_SEL            (GPIO_BASE+0X06C)       /* G��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTG_DATA           (GPIO_BASE+0X070)       /* G��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTH_DIR            (GPIO_BASE+0X07C)       /* H��˿���������������üĴ��� */
-#define GPIO_PORTH_SEL            (GPIO_BASE+0X078)       /* H��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTH_DATA           (GPIO_BASE+0X07C)       /* H��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTI_DIR            (GPIO_BASE+0X080)       /* I��˿���������������üĴ��� */
-#define GPIO_PORTI_SEL            (GPIO_BASE+0X084)       /* I��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTI_DATA           (GPIO_BASE+0X088)       /* I��˿�ͨ����;�������üĴ��� */
-
-
-
-/*
- *  EMIģ��
- *  ��ַ: 0x11000000
- */
-
-#define EMI_CSACONF               (EMI_BASE+0X000)        /* CSA�������üĴ��� */
-#define EMI_CSBCONF               (EMI_BASE+0X004)        /* CSB�������üĴ��� */
-#define EMI_CSCCONF               (EMI_BASE+0X008)        /* CSC�������üĴ��� */
-#define EMI_CSDCONF               (EMI_BASE+0X00C)        /* CSD�������üĴ��� */
-#define EMI_CSECONF               (EMI_BASE+0X010)        /* CSE�������üĴ��� */
-#define EMI_CSFCONF               (EMI_BASE+0X014)        /* CSF�������üĴ��� */
-#define EMI_SDCONF1               (EMI_BASE+0X018)        /* SDRAMʱ�����üĴ���1 */
-#define EMI_SDCONF2               (EMI_BASE+0X01C)        /* SDRAMʱ�����üĴ���2, SDRAM��ʼ���õ���������Ϣ */
-#define EMI_REMAPCONF             (EMI_BASE+0X020)        /* Ƭѡ�ռ估��ַӳ��REMAP���üĴ��� */
-#define EMI_NAND_ADDR1            (EMI_BASE+0X100)        /* NAND FLASH�ĵ�ַ�Ĵ���1 */
-#define EMI_NAND_COM              (EMI_BASE+0X104)        /* NAND FLASH�Ŀ����ּĴ��� */
-#define EMI_NAND_STA              (EMI_BASE+0X10C)        /* NAND FLASH��״̬�Ĵ��� */
-#define EMI_ERR_ADDR1             (EMI_BASE+0X110)        /* �����������ĵ�ַ�Ĵ���1 */
-#define EMI_ERR_ADDR2             (EMI_BASE+0X114)        /* �����������ĵ�ַ�Ĵ���2 */
-#define EMI_NAND_CONF1            (EMI_BASE+0X118)        /* NAND FLASH������������1 */
-#define EMI_NAND_INTR             (EMI_BASE+0X11C)        /* NAND FLASH�жϼĴ��� */
-#define EMI_NAND_ECC              (EMI_BASE+0X120)        /* ECCУ����ɼĴ��� */
-#define EMI_NAND_IDLE             (EMI_BASE+0X124)        /* NAND FLASH���мĴ��� */
-#define EMI_NAND_CONF2            (EMI_BASE+0X128)        /* NAND FLASH������������2 */
-#define EMI_NAND_ADDR2            (EMI_BASE+0X12C)        /* NAND FLASH�ĵ�ַ�Ĵ���2 */
-#define EMI_NAND_DATA             (EMI_BASE+0X200)        /* NAND FLASH�����ݼĴ��� */
-
-
-/*
- *  DMACģ��
- *  ��ַ: 0x11001000
- */
-
-#define DMAC_INTSTATUS            (DMAC_BASE+0X020)       /* DAMC�ж�״̬�Ĵ����� */
-#define DMAC_INTTCSTATUS          (DMAC_BASE+0X050)       /* DMAC��������ж�״̬�Ĵ��� */
-#define DMAC_INTTCCLEAR           (DMAC_BASE+0X060)       /* DMAC��������ж�״̬����Ĵ��� */
-#define DMAC_INTERRORSTATUS       (DMAC_BASE+0X080)       /* DMAC��������ж�״̬�Ĵ��� */
-#define DMAC_INTINTERRCLR         (DMAC_BASE+0X090)       /* DMAC��������ж�״̬����Ĵ��� */
-#define DMAC_ENBLDCHNS            (DMAC_BASE+0X0B0)       /* DMACͨ��ʹ��״̬�Ĵ��� */
-#define DMAC_C0SRCADDR            (DMAC_BASE+0X000)       /* DMAC��0Դ��ַ�Ĵ��� */
-#define DMAC_C0DESTADD            (DMAC_BASE+0X004)       /* DMAC��0Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C0CONTROL            (DMAC_BASE+0X00C)       /* DMAC��0���ƼĴ��� */
-#define DMAC_C0CONFIGURATION      (DMAC_BASE+0X010)       /* DMAC��0���üĴ��� */
-#define DMAC_C0DESCRIPTOR         (DMAC_BASE+0X01C)       /* DMAC��0������ַ�Ĵ��� */
-#define DMAC_C1SRCADDR            (DMAC_BASE+0X100)       /* DMAC��1Դ��ַ�Ĵ��� */
-#define DMAC_C1DESTADDR           (DMAC_BASE+0X104)       /* DMAC��1Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C1CONTROL            (DMAC_BASE+0X10C)       /* DMAC��1���ƼĴ��� */
-#define DMAC_C1CONFIGURATION      (DMAC_BASE+0X110)       /* DMAC��1���üĴ��� */
-#define DMAC_C1DESCRIPTOR         (DMAC_BASE+0X114)       /* DMAC��1������ַ�Ĵ��� */
-#define DMAC_C2SRCADDR            (DMAC_BASE+0X200)       /* DMAC��2Դ��ַ�Ĵ��� */
-#define DMAC_C2DESTADDR           (DMAC_BASE+0X204)       /* DMAC��2Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C2CONTROL            (DMAC_BASE+0X20C)       /* DMAC��2���ƼĴ��� */
-#define DMAC_C2CONFIGURATION      (DMAC_BASE+0X210)       /* DMAC��2���üĴ��� */
-#define DMAC_C2DESCRIPTOR         (DMAC_BASE+0X214)       /* DMAC��2������ַ�Ĵ��� */
-#define DMAC_C3SRCADDR            (DMAC_BASE+0X300)       /* DMAC��3Դ��ַ�Ĵ��� */
-#define DMAC_C3DESTADDR           (DMAC_BASE+0X304)       /* DMAC��3Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C3CONTROL            (DMAC_BASE+0X30C)       /* DMAC��3���ƼĴ��� */
-#define DMAC_C3CONFIGURATION      (DMAC_BASE+0X310)       /* DMAC��3���üĴ��� */
-#define DMAC_C3DESCRIPTOR         (DMAC_BASE+0X314)       /* DMAC��3������ַ�Ĵ��� */
-#define DMAC_C4SRCADDR            (DMAC_BASE+0X400)       /* DMAC��4Դ��ַ�Ĵ��� */
-#define DMAC_C4DESTADDR           (DMAC_BASE+0X404)       /* DMAC��4Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C4CONTROL            (DMAC_BASE+0X40C)       /* DMAC��4���ƼĴ��� */
-#define DMAC_C4CONFIGURATION      (DMAC_BASE+0X410)       /* DMAC��4���üĴ��� */
-#define DMAC_C4DESCRIPTOR         (DMAC_BASE+0X414)       /* DMAC��4������ַ�Ĵ��� */
-#define DMAC_C5SRCADDR            (DMAC_BASE+0X500)       /* DMAC��5Դ��ַ�Ĵ��� */
-#define DMAC_C5DESTADDR           (DMAC_BASE+0X504)       /* DMAC��5Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C5CONTROL            (DMAC_BASE+0X50C)       /* DMAC��5���ƼĴ��� */
-#define DMAC_C5CONFIGURATION      (DMAC_BASE+0X510)       /* DMAC��5���üĴ��� */
-#define DMAC_C5DESCRIPTOR         (DMAC_BASE+0X514)       /* DMAC��5������ַ�Ĵ��� */
-
-
-/*
- *  LCDCģ��
- *  ��ַ: 0x11002000
- */
-
-#define LCDC_SSA                  (LCDC_BASE+0X000)       /* ��Ļ��ʼ��ַ�Ĵ��� */
-#define LCDC_SIZE                 (LCDC_BASE+0X004)       /* ��Ļ�ߴ�Ĵ��� */
-#define LCDC_PCR                  (LCDC_BASE+0X008)       /* ������üĴ��� */
-#define LCDC_HCR                  (LCDC_BASE+0X00C)       /* ˮƽ���üĴ��� */
-#define LCDC_VCR                  (LCDC_BASE+0X010)       /* ��ֱ���üĴ��� */
-#define LCDC_PWMR                 (LCDC_BASE+0X014)       /* PWM�Աȶȿ��ƼĴ��� */
-#define LCDC_LECR                 (LCDC_BASE+0X018)       /* ʹ�ܿ��ƼĴ��� */
-#define LCDC_DMACR                (LCDC_BASE+0X01C)       /* DMA���ƼĴ��� */
-#define LCDC_LCDISREN             (LCDC_BASE+0X020)       /* �ж�ʹ�ܼĴ��� */
-#define LCDC_LCDISR               (LCDC_BASE+0X024)       /* �ж�״̬�Ĵ��� */
-#define LCDC_LGPMR                (LCDC_BASE+0X040)       /* �Ҷȵ�ɫӳ��Ĵ����� (16��32bit�Ĵ���) */
-
-
-/*
- *  MACģ��
- *  ��ַ: 0x11003000
- */
-
-#define MAC_CTRL                  (MAC_BASE+0X000)        /* MAC���ƼĴ��� */
-#define MAC_INTSRC                (MAC_BASE+0X004)        /* MAC�ж�Դ�Ĵ��� */
-#define MAC_INTMASK               (MAC_BASE+0X008)        /* MAC�ж����μĴ��� */
-#define MAC_IPGT                  (MAC_BASE+0X00C)        /* ����֡����Ĵ��� */
-#define MAC_IPGR1                 (MAC_BASE+0X010)        /* �ȴ����ڼĴ��� */
-#define MAC_IPGR2                 (MAC_BASE+0X014)        /* �ȴ����ڼĴ��� */
-#define MAC_PACKETLEN             (MAC_BASE+0X018)        /* ֡���ȼĴ��� */
-#define MAC_COLLCONF              (MAC_BASE+0X01C)        /* ��ײ�ط��Ĵ��� */
-#define MAC_TXBD_NUM              (MAC_BASE+0X020)        /* �����������Ĵ��� */
-#define MAC_FLOWCTRL              (MAC_BASE+0X024)        /* ���ؼĴ��� */
-#define MAC_MII_CTRL              (MAC_BASE+0X028)        /* PHY���ƼĴ��� */
-#define MAC_MII_CMD               (MAC_BASE+0X02C)        /* PHY����Ĵ��� */
-#define MAC_MII_ADDRESS           (MAC_BASE+0X030)        /* PHY��ַ�Ĵ��� */
-#define MAC_MII_TXDATA            (MAC_BASE+0X034)        /* PHYд���ݼĴ��� */
-#define MAC_MII_RXDATA            (MAC_BASE+0X038)        /* PHY�����ݼĴ��� */
-#define MAC_MII_STATUS            (MAC_BASE+0X03C)        /* PHY״̬�Ĵ��� */
-#define MAC_ADDR0                 (MAC_BASE+0X040)        /* MAC��ַ�Ĵ��� */
-#define MAC_ADDR1                 (MAC_BASE+0X044)        /* MAC��ַ�Ĵ��� */
-#define MAC_HASH0                 (MAC_BASE+0X048)        /* MAC HASH�Ĵ��� */
-#define MAC_HASH1                 (MAC_BASE+0X04C)        /* MAC HASH�Ĵ��� */
-#define MAC_TXPAUSE               (MAC_BASE+0X050)        /* MAC����֡�Ĵ��� */
-#define MAC_TX_BD                 (MAC_BASE+0X400)      
-#define MAC_RX_BD                 (MAC_BASE+0X600)      
-
-
-/*
- **************************************
- * Error Codes:
- *    IF SUCCESS RETURN 0, ELSE RETURN OTHER ERROR CODE,
- *    parameter error return (-33)/E_PAR, 
- *    hardware error reture (-99)/E_HA
- **************************************
- */
-
-#define    E_OK          0        /* Normal completion */
-#define    E_SYS         (-5)     /* System error */
-#define    E_NOMEM       (-10)    /* Insufficient memory */
-#define    E_NOSPT       (-17)    /* Feature not supported */
-#define    E_INOSPT      (-18)    /* Feature not supported by ITRON/FILE specification */
-#define    E_RSFN        (-20)    /* Reserved function code number */
-#define    E_RSATR       (-24)    /* Reserved attribute */
-#define    E_PAR         (-33)    /* Parameter error */
-#define    E_ID          (-35)    /* Invalid ID number */
-#define    E_NOEXS       (-52)    /* Object does not exist */
-#define    E_OBJ         (-63)    /* Invalid object state */
-#define    E_MACV        (-65)    /* Memory access disabled or memory access violation */
-#define    E_OACV        (-66)    /* Object access violation */
-#define    E_CTX         (-69)    /* Context error */
-#define    E_QOVR        (-73)    /* Queuing or nesting overflow */
-#define    E_DLT         (-81)    /* Object being waited for was deleted */
-#define    E_TMOUT       (-85)    /* Polling failure or timeout exceeded */
-#define    E_RLWAI       (-86)    /* WAIT state was forcibly released */ 
-
-#define    E_HA          (-99)    /* HARD WARE ERROR */
-
-
-/*
- **************************************
- * PMU ģ��ʱ��
- **************************************
- */
-
-#define    CLK_SGPT      (1 << 16)
-#define    CLK_SI2S      (1 << 15) 
-#define    CLK_SSMC      (1 << 14)
-#define    CLK_SMAC      (1 << 13)
-#define    CLK_SUSB      (1 << 12)
-#define    CLK_SUART3    (1 << 11)
-#define    CLK_SUART2    (1 << 10)
-#define    CLK_SUART1    (1 << 9)
-#define    CLK_SUART0    (1 << 8)
-#define    CLK_SSSI      (1 << 7)
-#define    CLK_SAC97     (1 << 6)
-#define    CLK_SMMCSD    (1 << 5)
-#define    CLK_SEMI      (1 << 4)
-#define    CLK_SDMAC     (1 << 3)
-#define    CLK_SPWM      (1 << 2)
-#define    CLK_SLCDC     (1 << 1)
-#define    CLK_SESRAM    (1)
-
-
-/*Interrupt Sources*/
-
-
-#define  INTSRC_RTC        31		        
-#define  INTSRC_DMAC       30	                
-#define  INTSRC_EMI        29
-#define  INTSRC_MAC        28
-#define  INTSRC_TIMER1     27
-#define  INTSRC_TIMER2     26
-#define  INTSRC_TIMER3     25
-#define  INTSRC_UART0      24
-#define  INTSRC_UART1      23
-#define  INTSRC_UART2      22
-#define  INTSRC_UART3      21
-#define  INTSRC_PWM        20
-#define  INTSRC_LCDC       19
-#define  INTSRC_I2S        18
-#define  INTSRC_SSI        17
-
-#define  INTSRC_USB        15
-#define  INTSRC_SMC0       14
-#define  INTSRC_SMC1       13
-#define  INTSRC_SDIO       12  
-#define  INTSRC_EXINT10    11              
-#define  INTSRC_EXINT9     10              
-#define  INTSRC_EXINT8     9               
-#define  INTSRC_EXINT7     8               
-#define  INTSRC_EXINT6     7               
-#define  INTSRC_EXINT5     6               
-#define  INTSRC_EXINT4     5               
-#define  INTSRC_EXINT3     4               
-#define  INTSRC_EXINT2     3               
-#define  INTSRC_EXINT1     2               
-#define  INTSRC_EXINT0     1
-#define  INTSRC_NULL       0
-
-
-/*Sereral useful macros*/
-#define set_plevel(plevel)          *(RP)INTC_IPLR = plevel                      //������ͨ�жϵ����ȼ����ޣ�ֻ�����ȼ����ڴ�ֵ���жϲ���ͨ��
-#define set_int_force(intnum)       *(RP)INTC_IFR = (1 << intnum)                //��1������ǿ�Ƹ�λ��Ӧ���ж�Դ�����ж��ź�
-#define enable_irq(intnum)          *(RP)INTC_IER |= (1 << intnum)               //��1�������ж�Դ��IRQ �ж��ź�
-#define disable_irq( intnum)        *(RP)INTC_IER &= ~(1<< intnum)               //��0�󣬲������ж�Դ��IRQ �ж��ź�
-#define mask_irq(intnum)            *(RP)INTC_IMR |= (1 << intnum)               //��1�����ζ�Ӧ��IRQ �ж��ź�               
-#define unmask_irq(intnum)          *(RP)INTC_IMR &= ~(1 << intnum)              //��0��ͨ����Ӧ��IRQ �ж��ź�
-#define mask_all_irq()              *(RP)INTC_IMR = 0xFFFFFFFF                   //���ζ�Ӧ��IRQ �ж��ź�
-#define unmask_all_irq()            *(RP)INTC_IMR = 0x00000000                   //ͨ����Ӧ��IRQ �ж��ź�
-#define enable_all_irq()            *(RP)INTC_IER = 0XFFFFFFFF                   //�����ж�Դ��IRQ �ж��ź�
-#define disable_all_irq()           *(RP)INTC_IER = 0X00000000                   //�������ж�Դ��IRQ �ж��ź�
-#define InitInt()                  do{mask_all_irq(); enable_all_irq();}while(0)
-
-/*
- **************************************
- * ���г������õ���Typedef
- **************************************
- */
- 
-typedef    char                 S8;        /* signed 8-bit integer */
-typedef    short                S16;       /* signed 16-bit integer */
-typedef    long                 S32;       /* signed 32-bit integer */
-typedef    unsigned char        U8;        /* unsigned 8-bit integer */
-typedef    unsigned short       U16;       /* unsigned 16-bit integer */
-typedef    unsigned long        U32;       /* unsigned 32-bit integer */
-
-typedef    volatile U32 *       RP;
-typedef    volatile U16 *       RP16;
-typedef    volatile U8  *       RP8;
-
-typedef    void                 *VP;       /* pointer to an unpredictable data type */
-typedef    void                 (*FP)();   /* program start address */
-
-#ifndef    _BOOL_TYPE_
-#define    _BOOL_TYPE_
-typedef    int                  BOOL;	     /* Boolean value.  TRUE (1) or FALSE (0). */
-#endif  
-
-typedef    int                  ER;         /* Error code.  A signed integer. */
-
-/**
- * IO definitions
- *
- * define access restrictions to peripheral registers
- */
-
-#define     __I     volatile const            /*!< defines 'read only' permissions      */
-#define     __O     volatile                  /*!< defines 'write only' permissions     */
-#define     __IO    volatile                  /*!< defines 'read / write' permissions   */
-#define     __iomem volatile
-
-
-/*Macros for debug*/
-
-#define EOUT(fmt,...) \
-	do \
-	{ 	\
-		rt_kprintf("EOUT:(%s:%i)  ",__FILE__,__LINE__); \
-		rt_kprintf(fmt,##__VA_ARGS__); \
-	}while(0)
-
-#define RT_DEBUG
-#ifdef RT_DEBUG
-	#define DBOUT(fmt,...) \
-	do \
-	{ 	\
-		rt_kprintf("DBOUT:(%s:%i)  ",__FILE__,__LINE__); \
-		rt_kprintf(fmt,##__VA_ARGS__); \
-	}while(0)
-#else
-	#define DBOUT(fmt,...) \
-	do{}while(0)
-#endif
-
-#ifdef	RT_DEBUG
-	#define ASSERT(arg) \
-	if((arg) == 0) \
-	{		\
-		while(1) \
-		{		  \
-			rt_kprintf("have a assert failure\n"); \
-		}										 \
-	}
-#else
-	#define ASSERT(arg) \
-	do		\
-	{		 \
-	}while(0)
-#endif
-
-
-#define write_reg(reg,value) \
-	do \
-	{ \
-		*(RP)(reg) = value; \
-	}while(0)
-
-#define read_reg(reg) (*(RP)reg)
-
-
-struct rt_hw_register
-{
-	rt_uint32_t r0;
-	rt_uint32_t r1;
-	rt_uint32_t r2;
-	rt_uint32_t r3;
-	rt_uint32_t r4;
-	rt_uint32_t r5;
-	rt_uint32_t r6;
-	rt_uint32_t r7;
-	rt_uint32_t r8;
-	rt_uint32_t r9;
-	rt_uint32_t r10;
-	rt_uint32_t fp;
-	rt_uint32_t ip;
-	rt_uint32_t sp;
-	rt_uint32_t lr;
-	rt_uint32_t pc;
-	rt_uint32_t cpsr;
-	rt_uint32_t ORIG_r0;
-};
-
-
-/*@}*/
-
-#endif
diff --git a/bsp/evb4020/src/serial.c b/bsp/evb4020/src/serial.c
deleted file mode 100755
index c9dbc3c025..0000000000
--- a/bsp/evb4020/src/serial.c
+++ /dev/null
@@ -1,282 +0,0 @@
-/*
- * File      : serial.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2006-03-13     Bernard      first version
- * 2009-04-20     yi.qiu      modified according bernard's stm32 version
- * 2010-10-6      wangmeng    added sep4020 surpport     	  	
- */
-#include <rtthread.h>
-#include <rthw.h>
-#include "serial.h"
-
-/**
- * @addtogroup SEP4020
- */
-/*@{*/
-
-/* RT-Thread Device Interface */
-/**
- * This function initializes serial
- */
-static rt_err_t rt_serial_init (rt_device_t dev)
-{
-	struct serial_device* uart = (struct serial_device*) dev->user_data;
-
-	if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
-	{
-
-		if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			rt_memset(uart->int_rx->rx_buffer, 0, 
-				sizeof(uart->int_rx->rx_buffer));
-			uart->int_rx->read_index = uart->int_rx->save_index = 0;
-		}
-		
-		if (dev->flag & RT_DEVICE_FLAG_INT_TX)
-		{
-			rt_memset(uart->int_tx->tx_buffer, 0, 
-				sizeof(uart->int_tx->tx_buffer));
-			uart->int_tx->write_index = uart->int_tx->save_index = 0;
-		}
-
-		dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
-	}
-
-	return RT_EOK;
-}
-
-/* save a char to serial buffer */
-static void rt_serial_savechar(struct serial_device* uart, char ch)
-{
-	rt_base_t level;
-	
-	/* disable interrupt */
-	level = rt_hw_interrupt_disable();
-
-	uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
-	uart->int_rx->save_index ++;
-	if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
-		uart->int_rx->save_index = 0;
-	
-	/* if the next position is read index, discard this 'read char' */
-	if (uart->int_rx->save_index == uart->int_rx->read_index)
-	{
-		uart->int_rx->read_index ++;
-		if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-			uart->int_rx->read_index = 0;
-	}
-
-	/* enable interrupt */
-	rt_hw_interrupt_enable(level);
-}
-
-static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
-{
-	RT_ASSERT(dev != RT_NULL);	
-	return RT_EOK;
-}
-
-static rt_err_t rt_serial_close(rt_device_t dev)
-{
-	RT_ASSERT(dev != RT_NULL);	
-	return RT_EOK;
-}
-
-static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
-{
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct serial_device* uart;
-	
-	ptr = buffer;
-	err_code = RT_EOK;
-	uart = (struct serial_device*)dev->user_data;
-
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		rt_base_t level;
-
-		/* interrupt mode Rx */
-		while (size)
-		{
-			if (uart->int_rx->read_index != uart->int_rx->save_index)
-			{
-				*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
-				size --;
-
-				/* disable interrupt */
-				level = rt_hw_interrupt_disable();
-
-				uart->int_rx->read_index ++;
-				if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-					uart->int_rx->read_index = 0;
-
-				/* enable interrupt */
-				rt_hw_interrupt_enable(level);
-			}
-			else
-			{
-				/* set error code */
-				err_code = -RT_EEMPTY;
-				break;
-			}
-		}
-	}
-	else
-	{
-		/* polling mode */
-		while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
-		{
-			while (uart->uart_device->lsr & USTAT_RCV_READY)
-			{
-				*ptr = uart->uart_device->dlbl_fifo.txfifo & 0xff;
-				ptr ++;
-			}
-		}
-	}
-
-	/* set error code */
-	rt_set_errno(err_code);
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;	
-}
-
-static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
-{	
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct serial_device* uart;
-	
-	err_code = RT_EOK;
-	ptr = (rt_uint8_t*)buffer;
-	uart = (struct serial_device*)dev->user_data;
-
-	if (dev->flag & RT_DEVICE_FLAG_INT_TX)
-	{
-		/* interrupt mode Tx */
-		while (uart->int_tx->save_index != uart->int_tx->write_index)
-		{
-			/* save on tx buffer */
-			uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
-			
-			-- size;
-
-			/* move to next position */
-			uart->int_tx->save_index ++;
-			
-			/* wrap save index */
-			if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
-				uart->int_tx->save_index = 0;
-		}
-		
-		/* set error code */
-		if (size > 0)
-			err_code = -RT_EFULL;
-	}
-	else
-	{
-		/* polling mode */
-		while (size)
-		{
-			/*
-			 * to be polite with serial console add a line feed
-			 * to the carriage return character
-			 */
-			if (*ptr == '\n' && (dev->flag & RT_DEVICE_FLAG_STREAM))
-			{
-				while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY));
-				uart->uart_device->dlbl_fifo.txfifo = '\r';
-			}
-
-			while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY));
-			uart->uart_device->dlbl_fifo.txfifo = (*ptr & 0x1FF);
-
-			++ptr; --size;
-		}
-	}	
-
-	/* set error code */
-	rt_set_errno(err_code);
-	
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
-}
-
-static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
-{
-	RT_ASSERT(dev != RT_NULL);
-
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		break;
-	
-	case RT_DEVICE_CTRL_RESUME:
-		/* resume device */
-		dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
-		break;
-	}
-	
-	return RT_EOK;
-}
-
-/*
- * serial register
- */
-rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial)
-{
-	RT_ASSERT(device != RT_NULL);
-
-	device->type 		= RT_Device_Class_Char;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_serial_init;
-	device->open		= rt_serial_open;
-	device->close		= rt_serial_close;
-	device->read 		= rt_serial_read;
-	device->write 		= rt_serial_write;
-	device->control 	= rt_serial_control;
-	device->user_data   = serial;
-
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
-}
-	
-/* ISR for serial interrupt */
-void rt_hw_serial_isr(rt_device_t device)
-{
-	struct serial_device* uart = (struct serial_device*) device->user_data;
-	
-	/* interrupt mode receive */	
-	RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
-
-	/* save on rx buffer */
-	while (uart->uart_device->lsr & USTAT_RCV_READY)
-	{
-		rt_serial_savechar(uart, uart->uart_device->dlbl_fifo.rxfifo & 0xff);
-	}
-
-	/* invoke callback */
-	if (device->rx_indicate != RT_NULL)
-	{
-		rt_size_t rx_length;
-		
-		/* get rx length */
-		rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
-			UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
-			uart->int_rx->save_index - uart->int_rx->read_index;
-
-		device->rx_indicate(device, rx_length);
-	}
-}
-
-/*@}*/
-
diff --git a/bsp/evb4020/src/serial.h b/bsp/evb4020/src/serial.h
deleted file mode 100755
index f903c1e1a5..0000000000
--- a/bsp/evb4020/src/serial.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * File      : serial.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2006-03-13     Bernard      first version
- * 2009-04-20     yi.qiu      modified according bernard's stm32 version
- * 2010-10-6      wangmeng    added sep4020 surpport     	  	
- */
-
-#ifndef __SERIAL_H__
-#define __SERIAL_H__
-
-#include <sep4020.h>
-
-#define	USTAT_RCV_READY		0x01   	/* receive data ready */ 
-#define	USTAT_TXB_EMPTY		0x40   	/* tx buffer empty */
-#define BPS					115200	/* serial baudrate */
-
-#define UART_RX_BUFFER_SIZE		64
-#define UART_TX_BUFFER_SIZE		64
-
-/*For sep4020's uart have several secondary function*/
-/*we use union to decribe it*/
-
-union dlbl_fifo
-{
-	rt_uint32_t dlbl;
-	rt_uint32_t rxfifo;
-	rt_uint32_t txfifo;	
-};
-
-union dlbh_ier
-{
-	rt_uint32_t dlbh;
-	rt_uint32_t ier;
-};
-
-union iir_fcr
-{
-	rt_uint32_t iir;
-	rt_uint32_t fcr;
-};
-
-struct serial_int_rx
-{
-	rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
-	rt_uint32_t read_index, save_index;
-};
-
-struct serial_int_tx
-{
-	rt_uint8_t  tx_buffer[UART_TX_BUFFER_SIZE];
-	rt_uint32_t write_index, save_index;
-};
-
-typedef struct uartport
-{
-	union dlbl_fifo dlbl_fifo;
-	union dlbh_ier	dlbh_ier;
-	union iir_fcr	iir_fcr;
-	rt_uint32_t lcr;
-	rt_uint32_t mcr;
-	rt_uint32_t lsr;
-	rt_uint32_t msr;
-}uartport;
-
-struct serial_device
-{
-	uartport* uart_device;
-	
-	/* rx structure */
-	struct serial_int_rx* int_rx;
-
-	/* tx structure */
-	struct serial_int_tx* int_tx;
-};
-
-rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial);
-
-void rt_hw_serial_isr(rt_device_t device);
-
-
-#endif
diff --git a/bsp/evb4020/src/startup.c b/bsp/evb4020/src/startup.c
deleted file mode 100755
index 1a13aacdf4..0000000000
--- a/bsp/evb4020/src/startup.c
+++ /dev/null
@@ -1,119 +0,0 @@
-#include <rthw.h>
-#include <rtthread.h>
-
-#include <sep4020.h>
-#include <board.h>
-#include <serial.h>
-#include <finsh.h>
-
-#ifdef RT_USING_LWIP
-#include <lwip/sys.h>
-#include <netif/ethernetif.h>
-#endif
-
-#define SDRAM_BASE	0x30000000
-
-
-#ifdef __CC_ARM
-extern int Image$$RW_RAM1$$ZI$$Limit;
-#endif
-
-extern void rt_application_init(void);
-extern void finsh_system_init(void);
-
-extern void sd_init(void);
-extern rt_uint8_t sd_readblock(rt_uint32_t address, rt_uint8_t* buf);
-extern rt_uint8_t sd_writeblock(rt_uint32_t address, rt_uint8_t* buf);
-
-extern struct serial_device uart0;
-extern struct rt_device uart0_device;
-
-
-void rtthread_startup()
-{
-	/* init hardware interrupt */
-	rt_hw_interrupt_init();
-
-	/* init board */
-	rt_hw_board_init();
-
-	/* show version */
-	rt_show_version();
-		
-	/* init tick */
-	rt_system_tick_init();
-
-	/* init kernel object */
-	rt_system_object_init();
-
-	/* init timer system */
-	rt_system_timer_init();
-
-	/* init heap memory system */
-#ifdef __CC_ARM
-	rt_kprintf("base=%p\n",&Image$$RW_RAM1$$ZI$$Limit);
-	rt_system_heap_init((void*)&Image$$RW_RAM1$$ZI$$Limit, (void*)(SDRAM_BASE + 0x200000));
-#else
-	rt_system_heap_init(&__bss_end, (void*)0x34000000);
-#endif
-
-	/* init scheduler system */
-	rt_system_scheduler_init();
-
-#ifdef RT_USING_DEVICE
-	/* register uart0 */
-	rt_hw_serial_register(&uart0_device, "uart0",
-		RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
-		&uart0);
-
-
-#ifdef RT_USING_DFS
-	rt_hw_sdcard_init();
-#endif
-
-#ifdef RT_USING_LWIP
-	eth_system_device_init();
-	rt_hw_dm9161_init();
-#endif
-	
-	/*init all registed devices */
-	rt_device_init_all();
-#endif
-
-	/* init application */
-	rt_application_init();
-
-#ifdef RT_USING_FINSH
-	/* init finsh */
-	finsh_system_init();
-#ifdef RT_USING_DEVICE
-	finsh_set_device("uart0");
-#endif
-#endif
-
-	/* init idle thread */
-	rt_thread_idle_init();
-
-	/* start scheduler */
-	rt_system_scheduler_start();
-
-	/* never reach here */
-	return ;
-	
-}
-
-int main()
-{
-	rt_uint32_t UNUSED level;
-
-	/* disable interrupt first */
-	level = rt_hw_interrupt_disable();
-
-	/* startup RT-Thread RTOS */
-	rtthread_startup();
-
-	return 0;
-}
-
-
-
diff --git a/bsp/evb4020/src/tcpsendpacket.c b/bsp/evb4020/src/tcpsendpacket.c
deleted file mode 100755
index 33198b695b..0000000000
--- a/bsp/evb4020/src/tcpsendpacket.c
+++ /dev/null
@@ -1,63 +0,0 @@
-#include <rtthread.h>
-#include <lwip/netdb.h> /* Ϊ�˽�������������Ҫ����netdb.hͷ�ļ� */
-#include <lwip/sockets.h> /* ʹ��BSD socket����Ҫ����sockets.hͷ�ļ� */
-
-void tcp_senddata(const char* url, int port, int length)
-{
-	struct hostent *host;
-	int sock, err, result, timeout, index;
-	struct sockaddr_in server_addr;
-	rt_uint8_t *buffer_ptr;
-
-	/* ͨ��������ڲ���url���host��ַ��������������������������� */
-	host = gethostbyname(url);
-	/* ����һ��socket��������SOCKET_STREAM��TCP���� */
-	if ((sock = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP)) == -1)
-	{
-		/* ����socketʧ�� */
-		rt_kprintf("Socket error\n");
-		return;
-	}
-
-	/* �����ڴ� */
-	buffer_ptr = rt_malloc(length);
-	/* ���췢������ */
-	for (index = 0; index < length; index ++)
-		buffer_ptr[index] = index & 0xff;
-
-	timeout = 100;
-	/* ���÷��ͳ�ʱʱ��100ms */
-	lwip_setsockopt(sock, SOL_SOCKET, SO_SNDTIMEO, &timeout, sizeof(timeout));
-	/* ��ʼ��Ԥ���ӵķ���˵�ַ */
-	server_adlidr.sin_family = AF_INET;
-	server_addr.sin_port = htons(port);
-	server_addr.sin_addr = *((struct in_addr *)host->h_addr);
-	rt_memset(&(server_addr.sin_zero), 0, sizeof(server_addr.sin_zero));
-
-	/* ���ӵ������ */
-	err = connect(sock, (struct sockaddr *)&server_addr, sizeof(struct sockaddr));
-	rt_kprintf("TCP thread connect error code: %d\n", err);
-
-	while(1)
-	{
-		/* �������ݵ�sock���� */
-		result = send(sock, buffer_ptr, length, MSG_DONTWAIT);
-		if(result == -1) //���ݷ��ʹ�����
-		{
-			rt_kprintf("TCP thread send error: %d\n", result);
-			lwip_close(sock);	//�ر����ӣ����´�������
-			rt_thread_delay(10);
-			if ((sock = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP)) == -1)
-				rt_kprintf("TCP Socket error:%d\n",sock);
-			err = connect(sock, (struct sockaddr *)&server_addr, sizeof(struct sockaddr));
-			rt_kprintf("TCP thread connect error code: %d\n", err);
-		}
-	}
-}
-
-#ifdef RT_USING_FINSH
-#include <finsh.h>
-/* ���tcpclient������finsh shell�� */
-FINSH_FUNCTION_EXPORT(tcp_senddata, send a packet through tcp connection);
-#endif
-
diff --git a/bsp/sep4020/Ext_SDRAM.ini b/bsp/sep4020/Ext_SDRAM.ini
deleted file mode 100644
index 19cb88911b..0000000000
--- a/bsp/sep4020/Ext_SDRAM.ini
+++ /dev/null
@@ -1,40 +0,0 @@
-/******************************************************************************/
-/* Ext_RAM.INI: External RAM (SDRAM) Initialization File                      */
-/******************************************************************************/
-// <<< Use Configuration Wizard in Context Menu >>>                           // 
-/******************************************************************************/
-/* This file is part of the uVision/ARM development tools.                    */
-/* Copyright (c) 2005-2008 Keil Software. All rights reserved.                */
-/* This software may only be used under the terms of a valid, current,        */
-/* end user licence from KEIL for a compatible version of KEIL software       */
-/* development tools. Nothing else gives you the right to use this software.  */
-/******************************************************************************/
-
-
-FUNC void SetupForStart (void) {
-
-// <o> Program Entry Point
-  PC = 0x30000000;
-}
-
-
-FUNC void Init (void) {
-
-  _WDWORD(0x1000200C, 0x00000000);      // Disable Watchdog
-
-                                        // Clock Setup 
-                                        
-  _WDWORD(0x10001000, 0x00fa00fa);      // 
-  _WDWORD(0x10001014, 0x00000001);      // 
-  _WDWORD(0x10001004, 0x00004009);      // 
-  _WDWORD(0x10001004, 0x0000C009);       // 
-  _WDWORD(0x11000018, 0x1E104177);      // 
-  _WDWORD(0x1100001c, 0x80001860);      // 
-
-
-}
-
-Init();                                 // Initialize memory
-LOAD build\rtthread-sep4020.axf INCREMENTAL         // Download program
-SetupForStart();                        // Setup for Running
-g, main                                 // Goto Main
diff --git a/bsp/sep4020/Memory.ini b/bsp/sep4020/Memory.ini
deleted file mode 100644
index 205cc469ec..0000000000
--- a/bsp/sep4020/Memory.ini
+++ /dev/null
@@ -1,14 +0,0 @@
-/******************************************************************************/
-/* MEMORY.INI: Memory Debug Initialization File                               */
-/******************************************************************************/
-/* This file is part of the uVision/ARM development tools.                    */
-/* Copyright (c) 2005-2006 Keil Software. All rights reserved.                */
-/* This software may only be used under the terms of a valid, current,        */
-/* end user licence from KEIL for a compatible version of KEIL software       */
-/* development tools. Nothing else gives you the right to use this software.  */
-/******************************************************************************/
-
-MAP 0x00000000,0x0000FFFF READ EXEC    // External ROM
-MAP 0x30000000,0x31FFFFFF READ WRITE   // External RAM
-MAP 0x10000000,0x11000000 READ WRITE
-MAP 0x11000000,0x12000000 READ WRITE
diff --git a/bsp/sep4020/application.c b/bsp/sep4020/application.c
deleted file mode 100644
index 5245e52346..0000000000
--- a/bsp/sep4020/application.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * File      : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-01-05     Bernard      the first version
- */
-
-/**
- * @addtogroup SEP4020
- */
-/*@{*/
-
-#include <rtthread.h>
-#include "board.h"
-
-static void rt_thread_entry_led1(void* parameter)
-{
-    /* init led configuration */
-    /* rt_hw_led_init(); */  
-
-    while (1)
-    {
-        /* led on */
-        //rt_kprintf("led1 on\r\n");
-        GPIO_PORTE_DATA |= 0x1<<3;
-        rt_thread_delay(50); /* sleep 0.5 second and switch to other thread */
-
-        /* led off */
-        //rt_kprintf("led1 off\r\n");
-        GPIO_PORTE_DATA &= ~(0x1<<3);
-        rt_thread_delay(50);
-    }
-}
-
-char thread_led2_stack[1024];
-struct rt_thread thread_led2;
-void rt_thread_entry_led2(void* parameter)
-{
-    unsigned int count=0;
-    while (1)
-    {
-        /* led on */
-        //rt_kprintf("led2 on,count : %d\r\n",count);
-        count++;
-        GPIO_PORTE_DATA |= 0x1<<4;
-        rt_thread_delay(RT_TICK_PER_SECOND);
-
-        /* led off */
-        //rt_kprintf("led2 off\r\n");
-        GPIO_PORTE_DATA &= ~(0x1<<4);
-        rt_thread_delay(RT_TICK_PER_SECOND);
-    }
-}
-
-int rt_application_init()
-{
-    rt_thread_t thread;
-
-    /* create led1 thread */
-    thread = rt_thread_create("led1",
-                              rt_thread_entry_led1, RT_NULL,
-                              512,
-                              20, 5);
-    if (thread != RT_NULL)
-        rt_thread_startup(thread);
-
-    //------- init led2 thread
-    rt_thread_init(&thread_led2,
-                   "led2",
-                   rt_thread_entry_led2,
-                   RT_NULL,
-                   &thread_led2_stack[0],
-                   sizeof(thread_led2_stack),10,10);
-    rt_thread_startup(&thread_led2);
-
-    return 0;
-}
-
-/*@}*/
diff --git a/bsp/sep4020/board.c b/bsp/sep4020/board.c
deleted file mode 100644
index 162b491f25..0000000000
--- a/bsp/sep4020/board.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * File      : board.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2006-08-23     Bernard      first implementation
- */
-
-#include <rtthread.h>
-#include <rthw.h>
-
-#include <sep4020.h>
-#include "board.h"
-#include "serial.h"
-
-/**
- * @addtogroup sep4020
- */
-/*@{*/
-
-extern rt_uint32_t rt_hw_get_clock(void);
-
-/* uart0 */
-#define UART0	((struct uartport *)UART0BASE)
-struct serial_int_rx uart0_int_rx;
-struct serial_device uart0 =
-{
-	UART0,
-	&uart0_int_rx,
-	RT_NULL
-};
-struct rt_device uart0_device;
-/**
- * This is the timer interrupt service routine.
- * @param vector the irq number for timer
- */
-void rt_hw_timer_handler(int vector)
-{
-    /* clear interrupt */        
-    TIMER_T1ISCR;
-	/* increase a tick */
-	rt_tick_increase();
-}
-
-/**
- * This is the uart0 interrupt service routine.
- * @param vector the irq number for uart0
- */
-void rt_serial_handler(int vector)
-{
-	rt_hw_serial_isr(&uart0_device);
-}
-
-/**
- * This function will handle init uart.
- */
-void rt_hw_uart_init(void)
-{
-    rt_uint32_t baud;
-    rt_uint32_t sysclock;
-
-    sysclock = rt_hw_get_clock();
-    /* caculate baud rate register */
-    baud = sysclock/16/BR;
-
-	/* LCR  */
-	uart0.uart_device->lcr = 0x83;
-	/* DLBH, IER  */
-	uart0.uart_device->dlbh_ier = (baud>>8)&0xff;;
-	/* DLBL */
-	uart0.uart_device->dlbl_rxfifo_txfifo = baud&0xff;
-	/* LCR */
-	uart0.uart_device->lcr = 0x03;
-	/* IER */
-	uart0.uart_device->dlbh_ier = 0x01;
-	/* FCR */
-	uart0.uart_device->iir_fcr = 0x00;
-
- 	rt_hw_serial_register(&uart0_device, "uart0",
-		RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
-		&uart0);
-	/* install uart isr */
-	INTC_IER  |= (1<<INT_UART0);
-
-	rt_hw_interrupt_install(INT_UART0, rt_serial_handler, RT_NULL);
-	rt_hw_interrupt_umask(INT_UART0);
-}
-/** 
- * This function will init led on the board
- */
-static void rt_hw_board_led_init(void)
-{
-  /* PE3 PE4 PE5 for led */
-  GPIO_PORTE_SEL |=0x38; /* GPIO */
-  
-  GPIO_PORTE_DIR &= ~0x38; /* output*/
-
-  GPIO_PORTE_DATA &= ~0x38;  /* low */
-}
-
-/**
- * This function will init timer1 for system ticks
- */
- static void rt_hw_timer_init(void)
- {
-	TIMER_T1CR = 0x06;	                    /* reload mode and interrupt enable   */
-	TIMER_T1LCR = 0xAFC80;	                /* 10ms under 72MHz 0xAFC80=720000    */
-
-    INTC_IER  |= (1<<INT_TIMER1);           /* interrupt enable                   */
-
-    rt_hw_interrupt_install(INT_TIMER1, rt_hw_timer_handler, RT_NULL);
-	rt_hw_interrupt_umask(INT_TIMER1);
-
-    TIMER_T1CR |= 0x01;                     /* enable the timer 1                 */
- }
-
-/**
- * This function will initial sam7x board.
- */
-void rt_hw_board_init()
-{
-	
-	/* init hardware uart */
-	rt_hw_uart_init();
-	rt_console_set_device("uart0");
-
-	/* init led */
-	rt_hw_board_led_init();
-
-	/* init timer for tick */
-    rt_hw_timer_init();
-	
-}
-/*@}*/
diff --git a/bsp/sep4020/board.h b/bsp/sep4020/board.h
deleted file mode 100644
index 1edc635bdc..0000000000
--- a/bsp/sep4020/board.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * File      : board.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2006-10-08     Bernard      add board.h to this bsp
- */
-
-#ifndef __BOARD_H__
-#define __BOARD_H__
-
-#include <rthw.h>
-#include <rtthread.h>
-#include <sep4020.h>
-
-#define BR    	115200			/* Baud Rate */
-
-void rt_hw_board_init(void);
-
-#endif
diff --git a/bsp/sep4020/project.uvopt b/bsp/sep4020/project.uvopt
deleted file mode 100644
index 5c2cc3ee9c..0000000000
--- a/bsp/sep4020/project.uvopt
+++ /dev/null
@@ -1,4139 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
-
-  <SchemaVersion>1.0</SchemaVersion>
-
-  <Header>### uVision Project, (C) Keil Software</Header>
-
-  <Extensions>
-    <cExt>*.c</cExt>
-    <aExt>*.s*; *.src; *.a*</aExt>
-    <oExt>*.obj</oExt>
-    <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
-    <pExt>*.plm</pExt>
-    <CppX>*.cpp</CppX>
-  </Extensions>
-
-  <DaveTm>
-    <dwLowDateTime>0</dwLowDateTime>
-    <dwHighDateTime>0</dwHighDateTime>
-  </DaveTm>
-
-  <Target>
-    <TargetName>RT-Thread/SEP4020</TargetName>
-    <ToolsetNumber>0x4</ToolsetNumber>
-    <ToolsetName>ARM-ADS</ToolsetName>
-    <TargetOption>
-      <CLKADS>14745600</CLKADS>
-      <OPTTT>
-        <gFlags>1</gFlags>
-        <BeepAtEnd>1</BeepAtEnd>
-        <RunSim>1</RunSim>
-        <RunTarget>0</RunTarget>
-      </OPTTT>
-      <OPTHX>
-        <HexSelection>1</HexSelection>
-        <FlashByte>65535</FlashByte>
-        <HexRangeLowAddress>0</HexRangeLowAddress>
-        <HexRangeHighAddress>0</HexRangeHighAddress>
-        <HexOffset>0</HexOffset>
-      </OPTHX>
-      <OPTLEX>
-        <PageWidth>79</PageWidth>
-        <PageLength>66</PageLength>
-        <TabStop>8</TabStop>
-        <ListingPath>.\build\</ListingPath>
-      </OPTLEX>
-      <ListingPage>
-        <CreateCListing>1</CreateCListing>
-        <CreateAListing>1</CreateAListing>
-        <CreateLListing>1</CreateLListing>
-        <CreateIListing>0</CreateIListing>
-        <AsmCond>1</AsmCond>
-        <AsmSymb>1</AsmSymb>
-        <AsmXref>0</AsmXref>
-        <CCond>1</CCond>
-        <CCode>0</CCode>
-        <CListInc>0</CListInc>
-        <CSymb>0</CSymb>
-        <LinkerCodeListing>0</LinkerCodeListing>
-      </ListingPage>
-      <OPTXL>
-        <LMap>1</LMap>
-        <LComments>1</LComments>
-        <LGenerateSymbols>1</LGenerateSymbols>
-        <LLibSym>1</LLibSym>
-        <LLines>1</LLines>
-        <LLocSym>1</LLocSym>
-        <LPubSym>1</LPubSym>
-        <LXref>0</LXref>
-        <LExpSel>0</LExpSel>
-      </OPTXL>
-      <OPTFL>
-        <tvExp>1</tvExp>
-        <tvExpOptDlg>0</tvExpOptDlg>
-        <IsCurrentTarget>1</IsCurrentTarget>
-      </OPTFL>
-      <CpuCode>0</CpuCode>
-      <DllOpt>
-        <SimDllName>SARM.DLL</SimDllName>
-        <SimDllArguments></SimDllArguments>
-        <SimDlgDllName>DARMSH.DLL</SimDlgDllName>
-        <SimDlgDllArguments></SimDlgDllArguments>
-        <TargetDllName>SARM.DLL</TargetDllName>
-        <TargetDllArguments></TargetDllArguments>
-        <TargetDlgDllName>TARMSH.DLL</TargetDlgDllName>
-        <TargetDlgDllArguments></TargetDlgDllArguments>
-      </DllOpt>
-      <DebugOpt>
-        <uSim>0</uSim>
-        <uTrg>1</uTrg>
-        <sLdApp>1</sLdApp>
-        <sGomain>0</sGomain>
-        <sRbreak>1</sRbreak>
-        <sRwatch>1</sRwatch>
-        <sRmem>1</sRmem>
-        <sRfunc>1</sRfunc>
-        <sRbox>1</sRbox>
-        <tLdApp>1</tLdApp>
-        <tGomain>1</tGomain>
-        <tRbreak>0</tRbreak>
-        <tRwatch>1</tRwatch>
-        <tRmem>1</tRmem>
-        <tRfunc>0</tRfunc>
-        <tRbox>1</tRbox>
-        <sRunDeb>0</sRunDeb>
-        <sLrtime>0</sLrtime>
-        <nTsel>6</nTsel>
-        <sDll></sDll>
-        <sDllPa></sDllPa>
-        <sDlgDll></sDlgDll>
-        <sDlgPa></sDlgPa>
-        <sIfile>.\Memory.ini</sIfile>
-        <tDll></tDll>
-        <tDllPa></tDllPa>
-        <tDlgDll></tDlgDll>
-        <tDlgPa></tDlgPa>
-        <tIfile>.\Ext_SDRAM.ini</tIfile>
-        <pMon>Segger\JLTAgdi.dll</pMon>
-      </DebugOpt>
-      <TargetDriverDllRegistry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DLGTARM</Key>
-          <Name></Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>ARMDBGFLAGS</Key>
-          <Name></Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>JLTDLG</Key>
-          <Name></Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>JLTAgdi</Key>
-          <Name></Name>
-        </SetRegEntry>
-      </TargetDriverDllRegistry>
-      <DebugFlag>
-        <trace>0</trace>
-        <periodic>0</periodic>
-        <aLwin>1</aLwin>
-        <aCover>0</aCover>
-        <aSer1>0</aSer1>
-        <aSer2>0</aSer2>
-        <aPa>0</aPa>
-        <viewmode>1</viewmode>
-        <vrSel>0</vrSel>
-        <aSym>0</aSym>
-        <aTbox>0</aTbox>
-        <AscS1>0</AscS1>
-        <AscS2>0</AscS2>
-        <AscS3>0</AscS3>
-        <aSer3>0</aSer3>
-        <eProf>0</eProf>
-        <aLa>0</aLa>
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-                  <IncludePath></IncludePath>
-                </VariousControls>
-              </Cads>
-              <Aads>
-                <interw>2</interw>
-                <Ropi>2</Ropi>
-                <Rwpi>2</Rwpi>
-                <thumb>2</thumb>
-                <SplitLS>2</SplitLS>
-                <SwStkChk>2</SwStkChk>
-                <NoWarn>2</NoWarn>
-                <VariousControls>
-                  <MiscControls></MiscControls>
-                  <Define></Define>
-                  <Undefine></Undefine>
-                  <IncludePath></IncludePath>
-                </VariousControls>
-              </Aads>
-            </GroupArmAds>
-          </GroupOption>
-          <Files>
-            <File>
-              <FileName>dhcp.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\dhcp.c</FilePath>
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-            <File>
-              <FileName>dns.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\dns.c</FilePath>
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-              <FileName>init.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\init.c</FilePath>
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-              <FileName>netif.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\netif.c</FilePath>
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-              <FileName>pbuf.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\pbuf.c</FilePath>
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-              <FileName>raw.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\raw.c</FilePath>
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-              <FileName>stats.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\stats.c</FilePath>
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-              <FileName>sys.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\sys.c</FilePath>
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-              <FileName>tcp.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\tcp.c</FilePath>
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-              <FileName>tcp_in.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\tcp_in.c</FilePath>
-            </File>
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-              <FileName>tcp_out.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\tcp_out.c</FilePath>
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-            <File>
-              <FileName>udp.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\udp.c</FilePath>
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-              <FileName>autoip.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\ipv4\autoip.c</FilePath>
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-              <FileName>icmp.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\ipv4\icmp.c</FilePath>
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-            <File>
-              <FileName>igmp.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\ipv4\igmp.c</FilePath>
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-              <FileName>inet.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\ipv4\inet.c</FilePath>
-            </File>
-            <File>
-              <FileName>inet_chksum.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\ipv4\inet_chksum.c</FilePath>
-            </File>
-            <File>
-              <FileName>ip.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\ipv4\ip.c</FilePath>
-            </File>
-            <File>
-              <FileName>ip_addr.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\ipv4\ip_addr.c</FilePath>
-            </File>
-            <File>
-              <FileName>ip_frag.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\ipv4\ip_frag.c</FilePath>
-            </File>
-            <File>
-              <FileName>asn1_dec.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\snmp\asn1_dec.c</FilePath>
-            </File>
-            <File>
-              <FileName>asn1_enc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\snmp\asn1_enc.c</FilePath>
-            </File>
-            <File>
-              <FileName>mib2.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\snmp\mib2.c</FilePath>
-            </File>
-            <File>
-              <FileName>mib_structs.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\snmp\mib_structs.c</FilePath>
-            </File>
-            <File>
-              <FileName>msg_in.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\snmp\msg_in.c</FilePath>
-            </File>
-            <File>
-              <FileName>msg_out.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\snmp\msg_out.c</FilePath>
-            </File>
-            <File>
-              <FileName>api_lib.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\api\api_lib.c</FilePath>
-            </File>
-            <File>
-              <FileName>api_msg.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\api\api_msg.c</FilePath>
-            </File>
-            <File>
-              <FileName>err.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\api\err.c</FilePath>
-            </File>
-            <File>
-              <FileName>netbuf.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\api\netbuf.c</FilePath>
-            </File>
-            <File>
-              <FileName>netdb.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\api\netdb.c</FilePath>
-            </File>
-            <File>
-              <FileName>netifapi.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\api\netifapi.c</FilePath>
-            </File>
-            <File>
-              <FileName>tcpip.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\api\tcpip.c</FilePath>
-            </File>
-            <File>
-              <FileName>etharp.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\netif\etharp.c</FilePath>
-            </File>
-            <File>
-              <FileName>ethernetif.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\netif\ethernetif.c</FilePath>
-            </File>
-            <File>
-              <FileName>loopif.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\netif\loopif.c</FilePath>
-            </File>
-            <File>
-              <FileName>sys_arch_init.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\arch\sys_arch_init.c</FilePath>
-            </File>
-            <File>
-              <FileName>sys_arch.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\arch\sys_arch.c</FilePath>
-            </File>
-            <File>
-              <FileName>sockets.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\api\sockets.c</FilePath>
-            </File>
-            <File>
-              <FileName>memp.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\net\lwip\src\core\memp.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>filesystem</GroupName>
-          <GroupOption>
-            <CommonProperty>
-              <UseCPPCompiler>0</UseCPPCompiler>
-              <RVCTCodeConst>0</RVCTCodeConst>
-              <RVCTZI>0</RVCTZI>
-              <RVCTOtherData>0</RVCTOtherData>
-              <ModuleSelection>0</ModuleSelection>
-              <IncludeInBuild>0</IncludeInBuild>
-              <AlwaysBuild>0</AlwaysBuild>
-              <GenerateAssemblyFile>2</GenerateAssemblyFile>
-              <AssembleAssemblyFile>2</AssembleAssemblyFile>
-              <PublicsOnly>2</PublicsOnly>
-              <StopOnExitCode>11</StopOnExitCode>
-              <CustomArgument></CustomArgument>
-              <IncludeLibraryModules></IncludeLibraryModules>
-            </CommonProperty>
-            <GroupArmAds>
-              <Cads>
-                <interw>2</interw>
-                <Optim>0</Optim>
-                <oTime>2</oTime>
-                <SplitLS>2</SplitLS>
-                <OneElfS>2</OneElfS>
-                <Strict>2</Strict>
-                <EnumInt>2</EnumInt>
-                <PlainCh>2</PlainCh>
-                <Ropi>2</Ropi>
-                <Rwpi>2</Rwpi>
-                <wLevel>0</wLevel>
-                <uThumb>2</uThumb>
-                <VariousControls>
-                  <MiscControls></MiscControls>
-                  <Define></Define>
-                  <Undefine></Undefine>
-                  <IncludePath></IncludePath>
-                </VariousControls>
-              </Cads>
-              <Aads>
-                <interw>2</interw>
-                <Ropi>2</Ropi>
-                <Rwpi>2</Rwpi>
-                <thumb>2</thumb>
-                <SplitLS>2</SplitLS>
-                <SwStkChk>2</SwStkChk>
-                <NoWarn>2</NoWarn>
-                <VariousControls>
-                  <MiscControls></MiscControls>
-                  <Define></Define>
-                  <Undefine></Undefine>
-                  <IncludePath></IncludePath>
-                </VariousControls>
-              </Aads>
-            </GroupArmAds>
-          </GroupOption>
-          <Files>
-            <File>
-              <FileName>dfs_util.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\src\dfs_util.c</FilePath>
-            </File>
-            <File>
-              <FileName>dfs_cache.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\src\dfs_cache.c</FilePath>
-            </File>
-            <File>
-              <FileName>dfs_fs.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\src\dfs_fs.c</FilePath>
-            </File>
-            <File>
-              <FileName>dfs_init.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\src\dfs_init.c</FilePath>
-            </File>
-            <File>
-              <FileName>dfs_raw.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\src\dfs_raw.c</FilePath>
-            </File>
-            <File>
-              <FileName>dfs_posix.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\src\dfs_posix.c</FilePath>
-            </File>
-            <File>
-              <FileName>plibc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c</FilePath>
-            </File>
-            <File>
-              <FileName>efs.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c</FilePath>
-            </File>
-            <File>
-              <FileName>extract.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c</FilePath>
-            </File>
-            <File>
-              <FileName>partition.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c</FilePath>
-            </File>
-            <File>
-              <FileName>ui.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c</FilePath>
-            </File>
-            <File>
-              <FileName>dir.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c</FilePath>
-            </File>
-            <File>
-              <FileName>fat.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c</FilePath>
-            </File>
-            <File>
-              <FileName>file.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c</FilePath>
-            </File>
-            <File>
-              <FileName>fs.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c</FilePath>
-            </File>
-            <File>
-              <FileName>ls.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c</FilePath>
-            </File>
-            <File>
-              <FileName>time.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-      </Groups>
-    </Target>
-  </Targets>
-
-</Project>
diff --git a/bsp/sep4020/rtconfig.h b/bsp/sep4020/rtconfig.h
deleted file mode 100644
index 6a47581def..0000000000
--- a/bsp/sep4020/rtconfig.h
+++ /dev/null
@@ -1,150 +0,0 @@
-/* RT-Thread config file */
-#ifndef __RTTHREAD_CFG_H__
-#define __RTTHREAD_CFG_H__
-
-/* RT_NAME_MAX*/
-#define RT_NAME_MAX	8
-
-/* RT_ALIGN_SIZE*/
-#define RT_ALIGN_SIZE	4
-
-/* PRIORITY_MAX*/
-#define RT_THREAD_PRIORITY_MAX	32
-
-/* Tick per Second*/
-#define RT_TICK_PER_SECOND	100
-
-/* SECTION: RT_DEBUG */
-/* Thread Debug*/
-/* #define RT_THREAD_DEBUG */
-
-/* Using Hook*/
-#define RT_USING_HOOK
-
-/* SECTION: IPC */
-/* Using Semaphore*/
-#define RT_USING_SEMAPHORE
-
-/* Using Mutex*/
-#define RT_USING_MUTEX
-
-/* Using Event*/
-#define RT_USING_EVENT
-
-/* Using Faset Event*/
-/* #define RT_USING_FASTEVENT */
-
-/* Using MailBox*/
-#define RT_USING_MAILBOX
-
-/* Using Message Queue*/
-#define RT_USING_MESSAGEQUEUE
-
-/* SECTION: Memory Management */
-/* Using Memory Pool Management*/
-#define RT_USING_MEMPOOL
-
-/* Using Dynamic Heap Management*/
-#define RT_USING_HEAP
-
-/* Using Small MM*/
-#define RT_USING_SMALL_MEM
-#define RT_MEM_STATS
-
-/* Using SLAB Allocator*/
-/* #define RT_USING_SLAB */
-
-/* SECTION: Device System */
-/* Using Device System*/
-#define RT_USING_DEVICE
-#define RT_USING_UART1
-#define RT_UART_RX_BUFFER_SIZE	128
-
-/* SECTION: Console options */
-/* the buffer size of console*/
-#define RT_CONSOLEBUF_SIZE	128
-
-/* SECTION: FinSH shell options */
-/* Using FinSH as Shell*/
-#define RT_USING_FINSH
-/* use symbol table */
-#define FINSH_USING_SYMTAB
-#define FINSH_USING_DESCRIPTION
-
-/* SECTION: a mini libc */
-/* Using mini libc library*/
-/* #define RT_USING_MINILIBC */
-
-/* SECTION: C++ support */
-/* Using C++ support*/
-/* #define RT_USING_CPLUSPLUS */
-
-/* SECTION: lwip, a lighwight TCP/IP protocol stack */
-/* Using lighweight TCP/IP protocol stack*/
-//#define RT_USING_LWIP
-
-/* Trace LwIP protocol*/
-/* #define RT_LWIP_DEBUG */
-
-/* LwIP tcp thread option */
-#define RT_LWIP_TCPTHREAD_PRIORITY	8
-#define RT_LWIP_TCPTHREAD_STACKSIZE	4096
-#define RT_LWIP_TCPTHREAD_MBOX_SIZE	32
-
-/* LwIP eth thread option */
-#define RT_LWIP_ETHTHREAD_PRIORITY	15
-#define RT_LWIP_ETHTHREAD_STACKSIZE	1024
-#define RT_LWIP_ETHTHREAD_MBOX_SIZE	8
-
-/* Enable ICMP protocol*/
-#define RT_LWIP_ICMP
-
-/* Enable IGMP protocol*/
-#define RT_LWIP_IGMP
-
-/* Enable UDP protocol*/
-#define RT_LWIP_UDP
-
-/* Enable TCP protocol*/
-#define RT_LWIP_TCP
-
-/* the number of simulatenously active TCP connections*/
-#define RT_LWIP_TCP_PCB_NUM	5
-
-/* TCP sender buffer space*/
-#define RT_LWIP_TCP_SND_BUF	1500
-
-/* Enable SNMP protocol*/
-/* #define RT_LWIP_SNMP */
-
-/* Using DHCP*/
-/* #define RT_LWIP_DHCP */
-
-/* ip address of target*/
-#define RT_LWIP_IPADDR0	192
-#define RT_LWIP_IPADDR1	168
-#define RT_LWIP_IPADDR2	1
-#define RT_LWIP_IPADDR3	30
-
-/* gateway address of target*/
-#define RT_LWIP_GWADDR0	192
-#define RT_LWIP_GWADDR1	168
-#define RT_LWIP_GWADDR2	1
-#define RT_LWIP_GWADDR3	1
-
-/* mask address of target*/
-#define RT_LWIP_MSKADDR0	255
-#define RT_LWIP_MSKADDR1	255
-#define RT_LWIP_MSKADDR2	255
-#define RT_LWIP_MSKADDR3	0
-
-/* SECTION: DFS options */
-//#define RT_USING_DFS
-/* the max number of mounted filesystem */
-#define DFS_FILESYSTEMS_MAX			1
-/* the max number of opened files 		*/
-#define DFS_FD_MAX					2
-/* the max number of cached sector 		*/
-#define DFS_CACHE_MAX_NUM   		4
-
-#endif
diff --git a/bsp/sep4020/rtthread-sep4020-rom.sct b/bsp/sep4020/rtthread-sep4020-rom.sct
deleted file mode 100644
index c28581f0d1..0000000000
--- a/bsp/sep4020/rtthread-sep4020-rom.sct
+++ /dev/null
@@ -1,15 +0,0 @@
-; *************************************************************
-; *** Scatter-Loading Description File generated by uVision ***
-; *************************************************************
-
-LR_ROM1 0x00000000 0x00200000  {    ; load region size_region
-  ER_ROM1 0x00000000 0x00200000  {  ; load address = execution address
-   *.o (RESET, +First)
-   *(InRoot$$Sections)
-   .ANY (+RO)
-  }
-  RW_RAM1 0x30000000 0x32000000  {  ; RW data
-   .ANY (+RW +ZI)
-  }
-}
-
diff --git a/bsp/sep4020/rtthread-sep4020-sdram.sct b/bsp/sep4020/rtthread-sep4020-sdram.sct
deleted file mode 100644
index bac01fca63..0000000000
--- a/bsp/sep4020/rtthread-sep4020-sdram.sct
+++ /dev/null
@@ -1,15 +0,0 @@
-; *************************************************************
-; *** Scatter-Loading Description File generated by uVision ***
-; *************************************************************
-
-LR_ROM1 0x30000000 0x02000000  {    ; load region size_region
-  ER_ROM1 0x30000000 0x02000000  {  ; load address = execution address
-   *.o (RESET, +First)
-   *(InRoot$$Sections)
-   .ANY (+RO)
-   }
-   RW_RAM1 0x31000000{
-   .ANY (+RW +ZI)
-  }
-}
-
diff --git a/bsp/sep4020/sep4020.h b/bsp/sep4020/sep4020.h
deleted file mode 100644
index 06a50f8efa..0000000000
--- a/bsp/sep4020/sep4020.h
+++ /dev/null
@@ -1,637 +0,0 @@
-/*************************************************************************************
- *
- *	File name:	sep4020.h
- *
- * Change Logs:
- * Date           Author       Notes	        
- * 2010-03-17     zchong      first version		      	
- **************************************************************************************/
-
-#ifndef __SEP4020_H__
-#define __SEP4020_H__
-
-/*************************************
-	macros for INTC
-*************************************/
-
-/*interrupt resources */
-
-#define     INTGLOBAL		        32
-
-#define		INT_RTC					31		        
-#define		INT_DMAC				30	                
-#define		INT_EMI					29              
-#define		INT_MAC		  			28                  
-#define		INT_TIMER1				27                  
-#define		INT_TIMER2				26              
-#define 	INT_TIMER3 				25              
-#define		INT_UART0				24              
-#define		INT_UART1				23              
-#define		INT_UART2				22              
-#define		INT_UART3			    21              
-#define		INT_PWM					20	                
-#define		INT_LCDC	   			19	            
-#define		INT_I2S			    	18              
-#define		INT_SSI 				17	            
-#define		INT_NOTUSED16			16
-#define		INT_USB 				15              
-#define		INT_SMC0				14				
-#define		INT_SMC1				13              
-#define		INT_SDIO				12              
-#define		INT_EXINT10				11              
-#define		INT_EXINT9 				10              
-#define		INT_EXINT8 				9               
-#define		INT_EXINT7 				8               
-#define		INT_EXINT6 				7               
-#define		INT_EXINT5 				6               
-#define		INT_EXINT4 				5               
-#define		INT_EXINT3 				4               
-#define		INT_EXINT2 				3               
-#define		INT_EXINT1 				2               
-#define		INT_EXINT0				1
-#define		INT_NOTUSED0			0
-
-/******************************************************************************************
- *  INTCģ��
- *  ��ַ: 0x10000000
- ******************************************************************************************/
-
-#define INTC_IER        (*(volatile unsigned *)0x10000000)  /* IRQ interrupt enable register    */
-#define INTC_IMR        (*(volatile unsigned *)0x10000008)  /* IRQ interrupt mask register      */
-#define INTC_IFR        (*(volatile unsigned *)0x10000010)  /* IRQ����ǿ���жϼĴ���    */
-#define INTC_IRSR       (*(volatile unsigned *)0x10000018)  /* IRQδ�����ж�״̬�Ĵ���  */
-#define INTC_ISR        (*(volatile unsigned *)0x10000020)  /* IRQ�ж�״̬�Ĵ���        */
-#define INTC_IMSR       (*(volatile unsigned *)0x10000028)  /* IRQ�����ж�״̬�Ĵ���    */
-#define INTC_IFSR       (*(volatile unsigned *)0x10000030)  /* IRQ�ж�����״̬�Ĵ���    */
-#define INTC_FIER       (*(volatile unsigned *)0x100000C0)  /* FIQ�ж������Ĵ���        */
-#define INTC_FIMR       (*(volatile unsigned *)0x100000C4)  /* FIQ�ж����μĴ���        */
-#define INTC_FIFR       (*(volatile unsigned *)0x100000C8)  /* FIQ����ǿ���жϼĴ���    */
-#define INTC_FIRSR      (*(volatile unsigned *)0x100000CC)  /* FIQδ�����ж�״̬�Ĵ���  */
-#define INTC_FISR       (*(volatile unsigned *)0x100000D0)  /* FIQ�ж�״̬�Ĵ���        */
-#define INTC_FIFSR      (*(volatile unsigned *)0x100000D4)  /* FIQ�ж�����״̬�Ĵ���    */
-#define INTC_IPLR       (*(volatile unsigned *)0x100000D8)  /* IRQ�ж����ȼ��Ĵ���      */
-#define INTC_ICR1       (*(volatile unsigned *)0x100000DC)  /* IRQ�ڲ��ж����ȼ����ƼĴ���1 */
-#define INTC_ICR2       (*(volatile unsigned *)0x100000E0)  /* IRQ�ڲ��ж����ȼ����ƼĴ���2 */
-#define INTC_EXICR1     (*(volatile unsigned *)0x100000E4)  /* IRQ�ⲿ�ж����ȼ����ƼĴ���1 */
-#define INTC_EXICR2     (*(volatile unsigned *)0x100000E8)  /* IRQ�ⲿ�ж����ȼ����ƼĴ���2 */
-
-
-/******************************************************************************************
- *  PMCģ��
- *  ��ַ: 0x10001000
- ******************************************************************************************/
-
-#define PMC_PLTR        (*(volatile unsigned *)0x10001000)  /* PLL���ȶ�����ʱ�� */
-#define PMC_PMCR        (*(volatile unsigned *)0x10001004)  /* ϵͳ��ʱ��PLL�Ŀ��ƼĴ��� */
-#define PMC_PUCR        (*(volatile unsigned *)0x10001008)  /* USBʱ��PLL�Ŀ��ƼĴ��� */
-#define PMC_PCSR        (*(volatile unsigned *)0x1000100C)  /* �ڲ�ģ��ʱ��Դ�����Ŀ��ƼĴ��� */
-#define PMC_PDSLOW      (*(volatile unsigned *)0x10001010)  /* SLOW״̬��ʱ�ӵķ�Ƶ���� */
-#define PMC_PMDR        (*(volatile unsigned *)0x10001014)  /* оƬ����ģʽ�Ĵ��� */
-#define PMC_RCTR        (*(volatile unsigned *)0x10001018)  /* Reset���ƼĴ��� */
-#define PMC_CLRWAKUP    (*(volatile unsigned *)0x1000101C)  /* WakeUp����Ĵ��� */
-
-
-/******************************************************************************************
- *  RTCģ��
- *  ��ַ: 0x10002000
- ******************************************************************************************/
-
-#define RTC_STA_YMD         (*(volatile unsigned *)0x10002000)  /* ��, ��, �ռ����Ĵ��� */
-#define RTC_STA_HMS         (*(volatile unsigned *)0x10002004)  /* Сʱ, ����, ��Ĵ��� */
-#define RTC_ALARM_ALL       (*(volatile unsigned *)0x10002008)  /* ��ʱ��, ��, ʱ, �ּĴ��� */
-#define RTC_CTR             (*(volatile unsigned *)0x1000200C)  /* ���ƼĴ��� */
-#define RTC_INT_EN          (*(volatile unsigned *)0x10002010)  /* �ж�ʹ�ܼĴ��� */
-#define RTC_INT_STS         (*(volatile unsigned *)0x10002014)  /* �ж�״̬�Ĵ��� */
-#define RTC_SAMP            (*(volatile unsigned *)0x10002018)  /* �������ڼĴ��� */
-#define RTC_WD_CNT          (*(volatile unsigned *)0x1000201C)  /* Watch-Dog����ֵ�Ĵ��� */
-#define RTC_WD_SEV          (*(volatile unsigned *)0x10002020)  /* Watch-Dog����Ĵ��� */ 
-#define RTC_CONFIG_CHECK    (*(volatile unsigned *)0x10002024)  /* ����ʱ��ȷ�ϼĴ��� (������ʱ��֮ǰ��д0xaaaaaaaa) */
-#define RTC_SOFTRESET       (*(volatile unsigned *)0x10002028)  /* ������λ���ƼĴ���, 4020�б�ȥ���� */
-#define RTC_KEY0            (*(volatile unsigned *)0x1000202C)  /* ��Կ�Ĵ���0, 4020��ֻ����һ���Ĵ��� */
-#define RTC_KEY1            (*(volatile unsigned *)0x10002030)  /* ��Կ�Ĵ���1 */
-#define RTC_KEY2            (*(volatile unsigned *)0x10002034)  /* ��Կ�Ĵ���2 */
-#define RTC_KEY3            (*(volatile unsigned *)0x10002038)  /* ��Կ�Ĵ���3 */
-#define RTC_KEY4            (*(volatile unsigned *)0x1000203C)  /* ��Կ�Ĵ���4 */
-#define RTC_KEY5            (*(volatile unsigned *)0x10002040)  /* ��Կ�Ĵ���5 */
-
-
-/******************************************************************************************
- *  TIMERģ��
- *  ��ַ: 0x10003000
- ******************************************************************************************/
-
-#define TIMER_T1LCR         (*(volatile unsigned *)0x10003000)  /* ͨ��1���ؼ����Ĵ��� */
-#define TIMER_T1CCR         (*(volatile unsigned *)0x10003004)  /* ͨ��1��ǰ����ֵ�Ĵ��� */
-#define TIMER_T1CR          (*(volatile unsigned *)0x10003008)  /* ͨ��1���ƼĴ��� */
-#define TIMER_T1ISCR        (*(volatile unsigned *)0x1000300C)  /* ͨ��1�ж�״̬����Ĵ��� */
-#define TIMER_T1IMSR        (*(volatile unsigned *)0x10003010)  /* ͨ��1�ж�����״̬�Ĵ��� */
-#define TIMER_T2LCR         (*(volatile unsigned *)0x10003020)  /* ͨ��2���ؼ����Ĵ��� */
-#define TIMER_T2CCR         (*(volatile unsigned *)0x10003024)  /* ͨ��2��ǰ����ֵ�Ĵ��� */
-#define TIMER_T2CR          (*(volatile unsigned *)0x10003028)  /* ͨ��2���ƼĴ��� */
-#define TIMER_T2ISCR        (*(volatile unsigned *)0x1000302C)  /* ͨ��2�ж�״̬����Ĵ��� */
-#define TIMER_T2IMSR        (*(volatile unsigned *)0x10003030)  /* ͨ��2�ж�����״̬�Ĵ��� */
-#define TIMER_T3LCR         (*(volatile unsigned *)0x10003040)  /* ͨ��3���ؼ����Ĵ��� */
-#define TIMER_T3CCR         (*(volatile unsigned *)0x10003044)  /* ͨ��3��ǰ����ֵ�Ĵ��� */
-#define TIMER_T3CR          (*(volatile unsigned *)0x10003048)  /* ͨ��3���ƼĴ��� */
-#define TIMER_T3ISCR        (*(volatile unsigned *)0x1000304C)  /* ͨ��3�ж�״̬����Ĵ��� */
-#define TIMER_T3IMSR        (*(volatile unsigned *)0x10003050)  /* ͨ��3�ж�����״̬�Ĵ��� */
-#define TIMER_T3CAPR        (*(volatile unsigned *)0x10003054)  /* ͨ��3����Ĵ��� */
-#define TIMER_T4LCR         (*(volatile unsigned *)0x10003060)  /* ͨ��4���ؼ����Ĵ��� */
-#define TIMER_T4CCR         (*(volatile unsigned *)0x10003064)  /* ͨ��4��ǰ����ֵ�Ĵ��� */
-#define TIMER_T4CR          (*(volatile unsigned *)0x10003068)  /* ͨ��4���ƼĴ��� */
-#define TIMER_T4ISCR        (*(volatile unsigned *)0x1000306C)  /* ͨ��4�ж�״̬����Ĵ��� */
-#define TIMER_T4IMSR        (*(volatile unsigned *)0x10003070)  /* ͨ��4�ж�����״̬�Ĵ��� */
-#define TIMER_T4CAPR        (*(volatile unsigned *)0x10003074)  /* ͨ��4����Ĵ��� */
-#define TIMER_T5LCR         (*(volatile unsigned *)0x10003080)  /* ͨ��5���ؼ����Ĵ��� */
-#define TIMER_T5CCR         (*(volatile unsigned *)0x10003084)  /* ͨ��5��ǰ����ֵ�Ĵ��� */
-#define TIMER_T5CR          (*(volatile unsigned *)0x10003088)  /* ͨ��5���ƼĴ��� */
-#define TIMER_T5ISCR        (*(volatile unsigned *)0x1000308C)  /* ͨ��5�ж�״̬����Ĵ��� */
-#define TIMER_T5IMSR        (*(volatile unsigned *)0x10003090)  /* ͨ��5�ж�����״̬�Ĵ��� */
-#define TIMER_T5CAPR        (*(volatile unsigned *)0x10003094)  /* ͨ��5����Ĵ��� */
-#define TIMER_T6LCR         (*(volatile unsigned *)0x100030A0)  /* ͨ��6���ؼ����Ĵ��� */
-#define TIMER_T6CCR         (*(volatile unsigned *)0x100030A4)  /* ͨ��6��ǰ����ֵ�Ĵ��� */
-#define TIMER_T6CR          (*(volatile unsigned *)0x100030A8)  /* ͨ��6���ƼĴ��� */
-#define TIMER_T6ISCR        (*(volatile unsigned *)0x100030AC)  /* ͨ��6�ж�״̬����Ĵ��� */
-#define TIMER_T6IMSR        (*(volatile unsigned *)0x100030B0)  /* ͨ��6�ж�����״̬�Ĵ��� */
-#define TIMER_T6CAPR        (*(volatile unsigned *)0x100030B4)  /* ͨ��6����Ĵ��� */
-#define TIMER_T7LCR         (*(volatile unsigned *)0x100030C0)  /* ͨ��7���ؼ����Ĵ��� */
-#define TIMER_T7CCR         (*(volatile unsigned *)0x100030C4)  /* ͨ��7��ǰ����ֵ�Ĵ��� */
-#define TIMER_T7CR          (*(volatile unsigned *)0x100030C8)  /* ͨ��7���ƼĴ��� */
-#define TIMER_T7ISCR        (*(volatile unsigned *)0x100030CC)  /* ͨ��7�ж�״̬����Ĵ��� */
-#define TIMER_T7IMSR        (*(volatile unsigned *)0x100030D0)  /* ͨ��7�ж�����״̬�Ĵ��� */
-#define TIMER_T8LCR         (*(volatile unsigned *)0x100030E0)  /* ͨ��8���ؼ����Ĵ��� */
-#define TIMER_T8CCR         (*(volatile unsigned *)0x100030E4)  /* ͨ��8��ǰ����ֵ�Ĵ��� */
-#define TIMER_T8CR          (*(volatile unsigned *)0x100030E8)  /* ͨ��8���ƼĴ��� */
-#define TIMER_T8ISCR        (*(volatile unsigned *)0x100030EC)  /* ͨ��8�ж�״̬����Ĵ��� */
-#define TIMER_T8IMSR        (*(volatile unsigned *)0x100030F0)  /* ͨ��8�ж�����״̬�Ĵ��� */
-#define TIMER_T9LCR         (*(volatile unsigned *)0x10003100)  /* ͨ��9���ؼ����Ĵ��� */
-#define TIMER_T9CCR         (*(volatile unsigned *)0x10003104)  /* ͨ��9��ǰ����ֵ�Ĵ��� */
-#define TIMER_T9CR          (*(volatile unsigned *)0x10003108)  /* ͨ��9���ƼĴ��� */
-#define TIMER_T9ISCR        (*(volatile unsigned *)0x1000310C)  /* ͨ��9�ж�״̬����Ĵ��� */
-#define TIMER_T9IMSR        (*(volatile unsigned *)0x10003110)  /* ͨ��9�ж�����״̬�Ĵ��� */
-#define TIMER_T10LCR        (*(volatile unsigned *)0x10003120)  /* ͨ��10���ؼ����Ĵ��� */
-#define TIMER_T10CCR        (*(volatile unsigned *)0x10003124)  /* ͨ��10��ǰ����ֵ�Ĵ��� */
-#define TIMER_T10CR         (*(volatile unsigned *)0x10003128)  /* ͨ��10���ƼĴ��� */
-#define TIMER_T10ISCR       (*(volatile unsigned *)0x1000312C)  /* ͨ��10�ж�״̬����Ĵ��� */
-#define TIMER_T10IMSR       (*(volatile unsigned *)0x10003130)  /* ͨ��10�ж�����״̬�Ĵ��� */
-#define TIMER_TIMSR         (*(volatile unsigned *)0x10003140)  /* TIMER�ж�����״̬�Ĵ��� */
-#define TIMER_TISCR         (*(volatile unsigned *)0x10003144)  /* TIMER�ж�״̬����Ĵ��� */
-#define TIMER_TISR          (*(volatile unsigned *)0x10003148)  /* TIMER�ж�״̬�Ĵ��� */
-
-
-/******************************************************************************************
- *  PWMģ��
- *  ��ַ: 0x10004000
- ******************************************************************************************/
-
-#define PWM1_CTRL           (*(volatile unsigned *)0x10004000)  /* PWM1���ƼĴ��� */
-#define PWM1_DIV            (*(volatile unsigned *)0x10004004)  /* PWM1��Ƶ�Ĵ��� */
-#define PWM1_PERIOD         (*(volatile unsigned *)0x10004008)  /* PWM1���ڼĴ��� */
-#define PWM1_DATA           (*(volatile unsigned *)0x1000400C)  /* PWM1���ݼĴ��� */
-#define PWM1_CNT            (*(volatile unsigned *)0x10004010)  /* PWM1�����Ĵ��� */
-#define PWM1_STATUS         (*(volatile unsigned *)0x10004014)  /* PWM1״̬�Ĵ��� */
-#define PWM2_CTRL           (*(volatile unsigned *)0x10004020)  /* PWM2���ƼĴ��� */
-#define PWM2_DIV            (*(volatile unsigned *)0x10004024)  /* PWM2��Ƶ�Ĵ��� */
-#define PWM2_PERIOD         (*(volatile unsigned *)0x10004028)  /* PWM2���ڼĴ��� */
-#define PWM2_DATA           (*(volatile unsigned *)0x1000402C)  /* PWM2���ݼĴ��� */
-#define PWM2_CNT            (*(volatile unsigned *)0x10004030)  /* PWM2�����Ĵ��� */
-#define PWM2_STATUS         (*(volatile unsigned *)0x10004034)  /* PWM2״̬�Ĵ��� */
-#define PWM3_CTRL           (*(volatile unsigned *)0x10004040)  /* PWM3���ƼĴ��� */
-#define PWM3_DIV            (*(volatile unsigned *)0x10004044)  /* PWM3��Ƶ�Ĵ��� */
-#define PWM3_PERIOD         (*(volatile unsigned *)0x10004048)  /* PWM3���ڼĴ��� */
-#define PWM3_DATA           (*(volatile unsigned *)0x1000404C)  /* PWM3���ݼĴ��� */
-#define PWM3_CNT            (*(volatile unsigned *)0x10004050)  /* PWM3�����Ĵ��� */
-#define PWM3_STATUS         (*(volatile unsigned *)0x10004054)  /* PWM3״̬�Ĵ��� */
-#define PWM4_CTRL           (*(volatile unsigned *)0x10004060)  /* PWM4���ƼĴ��� */
-#define PWM4_DIV            (*(volatile unsigned *)0x10004064)  /* PWM4��Ƶ�Ĵ��� */
-#define PWM4_PERIOD         (*(volatile unsigned *)0x10004068)  /* PWM4���ڼĴ��� */
-#define PWM4_DATA           (*(volatile unsigned *)0x1000406C)  /* PWM4���ݼĴ��� */
-#define PWM4_CNT            (*(volatile unsigned *)0x10004070)  /* PWM4�����Ĵ��� */
-#define PWM4_STATUS         (*(volatile unsigned *)0x10004074)  /* PWM4״̬�Ĵ��� */
-#define PWM_INTMASK         (*(volatile unsigned *)0x10004080)  /* PWM�ж����μĴ��� */
-#define PWM_INT             (*(volatile unsigned *)0x10004084)  /* PWM�жϼĴ��� */
-#define PWM_ENABLE          (*(volatile unsigned *)0x10004088)    /* PWMʹ�ܼĴ��� */
-
-
-/******************************************************************************************
- *  UART0ģ��
- *  ��ַ: 0x10005000
- ******************************************************************************************/
-#define UART0BASE            ((volatile unsigned *)0x10005000)
-#define UART0_DLBL          (*(volatile unsigned char*)0x10005000)  /* ���������õͰ�λ�Ĵ��� */
-#define UART0_RXFIFO        (*(volatile unsigned char*)0x10005000)  /* ����FIFO */
-#define UART0_TXFIFO        (*(volatile unsigned char*)0x10005000)  /* ����FIFO */
-#define UART0_DLBH          (*(volatile unsigned char*)0x10005004)  /* ���������ø߰�λ�Ĵ��� */
-#define UART0_IER           (*(volatile unsigned char*)0x10005004)  /* �ж�ʹ�ܼĴ��� */
-#define UART0_IIR           (*(volatile unsigned *)0x10005008)  /* �ж�ʶ��Ĵ��� */
-#define UART0_FCR           (*(volatile unsigned *)0x10005008)  /* FIFO���ƼĴ��� */
-#define UART0_LCR           (*(volatile unsigned *)0x1000500C)  /* �п��ƼĴ��� */
-#define UART0_MCR           (*(volatile unsigned *)0x10005010)  /* Modem���ƼĴ��� */
-#define UART0_LSR           (*(volatile unsigned *)0x10005014)  /* ��״̬�Ĵ��� */
-#define UART0_MSR           (*(volatile unsigned *)0x10005018)  /* Modem״̬�Ĵ��� */
-
-
-/******************************************************************************************
- *  UART1ģ��
- *  ��ַ: 0x10006000
- ******************************************************************************************/
- #define UART1BASE            ((volatile unsigned *)0x10006000)
-#define UART1_DLBL          (*(volatile unsigned *)0x10006000)  /* ���������õͰ�λ�Ĵ��� */
-#define UART1_RXFIFO        (*(volatile unsigned *)0x10006000)  /* ����FIFO */
-#define UART1_TXFIFO        (*(volatile unsigned *)0x10006000)  /* ����FIFO */
-#define UART1_DLBH          (*(volatile unsigned *)0x10006004)  /* ���������ø߰�λ�Ĵ��� */
-#define UART1_IER           (*(volatile unsigned *)0x10006004)  /* �ж�ʹ�ܼĴ��� */
-#define UART1_IIR           (*(volatile unsigned *)0x10006008)  /* �ж�ʶ��Ĵ��� */
-#define UART1_FCR           (*(volatile unsigned *)0x10006008)  /* FIFO���ƼĴ��� */
-#define UART1_LCR           (*(volatile unsigned *)0x1000600C)  /* �п��ƼĴ��� */
-#define UART1_MCR           (*(volatile unsigned *)0x10006010)  /* Modem���ƼĴ��� */
-#define UART1_LSR           (*(volatile unsigned *)0x10006014)  /* ��״̬�Ĵ��� */
-#define UART1_MSR           (*(volatile unsigned *)0x10006018)  /* Modem״̬�Ĵ��� */
-
-
-/******************************************************************************************
- *  UART2ģ��
- *  ��ַ: 0x10007000
- ******************************************************************************************/
-#define UART2BASE            ((volatile unsigned *)0x10007000)
-#define UART2_DLBL          (*(volatile unsigned *)0x10007000)  /* ���������õͰ�λ�Ĵ��� */
-#define UART2_RXFIFO        (*(volatile unsigned *)0x10007000)  /* ����FIFO */
-#define UART2_TXFIFO        (*(volatile unsigned *)0x10007000)  /* ����FIFO */
-#define UART2_DLBH          (*(volatile unsigned *)0x10007004)  /* ���������ø߰�λ�Ĵ��� */
-#define UART2_IER           (*(volatile unsigned *)0x10007004)  /* �ж�ʹ�ܼĴ��� */
-#define UART2_IIR           (*(volatile unsigned *)0x10007008)  /* �ж�ʶ��Ĵ��� */
-#define UART2_FCR           (*(volatile unsigned *)0x10007008)  /* FIFO���ƼĴ��� */
-#define UART2_LCR           (*(volatile unsigned *)0x1000700C)  /* �п��ƼĴ��� */
-#define UART2_MCR           (*(volatile unsigned *)0x10007010)  /* Modem���ƼĴ��� */
-#define UART2_LSR           (*(volatile unsigned *)0x10007014)  /* ��״̬�Ĵ��� */
-#define UART2_MSR           (*(volatile unsigned *)0x10007018)  /* Modem״̬�Ĵ��� */
-
-
-/******************************************************************************************
- *  UART3ģ��
- *  ��ַ: 0x10008000
- ******************************************************************************************/
-#define UART3BASE            ((volatile unsigned *)0x10008000)
-#define UART3_DLBL          (*(volatile unsigned *)0x10008000)  /* ���������õͰ�λ�Ĵ��� */
-#define UART3_RXFIFO        (*(volatile unsigned *)0x10008000)  /* ����FIFO */
-#define UART3_TXFIFO        (*(volatile unsigned *)0x10008000)  /* ����FIFO */
-#define UART3_DLBH          (*(volatile unsigned *)0x10008004)  /* ���������ø߰�λ�Ĵ��� */
-#define UART3_IER           (*(volatile unsigned *)0x10008004)  /* �ж�ʹ�ܼĴ��� */
-#define UART3_IIR           (*(volatile unsigned *)0x10008008)  /* �ж�ʶ��Ĵ��� */
-#define UART3_FCR           (*(volatile unsigned *)0x10008008)  /* FIFO���ƼĴ��� */
-#define UART3_LCR           (*(volatile unsigned *)0x1000800C)  /* �п��ƼĴ��� */
-#define UART3_MCR           (*(volatile unsigned *)0x10008010)  /* Modem���ƼĴ��� */
-#define UART3_LSR           (*(volatile unsigned *)0x10008014)  /* ��״̬�Ĵ��� */
-#define UART3_MSR           (*(volatile unsigned *)0x10008018)  /* Modem״̬�Ĵ��� */
-
-
-/******************************************************************************************
- *  SSIģ��
- *  ��ַ: 0x10009000
- ******************************************************************************************/
-
-#define SSI_CONTROL0        (*(volatile unsigned *)0x10009000)  /* ���ƼĴ���0 */
-#define SSI_CONTROL1        (*(volatile unsigned *)0x10009004)  /* ���ƼĴ���1 */
-#define SSI_SSIENR          (*(volatile unsigned *)0x10009008)  /* SSIʹ�ܼĴ��� */
-#define SSI_MWCR            (*(volatile unsigned *)0x1000900C)  /* Microwire���ƼĴ��� */
-#define SSI_SER             (*(volatile unsigned *)0x10009010)  /* ���豸ʹ�ܼĴ��� */
-#define SSI_BAUDR           (*(volatile unsigned *)0x10009014)  /* ���������üĴ��� */
-#define SSI_TXFTLR          (*(volatile unsigned *)0x10009018)  /* ����FIFO��ֵ�Ĵ��� */
-#define SSI_RXFTLR          (*(volatile unsigned *)0x1000901C)  /* ����FIFO��ֵ�Ĵ��� */
-#define SSI_TXFLR           (*(volatile unsigned *)0x10009020)  /* ����FIFO״̬�Ĵ��� */
-#define SSI_RXFLR           (*(volatile unsigned *)0x10009024)  /* ����FIFO״̬�Ĵ��� */
-#define SSI_SR              (*(volatile unsigned *)0x10009028)  /* ״̬�Ĵ��� */
-#define SSI_IMR             (*(volatile unsigned *)0x1000902C)  /* �ж����μĴ��� */
-#define SSI_ISR             (*(volatile unsigned *)0x10009030)  /* �ж�����״̬�Ĵ��� */
-#define SSI_RISR            (*(volatile unsigned *)0x10009034)  /* �ж�ԭʼ״̬�Ĵ��� */
-#define SSI_TXOICR          (*(volatile unsigned *)0x10009038)  /* ����FIFO�����ж�����Ĵ��� */
-#define SSI_RXOICR          (*(volatile unsigned *)0x1000903C)  /* ����FIFO�����ж�����Ĵ��� */
-#define SSI_RXUICR          (*(volatile unsigned *)0x10009040)  /* ����FIFO�����ж�����Ĵ��� */
-#define SSI_ICR             (*(volatile unsigned *)0x1000902C)  /* �ж�����Ĵ��� */
-#define SSI_DMACR           (*(volatile unsigned *)0x1000904C)  /* DMA���ƼĴ��� */
-#define SSI_DMATDLR         (*(volatile unsigned *)0x10009050)  /* DMA����״̬�Ĵ��� */
-#define SSI_DMARDLR         (*(volatile unsigned *)0x10009054)  /* DMA����״̬�Ĵ��� */
-#define SSI_DR              (*(volatile unsigned *)0x10009060)  /* ���ݼĴ��� */
-
-
-/******************************************************************************************
- *  I2Sģ��
- *  ��ַ: 0x1000A000
- ******************************************************************************************/
-
-#define I2S_CTRL            (*(volatile unsigned *)0x1000A000)  /* I2S���ƼĴ��� */
-#define I2S_DATA            (*(volatile unsigned *)0x1000A004)  /* I2S���ݼĴ��� */
-#define I2S_INT             (*(volatile unsigned *)0x1000A008)  /* I2S�жϼĴ��� */
-#define I2S_STATUS          (*(volatile unsigned *)0x1000A00C)  /* I2S״̬�Ĵ��� */
-
-
-/******************************************************************************************
- *  GPIOģ��
- *  ��ַ: 0x1000F000
- ******************************************************************************************/
-
-#define GPIO_DBCLK_DIV      (*(volatile unsigned *)0x1000F000)  /* ȥë�̲���ʱ�ӷ�Ƶ�����üĴ��� */
-#define GPIO_PORTA_DIR      (*(volatile unsigned *)0x1000F004)  /* A��˿���������������üĴ��� */
-#define GPIO_PORTA_SEL      (*(volatile unsigned *)0x1000F008)  /* A��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTA_INCTL    (*(volatile unsigned *)0x1000F00C)  /* A��˿�ͨ����;����ʱ�������üĴ��� */
-#define GPIO_PORTA_INTRCTL  (*(volatile unsigned *)0x1000F010)  /* A��˿��жϴ����������üĴ��� */
-#define GPIO_PORTA_INTRCLR  (*(volatile unsigned *)0x1000F014)  /* A��˿�ͨ����;�ж�������üĴ��� */
-#define GPIO_PORTA_DATA     (*(volatile unsigned *)0x1000F018)  /* A��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTB_DIR      (*(volatile unsigned *)0x1000F01C)  /* B��˿���������������üĴ��� */
-#define GPIO_PORTB_SEL      (*(volatile unsigned *)0x1000F020)  /* B��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTB_DATA     (*(volatile unsigned *)0x1000F024)  /* B��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTC_DIR      (*(volatile unsigned *)0x1000F028)  /* C��˿���������������üĴ��� */
-#define GPIO_PORTC_SEL      (*(volatile unsigned *)0x1000F02C)  /* C��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTC_DATA     (*(volatile unsigned *)0x1000F030)  /* C��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTD_DIR      (*(volatile unsigned *)0x1000F034)  /* D��˿���������������üĴ��� */
-#define GPIO_PORTD_SEL      (*(volatile unsigned *)0x1000F038)  /* D��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTD_SPECII   (*(volatile unsigned *)0x1000F03C)  /* D��˿�ר����;2ѡ�����üĴ��� */
-#define GPIO_PORTD_DATA     (*(volatile unsigned *)0x1000F040)  /* D��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTE_DIR      (*(volatile unsigned *)0x1000F044)  /* E��˿���������������üĴ��� */
-#define GPIO_PORTE_SEL      (*(volatile unsigned *)0x1000F048)  /* E��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTE_DATA     (*(volatile unsigned *)0x1000F04C)  /* E��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTF_DIR      (*(volatile unsigned *)0x1000F050)  /* F��˿���������������üĴ��� */
-#define GPIO_PORTF_SEL      (*(volatile unsigned *)0x1000F054)  /* F��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTF_INCTL    (*(volatile unsigned *)0x1000F058)  /* F��˿�ͨ����;����ʱ�������üĴ��� */
-#define GPIO_PORTF_INTRCTL  (*(volatile unsigned *)0x1000F05C)  /* F��˿��жϴ����������üĴ��� */
-#define GPIO_PORTF_INTRCLR  (*(volatile unsigned *)0x1000F060)  /* F��˿�ͨ����;�ж�������üĴ��� */
-#define GPIO_PORTF_DATA     (*(volatile unsigned *)0x1000F064)  /* F��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTG_DIR      (*(volatile unsigned *)0x1000F068)  /* G��˿���������������üĴ��� */
-#define GPIO_PORTG_SEL      (*(volatile unsigned *)0x1000F06C)  /* G��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTG_DATA     (*(volatile unsigned *)0x1000F070)  /* G��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTH_DIR      (*(volatile unsigned *)0x1000F074)  /* H��˿���������������üĴ��� */
-#define GPIO_PORTH_SEL      (*(volatile unsigned *)0x1000F078)  /* H��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTH_DATA     (*(volatile unsigned *)0x1000F07c)  /* H��˿�ͨ����;�������üĴ��� */
-#define GPIO_PORTI_DIR      (*(volatile unsigned *)0x1000F080)  /* I��˿���������������üĴ��� */
-#define GPIO_PORTI_SEL      (*(volatile unsigned *)0x1000F084)  /* I��˿�ͨ����;ѡ�����üĴ��� */
-#define GPIO_PORTI_DATA     (*(volatile unsigned *)0x1000F088)  /* I��˿�ͨ����;�������üĴ��� */
-
-
-/******************************************************************************************
- *  SMC0ģ��
- *  ��ַ: 0x1000C000
- ******************************************************************************************/
-
-#define SMC0_CTRL           (*(volatile unsigned *)0x1000C000)  /* SMC0���ƼĴ��� */
-#define SMC0_INT            (*(volatile unsigned *)0x1000C004)  /* SMC0�жϼĴ��� */
-#define SMC0_FD             (*(volatile unsigned *)0x1000C008)  /* SMC0������Ԫʱ��Ĵ��� */
-#define SMC0_CT             (*(volatile unsigned *)0x1000C00C)  /* SMC0�ַ�����ʱ��Ĵ��� */
-#define SMC0_BT             (*(volatile unsigned *)0x1000C010)  /* SMC0�鴫��ʱ��Ĵ��� */
-
-
-/******************************************************************************************
- *  SMC1ģ��
- *  ��ַ: 0x1000D000
- ******************************************************************************************/
-
-#define SMC1_CTRL           (*(volatile unsigned *)0x1000D000)  /* SMC1���ƼĴ��� */
-#define SMC1_INT            (*(volatile unsigned *)0x1000D004)  /* SMC1�жϼĴ��� */
-#define SMC1_FD             (*(volatile unsigned *)0x1000D008)  /* SMC1������Ԫʱ��Ĵ��� */
-#define SMC1_CT             (*(volatile unsigned *)0x1000D00C)  /* SMC1�ַ�����ʱ��Ĵ��� */
-#define SMC1_BT             (*(volatile unsigned *)0x1000D010)  /* SMC1�鴫��ʱ��Ĵ��� */
-
-
-/******************************************************************************************
- *  USBDģ��
- *  ��ַ: 0x1000E000
- ******************************************************************************************/
-
-#define USBD_PROTOCOLINTR           (*(volatile unsigned *)0x1000E000)  /* USBЭ���жϼĴ��� */
-#define USBD_INTRMASK               (*(volatile unsigned *)0x1000E004)  /* USB�ж����μĴ��� */
-#define USBD_INTRCTRL               (*(volatile unsigned *)0x1000E008)  /* USB�ж����Ϳ��ƼĴ��� */
-#define USBD_EPINFO                 (*(volatile unsigned *)0x1000E00C)  /* USB��˵�״̬�Ĵ��� */
-#define USBD_BCONFIGURATIONVALUE    (*(volatile unsigned *)0x1000E010)  /* SET_CCONFIGURATION��¼ */
-#define USBD_BMATTRIBUTES           (*(volatile unsigned *)0x1000E014)  /* ��ǰ�������ԼĴ��� */
-#define USBD_DEVSPEED               (*(volatile unsigned *)0x1000E018)  /* ��ǰ�豸�����ٶȼĴ��� */
-#define USBD_FRAMENUMBER            (*(volatile unsigned *)0x1000E01C)  /* ��¼��ǰSOF���ڵ�֡�� */
-#define USBD_EPTRANSACTIONS0        (*(volatile unsigned *)0x1000E020)  /* ��¼�´�Ҫ��Ĵ������ */
-#define USBD_EPTRANSACTIONS1        (*(volatile unsigned *)0x1000E024)  /* ��¼�´�Ҫ��Ĵ������ */
-#define USBD_APPIFUPDATE            (*(volatile unsigned *)0x1000E028)  /* �ӿںſ��ٸ��¼Ĵ��� */
-#define USBD_CFGINTERFACE0          (*(volatile unsigned *)0x1000E02c)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE1          (*(volatile unsigned *)0x1000E030)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE2          (*(volatile unsigned *)0x1000E034)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE3          (*(volatile unsigned *)0x1000E038)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE4          (*(volatile unsigned *)0x1000E03c)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE5          (*(volatile unsigned *)0x1000E040)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE6          (*(volatile unsigned *)0x1000E044)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE7          (*(volatile unsigned *)0x1000E048)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE8          (*(volatile unsigned *)0x1000E04c)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE9          (*(volatile unsigned *)0x1000E050)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE10         (*(volatile unsigned *)0x1000E054)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE11         (*(volatile unsigned *)0x1000E058)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE12         (*(volatile unsigned *)0x1000E05c)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE13         (*(volatile unsigned *)0x1000E060)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE14         (*(volatile unsigned *)0x1000E064)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE15         (*(volatile unsigned *)0x1000E068)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE16         (*(volatile unsigned *)0x1000E06c)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE17         (*(volatile unsigned *)0x1000E070)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE18         (*(volatile unsigned *)0x1000E074)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE19         (*(volatile unsigned *)0x1000E078)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE20         (*(volatile unsigned *)0x1000E07c)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE21         (*(volatile unsigned *)0x1000E080)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE22         (*(volatile unsigned *)0x1000E084)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE23         (*(volatile unsigned *)0x1000E088)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE24         (*(volatile unsigned *)0x1000E08c)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE25         (*(volatile unsigned *)0x1000E090)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE26         (*(volatile unsigned *)0x1000E094)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE27         (*(volatile unsigned *)0x1000E098)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE28         (*(volatile unsigned *)0x1000E09c)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE29         (*(volatile unsigned *)0x1000E0a0)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE30         (*(volatile unsigned *)0x1000E0a4)  /* ��¼�ӿڵ�ֵ */
-#define USBD_CFGINTERFACE31         (*(volatile unsigned *)0x1000E0a8)  /* ��¼�ӿڵ�ֵ */
-#define USBD_PKTPASSEDCTRL          (*(volatile unsigned *)0x1000E0ac)  /* ��¼�ɹ����յİ��� */
-#define USBD_PKTDROPPEDCTRL         (*(volatile unsigned *)0x1000E0b0)  /* ��¼��ʧ�İ��� */
-#define USBD_CRCERRCTRL             (*(volatile unsigned *)0x1000E0b4)  /* ��¼CRC����İ��� */
-#define USBD_BITSTUFFERRCTRL        (*(volatile unsigned *)0x1000E0b8)  /* ��¼λ������İ��� */
-#define USBD_PIDERRCTRL             (*(volatile unsigned *)0x1000E0bc)  /* ��¼PID����İ��� */
-#define USBD_FRAMINGERRCTL          (*(volatile unsigned *)0x1000E0c0)  /* ��¼��SYNC��EOP�İ��� */
-#define USBD_TXPKTCTRL              (*(volatile unsigned *)0x1000E0c4)  /* ��¼���Ͱ������� */
-#define USBD_STATCTRLOV             (*(volatile unsigned *)0x1000E0c8)  /* ��¼ͳ�ƼĴ��������� */
-#define USBD_TXLENGTH               (*(volatile unsigned *)0x1000E0cc)  /* ��¼ÿ��IN������������� */
-#define USBD_RXLENGTH               (*(volatile unsigned *)0x1000E0d0)  /* ��¼OUT������������� */
-#define USBD_RESUME                 (*(volatile unsigned *)0x1000E0d4)  /* USB���ѼĴ��� */
-#define USBD_READFLAG               (*(volatile unsigned *)0x1000E0d8)  /* ���첽״̬�Ĵ�����־ */
-#define USBD_RECEIVETYPE            (*(volatile unsigned *)0x1000E0dc)  /* ����״̬�Ĵ��� */
-#define USBD_APPLOCK                (*(volatile unsigned *)0x1000E0e0)  /* ���źżĴ��� */
-#define USBD_EP0OUTADDR             (*(volatile unsigned *)0x1000E100)  /* �˵�0�˵�źͷ��� */
-#define USBD_EP0OUTBMATTR           (*(volatile unsigned *)0x1000E104)  /* �˵�0���ͼĴ��� */
-#define USBD_EP0OUTMAXPKTSIZE       (*(volatile unsigned *)0x1000E108)  /* �˵�0�����ߴ�Ĵ��� */
-#define USBD_EP0OUTIFNUM            (*(volatile unsigned *)0x1000E10c)  /* �˵�0�ӿںżĴ��� */
-#define USBD_EP0OUTSTAT             (*(volatile unsigned *)0x1000E110)  /* �˵�0״̬�Ĵ��� */
-#define USBD_EP0OUTBMREQTYPE        (*(volatile unsigned *)0x1000E114)  /* �˵�0 SETUP���������� */
-#define USBD_EP0OUTBREQUEST         (*(volatile unsigned *)0x1000E118)  /* �˵�0 SETUP������������ */
-#define USBD_EP0OUTWVALUE           (*(volatile unsigned *)0x1000E11c)  /* �˵�0 SETUP��������ֵ */
-#define USBD_EP0OUTWINDEX           (*(volatile unsigned *)0x1000E120)  /* �˵�0 SETUP������������ */
-#define USBD_EP0OUTWLENGTH          (*(volatile unsigned *)0x1000E120)  /* �˵�0 SETUP�������󳤶� */
-#define USBD_EP0OUTSYNCHFRAME       (*(volatile unsigned *)0x1000E128)  /* �˵�0ͬ����֡�� */
-#define USBD_EP1OUTADDR             (*(volatile unsigned *)0x1000E12c)  /* �˵�1����˵�źͷ��� */
-#define USBD_EP1OUTBMATTR           (*(volatile unsigned *)0x1000E130)  /* �˵�1������ͼĴ��� */
-#define USBD_EP1OUTMAXPKTSIZE       (*(volatile unsigned *)0x1000E134)  /* �˵�1��������ߴ�Ĵ��� */
-#define USBD_EP1OUTIFNUM            (*(volatile unsigned *)0x1000E138)  /* �˵�1����ӿںżĴ��� */
-#define USBD_EP1OUTSTAT             (*(volatile unsigned *)0x1000E13c)  /* �˵�1���״̬�Ĵ��� */
-#define USBD_EP1OUTBMREQTYPE        (*(volatile unsigned *)0x1000E140)  /* �˵�1���SETUP������������ */
-#define USBD_EP1OUTBREQUEST         (*(volatile unsigned *)0x1000E144)  /* �˵�1���SETUP������������ */
-#define USBD_EP1OUTWVALUE           (*(volatile unsigned *)0x1000E148)  /* �˵�1���SETUP��������ֵ */
-#define USBD_EP1OUTWINDX            (*(volatile unsigned *)0x1000E14c)  /* �˵�1���SETUP������������ */
-#define USBD_EP1OUTWLENGH           (*(volatile unsigned *)0x1000E150)  /* �˵�1���SETUP���������򳤶� */
-#define USBD_EP1OUTSYNCHFRAME       (*(volatile unsigned *)0x1000E154)  /* �˵�1���ͬ����֡�� */
-#define USBD_EP1INADDR              (*(volatile unsigned *)0x1000E158)  /* �˵�1����˵�źͷ��� */
-#define USBD_EP1INBMATTR            (*(volatile unsigned *)0x1000E15c)  /* �˵�1�������ͼĴ��� */
-#define USBD_EP1INMAXPKTSIZE        (*(volatile unsigned *)0x1000E160)  /* �˵�1���������ߴ�Ĵ��� */
-#define USBD_EP1INIFNUM             (*(volatile unsigned *)0x1000E164)  /* �˵�1����ӿںżĴ��� */
-#define USBD_EP1INSTAT              (*(volatile unsigned *)0x1000E168)  /* �˵�1����״̬�Ĵ��� */
-#define USBD_EP1INBMREQTYPE         (*(volatile unsigned *)0x1000E16c)  /* �˵�1����SETUP������������ */
-#define USBD_EP1INBREQUEST          (*(volatile unsigned *)0x1000E170)  /* �˵�1����SETUP������������ */
-#define USBD_EP1INWVALUE            (*(volatile unsigned *)0x1000E174)  /* �˵�1����SETUP��������ֵ */
-#define USBD_EP1INWINDEX            (*(volatile unsigned *)0x1000E178)  /* �˵�1����SETUP������������ */
-#define USBD_EP1INWLENGTH           (*(volatile unsigned *)0x1000E17c)  /* �˵�1����SETUP���������򳤶� */
-#define USBD_EP1INSYNCHFRAME        (*(volatile unsigned *)0x1000E180)  /* �˵�1����ͬ����֡�� */
-#define USBD_EP2OUTADDR             (*(volatile unsigned *)0x1000E184)  /* �˵�2����˵�źͷ��� */
-#define USBD_EP2OUTBMATTR           (*(volatile unsigned *)0x1000E188)  /* �˵�2������ͼĴ��� */
-#define USBD_EP2OUTMAXPKTSIZE       (*(volatile unsigned *)0x1000E18c)  /* �˵�2��������ߴ�Ĵ��� */
-#define USBD_EP2OUTIFNUM            (*(volatile unsigned *)0x1000E190)  /* �˵�2����ӿںżĴ��� */
-#define USBD_EP2OUTSTAT             (*(volatile unsigned *)0x1000E194)  /* �˵�2���״̬�Ĵ��� */
-#define USBD_EP2OUTBMREQTYPE        (*(volatile unsigned *)0x1000E198)  /* �˵�2���SETUP������������ */
-#define USBD_EP2OUTBREQUEST         (*(volatile unsigned *)0x1000E19c)  /* �˵�2���SETUP������������ */
-#define USBD_EP2OUTWVALUE           (*(volatile unsigned *)0x1000E1a0)  /* �˵�2���SETUP��������ֵ */
-#define USBD_EP2OUTWINDEX           (*(volatile unsigned *)0x1000E1a4)  /* �˵�2���SETUP������������ */
-#define USBD_EP2OUTWLENGTH          (*(volatile unsigned *)0x1000E1a8)  /* �˵�2���SETUP���������򳤶� */
-#define USBD_EP2OUTSYNCHFRAME       (*(volatile unsigned *)0x1000E1ac)  /* �˵�2���ͬ����֡�� */
-#define USBD_EP2INADDR              (*(volatile unsigned *)0x1000E1b0)  /* �˵�2����˵�źͷ��� */
-#define USBD_EP2INBMATTR            (*(volatile unsigned *)0x1000E1b4)  /* �˵�2�������ͼĴ��� */
-#define USBD_EP2INMAXPKTSIZE        (*(volatile unsigned *)0x1000E1b8)  /* �˵�2���������ߴ�Ĵ��� */
-#define USBD_EP2INIFNUM             (*(volatile unsigned *)0x1000E1bc)  /* �˵�2����ӿںżĴ��� */
-#define USBD_EP2INSTAT              (*(volatile unsigned *)0x1000E1c0)  /* �˵�2����״̬�Ĵ��� */
-#define USBD_EP2INBMREQTYPE         (*(volatile unsigned *)0x1000E1c4)  /* �˵�2����SETUP������������ */
-#define USBD_EP2INBREQUEST          (*(volatile unsigned *)0x1000E1c8)  /* �˵�2����SETUP������������ */
-#define USBD_EP2INWVALUE            (*(volatile unsigned *)0x1000E1cc)  /* �˵�2����SETUP��������ֵ */
-#define USBD_EP2INWINDEX            (*(volatile unsigned *)0x1000E1d0)  /* �˵�2����SETUP������������ */
-#define USBD_EP2INWLENGTH           (*(volatile unsigned *)0x1000E1d4)  /* �˵�2����SETUP���������򳤶� */
-#define USBD_EP2INSYNCHFRAME        (*(volatile unsigned *)0x1000E1d8)  /* �˵�2����ͬ����֡�� */
-#define USBD_RXFIFO                 (*(volatile unsigned *)0x1000E200)  /* ����FIFO */
-#define USBD_TXFIFO                 (*(volatile unsigned *)0x1000E300)  /* ����FIFO */
-
-
-/******************************************************************************************
- *  EMIģ��
- *  ��ַ: 0x11000000
- ******************************************************************************************/
-
-#define EMI_CSACONF                 (*(volatile unsigned *)0x11000000)  /* CSA�������üĴ��� */
-#define EMI_CSBCONF                 (*(volatile unsigned *)0x11000004)  /* CSB�������üĴ��� */
-#define EMI_CSCCONF                 (*(volatile unsigned *)0x11000008)  /* CSC�������üĴ��� */
-#define EMI_CSDCONF                 (*(volatile unsigned *)0x1100000c)  /* CSD�������üĴ��� */
-#define EMI_CSECONF                 (*(volatile unsigned *)0x11000010)  /* CSE�������üĴ��� */
-#define EMI_CSFCONF                 (*(volatile unsigned *)0x11000014)  /* CSF�������üĴ��� */
-#define EMI_SDCONF1                 (*(volatile unsigned *)0x11000018)  /* SDRAMʱ�����üĴ���1 */
-#define EMI_SDCONF2                 (*(volatile unsigned *)0x1100001c)  /* SDRAMʱ�����üĴ���2, SDRAM��ʼ���õ���������Ϣ */
-#define EMI_REMAPCONF               (*(volatile unsigned *)0x11000020)  /* Ƭѡ�ռ估��ַӳ��REMAP���üĴ��� */
-#define EMI_NAND_ADDR1              (*(volatile unsigned *)0x11000100)  /* NAND FLASH�ĵ�ַ�Ĵ���1 */
-#define EMI_NAND_COM                (*(volatile unsigned *)0x11000104)  /* NAND FLASH�Ŀ����ּĴ��� */
-#define EMI_NAND_STA                (*(volatile unsigned *)0x1100010c)  /* NAND FLASH��״̬�Ĵ��� */
-#define EMI_ERR_ADDR1               (*(volatile unsigned *)0x11000110)  /* �����������ĵ�ַ�Ĵ���1 */
-#define EMI_ERR_ADDR2               (*(volatile unsigned *)0x11000114)  /* �����������ĵ�ַ�Ĵ���2 */
-#define EMI_NAND_CONF1              (*(volatile unsigned *)0x11000118)  /* NAND FLASH������������1 */
-#define EMI_NAND_INTR               (*(volatile unsigned *)0x1100011c)  /* NAND FLASH�жϼĴ��� */
-#define EMI_NAND_ECC                (*(volatile unsigned *)0x11000120)  /* ECCУ����ɼĴ��� */
-#define EMI_NAND_IDLE               (*(volatile unsigned *)0x11000124)  /* NAND FLASH���мĴ��� */
-#define EMI_NAND_CONF2              (*(volatile unsigned *)0x11000128)  /* NAND FLASH������������2 */
-#define EMI_NAND_ADDR2              (*(volatile unsigned *)0x1100012c)  /* NAND FLASH�ĵ�ַ�Ĵ���2 */
-#define EMI_NAND_ID                 (*(volatile unsigned *)0x11000130)  /* NAND FLASH��ID�Ĵ���*/
-#define EMI_NAND_DATA               (*(volatile unsigned *)0x11000200)  /* NAND FLASH�����ݼĴ��� */
-
-
-/******************************************************************************************
- *  DMACģ��
- *  ��ַ: 0x11001000
- ******************************************************************************************/
-
-#define DMAC_INTSTATUS              (*(volatile unsigned *)0x11001020)  /* DAMC�ж�״̬�Ĵ����� */
-#define DMAC_INTTCSTATUS            (*(volatile unsigned *)0x11001050)  /* DMAC��������ж�״̬�Ĵ��� */
-#define DMAC_INTTCCLEAR             (*(volatile unsigned *)0x11001060)  /* DMAC��������ж�״̬����Ĵ��� */
-#define DMAC_INTERRORSTATUS         (*(volatile unsigned *)0x11001080)  /* DMAC��������ж�״̬�Ĵ��� */
-#define DMAC_INTERRCLR              (*(volatile unsigned *)0x11001090)  /* DMAC��������ж�״̬����Ĵ��� */
-#define DMAC_ENBLDCHNS              (*(volatile unsigned *)0x110010b0)  /* DMACͨ��ʹ��״̬�Ĵ��� */
-#define DMAC_C0SRCADDR              (*(volatile unsigned *)0x11001000)  /* DMAC��0Դ��ַ�Ĵ��� */
-#define DMAC_C0DESTADD              (*(volatile unsigned *)0x11001004)  /* DMAC��0Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C0CONTROL              (*(volatile unsigned *)0x1100100c)  /* DMAC��0���ƼĴ��� */
-#define DMAC_C0CONFIGURATION        (*(volatile unsigned *)0x11001010)  /* DMAC��0���üĴ��� */
-#define DMAC_C0DESCRIPTOR           (*(volatile unsigned *)0x11001014)  /* DMAC��0������ַ�Ĵ��� */
-#define DMAC_C1SRCADDR              (*(volatile unsigned *)0x11001100)  /* DMAC��1Դ��ַ�Ĵ��� */
-#define DMAC_C1DESTADDR             (*(volatile unsigned *)0x11001104)  /* DMAC��1Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C1CONTROL              (*(volatile unsigned *)0x1100110c)  /* DMAC��1���ƼĴ��� */
-#define DMAC_C1CONFIGURATION        (*(volatile unsigned *)0x11001110)  /* DMAC��1���üĴ��� */
-#define DMAC_C1DESCRIPTOR           (*(volatile unsigned *)0x11001114)  /* DMAC��1������ַ�Ĵ��� */
-#define DMAC_C2SRCADDR              (*(volatile unsigned *)0x11001200)  /* DMAC��2Դ��ַ�Ĵ��� */
-#define DMAC_C2DESTADDR             (*(volatile unsigned *)0x11001204)  /* DMAC��2Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C2CONTROL              (*(volatile unsigned *)0x1100120c)  /* DMAC��2���ƼĴ��� */
-#define DMAC_C2CONFIGURATION        (*(volatile unsigned *)0x11001210)  /* DMAC��2���üĴ��� */
-#define DMAC_C2DESCRIPTOR           (*(volatile unsigned *)0x11001214)  /* DMAC��2������ַ�Ĵ��� */
-#define DMAC_C3SRCADDR              (*(volatile unsigned *)0x11001300)  /* DMAC��3Դ��ַ�Ĵ��� */
-#define DMAC_C3DESTADDR             (*(volatile unsigned *)0x11001304)  /* DMAC��3Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C3CONTROL              (*(volatile unsigned *)0x1100130c)  /* DMAC��3���ƼĴ��� */
-#define DMAC_C3CONFIGURATION        (*(volatile unsigned *)0x11001310)  /* DMAC��3���üĴ��� */
-#define DMAC_C3DESCRIPTOR           (*(volatile unsigned *)0x11001314)  /* DMAC��3������ַ�Ĵ��� */
-#define DMAC_C4SRCADDR              (*(volatile unsigned *)0x11001400)  /* DMAC��4Դ��ַ�Ĵ��� */
-#define DMAC_C4DESTADDR             (*(volatile unsigned *)0x11001404)  /* DMAC��4Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C4CONTROL              (*(volatile unsigned *)0x1100140c)  /* DMAC��4���ƼĴ��� */
-#define DMAC_C4CONFIGURATION        (*(volatile unsigned *)0x11001410)  /* DMAC��4���üĴ��� */
-#define DMAC_C4DESCRIPTOR           (*(volatile unsigned *)0x11001414)  /* DMAC��4������ַ�Ĵ��� */
-#define DMAC_C5SRCADDR              (*(volatile unsigned *)0x11001500)  /* DMAC��5Դ��ַ�Ĵ��� */
-#define DMAC_C5DESTADDR             (*(volatile unsigned *)0x11001504)  /* DMAC��5Ŀ�ĵ�ַ�Ĵ��� */
-#define DMAC_C5CONTROL              (*(volatile unsigned *)0x1100150c)  /* DMAC��5���ƼĴ��� */
-#define DMAC_C5CONFIGURATION        (*(volatile unsigned *)0x11001510)  /* DMAC��5���üĴ��� */
-#define DMAC_C5DESCRIPTOR           (*(volatile unsigned *)0x11001514)  /* DMAC��5������ַ�Ĵ��� */
-
-
-/******************************************************************************************
- *  LCDCģ��
- *  ��ַ: 0x11002000
- ******************************************************************************************/
-
-#define LCDC_SSA                    (*(volatile unsigned *)0x11002000)  /* ��Ļ��ʼ��ַ�Ĵ��� */
-#define LCDC_SIZE                   (*(volatile unsigned *)0x11002004)  /* ��Ļ�ߴ�Ĵ��� */
-#define LCDC_PCR                    (*(volatile unsigned *)0x11002008)  /* ������üĴ��� */
-#define LCDC_HCR                    (*(volatile unsigned *)0x1100200c)  /* ˮƽ���üĴ��� */
-#define LCDC_VCR                    (*(volatile unsigned *)0x11002010)  /* ��ֱ���üĴ��� */
-#define LCDC_PWMR                   (*(volatile unsigned *)0x11002014)  /* PWM�Աȶȿ��ƼĴ��� */
-#define LCDC_LECR                   (*(volatile unsigned *)0x11002018)  /* ʹ�ܿ��ƼĴ��� */
-#define LCDC_DMACR                  (*(volatile unsigned *)0x1100201c)  /* DMA���ƼĴ��� */
-#define LCDC_LCDISREN               (*(volatile unsigned *)0x11002020)  /* �ж�ʹ�ܼĴ��� */
-#define LCDC_LCDISR                 (*(volatile unsigned *)0x11002024)  /* �ж�״̬�Ĵ��� */
-#define LCDC_LGPMR                  (*(volatile unsigned *)0x11002040)  /* �Ҷȵ�ɫӳ��Ĵ����� */
-                                                                        /*(0x40-0x7c 16��32bit�Ĵ���) */
-
-
-/******************************************************************************************
- *  MACģ��
- *  ��ַ: 0x11003000
- ******************************************************************************************/
-
-#define MAC_CTRL                    (*(volatile unsigned *)0x11003000)  /* MAC���ƼĴ��� */
-#define MAC_INTSRC                  (*(volatile unsigned *)0x11003004)  /* MAC�ж�Դ�Ĵ��� */
-#define MAC_INTMASK                 (*(volatile unsigned *)0x11003008)  /* MAC�ж����μĴ��� */
-#define MAC_IPGT                    (*(volatile unsigned *)0x1100300c)  /* ����֡����Ĵ��� */
-#define MAC_IPGR1                   (*(volatile unsigned *)0x11003010)  /* �ȴ����ڼĴ��� */
-#define MAC_IPGR2                   (*(volatile unsigned *)0x11003014)  /* �ȴ����ڼĴ��� */
-#define MAC_PACKETLEN               (*(volatile unsigned *)0x11003018)  /* ֡���ȼĴ��� */
-#define MAC_COLLCONF                (*(volatile unsigned *)0x1100301c)  /* ��ײ�ط��Ĵ��� */
-#define MAC_TXBD_NUM                (*(volatile unsigned *)0x11003020)  /* �����������Ĵ��� */
-#define MAC_FLOWCTRL                (*(volatile unsigned *)0x11003024)  /* ���ؼĴ��� */
-#define MAC_MII_CTRL                (*(volatile unsigned *)0x11003028)  /* PHY���ƼĴ��� */
-#define MAC_MII_CMD                 (*(volatile unsigned *)0x1100302c)  /* PHY����Ĵ��� */
-#define MAC_MII_ADDRESS             (*(volatile unsigned *)0x11003030)  /* PHY��ַ�Ĵ��� */
-#define MAC_MII_TXDATA              (*(volatile unsigned *)0x11003034)  /* PHYд���ݼĴ��� */
-#define MAC_MII_RXDATA              (*(volatile unsigned *)0x11003038)  /* PHY�����ݼĴ��� */
-#define MAC_MII_STATUS              (*(volatile unsigned *)0x1100303c)  /* PHY״̬�Ĵ��� */
-#define MAC_ADDR0                   (*(volatile unsigned *)0x11003040)  /* MAC��ַ�Ĵ��� */
-#define MAC_ADDR1                   (*(volatile unsigned *)0x11003044)  /* MAC��ַ�Ĵ��� */
-#define MAC_HASH0                   (*(volatile unsigned *)0x11003048)  /* MAC HASH�Ĵ��� */
-#define MAC_HASH1                   (*(volatile unsigned *)0x1100304c)  /* MAC HASH�Ĵ��� */
-#define MAC_TXPAUSE                 (*(volatile unsigned *)0x11003050)  /* MAC����֡�Ĵ��� */
-#define MAC_BD                      /* 0x4*/
-
-
-#endif
-
-/*******************END OF FILE*************************/
diff --git a/bsp/sep4020/startup.c b/bsp/sep4020/startup.c
deleted file mode 100644
index e642fcdaf7..0000000000
--- a/bsp/sep4020/startup.c
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * File      : startup.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2006-08-31     Bernard      first implementation
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-
-#include "board.h"
-
-/**
- * @addtogroup STM32
- */
-
-/*@{*/
-
-extern int  rt_application_init(void);
-
-#ifdef RT_USING_FINSH
-extern void finsh_system_init(void);
-extern void finsh_set_device(const char* device);
-#endif
-
-#ifdef __CC_ARM
-extern int Image$$RW_RAM1$$ZI$$Limit;
-#elif __ICCARM__
-#pragma section="HEAP"
-#else
-extern int __bss_end;
-#endif
-
-#ifdef  DEBUG
-/*******************************************************************************
-* Function Name  : assert_failed
-* Description    : Reports the name of the source file and the source line number
-*                  where the assert error has occurred.
-* Input          : - file: pointer to the source file name
-*                  - line: assert error line source number
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void assert_failed(u8* file, u32 line)
-{
-	rt_kprintf("\n\r Wrong parameter value detected on\r\n");
-	rt_kprintf("       file  %s\r\n", file);
-	rt_kprintf("       line  %d\r\n", line);
-
-	while (1) ;
-}
-#endif
-
-/**
- * This function will startup RT-Thread RTOS.
- */
-void rtthread_startup(void)
-{
-	/* init hardware interrupt */
-	rt_hw_interrupt_init();
-	/* init board */
-	rt_hw_board_init();
-
-	/* show version */
-	rt_show_version();
-
-	/* init tick */
-	rt_system_tick_init();
-
-	/* init kernel object */
-	rt_system_object_init();
-
-	/* init timer system */
-	rt_system_timer_init();
-
-#ifdef RT_USING_HEAP
-	#ifdef __CC_ARM
-		rt_system_heap_init((void*)&Image$$RW_RAM1$$ZI$$Limit, (void*)0x32000000);
-	#elif __ICCARM__
-	    rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
-	#else
-		/* init memory system */
-		rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
-	#endif
-#endif
-
-	/* init scheduler system */
-	rt_system_scheduler_init();
-     
-	/* init all device */
-	rt_device_init_all();
-
-	/* init application */
-	rt_application_init();
-
-#ifdef RT_USING_FINSH
-    /* init finsh */
-    finsh_system_init();
-    finsh_set_device("uart0");
-#endif
-
-	/* init idle thread */
-	rt_thread_idle_init();
-
-	/* start scheduler */
-	rt_system_scheduler_start();
-
-	/* never reach here */
-	return ;
-}
-
-int main(void)
-{
-	rt_uint32_t UNUSED level;
-
-	/* disable interrupt first */
-	level = rt_hw_interrupt_disable();
-
-	/* startup RT-Thread RTOS */
-	rtthread_startup();
-
-	return 0;
-}
-
-/*@}*/