libs/rt-thread-official
libs
/
rt-thread-official
mirror of https://github.com/RT-Thread/rt-thread.git
4
0
Fork 0
Code Issues Releases Wiki Activity

delete the evb4020 and sep4020 branches, now We only maintain mini4020 branch. 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1291 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
dennis.zhang.os@gmail.com 2011-02-26 09:25:51 +00:00
parent 9236274689
commit 835ee58a4b
42 changed files with 0 additions and 21321 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
bsp/evb4020/ExtDll.iex
View File

@ -1,2 +0,0 @@
[EXTDLL]
Count=0

25
bsp/evb4020/Ext_SDRAM.ini
View File

@ -1,25 +0,0 @@
/******************************************************************************/
/* MEMORY.INI: Memory Debug Initialization File */
/******************************************************************************/
/* This file is part of the uVision/ARM development tools. */
/* Copyright (c) 2005-2006 Keil Software. All rights reserved. */
/* This software may only be used under the terms of a valid, current, */
/* end user licence from KEIL for a compatible version of KEIL software */
/* development tools. Nothing else gives you the right to use this software. */
/******************************************************************************/
RESET
FUNC void InitEmi(void)
{
_WWORD(0x11000000,0x08a6a6a1);
_WWORD(0x11000010,0x8cfffff1);
_WWORD(0x11000018,0x1e104177);
_WWORD(0x1100001C,0x80001860);
_WWORD(0x11000020,0x0000000b);
}
InitEmi();
Load %L INCREMENTAL;
PC = 0x30000000;

14
bsp/evb4020/JLinkArm_EVB4020.ini
View File

@ -1,14 +0,0 @@
[FLASH]
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 0
Device="ADUC7020X62"
[BREAKPOINTS]
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CPU]
OverrideMemMap = 0
AllowSimulation = 1

BIN
bsp/evb4020/Rt-thread sep4020 分支介绍.doc
View File

Binary file not shown.

0
bsp/evb4020/divsi3.lst
View File

25
bsp/evb4020/evb4020.sct
View File

@ -1,25 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
; *************************************************************
; *** Scatter-Loadig Description File generated by uVision ***n
; *************************************************************
LR_ROM1 0x30000000 0x0FFD00 ; load region size_region
{
ER_ROM1 0x30000000 0x0FFD00 ; load address = execution address
{
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_RAM1 0x30100000 0x100000 ; RW data
{
.ANY (+RW +ZI)
}
}

21
bsp/evb4020/evb4020.tra
View File

@ -1,21 +0,0 @@
*** Creating Trace Output File 'evb4020.tra' Ok.
### Preparing for ADS-LD.
### Creating ADS-LD Command Line
### List of Objects: adding '"startup.o"'
### List of Objects: adding '".\context_rvds.o"'
### List of Objects: adding '".\start_rvds.o"'
### ADS-LD Command completed:
--cpu ARM7TDMI "startup.o" ".\context_rvds.o" ".\start_rvds.o" --strict --scatter "evb4020.sct"
--autoat --summary_stderr --info summarysizes --map --xref --callgraph --symbols
--info sizes --info totals --info unused --info veneers
--list ".\evb4020.map" -o "evb4020.axf"### Preparing Environment (PrepEnvAds)
### ADS-LD Output File: 'evb4020.axf'
### ADS-LD Command File: 'evb4020.lnp'
### Checking for dirty Components...
### Creating CmdFile 'evb4020.lnp', Handle=0x000006D0
### Writing '.lnp' file
### ADS-LD Command file 'evb4020.lnp' is ready.
### ADS-LD: About to start ADS-LD Thread.
### ADS-LD: executed with 0 errors
### Updating obj list
### LDADS_file() completed.

4492
bsp/evb4020/evb4020.uvopt
View File

File diff suppressed because one or more lines are too long

939
bsp/evb4020/evb4020.uvproj
View File

@ -1,939 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>EVB4020</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>ARM7 (Little Endian)</Device>
<Vendor>ARM</Vendor>
<Cpu>CLOCK(60000000) CPUTYPE(ARM7TDMI)</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId>3654</DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\output\</OutputDirectory>
<OutputName>evb4020</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf.exe --bin -o Output/evb4020.bin Output/*.axf</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
</CommonProperty>
<DllOption>
<SimDllName>SARM.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDll>DARMP.DLL</SimDlgDll>
<SimDlgDllArguments></SimDlgDllArguments>
<TargetDllName>SARM.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TARMP.DLL</TargetDlgDll>
<TargetDlgDllArguments></TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
<Simulator>
<UseSimulator>0</UseSimulator>
<LoadApplicationAtStartup>0</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>1</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
</Simulator>
<Target>
<UseTarget>1</UseTarget>
<LoadApplicationAtStartup>0</LoadApplicationAtStartup>
<RunToMain>0</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>6</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
</SimDlls>
<TargetDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile>.\Ext_SDRAM.ini</InitializationFile>
<Driver>Segger\JLTAgdi.dll</Driver>
</TargetDlls>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4098</DriverSelection>
</Flash1>
<Flash2>Segger\JLTAgdi.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>ARM7TDMI</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>0</hadIROM>
<hadIRAM>0</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>1</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<RoSelD>0</RoSelD>
<RwSelD>5</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>1</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>0</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>1</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>0</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</IRAM>
<IROM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x200000</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x30000000</StartAddress>
<Size>0x200000</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x4000000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>0</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<VariousControls>
<MiscControls>-g</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>.\src;..\..\include;..\..\finsh;..\..\filesystem;..\..\components\dfs\include;..\..\components\finsh;..\..\components\dfs;..\..\components\net\lwip\src\arch\include;..\..\components\net\lwip\src\include;..\..\components\net\lwip\src;..\..\components\net\lwip\src\include\ipv4;..\..\components\net\lwip\src\include\netif;..\..\components\net\lwip\src\include\lwip</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>0</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<VariousControls>
<MiscControls></MiscControls>
<Define>RAM_INTVEC REMAP</Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<ScatterFile>evb4020.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>--verbose --list=out.txt</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>STARTUP</GroupName>
<Files>
<File>
<FileName>startup.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\startup.c</FilePath>
</File>
<File>
<FileName>application.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\application.c</FilePath>
</File>
<File>
<FileName>export.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\export.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>KERNEL</GroupName>
<Files>
<File>
<FileName>clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\clock.c</FilePath>
</File>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\device.c</FilePath>
</File>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\idle.c</FilePath>
</File>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\ipc.c</FilePath>
</File>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\irq.c</FilePath>
</File>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\kservice.c</FilePath>
</File>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\mem.c</FilePath>
</File>
<File>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\mempool.c</FilePath>
</File>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\object.c</FilePath>
</File>
<File>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\scheduler.c</FilePath>
</File>
<File>
<FileName>slab.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\slab.c</FilePath>
</File>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\thread.c</FilePath>
</File>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\timer.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>SEP4020</GroupName>
<Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\libcpu\arm\sep4020\context_rvds.S</FilePath>
</File>
<File>
<FileName>start_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\libcpu\arm\sep4020\start_rvds.S</FilePath>
</File>
<File>
<FileName>stack.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\stack.c</FilePath>
</File>
<File>
<FileName>trap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\trap.c</FilePath>
</File>
<File>
<FileName>interrupt.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\interrupt.c</FilePath>
</File>
<File>
<FileName>cpu.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\cpu.c</FilePath>
</File>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\board.c</FilePath>
</File>
<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\serial.c</FilePath>
</File>
<File>
<FileName>sdcard.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\sdcard.c</FilePath>
</File>
<File>
<FileName>dm9161.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\dm9161.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>ARM</GroupName>
<Files>
<File>
<FileName>backtrace.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
</File>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
</File>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>FileSystem</GroupName>
<Files>
<File>
<FileName>dfs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs.c</FilePath>
</File>
<File>
<FileName>dfs_file.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs_file.c</FilePath>
</File>
<File>
<FileName>dfs_fs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs_fs.c</FilePath>
</File>
<File>
<FileName>dfs_posix.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs_posix.c</FilePath>
</File>
<File>
<FileName>dfs_elm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\filesystems\elmfat\dfs_elm.c</FilePath>
</File>
<File>
<FileName>ff.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\filesystems\elmfat\ff.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>FINSH</GroupName>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>finsh_compiler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
</File>
<File>
<FileName>finsh_error.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_error.c</FilePath>
</File>
<File>
<FileName>finsh_heap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
</File>
<File>
<FileName>finsh_init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_init.c</FilePath>
</File>
<File>
<FileName>finsh_node.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_node.c</FilePath>
</File>
<File>
<FileName>finsh_ops.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
</File>
<File>
<FileName>finsh_parser.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
</File>
<File>
<FileName>finsh_token.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_token.c</FilePath>
</File>
<File>
<FileName>finsh_var.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_var.c</FilePath>
</File>
<File>
<FileName>finsh_vm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
</File>
<File>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\shell.c</FilePath>
</File>
<File>
<FileName>symbol.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\symbol.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>LWIP</GroupName>
<Files>
<File>
<FileName>api_lib.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\api_lib.c</FilePath>
</File>
<File>
<FileName>api_msg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\api_msg.c</FilePath>
</File>
<File>
<FileName>err.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\err.c</FilePath>
</File>
<File>
<FileName>netbuf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\netbuf.c</FilePath>
</File>
<File>
<FileName>netdb.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\netdb.c</FilePath>
</File>
<File>
<FileName>netifapi.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\netifapi.c</FilePath>
</File>
<File>
<FileName>sockets.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\sockets.c</FilePath>
</File>
<File>
<FileName>tcpip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\tcpip.c</FilePath>
</File>
<File>
<FileName>sys_arch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\arch\sys_arch.c</FilePath>
</File>
<File>
<FileName>sys_arch_init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\arch\sys_arch_init.c</FilePath>
</File>
<File>
<FileName>dhcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\dhcp.c</FilePath>
</File>
<File>
<FileName>dns.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\dns.c</FilePath>
</File>
<File>
<FileName>init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\init.c</FilePath>
</File>
<File>
<FileName>memp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\memp.c</FilePath>
</File>
<File>
<FileName>netif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\netif.c</FilePath>
</File>
<File>
<FileName>pbuf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\pbuf.c</FilePath>
</File>
<File>
<FileName>raw.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\raw.c</FilePath>
</File>
<File>
<FileName>stats.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\stats.c</FilePath>
</File>
<File>
<FileName>sys.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\sys.c</FilePath>
</File>
<File>
<FileName>tcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\tcp.c</FilePath>
</File>
<File>
<FileName>tcp_in.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\tcp_in.c</FilePath>
</File>
<File>
<FileName>tcp_out.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\tcp_out.c</FilePath>
</File>
<File>
<FileName>udp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\udp.c</FilePath>
</File>
<File>
<FileName>autoip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\autoip.c</FilePath>
</File>
<File>
<FileName>icmp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\icmp.c</FilePath>
</File>
<File>
<FileName>igmp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\igmp.c</FilePath>
</File>
<File>
<FileName>inet.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\inet.c</FilePath>
</File>
<File>
<FileName>inet_chksum.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\inet_chksum.c</FilePath>
</File>
<File>
<FileName>ip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\ip.c</FilePath>
</File>
<File>
<FileName>ip_addr.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\ip_addr.c</FilePath>
</File>
<File>
<FileName>ip_frag.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\ip_frag.c</FilePath>
</File>
<File>
<FileName>asn1_dec.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\asn1_dec.c</FilePath>
</File>
<File>
<FileName>asn1_enc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\asn1_enc.c</FilePath>
</File>
<File>
<FileName>mib_structs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\mib_structs.c</FilePath>
</File>
<File>
<FileName>mib2.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\mib2.c</FilePath>
</File>
<File>
<FileName>msg_in.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\msg_in.c</FilePath>
</File>
<File>
<FileName>msg_out.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\msg_out.c</FilePath>
</File>
<File>
<FileName>etharp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\etharp.c</FilePath>
</File>
<File>
<FileName>ethernetif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ethernetif.c</FilePath>
</File>
<File>
<FileName>loopif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\loopif.c</FilePath>
</File>
<File>
<FileName>slipif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\slipif.c</FilePath>
</File>
<File>
<FileName>auth.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\auth.c</FilePath>
</File>
<File>
<FileName>chap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\chap.c</FilePath>
</File>
<File>
<FileName>chpms.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\chpms.c</FilePath>
</File>
<File>
<FileName>fsm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\fsm.c</FilePath>
</File>
<File>
<FileName>ipcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\ipcp.c</FilePath>
</File>
<File>
<FileName>lcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\lcp.c</FilePath>
</File>
<File>
<FileName>magic.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\magic.c</FilePath>
</File>
<File>
<FileName>md5.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\md5.c</FilePath>
</File>
<File>
<FileName>pap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\pap.c</FilePath>
</File>
<File>
<FileName>ppp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\ppp.c</FilePath>
</File>
<File>
<FileName>ppp_oe.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\ppp_oe.c</FilePath>
</File>
<File>
<FileName>randm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\randm.c</FilePath>
</File>
<File>
<FileName>vj.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\vj.c</FilePath>
</File>
<File>
<FileName>ping.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\apps\ping.c</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>

1
bsp/evb4020/evb4020_Target 1.dep
View File

@ -1 +0,0 @@
Dependencies for Project 'evb4020', Target 'Target 1': (DO NOT MODIFY !)

18
bsp/evb4020/evb4020_nor.sct
View File

@ -1,18 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_ROM1 0x20000200 0x0FFD00 ; load region size_region
{
ER_ROM1 0x20000200 0x0FFD00 ; load address = execution address
{
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_RAM1 0x30100000 0x080000 ; RW data
{
.ANY (+RW +ZI)
}
}

4492
bsp/evb4020/evb4020_uvopt.bak
View File

File diff suppressed because one or more lines are too long

939
bsp/evb4020/evb4020_uvproj.bak
View File

@ -1,939 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>EVB4020</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>ARM7 (Little Endian)</Device>
<Vendor>ARM</Vendor>
<Cpu>CLOCK(60000000) CPUTYPE(ARM7TDMI)</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId>3654</DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\output\</OutputDirectory>
<OutputName>evb4020</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf.exe --bin -o Output/evb4020.bin Output/*.axf</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
</CommonProperty>
<DllOption>
<SimDllName>SARM.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDll>DARMP.DLL</SimDlgDll>
<SimDlgDllArguments></SimDlgDllArguments>
<TargetDllName>SARM.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TARMP.DLL</TargetDlgDll>
<TargetDlgDllArguments></TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
<Simulator>
<UseSimulator>0</UseSimulator>
<LoadApplicationAtStartup>0</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>1</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
</Simulator>
<Target>
<UseTarget>1</UseTarget>
<LoadApplicationAtStartup>0</LoadApplicationAtStartup>
<RunToMain>0</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>6</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
</SimDlls>
<TargetDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile>.\Ext_SDRAM.ini</InitializationFile>
<Driver>Segger\JLTAgdi.dll</Driver>
</TargetDlls>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4098</DriverSelection>
</Flash1>
<Flash2>Segger\JLTAgdi.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>ARM7TDMI</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>0</hadIROM>
<hadIRAM>0</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>1</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<RoSelD>0</RoSelD>
<RwSelD>5</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>1</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>0</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>1</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>0</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</IRAM>
<IROM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x200000</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x30000000</StartAddress>
<Size>0x200000</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x4000000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>0</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<VariousControls>
<MiscControls>-g</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>.\src;..\..\include;..\..\finsh;..\..\filesystem;..\..\components\dfs\include;..\..\components\finsh;..\..\components\dfs;..\..\components\net\lwip\src\arch\include;..\..\components\net\lwip\src\include;..\..\components\net\lwip\src;..\..\components\net\lwip\src\include\ipv4;..\..\components\net\lwip\src\include\netif;..\..\components\net\lwip\src\include\lwip</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>0</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<VariousControls>
<MiscControls></MiscControls>
<Define>RAM_INTVEC REMAP</Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<ScatterFile>evb4020.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>--verbose --list=out.txt</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>STARTUP</GroupName>
<Files>
<File>
<FileName>startup.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\startup.c</FilePath>
</File>
<File>
<FileName>application.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\application.c</FilePath>
</File>
<File>
<FileName>export.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\export.c</FilePath>
</File>
<File>
<FileName>tcpsendpacket.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\tcpsendpacket.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>KERNEL</GroupName>
<Files>
<File>
<FileName>clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\clock.c</FilePath>
</File>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\device.c</FilePath>
</File>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\idle.c</FilePath>
</File>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\ipc.c</FilePath>
</File>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\irq.c</FilePath>
</File>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\kservice.c</FilePath>
</File>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\mem.c</FilePath>
</File>
<File>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\mempool.c</FilePath>
</File>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\object.c</FilePath>
</File>
<File>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\scheduler.c</FilePath>
</File>
<File>
<FileName>slab.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\slab.c</FilePath>
</File>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\thread.c</FilePath>
</File>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\timer.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>SEP4020</GroupName>
<Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\libcpu\arm\sep4020\context_rvds.S</FilePath>
</File>
<File>
<FileName>start_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\libcpu\arm\sep4020\start_rvds.S</FilePath>
</File>
<File>
<FileName>stack.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\stack.c</FilePath>
</File>
<File>
<FileName>trap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\trap.c</FilePath>
</File>
<File>
<FileName>interrupt.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\interrupt.c</FilePath>
</File>
<File>
<FileName>cpu.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\sep4020\cpu.c</FilePath>
</File>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\board.c</FilePath>
</File>
<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\serial.c</FilePath>
</File>
<File>
<FileName>sdcard.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\sdcard.c</FilePath>
</File>
<File>
<FileName>dm9161.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\dm9161.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>ARM</GroupName>
<Files>
<File>
<FileName>backtrace.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
</File>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
</File>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>FileSystem</GroupName>
<Files>
<File>
<FileName>dfs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs.c</FilePath>
</File>
<File>
<FileName>dfs_file.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs_file.c</FilePath>
</File>
<File>
<FileName>dfs_fs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs_fs.c</FilePath>
</File>
<File>
<FileName>dfs_posix.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\src\dfs_posix.c</FilePath>
</File>
<File>
<FileName>dfs_elm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\filesystems\elmfat\dfs_elm.c</FilePath>
</File>
<File>
<FileName>ff.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\dfs\filesystems\elmfat\ff.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>FINSH</GroupName>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>finsh_compiler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
</File>
<File>
<FileName>finsh_error.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_error.c</FilePath>
</File>
<File>
<FileName>finsh_heap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
</File>
<File>
<FileName>finsh_init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_init.c</FilePath>
</File>
<File>
<FileName>finsh_node.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_node.c</FilePath>
</File>
<File>
<FileName>finsh_ops.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
</File>
<File>
<FileName>finsh_parser.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
</File>
<File>
<FileName>finsh_token.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_token.c</FilePath>
</File>
<File>
<FileName>finsh_var.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_var.c</FilePath>
</File>
<File>
<FileName>finsh_vm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
</File>
<File>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\shell.c</FilePath>
</File>
<File>
<FileName>symbol.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\finsh\symbol.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>LWIP</GroupName>
<Files>
<File>
<FileName>api_lib.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\api_lib.c</FilePath>
</File>
<File>
<FileName>api_msg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\api_msg.c</FilePath>
</File>
<File>
<FileName>err.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\err.c</FilePath>
</File>
<File>
<FileName>netbuf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\netbuf.c</FilePath>
</File>
<File>
<FileName>netdb.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\netdb.c</FilePath>
</File>
<File>
<FileName>netifapi.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\netifapi.c</FilePath>
</File>
<File>
<FileName>sockets.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\sockets.c</FilePath>
</File>
<File>
<FileName>tcpip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\api\tcpip.c</FilePath>
</File>
<File>
<FileName>sys_arch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\arch\sys_arch.c</FilePath>
</File>
<File>
<FileName>sys_arch_init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\arch\sys_arch_init.c</FilePath>
</File>
<File>
<FileName>dhcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\dhcp.c</FilePath>
</File>
<File>
<FileName>dns.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\dns.c</FilePath>
</File>
<File>
<FileName>init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\init.c</FilePath>
</File>
<File>
<FileName>memp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\memp.c</FilePath>
</File>
<File>
<FileName>netif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\netif.c</FilePath>
</File>
<File>
<FileName>pbuf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\pbuf.c</FilePath>
</File>
<File>
<FileName>raw.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\raw.c</FilePath>
</File>
<File>
<FileName>stats.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\stats.c</FilePath>
</File>
<File>
<FileName>sys.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\sys.c</FilePath>
</File>
<File>
<FileName>tcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\tcp.c</FilePath>
</File>
<File>
<FileName>tcp_in.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\tcp_in.c</FilePath>
</File>
<File>
<FileName>tcp_out.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\tcp_out.c</FilePath>
</File>
<File>
<FileName>udp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\udp.c</FilePath>
</File>
<File>
<FileName>autoip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\autoip.c</FilePath>
</File>
<File>
<FileName>icmp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\icmp.c</FilePath>
</File>
<File>
<FileName>igmp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\igmp.c</FilePath>
</File>
<File>
<FileName>inet.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\inet.c</FilePath>
</File>
<File>
<FileName>inet_chksum.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\inet_chksum.c</FilePath>
</File>
<File>
<FileName>ip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\ip.c</FilePath>
</File>
<File>
<FileName>ip_addr.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\ip_addr.c</FilePath>
</File>
<File>
<FileName>ip_frag.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\ipv4\ip_frag.c</FilePath>
</File>
<File>
<FileName>asn1_dec.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\asn1_dec.c</FilePath>
</File>
<File>
<FileName>asn1_enc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\asn1_enc.c</FilePath>
</File>
<File>
<FileName>mib_structs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\mib_structs.c</FilePath>
</File>
<File>
<FileName>mib2.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\mib2.c</FilePath>
</File>
<File>
<FileName>msg_in.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\msg_in.c</FilePath>
</File>
<File>
<FileName>msg_out.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\core\snmp\msg_out.c</FilePath>
</File>
<File>
<FileName>etharp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\etharp.c</FilePath>
</File>
<File>
<FileName>ethernetif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ethernetif.c</FilePath>
</File>
<File>
<FileName>loopif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\loopif.c</FilePath>
</File>
<File>
<FileName>slipif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\slipif.c</FilePath>
</File>
<File>
<FileName>auth.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\auth.c</FilePath>
</File>
<File>
<FileName>chap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\chap.c</FilePath>
</File>
<File>
<FileName>chpms.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\chpms.c</FilePath>
</File>
<File>
<FileName>fsm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\fsm.c</FilePath>
</File>
<File>
<FileName>ipcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\ipcp.c</FilePath>
</File>
<File>
<FileName>lcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\lcp.c</FilePath>
</File>
<File>
<FileName>magic.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\magic.c</FilePath>
</File>
<File>
<FileName>md5.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\md5.c</FilePath>
</File>
<File>
<FileName>pap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\pap.c</FilePath>
</File>
<File>
<FileName>ppp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\ppp.c</FilePath>
</File>
<File>
<FileName>ppp_oe.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\ppp_oe.c</FilePath>
</File>
<File>
<FileName>randm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\randm.c</FilePath>
</File>
<File>
<FileName>vj.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\net\lwip\src\netif\ppp\vj.c</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>

154
bsp/evb4020/output/evb4020.plg
View File

@ -1,154 +0,0 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Project:</h2>
F:\rtt\bsp\evb4020\evb4020.uvproj
Project File Date: 10/26/2010
<h2>Output:</h2>
Build target 'EVB4020'
compiling startup.c...
compiling application.c...
compiling export.c...
compiling clock.c...
compiling device.c...
compiling idle.c...
compiling ipc.c...
compiling irq.c...
compiling kservice.c...
compiling mem.c...
compiling mempool.c...
compiling object.c...
compiling scheduler.c...
compiling slab.c...
compiling thread.c...
compiling timer.c...
assembling context_rvds.S...
assembling start_rvds.S...
compiling stack.c...
compiling trap.c...
compiling interrupt.c...
compiling cpu.c...
..\..\libcpu\arm\sep4020\cpu.c(21): warning: #1215-D: #warning directive: I DON'T KNOW IF THE MMU OPERATION WORKS ON SEP4020
..\..\libcpu\arm\sep4020\cpu.c: #warning I DON'T KNOW IF THE MMU OPERATION WORKS ON SEP4020
..\..\libcpu\arm\sep4020\cpu.c: ^
..\..\libcpu\arm\sep4020\cpu.c(187): warning: #236-D: controlling expression is constant
..\..\libcpu\arm\sep4020\cpu.c: RT_ASSERT(RT_NULL);
..\..\libcpu\arm\sep4020\cpu.c: ^
..\..\libcpu\arm\sep4020\cpu.c: ..\..\libcpu\arm\sep4020\cpu.c: 2 warnings, 0 errors
compiling board.c...
compiling serial.c...
compiling sdcard.c...
src\sdcard.c(359): warning: #177-D: function "sd_readmultiblock" was declared but never referenced
src\sdcard.c: static rt_uint8_t sd_readmultiblock(rt_uint32_t address, rt_uint8_t* buf,rt_uint32_t size)
src\sdcard.c: ^
src\sdcard.c: src\sdcard.c: 1 warning, 0 errors
compiling dm9161.c...
src\dm9161.c(363): warning: #1215-D: #warning directive: SHOULD SET MAC ADDR
src\dm9161.c: #warning SHOULD SET MAC ADDR
src\dm9161.c: ^
src\dm9161.c(369): warning: #1215-D: #warning directive: SHOULD DETERMIN LINK SPEED
src\dm9161.c: #warning SHOULD DETERMIN LINK SPEED
src\dm9161.c: ^
src\dm9161.c(487): warning: #1215-D: #warning directive: disable ether;
src\dm9161.c: #warning disable ether;
src\dm9161.c: ^
src\dm9161.c(534): warning: #1215-D: #warning directive: SHOULD DISABLE INTEERUPT?
src\dm9161.c: #warning SHOULD DISABLE INTEERUPT?
src\dm9161.c: ^
src\dm9161.c(563): warning: #1215-D: #warning directive: SHOULD NOTICE IT'S LENGTH
src\dm9161.c: #warning SHOULD NOTICE IT'S LENGTH
src\dm9161.c: ^
src\dm9161.c(616): warning: #177-D: variable "len" was declared but never referenced
src\dm9161.c: rt_int32_t len;
src\dm9161.c: ^
src\dm9161.c(664): warning: #1215-D: #warning directive: NOTICE:
src\dm9161.c: #warning NOTICE:
src\dm9161.c: ^
src\dm9161.c(688): warning: #1215-D: #warning directive: TODO
src\dm9161.c: #warning TODO
src\dm9161.c: ^
src\dm9161.c: src\dm9161.c: 8 warnings, 0 errors
compiling backtrace.c...
compiling div0.c...
compiling showmem.c...
compiling dfs.c...
compiling dfs_file.c...
compiling dfs_fs.c...
compiling dfs_posix.c...
compiling dfs_elm.c...
compiling ff.c...
compiling cmd.c...
compiling finsh_compiler.c...
compiling finsh_error.c...
compiling finsh_heap.c...
compiling finsh_init.c...
compiling finsh_node.c...
compiling finsh_ops.c...
compiling finsh_parser.c...
compiling finsh_token.c...
compiling finsh_var.c...
compiling finsh_vm.c...
compiling shell.c...
compiling symbol.c...
compiling api_lib.c...
compiling api_msg.c...
compiling err.c...
compiling netbuf.c...
compiling netdb.c...
compiling netifapi.c...
compiling sockets.c...
compiling tcpip.c...
compiling sys_arch.c...
compiling sys_arch_init.c...
compiling dhcp.c...
compiling dns.c...
compiling init.c...
compiling memp.c...
compiling netif.c...
compiling pbuf.c...
compiling raw.c...
compiling stats.c...
compiling sys.c...
compiling tcp.c...
compiling tcp_in.c...
compiling tcp_out.c...
compiling udp.c...
compiling autoip.c...
compiling icmp.c...
compiling igmp.c...
compiling inet.c...
compiling inet_chksum.c...
compiling ip.c...
compiling ip_addr.c...
compiling ip_frag.c...
compiling asn1_dec.c...
compiling asn1_enc.c...
compiling mib_structs.c...
compiling mib2.c...
compiling msg_in.c...
compiling msg_out.c...
compiling etharp.c...
compiling ethernetif.c...
compiling loopif.c...
compiling slipif.c...
compiling auth.c...
compiling chap.c...
compiling chpms.c...
compiling fsm.c...
compiling ipcp.c...
compiling lcp.c...
compiling magic.c...
compiling md5.c...
compiling pap.c...
compiling ppp.c...
compiling ppp_oe.c...
compiling randm.c...
compiling vj.c...
compiling ping.c...
linking...
Program Size: Code=96692 RO-data=3264 RW-data=468 ZI-data=17844
".\output\evb4020.axf" - 0 Error(s), 11 Warning(s).
Clean started: Project: 'evb4020'
deleting intermediate output files for target 'EVB4020'

121
bsp/evb4020/output/evb4020.tra
View File

@ -1,121 +0,0 @@
*** Creating Trace Output File '.\output\evb4020.tra' Ok.
### Preparing for ADS-LD.
### Creating ADS-LD Command Line
### List of Objects: adding '".\output\startup.o"'
### List of Objects: adding '".\output\application.o"'
### List of Objects: adding '".\output\export.o"'
### List of Objects: adding '".\output\clock.o"'
### List of Objects: adding '".\output\device.o"'
### List of Objects: adding '".\output\idle.o"'
### List of Objects: adding '".\output\ipc.o"'
### List of Objects: adding '".\output\irq.o"'
### List of Objects: adding '".\output\kservice.o"'
### List of Objects: adding '".\output\mem.o"'
### List of Objects: adding '".\output\mempool.o"'
### List of Objects: adding '".\output\object.o"'
### List of Objects: adding '".\output\scheduler.o"'
### List of Objects: adding '".\output\slab.o"'
### List of Objects: adding '".\output\thread.o"'
### List of Objects: adding '".\output\timer.o"'
### List of Objects: adding '".\output\context_rvds.o"'
### List of Objects: adding '".\output\start_rvds.o"'
### List of Objects: adding '".\output\stack.o"'
### List of Objects: adding '".\output\trap.o"'
### List of Objects: adding '".\output\interrupt.o"'
### List of Objects: adding '".\output\cpu.o"'
### List of Objects: adding '".\output\board.o"'
### List of Objects: adding '".\output\serial.o"'
### List of Objects: adding '".\output\sdcard.o"'
### List of Objects: adding '".\output\dm9161.o"'
### List of Objects: adding '".\output\backtrace.o"'
### List of Objects: adding '".\output\div0.o"'
### List of Objects: adding '".\output\showmem.o"'
### List of Objects: adding '".\output\dfs.o"'
### List of Objects: adding '".\output\dfs_file.o"'
### List of Objects: adding '".\output\dfs_fs.o"'
### List of Objects: adding '".\output\dfs_posix.o"'
### List of Objects: adding '".\output\dfs_elm.o"'
### List of Objects: adding '".\output\ff.o"'
### List of Objects: adding '".\output\cmd.o"'
### List of Objects: adding '".\output\finsh_compiler.o"'
### List of Objects: adding '".\output\finsh_error.o"'
### List of Objects: adding '".\output\finsh_heap.o"'
### List of Objects: adding '".\output\finsh_init.o"'
### List of Objects: adding '".\output\finsh_node.o"'
### List of Objects: adding '".\output\finsh_ops.o"'
### List of Objects: adding '".\output\finsh_parser.o"'
### List of Objects: adding '".\output\finsh_token.o"'
### List of Objects: adding '".\output\finsh_var.o"'
### List of Objects: adding '".\output\finsh_vm.o"'
### List of Objects: adding '".\output\shell.o"'
### List of Objects: adding '".\output\symbol.o"'
### List of Objects: adding '".\output\api_lib.o"'
### List of Objects: adding '".\output\api_msg.o"'
### List of Objects: adding '".\output\err.o"'
### List of Objects: adding '".\output\netbuf.o"'
### List of Objects: adding '".\output\netdb.o"'
### List of Objects: adding '".\output\netifapi.o"'
### List of Objects: adding '".\output\sockets.o"'
### List of Objects: adding '".\output\tcpip.o"'
### List of Objects: adding '".\output\sys_arch.o"'
### List of Objects: adding '".\output\sys_arch_init.o"'
### List of Objects: adding '".\output\dhcp.o"'
### List of Objects: adding '".\output\dns.o"'
### List of Objects: adding '".\output\init.o"'
### List of Objects: adding '".\output\memp.o"'
### List of Objects: adding '".\output\netif.o"'
### List of Objects: adding '".\output\pbuf.o"'
### List of Objects: adding '".\output\raw.o"'
### List of Objects: adding '".\output\stats.o"'
### List of Objects: adding '".\output\sys.o"'
### List of Objects: adding '".\output\tcp.o"'
### List of Objects: adding '".\output\tcp_in.o"'
### List of Objects: adding '".\output\tcp_out.o"'
### List of Objects: adding '".\output\udp.o"'
### List of Objects: adding '".\output\autoip.o"'
### List of Objects: adding '".\output\icmp.o"'
### List of Objects: adding '".\output\igmp.o"'
### List of Objects: adding '".\output\inet.o"'
### List of Objects: adding '".\output\inet_chksum.o"'
### List of Objects: adding '".\output\ip.o"'
### List of Objects: adding '".\output\ip_addr.o"'
### List of Objects: adding '".\output\ip_frag.o"'
### List of Objects: adding '".\output\asn1_dec.o"'
### List of Objects: adding '".\output\asn1_enc.o"'
### List of Objects: adding '".\output\mib_structs.o"'
### List of Objects: adding '".\output\mib2.o"'
### List of Objects: adding '".\output\msg_in.o"'
### List of Objects: adding '".\output\msg_out.o"'
### List of Objects: adding '".\output\etharp.o"'
### List of Objects: adding '".\output\ethernetif.o"'
### List of Objects: adding '".\output\loopif.o"'
### List of Objects: adding '".\output\slipif.o"'
### List of Objects: adding '".\output\auth.o"'
### List of Objects: adding '".\output\chap.o"'
### List of Objects: adding '".\output\chpms.o"'
### List of Objects: adding '".\output\fsm.o"'
### List of Objects: adding '".\output\ipcp.o"'
### List of Objects: adding '".\output\lcp.o"'
### List of Objects: adding '".\output\magic.o"'
### List of Objects: adding '".\output\md5.o"'
### List of Objects: adding '".\output\pap.o"'
### List of Objects: adding '".\output\ppp.o"'
### List of Objects: adding '".\output\ppp_oe.o"'
### List of Objects: adding '".\output\randm.o"'
### List of Objects: adding '".\output\vj.o"'
### List of Objects: adding '".\output\ping.o"'
### ADS-LD Command completed:
--cpu ARM7TDMI ".\output\startup.o" ".\output\application.o" ".\output\export.o" ".\output\clock.o" ".\output\device.o" ".\output\idle.o" ".\output\ipc.o" ".\output\irq.o" ".\output\kservice.o" ".\output\mem.o" ".\output\mempool.o" ".\output\object.o" ".\output\scheduler.o" ".\output\slab.o" ".\output\thread.o" ".\output\timer.o" ".\output\context_rvds.o" ".\output\start_rvds.o" ".\output\stack.o" ".\output\trap.o" ".\output\interrupt.o" ".\output\cpu.o" ".\output\board.o" ".\output\serial.o" ".\output\sdcard.o" ".\output\dm9161.o" ".\output\backtrace.o" ".\output\div0.o" ".\output\showmem.o" ".\output\dfs.o" ".\output\dfs_file.o" ".\output\dfs_fs.o" ".\output\dfs_posix.o" ".\output\dfs_elm.o" ".\output\ff.o" ".\output\cmd.o" ".\output\finsh_compiler.o" ".\output\finsh_error.o" ".\output\finsh_heap.o" ".\output\finsh_init.o" ".\output\finsh_node.o" ".\output\finsh_ops.o" ".\output\finsh_parser.o" ".\output\finsh_token.o" ".\output\finsh_var.o" ".\output\finsh_vm.o" ".\output\shell.o" ".\output\symbol.o" ".\output\api_lib.o" ".\output\api_msg.o" ".\output\err.o" ".\output\netbuf.o" ".\output\netdb.o" ".\output\netifapi.o" ".\output\sockets.o" ".\output\tcpip.o" ".\output\sys_arch.o" ".\output\sys_arch_init.o" ".\output\dhcp.o" ".\output\dns.o" ".\output\init.o" ".\output\memp.o" ".\output\netif.o" ".\output\pbuf.o" ".\output\raw.o" ".\output\stats.o" ".\output\sys.o" ".\output\tcp.o" ".\output\tcp_in.o" ".\output\tcp_out.o" ".\output\udp.o" ".\output\autoip.o" ".\output\icmp.o" ".\output\igmp.o" ".\output\inet.o" ".\output\inet_chksum.o" ".\output\ip.o" ".\output\ip_addr.o" ".\output\ip_frag.o" ".\output\asn1_dec.o" ".\output\asn1_enc.o" ".\output\mib_structs.o" ".\output\mib2.o" ".\output\msg_in.o" ".\output\msg_out.o" ".\output\etharp.o" ".\output\ethernetif.o" ".\output\loopif.o" ".\output\slipif.o" ".\output\auth.o" ".\output\chap.o" ".\output\chpms.o" ".\output\fsm.o" ".\output\ipcp.o" ".\output\lcp.o" ".\output\magic.o" ".\output\md5.o" ".\output\pap.o" ".\output\ppp.o" ".\output\ppp_oe.o" ".\output\randm.o" ".\output\vj.o" ".\output\ping.o" --strict --scatter "evb4020.sct"
--verbose --list=out.txt --autoat --summary_stderr --info summarysizes --map --xref --callgraph --symbols
--info sizes --info totals --info unused --info veneers
--list ".\evb4020.map" -o ".\output\evb4020.axf"### Preparing Environment (PrepEnvAds)
### ADS-LD Output File: '.\output\evb4020.axf'
### ADS-LD Command File: '.\output\evb4020.lnp'
### Checking for dirty Components...
### Creating CmdFile '.\output\evb4020.lnp', Handle=0x000002E8
### Writing '.lnp' file
### ADS-LD Command file '.\output\evb4020.lnp' is ready.
### ADS-LD: About to start ADS-LD Thread.
### ADS-LD: executed with 0 errors
### Updating obj list
### LDADS_file() completed.

128
bsp/evb4020/src/application.c
View File

@ -1,128 +0,0 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2007-11-20 Yi.Qiu add rtgui application
* 2008-6-28 Bernard no rtgui init
*/
/**
* @addtogroup mini2440
*/
/*@{*/
#include <board.h>
#include <rtthread.h>
#ifdef RT_USING_DFS
#include <dfs_init.h>
#include <dfs_elm.h>
#include <dfs_fs.h>
#include <dfs_posix.h>
#endif
static rt_uint8_t buf_init[0x200];
static struct rt_thread thread_test;
void rt_init_thread_entry(void* parameter)
{
int fd;
rt_uint32_t sz;
char buffer[20];
#ifdef RT_USING_DFS
dfs_init();
#ifdef RT_USING_DFS_ELMFATFS
elm_init();
/* mount sd card fat partition 1 as root directory */
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
{
rt_kprintf("File System initialized!\n");
/*Open a file*/
fd = open("/fattest.txt", O_RDWR|O_CREAT, 0);
if (fd < 0)
{
rt_kprintf("open file for write failed\n");
return;
}
sz = write(fd,"Hello RT-Thread!",sizeof("Hello RT-Thread!"));
if(sz!=0)
{
rt_kprintf("written %d\n",sz);
}
else
rt_kprintf("haven't written\n");
lseek(fd,0,SEEK_SET);
sz = read(fd,buffer,sizeof(buffer));
if(sz!=0)
{
rt_kprintf("READ %d:",sz);
while(sz--)
rt_kprintf("%c",buffer[sz]);//opposite
rt_kprintf("\n");
}
else
rt_kprintf("haven't read\n");
close(fd);
}
else
rt_kprintf("File System initialzation failed!\n");
#endif
#endif
}
void rt_led_thread_entry(void* parameter)
{
/*
rt_uint32_t flag = 0;
while(1)
{
//Add your led implemention here
rt_led_put(flag^0x01);
rt_kprintf("rt led test %s\n",flag?"on":"off" );
rt_thread_delay(100);
} */
//rt_thread_suspend(rt_thread_self());
}
int rt_application_init()
{
rt_thread_t led_thread;
rt_err_t err;
err = rt_thread_init(&thread_test,"init",
rt_init_thread_entry, RT_NULL,buf_init,
sizeof(buf_init), 19, 20);
led_thread = rt_thread_create("led",
rt_led_thread_entry, RT_NULL,
512, 200, 20);
if(err == RT_EOK)
rt_thread_startup(&thread_test);
if (led_thread != RT_NULL)
rt_thread_startup(led_thread);
return 0;
}
/*@}*/

159
bsp/evb4020/src/board.c
View File

@ -1,159 +0,0 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-05-16 Bernard first implementation
* 2010-10-5 Wangmeng sep4020 implementation
*/
#include <rthw.h>
#include <rtthread.h>
#include <sep4020.h>
#include <serial.h>
void rt_hw_serial_putc(const char c);
#define UART0 ((struct uartport *)UART0_BASE)
struct rt_device uart0_device;
struct serial_int_rx uart0_int_rx;
struct serial_device uart0 =
{
UART0,
&uart0_int_rx,
RT_NULL
};
/**
* This function will handle rtos timer
*/
void rt_timer_handler(int vector)
{
rt_uint32_t clear_int;
rt_tick_increase();
/*Clear timer interrupt*/
clear_int = *(RP)TIMER_T1ISCR;
*(RP)TIMER_T1ISCR=clear_int;
}
/**
* This function will handle serial
*/
void rt_serial_handler(int vector)
{
//rt_kprintf("in rt_serial_handler\n");
rt_int32_t stat = *(RP)UART0_IIR ;
UNUSED char c;
/*Received data*/
if(((stat & 0x0E) >> 1) == 0x02)
{
rt_hw_serial_isr(&uart0_device);
/*while (((*(RP)UART0_LSR) & 0x40))
{
c = (char)(*(RP)UART0_BASE);
if(c == '\r')
{
rt_hw_serial_putc('\r');
rt_hw_serial_putc('\n');
}
else
rt_hw_serial_putc(c);
} */
}
else
{
/*clear the timeout interrupt*/
while (uart0.uart_device->lsr & USTAT_RCV_READY)
c = uart0.uart_device->dlbl_fifo.rxfifo;
}
}
/**
* This function will init timer4 for system ticks
*/
void rt_hw_timer_init()
{
/*Set timer1*/
*(RP)TIMER_T1LCR = 880000;
*(RP)TIMER_T1CR = 0x06;
rt_hw_interrupt_install(INTSRC_TIMER1, rt_timer_handler, RT_NULL);
rt_hw_interrupt_umask(INTSRC_TIMER1);
/*Enable timer1*/
*(RP)TIMER_T1CR |= 0x01;
}
/**
* This function will handle init uart
*/
void rt_hw_uart_init(void)
{
const rt_int32_t sysclk = 72000000;
/*Set data bit:8*/
*(RP)(UART0_LCR) = 0x83;
/*Set baud rate high*/
*(RP)(UART0_DLBH) = (sysclk/16/115200) >> 8;
/*Set baud rate low*/
*(RP)(UART0_DLBL) = (sysclk/16/115200) & 0xff;
*(RP)(UART0_LCR) = 0x83&(~(0x1 << 7));
/*Set trigger level*/
*(RP)(UART0_FCR) = 0x0;
*(RP)(UART0_IER) = 0x0;
/*Enable rx interrupt*/
*(RP)(UART0_IER) |= 0x01;
/*Disable tx interrupt*/
*(RP)(UART0_IER) &= ~(0x1<<1);
rt_hw_interrupt_install(INTSRC_UART0, rt_serial_handler, RT_NULL);
rt_hw_interrupt_umask(INTSRC_UART0);
}
void rt_hw_board_init()
{
/* initialize uart */
rt_hw_uart_init();
rt_hw_timer_init();
}
/* write one character to serial, must not trigger interrupt */
void rt_hw_serial_putc(const char c)
{
/*
to be polite with serial console add a line feed
to the carriage return character
*/
if (c=='\n')rt_hw_serial_putc('\r');
while (!((*(RP)UART0_LSR) & 0x40));
*(RP)(UART0_BASE) = c;
}
/**
* This function is used by rt_kprintf to display a string on console.
*
* @param str the displayed string
*/
void rt_hw_console_output(const char* str)
{
while (*str)
{
rt_hw_serial_putc(*str++);
}
}

24
bsp/evb4020/src/board.h
View File

@ -1,24 +0,0 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-10-08 Bernard add board.h to this bsp
* 2010-10-5 Wangmeng sep4020 implemention
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <sep4020.h>
void rt_hw_board_init(void);
void rt_hw_sdcard_init(void);
#endif

700
bsp/evb4020/src/dm9161.c
View File

@ -1,700 +0,0 @@
#include <rtthread.h>
#include <netif/ethernetif.h>
#include "dm9161.h"
#include <sep4020.h>
#include "mii.h"
#define SPEED_10 10
#define SPEED_100 100
#define SPEED_1000 1000
/* Duplex, half or full. */
#define DUPLEX_HALF 0x00
#define DUPLEX_FULL 0x01
/*
* Davicom dm9161EP driver
*
* IRQ_LAN connects to EINT7(GPF7)
* nLAN_CS connects to nGCS4
*/
/* #define dm9161_DEBUG 1 */
#if DM9161_DEBUG
#define DM9161_TRACE rt_kprintf
#else
#define DM9161_TRACE(...)
#endif
/*
* dm9161 interrupt line is connected to PF7
*/
//--------------------------------------------------------
#define DM9161_PHY 0x40 /* PHY address 0x01 */
#define MAX_ADDR_LEN 6
enum DM9161_PHY_mode
{
DM9161_10MHD = 0, DM9161_100MHD = 1,
DM9161_10MFD = 4, DM9161_100MFD = 5,
DM9161_AUTO = 8, DM9161_1M_HPNA = 0x10
};
enum DM9161_TYPE
{
TYPE_DM9161,
};
struct rt_dm9161_eth
{
/* inherit from ethernet device */
struct eth_device parent;
enum DM9161_TYPE type;
enum DM9161_PHY_mode mode;
rt_uint8_t imr_all;
rt_uint8_t phy_addr;
rt_uint32_t tx_index;
rt_uint8_t packet_cnt; /* packet I or II */
rt_uint16_t queue_packet_len; /* queued packet (packet II) */
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
};
static struct rt_dm9161_eth dm9161_device;
static struct rt_semaphore sem_ack, sem_lock;
void rt_dm9161_isr(int irqno);
static void udelay(unsigned long ns)
{
unsigned long i;
while(ns--)
{
i = 100;
while(i--);
}
}
static __inline unsigned long sep_emac_read(unsigned int reg)
{
void __iomem *emac_base = (void __iomem *)reg;
return read_reg(emac_base);
}
/*
* Write to a EMAC register.
*/
static __inline void sep_emac_write(unsigned int reg, unsigned long value)
{
void __iomem *emac_base = (void __iomem *)reg;
write_reg(emac_base,value);
}
/* ........................... PHY INTERFACE ........................... */
/* CAN DO MAC CONFIGRATION
* Enable the MDIO bit in MAC control register
* When not called from an interrupt-handler, access to the PHY must be
* protected by a spinlock.
*/
static void enable_mdi(void) //need think more
{
unsigned long ctl;
ctl = sep_emac_read(MAC_CTRL);
sep_emac_write(MAC_CTRL, ctl&(~0x3)); /* enable management port */
return;
}
/* CANNOT DO MAC CONFIGRATION
* Disable the MDIO bit in the MAC control register
*/
static void disable_mdi(void)
{
unsigned long ctl;
ctl = sep_emac_read(MAC_CTRL);
sep_emac_write(MAC_CTRL, ctl|(0x3)); /* disable management port */
return;
}
/*
* Wait until the PHY operation is complete.
*/
static __inline void sep_phy_wait(void)
{
unsigned long timeout = 2;
while ((sep_emac_read(MAC_MII_STATUS) & 0x2))
{
timeout--;
if (!timeout)
{
EOUT("sep_ether: MDIO timeout\n");
break;
}
}
return;
}
/*
* Write value to the a PHY register
* Note: MDI interface is assumed to already have been enabled.
*/
static void write_phy(unsigned char phy_addr, unsigned char address, unsigned int value)
{
unsigned short mii_txdata;
mii_txdata = value;
sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
sep_emac_write(MAC_MII_TXDATA ,mii_txdata);
sep_emac_write(MAC_MII_CMD ,0x4);
udelay(40);
sep_phy_wait();
return;
}
/*
* Read value stored in a PHY register.
* Note: MDI interface is assumed to already have been enabled.
*/
static void read_phy(unsigned char phy_addr, unsigned char address, unsigned int *value)
{
unsigned short mii_rxdata;
// unsigned long mii_status;
sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
sep_emac_write(MAC_MII_CMD ,0x2);
udelay(40);
sep_phy_wait();
mii_rxdata = sep_emac_read(MAC_MII_RXDATA);
*value = mii_rxdata;
return;
}
/* interrupt service routine */
void rt_dm9161_isr(int irqno)
{
unsigned long intstatus;
rt_uint32_t address;
mask_irq(INTSRC_MAC);
intstatus = sep_emac_read(MAC_INTSRC);
sep_emac_write(MAC_INTSRC,intstatus);
/*Receive complete*/
if(intstatus & 0x04)
{
eth_device_ready(&(dm9161_device.parent));
}
/*Receive error*/
else if(intstatus & 0x08)
{
rt_kprintf("Receive error\n");
}
/*Transmit complete*/
else if(intstatus & 0x03)
{
if(dm9161_device.tx_index == 0)
address = (MAC_TX_BD +(MAX_TX_DESCR-2)*8);
else if(dm9161_device.tx_index == 1)
address = (MAC_TX_BD +(MAX_TX_DESCR-1)*8);
else
address = (MAC_TX_BD + dm9161_device.tx_index*8-16);
//printk("free tx skb 0x%x in inter!!\n",lp->txBuffIndex);
sep_emac_write(address,0x0);
}
else if (intstatus & 0x10)
{
rt_kprintf("ROVER ERROR\n");
}
while(intstatus)
{
sep_emac_write(MAC_INTSRC,intstatus);
intstatus = sep_emac_read(MAC_INTSRC);
}
unmask_irq(INTSRC_MAC);
}
static rt_err_t update_mac_address()
{
rt_uint32_t lo,hi;
hi = sep_emac_read(MAC_ADDR1);
lo = sep_emac_read(MAC_ADDR0);
DBOUT("Before MAC: hi=%x lo=%x\n",hi,lo);
sep_emac_write(MAC_ADDR0,(dm9161_device.dev_addr[2] << 24) | (dm9161_device.dev_addr[3] << 16) | (dm9161_device.dev_addr[4] << 8) | (dm9161_device.dev_addr[5]));
sep_emac_write(MAC_ADDR1,dm9161_device.dev_addr[1]|(dm9161_device.dev_addr[0]<<8));
hi = sep_emac_read(MAC_ADDR1);
lo = sep_emac_read(MAC_ADDR0);
DBOUT("After MAC: hi=%x lo=%x\n",hi,lo);
return RT_EOK;
}
static int mii_link_ok (unsigned long phy_id)
{
/* first, a dummy read, needed to latch some MII phys */
unsigned int value;
read_phy(phy_id, MII_BMSR,&value);
if (value & BMSR_LSTATUS)
return 1;
return 0;
}
static void update_link_speed(unsigned short phy_addr)
{
unsigned int bmsr, bmcr, lpa, mac_cfg;
unsigned int speed, duplex;
if(!mii_link_ok(phy_addr))
{
EOUT("Link Down\n");
//goto result;
}
read_phy(phy_addr,MII_BMSR,&bmsr);
read_phy(phy_addr,MII_BMCR,&bmcr);
if (bmcr & BMCR_ANENABLE) /* AutoNegotiation is enabled */
{
if (!(bmsr & BMSR_ANEGCOMPLETE)) /* Do nothing - another interrupt generated when negotiation complete */
goto result;
read_phy(phy_addr, MII_LPA, &lpa);
if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF))
speed = SPEED_100;
else
speed = SPEED_10;
if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL))
duplex = DUPLEX_FULL;
else
duplex = DUPLEX_HALF;
}
else
{
speed = (bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10;
duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
}
/* Update the MAC */
mac_cfg = sep_emac_read(MAC_CTRL);
if (speed == SPEED_100)
{
mac_cfg |= 0x800; /* set speed 100 M */
//bmcr &=(~0x2000);
//write_phy(lp->phy_address, MII_BMCR, bmcr); //将dm9161的速度设为10M
if (duplex == DUPLEX_FULL) /* 100 Full Duplex */
mac_cfg |= 0x400;
else /* 100 Half Duplex */
mac_cfg &= (~0x400);
}
else
{
mac_cfg &= (~0x800); /* set speed 10 M */
if (duplex == DUPLEX_FULL) /* 10 Full Duplex */
mac_cfg |= 0x400;
else /* 10 Half Duplex */
mac_cfg &= (~0x400);
}
sep_emac_write(MAC_CTRL, mac_cfg);
rt_kprintf("Link now %i M-%s\n", speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex");
result:
mac_cfg = sep_emac_read(MAC_CTRL);
DBOUT("After mac_cfg=%d\n",mac_cfg);
return;
}
static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag);
/* RT-Thread Device Interface */
/* initialize the interface */
static rt_err_t rt_dm9161_init(rt_device_t dev)
{
unsigned int phyid1, phyid2;
int detected = -1;
unsigned long phy_id;
unsigned short phy_address = 0;
while ((detected != 0) && (phy_address < 32))
{
/* Read the PHY ID registers */
enable_mdi();
read_phy(phy_address, MII_PHYSID1, &phyid1);
read_phy(phy_address, MII_PHYSID2, &phyid2);
disable_mdi();
phy_id = (phyid1 << 16) | (phyid2 & 0xfff0);
switch (phy_id)
{
case MII_DM9161_ID: /* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */
case MII_DM9161A_ID: /* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */
case MII_RTL8201_ID: /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */
case MII_BCM5221_ID: /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */
case MII_DP83847_ID: /* National Semiconductor DP83847: */
case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */
case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */
{
enable_mdi();
#warning SHOULD SET MAC ADDR
//get_mac_address(dev); /* Get ethernet address and store it in dev->dev_addr */
update_mac_address(); /* Program ethernet address into MAC */
//用哈希寄存器比较当前群播地址，全双工，添加CRC校验，短数据帧进行填充
sep_emac_write(MAC_CTRL, 0xa413);
#warning SHOULD DETERMIN LINK SPEED
update_link_speed(phy_address);
dm9161_device.phy_addr = phy_address;
disable_mdi();
break;
}
}
phy_address++;
}
rt_dm9161_open(dev,0);
return RT_EOK;
}
/* ................................ MAC ................................ */
/*
* Initialize and start the Receiver and Transmit subsystems
*/
static void sepether_start()
{
int i;
unsigned int tempaddr;
sep_emac_write(MAC_TXBD_NUM,MAX_TX_DESCR);
//初始化发送和接收描述符
for (i = 0; i < MAX_TX_DESCR; i++)
{
tempaddr=(MAC_TX_BD+i*8);
sep_emac_write(tempaddr,0);
tempaddr=(MAC_TX_BD+i*8+4);
sep_emac_write(tempaddr,0);
}
for (i = 0; i < MAX_RX_DESCR; i++)
{
tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
sep_emac_write(tempaddr,0);
tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
sep_emac_write(tempaddr,0);
}
for (i = 0; i < MAX_RX_DESCR; i++)
{
tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
sep_emac_write(tempaddr,0xc000);
tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
sep_emac_write(tempaddr,ESRAM_BASE+ MAX_TX_DESCR*0x600+i*0x600);
}
/* Set the Wrap bit on the last descriptor */
tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8-8);
sep_emac_write(tempaddr,0xe000);
for (i = 0; i < MAX_TX_DESCR; i++)
{
tempaddr=(MAC_TX_BD+i*8);
sep_emac_write(tempaddr,0x0);
tempaddr=(MAC_TX_BD+i*8+4);
sep_emac_write(tempaddr,ESRAM_BASE+i*0x600);
}
return;
}
static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag)
{
unsigned int dsintr;
enable_mdi();
mask_irq(28);
sep_emac_write(MAC_INTMASK,0x0); //首先屏蔽中断
sepether_start();
/* Enable PHY interrupt */
*(volatile unsigned long*)GPIO_PORTA_DIR |= 0x0080 ; //1 stands for in
*(volatile unsigned long*)GPIO_PORTA_SEL |= 0x0080 ; //for common use
*(volatile unsigned long*)GPIO_PORTA_INCTL |= 0x0080; //中断输入方式
*(volatile unsigned long*)GPIO_PORTA_INTRCTL |= (0x3UL<<14); //中断类型为低电平解发
*(volatile unsigned long*)GPIO_PORTA_INTRCLR |= 0x0080; //清除中断
*(volatile unsigned long*)GPIO_PORTA_INTRCLR = 0x0000; //清除中断
rt_hw_interrupt_install(INTSRC_MAC, rt_dm9161_isr, RT_NULL);
enable_irq(INTSRC_EXINT7);
read_phy(dm9161_device.phy_addr, MII_DSINTR_REG, &dsintr);
dsintr = dsintr & ~0xf00; /* clear bits 8..11 */
write_phy(dm9161_device.phy_addr, MII_DSINTR_REG, dsintr);
update_link_speed(dm9161_device.phy_addr);
/************************************************************************************/
/* Enable MAC interrupts */
sep_emac_write(MAC_INTMASK,0xff); //open中断
sep_emac_write(MAC_INTSRC,0xff); //clear all mac irq
unmask_irq(28);
disable_mdi();
rt_kprintf("SEP4020 ethernet interface open!\n\r");
return RT_EOK;
}
static rt_err_t rt_dm9161_close(rt_device_t dev)
{
rt_kprintf("SEP4020 ethernet interface close!\n\r");
/* Disable Receiver and Transmitter */
disable_mdi();
#warning disable ether;
// INT_ENABLE(28);
/* Disable PHY interrupt */
// disable_phyirq(dev);
/* Disable MAC interrupts */
sep_emac_write(MAC_INTMASK,0); //屏蔽中断
// INT_DISABLE(28);
return RT_EOK;
}
static rt_size_t rt_dm9161_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_size_t rt_dm9161_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_err_t rt_dm9161_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
return RT_EOK;
}
/* ethernet device interface */
/* transmit packet. */
rt_err_t rt_dm9161_tx( rt_device_t dev, struct pbuf* p)
{
rt_uint8_t i;
rt_uint32_t length = 0;
struct pbuf *q;
unsigned long address;
unsigned long tmp_tx_bd;
/* lock DM9000 device */
// rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
/* disable dm9000a interrupt */
#warning SHOULD DISABLE INTEERUPT?
/*Search for available BD*/
for(i = 0;i<MAX_TX_DESCR;)
{
address = MAC_TX_BD + i*8;
tmp_tx_bd = sep_emac_read(address);
if(!(tmp_tx_bd & 0x8000))
{
if(i == (MAX_TX_DESCR-1))
i = 0;
else
i = i+1;
break;
}
if(i == MAX_TX_DESCR-1)
i = 0;
else
i++;
}
q = p;
while (q)
{
rt_memcpy((u8_t*)(ESRAM_BASE + i*0x600 + length),(u8_t*)q->payload,q->len);
length += q->len;
q = q->next;
}
#warning SHOULD NOTICE IT'S LENGTH
length = length << 16;
if(i == MAX_TX_DESCR - 1)
length |= 0xb800;
else
length |= 0x9800;
address = (MAC_TX_BD + i*8);
dm9161_device.tx_index = i;
sep_emac_write(address,length);
//wait for tranfer complete
while(!(sep_emac_read(address)&0x8000));
/* unlock DM9000 device */
// rt_sem_release(&sem_lock);
/* wait ack */
// rt_sem_take(&sem_ack, RT_WAITING_FOREVER);
return RT_EOK;
}
/* reception packet. */
struct pbuf *rt_dm9161_rx(rt_device_t dev)
{
unsigned int temp_rx_bd,address;
rt_uint32_t i = 0;
rt_uint32_t length;
unsigned char *p_recv;
struct pbuf* p = RT_NULL;
/* lock DM9000 device */
rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
while(1)
{
address = MAC_TX_BD + (MAX_TX_DESCR + i) * 8;
temp_rx_bd = sep_emac_read(address);
if(!(temp_rx_bd & 0x8000))
{
length = temp_rx_bd;
length = length >> 16;
p_recv = (unsigned char*)(ESRAM_BASE + (MAX_TX_DESCR + i) * 0x600);
p = pbuf_alloc(PBUF_LINK,length,PBUF_RAM);
if(p != RT_NULL)
{
struct pbuf* q;
rt_int32_t len;
for(q = p;q != RT_NULL;q = q->next)
{
rt_memcpy((rt_uint8_t*)(q->payload),p_recv,q->len);
}
}
else
{
rt_kprintf("Droping %d packet \n",length);
}
if(i == (MAX_RX_DESCR-1))
{
sep_emac_write(address,0xe000);
i = 0;
}
else
{
sep_emac_write(address,0xc000);
i++;
}
}
else
break;
}
rt_sem_release(&sem_lock);
return p;
}
void rt_hw_dm9161_init()
{
rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
dm9161_device.type = TYPE_DM9161;
dm9161_device.mode = DM9161_AUTO;
dm9161_device.packet_cnt = 0;
dm9161_device.queue_packet_len = 0;
/*
* SRAM Tx/Rx pointer automatically return to start address,
* Packet Transmitted, Packet Received
*/
#warning NOTICE:
//dm9161_device.imr_all = IMR_PAR | IMR_PTM | IMR_PRM;
dm9161_device.dev_addr[0] = 0x01;
dm9161_device.dev_addr[1] = 0x60;
dm9161_device.dev_addr[2] = 0x6E;
dm9161_device.dev_addr[3] = 0x11;
dm9161_device.dev_addr[4] = 0x02;
dm9161_device.dev_addr[5] = 0x0F;
dm9161_device.parent.parent.init = rt_dm9161_init;
dm9161_device.parent.parent.open = rt_dm9161_open;
dm9161_device.parent.parent.close = rt_dm9161_close;
dm9161_device.parent.parent.read = rt_dm9161_read;
dm9161_device.parent.parent.write = rt_dm9161_write;
dm9161_device.parent.parent.control = rt_dm9161_control;
dm9161_device.parent.parent.user_data = RT_NULL;
dm9161_device.parent.eth_rx = rt_dm9161_rx;
dm9161_device.parent.eth_tx = rt_dm9161_tx;
eth_device_init(&(dm9161_device.parent), "e0");
/* instal interrupt */
#warning TODO
//rt_hw_interrupt_install(INTEINT4_7, rt_dm9161_isr, RT_NULL);
//rt_hw_interrupt_umask(INTEINT4_7);
}
void dm9161a(void)
{
}
#ifdef RT_USING_FINSH
#include <finsh.h>
FINSH_FUNCTION_EXPORT(dm9161a, dm9161a register dump);
#endif

65
bsp/evb4020/src/dm9161.h
View File

@ -1,65 +0,0 @@
#ifndef __DM9000_H__
#define __DM9000_H__
/*MACRO DEFINATIONS*/
#define SEP4020_ID_EMAC ((unsigned int) 28) // Ethernet Mac
/* Davicom 9161 PHY */
#define MII_DM9161_ID 0x0181b880
#define MII_DM9161A_ID 0x0181b8a0
/* Davicom specific registers */
#define MII_DSCR_REG 16
#define MII_DSCSR_REG 17
#define MII_DSINTR_REG 21
/* Intel LXT971A PHY */
#define MII_LXT971A_ID 0x001378E0
/* Intel specific registers */
#define MII_ISINTE_REG 18
#define MII_ISINTS_REG 19
#define MII_LEDCTRL_REG 20
/* Realtek RTL8201 PHY */
#define MII_RTL8201_ID 0x00008200
/* Broadcom BCM5221 PHY */
#define MII_BCM5221_ID 0x004061e0
/* Broadcom specific registers */
#define MII_BCMINTR_REG 26
/* National Semiconductor DP83847 */
#define MII_DP83847_ID 0x20005c30
/* Altima AC101L PHY */
#define MII_AC101L_ID 0x00225520
/* Micrel KS8721 PHY */
#define MII_KS8721_ID 0x00221610
/* ........................................................................ */
#define MAX_RBUFF_SZ 0x600 /* 1518 rounded up */
#define MAX_RX_DESCR 20 /* max number of receive buffers */
#define MAX_TBUFF_SZ 0x600 /* 1518 rounded up */
#define MAX_TX_DESCR 20 /* max number of receive buffers */
#define EMAC_DESC_DONE 0x00000001 /* bit for if DMA is done */
#define EMAC_DESC_WRAP 0x00000002 /* bit for wrap */
#define EMAC_BROADCAST 0x80000000 /* broadcast address */
#define EMAC_MULTICAST 0x40000000 /* multicast address */
#define EMAC_UNICAST 0x20000000 /* unicast address */
#define DM9161_inb(r) (*(volatile rt_uint8_t *)r)
#define DM9161_outb(r, d) (*(volatile rt_uint8_t *)r = d)
#define DM9161_inw(r) (*(volatile rt_uint16_t *)r)
#define DM9161_outw(r, d) (*(volatile rt_uint16_t *)r = d)
void rt_hw_dm9616_init(void);
#endif

9
bsp/evb4020/src/export.c
View File

@ -1,9 +0,0 @@
#include <rtthread.h>
#include <finsh.h>
void testkkkk(void)
{
rt_kprintf("Hello wangmengmeng!\n");
return;
}
FINSH_FUNCTION_EXPORT(testkkkk,a test);

130
bsp/evb4020/src/mii.h
View File

@ -1,130 +0,0 @@
#ifndef __MII_H__
#define __MII_H__
/* Generic MII registers. */
#define MII_BMCR 0x00 /* Basic mode control register */
#define MII_BMSR 0x01 /* Basic mode status register */
#define MII_PHYSID1 0x02 /* PHYS ID 1 */
#define MII_PHYSID2 0x03 /* PHYS ID 2 */
#define MII_ADVERTISE 0x04 /* Advertisement control reg */
#define MII_LPA 0x05 /* Link partner ability reg */
#define MII_EXPANSION 0x06 /* Expansion register */
#define MII_CTRL1000 0x09 /* 1000BASE-T control */
#define MII_STAT1000 0x0a /* 1000BASE-T status */
#define MII_ESTATUS 0x0f /* Extended Status */
#define MII_DCOUNTER 0x12 /* Disconnect counter */
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
#define MII_RERRCOUNTER 0x15 /* Receive error counter */
#define MII_SREVISION 0x16 /* Silicon revision */
#define MII_RESV1 0x17 /* Reserved... */
#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
#define MII_PHYADDR 0x19 /* PHY address */
#define MII_RESV2 0x1a /* Reserved... */
#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
#define MII_NCONFIG 0x1c /* Network interface config */
/* Basic mode control register. */
#define BMCR_RESV 0x003f /* Unused... */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_CTST 0x0080 /* Collision test */
#define BMCR_FULLDPLX 0x0100 /* Full duplex */
#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
#define BMCR_RESET 0x8000 /* Reset the DP83840 */
/* Basic mode status register. */
#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
#define BMSR_JCD 0x0002 /* Jabber detected */
#define BMSR_LSTATUS 0x0004 /* Link status */
#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
#define BMSR_RFAULT 0x0010 /* Remote fault detected */
#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
#define BMSR_RESV 0x00c0 /* Unused... */
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
#define BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */
#define BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */
#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
/* Advertisement control register. */
#define ADVERTISE_SLCT 0x001f /* Selector bits */
#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
#define ADVERTISE_RESV 0x1000 /* Unused... */
#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
ADVERTISE_CSMA)
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
ADVERTISE_100HALF | ADVERTISE_100FULL)
/* Link partner ability register. */
#define LPA_SLCT 0x001f /* Same as advertise selector */
#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/
#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
#define LPA_PAUSE_CAP 0x0400 /* Can pause */
#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
#define LPA_RESV 0x1000 /* Unused... */
#define LPA_RFAULT 0x2000 /* Link partner faulted */
#define LPA_LPACK 0x4000 /* Link partner acked us */
#define LPA_NPAGE 0x8000 /* Next page bit */
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
/* Expansion register for auto-negotiation. */
#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */
#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */
#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */
#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
#define EXPANSION_RESV 0xffe0 /* Unused... */
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
/* N-way test register. */
#define NWAYTEST_RESV1 0x00ff /* Unused... */
#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
#define NWAYTEST_RESV2 0xfe00 /* Unused... */
/* 1000BASE-T Control register */
#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
/* 1000BASE-T Status register */
#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */
#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */
#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */
#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */
#endif

200
bsp/evb4020/src/rtconfig.h
View File

@ -1,200 +0,0 @@
/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 4
/* PRIORITY_MAX */
#define RT_THREAD_PRIORITY_MAX 256
/* Tick per Second */
#define RT_TICK_PER_SECOND 100
/* SECTION: RT_DEBUG */
/* Thread Debug */
#define RT_DEBUG
/* #define RT_THREAD_DEBUG */
#define RT_USING_OVERFLOW_CHECK
/* Using Hook */
#define RT_USING_HOOK
/* Using Software Timer */
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 8
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_TICK_PER_SECOND 10
/* SECTION: IPC */
/* Using Semaphore */
#define RT_USING_SEMAPHORE
/* Using Mutex */
#define RT_USING_MUTEX
/* Using Event */
#define RT_USING_EVENT
/* Using MailBox */
#define RT_USING_MAILBOX
/* Using Message Queue */
#define RT_USING_MESSAGEQUEUE
/* SECTION: Memory Management */
/* Using Memory Pool Management*/
#define RT_USING_MEMPOOL
/* Using Dynamic Heap Management */
#define RT_USING_HEAP
/* Using Small MM */
/* #define RT_USING_SMALL_MEM */
/* Using SLAB Allocator */
#define RT_USING_SLAB
/* SECTION: Device System */
/* Using Device System */
#define RT_USING_DEVICE
/* SECTION: Console options */
/* the buffer size of console */
#define RT_CONSOLEBUF_SIZE 128
/* SECTION: finsh, a C-Express shell */
/* Using FinSH as Shell*/
#define RT_USING_FINSH
#define FINSH_USING_SYMTAB
#define FINSH USING DESCRIPTION
/* SECTION: a runtime libc library */
/* a runtime libc library */
/* #define RT_USING_NEWLIB */
/* SECTION: a mini libc */
/* SECTION: C++ support */
/* Using C++ support */
/* #define RT_USING_CPLUSPLUS */
/* SECTION: Device filesystem support */
/* using DFS support */
#define RT_USING_DFS
#define RT_USING_DFS_ELMFATFS
/* #define RT_USING_DFS_YAFFS2 */
/* #define DFS_USING_WORKDIR */
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 16
/* the max number of cached sector */
#define DFS_CACHE_MAX_NUM 4
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
/* Using lighweight TCP/IP protocol stack */
//#define RT_USING_LWIP
#define RT_LWIP_DNS
/* Trace LwIP protocol */
/* #define RT_LWIP_DEBUG */
/* Enable ICMP protocol */
#define RT_LWIP_ICMP
/* Enable IGMP protocol */
#define RT_LWIP_IGMP
/* Enable UDP protocol */
#define RT_LWIP_UDP
/* Enable TCP protocol */
#define RT_LWIP_TCP
/* the number of simulatenously active TCP connections*/
#define RT_LWIP_TCP_PCB_NUM 5
/* TCP sender buffer space */
#define RT_LWIP_TCP_SND_BUF 1024*10
/* TCP receive window. */
#define RT_LWIP_TCP_WND 1024
/* Enable SNMP protocol */
/* #define RT_LWIP_SNMP */
/* Using DHCP */
/* #define RT_LWIP_DHCP */
#define RT_LWIP_DNS
/* ip address of target */
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
#define RT_LWIP_IPADDR2 1
#define RT_LWIP_IPADDR3 30
/* gateway address of target */
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 1
#define RT_LWIP_GWADDR3 1
/* mask address of target */
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
/* the number of blocks for pbuf */
#define RT_LWIP_PBUF_NUM 16
/* thread priority of tcpip thread */
#define RT_LWIP_TCPTHREAD_PRIORITY 128
/* mail box size of tcpip thread to wait for */
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
/* thread stack size of tcpip thread */
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
/* thread priority of ethnetif thread */
#define RT_LWIP_ETHTHREAD_PRIORITY 144
/* mail box size of ethnetif thread to wait for */
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 32
/* thread stack size of ethnetif thread */
#define RT_LWIP_ETHTHREAD_STACKSIZE 1024
/* SECTION: RTGUI support */
/* using RTGUI support */
#define RT_USING_RTGUI
/* name length of RTGUI object */
#define RTGUI_NAME_MAX 16
/* support 16 weight font */
#define RTGUI_USING_FONT16
/* support 16 weight font */
#define RTGUI_USING_FONT12
/* support Chinese font */
#define RTGUI_USING_FONTHZ
/* use DFS as file interface */
#define RTGUI_USING_DFS_FILERW
/* use font file as Chinese font */
/* #define RTGUI_USING_HZ_FILE */
/* use Chinese bitmap font */
#define RTGUI_USING_HZ_BMP
/* use small size in RTGUI */
/* #define RTGUI_USING_SMALL_SIZE */
/* use mouse cursor */
/* #define RTGUI_USING_MOUSE_CURSOR */
#endif

790
bsp/evb4020/src/sdcard.c
View File

@ -1,790 +0,0 @@
/*
* File : sdcard.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, 2007, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2007-12-02 Yi.Qiu the first version
* 2010-01-01 Bernard Modify for mini2440
* 2010-10-13 Wangmeng Added sep4020 support
*/
#include "sdcard.h"
#include <dfs_config.h>
volatile rt_int32_t RCA;
#ifdef RT_USING_DFS
/* RT-Thread Device Driver Interface */
#include <rtthread.h>
#include <dfs_fs.h>
/*GLOBAL SD DEVICE PONITER*/
static struct sd_device *ptr_sddev;
static rt_uint8_t gsec_buf[SECTOR_SIZE];
#define USE_TIMEOUT
/*This file is to power on/off the SEP4020 SDC*/
/**
* This function will power on/off the SEP4020 SDC
*
* @param sd_ctl: 0/power on; 1/power off
* @return none
*
*/
static void sd_pwr(int sd_ctl)
{
if (sd_ctl)
{
*(RP)GPIO_PORTA_SEL |= 0x0200;
*(RP)GPIO_PORTA_DIR &= (~0x0200);
*(RP)GPIO_PORTA_DATA |= 0x0200;
}
else
{
*(RP)GPIO_PORTA_SEL |= 0x0200;
*(RP)GPIO_PORTA_DIR &= (~0x0200);
*(RP)GPIO_PORTA_DATA &= (~0x0200);
}
}
/*a nop operation to delay*/
static void delay (U32 j)
{
U32 i;
for (i=0;i<j;i++)
{};
}
/*
* Send the command to set the data transfer mode
* @param cmd:the command to sent
* @param arg:the argument of the command
* @param mode:SDC transfer mode
* @param blk_len:the block size of each data
* @param num:number of blocks
* @param mask:sdc interrupt mask
*/
static rt_err_t cmd_data(U16 cmd,U32 arg,U16 mode,U16 blk_len,U16 num,U16 mask)
{
U32 i;
#ifdef USE_TIMEOUT
U32 to = 10000;
#endif
*(RP)SDC_CLOCK_CONTROL = 0Xff00; //配置SD时钟，512分频,关闭SD 时钟
*(RP)SDC_CLOCK_CONTROL = 0Xff04; //打开SD时钟，512分频,开启SD 时钟
*(RP)SDC_INTERRUPT_STATUS_MASK = mask; //中断状态屏蔽寄存器赋值
*(RP)SDC_TRANSFER_MODE = mode; //传输模式选择寄存器赋值
*(RP)SDC_BLOCK_SIZE = blk_len; //数据块长度寄存器赋值
*(RP)SDC_BLOCK_COUNT = num; //数据块数目寄存器赋值
*(RP)SDC_ARGUMENT = arg; //命令参数寄存器赋值
*(RP)SDC_COMMAND = cmd; //命令控制寄存器赋值
delay(10);
i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
while(i != 0x1000) //判断：是否命令发送完毕，并且收到响应
{
i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
#ifdef USE_TIMEOUT
to --;
if(!to)
{
EOUT("%s TIMEOUT\n",__FUNCTION__);
return RT_ETIMEOUT;
}
#endif
}
delay(160);
#ifdef USE_TIMEOUT
//DBOUT("cmd_data TO is %d\n",to);
#endif
return *(RP)SDC_RESPONSE0; //返回命令反馈信息
}
static rt_err_t cmd_response(U16 Cmd,U32 Arg,U16 TransMode,U16 BlkLen,U16 Nob,U16 IntMask)
{
U32 i;
#ifdef USE_TIMEOUT
U32 to = 50000;
#endif
*(RP)SDC_CLOCK_CONTROL=0Xff00; //配置SD时钟
*(RP)SDC_CLOCK_CONTROL=0Xff04; //打开SD时钟
*(RP)SDC_INTERRUPT_STATUS_MASK=IntMask; //中断状态屏蔽寄存器赋值
*(RP)SDC_TRANSFER_MODE=TransMode; //传输模式选择寄存器赋值
*(RP)SDC_BLOCK_SIZE=BlkLen; //数据块长度寄存器赋值
*(RP)SDC_BLOCK_COUNT=Nob; //数据块数目寄存器赋值
*(RP)SDC_ARGUMENT=Arg; //命令参数寄存器赋值
*(RP)SDC_COMMAND=Cmd; //命令控制寄存器赋值
delay(10);
i = *(RP)SDC_INTERRUPT_STATUS & 0x1040;
while(i != 0x1040) //判断：命令发送完毕，并且收到响应，数据传输完毕。这三项是否已经都完成。
{
i = *(RP)SDC_INTERRUPT_STATUS & 0x1040;
#ifdef USE_TIMEOUT
to--;
if(!to)
{
EOUT("%s Timeout\n",__FUNCTION__);
return RT_ETIMEOUT;
}
#endif
}
//DBOUT("cmd_response TO is %d\n",to);
delay(100);
return RT_EOK; //返回命令反馈信息
}
static rt_err_t cmd_wait(U16 Cmd,U32 Arg,U16 IntMask )
{
int i;
#ifdef USE_TIMEOUT
U32 to=200000;
#endif
*(RP)SDC_CLOCK_CONTROL=0Xff00; //配置SD时钟
*(RP)SDC_CLOCK_CONTROL=0Xff04; //打开SD时钟
*(RP)SDC_COMMAND=Cmd; //命令控制寄存器赋值
*(RP)SDC_INTERRUPT_STATUS_MASK=IntMask; //中断状态屏蔽寄存器赋值
*(RP)SDC_ARGUMENT=Arg; //命令参数寄存器赋值
i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
while(i != 0x1000) //判断：是否命令发送完毕，并且收到响应
{
i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
#ifdef USE_TIMEOUT
to--;
if(!to)
{
EOUT("%s Timeout\n",__FUNCTION__);
return RT_ETIMEOUT;
}
#endif
}
//DBOUT("cmd_wait TO is %d\n",to);
delay(10);
return RT_EOK; //返回命令反馈信息以及数值1
}
/**
* This function will set a hook function, which will be invoked when a memory
* block is allocated from heap memory.
*
* @param hook the hook function
*/
static rt_err_t sd_init(void)
{
rt_err_t err;
#ifdef USE_TIMEOUT
rt_uint32_t to=1000;
#endif
sd_pwr(1);
*(RP)SDC_SOFTWARE_RESET=0x0; //触发软复位,对其写0是进行reset
delay(200);
*(RP)SDC_SOFTWARE_RESET=0x1; //不触发软复位
delay(200);
cmd_wait(0x08,0x0,0xfff); //CMD0，命令发送使能
do
{
err = cmd_wait(0x6ea,0x0,0xfff); //CMD55,以切换到ACMD命令
#ifdef USE_TIMEOUT
if(err != RT_EOK)
{
EOUT("cmd_wait err in %s\n",__FUNCTION__);
return RT_ETIMEOUT;
}
#endif
delay(3);
err = cmd_wait(0x52a,0x80ff8000,0xfff); //ACMD41，向SD控制器发送命令，等待SD控制器确认收到命令
if(err != RT_EOK)
{
EOUT("cmd_wait err in %s\n",__FUNCTION__);
return RT_ETIMEOUT;
}
#ifdef USE_TIMEOUT
to--;
if(!to)
{
EOUT("%s timeout\n",__FUNCTION__);
return RT_ETIMEOUT;
}
#endif
}while(*(RP)SDC_RESPONSE0<0X80008000);
#ifdef USE_TIMEOUT
//DBOUT("%s TO is %d\n",__FUNCTION__,to);
#endif
cmd_data(0x49,0X0,0X0,0x0,0x0,0Xfff);//CMD2，发送CID
cmd_data(0x6a,0X0,0X0,0x0,0x0,0Xfff);//CMD3，询问卡片发出新的相关地址
RCA = *(RP)SDC_RESPONSE0;
cmd_data(0xea,RCA,0X0,0x0,0x0,0Xfff);//CMD7，设置选择性的相关参数
return RT_EOK;
}
/**
* This function will set a hook function, which will be invoked when a memory
* block is allocated from heap memory.
*
* @param hook the hook function
*/
static rt_err_t sd_readblock(rt_uint32_t address, rt_uint8_t* buf)
{
U32 complete,i;
rt_uint8_t temp;
rt_err_t err;
UNUSED rt_uint32_t discard;
#ifdef USE_TIMEOUT
rt_uint32_t to = 10;
#endif
//rt_kprintf("in readblock:%x\n",address);
//Clear all the errors & interrups
*(RP)DMAC_INTINTERRCLR |= 0x1;
*(RP)DMAC_INTINTERRCLR &= ~0x1;
*(RP)DMAC_INTTCCLEAR |= 0x1;
*(RP)DMAC_INTTCCLEAR &= ~0x1;
/*Clear read fifo*/
*(RP)(SDC_INTERRUPT_STATUS_MASK) = ~(0x1<<9); //don't mask fifo empty
while((*(RP)SDC_INTERRUPT_STATUS)&0x200 != 0x200)
discard = *(RP)SDC_READ_BUFER_ACCESS;
/*DMAC2,word,size=0x80*/
*(RP)DMAC_C2SRCADDR = SDC_READ_BUFER_ACCESS;
*(RP)DMAC_C2DESTADDR = (rt_uint32_t)buf;
*(RP)DMAC_C2CONTROL =0x20249b;
*(RP)DMAC_C2CONFIGURATION = 0x38d;
err = cmd_wait(0x6ea,RCA,0xfff);
if(err != RT_EOK)
{
rt_set_errno(err);
return err;
}
err = cmd_wait(0xca,0x2,0xfff);
if(err != RT_EOK)
{
rt_set_errno(err);
return err;
}
err = cmd_response(0x22e,address,0X1,0x0200,0x1,0Xfff); //CMD17 4bit mode
if(err != RT_EOK)
{
rt_set_errno(err);
return err;
}
complete = *(RP)SDC_INTERRUPT_STATUS;
/*CRC*/
if((complete |0xfffffffd) !=0xfffffffd)
{
rt_kprintf("CRC ERROR!!!\n");
complete = *(RP)SDC_INTERRUPT_STATUS;
}
while(((*(RP)( DMAC_INTTCSTATUS)) & 0x4) != 0x4 )
{
delay(10);
#ifdef USE_TIMEOUT
to--;
if(!to)
{
EOUT("%s TIMEOUT\n",__FUNCTION__);
return RT_ETIMEOUT;
}
#endif
}
#ifdef USE_TIMEOUT
//DBOUT("%s timeout is %d\n",__FUNCTION__,to);
#endif
/*for the buf is big-endian we must reverse it*/
for(i = 0;i<0x80;i++)
{
temp = buf[0];
buf[0] = buf[3];
buf[3] = temp;
temp = buf[1];
buf[1] = buf[2];
buf[2] = temp;
buf += 4;
}
return RT_EOK;
}
static rt_uint8_t sd_readmultiblock(rt_uint32_t address, rt_uint8_t* buf,rt_uint32_t size)
{
rt_int32_t index;
rt_uint8_t status=RT_EOK;
for(index = 0;index < size;index++)
{
status = sd_readblock(address+index*SECTOR_SIZE,buf+index*SECTOR_SIZE);
if(status!=RT_EOK)
break;
}
return status;
}
/**
* This function will set a hook function, which will be invoked when a memory
* block is allocated from heap memory.
*
* @param hook the hook function
*/
static rt_uint8_t sd_writeblock(rt_uint32_t address, rt_uint8_t* buf)
{
U32 complete;
rt_uint8_t temp;
rt_uint8_t *ptr = buf;
rt_err_t err;
#ifdef USE_TIMEOUT
rt_uint32_t to = 10;
#endif
int i;
rt_kprintf("in writeblock:%x\n",address);
/*for the buf is big-endian we must reverse it*/
for(i = 0;i<0x80;i++)
{
temp = ptr[0];
ptr[0] = ptr[3];
ptr[3] = temp;
temp = ptr[1];
ptr[1] = ptr[2];
ptr[2] = temp;
ptr += 4;
}
//Clear all the errors & interrups
*(RP)DMAC_INTINTERRCLR |= 0x1;
*(RP)DMAC_INTINTERRCLR &= ~0x1;
*(RP)DMAC_INTTCCLEAR |= 0x1;
*(RP)DMAC_INTTCCLEAR &= ~0x1;
//***********************配置DMA2进行四位写*************************
*(RP)DMAC_C2SRCADDR = (U32)buf; //DMAC道2源地址赋为0x30200000
*(RP)DMAC_C2DESTADDR = SDC_WRITE_BUFER_ACCESS; //DMAC道2目的地址赋为发送FIFO的地址
*(RP)DMAC_C2CONTROL = 0x20149b; //传输尺寸0x080,源地址增加目的地址不增加，传输宽度32bit，传输的数目4
*(RP)DMAC_C2CONFIGURATION = 0x380b; //不屏蔽传输中断，屏蔽错误中断，通道使能，传输类型：存储器到外设
err = cmd_wait(0x6ea,RCA,0xfff); //CMD55，以切换到ACMD命令
if(err != RT_EOK)
{
rt_set_errno(err);
return err;
}
err = cmd_wait(0xca,0x2,0xfff); //ACMD6，定义数据线宽度，48 位短反馈，无数据传输
if(err != RT_EOK)
{
rt_set_errno(err);
return err;
}
err = cmd_response(0x30e,address,0X3,0x0200,0x1,0Xfff); //CMD24 1bit mode
if(err != RT_EOK)
{
rt_set_errno(err);
return err;
}
complete = *(RP)SDC_INTERRUPT_STATUS;
if((complete |0xfffffffe) !=0xfffffffe) //响应超时错误
{
//printf("CRC ERROR");
complete = *(RP)SDC_INTERRUPT_STATUS;
}
while(((*(RP)( DMAC_INTTCSTATUS)) & 0x4) != 0x4 )
{
delay(10);
#ifdef USE_TIMEOUT
to--;
if(!to)
{
EOUT("%s TIMEOUT\n",__FUNCTION__);
}
#endif
}
#ifdef USE_TIMEOUT
//DBOUT("%s timeout is %d\n",__FUNCTION__,to);
#endif
return RT_EOK;
}
/**
* This function will set a hook function, which will be invoked when a memory
* block is allocated from heap memory.
*
* @param hook the hook function
*/
static rt_err_t rt_sdcard_init(rt_device_t dev)
{
return 0;
}
/**
* This function will set a hook function, which will be invoked when a memory
* block is allocated from heap memory.
*
* @param hook the hook function
*/
static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag)
{
return 0;
}
/**
* This function will set a hook function, which will be invoked when a memory
* block is allocated from heap memory.
*
* @param hook the hook function
*/
static rt_err_t rt_sdcard_close(rt_device_t dev)
{
return 0;
}
/**
* This function will set a hook function, which will be invoked when a memory
* block is allocated from heap memory.
*
* @param hook the hook function
*/
static rt_err_t rt_sdcard_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
rt_kprintf("cmd = %d\n",cmd);
RT_ASSERT(dev != RT_NULL);
if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME)
{
struct rt_device_blk_geometry *geometry;
geometry = (struct rt_device_blk_geometry *)args;
if (geometry == RT_NULL) return -RT_ERROR;
geometry->bytes_per_sector = 512;
geometry->block_size = 0x200000;
//if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
// geometry->sector_count = (SDCardInfo.SD_csd.DeviceSize + 1) * 1024;
//else
geometry->sector_count = 0x200000;//SDCardInfo.CardCapacity/SDCardInfo.CardBlockSize;
}
return RT_EOK;
}
/**
* This function will set a hook function, which will be invoked when a memory
* block is allocated from heap memory.
*
* @param hook the hook function
*/
static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_uint32_t retry = 3;
rt_uint8_t status;
rt_uint32_t index;
///*take the semaphore
struct dfs_partition *part = (struct dfs_partition *)dev->private;
rt_sem_take(part->lock, RT_WAITING_FOREVER);
while(retry--)
{
if (((rt_uint32_t)buffer % 4 != 0) ||
((rt_uint32_t)buffer > 0x20080000))
{
for(index = 0;index < size;index++)
{
status = sd_readblock((part->offset + pos) * SECTOR_SIZE,ptr_sddev->sec_buf);
if(status != RT_EOK)
break;
rt_memcpy((rt_uint8_t *)buffer + (index * SECTOR_SIZE),ptr_sddev->sec_buf,SECTOR_SIZE);
}
}
else
{
for(index = 0;index<size;index++)
{
status = sd_readblock((pos) * SECTOR_SIZE,(rt_uint8_t*)buffer + index * SECTOR_SIZE);
if(status != RT_EOK)
break;
}
}
}
rt_sem_release(part->lock);
if (status == RT_EOK)
return size;
rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer);
return 0;
}
/**
* This function will set a hook function, which will be invoked when a memory
* block is allocated from heap memory.
*
* @param hook the hook function
*/
static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
int i;
rt_uint8_t status;
struct dfs_partition *part = (struct dfs_partition *)dev->private;
if ( dev == RT_NULL )
{
rt_set_errno(-DFS_STATUS_EINVAL);
return 0;
}
rt_sem_take(part->lock, RT_WAITING_FOREVER);
if (((rt_uint32_t)buffer % 4 != 0) ||
((rt_uint32_t)buffer > 0x20080000))
{
rt_uint32_t index;
for(index=0;index<size;index++)
{
rt_memcpy(ptr_sddev->sec_buf, ((rt_uint8_t*)buffer + index * SECTOR_SIZE), SECTOR_SIZE);
status = sd_writeblock((part->offset + index + pos)*SECTOR_SIZE,ptr_sddev->sec_buf);
}
}
else
{
for(i=0;i<size;i++)
{
status = sd_writeblock((part->offset + i + pos)*SECTOR_SIZE,
(rt_uint8_t*)((rt_uint8_t*)buffer + i * SECTOR_SIZE));
if (status != RT_EOK) break;
}
}
rt_sem_release(part->lock);
if (status == RT_EOK)
return size;
rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer);
return 0;
}
rt_err_t rt_hw_sdcard_exit()
{
if(ptr_sddev->device != RT_NULL)
rt_free(ptr_sddev->device);
if(ptr_sddev->part != RT_NULL)
rt_free(ptr_sddev->part);
if(ptr_sddev != RT_NULL)
rt_free(ptr_sddev);
return RT_EOK;
}
/**
* This function will init sd card
*
* @param void
*/
rt_err_t rt_hw_sdcard_init()
{
/*For test*/
rt_err_t err;
rt_int32_t i;
char dname[4];
char sname[8];
/*Initialize structure*/
ptr_sddev = (struct sd_device*)rt_malloc(sizeof(struct sd_device));
if(ptr_sddev == RT_NULL)
{
EOUT("Failed to allocate sdcard device structure\n");
return RT_ENOMEM;
}
/*sdcard intialize*/
err = sd_init();
if(err != RT_EOK)
goto FAIL2;
/*set sector buffer*/
ptr_sddev->sec_buf = gsec_buf;
ptr_sddev->buf_size = SECTOR_SIZE;
ptr_sddev->sdc = (struct sd_c*)SD_BASE;
//DBOUT("allocate partition sector buffer OK!");
err = sd_readblock(0,ptr_sddev->sec_buf);
if(err != RT_EOK)
{
EOUT("read first block error\n");
goto FAIL2;
}
/*sdcard driver initialize*/
ptr_sddev->part = (struct dfs_partition*)rt_malloc(4 * sizeof(struct dfs_partition));
if(ptr_sddev->part == RT_NULL)
{
EOUT("allocate partition failed\n");
err = RT_ENOMEM;
goto FAIL2;
}
/*alloc device buffer*/
ptr_sddev->device = (struct rt_device*)rt_malloc(4 * sizeof(struct rt_device));
if(ptr_sddev->device == RT_NULL)
{
EOUT("allocate device failed\n");
err = RT_ENOMEM;
goto FAIL1;
}
ptr_sddev->part_num = 0;
err = sd_readblock(0,ptr_sddev->sec_buf);
if(err != RT_EOK)
{
EOUT("Read block 0 to initialize ERROR\n");
goto FAIL1;
}
for(i=0; i<4; i++)
{
/* get the first partition */
err = dfs_filesystem_get_partition(&(ptr_sddev->part[i]), ptr_sddev->sec_buf, i);
if (err == RT_EOK)
{
rt_snprintf(dname, 4, "sd%d", i);
rt_snprintf(sname, 8, "sem_sd%d", i);
ptr_sddev->part[i].lock = rt_sem_create(sname, 1, RT_IPC_FLAG_FIFO);
/* register sdcard device */
ptr_sddev->device[i].init = rt_sdcard_init;
ptr_sddev->device[i].open = rt_sdcard_open;
ptr_sddev->device[i].close = rt_sdcard_close;
ptr_sddev->device[i].read = rt_sdcard_read;
ptr_sddev->device[i].write = rt_sdcard_write;
ptr_sddev->device[i].control = rt_sdcard_control;
ptr_sddev->device[i].private= &ptr_sddev->part[i];
err = rt_device_register(&ptr_sddev->device[i], dname,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
if(err == RT_EOK)
ptr_sddev->part_num++;
}
else
{
if(i == 0)
{
/* there is no partition table */
ptr_sddev->part[0].offset = 0;
ptr_sddev->part[0].size = 0;
ptr_sddev->part[0].lock = rt_sem_create("sem_sd0", 1, RT_IPC_FLAG_FIFO);
/* register sdcard device */
ptr_sddev->device[0].init = rt_sdcard_init;
ptr_sddev->device[0].open = rt_sdcard_open;
ptr_sddev->device[0].close = rt_sdcard_close;
ptr_sddev->device[0].read = rt_sdcard_read;
ptr_sddev->device[0].write = rt_sdcard_write;
ptr_sddev->device[0].control = rt_sdcard_control;
ptr_sddev->device[0].private= &ptr_sddev->part[0];
err = rt_device_register(&ptr_sddev->device[0], "sd0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
if(err == RT_EOK)
ptr_sddev->part_num++;
break;
}
}
}
if(ptr_sddev->part_num == 0)
goto FAIL0;
return err;
FAIL0:
rt_free(ptr_sddev->device);
ptr_sddev->device = RT_NULL;
FAIL1:
rt_free(ptr_sddev->part);
ptr_sddev->part = RT_NULL;
FAIL2:
rt_free(ptr_sddev);
ptr_sddev = RT_NULL;
return err;
}
#endif

51
bsp/evb4020/src/sdcard.h
View File

@ -1,51 +0,0 @@
#ifndef __SDCARD_H
#define __SDCARD_H
#include <rtthread.h>
#ifdef RT_USING_DFS
#include <sep4020.h>
#define INICLK 300000
#define SDCLK 24000000 //PCLK=49.392MHz
#define MMCCLK 15000000 //PCLK=49.392MHz
/*struct of the SDC*/
struct sd_c
{
__IO rt_uint32_t clk_ctl;
__IO rt_uint32_t soft_rst;
__IO rt_uint32_t arg;
__IO rt_uint32_t cmd;
__IO rt_uint32_t blk_sz;
__IO rt_uint32_t blk_cnt;
__IO rt_uint32_t trans_mode;
__O rt_uint32_t response0;
__O rt_uint32_t response1;
__O rt_uint32_t response2;
__O rt_uint32_t response3;
__IO rt_uint32_t rd_to_ctl;
__IO rt_uint32_t int_stat;
__IO rt_uint32_t int_stat_mask;
__O rt_uint32_t rx_fifo;
__I rt_uint32_t tx_fifo;
};
/*sdcard driver structure*/
struct sd_device
{
struct rt_device *device; /*rt_device*/
struct sd_c *sdc; /*SDCARD register*/
struct dfs_partition *part; /*dfs partitions*/
rt_uint8_t *sec_buf; /*sdcard buffer*/
rt_uint32_t part_num; /*partiont numbers*/
rt_uint32_t buf_size; /*buffer size*/
};
#endif
#endif

867
bsp/evb4020/src/sep4020.h
View File

@ -1,867 +0,0 @@
#ifndef __SEP4020_H
#define __SEP4020_H
#include <rtthread.h>
/*Core definations*/
#define SVCMODE
#define Mode_USR 0x10
#define Mode_FIQ 0x11
#define Mode_IRQ 0x12
#define Mode_SVC 0x13
#define Mode_ABT 0x17
#define Mode_UND 0x1B
#define Mode_SYS 0x1F
/*
* 各模块寄存器基值
*/
#define ESRAM_BASE 0x04000000
#define INTC_BASE 0x10000000
#define PMU_BASE 0x10001000
#define RTC_BASE 0x10002000
#define WD_BASE 0x10002000
#define TIMER_BASE 0x10003000
#define PWM_BASE 0x10004000
#define UART0_BASE 0X10005000
#define UART1_BASE 0X10006000
#define UART2_BASE 0X10007000
#define UART3_BASE 0X10008000
#define SSI_BASE 0X10009000
#define I2S_BASE 0x1000A000
#define MMC_BASE 0x1000B000
#define SD_BASE 0x1000B000
#define SMC0_BASE 0x1000C000
#define SMC1_BASE 0x1000D000
#define USBD_BASE 0x1000E000
#define GPIO_BASE 0x1000F000
#define EMI_BASE 0x11000000
#define DMAC_BASE 0x11001000
#define LCDC_BASE 0x11002000
#define MAC_BASE 0x11003000
#define AMBA_BASE 0x11005000
/*
* INTC模块
* 基址: 0x10000000
*/
#define INTC_IER (INTC_BASE+0X000) /* IRQ中断允许寄存器 */
#define INTC_IMR (INTC_BASE+0X008) /* IRQ中断屏蔽寄存器 */
#define INTC_IFR (INTC_BASE+0X010) /* IRQ软件强制中断寄存器 */
#define INTC_IRSR (INTC_BASE+0X018) /* IRQ未处理中断状态寄存器 */
#define INTC_ISR (INTC_BASE+0X020) /* IRQ中断状态寄存器 */
#define INTC_IMSR (INTC_BASE+0X028) /* IRQ屏蔽中断状态寄存器 */
#define INTC_IFSR (INTC_BASE+0X030) /* IRQ中断最终状态寄存器 */
#define INTC_FIER (INTC_BASE+0X0C0) /* FIQ中断允许寄存器 */
#define INTC_FIMR (INTC_BASE+0X0C4) /* FIQ中断屏蔽寄存器 */
#define INTC_FIFR (INTC_BASE+0X0C8) /* FIQ软件强制中断寄存器 */
#define INTC_FIRSR (INTC_BASE+0X0CC) /* FIQ未处理中断状态寄存器 */
#define INTC_FISR (INTC_BASE+0X0D0) /* FIQ中断状态寄存器 */
#define INTC_FIFSR (INTC_BASE+0X0D4) /* FIQ中断最终状态寄存器 */
#define INTC_IPLR (INTC_BASE+0X0D8) /* IRQ中断优先级寄存器 */
#define INTC_ICR1 (INTC_BASE+0X0DC) /* IRQ内部中断优先级控制寄存器1 */
#define INTC_ICR2 (INTC_BASE+0X0E0) /* IRQ内部中断优先级控制寄存器2 */
#define INTC_EXICR1 (INTC_BASE+0X0E4) /* IRQ外部中断优先级控制寄存器1 */
#define INTC_EXICR2 (INTC_BASE+0X0E8) /* IRQ外部中断优先级控制寄存器2 */
/*
* PMU模块
* 基址: 0x10001000
*/
#define PMU_PLTR (PMU_BASE+0X000) /* PLL的稳定过渡时间 */
#define PMU_PMCR (PMU_BASE+0X004) /* 系统主时钟PLL的控制寄存器 */
#define PMU_PUCR (PMU_BASE+0X008) /* USB时钟PLL的控制寄存器 */
#define PMU_PCSR (PMU_BASE+0X00C) /* 内部模块时钟源供给的控制寄存器 */
#define PMU_PDSLOW (PMU_BASE+0X010) /* SLOW状态下时钟的分频因子 */
#define PMU_PMDR (PMU_BASE+0X014) /* 芯片工作模式寄存器 */
#define PMU_RCTR (PMU_BASE+0X018) /* Reset控制寄存器 */
#define PMU_CLRWAKUP (PMU_BASE+0X01C) /* WakeUp清除寄存器 */
/*
* RTC模块
* 基址: 0x10002000
*/
#define RTC_STA_YMD (RTC_BASE+0X000) /* 年, 月, 日计数寄存器 */
#define RTC_STA_HMS (RTC_BASE+0X004) /* 小时, 分钟, 秒寄存器 */
#define RTC_ALARM_ALL (RTC_BASE+0X008) /* 定时月, 日, 时, 分寄存器 */
#define RTC_CTR (RTC_BASE+0X00C) /* 控制寄存器 */
#define RTC_INT_EN (RTC_BASE+0X010) /* 中断使能寄存器 */
#define RTC_INT_STS (RTC_BASE+0X014) /* 中断状态寄存器 */
#define RTC_SAMP (RTC_BASE+0X018) /* 采样周期寄存器 */
#define RTC_WD_CNT (RTC_BASE+0X01C) /* Watch-Dog计数值寄存器 */
#define RTC_WD_SEV (RTC_BASE+0X020) /* Watch-Dog服务寄存器 */
#define RTC_CONFIG_CHECK (RTC_BASE+0X024) /* 配置时间确认寄存器 (在配置时间之前先写0xaaaaaaaa) */
#define RTC_KEY0 (RTC_BASE+0X02C) /* 密钥寄存器 */
/*
* TIMER模块
* 基址: 0x10003000
*/
#define TIMER_T1LCR (TIMER_BASE+0X000) /* 通道1加载计数寄存器 */
#define TIMER_T1CCR (TIMER_BASE+0X004) /* 通道1当前计数值寄存器 */
#define TIMER_T1CR (TIMER_BASE+0X008) /* 通道1控制寄存器 */
#define TIMER_T1ISCR (TIMER_BASE+0X00C) /* 通道1中断状态清除寄存器 */
#define TIMER_T1IMSR (TIMER_BASE+0X010) /* 通道1中断屏蔽状态寄存器 */
#define TIMER_T2LCR (TIMER_BASE+0X020) /* 通道2加载计数寄存器 */
#define TIMER_T2CCR (TIMER_BASE+0X024) /* 通道2当前计数值寄存器 */
#define TIMER_T2CR (TIMER_BASE+0X028) /* 通道2控制寄存器 */
#define TIMER_T2ISCR (TIMER_BASE+0X02C) /* 通道2中断状态清除寄存器 */
#define TIMER_T2IMSR (TIMER_BASE+0X030) /* 通道2中断屏蔽状态寄存器 */
#define TIMER_T3LCR (TIMER_BASE+0X040) /* 通道3加载计数寄存器 */
#define TIMER_T3CCR (TIMER_BASE+0X044) /* 通道3当前计数值寄存器 */
#define TIMER_T3CR (TIMER_BASE+0X048) /* 通道3控制寄存器 */
#define TIMER_T3ISCR (TIMER_BASE+0X04C) /* 通道3中断状态清除寄存器 */
#define TIMER_T3IMSR (TIMER_BASE+0X050) /* 通道3中断屏蔽状态寄存器 */
#define TIMER_T3CAPR (TIMER_BASE+0X054) /* 通道3捕获寄存器 */
#define TIMER_T4LCR (TIMER_BASE+0X060) /* 通道4加载计数寄存器 */
#define TIMER_T4CCR (TIMER_BASE+0X064) /* 通道4当前计数值寄存器 */
#define TIMER_T4CR (TIMER_BASE+0X068) /* 通道4控制寄存器 */
#define TIMER_T4ISCR (TIMER_BASE+0X06C) /* 通道4中断状态清除寄存器 */
#define TIMER_T4IMSR (TIMER_BASE+0X070) /* 通道4中断屏蔽状态寄存器 */
#define TIMER_T4CAPR (TIMER_BASE+0X074) /* 通道4捕获寄存器 */
#define TIMER_T5LCR (TIMER_BASE+0X080) /* 通道5加载计数寄存器 */
#define TIMER_T5CCR (TIMER_BASE+0X084) /* 通道5当前计数值寄存器 */
#define TIMER_T5CR (TIMER_BASE+0X088) /* 通道5控制寄存器 */
#define TIMER_T5ISCR (TIMER_BASE+0X08C) /* 通道5中断状态清除寄存器 */
#define TIMER_T5IMSR (TIMER_BASE+0X090) /* 通道5中断屏蔽状态寄存器 */
#define TIMER_T5CAPR (TIMER_BASE+0X094) /* 通道5捕获寄存器 */
#define TIMER_T6LCR (TIMER_BASE+0X0A0) /* 通道6加载计数寄存器 */
#define TIMER_T6CCR (TIMER_BASE+0X0A4) /* 通道6当前计数值寄存器 */
#define TIMER_T6CR (TIMER_BASE+0X0A8) /* 通道6控制寄存器 */
#define TIMER_T6ISCR (TIMER_BASE+0X0AC) /* 通道6中断状态清除寄存器 */
#define TIMER_T6IMSR (TIMER_BASE+0X0B0) /* 通道6中断屏蔽状态寄存器 */
#define TIMER_T6CAPR (TIMER_BASE+0X0B4) /* 通道6捕获寄存器 */
#define TIMER_T7LCR (TIMER_BASE+0X0C0) /* 通道7加载计数寄存器 */
#define TIMER_T7CCR (TIMER_BASE+0X0C4) /* 通道7当前计数值寄存器 */
#define TIMER_T7CR (TIMER_BASE+0X0C8) /* 通道7控制寄存器 */
#define TIMER_T7ISCR (TIMER_BASE+0X0CC) /* 通道7中断状态清除寄存器 */
#define TIMER_T7IMSR (TIMER_BASE+0X0D0) /* 通道7中断屏蔽状态寄存器 */
#define TIMER_T8LCR (TIMER_BASE+0X0E0) /* 通道8加载计数寄存器 */
#define TIMER_T8CCR (TIMER_BASE+0X0E4) /* 通道8当前计数值寄存器 */
#define TIMER_T8CR (TIMER_BASE+0X0E8) /* 通道8控制寄存器 */
#define TIMER_T8ISCR (TIMER_BASE+0X0EC) /* 通道8中断状态清除寄存器 */
#define TIMER_T8IMSR (TIMER_BASE+0X0F0) /* 通道8中断屏蔽状态寄存器 */
#define TIMER_T9LCR (TIMER_BASE+0X100) /* 通道9加载计数寄存器 */
#define TIMER_T9CCR (TIMER_BASE+0X104) /* 通道9当前计数值寄存器 */
#define TIMER_T9CR (TIMER_BASE+0X108) /* 通道9控制寄存器 */
#define TIMER_T9ISCR (TIMER_BASE+0X10C) /* 通道9中断状态清除寄存器 */
#define TIMER_T9IMSR (TIMER_BASE+0X110) /* 通道9中断屏蔽状态寄存器 */
#define TIMER_T10LCR (TIMER_BASE+0X120) /* 通道10加载计数寄存器 */
#define TIMER_T10CCR (TIMER_BASE+0X124) /* 通道10当前计数值寄存器 */
#define TIMER_T10CR (TIMER_BASE+0X128) /* 通道10控制寄存器 */
#define TIMER_T10ISCR (TIMER_BASE+0X12C) /* 通道10中断状态清除寄存器 */
#define TIMER_T10IMSR (TIMER_BASE+0X130) /* 通道10中断屏蔽状态寄存器 */
#define TIMER_TIMSR (TIMER_BASE+0X140) /* TIMER中断屏蔽状态寄存器 */
#define TIMER_TISCR (TIMER_BASE+0X144) /* TIMER中断状态清除寄存器 */
#define TIMER_TISR (TIMER_BASE+0X148) /* TIMER中断状态寄存器 */
/*
* PWM模块
* 基址: 0x10004000
*/
#define PWM0_CTRL (PWM_BASE+0X000) /* PWM0控制寄存器 */
#define PWM0_DIV (PWM_BASE+0X004) /* PWM0分频寄存器 */
#define PWM0_PERIOD (PWM_BASE+0X008) /* PWM0周期寄存器 */
#define PWM0_DATA (PWM_BASE+0X00C) /* PWM0数据寄存器 */
#define PWM0_CNT (PWM_BASE+0X010) /* PWM0计数寄存器 */
#define PWM0_STATUS (PWM_BASE+0X014) /* PWM0状态寄存器 */
#define PWM1_CTRL (PWM_BASE+0X020) /* PWM1控制寄存器 */
#define PWM1_DIV (PWM_BASE+0X024) /* PWM1分频寄存器 */
#define PWM1_PERIOD (PWM_BASE+0X028) /* PWM1周期寄存器 */
#define PWM1_DATA (PWM_BASE+0X02C) /* PWM1数据寄存器 */
#define PWM1_CNT (PWM_BASE+0X030) /* PWM1计数寄存器 */
#define PWM1_STATUS (PWM_BASE+0X034) /* PWM1状态寄存器 */
#define PWM2_CTRL (PWM_BASE+0X040) /* PWM2控制寄存器 */
#define PWM2_DIV (PWM_BASE+0X044) /* PWM2分频寄存器 */
#define PWM2_PERIOD (PWM_BASE+0X048) /* PWM2周期寄存器 */
#define PWM2_DATA (PWM_BASE+0X04C) /* PWM2数据寄存器 */
#define PWM2_CNT (PWM_BASE+0X050) /* PWM2计数寄存器 */
#define PWM2_STATUS (PWM_BASE+0X054) /* PWM2状态寄存器 */
#define PWM3_CTRL (PWM_BASE+0X060) /* PWM3控制寄存器 */
#define PWM3_DIV (PWM_BASE+0X064) /* PWM3分频寄存器 */
#define PWM3_PERIOD (PWM_BASE+0X068) /* PWM3周期寄存器 */
#define PWM3_DATA (PWM_BASE+0X06C) /* PWM3数据寄存器 */
#define PWM3_CNT (PWM_BASE+0X070) /* PWM3计数寄存器 */
#define PWM3_STATUS (PWM_BASE+0X074) /* PWM3状态寄存器 */
#define PWM_INTMASK (PWM_BASE+0X080) /* PWM中断屏蔽寄存器 */
#define PWM_INT (PWM_BASE+0X084) /* PWM中断寄存器 */
#define PWM_ENABLE (PWM_BASE+0X088) /* PWM使能寄存器 */
/*
* UART0模块
* 基址: 0x10005000
*/
#define UART0_DLBL (UART0_BASE+0X000) /* 波特率设置低八位寄存器 */
#define UART0_RXFIFO (UART0_BASE+0X000) /* 接收FIFO */
#define UART0_TXFIFO (UART0_BASE+0X000) /* 发送FIFO */
#define UART0_DLBH (UART0_BASE+0X004) /* 波特率设置高八位寄存器 */
#define UART0_IER (UART0_BASE+0X004) /* 中断使能寄存器 */
#define UART0_IIR (UART0_BASE+0X008) /* 中断识别寄存器 */
#define UART0_FCR (UART0_BASE+0X008) /* FIFO控制寄存器 */
#define UART0_LCR (UART0_BASE+0X00C) /* 行控制寄存器 */
#define UART0_MCR (UART0_BASE+0X010) /* Modem控制寄存器 */
#define UART0_LSR (UART0_BASE+0X014) /* 行状态寄存器 */
#define UART0_MSR (UART0_BASE+0X018) /* Modem状态寄存器 */
/*
* UART1模块
* 基址: 0x10006000
*/
#define UART1_DLBL (UART1_BASE+0X000) /* 波特率设置低八位寄存器 */
#define UART1_RXFIFO (UART1_BASE+0X000) /* 接收FIFO */
#define UART1_TXFIFO (UART1_BASE+0X000) /* 发送FIFO */
#define UART1_DLBH (UART1_BASE+0X004) /* 波特率设置高八位寄存器 */
#define UART1_IER (UART1_BASE+0X004) /* 中断使能寄存器 */
#define UART1_IIR (UART1_BASE+0X008) /* 中断识别寄存器 */
#define UART1_FCR (UART1_BASE+0X008) /* FIFO控制寄存器 */
#define UART1_LCR (UART1_BASE+0X00C) /* 行控制寄存器 */
#define UART1_MCR (UART1_BASE+0X010) /* Modem控制寄存器 */
#define UART1_LSR (UART1_BASE+0X014) /* 行状态寄存器 */
#define UART1_MSR (UART1_BASE+0X018) /* Modem状态寄存器 */
/*
* UART2模块
* 基址: 0x10007000
*/
#define UART2_DLBL (UART2_BASE+0X000) /* 波特率设置低八位寄存器 */
#define UART2_RXFIFO (UART2_BASE+0X000) /* 接收FIFO */
#define UART2_TXFIFO (UART2_BASE+0X000) /* 发送FIFO */
#define UART2_DLBH (UART2_BASE+0X004) /* 波特率设置高八位寄存器 */
#define UART2_IER (UART2_BASE+0X004) /* 中断使能寄存器 */
#define UART2_IIR (UART2_BASE+0X008) /* 中断识别寄存器 */
#define UART2_FCR (UART2_BASE+0X008) /* FIFO控制寄存器 */
#define UART2_LCR (UART2_BASE+0X00C) /* 行控制寄存器 */
#define UART2_MCR (UART2_BASE+0X010) /* Modem控制寄存器 */
#define UART2_LSR (UART2_BASE+0X014) /* 行状态寄存器 */
#define UART2_MSR (UART2_BASE+0X018) /* Modem状态寄存器 */
/*
* UART3模块
* 基址: 0x10008000
*/
#define UART3_DLBL (UART3_BASE+0X000) /* 波特率设置低八位寄存器 */
#define UART3_RXFIFO (UART3_BASE+0X000) /* 接收FIFO */
#define UART3_TXFIFO (UART3_BASE+0X000) /* 发送FIFO */
#define UART3_DLBH (UART3_BASE+0X004) /* 波特率设置高八位寄存器 */
#define UART3_IER (UART3_BASE+0X004) /* 中断使能寄存器 */
#define UART3_IIR (UART3_BASE+0X008) /* 中断识别寄存器 */
#define UART3_FCR (UART3_BASE+0X008) /* FIFO控制寄存器 */
#define UART3_LCR (UART3_BASE+0X00C) /* 行控制寄存器 */
#define UART3_MCR (UART3_BASE+0X010) /* Modem控制寄存器 */
#define UART3_LSR (UART3_BASE+0X014) /* 行状态寄存器 */
#define UART3_MSR (UART3_BASE+0X018) /* Modem状态寄存器 */
/*
* SSI模块
* 基址: 0x10009000
*/
#define SSI_CONTROL0 (SSI_BASE+0X000) /* 控制寄存器0 */
#define SSI_CONTROL1 (SSI_BASE+0X004) /* 控制寄存器1 */
#define SSI_SSIENR (SSI_BASE+0X008) /* SSI使能寄存器 */
#define SSI_MWCR (SSI_BASE+0X00C) /* Microwire控制寄存器 */
#define SSI_SER (SSI_BASE+0X010) /* 从设备使能寄存器 */
#define SSI_BAUDR (SSI_BASE+0X014) /* 波特率设置寄存器 */
#define SSI_TXFTLR (SSI_BASE+0X018) /* 发送FIFO阈值寄存器 */
#define SSI_RXFTLR (SSI_BASE+0X01C) /* 接收FIFO阈值寄存器 */
#define SSI_TXFLR (SSI_BASE+0X020) /* 发送FIFO状态寄存器 */
#define SSI_RXFLR (SSI_BASE+0X024) /* 接收FIFO状态寄存器 */
#define SSI_SR (SSI_BASE+0X028) /* 状态寄存器 */
#define SSI_IMR (SSI_BASE+0X02C) /* 中断屏蔽寄存器 */
#define SSI_ISR (SSI_BASE+0X030) /* 中断最终状态寄存器 */
#define SSI_RISR (SSI_BASE+0X034) /* 中断原始状态寄存器 */
#define SSI_TXOICR (SSI_BASE+0X038) /* 发送FIFO上溢中断清除寄存器 */
#define SSI_RXOICR (SSI_BASE+0X03C) /* 接收FIFO上溢中断清除寄存器 */
#define SSI_RXUICR (SSI_BASE+0X040) /* 接收FIFO下溢中断清除寄存器 */
#define SSI_ICR (SSI_BASE+0X02C) /* 中断清除寄存器 */
#define SSI_DMACR (SSI_BASE+0X04C) /* DMA控制寄存器 */
#define SSI_DMATDLR (SSI_BASE+0X050) /* DMA发送状态寄存器 */
#define SSI_DMARDLR (SSI_BASE+0X054) /* DMA接收状态寄存器 */
#define SSI_DR (SSI_BASE+0X060) /* 数据寄存器 */
/*
* I2S模块
* 基址: 0x1000A000
*/
#define I2S_CTRL (I2S_BASE+0X000) /* I2S控制寄存器 */
#define I2S_DATA (I2S_BASE+0X004) /* I2S数据寄存器 */
#define I2S_INT (I2S_BASE+0X008) /* I2S中断寄存器 */
#define I2S_STATUS (I2S_BASE+0X00C) /* I2S状态寄存器 */
/*
* SD模块
* 基址: 0x1000B000
*/
#define SDC_CLOCK_CONTROL (SD_BASE+0x00) /* SDIO时钟控制寄存器 */
#define SDC_SOFTWARE_RESET (SD_BASE+0X04) /* SDIO软件复位寄存器 */
#define SDC_ARGUMENT (SD_BASE+0X08) /* SDIO命令参数寄存器 */
#define SDC_COMMAND (SD_BASE+0X0C) /* SDIO命令控制寄存器 */
#define SDC_BLOCK_SIZE (SD_BASE+0X10) /* SDIO数据块长度寄存器 */
#define SDC_BLOCK_COUNT (SD_BASE+0X14) /* SDIO数据块数目寄存器 */
#define SDC_TRANSFER_MODE (SD_BASE+0X18) /* SDIO传输模式选择寄存器 */
#define SDC_RESPONSE0 (SD_BASE+0X1c) /* SDIO响应寄存器0 */
#define SDC_RESPONSE1 (SD_BASE+0X20) /* SDIO响应寄存器1 */
#define SDC_RESPONSE2 (SD_BASE+0X24) /* SDIO响应寄存器2 */
#define SDC_RESPONSE3 (SD_BASE+0X28) /* SDIO响应寄存器3 */
#define SDC_READ_TIMEOUT_CONTROL (SD_BASE+0X2c) /* SDIO读超时控制寄存器 */
#define SDC_INTERRUPT_STATUS (SD_BASE+0X30) /* SDIO中断状态寄存器 */
#define SDC_INTERRUPT_STATUS_MASK (SD_BASE+0X34) /* SDIO中断状态屏蔽寄存器 */
#define SDC_READ_BUFER_ACCESS (SD_BASE+0X38) /* SDIO接收FIFO */
#define SDC_WRITE_BUFER_ACCESS (SD_BASE+0X3c) /* SDIO发送FIFO */
/*
* SMC0模块
* 基址: 0x1000C000
*/
#define SMC0_CTRL (SMC0_BASE+0X000) /* SMC0控制寄存器 */
#define SMC0_INT (SMC0_BASE+0X004) /* SMC0中断寄存器 */
#define SMC0_FD (SMC0_BASE+0X008) /* SMC0基本单元时间寄存器 */
#define SMC0_CT (SMC0_BASE+0X00C) /* SMC0字符传输时间寄存器 */
#define SMC0_BT (SMC0_BASE+0X010) /* SMC0块传输时间寄存器 */
/*
* SMC1模块
* 基址: 0x1000D000
*/
#define SMC1_CTRL (SMC1_BASE+0X000) /* SMC1控制寄存器 */
#define SMC1_INT (SMC1_BASE+0X004) /* SMC1中断寄存器 */
#define SMC1_FD (SMC1_BASE+0X008) /* SMC1基本单元时间寄存器 */
#define SMC1_CT (SMC1_BASE+0X00C) /* SMC1字符传输时间寄存器 */
#define SMC1_BT (SMC1_BASE+0X010) /* SMC1块传输时间寄存器 */
/*
* USBD模块
* 基址: 0x1000E000
*/
#define USBD_PROTOCOLINTR (USBD_BASE+0X000) /* USB协议中断寄存器 */
#define USBD_INTRMASK (USBD_BASE+0X004) /* USB中断屏蔽寄存器 */
#define USBD_INTRCTRL (USBD_BASE+0X008) /* USB中断类型控制寄存器 */
#define USBD_EPINFO (USBD_BASE+0X00C) /* USB活动端点状态寄存器 */
#define USBD_BCONFIGURATIONVALUE (USBD_BASE+0X010) /* SET_CCONFIGURATION记录 */
#define USBD_BMATTRIBUTES (USBD_BASE+0X014) /* 当前配置属性寄存器 */
#define USBD_DEVSPEED (USBD_BASE+0X018) /* 当前设备工作速度寄存器 */
#define USBD_FRAMENUMBER (USBD_BASE+0X01C) /* 记录当前SOF包内的帧号 */
#define USBD_EPTRANSACTIONS0 (USBD_BASE+0X020) /* 记录下次要求的传输次数 */
#define USBD_EPTRANSACTIONS1 (USBD_BASE+0X024) /* 记录下次要求的传输次数 */
#define USBD_APPIFUPDATE (USBD_BASE+0X028) /* 接口号快速更新寄存器 */
#define USBD_CFGINTERFACE0 (USBD_BASE+0X02C) /* 记录接口的值 */
#define USBD_CFGINTERFACE1 (USBD_BASE+0X030) /* 记录接口的值 */
#define USBD_CFGINTERFACE2 (USBD_BASE+0X034) /* 记录接口的值 */
#define USBD_CFGINTERFACE3 (USBD_BASE+0X038) /* 记录接口的值 */
#define USBD_CFGINTERFACE4 (USBD_BASE+0X03C) /* 记录接口的值 */
#define USBD_CFGINTERFACE5 (USBD_BASE+0X040) /* 记录接口的值 */
#define USBD_CFGINTERFACE6 (USBD_BASE+0X044) /* 记录接口的值 */
#define USBD_CFGINTERFACE7 (USBD_BASE+0X048) /* 记录接口的值 */
#define USBD_CFGINTERFACE8 (USBD_BASE+0X04C) /* 记录接口的值 */
#define USBD_CFGINTERFACE9 (USBD_BASE+0X050) /* 记录接口的值 */
#define USBD_CFGINTERFACE10 (USBD_BASE+0X054) /* 记录接口的值 */
#define USBD_CFGINTERFACE11 (USBD_BASE+0X058) /* 记录接口的值 */
#define USBD_CFGINTERFACE12 (USBD_BASE+0X05C) /* 记录接口的值 */
#define USBD_CFGINTERFACE13 (USBD_BASE+0X060) /* 记录接口的值 */
#define USBD_CFGINTERFACE14 (USBD_BASE+0X064) /* 记录接口的值 */
#define USBD_CFGINTERFACE15 (USBD_BASE+0X068) /* 记录接口的值 */
#define USBD_CFGINTERFACE16 (USBD_BASE+0X06C) /* 记录接口的值 */
#define USBD_CFGINTERFACE17 (USBD_BASE+0X070) /* 记录接口的值 */
#define USBD_CFGINTERFACE18 (USBD_BASE+0X074) /* 记录接口的值 */
#define USBD_CFGINTERFACE19 (USBD_BASE+0X078) /* 记录接口的值 */
#define USBD_CFGINTERFACE20 (USBD_BASE+0X07C) /* 记录接口的值 */
#define USBD_CFGINTERFACE21 (USBD_BASE+0X080) /* 记录接口的值 */
#define USBD_CFGINTERFACE22 (USBD_BASE+0X084) /* 记录接口的值 */
#define USBD_CFGINTERFACE23 (USBD_BASE+0X088) /* 记录接口的值 */
#define USBD_CFGINTERFACE24 (USBD_BASE+0X08C) /* 记录接口的值 */
#define USBD_CFGINTERFACE25 (USBD_BASE+0X090) /* 记录接口的值 */
#define USBD_CFGINTERFACE26 (USBD_BASE+0X094) /* 记录接口的值 */
#define USBD_CFGINTERFACE27 (USBD_BASE+0X098) /* 记录接口的值 */
#define USBD_CFGINTERFACE28 (USBD_BASE+0X09C) /* 记录接口的值 */
#define USBD_CFGINTERFACE29 (USBD_BASE+0X0A0) /* 记录接口的值 */
#define USBD_CFGINTERFACE30 (USBD_BASE+0X0A4) /* 记录接口的值 */
#define USBD_CFGINTERFACE31 (USBD_BASE+0X0A8) /* 记录接口的值 */
#define USBD_PKTPASSEDCTRL (USBD_BASE+0X0AC) /* 记录成功接收的包数 */
#define USBD_PKTDROPPEDCTRL (USBD_BASE+0X0B0) /* 记录丢失的包数 */
#define USBD_CRCERRCTRL (USBD_BASE+0X0B4) /* 记录CRC错误的包数 */
#define USBD_BITSTUFFERRCTRL (USBD_BASE+0X0B8) /* 记录位填充错误的包数 */
#define USBD_PIDERRCTRL (USBD_BASE+0X0BC) /* 记录PID错误的包数 */
#define USBD_FRAMINGERRCTL (USBD_BASE+0X0C0) /* 记录有SYNC和EOP的包数 */
#define USBD_TXPKTCTRL (USBD_BASE+0X0C4) /* 记录发送包的数量 */
#define USBD_STATCTRLOV (USBD_BASE+0X0C8) /* 记录统计寄存器溢出情况 */
#define USBD_TXLENGTH (USBD_BASE+0X0CC) /* 记录每次IN传输事务包长度 */
#define USBD_RXLENGTH (USBD_BASE+0X0D0) /* 记录OUT传输事务包长度 */
#define USBD_RESUME (USBD_BASE+0X0D4) /* USB唤醒寄存器 */
#define USBD_READFLAG (USBD_BASE+0X0D8) /* 读异步状态寄存器标志 */
#define USBD_RECEIVETYPE (USBD_BASE+0X0DC) /* 传输状态寄存器 */
#define USBD_APPLOCK (USBD_BASE+0X0E0) /* 锁信号寄存器 */
#define USBD_EP0OUTADDR (USBD_BASE+0X100) /* 端点0端点号和方向 */
#define USBD_EP0OUTBMATTR (USBD_BASE+0X104) /* 端点0类型寄存器 */
#define USBD_EP0OUTMAXPKTSIZE (USBD_BASE+0X108) /* 端点0最大包尺寸寄存器 */
#define USBD_EP0OUTIFNUM (USBD_BASE+0X10C) /* 端点0接口号寄存器 */
#define USBD_EP0OUTSTAT (USBD_BASE+0X110) /* 端点0状态寄存器 */
#define USBD_EP0OUTBMREQTYPE (USBD_BASE+0X114) /* 端点0 SETUP事务请求类 */
#define USBD_EP0OUTBREQUEST (USBD_BASE+0X118) /* 端点0 SETUP事务请求内容 */
#define USBD_EP0OUTWVALUE (USBD_BASE+0X11C) /* 端点0 SETUP事务请求值 */
#define USBD_EP0OUTWINDEX (USBD_BASE+0X120) /* 端点0 SETUP事务请求索引 */
#define USBD_EP0OUTWLENGTH (USBD_BASE+0X120) /* 端点0 SETUP事务请求长度 */
#define USBD_EP0OUTSYNCHFRAME (USBD_BASE+0X128) /* 端点0同步包帧号 */
#define USBD_EP1OUTADDR (USBD_BASE+0X12C) /* 端点1输出端点号和方向 */
#define USBD_EP1OUTBMATTR (USBD_BASE+0X130) /* 端点1输出类型寄存器 */
#define USBD_EP1OUTMAXPKTSIZE (USBD_BASE+0X134) /* 端点1输出最大包尺寸寄存器 */
#define USBD_EP1OUTIFNUM (USBD_BASE+0X138) /* 端点1输出接口号寄存器 */
#define USBD_EP1OUTSTAT (USBD_BASE+0X13C) /* 端点1输出状态寄存器 */
#define USBD_EP1OUTBMREQTYPE (USBD_BASE+0X140) /* 端点1输出SETUP事务请求类型 */
#define USBD_EP1OUTBREQUEST (USBD_BASE+0X144) /* 端点1输出SETUP事务请求内容 */
#define USBD_EP1OUTWVALUE (USBD_BASE+0X148) /* 端点1输出SETUP事务请求值 */
#define USBD_EP1OUTWINDX (USBD_BASE+0X14C) /* 端点1输出SETUP事务请求索引 */
#define USBD_EP1OUTWLENGH (USBD_BASE+0X150) /* 端点1输出SETUP事务请求域长度 */
#define USBD_EP1OUTSYNCHFRAME (USBD_BASE+0X154) /* 端点1输出同步包帧号 */
#define USBD_EP1INADDR (USBD_BASE+0X158) /* 端点1输入端点号和方向 */
#define USBD_EP1INBMATTR (USBD_BASE+0X15C) /* 端点1输入类型寄存器 */
#define USBD_EP1INMAXPKTSIZE (USBD_BASE+0X160) /* 端点1输入最大包尺寸寄存器 */
#define USBD_EP1INIFNUM (USBD_BASE+0X164) /* 端点1输入接口号寄存器 */
#define USBD_EP1INSTAT (USBD_BASE+0X168) /* 端点1输入状态寄存器 */
#define USBD_EP1INBMREQTYPE (USBD_BASE+0X16C) /* 端点1输入SETUP事务请求类型 */
#define USBD_EP1INBREQUEST (USBD_BASE+0X170) /* 端点1输入SETUP事务请求内容 */
#define USBD_EP1INWVALUE (USBD_BASE+0X174) /* 端点1输入SETUP事务请求值 */
#define USBD_EP1INWINDEX (USBD_BASE+0X178) /* 端点1输入SETUP事务请求索引 */
#define USBD_EP1INWLENGTH (USBD_BASE+0X17C) /* 端点1输入SETUP事务请求域长度 */
#define USBD_EP1INSYNCHFRAME (USBD_BASE+0X180) /* 端点1输入同步包帧号 */
#define USBD_EP2OUTADDR (USBD_BASE+0X184) /* 端点2输出端点号和方向 */
#define USBD_EP2OUTBMATTR (USBD_BASE+0X188) /* 端点2输出类型寄存器 */
#define USBD_EP2OUTMAXPKTSIZE (USBD_BASE+0X18C) /* 端点2输出最大包尺寸寄存器 */
#define USBD_EP2OUTIFNUM (USBD_BASE+0X190) /* 端点2输出接口号寄存器 */
#define USBD_EP2OUTSTAT (USBD_BASE+0X194) /* 端点2输出状态寄存器 */
#define USBD_EP2OUTBMREQTYPE (USBD_BASE+0X198) /* 端点2输出SETUP事务请求类型 */
#define USBD_EP2OUTBREQUEST (USBD_BASE+0X19C) /* 端点2输出SETUP事务请求内容 */
#define USBD_EP2OUTWVALUE (USBD_BASE+0X1A0) /* 端点2输出SETUP事务请求值 */
#define USBD_EP2OUTWINDEX (USBD_BASE+0X1A4) /* 端点2输出SETUP事务请求索引 */
#define USBD_EP2OUTWLENGTH (USBD_BASE+0X1A8) /* 端点2输出SETUP事务请求域长度 */
#define USBD_EP2OUTSYNCHFRAME (USBD_BASE+0X1AC) /* 端点2输出同步包帧号 */
#define USBD_EP2INADDR (USBD_BASE+0X1B0) /* 端点2输入端点号和方向 */
#define USBD_EP2INBMATTR (USBD_BASE+0X1B4) /* 端点2输入类型寄存器 */
#define USBD_EP2INMAXPKTSIZE (USBD_BASE+0X1B8) /* 端点2输入最大包尺寸寄存器 */
#define USBD_EP2INIFNUM (USBD_BASE+0X1BC) /* 端点2输入接口号寄存器 */
#define USBD_EP2INSTAT (USBD_BASE+0X1C0) /* 端点2输入状态寄存器 */
#define USBD_EP2INBMREQTYPE (USBD_BASE+0X1C4) /* 端点2输入SETUP事务请求类型 */
#define USBD_EP2INBREQUEST (USBD_BASE+0X1C8) /* 端点2输入SETUP事务请求内容 */
#define USBD_EP2INWVALUE (USBD_BASE+0X1CC) /* 端点2输入SETUP事务请求值 */
#define USBD_EP2INWINDEX (USBD_BASE+0X1D0) /* 端点2输入SETUP事务请求索引 */
#define USBD_EP2INWLENGTH (USBD_BASE+0X1D4) /* 端点2输入SETUP事务请求域长度 */
#define USBD_EP2INSYNCHFRAME (USBD_BASE+0X1D8) /* 端点2输入同步包帧号 */
#define USBD_RXFIFO (USBD_BASE+0X200) /* 接受FIFO */
#define USBD_TXFIFO (USBD_BASE+0X300) /* 发送FIFO */
/*
* GPIO模块
* 基址: 0x1000F000
*/
#define GPIO_DBCLK_DIV (GPIO_BASE+0X000) /* 去毛刺采用时钟分频比配置寄存器 */
#define GPIO_PORTA_DIR (GPIO_BASE+0X004) /* A组端口输入输出方向配置寄存器 */
#define GPIO_PORTA_SEL (GPIO_BASE+0X008) /* A组端口通用用途选择配置寄存器 */
#define GPIO_PORTA_INCTL (GPIO_BASE+0X00C) /* A组端口通用用途输入时类型配置寄存器 */
#define GPIO_PORTA_INTRCTL (GPIO_BASE+0X010) /* A组端口中断触发类型配置寄存器 */
#define GPIO_PORTA_INTRCLR (GPIO_BASE+0X014) /* A组端口通用用途中断清除配置寄存器 */
#define GPIO_PORTA_DATA (GPIO_BASE+0X018) /* A组端口通用用途数据配置寄存器 */
#define GPIO_PORTB_DIR (GPIO_BASE+0X01C) /* B组端口输入输出方向配置寄存器 */
#define GPIO_PORTB_SEL (GPIO_BASE+0X020) /* B组端口通用用途选择配置寄存器 */
#define GPIO_PORTB_DATA (GPIO_BASE+0X024) /* B组端口通用用途数据配置寄存器 */
#define GPIO_PORTC_DIR (GPIO_BASE+0X028) /* C组端口输入输出方向配置寄存器 */
#define GPIO_PORTC_SEL (GPIO_BASE+0X02C) /* C组端口通用用途选择配置寄存器 */
#define GPIO_PORTC_DATA (GPIO_BASE+0X030) /* C组端口通用用途数据配置寄存器 */
#define GPIO_PORTD_DIR (GPIO_BASE+0X034) /* D组端口输入输出方向配置寄存器 */
#define GPIO_PORTD_SEL (GPIO_BASE+0X038) /* D组端口通用用途选择配置寄存器 */
#define GPIO_PORTD_SPECII (GPIO_BASE+0X03C) /* D组端口专用用途2选择配置寄存器 */
#define GPIO_PORTD_DATA (GPIO_BASE+0X040) /* D组端口通用用途数据配置寄存器 */
#define GPIO_PORTE_DIR (GPIO_BASE+0X044) /* E组端口输入输出方向配置寄存器 */
#define GPIO_PORTE_SEL (GPIO_BASE+0X048) /* E组端口通用用途选择配置寄存器 */
#define GPIO_PORTE_DATA (GPIO_BASE+0X04C) /* E组端口通用用途数据配置寄存器 */
#define GPIO_PORTF_DIR (GPIO_BASE+0X050) /* F组端口输入输出方向配置寄存器 */
#define GPIO_PORTF_SEL (GPIO_BASE+0X054) /* F组端口通用用途选择配置寄存器 */
#define GPIO_PORTF_INCTL (GPIO_BASE+0X058) /* F组端口通用用途输入时类型配置寄存器 */
#define GPIO_PORTF_INTRCTL (GPIO_BASE+0X05C) /* F组端口中断触发类型配置寄存器 */
#define GPIO_PORTF_INTRCLR (GPIO_BASE+0X060) /* F组端口通用用途中断清除配置寄存器 */
#define GPIO_PORTF_DATA (GPIO_BASE+0X064) /* F组端口通用用途数据配置寄存器 */
#define GPIO_PORTG_DIR (GPIO_BASE+0X068) /* G组端口输入输出方向配置寄存器 */
#define GPIO_PORTG_SEL (GPIO_BASE+0X06C) /* G组端口通用用途选择配置寄存器 */
#define GPIO_PORTG_DATA (GPIO_BASE+0X070) /* G组端口通用用途数据配置寄存器 */
#define GPIO_PORTH_DIR (GPIO_BASE+0X07C) /* H组端口输入输出方向配置寄存器 */
#define GPIO_PORTH_SEL (GPIO_BASE+0X078) /* H组端口通用用途选择配置寄存器 */
#define GPIO_PORTH_DATA (GPIO_BASE+0X07C) /* H组端口通用用途数据配置寄存器 */
#define GPIO_PORTI_DIR (GPIO_BASE+0X080) /* I组端口输入输出方向配置寄存器 */
#define GPIO_PORTI_SEL (GPIO_BASE+0X084) /* I组端口通用用途选择配置寄存器 */
#define GPIO_PORTI_DATA (GPIO_BASE+0X088) /* I组端口通用用途数据配置寄存器 */
/*
* EMI模块
* 基址: 0x11000000
*/
#define EMI_CSACONF (EMI_BASE+0X000) /* CSA参数配置寄存器 */
#define EMI_CSBCONF (EMI_BASE+0X004) /* CSB参数配置寄存器 */
#define EMI_CSCCONF (EMI_BASE+0X008) /* CSC参数配置寄存器 */
#define EMI_CSDCONF (EMI_BASE+0X00C) /* CSD参数配置寄存器 */
#define EMI_CSECONF (EMI_BASE+0X010) /* CSE参数配置寄存器 */
#define EMI_CSFCONF (EMI_BASE+0X014) /* CSF参数配置寄存器 */
#define EMI_SDCONF1 (EMI_BASE+0X018) /* SDRAM时序配置寄存器1 */
#define EMI_SDCONF2 (EMI_BASE+0X01C) /* SDRAM时序配置寄存器2, SDRAM初始化用到的配置信息 */
#define EMI_REMAPCONF (EMI_BASE+0X020) /* 片选空间及地址映射REMAP配置寄存器 */
#define EMI_NAND_ADDR1 (EMI_BASE+0X100) /* NAND FLASH的地址寄存器1 */
#define EMI_NAND_COM (EMI_BASE+0X104) /* NAND FLASH的控制字寄存器 */
#define EMI_NAND_STA (EMI_BASE+0X10C) /* NAND FLASH的状态寄存器 */
#define EMI_ERR_ADDR1 (EMI_BASE+0X110) /* 读操作出错的地址寄存器1 */
#define EMI_ERR_ADDR2 (EMI_BASE+0X114) /* 读操作出错的地址寄存器2 */
#define EMI_NAND_CONF1 (EMI_BASE+0X118) /* NAND FLASH的配置器存器1 */
#define EMI_NAND_INTR (EMI_BASE+0X11C) /* NAND FLASH中断寄存器 */
#define EMI_NAND_ECC (EMI_BASE+0X120) /* ECC校验完成寄存器 */
#define EMI_NAND_IDLE (EMI_BASE+0X124) /* NAND FLASH空闲寄存器 */
#define EMI_NAND_CONF2 (EMI_BASE+0X128) /* NAND FLASH的配置器存器2 */
#define EMI_NAND_ADDR2 (EMI_BASE+0X12C) /* NAND FLASH的地址寄存器2 */
#define EMI_NAND_DATA (EMI_BASE+0X200) /* NAND FLASH的数据寄存器 */
/*
* DMAC模块
* 基址: 0x11001000
*/
#define DMAC_INTSTATUS (DMAC_BASE+0X020) /* DAMC中断状态寄存器。 */
#define DMAC_INTTCSTATUS (DMAC_BASE+0X050) /* DMAC传输完成中断状态寄存器 */
#define DMAC_INTTCCLEAR (DMAC_BASE+0X060) /* DMAC传输完成中断状态清除寄存器 */
#define DMAC_INTERRORSTATUS (DMAC_BASE+0X080) /* DMAC传输错误中断状态寄存器 */
#define DMAC_INTINTERRCLR (DMAC_BASE+0X090) /* DMAC传输错误中断状态清除寄存器 */
#define DMAC_ENBLDCHNS (DMAC_BASE+0X0B0) /* DMAC通道使能状态寄存器 */
#define DMAC_C0SRCADDR (DMAC_BASE+0X000) /* DMAC道0源地址寄存器 */
#define DMAC_C0DESTADD (DMAC_BASE+0X004) /* DMAC道0目的地址寄存器 */
#define DMAC_C0CONTROL (DMAC_BASE+0X00C) /* DMAC道0控制寄存器 */
#define DMAC_C0CONFIGURATION (DMAC_BASE+0X010) /* DMAC道0配置寄存器 */
#define DMAC_C0DESCRIPTOR (DMAC_BASE+0X01C) /* DMAC道0链表地址寄存器 */
#define DMAC_C1SRCADDR (DMAC_BASE+0X100) /* DMAC道1源地址寄存器 */
#define DMAC_C1DESTADDR (DMAC_BASE+0X104) /* DMAC道1目的地址寄存器 */
#define DMAC_C1CONTROL (DMAC_BASE+0X10C) /* DMAC道1控制寄存器 */
#define DMAC_C1CONFIGURATION (DMAC_BASE+0X110) /* DMAC道1配置寄存器 */
#define DMAC_C1DESCRIPTOR (DMAC_BASE+0X114) /* DMAC道1链表地址寄存器 */
#define DMAC_C2SRCADDR (DMAC_BASE+0X200) /* DMAC道2源地址寄存器 */
#define DMAC_C2DESTADDR (DMAC_BASE+0X204) /* DMAC道2目的地址寄存器 */
#define DMAC_C2CONTROL (DMAC_BASE+0X20C) /* DMAC道2控制寄存器 */
#define DMAC_C2CONFIGURATION (DMAC_BASE+0X210) /* DMAC道2配置寄存器 */
#define DMAC_C2DESCRIPTOR (DMAC_BASE+0X214) /* DMAC道2链表地址寄存器 */
#define DMAC_C3SRCADDR (DMAC_BASE+0X300) /* DMAC道3源地址寄存器 */
#define DMAC_C3DESTADDR (DMAC_BASE+0X304) /* DMAC道3目的地址寄存器 */
#define DMAC_C3CONTROL (DMAC_BASE+0X30C) /* DMAC道3控制寄存器 */
#define DMAC_C3CONFIGURATION (DMAC_BASE+0X310) /* DMAC道3配置寄存器 */
#define DMAC_C3DESCRIPTOR (DMAC_BASE+0X314) /* DMAC道3链表地址寄存器 */
#define DMAC_C4SRCADDR (DMAC_BASE+0X400) /* DMAC道4源地址寄存器 */
#define DMAC_C4DESTADDR (DMAC_BASE+0X404) /* DMAC道4目的地址寄存器 */
#define DMAC_C4CONTROL (DMAC_BASE+0X40C) /* DMAC道4控制寄存器 */
#define DMAC_C4CONFIGURATION (DMAC_BASE+0X410) /* DMAC道4配置寄存器 */
#define DMAC_C4DESCRIPTOR (DMAC_BASE+0X414) /* DMAC道4链表地址寄存器 */
#define DMAC_C5SRCADDR (DMAC_BASE+0X500) /* DMAC道5源地址寄存器 */
#define DMAC_C5DESTADDR (DMAC_BASE+0X504) /* DMAC道5目的地址寄存器 */
#define DMAC_C5CONTROL (DMAC_BASE+0X50C) /* DMAC道5控制寄存器 */
#define DMAC_C5CONFIGURATION (DMAC_BASE+0X510) /* DMAC道5配置寄存器 */
#define DMAC_C5DESCRIPTOR (DMAC_BASE+0X514) /* DMAC道5链表地址寄存器 */
/*
* LCDC模块
* 基址: 0x11002000
*/
#define LCDC_SSA (LCDC_BASE+0X000) /* 屏幕起始地址寄存器 */
#define LCDC_SIZE (LCDC_BASE+0X004) /* 屏幕尺寸寄存器 */
#define LCDC_PCR (LCDC_BASE+0X008) /* 面板配置寄存器 */
#define LCDC_HCR (LCDC_BASE+0X00C) /* 水平配置寄存器 */
#define LCDC_VCR (LCDC_BASE+0X010) /* 垂直配置寄存器 */
#define LCDC_PWMR (LCDC_BASE+0X014) /* PWM对比度控制寄存器 */
#define LCDC_LECR (LCDC_BASE+0X018) /* 使能控制寄存器 */
#define LCDC_DMACR (LCDC_BASE+0X01C) /* DMA控制寄存器 */
#define LCDC_LCDISREN (LCDC_BASE+0X020) /* 中断使能寄存器 */
#define LCDC_LCDISR (LCDC_BASE+0X024) /* 中断状态寄存器 */
#define LCDC_LGPMR (LCDC_BASE+0X040) /* 灰度调色映射寄存器组 (16个32bit寄存器) */
/*
* MAC模块
* 基址: 0x11003000
*/
#define MAC_CTRL (MAC_BASE+0X000) /* MAC控制寄存器 */
#define MAC_INTSRC (MAC_BASE+0X004) /* MAC中断源寄存器 */
#define MAC_INTMASK (MAC_BASE+0X008) /* MAC中断屏蔽寄存器 */
#define MAC_IPGT (MAC_BASE+0X00C) /* 连续帧间隔寄存器 */
#define MAC_IPGR1 (MAC_BASE+0X010) /* 等待窗口寄存器 */
#define MAC_IPGR2 (MAC_BASE+0X014) /* 等待窗口寄存器 */
#define MAC_PACKETLEN (MAC_BASE+0X018) /* 帧长度寄存器 */
#define MAC_COLLCONF (MAC_BASE+0X01C) /* 碰撞重发寄存器 */
#define MAC_TXBD_NUM (MAC_BASE+0X020) /* 发送描述符寄存器 */
#define MAC_FLOWCTRL (MAC_BASE+0X024) /* 流控寄存器 */
#define MAC_MII_CTRL (MAC_BASE+0X028) /* PHY控制寄存器 */
#define MAC_MII_CMD (MAC_BASE+0X02C) /* PHY命令寄存器 */
#define MAC_MII_ADDRESS (MAC_BASE+0X030) /* PHY地址寄存器 */
#define MAC_MII_TXDATA (MAC_BASE+0X034) /* PHY写数据寄存器 */
#define MAC_MII_RXDATA (MAC_BASE+0X038) /* PHY读数据寄存器 */
#define MAC_MII_STATUS (MAC_BASE+0X03C) /* PHY状态寄存器 */
#define MAC_ADDR0 (MAC_BASE+0X040) /* MAC地址寄存器 */
#define MAC_ADDR1 (MAC_BASE+0X044) /* MAC地址寄存器 */
#define MAC_HASH0 (MAC_BASE+0X048) /* MAC HASH寄存器 */
#define MAC_HASH1 (MAC_BASE+0X04C) /* MAC HASH寄存器 */
#define MAC_TXPAUSE (MAC_BASE+0X050) /* MAC控制帧寄存器 */
#define MAC_TX_BD (MAC_BASE+0X400)
#define MAC_RX_BD (MAC_BASE+0X600)
/*
**************************************
* Error Codes:
* IF SUCCESS RETURN 0, ELSE RETURN OTHER ERROR CODE,
* parameter error return (-33)/E_PAR,
* hardware error reture (-99)/E_HA
**************************************
*/
#define E_OK 0 /* Normal completion */
#define E_SYS (-5) /* System error */
#define E_NOMEM (-10) /* Insufficient memory */
#define E_NOSPT (-17) /* Feature not supported */
#define E_INOSPT (-18) /* Feature not supported by ITRON/FILE specification */
#define E_RSFN (-20) /* Reserved function code number */
#define E_RSATR (-24) /* Reserved attribute */
#define E_PAR (-33) /* Parameter error */
#define E_ID (-35) /* Invalid ID number */
#define E_NOEXS (-52) /* Object does not exist */
#define E_OBJ (-63) /* Invalid object state */
#define E_MACV (-65) /* Memory access disabled or memory access violation */
#define E_OACV (-66) /* Object access violation */
#define E_CTX (-69) /* Context error */
#define E_QOVR (-73) /* Queuing or nesting overflow */
#define E_DLT (-81) /* Object being waited for was deleted */
#define E_TMOUT (-85) /* Polling failure or timeout exceeded */
#define E_RLWAI (-86) /* WAIT state was forcibly released */
#define E_HA (-99) /* HARD WARE ERROR */
/*
**************************************
* PMU 模块时钟
**************************************
*/
#define CLK_SGPT (1 << 16)
#define CLK_SI2S (1 << 15)
#define CLK_SSMC (1 << 14)
#define CLK_SMAC (1 << 13)
#define CLK_SUSB (1 << 12)
#define CLK_SUART3 (1 << 11)
#define CLK_SUART2 (1 << 10)
#define CLK_SUART1 (1 << 9)
#define CLK_SUART0 (1 << 8)
#define CLK_SSSI (1 << 7)
#define CLK_SAC97 (1 << 6)
#define CLK_SMMCSD (1 << 5)
#define CLK_SEMI (1 << 4)
#define CLK_SDMAC (1 << 3)
#define CLK_SPWM (1 << 2)
#define CLK_SLCDC (1 << 1)
#define CLK_SESRAM (1)
/*Interrupt Sources*/
#define INTSRC_RTC 31
#define INTSRC_DMAC 30
#define INTSRC_EMI 29
#define INTSRC_MAC 28
#define INTSRC_TIMER1 27
#define INTSRC_TIMER2 26
#define INTSRC_TIMER3 25
#define INTSRC_UART0 24
#define INTSRC_UART1 23
#define INTSRC_UART2 22
#define INTSRC_UART3 21
#define INTSRC_PWM 20
#define INTSRC_LCDC 19
#define INTSRC_I2S 18
#define INTSRC_SSI 17
#define INTSRC_USB 15
#define INTSRC_SMC0 14
#define INTSRC_SMC1 13
#define INTSRC_SDIO 12
#define INTSRC_EXINT10 11
#define INTSRC_EXINT9 10
#define INTSRC_EXINT8 9
#define INTSRC_EXINT7 8
#define INTSRC_EXINT6 7
#define INTSRC_EXINT5 6
#define INTSRC_EXINT4 5
#define INTSRC_EXINT3 4
#define INTSRC_EXINT2 3
#define INTSRC_EXINT1 2
#define INTSRC_EXINT0 1
#define INTSRC_NULL 0
/*Sereral useful macros*/
#define set_plevel(plevel) *(RP)INTC_IPLR = plevel //设置普通中断的优先级门限，只有优先级大于此值的中断才能通过
#define set_int_force(intnum) *(RP)INTC_IFR = (1 << intnum) //置1后，软件强制该位对应的中断源发出中断信号
#define enable_irq(intnum) *(RP)INTC_IER |= (1 << intnum) //置1后，允许中断源的IRQ 中断信号
#define disable_irq( intnum) *(RP)INTC_IER &= ~(1<< intnum) //置0后，不允许中断源的IRQ 中断信号
#define mask_irq(intnum) *(RP)INTC_IMR |= (1 << intnum) //置1后，屏蔽对应的IRQ 中断信号
#define unmask_irq(intnum) *(RP)INTC_IMR &= ~(1 << intnum) //置0后，通过对应的IRQ 中断信号
#define mask_all_irq() *(RP)INTC_IMR = 0xFFFFFFFF //屏蔽对应的IRQ 中断信号
#define unmask_all_irq() *(RP)INTC_IMR = 0x00000000 //通过对应的IRQ 中断信号
#define enable_all_irq() *(RP)INTC_IER = 0XFFFFFFFF //允许中断源的IRQ 中断信号
#define disable_all_irq() *(RP)INTC_IER = 0X00000000 //不允许中断源的IRQ 中断信号
#define InitInt() do{mask_all_irq(); enable_all_irq();}while(0)
/*
**************************************
* 所有程序中用到的Typedef
**************************************
*/
typedef char S8; /* signed 8-bit integer */
typedef short S16; /* signed 16-bit integer */
typedef long S32; /* signed 32-bit integer */
typedef unsigned char U8; /* unsigned 8-bit integer */
typedef unsigned short U16; /* unsigned 16-bit integer */
typedef unsigned long U32; /* unsigned 32-bit integer */
typedef volatile U32 * RP;
typedef volatile U16 * RP16;
typedef volatile U8 * RP8;
typedef void *VP; /* pointer to an unpredictable data type */
typedef void (*FP)(); /* program start address */
#ifndef _BOOL_TYPE_
#define _BOOL_TYPE_
typedef int BOOL; /* Boolean value. TRUE (1) or FALSE (0). */
#endif
typedef int ER; /* Error code. A signed integer. */
/**
* IO definitions
*
* define access restrictions to peripheral registers
*/
#define __I volatile const /*!< defines 'read only' permissions */
#define __O volatile /*!< defines 'write only' permissions */
#define __IO volatile /*!< defines 'read / write' permissions */
#define __iomem volatile
/*Macros for debug*/
#define EOUT(fmt,...) \
do \
{ \
rt_kprintf("EOUT:(%s:%i) ",__FILE__,__LINE__); \
rt_kprintf(fmt,##__VA_ARGS__); \
}while(0)
#define RT_DEBUG
#ifdef RT_DEBUG
#define DBOUT(fmt,...) \
do \
{ \
rt_kprintf("DBOUT:(%s:%i) ",__FILE__,__LINE__); \
rt_kprintf(fmt,##__VA_ARGS__); \
}while(0)
#else
#define DBOUT(fmt,...) \
do{}while(0)
#endif
#ifdef RT_DEBUG
#define ASSERT(arg) \
if((arg) == 0) \
{ \
while(1) \
{ \
rt_kprintf("have a assert failure\n"); \
} \
}
#else
#define ASSERT(arg) \
do \
{ \
}while(0)
#endif
#define write_reg(reg,value) \
do \
{ \
*(RP)(reg) = value; \
}while(0)
#define read_reg(reg) (*(RP)reg)
struct rt_hw_register
{
rt_uint32_t r0;
rt_uint32_t r1;
rt_uint32_t r2;
rt_uint32_t r3;
rt_uint32_t r4;
rt_uint32_t r5;
rt_uint32_t r6;
rt_uint32_t r7;
rt_uint32_t r8;
rt_uint32_t r9;
rt_uint32_t r10;
rt_uint32_t fp;
rt_uint32_t ip;
rt_uint32_t sp;
rt_uint32_t lr;
rt_uint32_t pc;
rt_uint32_t cpsr;
rt_uint32_t ORIG_r0;
};
/*@}*/
#endif

282
bsp/evb4020/src/serial.c
View File

@ -1,282 +0,0 @@
/*
* File : serial.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-03-13 Bernard first version
* 2009-04-20 yi.qiu modified according bernard's stm32 version
* 2010-10-6 wangmeng added sep4020 surpport
*/
#include <rtthread.h>
#include <rthw.h>
#include "serial.h"
/**
* @addtogroup SEP4020
*/
/*@{*/
/* RT-Thread Device Interface */
/**
* This function initializes serial
*/
static rt_err_t rt_serial_init (rt_device_t dev)
{
struct serial_device* uart = (struct serial_device*) dev->user_data;
if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
{
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
rt_memset(uart->int_rx->rx_buffer, 0,
sizeof(uart->int_rx->rx_buffer));
uart->int_rx->read_index = uart->int_rx->save_index = 0;
}
if (dev->flag & RT_DEVICE_FLAG_INT_TX)
{
rt_memset(uart->int_tx->tx_buffer, 0,
sizeof(uart->int_tx->tx_buffer));
uart->int_tx->write_index = uart->int_tx->save_index = 0;
}
dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
}
return RT_EOK;
}
/* save a char to serial buffer */
static void rt_serial_savechar(struct serial_device* uart, char ch)
{
rt_base_t level;
/* disable interrupt */
level = rt_hw_interrupt_disable();
uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
uart->int_rx->save_index ++;
if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->save_index = 0;
/* if the next position is read index, discard this 'read char' */
if (uart->int_rx->save_index == uart->int_rx->read_index)
{
uart->int_rx->read_index ++;
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->read_index = 0;
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
static rt_err_t rt_serial_close(rt_device_t dev)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_uint8_t* ptr;
rt_err_t err_code;
struct serial_device* uart;
ptr = buffer;
err_code = RT_EOK;
uart = (struct serial_device*)dev->user_data;
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
rt_base_t level;
/* interrupt mode Rx */
while (size)
{
if (uart->int_rx->read_index != uart->int_rx->save_index)
{
*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
size --;
/* disable interrupt */
level = rt_hw_interrupt_disable();
uart->int_rx->read_index ++;
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->read_index = 0;
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
else
{
/* set error code */
err_code = -RT_EEMPTY;
break;
}
}
}
else
{
/* polling mode */
while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
{
while (uart->uart_device->lsr & USTAT_RCV_READY)
{
*ptr = uart->uart_device->dlbl_fifo.txfifo & 0xff;
ptr ++;
}
}
}
/* set error code */
rt_set_errno(err_code);
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
}
static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
rt_uint8_t* ptr;
rt_err_t err_code;
struct serial_device* uart;
err_code = RT_EOK;
ptr = (rt_uint8_t*)buffer;
uart = (struct serial_device*)dev->user_data;
if (dev->flag & RT_DEVICE_FLAG_INT_TX)
{
/* interrupt mode Tx */
while (uart->int_tx->save_index != uart->int_tx->write_index)
{
/* save on tx buffer */
uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
-- size;
/* move to next position */
uart->int_tx->save_index ++;
/* wrap save index */
if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
uart->int_tx->save_index = 0;
}
/* set error code */
if (size > 0)
err_code = -RT_EFULL;
}
else
{
/* polling mode */
while (size)
{
/*
* to be polite with serial console add a line feed
* to the carriage return character
*/
if (*ptr == '\n' && (dev->flag & RT_DEVICE_FLAG_STREAM))
{
while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY));
uart->uart_device->dlbl_fifo.txfifo = '\r';
}
while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY));
uart->uart_device->dlbl_fifo.txfifo = (*ptr & 0x1FF);
++ptr; --size;
}
}
/* set error code */
rt_set_errno(err_code);
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
}
static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
{
RT_ASSERT(dev != RT_NULL);
switch (cmd)
{
case RT_DEVICE_CTRL_SUSPEND:
/* suspend device */
dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
break;
case RT_DEVICE_CTRL_RESUME:
/* resume device */
dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
break;
}
return RT_EOK;
}
/*
* serial register
*/
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial)
{
RT_ASSERT(device != RT_NULL);
device->type = RT_Device_Class_Char;
device->rx_indicate = RT_NULL;
device->tx_complete = RT_NULL;
device->init = rt_serial_init;
device->open = rt_serial_open;
device->close = rt_serial_close;
device->read = rt_serial_read;
device->write = rt_serial_write;
device->control = rt_serial_control;
device->user_data = serial;
/* register a character device */
return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
}
/* ISR for serial interrupt */
void rt_hw_serial_isr(rt_device_t device)
{
struct serial_device* uart = (struct serial_device*) device->user_data;
/* interrupt mode receive */
RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
/* save on rx buffer */
while (uart->uart_device->lsr & USTAT_RCV_READY)
{
rt_serial_savechar(uart, uart->uart_device->dlbl_fifo.rxfifo & 0xff);
}
/* invoke callback */
if (device->rx_indicate != RT_NULL)
{
rt_size_t rx_length;
/* get rx length */
rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
uart->int_rx->save_index - uart->int_rx->read_index;
device->rx_indicate(device, rx_length);
}
}
/*@}*/

90
bsp/evb4020/src/serial.h
View File

@ -1,90 +0,0 @@
/*
* File : serial.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-03-13 Bernard first version
* 2009-04-20 yi.qiu modified according bernard's stm32 version
* 2010-10-6 wangmeng added sep4020 surpport
*/
#ifndef __SERIAL_H__
#define __SERIAL_H__
#include <sep4020.h>
#define USTAT_RCV_READY 0x01 /* receive data ready */
#define USTAT_TXB_EMPTY 0x40 /* tx buffer empty */
#define BPS 115200 /* serial baudrate */
#define UART_RX_BUFFER_SIZE 64
#define UART_TX_BUFFER_SIZE 64
/*For sep4020's uart have several secondary function*/
/*we use union to decribe it*/
union dlbl_fifo
{
rt_uint32_t dlbl;
rt_uint32_t rxfifo;
rt_uint32_t txfifo;
};
union dlbh_ier
{
rt_uint32_t dlbh;
rt_uint32_t ier;
};
union iir_fcr
{
rt_uint32_t iir;
rt_uint32_t fcr;
};
struct serial_int_rx
{
rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE];
rt_uint32_t read_index, save_index;
};
struct serial_int_tx
{
rt_uint8_t tx_buffer[UART_TX_BUFFER_SIZE];
rt_uint32_t write_index, save_index;
};
typedef struct uartport
{
union dlbl_fifo dlbl_fifo;
union dlbh_ier dlbh_ier;
union iir_fcr iir_fcr;
rt_uint32_t lcr;
rt_uint32_t mcr;
rt_uint32_t lsr;
rt_uint32_t msr;
}uartport;
struct serial_device
{
uartport* uart_device;
/* rx structure */
struct serial_int_rx* int_rx;
/* tx structure */
struct serial_int_tx* int_tx;
};
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial);
void rt_hw_serial_isr(rt_device_t device);
#endif

119
bsp/evb4020/src/startup.c
View File

@ -1,119 +0,0 @@
#include <rthw.h>
#include <rtthread.h>
#include <sep4020.h>
#include <board.h>
#include <serial.h>
#include <finsh.h>
#ifdef RT_USING_LWIP
#include <lwip/sys.h>
#include <netif/ethernetif.h>
#endif
#define SDRAM_BASE 0x30000000
#ifdef __CC_ARM
extern int Image$$RW_RAM1$$ZI$$Limit;
#endif
extern void rt_application_init(void);
extern void finsh_system_init(void);
extern void sd_init(void);
extern rt_uint8_t sd_readblock(rt_uint32_t address, rt_uint8_t* buf);
extern rt_uint8_t sd_writeblock(rt_uint32_t address, rt_uint8_t* buf);
extern struct serial_device uart0;
extern struct rt_device uart0_device;
void rtthread_startup()
{
/* init hardware interrupt */
rt_hw_interrupt_init();
/* init board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();
/* init heap memory system */
#ifdef __CC_ARM
rt_kprintf("base=%p\n",&Image$$RW_RAM1$$ZI$$Limit);
rt_system_heap_init((void*)&Image$$RW_RAM1$$ZI$$Limit, (void*)(SDRAM_BASE + 0x200000));
#else
rt_system_heap_init(&__bss_end, (void*)0x34000000);
#endif
/* init scheduler system */
rt_system_scheduler_init();
#ifdef RT_USING_DEVICE
/* register uart0 */
rt_hw_serial_register(&uart0_device, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
&uart0);
#ifdef RT_USING_DFS
rt_hw_sdcard_init();
#endif
#ifdef RT_USING_LWIP
eth_system_device_init();
rt_hw_dm9161_init();
#endif
/*init all registed devices */
rt_device_init_all();
#endif
/* init application */
rt_application_init();
#ifdef RT_USING_FINSH
/* init finsh */
finsh_system_init();
#ifdef RT_USING_DEVICE
finsh_set_device("uart0");
#endif
#endif
/* init idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main()
{
rt_uint32_t UNUSED level;
/* disable interrupt first */
level = rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}

63
bsp/evb4020/src/tcpsendpacket.c
View File

@ -1,63 +0,0 @@
#include <rtthread.h>
#include <lwip/netdb.h> /* 为了解析主机名，需要包含netdb.h头文件 */
#include <lwip/sockets.h> /* 使用BSD socket，需要包含sockets.h头文件 */
void tcp_senddata(const char* url, int port, int length)
{
struct hostent *host;
int sock, err, result, timeout, index;
struct sockaddr_in server_addr;
rt_uint8_t *buffer_ptr;
/* 通过函数入口参数url获得host地址（如果是域名，会做域名解析） */
host = gethostbyname(url);
/* 创建一个socket，类型是SOCKET_STREAM，TCP类型 */
if ((sock = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP)) == -1)
{
/* 创建socket失败 */
rt_kprintf("Socket error\n");
return;
}
/* 神奇内存 */
buffer_ptr = rt_malloc(length);
/* 构造发生数据 */
for (index = 0; index < length; index ++)
buffer_ptr[index] = index & 0xff;
timeout = 100;
/* 设置发送超时时间100ms */
lwip_setsockopt(sock, SOL_SOCKET, SO_SNDTIMEO, &timeout, sizeof(timeout));
/* 初始化预连接的服务端地址 */
server_adlidr.sin_family = AF_INET;
server_addr.sin_port = htons(port);
server_addr.sin_addr = *((struct in_addr *)host->h_addr);
rt_memset(&(server_addr.sin_zero), 0, sizeof(server_addr.sin_zero));
/* 连接到服务端 */
err = connect(sock, (struct sockaddr *)&server_addr, sizeof(struct sockaddr));
rt_kprintf("TCP thread connect error code: %d\n", err);
while(1)
{
/* 发送数据到sock连接 */
result = send(sock, buffer_ptr, length, MSG_DONTWAIT);
if(result == -1) //数据发送错误处理
{
rt_kprintf("TCP thread send error: %d\n", result);
lwip_close(sock); //关闭连接，重新创建连接
rt_thread_delay(10);
if ((sock = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP)) == -1)
rt_kprintf("TCP Socket error:%d\n",sock);
err = connect(sock, (struct sockaddr *)&server_addr, sizeof(struct sockaddr));
rt_kprintf("TCP thread connect error code: %d\n", err);
}
}
}
#ifdef RT_USING_FINSH
#include <finsh.h>
/* 输出tcpclient函数到finsh shell中 */
FINSH_FUNCTION_EXPORT(tcp_senddata, send a packet through tcp connection);
#endif

40
bsp/sep4020/Ext_SDRAM.ini
View File

@ -1,40 +0,0 @@
/******************************************************************************/
/* Ext_RAM.INI: External RAM (SDRAM) Initialization File */
/******************************************************************************/
// <<< Use Configuration Wizard in Context Menu >>> //
/******************************************************************************/
/* This file is part of the uVision/ARM development tools. */
/* Copyright (c) 2005-2008 Keil Software. All rights reserved. */
/* This software may only be used under the terms of a valid, current, */
/* end user licence from KEIL for a compatible version of KEIL software */
/* development tools. Nothing else gives you the right to use this software. */
/******************************************************************************/
FUNC void SetupForStart (void) {
// <o> Program Entry Point
PC = 0x30000000;
}
FUNC void Init (void) {
_WDWORD(0x1000200C, 0x00000000); // Disable Watchdog
// Clock Setup
_WDWORD(0x10001000, 0x00fa00fa); //
_WDWORD(0x10001014, 0x00000001); //
_WDWORD(0x10001004, 0x00004009); //
_WDWORD(0x10001004, 0x0000C009); //
_WDWORD(0x11000018, 0x1E104177); //
_WDWORD(0x1100001c, 0x80001860); //
}
Init(); // Initialize memory
LOAD build\rtthread-sep4020.axf INCREMENTAL // Download program
SetupForStart(); // Setup for Running
g, main // Goto Main

14
bsp/sep4020/Memory.ini
View File

@ -1,14 +0,0 @@
/******************************************************************************/
/* MEMORY.INI: Memory Debug Initialization File */
/******************************************************************************/
/* This file is part of the uVision/ARM development tools. */
/* Copyright (c) 2005-2006 Keil Software. All rights reserved. */
/* This software may only be used under the terms of a valid, current, */
/* end user licence from KEIL for a compatible version of KEIL software */
/* development tools. Nothing else gives you the right to use this software. */
/******************************************************************************/
MAP 0x00000000,0x0000FFFF READ EXEC // External ROM
MAP 0x30000000,0x31FFFFFF READ WRITE // External RAM
MAP 0x10000000,0x11000000 READ WRITE
MAP 0x11000000,0x12000000 READ WRITE

86
bsp/sep4020/application.c
View File

@ -1,86 +0,0 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard the first version
*/
/**
* @addtogroup SEP4020
*/
/*@{*/
#include <rtthread.h>
#include "board.h"
static void rt_thread_entry_led1(void* parameter)
{
/* init led configuration */
/* rt_hw_led_init(); */
while (1)
{
/* led on */
//rt_kprintf("led1 on\r\n");
GPIO_PORTE_DATA |= 0x1<<3;
rt_thread_delay(50); /* sleep 0.5 second and switch to other thread */
/* led off */
//rt_kprintf("led1 off\r\n");
GPIO_PORTE_DATA &= ~(0x1<<3);
rt_thread_delay(50);
}
}
char thread_led2_stack[1024];
struct rt_thread thread_led2;
void rt_thread_entry_led2(void* parameter)
{
unsigned int count=0;
while (1)
{
/* led on */
//rt_kprintf("led2 on,count : %d\r\n",count);
count++;
GPIO_PORTE_DATA |= 0x1<<4;
rt_thread_delay(RT_TICK_PER_SECOND);
/* led off */
//rt_kprintf("led2 off\r\n");
GPIO_PORTE_DATA &= ~(0x1<<4);
rt_thread_delay(RT_TICK_PER_SECOND);
}
}
int rt_application_init()
{
rt_thread_t thread;
/* create led1 thread */
thread = rt_thread_create("led1",
rt_thread_entry_led1, RT_NULL,
512,
20, 5);
if (thread != RT_NULL)
rt_thread_startup(thread);
//------- init led2 thread
rt_thread_init(&thread_led2,
"led2",
rt_thread_entry_led2,
RT_NULL,
&thread_led2_stack[0],
sizeof(thread_led2_stack),10,10);
rt_thread_startup(&thread_led2);
return 0;
}
/*@}*/

140
bsp/sep4020/board.c
View File

@ -1,140 +0,0 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-08-23 Bernard first implementation
*/
#include <rtthread.h>
#include <rthw.h>
#include <sep4020.h>
#include "board.h"
#include "serial.h"
/**
* @addtogroup sep4020
*/
/*@{*/
extern rt_uint32_t rt_hw_get_clock(void);
/* uart0 */
#define UART0 ((struct uartport *)UART0BASE)
struct serial_int_rx uart0_int_rx;
struct serial_device uart0 =
{
UART0,
&uart0_int_rx,
RT_NULL
};
struct rt_device uart0_device;
/**
* This is the timer interrupt service routine.
* @param vector the irq number for timer
*/
void rt_hw_timer_handler(int vector)
{
/* clear interrupt */
TIMER_T1ISCR;
/* increase a tick */
rt_tick_increase();
}
/**
* This is the uart0 interrupt service routine.
* @param vector the irq number for uart0
*/
void rt_serial_handler(int vector)
{
rt_hw_serial_isr(&uart0_device);
}
/**
* This function will handle init uart.
*/
void rt_hw_uart_init(void)
{
rt_uint32_t baud;
rt_uint32_t sysclock;
sysclock = rt_hw_get_clock();
/* caculate baud rate register */
baud = sysclock/16/BR;
/* LCR */
uart0.uart_device->lcr = 0x83;
/* DLBH, IER */
uart0.uart_device->dlbh_ier = (baud>>8)&0xff;;
/* DLBL */
uart0.uart_device->dlbl_rxfifo_txfifo = baud&0xff;
/* LCR */
uart0.uart_device->lcr = 0x03;
/* IER */
uart0.uart_device->dlbh_ier = 0x01;
/* FCR */
uart0.uart_device->iir_fcr = 0x00;
rt_hw_serial_register(&uart0_device, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
&uart0);
/* install uart isr */
INTC_IER |= (1<<INT_UART0);
rt_hw_interrupt_install(INT_UART0, rt_serial_handler, RT_NULL);
rt_hw_interrupt_umask(INT_UART0);
}
/**
* This function will init led on the board
*/
static void rt_hw_board_led_init(void)
{
/* PE3 PE4 PE5 for led */
GPIO_PORTE_SEL |=0x38; /* GPIO */
GPIO_PORTE_DIR &= ~0x38; /* output*/
GPIO_PORTE_DATA &= ~0x38; /* low */
}
/**
* This function will init timer1 for system ticks
*/
static void rt_hw_timer_init(void)
{
TIMER_T1CR = 0x06; /* reload mode and interrupt enable */
TIMER_T1LCR = 0xAFC80; /* 10ms under 72MHz 0xAFC80=720000 */
INTC_IER |= (1<<INT_TIMER1); /* interrupt enable */
rt_hw_interrupt_install(INT_TIMER1, rt_hw_timer_handler, RT_NULL);
rt_hw_interrupt_umask(INT_TIMER1);
TIMER_T1CR |= 0x01; /* enable the timer 1 */
}
/**
* This function will initial sam7x board.
*/
void rt_hw_board_init()
{
/* init hardware uart */
rt_hw_uart_init();
rt_console_set_device("uart0");
/* init led */
rt_hw_board_led_init();
/* init timer for tick */
rt_hw_timer_init();
}
/*@}*/

26
bsp/sep4020/board.h
View File

@ -1,26 +0,0 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-10-08 Bernard add board.h to this bsp
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <rthw.h>
#include <rtthread.h>
#include <sep4020.h>
#define BR 115200 /* Baud Rate */
void rt_hw_board_init(void);
#endif

4139
bsp/sep4020/project.uvopt
View File

File diff suppressed because one or more lines are too long

1007
bsp/sep4020/project.uvproj
View File

File diff suppressed because it is too large Load Diff

150
bsp/sep4020/rtconfig.h
View File

@ -1,150 +0,0 @@
/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 4
/* PRIORITY_MAX*/
#define RT_THREAD_PRIORITY_MAX 32
/* Tick per Second*/
#define RT_TICK_PER_SECOND 100
/* SECTION: RT_DEBUG */
/* Thread Debug*/
/* #define RT_THREAD_DEBUG */
/* Using Hook*/
#define RT_USING_HOOK
/* SECTION: IPC */
/* Using Semaphore*/
#define RT_USING_SEMAPHORE
/* Using Mutex*/
#define RT_USING_MUTEX
/* Using Event*/
#define RT_USING_EVENT
/* Using Faset Event*/
/* #define RT_USING_FASTEVENT */
/* Using MailBox*/
#define RT_USING_MAILBOX
/* Using Message Queue*/
#define RT_USING_MESSAGEQUEUE
/* SECTION: Memory Management */
/* Using Memory Pool Management*/
#define RT_USING_MEMPOOL
/* Using Dynamic Heap Management*/
#define RT_USING_HEAP
/* Using Small MM*/
#define RT_USING_SMALL_MEM
#define RT_MEM_STATS
/* Using SLAB Allocator*/
/* #define RT_USING_SLAB */
/* SECTION: Device System */
/* Using Device System*/
#define RT_USING_DEVICE
#define RT_USING_UART1
#define RT_UART_RX_BUFFER_SIZE 128
/* SECTION: Console options */
/* the buffer size of console*/
#define RT_CONSOLEBUF_SIZE 128
/* SECTION: FinSH shell options */
/* Using FinSH as Shell*/
#define RT_USING_FINSH
/* use symbol table */
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
/* SECTION: a mini libc */
/* Using mini libc library*/
/* #define RT_USING_MINILIBC */
/* SECTION: C++ support */
/* Using C++ support*/
/* #define RT_USING_CPLUSPLUS */
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
/* Using lighweight TCP/IP protocol stack*/
//#define RT_USING_LWIP
/* Trace LwIP protocol*/
/* #define RT_LWIP_DEBUG */
/* LwIP tcp thread option */
#define RT_LWIP_TCPTHREAD_PRIORITY 8
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 32
/* LwIP eth thread option */
#define RT_LWIP_ETHTHREAD_PRIORITY 15
#define RT_LWIP_ETHTHREAD_STACKSIZE 1024
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
/* Enable ICMP protocol*/
#define RT_LWIP_ICMP
/* Enable IGMP protocol*/
#define RT_LWIP_IGMP
/* Enable UDP protocol*/
#define RT_LWIP_UDP
/* Enable TCP protocol*/
#define RT_LWIP_TCP
/* the number of simulatenously active TCP connections*/
#define RT_LWIP_TCP_PCB_NUM 5
/* TCP sender buffer space*/
#define RT_LWIP_TCP_SND_BUF 1500
/* Enable SNMP protocol*/
/* #define RT_LWIP_SNMP */
/* Using DHCP*/
/* #define RT_LWIP_DHCP */
/* ip address of target*/
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
#define RT_LWIP_IPADDR2 1
#define RT_LWIP_IPADDR3 30
/* gateway address of target*/
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 1
#define RT_LWIP_GWADDR3 1
/* mask address of target*/
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
/* SECTION: DFS options */
//#define RT_USING_DFS
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 1
/* the max number of opened files */
#define DFS_FD_MAX 2
/* the max number of cached sector */
#define DFS_CACHE_MAX_NUM 4
#endif

15
bsp/sep4020/rtthread-sep4020-rom.sct
View File

@ -1,15 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_ROM1 0x00000000 0x00200000 { ; load region size_region
ER_ROM1 0x00000000 0x00200000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_RAM1 0x30000000 0x32000000 { ; RW data
.ANY (+RW +ZI)
}
}

15
bsp/sep4020/rtthread-sep4020-sdram.sct
View File

@ -1,15 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_ROM1 0x30000000 0x02000000 { ; load region size_region
ER_ROM1 0x30000000 0x02000000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_RAM1 0x31000000{
.ANY (+RW +ZI)
}
}

637
bsp/sep4020/sep4020.h
View File

@ -1,637 +0,0 @@
/*************************************************************************************
*
* File name: sep4020.h
*
* Change Logs:
* Date Author Notes
* 2010-03-17 zchong first version
**************************************************************************************/
#ifndef __SEP4020_H__
#define __SEP4020_H__
/*************************************
macros for INTC
*************************************/
/*interrupt resources */
#define INTGLOBAL 32
#define INT_RTC 31
#define INT_DMAC 30
#define INT_EMI 29
#define INT_MAC 28
#define INT_TIMER1 27
#define INT_TIMER2 26
#define INT_TIMER3 25
#define INT_UART0 24
#define INT_UART1 23
#define INT_UART2 22
#define INT_UART3 21
#define INT_PWM 20
#define INT_LCDC 19
#define INT_I2S 18
#define INT_SSI 17
#define INT_NOTUSED16 16
#define INT_USB 15
#define INT_SMC0 14
#define INT_SMC1 13
#define INT_SDIO 12
#define INT_EXINT10 11
#define INT_EXINT9 10
#define INT_EXINT8 9
#define INT_EXINT7 8
#define INT_EXINT6 7
#define INT_EXINT5 6
#define INT_EXINT4 5
#define INT_EXINT3 4
#define INT_EXINT2 3
#define INT_EXINT1 2
#define INT_EXINT0 1
#define INT_NOTUSED0 0
/******************************************************************************************
* INTC模块
* 基址: 0x10000000
******************************************************************************************/
#define INTC_IER (*(volatile unsigned *)0x10000000) /* IRQ interrupt enable register */
#define INTC_IMR (*(volatile unsigned *)0x10000008) /* IRQ interrupt mask register */
#define INTC_IFR (*(volatile unsigned *)0x10000010) /* IRQ软件强制中断寄存器 */
#define INTC_IRSR (*(volatile unsigned *)0x10000018) /* IRQ未处理中断状态寄存器 */
#define INTC_ISR (*(volatile unsigned *)0x10000020) /* IRQ中断状态寄存器 */
#define INTC_IMSR (*(volatile unsigned *)0x10000028) /* IRQ屏蔽中断状态寄存器 */
#define INTC_IFSR (*(volatile unsigned *)0x10000030) /* IRQ中断最终状态寄存器 */
#define INTC_FIER (*(volatile unsigned *)0x100000C0) /* FIQ中断允许寄存器 */
#define INTC_FIMR (*(volatile unsigned *)0x100000C4) /* FIQ中断屏蔽寄存器 */
#define INTC_FIFR (*(volatile unsigned *)0x100000C8) /* FIQ软件强制中断寄存器 */
#define INTC_FIRSR (*(volatile unsigned *)0x100000CC) /* FIQ未处理中断状态寄存器 */
#define INTC_FISR (*(volatile unsigned *)0x100000D0) /* FIQ中断状态寄存器 */
#define INTC_FIFSR (*(volatile unsigned *)0x100000D4) /* FIQ中断最终状态寄存器 */
#define INTC_IPLR (*(volatile unsigned *)0x100000D8) /* IRQ中断优先级寄存器 */
#define INTC_ICR1 (*(volatile unsigned *)0x100000DC) /* IRQ内部中断优先级控制寄存器1 */
#define INTC_ICR2 (*(volatile unsigned *)0x100000E0) /* IRQ内部中断优先级控制寄存器2 */
#define INTC_EXICR1 (*(volatile unsigned *)0x100000E4) /* IRQ外部中断优先级控制寄存器1 */
#define INTC_EXICR2 (*(volatile unsigned *)0x100000E8) /* IRQ外部中断优先级控制寄存器2 */
/******************************************************************************************
* PMC模块
* 基址: 0x10001000
******************************************************************************************/
#define PMC_PLTR (*(volatile unsigned *)0x10001000) /* PLL的稳定过渡时间 */
#define PMC_PMCR (*(volatile unsigned *)0x10001004) /* 系统主时钟PLL的控制寄存器 */
#define PMC_PUCR (*(volatile unsigned *)0x10001008) /* USB时钟PLL的控制寄存器 */
#define PMC_PCSR (*(volatile unsigned *)0x1000100C) /* 内部模块时钟源供给的控制寄存器 */
#define PMC_PDSLOW (*(volatile unsigned *)0x10001010) /* SLOW状态下时钟的分频因子 */
#define PMC_PMDR (*(volatile unsigned *)0x10001014) /* 芯片工作模式寄存器 */
#define PMC_RCTR (*(volatile unsigned *)0x10001018) /* Reset控制寄存器 */
#define PMC_CLRWAKUP (*(volatile unsigned *)0x1000101C) /* WakeUp清除寄存器 */
/******************************************************************************************
* RTC模块
* 基址: 0x10002000
******************************************************************************************/
#define RTC_STA_YMD (*(volatile unsigned *)0x10002000) /* 年, 月, 日计数寄存器 */
#define RTC_STA_HMS (*(volatile unsigned *)0x10002004) /* 小时, 分钟, 秒寄存器 */
#define RTC_ALARM_ALL (*(volatile unsigned *)0x10002008) /* 定时月, 日, 时, 分寄存器 */
#define RTC_CTR (*(volatile unsigned *)0x1000200C) /* 控制寄存器 */
#define RTC_INT_EN (*(volatile unsigned *)0x10002010) /* 中断使能寄存器 */
#define RTC_INT_STS (*(volatile unsigned *)0x10002014) /* 中断状态寄存器 */
#define RTC_SAMP (*(volatile unsigned *)0x10002018) /* 采样周期寄存器 */
#define RTC_WD_CNT (*(volatile unsigned *)0x1000201C) /* Watch-Dog计数值寄存器 */
#define RTC_WD_SEV (*(volatile unsigned *)0x10002020) /* Watch-Dog服务寄存器 */
#define RTC_CONFIG_CHECK (*(volatile unsigned *)0x10002024) /* 配置时间确认寄存器 (在配置时间之前先写0xaaaaaaaa) */
#define RTC_SOFTRESET (*(volatile unsigned *)0x10002028) /* 软件复位控制寄存器, 4020中被去掉了 */
#define RTC_KEY0 (*(volatile unsigned *)0x1000202C) /* 密钥寄存器0, 4020中只有这一个寄存器 */
#define RTC_KEY1 (*(volatile unsigned *)0x10002030) /* 密钥寄存器1 */
#define RTC_KEY2 (*(volatile unsigned *)0x10002034) /* 密钥寄存器2 */
#define RTC_KEY3 (*(volatile unsigned *)0x10002038) /* 密钥寄存器3 */
#define RTC_KEY4 (*(volatile unsigned *)0x1000203C) /* 密钥寄存器4 */
#define RTC_KEY5 (*(volatile unsigned *)0x10002040) /* 密钥寄存器5 */
/******************************************************************************************
* TIMER模块
* 基址: 0x10003000
******************************************************************************************/
#define TIMER_T1LCR (*(volatile unsigned *)0x10003000) /* 通道1加载计数寄存器 */
#define TIMER_T1CCR (*(volatile unsigned *)0x10003004) /* 通道1当前计数值寄存器 */
#define TIMER_T1CR (*(volatile unsigned *)0x10003008) /* 通道1控制寄存器 */
#define TIMER_T1ISCR (*(volatile unsigned *)0x1000300C) /* 通道1中断状态清除寄存器 */
#define TIMER_T1IMSR (*(volatile unsigned *)0x10003010) /* 通道1中断屏蔽状态寄存器 */
#define TIMER_T2LCR (*(volatile unsigned *)0x10003020) /* 通道2加载计数寄存器 */
#define TIMER_T2CCR (*(volatile unsigned *)0x10003024) /* 通道2当前计数值寄存器 */
#define TIMER_T2CR (*(volatile unsigned *)0x10003028) /* 通道2控制寄存器 */
#define TIMER_T2ISCR (*(volatile unsigned *)0x1000302C) /* 通道2中断状态清除寄存器 */
#define TIMER_T2IMSR (*(volatile unsigned *)0x10003030) /* 通道2中断屏蔽状态寄存器 */
#define TIMER_T3LCR (*(volatile unsigned *)0x10003040) /* 通道3加载计数寄存器 */
#define TIMER_T3CCR (*(volatile unsigned *)0x10003044) /* 通道3当前计数值寄存器 */
#define TIMER_T3CR (*(volatile unsigned *)0x10003048) /* 通道3控制寄存器 */
#define TIMER_T3ISCR (*(volatile unsigned *)0x1000304C) /* 通道3中断状态清除寄存器 */
#define TIMER_T3IMSR (*(volatile unsigned *)0x10003050) /* 通道3中断屏蔽状态寄存器 */
#define TIMER_T3CAPR (*(volatile unsigned *)0x10003054) /* 通道3捕获寄存器 */
#define TIMER_T4LCR (*(volatile unsigned *)0x10003060) /* 通道4加载计数寄存器 */
#define TIMER_T4CCR (*(volatile unsigned *)0x10003064) /* 通道4当前计数值寄存器 */
#define TIMER_T4CR (*(volatile unsigned *)0x10003068) /* 通道4控制寄存器 */
#define TIMER_T4ISCR (*(volatile unsigned *)0x1000306C) /* 通道4中断状态清除寄存器 */
#define TIMER_T4IMSR (*(volatile unsigned *)0x10003070) /* 通道4中断屏蔽状态寄存器 */
#define TIMER_T4CAPR (*(volatile unsigned *)0x10003074) /* 通道4捕获寄存器 */
#define TIMER_T5LCR (*(volatile unsigned *)0x10003080) /* 通道5加载计数寄存器 */
#define TIMER_T5CCR (*(volatile unsigned *)0x10003084) /* 通道5当前计数值寄存器 */
#define TIMER_T5CR (*(volatile unsigned *)0x10003088) /* 通道5控制寄存器 */
#define TIMER_T5ISCR (*(volatile unsigned *)0x1000308C) /* 通道5中断状态清除寄存器 */
#define TIMER_T5IMSR (*(volatile unsigned *)0x10003090) /* 通道5中断屏蔽状态寄存器 */
#define TIMER_T5CAPR (*(volatile unsigned *)0x10003094) /* 通道5捕获寄存器 */
#define TIMER_T6LCR (*(volatile unsigned *)0x100030A0) /* 通道6加载计数寄存器 */
#define TIMER_T6CCR (*(volatile unsigned *)0x100030A4) /* 通道6当前计数值寄存器 */
#define TIMER_T6CR (*(volatile unsigned *)0x100030A8) /* 通道6控制寄存器 */
#define TIMER_T6ISCR (*(volatile unsigned *)0x100030AC) /* 通道6中断状态清除寄存器 */
#define TIMER_T6IMSR (*(volatile unsigned *)0x100030B0) /* 通道6中断屏蔽状态寄存器 */
#define TIMER_T6CAPR (*(volatile unsigned *)0x100030B4) /* 通道6捕获寄存器 */
#define TIMER_T7LCR (*(volatile unsigned *)0x100030C0) /* 通道7加载计数寄存器 */
#define TIMER_T7CCR (*(volatile unsigned *)0x100030C4) /* 通道7当前计数值寄存器 */
#define TIMER_T7CR (*(volatile unsigned *)0x100030C8) /* 通道7控制寄存器 */
#define TIMER_T7ISCR (*(volatile unsigned *)0x100030CC) /* 通道7中断状态清除寄存器 */
#define TIMER_T7IMSR (*(volatile unsigned *)0x100030D0) /* 通道7中断屏蔽状态寄存器 */
#define TIMER_T8LCR (*(volatile unsigned *)0x100030E0) /* 通道8加载计数寄存器 */
#define TIMER_T8CCR (*(volatile unsigned *)0x100030E4) /* 通道8当前计数值寄存器 */
#define TIMER_T8CR (*(volatile unsigned *)0x100030E8) /* 通道8控制寄存器 */
#define TIMER_T8ISCR (*(volatile unsigned *)0x100030EC) /* 通道8中断状态清除寄存器 */
#define TIMER_T8IMSR (*(volatile unsigned *)0x100030F0) /* 通道8中断屏蔽状态寄存器 */
#define TIMER_T9LCR (*(volatile unsigned *)0x10003100) /* 通道9加载计数寄存器 */
#define TIMER_T9CCR (*(volatile unsigned *)0x10003104) /* 通道9当前计数值寄存器 */
#define TIMER_T9CR (*(volatile unsigned *)0x10003108) /* 通道9控制寄存器 */
#define TIMER_T9ISCR (*(volatile unsigned *)0x1000310C) /* 通道9中断状态清除寄存器 */
#define TIMER_T9IMSR (*(volatile unsigned *)0x10003110) /* 通道9中断屏蔽状态寄存器 */
#define TIMER_T10LCR (*(volatile unsigned *)0x10003120) /* 通道10加载计数寄存器 */
#define TIMER_T10CCR (*(volatile unsigned *)0x10003124) /* 通道10当前计数值寄存器 */
#define TIMER_T10CR (*(volatile unsigned *)0x10003128) /* 通道10控制寄存器 */
#define TIMER_T10ISCR (*(volatile unsigned *)0x1000312C) /* 通道10中断状态清除寄存器 */
#define TIMER_T10IMSR (*(volatile unsigned *)0x10003130) /* 通道10中断屏蔽状态寄存器 */
#define TIMER_TIMSR (*(volatile unsigned *)0x10003140) /* TIMER中断屏蔽状态寄存器 */
#define TIMER_TISCR (*(volatile unsigned *)0x10003144) /* TIMER中断状态清除寄存器 */
#define TIMER_TISR (*(volatile unsigned *)0x10003148) /* TIMER中断状态寄存器 */
/******************************************************************************************
* PWM模块
* 基址: 0x10004000
******************************************************************************************/
#define PWM1_CTRL (*(volatile unsigned *)0x10004000) /* PWM1控制寄存器 */
#define PWM1_DIV (*(volatile unsigned *)0x10004004) /* PWM1分频寄存器 */
#define PWM1_PERIOD (*(volatile unsigned *)0x10004008) /* PWM1周期寄存器 */
#define PWM1_DATA (*(volatile unsigned *)0x1000400C) /* PWM1数据寄存器 */
#define PWM1_CNT (*(volatile unsigned *)0x10004010) /* PWM1计数寄存器 */
#define PWM1_STATUS (*(volatile unsigned *)0x10004014) /* PWM1状态寄存器 */
#define PWM2_CTRL (*(volatile unsigned *)0x10004020) /* PWM2控制寄存器 */
#define PWM2_DIV (*(volatile unsigned *)0x10004024) /* PWM2分频寄存器 */
#define PWM2_PERIOD (*(volatile unsigned *)0x10004028) /* PWM2周期寄存器 */
#define PWM2_DATA (*(volatile unsigned *)0x1000402C) /* PWM2数据寄存器 */
#define PWM2_CNT (*(volatile unsigned *)0x10004030) /* PWM2计数寄存器 */
#define PWM2_STATUS (*(volatile unsigned *)0x10004034) /* PWM2状态寄存器 */
#define PWM3_CTRL (*(volatile unsigned *)0x10004040) /* PWM3控制寄存器 */
#define PWM3_DIV (*(volatile unsigned *)0x10004044) /* PWM3分频寄存器 */
#define PWM3_PERIOD (*(volatile unsigned *)0x10004048) /* PWM3周期寄存器 */
#define PWM3_DATA (*(volatile unsigned *)0x1000404C) /* PWM3数据寄存器 */
#define PWM3_CNT (*(volatile unsigned *)0x10004050) /* PWM3计数寄存器 */
#define PWM3_STATUS (*(volatile unsigned *)0x10004054) /* PWM3状态寄存器 */
#define PWM4_CTRL (*(volatile unsigned *)0x10004060) /* PWM4控制寄存器 */
#define PWM4_DIV (*(volatile unsigned *)0x10004064) /* PWM4分频寄存器 */
#define PWM4_PERIOD (*(volatile unsigned *)0x10004068) /* PWM4周期寄存器 */
#define PWM4_DATA (*(volatile unsigned *)0x1000406C) /* PWM4数据寄存器 */
#define PWM4_CNT (*(volatile unsigned *)0x10004070) /* PWM4计数寄存器 */
#define PWM4_STATUS (*(volatile unsigned *)0x10004074) /* PWM4状态寄存器 */
#define PWM_INTMASK (*(volatile unsigned *)0x10004080) /* PWM中断屏蔽寄存器 */
#define PWM_INT (*(volatile unsigned *)0x10004084) /* PWM中断寄存器 */
#define PWM_ENABLE (*(volatile unsigned *)0x10004088) /* PWM使能寄存器 */
/******************************************************************************************
* UART0模块
* 基址: 0x10005000
******************************************************************************************/
#define UART0BASE ((volatile unsigned *)0x10005000)
#define UART0_DLBL (*(volatile unsigned char*)0x10005000) /* 波特率设置低八位寄存器 */
#define UART0_RXFIFO (*(volatile unsigned char*)0x10005000) /* 接收FIFO */
#define UART0_TXFIFO (*(volatile unsigned char*)0x10005000) /* 发送FIFO */
#define UART0_DLBH (*(volatile unsigned char*)0x10005004) /* 波特率设置高八位寄存器 */
#define UART0_IER (*(volatile unsigned char*)0x10005004) /* 中断使能寄存器 */
#define UART0_IIR (*(volatile unsigned *)0x10005008) /* 中断识别寄存器 */
#define UART0_FCR (*(volatile unsigned *)0x10005008) /* FIFO控制寄存器 */
#define UART0_LCR (*(volatile unsigned *)0x1000500C) /* 行控制寄存器 */
#define UART0_MCR (*(volatile unsigned *)0x10005010) /* Modem控制寄存器 */
#define UART0_LSR (*(volatile unsigned *)0x10005014) /* 行状态寄存器 */
#define UART0_MSR (*(volatile unsigned *)0x10005018) /* Modem状态寄存器 */
/******************************************************************************************
* UART1模块
* 基址: 0x10006000
******************************************************************************************/
#define UART1BASE ((volatile unsigned *)0x10006000)
#define UART1_DLBL (*(volatile unsigned *)0x10006000) /* 波特率设置低八位寄存器 */
#define UART1_RXFIFO (*(volatile unsigned *)0x10006000) /* 接收FIFO */
#define UART1_TXFIFO (*(volatile unsigned *)0x10006000) /* 发送FIFO */
#define UART1_DLBH (*(volatile unsigned *)0x10006004) /* 波特率设置高八位寄存器 */
#define UART1_IER (*(volatile unsigned *)0x10006004) /* 中断使能寄存器 */
#define UART1_IIR (*(volatile unsigned *)0x10006008) /* 中断识别寄存器 */
#define UART1_FCR (*(volatile unsigned *)0x10006008) /* FIFO控制寄存器 */
#define UART1_LCR (*(volatile unsigned *)0x1000600C) /* 行控制寄存器 */
#define UART1_MCR (*(volatile unsigned *)0x10006010) /* Modem控制寄存器 */
#define UART1_LSR (*(volatile unsigned *)0x10006014) /* 行状态寄存器 */
#define UART1_MSR (*(volatile unsigned *)0x10006018) /* Modem状态寄存器 */
/******************************************************************************************
* UART2模块
* 基址: 0x10007000
******************************************************************************************/
#define UART2BASE ((volatile unsigned *)0x10007000)
#define UART2_DLBL (*(volatile unsigned *)0x10007000) /* 波特率设置低八位寄存器 */
#define UART2_RXFIFO (*(volatile unsigned *)0x10007000) /* 接收FIFO */
#define UART2_TXFIFO (*(volatile unsigned *)0x10007000) /* 发送FIFO */
#define UART2_DLBH (*(volatile unsigned *)0x10007004) /* 波特率设置高八位寄存器 */
#define UART2_IER (*(volatile unsigned *)0x10007004) /* 中断使能寄存器 */
#define UART2_IIR (*(volatile unsigned *)0x10007008) /* 中断识别寄存器 */
#define UART2_FCR (*(volatile unsigned *)0x10007008) /* FIFO控制寄存器 */
#define UART2_LCR (*(volatile unsigned *)0x1000700C) /* 行控制寄存器 */
#define UART2_MCR (*(volatile unsigned *)0x10007010) /* Modem控制寄存器 */
#define UART2_LSR (*(volatile unsigned *)0x10007014) /* 行状态寄存器 */
#define UART2_MSR (*(volatile unsigned *)0x10007018) /* Modem状态寄存器 */
/******************************************************************************************
* UART3模块
* 基址: 0x10008000
******************************************************************************************/
#define UART3BASE ((volatile unsigned *)0x10008000)
#define UART3_DLBL (*(volatile unsigned *)0x10008000) /* 波特率设置低八位寄存器 */
#define UART3_RXFIFO (*(volatile unsigned *)0x10008000) /* 接收FIFO */
#define UART3_TXFIFO (*(volatile unsigned *)0x10008000) /* 发送FIFO */
#define UART3_DLBH (*(volatile unsigned *)0x10008004) /* 波特率设置高八位寄存器 */
#define UART3_IER (*(volatile unsigned *)0x10008004) /* 中断使能寄存器 */
#define UART3_IIR (*(volatile unsigned *)0x10008008) /* 中断识别寄存器 */
#define UART3_FCR (*(volatile unsigned *)0x10008008) /* FIFO控制寄存器 */
#define UART3_LCR (*(volatile unsigned *)0x1000800C) /* 行控制寄存器 */
#define UART3_MCR (*(volatile unsigned *)0x10008010) /* Modem控制寄存器 */
#define UART3_LSR (*(volatile unsigned *)0x10008014) /* 行状态寄存器 */
#define UART3_MSR (*(volatile unsigned *)0x10008018) /* Modem状态寄存器 */
/******************************************************************************************
* SSI模块
* 基址: 0x10009000
******************************************************************************************/
#define SSI_CONTROL0 (*(volatile unsigned *)0x10009000) /* 控制寄存器0 */
#define SSI_CONTROL1 (*(volatile unsigned *)0x10009004) /* 控制寄存器1 */
#define SSI_SSIENR (*(volatile unsigned *)0x10009008) /* SSI使能寄存器 */
#define SSI_MWCR (*(volatile unsigned *)0x1000900C) /* Microwire控制寄存器 */
#define SSI_SER (*(volatile unsigned *)0x10009010) /* 从设备使能寄存器 */
#define SSI_BAUDR (*(volatile unsigned *)0x10009014) /* 波特率设置寄存器 */
#define SSI_TXFTLR (*(volatile unsigned *)0x10009018) /* 发送FIFO阈值寄存器 */
#define SSI_RXFTLR (*(volatile unsigned *)0x1000901C) /* 接收FIFO阈值寄存器 */
#define SSI_TXFLR (*(volatile unsigned *)0x10009020) /* 发送FIFO状态寄存器 */
#define SSI_RXFLR (*(volatile unsigned *)0x10009024) /* 接收FIFO状态寄存器 */
#define SSI_SR (*(volatile unsigned *)0x10009028) /* 状态寄存器 */
#define SSI_IMR (*(volatile unsigned *)0x1000902C) /* 中断屏蔽寄存器 */
#define SSI_ISR (*(volatile unsigned *)0x10009030) /* 中断最终状态寄存器 */
#define SSI_RISR (*(volatile unsigned *)0x10009034) /* 中断原始状态寄存器 */
#define SSI_TXOICR (*(volatile unsigned *)0x10009038) /* 发送FIFO上溢中断清除寄存器 */
#define SSI_RXOICR (*(volatile unsigned *)0x1000903C) /* 接收FIFO上溢中断清除寄存器 */
#define SSI_RXUICR (*(volatile unsigned *)0x10009040) /* 接收FIFO下溢中断清除寄存器 */
#define SSI_ICR (*(volatile unsigned *)0x1000902C) /* 中断清除寄存器 */
#define SSI_DMACR (*(volatile unsigned *)0x1000904C) /* DMA控制寄存器 */
#define SSI_DMATDLR (*(volatile unsigned *)0x10009050) /* DMA发送状态寄存器 */
#define SSI_DMARDLR (*(volatile unsigned *)0x10009054) /* DMA接收状态寄存器 */
#define SSI_DR (*(volatile unsigned *)0x10009060) /* 数据寄存器 */
/******************************************************************************************
* I2S模块
* 基址: 0x1000A000
******************************************************************************************/
#define I2S_CTRL (*(volatile unsigned *)0x1000A000) /* I2S控制寄存器 */
#define I2S_DATA (*(volatile unsigned *)0x1000A004) /* I2S数据寄存器 */
#define I2S_INT (*(volatile unsigned *)0x1000A008) /* I2S中断寄存器 */
#define I2S_STATUS (*(volatile unsigned *)0x1000A00C) /* I2S状态寄存器 */
/******************************************************************************************
* GPIO模块
* 基址: 0x1000F000
******************************************************************************************/
#define GPIO_DBCLK_DIV (*(volatile unsigned *)0x1000F000) /* 去毛刺采用时钟分频比配置寄存器 */
#define GPIO_PORTA_DIR (*(volatile unsigned *)0x1000F004) /* A组端口输入输出方向配置寄存器 */
#define GPIO_PORTA_SEL (*(volatile unsigned *)0x1000F008) /* A组端口通用用途选择配置寄存器 */
#define GPIO_PORTA_INCTL (*(volatile unsigned *)0x1000F00C) /* A组端口通用用途输入时类型配置寄存器 */
#define GPIO_PORTA_INTRCTL (*(volatile unsigned *)0x1000F010) /* A组端口中断触发类型配置寄存器 */
#define GPIO_PORTA_INTRCLR (*(volatile unsigned *)0x1000F014) /* A组端口通用用途中断清除配置寄存器 */
#define GPIO_PORTA_DATA (*(volatile unsigned *)0x1000F018) /* A组端口通用用途数据配置寄存器 */
#define GPIO_PORTB_DIR (*(volatile unsigned *)0x1000F01C) /* B组端口输入输出方向配置寄存器 */
#define GPIO_PORTB_SEL (*(volatile unsigned *)0x1000F020) /* B组端口通用用途选择配置寄存器 */
#define GPIO_PORTB_DATA (*(volatile unsigned *)0x1000F024) /* B组端口通用用途数据配置寄存器 */
#define GPIO_PORTC_DIR (*(volatile unsigned *)0x1000F028) /* C组端口输入输出方向配置寄存器 */
#define GPIO_PORTC_SEL (*(volatile unsigned *)0x1000F02C) /* C组端口通用用途选择配置寄存器 */
#define GPIO_PORTC_DATA (*(volatile unsigned *)0x1000F030) /* C组端口通用用途数据配置寄存器 */
#define GPIO_PORTD_DIR (*(volatile unsigned *)0x1000F034) /* D组端口输入输出方向配置寄存器 */
#define GPIO_PORTD_SEL (*(volatile unsigned *)0x1000F038) /* D组端口通用用途选择配置寄存器 */
#define GPIO_PORTD_SPECII (*(volatile unsigned *)0x1000F03C) /* D组端口专用用途2选择配置寄存器 */
#define GPIO_PORTD_DATA (*(volatile unsigned *)0x1000F040) /* D组端口通用用途数据配置寄存器 */
#define GPIO_PORTE_DIR (*(volatile unsigned *)0x1000F044) /* E组端口输入输出方向配置寄存器 */
#define GPIO_PORTE_SEL (*(volatile unsigned *)0x1000F048) /* E组端口通用用途选择配置寄存器 */
#define GPIO_PORTE_DATA (*(volatile unsigned *)0x1000F04C) /* E组端口通用用途数据配置寄存器 */
#define GPIO_PORTF_DIR (*(volatile unsigned *)0x1000F050) /* F组端口输入输出方向配置寄存器 */
#define GPIO_PORTF_SEL (*(volatile unsigned *)0x1000F054) /* F组端口通用用途选择配置寄存器 */
#define GPIO_PORTF_INCTL (*(volatile unsigned *)0x1000F058) /* F组端口通用用途输入时类型配置寄存器 */
#define GPIO_PORTF_INTRCTL (*(volatile unsigned *)0x1000F05C) /* F组端口中断触发类型配置寄存器 */
#define GPIO_PORTF_INTRCLR (*(volatile unsigned *)0x1000F060) /* F组端口通用用途中断清除配置寄存器 */
#define GPIO_PORTF_DATA (*(volatile unsigned *)0x1000F064) /* F组端口通用用途数据配置寄存器 */
#define GPIO_PORTG_DIR (*(volatile unsigned *)0x1000F068) /* G组端口输入输出方向配置寄存器 */
#define GPIO_PORTG_SEL (*(volatile unsigned *)0x1000F06C) /* G组端口通用用途选择配置寄存器 */
#define GPIO_PORTG_DATA (*(volatile unsigned *)0x1000F070) /* G组端口通用用途数据配置寄存器 */
#define GPIO_PORTH_DIR (*(volatile unsigned *)0x1000F074) /* H组端口输入输出方向配置寄存器 */
#define GPIO_PORTH_SEL (*(volatile unsigned *)0x1000F078) /* H组端口通用用途选择配置寄存器 */
#define GPIO_PORTH_DATA (*(volatile unsigned *)0x1000F07c) /* H组端口通用用途数据配置寄存器 */
#define GPIO_PORTI_DIR (*(volatile unsigned *)0x1000F080) /* I组端口输入输出方向配置寄存器 */
#define GPIO_PORTI_SEL (*(volatile unsigned *)0x1000F084) /* I组端口通用用途选择配置寄存器 */
#define GPIO_PORTI_DATA (*(volatile unsigned *)0x1000F088) /* I组端口通用用途数据配置寄存器 */
/******************************************************************************************
* SMC0模块
* 基址: 0x1000C000
******************************************************************************************/
#define SMC0_CTRL (*(volatile unsigned *)0x1000C000) /* SMC0控制寄存器 */
#define SMC0_INT (*(volatile unsigned *)0x1000C004) /* SMC0中断寄存器 */
#define SMC0_FD (*(volatile unsigned *)0x1000C008) /* SMC0基本单元时间寄存器 */
#define SMC0_CT (*(volatile unsigned *)0x1000C00C) /* SMC0字符传输时间寄存器 */
#define SMC0_BT (*(volatile unsigned *)0x1000C010) /* SMC0块传输时间寄存器 */
/******************************************************************************************
* SMC1模块
* 基址: 0x1000D000
******************************************************************************************/
#define SMC1_CTRL (*(volatile unsigned *)0x1000D000) /* SMC1控制寄存器 */
#define SMC1_INT (*(volatile unsigned *)0x1000D004) /* SMC1中断寄存器 */
#define SMC1_FD (*(volatile unsigned *)0x1000D008) /* SMC1基本单元时间寄存器 */
#define SMC1_CT (*(volatile unsigned *)0x1000D00C) /* SMC1字符传输时间寄存器 */
#define SMC1_BT (*(volatile unsigned *)0x1000D010) /* SMC1块传输时间寄存器 */
/******************************************************************************************
* USBD模块
* 基址: 0x1000E000
******************************************************************************************/
#define USBD_PROTOCOLINTR (*(volatile unsigned *)0x1000E000) /* USB协议中断寄存器 */
#define USBD_INTRMASK (*(volatile unsigned *)0x1000E004) /* USB中断屏蔽寄存器 */
#define USBD_INTRCTRL (*(volatile unsigned *)0x1000E008) /* USB中断类型控制寄存器 */
#define USBD_EPINFO (*(volatile unsigned *)0x1000E00C) /* USB活动端点状态寄存器 */
#define USBD_BCONFIGURATIONVALUE (*(volatile unsigned *)0x1000E010) /* SET_CCONFIGURATION记录 */
#define USBD_BMATTRIBUTES (*(volatile unsigned *)0x1000E014) /* 当前配置属性寄存器 */
#define USBD_DEVSPEED (*(volatile unsigned *)0x1000E018) /* 当前设备工作速度寄存器 */
#define USBD_FRAMENUMBER (*(volatile unsigned *)0x1000E01C) /* 记录当前SOF包内的帧号 */
#define USBD_EPTRANSACTIONS0 (*(volatile unsigned *)0x1000E020) /* 记录下次要求的传输次数 */
#define USBD_EPTRANSACTIONS1 (*(volatile unsigned *)0x1000E024) /* 记录下次要求的传输次数 */
#define USBD_APPIFUPDATE (*(volatile unsigned *)0x1000E028) /* 接口号快速更新寄存器 */
#define USBD_CFGINTERFACE0 (*(volatile unsigned *)0x1000E02c) /* 记录接口的值 */
#define USBD_CFGINTERFACE1 (*(volatile unsigned *)0x1000E030) /* 记录接口的值 */
#define USBD_CFGINTERFACE2 (*(volatile unsigned *)0x1000E034) /* 记录接口的值 */
#define USBD_CFGINTERFACE3 (*(volatile unsigned *)0x1000E038) /* 记录接口的值 */
#define USBD_CFGINTERFACE4 (*(volatile unsigned *)0x1000E03c) /* 记录接口的值 */
#define USBD_CFGINTERFACE5 (*(volatile unsigned *)0x1000E040) /* 记录接口的值 */
#define USBD_CFGINTERFACE6 (*(volatile unsigned *)0x1000E044) /* 记录接口的值 */
#define USBD_CFGINTERFACE7 (*(volatile unsigned *)0x1000E048) /* 记录接口的值 */
#define USBD_CFGINTERFACE8 (*(volatile unsigned *)0x1000E04c) /* 记录接口的值 */
#define USBD_CFGINTERFACE9 (*(volatile unsigned *)0x1000E050) /* 记录接口的值 */
#define USBD_CFGINTERFACE10 (*(volatile unsigned *)0x1000E054) /* 记录接口的值 */
#define USBD_CFGINTERFACE11 (*(volatile unsigned *)0x1000E058) /* 记录接口的值 */
#define USBD_CFGINTERFACE12 (*(volatile unsigned *)0x1000E05c) /* 记录接口的值 */
#define USBD_CFGINTERFACE13 (*(volatile unsigned *)0x1000E060) /* 记录接口的值 */
#define USBD_CFGINTERFACE14 (*(volatile unsigned *)0x1000E064) /* 记录接口的值 */
#define USBD_CFGINTERFACE15 (*(volatile unsigned *)0x1000E068) /* 记录接口的值 */
#define USBD_CFGINTERFACE16 (*(volatile unsigned *)0x1000E06c) /* 记录接口的值 */
#define USBD_CFGINTERFACE17 (*(volatile unsigned *)0x1000E070) /* 记录接口的值 */
#define USBD_CFGINTERFACE18 (*(volatile unsigned *)0x1000E074) /* 记录接口的值 */
#define USBD_CFGINTERFACE19 (*(volatile unsigned *)0x1000E078) /* 记录接口的值 */
#define USBD_CFGINTERFACE20 (*(volatile unsigned *)0x1000E07c) /* 记录接口的值 */
#define USBD_CFGINTERFACE21 (*(volatile unsigned *)0x1000E080) /* 记录接口的值 */
#define USBD_CFGINTERFACE22 (*(volatile unsigned *)0x1000E084) /* 记录接口的值 */
#define USBD_CFGINTERFACE23 (*(volatile unsigned *)0x1000E088) /* 记录接口的值 */
#define USBD_CFGINTERFACE24 (*(volatile unsigned *)0x1000E08c) /* 记录接口的值 */
#define USBD_CFGINTERFACE25 (*(volatile unsigned *)0x1000E090) /* 记录接口的值 */
#define USBD_CFGINTERFACE26 (*(volatile unsigned *)0x1000E094) /* 记录接口的值 */
#define USBD_CFGINTERFACE27 (*(volatile unsigned *)0x1000E098) /* 记录接口的值 */
#define USBD_CFGINTERFACE28 (*(volatile unsigned *)0x1000E09c) /* 记录接口的值 */
#define USBD_CFGINTERFACE29 (*(volatile unsigned *)0x1000E0a0) /* 记录接口的值 */
#define USBD_CFGINTERFACE30 (*(volatile unsigned *)0x1000E0a4) /* 记录接口的值 */
#define USBD_CFGINTERFACE31 (*(volatile unsigned *)0x1000E0a8) /* 记录接口的值 */
#define USBD_PKTPASSEDCTRL (*(volatile unsigned *)0x1000E0ac) /* 记录成功接收的包数 */
#define USBD_PKTDROPPEDCTRL (*(volatile unsigned *)0x1000E0b0) /* 记录丢失的包数 */
#define USBD_CRCERRCTRL (*(volatile unsigned *)0x1000E0b4) /* 记录CRC错误的包数 */
#define USBD_BITSTUFFERRCTRL (*(volatile unsigned *)0x1000E0b8) /* 记录位填充错误的包数 */
#define USBD_PIDERRCTRL (*(volatile unsigned *)0x1000E0bc) /* 记录PID错误的包数 */
#define USBD_FRAMINGERRCTL (*(volatile unsigned *)0x1000E0c0) /* 记录有SYNC和EOP的包数 */
#define USBD_TXPKTCTRL (*(volatile unsigned *)0x1000E0c4) /* 记录发送包的数量 */
#define USBD_STATCTRLOV (*(volatile unsigned *)0x1000E0c8) /* 记录统计寄存器溢出情况 */
#define USBD_TXLENGTH (*(volatile unsigned *)0x1000E0cc) /* 记录每次IN传输事务包长度 */
#define USBD_RXLENGTH (*(volatile unsigned *)0x1000E0d0) /* 记录OUT传输事务包长度 */
#define USBD_RESUME (*(volatile unsigned *)0x1000E0d4) /* USB唤醒寄存器 */
#define USBD_READFLAG (*(volatile unsigned *)0x1000E0d8) /* 读异步状态寄存器标志 */
#define USBD_RECEIVETYPE (*(volatile unsigned *)0x1000E0dc) /* 传输状态寄存器 */
#define USBD_APPLOCK (*(volatile unsigned *)0x1000E0e0) /* 锁信号寄存器 */
#define USBD_EP0OUTADDR (*(volatile unsigned *)0x1000E100) /* 端点0端点号和方向 */
#define USBD_EP0OUTBMATTR (*(volatile unsigned *)0x1000E104) /* 端点0类型寄存器 */
#define USBD_EP0OUTMAXPKTSIZE (*(volatile unsigned *)0x1000E108) /* 端点0最大包尺寸寄存器 */
#define USBD_EP0OUTIFNUM (*(volatile unsigned *)0x1000E10c) /* 端点0接口号寄存器 */
#define USBD_EP0OUTSTAT (*(volatile unsigned *)0x1000E110) /* 端点0状态寄存器 */
#define USBD_EP0OUTBMREQTYPE (*(volatile unsigned *)0x1000E114) /* 端点0 SETUP事务请求类 */
#define USBD_EP0OUTBREQUEST (*(volatile unsigned *)0x1000E118) /* 端点0 SETUP事务请求内容 */
#define USBD_EP0OUTWVALUE (*(volatile unsigned *)0x1000E11c) /* 端点0 SETUP事务请求值 */
#define USBD_EP0OUTWINDEX (*(volatile unsigned *)0x1000E120) /* 端点0 SETUP事务请求索引 */
#define USBD_EP0OUTWLENGTH (*(volatile unsigned *)0x1000E120) /* 端点0 SETUP事务请求长度 */
#define USBD_EP0OUTSYNCHFRAME (*(volatile unsigned *)0x1000E128) /* 端点0同步包帧号 */
#define USBD_EP1OUTADDR (*(volatile unsigned *)0x1000E12c) /* 端点1输出端点号和方向 */
#define USBD_EP1OUTBMATTR (*(volatile unsigned *)0x1000E130) /* 端点1输出类型寄存器 */
#define USBD_EP1OUTMAXPKTSIZE (*(volatile unsigned *)0x1000E134) /* 端点1输出最大包尺寸寄存器 */
#define USBD_EP1OUTIFNUM (*(volatile unsigned *)0x1000E138) /* 端点1输出接口号寄存器 */
#define USBD_EP1OUTSTAT (*(volatile unsigned *)0x1000E13c) /* 端点1输出状态寄存器 */
#define USBD_EP1OUTBMREQTYPE (*(volatile unsigned *)0x1000E140) /* 端点1输出SETUP事务请求类型 */
#define USBD_EP1OUTBREQUEST (*(volatile unsigned *)0x1000E144) /* 端点1输出SETUP事务请求内容 */
#define USBD_EP1OUTWVALUE (*(volatile unsigned *)0x1000E148) /* 端点1输出SETUP事务请求值 */
#define USBD_EP1OUTWINDX (*(volatile unsigned *)0x1000E14c) /* 端点1输出SETUP事务请求索引 */
#define USBD_EP1OUTWLENGH (*(volatile unsigned *)0x1000E150) /* 端点1输出SETUP事务请求域长度 */
#define USBD_EP1OUTSYNCHFRAME (*(volatile unsigned *)0x1000E154) /* 端点1输出同步包帧号 */
#define USBD_EP1INADDR (*(volatile unsigned *)0x1000E158) /* 端点1输入端点号和方向 */
#define USBD_EP1INBMATTR (*(volatile unsigned *)0x1000E15c) /* 端点1输入类型寄存器 */
#define USBD_EP1INMAXPKTSIZE (*(volatile unsigned *)0x1000E160) /* 端点1输入最大包尺寸寄存器 */
#define USBD_EP1INIFNUM (*(volatile unsigned *)0x1000E164) /* 端点1输入接口号寄存器 */
#define USBD_EP1INSTAT (*(volatile unsigned *)0x1000E168) /* 端点1输入状态寄存器 */
#define USBD_EP1INBMREQTYPE (*(volatile unsigned *)0x1000E16c) /* 端点1输入SETUP事务请求类型 */
#define USBD_EP1INBREQUEST (*(volatile unsigned *)0x1000E170) /* 端点1输入SETUP事务请求内容 */
#define USBD_EP1INWVALUE (*(volatile unsigned *)0x1000E174) /* 端点1输入SETUP事务请求值 */
#define USBD_EP1INWINDEX (*(volatile unsigned *)0x1000E178) /* 端点1输入SETUP事务请求索引 */
#define USBD_EP1INWLENGTH (*(volatile unsigned *)0x1000E17c) /* 端点1输入SETUP事务请求域长度 */
#define USBD_EP1INSYNCHFRAME (*(volatile unsigned *)0x1000E180) /* 端点1输入同步包帧号 */
#define USBD_EP2OUTADDR (*(volatile unsigned *)0x1000E184) /* 端点2输出端点号和方向 */
#define USBD_EP2OUTBMATTR (*(volatile unsigned *)0x1000E188) /* 端点2输出类型寄存器 */
#define USBD_EP2OUTMAXPKTSIZE (*(volatile unsigned *)0x1000E18c) /* 端点2输出最大包尺寸寄存器 */
#define USBD_EP2OUTIFNUM (*(volatile unsigned *)0x1000E190) /* 端点2输出接口号寄存器 */
#define USBD_EP2OUTSTAT (*(volatile unsigned *)0x1000E194) /* 端点2输出状态寄存器 */
#define USBD_EP2OUTBMREQTYPE (*(volatile unsigned *)0x1000E198) /* 端点2输出SETUP事务请求类型 */
#define USBD_EP2OUTBREQUEST (*(volatile unsigned *)0x1000E19c) /* 端点2输出SETUP事务请求内容 */
#define USBD_EP2OUTWVALUE (*(volatile unsigned *)0x1000E1a0) /* 端点2输出SETUP事务请求值 */
#define USBD_EP2OUTWINDEX (*(volatile unsigned *)0x1000E1a4) /* 端点2输出SETUP事务请求索引 */
#define USBD_EP2OUTWLENGTH (*(volatile unsigned *)0x1000E1a8) /* 端点2输出SETUP事务请求域长度 */
#define USBD_EP2OUTSYNCHFRAME (*(volatile unsigned *)0x1000E1ac) /* 端点2输出同步包帧号 */
#define USBD_EP2INADDR (*(volatile unsigned *)0x1000E1b0) /* 端点2输入端点号和方向 */
#define USBD_EP2INBMATTR (*(volatile unsigned *)0x1000E1b4) /* 端点2输入类型寄存器 */
#define USBD_EP2INMAXPKTSIZE (*(volatile unsigned *)0x1000E1b8) /* 端点2输入最大包尺寸寄存器 */
#define USBD_EP2INIFNUM (*(volatile unsigned *)0x1000E1bc) /* 端点2输入接口号寄存器 */
#define USBD_EP2INSTAT (*(volatile unsigned *)0x1000E1c0) /* 端点2输入状态寄存器 */
#define USBD_EP2INBMREQTYPE (*(volatile unsigned *)0x1000E1c4) /* 端点2输入SETUP事务请求类型 */
#define USBD_EP2INBREQUEST (*(volatile unsigned *)0x1000E1c8) /* 端点2输入SETUP事务请求内容 */
#define USBD_EP2INWVALUE (*(volatile unsigned *)0x1000E1cc) /* 端点2输入SETUP事务请求值 */
#define USBD_EP2INWINDEX (*(volatile unsigned *)0x1000E1d0) /* 端点2输入SETUP事务请求索引 */
#define USBD_EP2INWLENGTH (*(volatile unsigned *)0x1000E1d4) /* 端点2输入SETUP事务请求域长度 */
#define USBD_EP2INSYNCHFRAME (*(volatile unsigned *)0x1000E1d8) /* 端点2输入同步包帧号 */
#define USBD_RXFIFO (*(volatile unsigned *)0x1000E200) /* 接受FIFO */
#define USBD_TXFIFO (*(volatile unsigned *)0x1000E300) /* 发送FIFO */
/******************************************************************************************
* EMI模块
* 基址: 0x11000000
******************************************************************************************/
#define EMI_CSACONF (*(volatile unsigned *)0x11000000) /* CSA参数配置寄存器 */
#define EMI_CSBCONF (*(volatile unsigned *)0x11000004) /* CSB参数配置寄存器 */
#define EMI_CSCCONF (*(volatile unsigned *)0x11000008) /* CSC参数配置寄存器 */
#define EMI_CSDCONF (*(volatile unsigned *)0x1100000c) /* CSD参数配置寄存器 */
#define EMI_CSECONF (*(volatile unsigned *)0x11000010) /* CSE参数配置寄存器 */
#define EMI_CSFCONF (*(volatile unsigned *)0x11000014) /* CSF参数配置寄存器 */
#define EMI_SDCONF1 (*(volatile unsigned *)0x11000018) /* SDRAM时序配置寄存器1 */
#define EMI_SDCONF2 (*(volatile unsigned *)0x1100001c) /* SDRAM时序配置寄存器2, SDRAM初始化用到的配置信息 */
#define EMI_REMAPCONF (*(volatile unsigned *)0x11000020) /* 片选空间及地址映射REMAP配置寄存器 */
#define EMI_NAND_ADDR1 (*(volatile unsigned *)0x11000100) /* NAND FLASH的地址寄存器1 */
#define EMI_NAND_COM (*(volatile unsigned *)0x11000104) /* NAND FLASH的控制字寄存器 */
#define EMI_NAND_STA (*(volatile unsigned *)0x1100010c) /* NAND FLASH的状态寄存器 */
#define EMI_ERR_ADDR1 (*(volatile unsigned *)0x11000110) /* 读操作出错的地址寄存器1 */
#define EMI_ERR_ADDR2 (*(volatile unsigned *)0x11000114) /* 读操作出错的地址寄存器2 */
#define EMI_NAND_CONF1 (*(volatile unsigned *)0x11000118) /* NAND FLASH的配置器存器1 */
#define EMI_NAND_INTR (*(volatile unsigned *)0x1100011c) /* NAND FLASH中断寄存器 */
#define EMI_NAND_ECC (*(volatile unsigned *)0x11000120) /* ECC校验完成寄存器 */
#define EMI_NAND_IDLE (*(volatile unsigned *)0x11000124) /* NAND FLASH空闲寄存器 */
#define EMI_NAND_CONF2 (*(volatile unsigned *)0x11000128) /* NAND FLASH的配置器存器2 */
#define EMI_NAND_ADDR2 (*(volatile unsigned *)0x1100012c) /* NAND FLASH的地址寄存器2 */
#define EMI_NAND_ID (*(volatile unsigned *)0x11000130) /* NAND FLASH的ID寄存器*/
#define EMI_NAND_DATA (*(volatile unsigned *)0x11000200) /* NAND FLASH的数据寄存器 */
/******************************************************************************************
* DMAC模块
* 基址: 0x11001000
******************************************************************************************/
#define DMAC_INTSTATUS (*(volatile unsigned *)0x11001020) /* DAMC中断状态寄存器。 */
#define DMAC_INTTCSTATUS (*(volatile unsigned *)0x11001050) /* DMAC传输完成中断状态寄存器 */
#define DMAC_INTTCCLEAR (*(volatile unsigned *)0x11001060) /* DMAC传输完成中断状态清除寄存器 */
#define DMAC_INTERRORSTATUS (*(volatile unsigned *)0x11001080) /* DMAC传输错误中断状态寄存器 */
#define DMAC_INTERRCLR (*(volatile unsigned *)0x11001090) /* DMAC传输错误中断状态清除寄存器 */
#define DMAC_ENBLDCHNS (*(volatile unsigned *)0x110010b0) /* DMAC通道使能状态寄存器 */
#define DMAC_C0SRCADDR (*(volatile unsigned *)0x11001000) /* DMAC道0源地址寄存器 */
#define DMAC_C0DESTADD (*(volatile unsigned *)0x11001004) /* DMAC道0目的地址寄存器 */
#define DMAC_C0CONTROL (*(volatile unsigned *)0x1100100c) /* DMAC道0控制寄存器 */
#define DMAC_C0CONFIGURATION (*(volatile unsigned *)0x11001010) /* DMAC道0配置寄存器 */
#define DMAC_C0DESCRIPTOR (*(volatile unsigned *)0x11001014) /* DMAC道0链表地址寄存器 */
#define DMAC_C1SRCADDR (*(volatile unsigned *)0x11001100) /* DMAC道1源地址寄存器 */
#define DMAC_C1DESTADDR (*(volatile unsigned *)0x11001104) /* DMAC道1目的地址寄存器 */
#define DMAC_C1CONTROL (*(volatile unsigned *)0x1100110c) /* DMAC道1控制寄存器 */
#define DMAC_C1CONFIGURATION (*(volatile unsigned *)0x11001110) /* DMAC道1配置寄存器 */
#define DMAC_C1DESCRIPTOR (*(volatile unsigned *)0x11001114) /* DMAC道1链表地址寄存器 */
#define DMAC_C2SRCADDR (*(volatile unsigned *)0x11001200) /* DMAC道2源地址寄存器 */
#define DMAC_C2DESTADDR (*(volatile unsigned *)0x11001204) /* DMAC道2目的地址寄存器 */
#define DMAC_C2CONTROL (*(volatile unsigned *)0x1100120c) /* DMAC道2控制寄存器 */
#define DMAC_C2CONFIGURATION (*(volatile unsigned *)0x11001210) /* DMAC道2配置寄存器 */
#define DMAC_C2DESCRIPTOR (*(volatile unsigned *)0x11001214) /* DMAC道2链表地址寄存器 */
#define DMAC_C3SRCADDR (*(volatile unsigned *)0x11001300) /* DMAC道3源地址寄存器 */
#define DMAC_C3DESTADDR (*(volatile unsigned *)0x11001304) /* DMAC道3目的地址寄存器 */
#define DMAC_C3CONTROL (*(volatile unsigned *)0x1100130c) /* DMAC道3控制寄存器 */
#define DMAC_C3CONFIGURATION (*(volatile unsigned *)0x11001310) /* DMAC道3配置寄存器 */
#define DMAC_C3DESCRIPTOR (*(volatile unsigned *)0x11001314) /* DMAC道3链表地址寄存器 */
#define DMAC_C4SRCADDR (*(volatile unsigned *)0x11001400) /* DMAC道4源地址寄存器 */
#define DMAC_C4DESTADDR (*(volatile unsigned *)0x11001404) /* DMAC道4目的地址寄存器 */
#define DMAC_C4CONTROL (*(volatile unsigned *)0x1100140c) /* DMAC道4控制寄存器 */
#define DMAC_C4CONFIGURATION (*(volatile unsigned *)0x11001410) /* DMAC道4配置寄存器 */
#define DMAC_C4DESCRIPTOR (*(volatile unsigned *)0x11001414) /* DMAC道4链表地址寄存器 */
#define DMAC_C5SRCADDR (*(volatile unsigned *)0x11001500) /* DMAC道5源地址寄存器 */
#define DMAC_C5DESTADDR (*(volatile unsigned *)0x11001504) /* DMAC道5目的地址寄存器 */
#define DMAC_C5CONTROL (*(volatile unsigned *)0x1100150c) /* DMAC道5控制寄存器 */
#define DMAC_C5CONFIGURATION (*(volatile unsigned *)0x11001510) /* DMAC道5配置寄存器 */
#define DMAC_C5DESCRIPTOR (*(volatile unsigned *)0x11001514) /* DMAC道5链表地址寄存器 */
/******************************************************************************************
* LCDC模块
* 基址: 0x11002000
******************************************************************************************/
#define LCDC_SSA (*(volatile unsigned *)0x11002000) /* 屏幕起始地址寄存器 */
#define LCDC_SIZE (*(volatile unsigned *)0x11002004) /* 屏幕尺寸寄存器 */
#define LCDC_PCR (*(volatile unsigned *)0x11002008) /* 面板配置寄存器 */
#define LCDC_HCR (*(volatile unsigned *)0x1100200c) /* 水平配置寄存器 */
#define LCDC_VCR (*(volatile unsigned *)0x11002010) /* 垂直配置寄存器 */
#define LCDC_PWMR (*(volatile unsigned *)0x11002014) /* PWM对比度控制寄存器 */
#define LCDC_LECR (*(volatile unsigned *)0x11002018) /* 使能控制寄存器 */
#define LCDC_DMACR (*(volatile unsigned *)0x1100201c) /* DMA控制寄存器 */
#define LCDC_LCDISREN (*(volatile unsigned *)0x11002020) /* 中断使能寄存器 */
#define LCDC_LCDISR (*(volatile unsigned *)0x11002024) /* 中断状态寄存器 */
#define LCDC_LGPMR (*(volatile unsigned *)0x11002040) /* 灰度调色映射寄存器组 */
/*(0x40-0x7c 16个32bit寄存器) */
/******************************************************************************************
* MAC模块
* 基址: 0x11003000
******************************************************************************************/
#define MAC_CTRL (*(volatile unsigned *)0x11003000) /* MAC控制寄存器 */
#define MAC_INTSRC (*(volatile unsigned *)0x11003004) /* MAC中断源寄存器 */
#define MAC_INTMASK (*(volatile unsigned *)0x11003008) /* MAC中断屏蔽寄存器 */
#define MAC_IPGT (*(volatile unsigned *)0x1100300c) /* 连续帧间隔寄存器 */
#define MAC_IPGR1 (*(volatile unsigned *)0x11003010) /* 等待窗口寄存器 */
#define MAC_IPGR2 (*(volatile unsigned *)0x11003014) /* 等待窗口寄存器 */
#define MAC_PACKETLEN (*(volatile unsigned *)0x11003018) /* 帧长度寄存器 */
#define MAC_COLLCONF (*(volatile unsigned *)0x1100301c) /* 碰撞重发寄存器 */
#define MAC_TXBD_NUM (*(volatile unsigned *)0x11003020) /* 发送描述符寄存器 */
#define MAC_FLOWCTRL (*(volatile unsigned *)0x11003024) /* 流控寄存器 */
#define MAC_MII_CTRL (*(volatile unsigned *)0x11003028) /* PHY控制寄存器 */
#define MAC_MII_CMD (*(volatile unsigned *)0x1100302c) /* PHY命令寄存器 */
#define MAC_MII_ADDRESS (*(volatile unsigned *)0x11003030) /* PHY地址寄存器 */
#define MAC_MII_TXDATA (*(volatile unsigned *)0x11003034) /* PHY写数据寄存器 */
#define MAC_MII_RXDATA (*(volatile unsigned *)0x11003038) /* PHY读数据寄存器 */
#define MAC_MII_STATUS (*(volatile unsigned *)0x1100303c) /* PHY状态寄存器 */
#define MAC_ADDR0 (*(volatile unsigned *)0x11003040) /* MAC地址寄存器 */
#define MAC_ADDR1 (*(volatile unsigned *)0x11003044) /* MAC地址寄存器 */
#define MAC_HASH0 (*(volatile unsigned *)0x11003048) /* MAC HASH寄存器 */
#define MAC_HASH1 (*(volatile unsigned *)0x1100304c) /* MAC HASH寄存器 */
#define MAC_TXPAUSE (*(volatile unsigned *)0x11003050) /* MAC控制帧寄存器 */
#define MAC_BD /* 0x4*/
#endif
/*******************END OF FILE*************************/

132
bsp/sep4020/startup.c
View File

@ -1,132 +0,0 @@
/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-08-31 Bernard first implementation
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
/**
* @addtogroup STM32
*/
/*@{*/
extern int rt_application_init(void);
#ifdef RT_USING_FINSH
extern void finsh_system_init(void);
extern void finsh_set_device(const char* device);
#endif
#ifdef __CC_ARM
extern int Image$$RW_RAM1$$ZI$$Limit;
#elif __ICCARM__
#pragma section="HEAP"
#else
extern int __bss_end;
#endif
#ifdef DEBUG
/*******************************************************************************
* Function Name : assert_failed
* Description : Reports the name of the source file and the source line number
* where the assert error has occurred.
* Input : - file: pointer to the source file name
* - line: assert error line source number
* Output : None
* Return : None
*******************************************************************************/
void assert_failed(u8* file, u32 line)
{
rt_kprintf("\n\r Wrong parameter value detected on\r\n");
rt_kprintf(" file %s\r\n", file);
rt_kprintf(" line %d\r\n", line);
while (1) ;
}
#endif
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* init hardware interrupt */
rt_hw_interrupt_init();
/* init board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();
#ifdef RT_USING_HEAP
#ifdef __CC_ARM
rt_system_heap_init((void*)&Image$$RW_RAM1$$ZI$$Limit, (void*)0x32000000);
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
#else
/* init memory system */
rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
#endif
#endif
/* init scheduler system */
rt_system_scheduler_init();
/* init all device */
rt_device_init_all();
/* init application */
rt_application_init();
#ifdef RT_USING_FINSH
/* init finsh */
finsh_system_init();
finsh_set_device("uart0");
#endif
/* init idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main(void)
{
rt_uint32_t UNUSED level;
/* disable interrupt first */
level = rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
/*@}*/