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Merge pull request #3913 from Michael0066/master 

MIPS:fix the RT_EXCEPTION_MAX value
This commit is contained in:
Bernard Xiong 2020-09-19 22:11:30 +08:00 committed by GitHub
parent 8afb8b1e29 ab78ea1de1
commit 8302a72243
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 34 additions and 1 deletions
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10
bsp/ls2kdev/drivers/board.c
View File

@ -16,15 +16,22 @@
#include "exception.h"
#include "drv_uart.h"
#include "board.h"
#include "ls2k1000.h"
/**
* this function will reset CPU
*
*/
void rt_hw_cpu_reset(void)
{
WDT_EN = 0x01;
WDT_TIMER = 0x01;
WDT_SET = 0x01;
rt_kprintf("reboot system...\n");
while (1);
}
MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset cpu);
/**
* this function will shutdown CPU
@ -32,10 +39,13 @@ void rt_hw_cpu_reset(void)
*/
void rt_hw_cpu_shutdown(void)
{
PM1_STS &= 0xffffffff;
PM1_CNT = 0x3c00;
rt_kprintf("shutdown...\n");
while (1);
}
MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_shutdown, poweroff, shutdown cpu);
/**

23
bsp/ls2kdev/drivers/ls2k1000.h
View File

@ -3,6 +3,7 @@
#include <mips.h>
#include "interrupt.h"
#include <rthw.h>
#define APB_BASE CKSEG1ADDR(0xbfe00000)
@ -24,6 +25,28 @@
#define GEN_CONFIG0_REG (0xFFFFFFFFBfe10420)
/*
* General PM Configuration Register
*/
#define PMCON_BASE (APB_BASE | (0x7 << 12))
/*
* Power Management1 Configuration Registers
*/
#define PM1_BASE (PMCON_BASE + 0x0C)
#define PM1_STS HWREG32(PM1_BASE)
#define PM1_EN HWREG32(PM1_BASE + 0x04)
#define PM1_CNT HWREG32(PM1_BASE + 0x08)
/*
* Watch Dog Configuration Registers
*/
#define WDT_BASE (PMCON_BASE + 0x30)
#define WDT_EN HWREG32(WDT_BASE)
#define WDT_SET HWREG32(WDT_BASE + 0x04)
#define WDT_TIMER HWREG32(WDT_BASE + 0x08)
void rt_hw_timer_handler(void);
void rt_hw_uart_init(void);

2
libcpu/mips/common/exception.c
View File

@ -74,7 +74,7 @@ void rt_hw_interrupt_enable(rt_base_t level)
/**
* exception handle table
*/
#define RT_EXCEPTION_MAX 31
#define RT_EXCEPTION_MAX 32
exception_func_t sys_exception_handlers[RT_EXCEPTION_MAX];
/**