modify the link.ld file and board/SConscript
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LYH-ux
parent
6dbfac0c9f
commit
7f2abb615f
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@ -1,11 +1,11 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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* Copyright (c) 2006-2019, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-11-06 SummerGift first version
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* 2020-06-27 AHTYDHD the first version
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*/
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#include <rtthread.h>
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@ -27,6 +27,7 @@ elif rtconfig.CROSS_TOOL == 'iar':
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CPPDEFINES = ['PART_TM4C123GH6PM']
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CPPDEFINES += ['TARGET_IS_TM4C123_RB1']
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CPPDEFINES += ['rvmdk']
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if rtconfig.CROSS_TOOL == 'keil':
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CPPDEFINES += ['rvmdk']
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
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Return('group')
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@ -15,36 +15,36 @@
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#include <rtthread.h>
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#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
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#define TM4C123_SRAM1_START (0x20000000)
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#define TM4C123_SRAM1_END (TM4C123_SRAM1_START + 32 * 1024) // end address = 0x20000000(base adddress) + 32K(RAM size)
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#define TM4C123_SRAM1_START (0x20000000)
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#define TM4C123_SRAM1_END (TM4C123_SRAM1_START + 32 * 1024) // end address = 0x20000000(base adddress) + 32K(RAM size)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM$$ZI$$Limit; // RW_IRAM
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="HEAP"
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#define HEAP_BEGIN (__segment_end("HEAP"))
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#else
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extern int _ebss;
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#define HEAP_BEGIN ((void *)&_ebss)
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#endif
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#define HEAP_END TM4C123_SRAM1_END
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM$$ZI$$Limit; // RW_IRAM
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="HEAP"
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#define HEAP_BEGIN (__segment_end("HEAP"))
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#else
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extern int _ebss;
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#define HEAP_BEGIN ((void *)&_ebss)
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#endif
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#define HEAP_END TM4C123_SRAM1_END
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#endif
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#ifdef RT_USING_PIN
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#include "drv_gpio.h"
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#include "drv_gpio.h"
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#endif /* RT_USING_PIN */
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#ifdef RT_USING_SERIAL
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#include "drv_uart.h"
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#include "drv_uart.h"
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#endif /* RT_USING_SERIAL */
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#ifdef RT_USING_PWM
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#include "drv_pwm.h"
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#include "drv_pwm.h"
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#endif /* RT_USING_PWM*/
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#ifdef RT_USING_SPI
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#include "drv_spi.h"
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#include "drv_spi.h"
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#endif /* RT_USING_SPI*/
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#endif /*__BOARD_H__*/
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@ -39,7 +39,7 @@ SECTIONS
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_etext = .;
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} > FLASH
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.data : AT(ADDR(.text) + SIZEOF(.text))
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.data : AT(ADDR(.iplt) )
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{
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_data = .;
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_ldata = LOADADDR (.data);
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@ -18,16 +18,16 @@
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#include "tm4c123_config.h"
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#ifdef RT_USING_SERIAL
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#include "driverlib/uart.h"
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#include "driverlib/uart.h"
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#endif /* RT_USING_SERIAL */
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#ifdef RT_USING_ADC
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#include "driverlib/adc.h"
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#include "driverlib/adc.h"
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#endif /* RT_USING_ADC */
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#ifdef RT_USING_PWM
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#include "driverlib/pwm.h"
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#include "driverlib/pwm.h"
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#endif /* RT_USING_PWM */
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#ifdef RT_USING_SPI
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#include "driverlib/ssi.h"
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#include "driverlib/ssi.h"
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#endif /* RT_USING_SPI */
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@ -1,6 +1,3 @@
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#ifndef _DRV_ADC_H_
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#define _DRV_ADC_H_
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/*
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* Copyright (c) 2006-2019, RT-Thread Development Team
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*
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@ -11,6 +8,9 @@
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* 2020-06-27 AHTYDHD the first version
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*/
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#ifndef __DRV_ADC_H__
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#define __DRV_ADC_H__
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#include<stdint.h>
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#include<rtthread.h>
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#include<rtdevice.h>
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@ -26,6 +26,6 @@ struct tm4c123_adc_config
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uint32_t sequencepriority;
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};
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#endif /*_DRV_ADC_H_*/
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#endif /*__DRV_ADC_H__*/
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/************************** end of file ******************/
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@ -8,8 +8,8 @@
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* 2020-06-27 AHTYDHD the first version
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*/
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#ifndef _DRV_GPIO_H_
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#define _DRV_GPIO_H_
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#ifndef __DRV_GPIO_H__
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#define __DRV_GPIO_H__
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#include <stdint.h>
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#include <rtthread.h>
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@ -34,6 +34,6 @@ struct pin_index
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extern int rt_hw_pin_init(void);
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#endif /*_DRV_GPIO_H_*/
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#endif /*__DRV_GPIO_H__*/
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/************************** end of file ******************/
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@ -23,8 +23,7 @@ struct tm4c123_uart_config
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uint32_t uartbase;
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uint32_t baudrate;
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uint32_t mode;
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//struct dma_config *dma_rx;
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//struct dma_config *dma_tx;
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};
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/* tm4c123 uart dirver class */
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