libs/rt-thread-official
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rt-thread-official
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cleanup code. 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2286 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wuyangyong 2012-09-10 05:49:55 +00:00
parent 01aa24f2c5
commit 7ce935b601
23 changed files with 659 additions and 839 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
bsp/stm32f107/SConscript
View File

@ -1,19 +1,14 @@
import rtconfig
# for module compiling
import os
Import('RTT_ROOT')
from building import *
src_bsp = ['application.c', 'startup.c', 'board.c', 'stm32f10x_it.c']
src_drv = ['usart.c', 'serial.c']
cwd = str(Dir('#'))
objs = []
list = os.listdir(cwd)
if GetDepend('RT_USING_DFS'):
src_drv += ['msd.c']
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
if GetDepend('RT_USING_LWIP'):
src_drv += ['stm32_eth.c']
src = src_bsp + src_drv
CPPPATH = [GetCurrentDir()]
CPPDEFINES = []
group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
Return('group')
Return('objs')

5
bsp/stm32f107/SConstruct
View File

@ -28,10 +28,7 @@ Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT)
# STM32 firemare library building script
objs = objs + SConscript('Libraries/SConscript', variant_dir='build/bsp/Libraries', duplicate=0)
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# build program
env.Program(TARGET, objs)

11
bsp/stm32f107/applications/SConscript Normal file
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@ -0,0 +1,11 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

0
bsp/stm32f107/application.c → bsp/stm32f107/applications/application.c
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0
bsp/stm32f107/startup.c → bsp/stm32f107/applications/startup.c
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181
bsp/stm32f107/board.c
View File

@ -1,181 +0,0 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first implementation
*/
#include <rthw.h>
#include <rtthread.h>
#include "stm32f10x.h"
#include "stm32f10x_fsmc.h"
#include "board.h"
/**
* @addtogroup STM32
*/
/*@{*/
/*******************************************************************************
* Function Name : NVIC_Configuration
* Description : Configures Vector Table base location.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
/* Set the Vector Table base location at 0x20000000 */
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else /* VECT_TAB_FLASH */
/* Set the Vector Table base location at 0x08000000 */
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
}
/*******************************************************************************
* Function Name : SysTick_Configuration
* Description : Configures the SysTick for OS tick.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SysTick_Configuration(void)
{
RCC_ClocksTypeDef rcc_clocks;
rt_uint32_t cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
}
#if STM32_EXT_SRAM
void EXT_SRAM_Configuration(void)
{
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef p;
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |
RCC_APB2Periph_GPIOF, ENABLE);
/*-- GPIO Configuration ------------------------------------------------------*/
/* SRAM Data lines configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
GPIO_Pin_15;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* SRAM Address lines configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOF, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOG, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* NOE and NWE configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* NE3 NE4 configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_12;
GPIO_Init(GPIOG, &GPIO_InitStructure);
/* NBL0, NBL1 configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/*-- FSMC Configuration ------------------------------------------------------*/
p.FSMC_AddressSetupTime = 0;
p.FSMC_AddressHoldTime = 0;
p.FSMC_DataSetupTime = 2;
p.FSMC_BusTurnAroundDuration = 0;
p.FSMC_CLKDivision = 0;
p.FSMC_DataLatency = 0;
p.FSMC_AccessMode = FSMC_AccessMode_A;
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
/* Enable FSMC Bank1_SRAM Bank */
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
}
#endif
/**
* This is the timer interrupt service routine.
*
*/
void rt_hw_timer_handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init()
{
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Configuration();
#if STM32_EXT_SRAM
EXT_SRAM_Configuration();
#endif
rt_hw_usart_init();
rt_console_set_device(CONSOLE_DEVICE);
}
/*@}*/

11
bsp/stm32f107/drivers/SConscript Normal file
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@ -0,0 +1,11 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'drivers')
src = Glob('*.c')
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

94
bsp/stm32f107/drivers/board.c Normal file
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@ -0,0 +1,94 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first implementation
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
/**
* @addtogroup STM32
*/
/*@{*/
/*******************************************************************************
* Function Name : NVIC_Configuration
* Description : Configures Vector Table base location.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
/* Set the Vector Table base location at 0x20000000 */
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else /* VECT_TAB_FLASH */
/* Set the Vector Table base location at 0x08000000 */
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
}
/*******************************************************************************
* Function Name : SysTick_Configuration
* Description : Configures the SysTick for OS tick.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SysTick_Configuration(void)
{
RCC_ClocksTypeDef rcc_clocks;
rt_uint32_t cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
}
/**
* This is the timer interrupt service routine.
*
*/
void rt_hw_timer_handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init()
{
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Configuration();
rt_hw_usart_init();
rt_console_set_device(CONSOLE_DEVICE);
}
/*@}*/

2
bsp/stm32f107/board.h → bsp/stm32f107/drivers/board.h
View File

@ -16,6 +16,8 @@
#ifndef __BOARD_H__
#define __BOARD_H__
#include "stm32f10x.h"
/* board configuration */
// <o> SDCard Driver <1=>SDIO sdcard <0=>SPI MMC card
// <i>Default: 1

0
bsp/stm32f107/msd.c → bsp/stm32f107/drivers/msd.c
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0
bsp/stm32f107/msd.h → bsp/stm32f107/drivers/msd.h
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0
bsp/stm32f107/serial.c → bsp/stm32f107/drivers/serial.c
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0
bsp/stm32f107/serial.h → bsp/stm32f107/drivers/serial.h
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0
bsp/stm32f107/stm32_eth.c → bsp/stm32f107/drivers/stm32_eth.c
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0
bsp/stm32f107/stm32_eth.h → bsp/stm32f107/drivers/stm32_eth.h
View File

0
bsp/stm32f107/stm32f10x_conf.h → bsp/stm32f107/drivers/stm32f10x_conf.h
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0
bsp/stm32f107/stm32f10x_it.c → bsp/stm32f107/drivers/stm32f10x_it.c
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0
bsp/stm32f107/stm32f10x_it.h → bsp/stm32f107/drivers/stm32f10x_it.h
View File

0
bsp/stm32f107/usart.c → bsp/stm32f107/drivers/usart.c
View File

0
bsp/stm32f107/usart.h → bsp/stm32f107/drivers/usart.h
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739
bsp/stm32f107/project.ewp
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File diff suppressed because it is too large Load Diff

429
bsp/stm32f107/project.uvproj
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@ -343,7 +343,7 @@
<MiscControls />
<Define>STM32F10X_CL, USE_STDPERIPH_DRIVER</Define>
<Undefine />
<IncludePath>.;..\..\components\dfs;..\..\components\dfs\include;..\..\components\finsh;..\..\components\net\lwip\src;..\..\components\net\lwip\src\arch\include;..\..\components\net\lwip\src\include;..\..\components\net\lwip\src\include\ipv4;..\..\components\net\lwip\src\include\netif;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;Libraries\CMSIS\CM3\CoreSupport;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;Libraries\STM32F10x_StdPeriph_Driver\inc</IncludePath>
<IncludePath>.;..\..\components\CMSIS\Include;..\..\components\dfs;..\..\components\dfs\include;..\..\components\finsh;..\..\components\net\lwip\src;..\..\components\net\lwip\src\arch\include;..\..\components\net\lwip\src\include;..\..\components\net\lwip\src\include\ipv4;..\..\components\net\lwip\src\include\netif;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;Libraries\STM32F10x_StdPeriph_Driver\inc;applications;drivers</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -381,61 +381,242 @@
</TargetOption>
<Groups>
<Group>
<GroupName>Startup</GroupName>
<GroupName>Applications</GroupName>
<Files>
<File>
<FileName>application.c</FileName>
<FileType>1</FileType>
<FilePath>.\application.c</FilePath>
<FilePath>applications\application.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>startup.c</FileName>
<FileType>1</FileType>
<FilePath>.\startup.c</FilePath>
<FilePath>applications\startup.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers</GroupName>
<Files>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>.\board.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_it.c</FileName>
<FileType>1</FileType>
<FilePath>.\stm32f10x_it.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>usart.c</FileName>
<FileType>1</FileType>
<FilePath>.\usart.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>.\serial.c</FilePath>
<FilePath>drivers\board.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msd.c</FileName>
<FileType>1</FileType>
<FilePath>.\msd.c</FilePath>
<FilePath>drivers\msd.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\serial.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32_eth.c</FileName>
<FileType>1</FileType>
<FilePath>.\stm32_eth.c</FilePath>
<FilePath>drivers\stm32_eth.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_it.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\stm32f10x_it.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>usart.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\usart.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>STM32_StdPeriph</GroupName>
<Files>
<File>
<FileName>system_stm32f10x.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_crc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_rcc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_wwdg.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_pwr.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_exti.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_bkp.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_i2c.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_adc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_dac.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_rtc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_fsmc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_tim.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_iwdg.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_spi.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_flash.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_sdio.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_usart.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_dbgmcu.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_dma.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_can.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_cec.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>misc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\misc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>startup_stm32f10x_cl.s</FileName>
<FileType>2</FileType>
<FilePath>Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_cl.s</FilePath>
</File>
</Files>
</Group>
@ -490,13 +671,6 @@
<FilePath>..\..\src\mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>memheap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\memheap.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mempool.c</FileName>
@ -958,191 +1132,6 @@
</File>
</Files>
</Group>
<Group>
<GroupName>STM32_StdPeriph</GroupName>
<Files>
<File>
<FileName>core_cm3.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\CMSIS\CM3\CoreSupport\core_cm3.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>system_stm32f10x.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_crc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c</FilePath>
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</Targets>

1
bsp/stm32f107/rtconfig.h
View File

@ -75,7 +75,6 @@
/* SECTION: device filesystem */
#define RT_USING_DFS
#define RT_USING_DFS_ELMFAT
#define RT_DFS_ELM_WORD_ACCESS
/* Reentrancy (thread safe) of the FatFs module. */
#define RT_DFS_ELM_REENTRANT
/* Number of volumes (logical drives) to be used. */