libs/rt-thread-official
libs
/
rt-thread-official
mirror of https://github.com/RT-Thread/rt-thread.git
4
0
Fork 0
Code Issues Releases Wiki Activity

ADD: Add abort handler, it will terminate current thread by default. 

ADD: Merged svc, abort and irq mode stack.
ADD: Changed MDK project to new format.
FIX: Removed the "static" qualifier of rt_thread_exit().
FIX: Change AT91SAM7X.h to the standard header(AT91SAM7X256.h) of RealView MDK. (not all of them are changed, e.g. sd.c)
FIX: Moved some board-dependent files to bsp.


git-svn-id: https://rt-thread.googlecode.com/svn/trunk@257 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
mbbill 2009-12-29 07:17:58 +00:00
parent 78de03446b
commit 79ca654e13
19 changed files with 4176 additions and 94 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

0
libcpu/arm/AT91SAM7X/AT91SAM7X.h → bsp/sam7x/AT91SAM7X.h
View File

42
bsp/sam7x/board.c
View File

@ -15,7 +15,7 @@
#include <rtthread.h> #include <rtthread.h>
#include <rthw.h> #include <rthw.h>
#include <AT91SAM7X.h> #include <AT91SAM7X256.h>
#include "board.h" #include "board.h"
static void rt_hw_board_led_init(void); static void rt_hw_board_led_init(void);
@ -34,18 +34,18 @@ static void rt_hw_board_led_init(void);
*/ */
void rt_hw_timer_handler(int vector) void rt_hw_timer_handler(int vector)
{ {
if (AT91C_PITC_PISR & 0x01) if (AT91C_BASE_PITC->PITC_PISR & 0x01)
{ {
/* increase a tick */ /* increase a tick */
rt_tick_increase(); rt_tick_increase();
/* ack interrupt */ /* ack interrupt */
AT91C_AIC_EOICR = AT91C_PITC_PIVR; AT91C_BASE_AIC->AIC_EOICR = AT91C_BASE_PITC->PITC_PIVR;
} }
else else
{ {
/* end of interrupt */ /* end of interrupt */
AT91C_AIC_EOICR = 0; AT91C_BASE_AIC->AIC_EOICR = 0;
} }
} }
/* PIO Flash PA PB PIN */ /* PIO Flash PA PB PIN */
@ -63,11 +63,11 @@ int leds[] = {LED1, LED2, LED3, LED4};
static void rt_hw_board_led_init() static void rt_hw_board_led_init()
{ {
/* enable the clock of the PIO A, PIO B */ /* enable the clock of the PIO A, PIO B */
AT91C_PMC_PCER = 1 << AT91C_ID_PIOA | 1 << AT91C_ID_PIOB; AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOA | 1 << AT91C_ID_PIOB;
/* configure PIO as output for led */ /* configure PIO as output for led */
AT91C_PIOB_PER = LED_MASK; AT91C_BASE_PIOB->PIO_PER = LED_MASK;
AT91C_PIOB_OER = LED_MASK; AT91C_BASE_PIOB->PIO_OER = LED_MASK;
} }
/** /**
@ -79,7 +79,7 @@ void rt_hw_board_led_on(int n)
{ {
if (n >= 0 && n < 4) if (n >= 0 && n < 4)
{ {
AT91C_PIOB_CODR = leds[n]; AT91C_BASE_PIOB->PIO_CODR = leds[n];
} }
} }
@ -92,7 +92,7 @@ void rt_hw_board_led_off(int n)
{ {
if (n >= 0 && n < 4) if (n >= 0 && n < 4)
{ {
AT91C_PIOB_SODR = leds[n]; AT91C_BASE_PIOB->PIO_SODR = leds[n];
} }
} }
@ -111,14 +111,14 @@ void rt_hw_console_output(const char* str)
{ {
if (*str == '\n') if (*str == '\n')
{ {
while (!(AT91C_US0_CSR & AT91C_US_TXRDY)); while (!(AT91C_BASE_US0->US_CSR & AT91C_US_TXRDY));
AT91C_US0_THR = '\r'; AT91C_BASE_US0->US_THR = '\r';
} }
/* Wait for Empty Tx Buffer */ /* Wait for Empty Tx Buffer */
while (!(AT91C_US0_CSR & AT91C_US_TXRDY)); while (!(AT91C_BASE_US0->US_CSR & AT91C_US_TXRDY));
/* Transmit Character */ /* Transmit Character */
AT91C_US0_THR = *str; AT91C_BASE_US0->US_THR = *str;
str ++; str ++;
} }
@ -127,25 +127,25 @@ void rt_hw_console_output(const char* str)
static void rt_hw_console_init() static void rt_hw_console_init()
{ {
/* Enable Clock for USART0 */ /* Enable Clock for USART0 */
AT91C_PMC_PCER = 1 << AT91C_ID_US0; AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US0;
/* Enable RxD0 and TxDO Pin */ /* Enable RxD0 and TxDO Pin */
AT91C_PIO_PDR = (1 << 5) | (1 << 6); AT91C_BASE_PIOA->PIO_PDR = (1 << 5) | (1 << 6);
AT91C_US0_CR = AT91C_US_RSTRX | /* Reset Receiver */ AT91C_BASE_US0->US_CR = AT91C_US_RSTRX | /* Reset Receiver */
AT91C_US_RSTTX | /* Reset Transmitter */ AT91C_US_RSTTX | /* Reset Transmitter */
AT91C_US_RXDIS | /* Receiver Disable */ AT91C_US_RXDIS | /* Receiver Disable */
AT91C_US_TXDIS; /* Transmitter Disable */ AT91C_US_TXDIS; /* Transmitter Disable */
AT91C_US0_MR = AT91C_US_USMODE_NORMAL | /* Normal Mode */ AT91C_BASE_US0->US_MR = AT91C_US_USMODE_NORMAL | /* Normal Mode */
AT91C_US_CLKS_CLOCK | /* Clock = MCK */ AT91C_US_CLKS_CLOCK | /* Clock = MCK */
AT91C_US_CHRL_8_BITS | /* 8-bit Data */ AT91C_US_CHRL_8_BITS | /* 8-bit Data */
AT91C_US_PAR_NONE | /* No Parity */ AT91C_US_PAR_NONE | /* No Parity */
AT91C_US_NBSTOP_1_BIT; /* 1 Stop Bit */ AT91C_US_NBSTOP_1_BIT; /* 1 Stop Bit */
/* set baud rate divisor */ /* set baud rate divisor */
AT91C_US0_BRGR = BRD; AT91C_BASE_US0->US_BRGR = BRD;
AT91C_US0_CR = AT91C_US_RXEN | /* Receiver Enable */ AT91C_BASE_US0->US_CR = AT91C_US_RXEN | /* Receiver Enable */
AT91C_US_TXEN; /* Transmitter Enable */ AT91C_US_TXEN; /* Transmitter Enable */
} }
@ -163,11 +163,11 @@ void rt_hw_board_init()
rt_hw_board_led_init(); rt_hw_board_led_init();
/* init PITC */ /* init PITC */
AT91C_PITC_PIMR = (1 << 25) | (1 << 24) | PIV; AT91C_BASE_PITC->PITC_PIMR = (1 << 25) | (1 << 24) | PIV;
/* install timer handler */ /* install timer handler */
rt_hw_interrupt_install(AT91C_ID_SYS, rt_hw_timer_handler, RT_NULL); rt_hw_interrupt_install(AT91C_ID_SYS, rt_hw_timer_handler, RT_NULL);
AT91C_AIC_SMR(AT91C_ID_SYS) = 0; AT91C_BASE_AIC->AIC_SMR[AT91C_ID_SYS] = 0;
rt_hw_interrupt_umask(AT91C_ID_SYS); rt_hw_interrupt_umask(AT91C_ID_SYS);
} }
/*@}*/ /*@}*/

80
bsp/sam7x/board.h
View File

@ -17,46 +17,46 @@
#include <rthw.h> #include <rthw.h>
#include <rtthread.h> #include <rtthread.h>
// These are defined in standard header (at91sam7x256.h) of realview MDK.
#define AT91C_US_RXRDY ((unsigned int) 0x1 << 0) /* US RXRDY Interrupt */ //#define AT91C_US_RXRDY ((unsigned int) 0x1 << 0) /* US RXRDY Interrupt */
#define AT91C_US_TXRDY ((unsigned int) 0x1 << 1) /* US TXRDY Interrupt */ //#define AT91C_US_TXRDY ((unsigned int) 0x1 << 1) /* US TXRDY Interrupt */
#define AT91C_US_RSTRX ((unsigned int) 0x1 << 2) /* US Reset Receiver */ //#define AT91C_US_RSTRX ((unsigned int) 0x1 << 2) /* US Reset Receiver */
#define AT91C_US_RSTTX ((unsigned int) 0x1 << 3) /* US Reset Transmitter */ //#define AT91C_US_RSTTX ((unsigned int) 0x1 << 3) /* US Reset Transmitter */
#define AT91C_US_RXEN ((unsigned int) 0x1 << 4) /* US Receiver Enable */ //#define AT91C_US_RXEN ((unsigned int) 0x1 << 4) /* US Receiver Enable */
#define AT91C_US_RXDIS ((unsigned int) 0x1 << 5) /* US Receiver Disable */ //#define AT91C_US_RXDIS ((unsigned int) 0x1 << 5) /* US Receiver Disable */
#define AT91C_US_TXEN ((unsigned int) 0x1 << 6) /* US Transmitter Enable */ //#define AT91C_US_TXEN ((unsigned int) 0x1 << 6) /* US Transmitter Enable */
#define AT91C_US_TXDIS ((unsigned int) 0x1 << 7) /* US Transmitter Disable */ //#define AT91C_US_TXDIS ((unsigned int) 0x1 << 7) /* US Transmitter Disable */
#define AT91C_US_RSTSTA ((unsigned int) 0x1 << 8) /* US Reset Status Bits */ //#define AT91C_US_RSTSTA ((unsigned int) 0x1 << 8) /* US Reset Status Bits */
//
#define AT91C_US_USMODE_NORMAL ((unsigned int) 0x0) /* USAR) Normal */ //#define AT91C_US_USMODE_NORMAL ((unsigned int) 0x0) /* USAR) Normal */
#define AT91C_US_USMODE_RS485 ((unsigned int) 0x1) /* USAR) RS485 */ //#define AT91C_US_USMODE_RS485 ((unsigned int) 0x1) /* USAR) RS485 */
#define AT91C_US_USMODE_HWHSH ((unsigned int) 0x2) /* USAR) Hardware Handshaking */ //#define AT91C_US_USMODE_HWHSH ((unsigned int) 0x2) /* USAR) Hardware Handshaking */
#define AT91C_US_USMODE_MODEM ((unsigned int) 0x3) /* USAR) Modem */ //#define AT91C_US_USMODE_MODEM ((unsigned int) 0x3) /* USAR) Modem */
#define AT91C_US_USMODE_ISO7816_0 ((unsigned int) 0x4) /* USAR) ISO7816 protocol: T = 0 */ //#define AT91C_US_USMODE_ISO7816_0 ((unsigned int) 0x4) /* USAR) ISO7816 protocol: T = 0 */
#define AT91C_US_USMODE_ISO7816_1 ((unsigned int) 0x6) /* USAR) ISO7816 protocol: T = 1 */ //#define AT91C_US_USMODE_ISO7816_1 ((unsigned int) 0x6) /* USAR) ISO7816 protocol: T = 1 */
#define AT91C_US_USMODE_IRDA ((unsigned int) 0x8) /* USAR) IrDA */ //#define AT91C_US_USMODE_IRDA ((unsigned int) 0x8) /* USAR) IrDA */
#define AT91C_US_USMODE_SWHSH ((unsigned int) 0xC) /* USAR) Software Handshaking */ //#define AT91C_US_USMODE_SWHSH ((unsigned int) 0xC) /* USAR) Software Handshaking */
//
#define AT91C_US_CLKS_CLOCK ((unsigned int) 0x0 << 4) /* USAR) Clock */ //#define AT91C_US_CLKS_CLOCK ((unsigned int) 0x0 << 4) /* USAR) Clock */
#define AT91C_US_CLKS_FDIV1 ((unsigned int) 0x1 << 4) /* USAR) fdiv1 */ //#define AT91C_US_CLKS_FDIV1 ((unsigned int) 0x1 << 4) /* USAR) fdiv1 */
#define AT91C_US_CLKS_SLOW ((unsigned int) 0x2 << 4) /* USAR) slow_clock (ARM) */ //#define AT91C_US_CLKS_SLOW ((unsigned int) 0x2 << 4) /* USAR) slow_clock (ARM) */
#define AT91C_US_CLKS_EXT ((unsigned int) 0x3 << 4) /* USAR) External (SCK) */ //#define AT91C_US_CLKS_EXT ((unsigned int) 0x3 << 4) /* USAR) External (SCK) */
//
#define AT91C_US_CHRL_5_BITS ((unsigned int) 0x0 << 6) /* USAR) Character Length: 5 bits */ //#define AT91C_US_CHRL_5_BITS ((unsigned int) 0x0 << 6) /* USAR) Character Length: 5 bits */
#define AT91C_US_CHRL_6_BITS ((unsigned int) 0x1 << 6) /* USAR) Character Length: 6 bits */ //#define AT91C_US_CHRL_6_BITS ((unsigned int) 0x1 << 6) /* USAR) Character Length: 6 bits */
#define AT91C_US_CHRL_7_BITS ((unsigned int) 0x2 << 6) /* USAR) Character Length: 7 bits */ //#define AT91C_US_CHRL_7_BITS ((unsigned int) 0x2 << 6) /* USAR) Character Length: 7 bits */
#define AT91C_US_CHRL_8_BITS ((unsigned int) 0x3 << 6) /* USAR) Character Length: 8 bits */ //#define AT91C_US_CHRL_8_BITS ((unsigned int) 0x3 << 6) /* USAR) Character Length: 8 bits */
//
#define AT91C_US_PAR_EVEN ((unsigned int) 0x0 << 9) /* DBGU Even Parity */ //#define AT91C_US_PAR_EVEN ((unsigned int) 0x0 << 9) /* DBGU Even Parity */
#define AT91C_US_PAR_ODD ((unsigned int) 0x1 << 9) /* DBGU Odd Parity */ //#define AT91C_US_PAR_ODD ((unsigned int) 0x1 << 9) /* DBGU Odd Parity */
#define AT91C_US_PAR_SPACE ((unsigned int) 0x2 << 9) /* DBGU Parity forced to 0 (Space) */ //#define AT91C_US_PAR_SPACE ((unsigned int) 0x2 << 9) /* DBGU Parity forced to 0 (Space) */
#define AT91C_US_PAR_MARK ((unsigned int) 0x3 << 9) /* DBGU Parity forced to 1 (Mark) */ //#define AT91C_US_PAR_MARK ((unsigned int) 0x3 << 9) /* DBGU Parity forced to 1 (Mark) */
#define AT91C_US_PAR_NONE ((unsigned int) 0x4 << 9) /* DBGU No Parity */ //#define AT91C_US_PAR_NONE ((unsigned int) 0x4 << 9) /* DBGU No Parity */
#define AT91C_US_PAR_MULTI_DROP ((unsigned int) 0x6 << 9) /* DBGU Multi-drop mode */ //#define AT91C_US_PAR_MULTI_DROP ((unsigned int) 0x6 << 9) /* DBGU Multi-drop mode */
//
#define AT91C_US_NBSTOP_1_BIT ((unsigned int) 0x0 << 12) /* USART 1 stop bit */ //#define AT91C_US_NBSTOP_1_BIT ((unsigned int) 0x0 << 12) /* USART 1 stop bit */
#define AT91C_US_NBSTOP_15_BIT ((unsigned int) 0x1 << 12) /* USART Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits */ //#define AT91C_US_NBSTOP_15_BIT ((unsigned int) 0x1 << 12) /* USART Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits */
#define AT91C_US_NBSTOP_2_BIT ((unsigned int) 0x2 << 12) /* USART 2 stop bits */ //#define AT91C_US_NBSTOP_2_BIT ((unsigned int) 0x2 << 12) /* USART 2 stop bits */
#define MCK 48054857 #define MCK 48054857
#define BR 115200 /* Baud Rate */ #define BR 115200 /* Baud Rate */

0
libcpu/arm/AT91SAM7X/mii.h → bsp/sam7x/mii.h
View File

3166
bsp/sam7x/project.uvopt Normal file
View File

File diff suppressed because it is too large Load Diff

899
bsp/sam7x/project.uvproj Normal file
View File

@ -0,0 +1,899 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>RT-Thread/AT91SAM7X</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>AT91SAM7X256</Device>
<Vendor>Atmel</Vendor>
<Cpu>IRAM(0x200000-0x20FFFF) IROM(0x100000-0x13FFFF) CLOCK(18432000) CPUTYPE(ARM7TDMI)</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile>"STARTUP\Atmel\SAM7.s" ("Atmel AT91SAM7 Startup Code")</StartupFile>
<FlashDriverDll>UL2ARM(-U56240812 -O15 -S0 -C0 -FO7 -FD200000 -FC800 -FN1 -FF0AT91SAM7_256 -FS0100000 -FL040000)</FlashDriverDll>
<DeviceId>4081</DeviceId>
<RegisterFile>AT91SAM7X256.H</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath>Atmel\SAM7X\</RegisterFilePath>
<DBRegisterFilePath>Atmel\SAM7X\</DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\objs\</OutputDirectory>
<OutputName>rtthread-sam7x</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\objs\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
</CommonProperty>
<DllOption>
<SimDllName>SARM.DLL</SimDllName>
<SimDllArguments>-cAT91SAM7X</SimDllArguments>
<SimDlgDll>DARMATS.DLL</SimDlgDll>
<SimDlgDllArguments>-p91SAM7X256</SimDlgDllArguments>
<TargetDllName>SARM.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TARMATS.DLL</TargetDlgDll>
<TargetDlgDllArguments>-p91SAM7X256</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
<Simulator>
<UseSimulator>1</UseSimulator>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>0</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>1</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
</Simulator>
<Target>
<UseTarget>0</UseTarget>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>2</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
</SimDlls>
<TargetDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
<Driver>Segger\JLTAgdi.dll</Driver>
</TargetDlls>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4100</DriverSelection>
</Flash1>
<Flash2>Segger\JLTAgdi.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>0</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>ARM7TDMI</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>1</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x200000</StartAddress>
<Size>0x10000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x100000</StartAddress>
<Size>0x40000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x100000</StartAddress>
<Size>0x40000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x200000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>.;..\..\include;..\sam7x;..\..\finsh;..\..\net\lwip\src\include;..\..\net\lwip\src;..\..\net\lwip\src\arch\include;..\..\net\lwip\src\include\ipv4;;..\..\filesystem\dfs;..\..\filesystem\dfs\include;..\..\filesystem\dfs\filesystems\efsl\src\include;..\..\filesystem\dfs\filesystems\efsl\src\base\include;..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\include</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x00100000</TextAddressRange>
<DataAddressRange>0x00200000</DataAddressRange>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>--keep __fsym_* --keep __vsym_*</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Startup</GroupName>
<Files>
<File>
<FileName>rtconfig.h</FileName>
<FileType>5</FileType>
<FilePath>.\rtconfig.h</FilePath>
</File>
<File>
<FileName>application.c</FileName>
<FileType>1</FileType>
<FilePath>.\application.c</FilePath>
</File>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>.\board.c</FilePath>
</File>
<File>
<FileName>startup.c</FileName>
<FileType>1</FileType>
<FilePath>.\startup.c</FilePath>
</File>
<File>
<FileName>sd.c</FileName>
<FileType>1</FileType>
<FilePath>.\sd.c</FilePath>
</File>
<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>.\serial.c</FilePath>
</File>
<File>
<FileName>sam7x_emac.c</FileName>
<FileType>1</FileType>
<FilePath>.\sam7x_emac.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Kernel</GroupName>
<Files>
<File>
<FileName>clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\clock.c</FilePath>
</File>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\idle.c</FilePath>
</File>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\ipc.c</FilePath>
</File>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\irq.c</FilePath>
</File>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\kservice.c</FilePath>
</File>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\mem.c</FilePath>
</File>
<File>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\mempool.c</FilePath>
</File>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\object.c</FilePath>
</File>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\timer.c</FilePath>
</File>
<File>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\scheduler.c</FilePath>
</File>
<File>
<FileName>slab.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\slab.c</FilePath>
</File>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\thread.c</FilePath>
</File>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\src\device.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>AT91SAM7X</GroupName>
<Files>
<File>
<FileName>interrupt.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\AT91SAM7X\interrupt.c</FilePath>
</File>
<File>
<FileName>stack.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\AT91SAM7X\stack.c</FilePath>
</File>
<File>
<FileName>trap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\AT91SAM7X\trap.c</FilePath>
</File>
<File>
<FileName>cpu.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libcpu\arm\AT91SAM7X\cpu.c</FilePath>
</File>
<File>
<FileName>start_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\libcpu\arm\AT91SAM7X\start_rvds.S</FilePath>
</File>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\libcpu\arm\AT91SAM7X\context_rvds.S</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>finsh</GroupName>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>finsh_compiler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\finsh_compiler.c</FilePath>
</File>
<File>
<FileName>finsh_error.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\finsh_error.c</FilePath>
</File>
<File>
<FileName>finsh_heap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\finsh_heap.c</FilePath>
</File>
<File>
<FileName>finsh_init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\finsh_init.c</FilePath>
</File>
<File>
<FileName>finsh_node.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\finsh_node.c</FilePath>
</File>
<File>
<FileName>finsh_ops.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\finsh_ops.c</FilePath>
</File>
<File>
<FileName>finsh_parser.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\finsh_parser.c</FilePath>
</File>
<File>
<FileName>finsh_token.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\finsh_token.c</FilePath>
</File>
<File>
<FileName>finsh_var.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\finsh_var.c</FilePath>
</File>
<File>
<FileName>finsh_vm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\finsh_vm.c</FilePath>
</File>
<File>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\shell.c</FilePath>
</File>
<File>
<FileName>symbol.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\finsh\symbol.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>LwIP</GroupName>
<Files>
<File>
<FileName>dhcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\dhcp.c</FilePath>
</File>
<File>
<FileName>dns.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\dns.c</FilePath>
</File>
<File>
<FileName>init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\init.c</FilePath>
</File>
<File>
<FileName>netif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\netif.c</FilePath>
</File>
<File>
<FileName>pbuf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\pbuf.c</FilePath>
</File>
<File>
<FileName>raw.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\raw.c</FilePath>
</File>
<File>
<FileName>stats.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\stats.c</FilePath>
</File>
<File>
<FileName>sys.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\sys.c</FilePath>
</File>
<File>
<FileName>tcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\tcp.c</FilePath>
</File>
<File>
<FileName>tcp_in.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\tcp_in.c</FilePath>
</File>
<File>
<FileName>tcp_out.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\tcp_out.c</FilePath>
</File>
<File>
<FileName>udp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\udp.c</FilePath>
</File>
<File>
<FileName>autoip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\ipv4\autoip.c</FilePath>
</File>
<File>
<FileName>icmp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\ipv4\icmp.c</FilePath>
</File>
<File>
<FileName>igmp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\ipv4\igmp.c</FilePath>
</File>
<File>
<FileName>inet.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\ipv4\inet.c</FilePath>
</File>
<File>
<FileName>inet_chksum.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\ipv4\inet_chksum.c</FilePath>
</File>
<File>
<FileName>ip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\ipv4\ip.c</FilePath>
</File>
<File>
<FileName>ip_addr.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\ipv4\ip_addr.c</FilePath>
</File>
<File>
<FileName>ip_frag.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\ipv4\ip_frag.c</FilePath>
</File>
<File>
<FileName>asn1_dec.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\snmp\asn1_dec.c</FilePath>
</File>
<File>
<FileName>asn1_enc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\snmp\asn1_enc.c</FilePath>
</File>
<File>
<FileName>mib2.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\snmp\mib2.c</FilePath>
</File>
<File>
<FileName>mib_structs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\snmp\mib_structs.c</FilePath>
</File>
<File>
<FileName>msg_in.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\snmp\msg_in.c</FilePath>
</File>
<File>
<FileName>msg_out.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\snmp\msg_out.c</FilePath>
</File>
<File>
<FileName>api_lib.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\api\api_lib.c</FilePath>
</File>
<File>
<FileName>api_msg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\api\api_msg.c</FilePath>
</File>
<File>
<FileName>err.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\api\err.c</FilePath>
</File>
<File>
<FileName>netbuf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\api\netbuf.c</FilePath>
</File>
<File>
<FileName>netdb.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\api\netdb.c</FilePath>
</File>
<File>
<FileName>netifapi.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\api\netifapi.c</FilePath>
</File>
<File>
<FileName>tcpip.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\api\tcpip.c</FilePath>
</File>
<File>
<FileName>etharp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\netif\etharp.c</FilePath>
</File>
<File>
<FileName>ethernetif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\netif\ethernetif.c</FilePath>
</File>
<File>
<FileName>loopif.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\netif\loopif.c</FilePath>
</File>
<File>
<FileName>sys_arch_init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\arch\sys_arch_init.c</FilePath>
</File>
<File>
<FileName>sys_arch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\arch\sys_arch.c</FilePath>
</File>
<File>
<FileName>sockets.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\api\sockets.c</FilePath>
</File>
<File>
<FileName>memp_tiny.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\net\lwip\src\core\memp_tiny.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Filesystem</GroupName>
<Files>
<File>
<FileName>dfs_util.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\src\dfs_util.c</FilePath>
</File>
<File>
<FileName>dfs_cache.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\src\dfs_cache.c</FilePath>
</File>
<File>
<FileName>dfs_fs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\src\dfs_fs.c</FilePath>
</File>
<File>
<FileName>dfs_init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\src\dfs_init.c</FilePath>
</File>
<File>
<FileName>dfs_raw.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\src\dfs_raw.c</FilePath>
</File>
<File>
<FileName>dfs_posix.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\src\dfs_posix.c</FilePath>
</File>
<File>
<FileName>plibc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c</FilePath>
</File>
<File>
<FileName>efs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c</FilePath>
</File>
<File>
<FileName>extract.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c</FilePath>
</File>
<File>
<FileName>partition.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c</FilePath>
</File>
<File>
<FileName>ui.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c</FilePath>
</File>
<File>
<FileName>dir.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c</FilePath>
</File>
<File>
<FileName>fat.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c</FilePath>
</File>
<File>
<FileName>file.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c</FilePath>
</File>
<File>
<FileName>fs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c</FilePath>
</File>
<File>
<FileName>ls.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c</FilePath>
</File>
<File>
<FileName>time.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>

4
bsp/sam7x/rtconfig.h
View File

@ -81,7 +81,7 @@
/* SECTION: lwip, a lighwight TCP/IP protocol stack */ /* SECTION: lwip, a lighwight TCP/IP protocol stack */
/* Using lighweight TCP/IP protocol stack*/ /* Using lighweight TCP/IP protocol stack*/
#define RT_USING_LWIP //#define RT_USING_LWIP
/* Trace LwIP protocol*/ /* Trace LwIP protocol*/
/* #define RT_LWIP_DEBUG */ /* #define RT_LWIP_DEBUG */
@ -139,7 +139,7 @@
#define RT_LWIP_MSKADDR3 0 #define RT_LWIP_MSKADDR3 0
/* SECTION: DFS options */ /* SECTION: DFS options */
#define RT_USING_DFS //#define RT_USING_DFS
/* the max number of mounted filesystem */ /* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 1 #define DFS_FILESYSTEMS_MAX 1
/* the max number of opened files */ /* the max number of opened files */

0
libcpu/arm/AT91SAM7X/sam7x_emac.c → bsp/sam7x/sam7x_emac.c
View File

0
libcpu/arm/AT91SAM7X/sam7x_emac.h → bsp/sam7x/sam7x_emac.h
View File

0
libcpu/arm/AT91SAM7X/serial.c → bsp/sam7x/serial.c
View File

0
libcpu/arm/AT91SAM7X/serial.h → bsp/sam7x/serial.h
View File

1
bsp/sam7x/startup.c
View File

@ -15,7 +15,6 @@
#include <rthw.h> #include <rthw.h>
#include <rtthread.h> #include <rtthread.h>
#include <AT91SAM7X.h>
#include "board.h" #include "board.h"
#ifdef RT_USING_DFS #ifdef RT_USING_DFS

1
include/rtthread.h
View File

@ -112,6 +112,7 @@ rt_err_t rt_thread_control(rt_thread_t thread, rt_uint8_t cmd, void* arg);
rt_err_t rt_thread_suspend(rt_thread_t thread); rt_err_t rt_thread_suspend(rt_thread_t thread);
rt_err_t rt_thread_resume(rt_thread_t thread); rt_err_t rt_thread_resume(rt_thread_t thread);
void rt_thread_timeout(void* parameter); void rt_thread_timeout(void* parameter);
void rt_thread_exit(void);
/* /*
* idle thread interface * idle thread interface

2
libcpu/arm/AT91SAM7X/cpu.c
View File

@ -13,7 +13,7 @@
*/ */
#include <rtthread.h> #include <rtthread.h>
#include "AT91SAM7X.h"
/** /**
* @addtogroup AT91SAM7X * @addtogroup AT91SAM7X

14
libcpu/arm/AT91SAM7X/interrupt.c
View File

@ -13,7 +13,7 @@
*/ */
#include <rtthread.h> #include <rtthread.h>
#include "AT91SAM7X.h" #include "AT91SAM7X256.h"
#define MAX_HANDLERS 32 #define MAX_HANDLERS 32
@ -41,7 +41,7 @@ void rt_hw_interrupt_init()
for (index = 0; index < MAX_HANDLERS; index ++) for (index = 0; index < MAX_HANDLERS; index ++)
{ {
AT91C_AIC_SVR(index) = (rt_uint32_t)rt_hw_interrupt_handler; AT91C_BASE_AIC->AIC_SVR[index] = (rt_uint32_t)rt_hw_interrupt_handler;
} }
/* init interrupt nest, and context in thread sp */ /* init interrupt nest, and context in thread sp */
@ -58,10 +58,10 @@ void rt_hw_interrupt_init()
void rt_hw_interrupt_mask(int vector) void rt_hw_interrupt_mask(int vector)
{ {
/* disable interrupt */ /* disable interrupt */
AT91C_AIC_IDCR = 1 << vector; AT91C_BASE_AIC->AIC_IDCR = 1 << vector;
/* clear interrupt */ /* clear interrupt */
AT91C_AIC_ICCR = 1 << vector; AT91C_BASE_AIC->AIC_ICCR = 1 << vector;
} }
/** /**
@ -70,7 +70,7 @@ void rt_hw_interrupt_mask(int vector)
*/ */
void rt_hw_interrupt_umask(int vector) void rt_hw_interrupt_umask(int vector)
{ {
AT91C_AIC_IECR = 1 << vector; AT91C_BASE_AIC->AIC_IECR = 1 << vector;
} }
/** /**
@ -83,8 +83,8 @@ void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_ha
{ {
if(vector >= 0 && vector < MAX_HANDLERS) if(vector >= 0 && vector < MAX_HANDLERS)
{ {
if (*old_handler != RT_NULL) *old_handler = (rt_isr_handler_t)AT91C_AIC_SVR(vector); if (*old_handler != RT_NULL) *old_handler = (rt_isr_handler_t)AT91C_BASE_AIC->AIC_SVR[vector];
if (new_handler != RT_NULL) AT91C_AIC_SVR(vector) = (rt_uint32_t)new_handler; if (new_handler != RT_NULL) AT91C_BASE_AIC->AIC_SVR[vector] = (rt_uint32_t)new_handler;
} }
} }

3
libcpu/arm/AT91SAM7X/stack.c
View File

@ -12,7 +12,8 @@
* 2006-08-23 Bernard the first version * 2006-08-23 Bernard the first version
*/ */
#include <rtthread.h> #include <rtthread.h>
#include "AT91SAM7X.h"
#define SVCMODE 0x13
/** /**
* @addtogroup AT91SAM7 * @addtogroup AT91SAM7

29
libcpu/arm/AT91SAM7X/start_rvds.S
View File

@ -27,6 +27,7 @@
; Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs ; Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs
; 2009-12-28 MingBai Bug fix (USR mode stack removed). ; 2009-12-28 MingBai Bug fix (USR mode stack removed).
; 2009-12-29 MingBai Merge svc and irq stack, add abort handler.
Mode_USR EQU 0x10 Mode_USR EQU 0x10
Mode_FIQ EQU 0x11 Mode_FIQ EQU 0x11
@ -55,7 +56,7 @@ RAM_BASE EQU 0x00200000
;// </h> ;// </h>
UND_Stack_Size EQU 0x00000000 UND_Stack_Size EQU 0x00000000
SVC_Stack_Size EQU 0x00000100 SVC_Stack_Size EQU 0x00000000
ABT_Stack_Size EQU 0x00000000 ABT_Stack_Size EQU 0x00000000
FIQ_Stack_Size EQU 0x00000000 FIQ_Stack_Size EQU 0x00000000
IRQ_Stack_Size EQU 0x00000100 IRQ_Stack_Size EQU 0x00000100
@ -238,8 +239,8 @@ FIQ_Addr DCD FIQ_Handler
Undef_Handler B Undef_Handler Undef_Handler B Undef_Handler
SWI_Handler B SWI_Handler SWI_Handler B SWI_Handler
PAbt_Handler B PAbt_Handler PAbt_Handler B Abort_Handler
DAbt_Handler B DAbt_Handler DAbt_Handler B Abort_Handler
FIQ_Handler B FIQ_Handler FIQ_Handler B FIQ_Handler
@ -365,22 +366,22 @@ MC_RCR EQU 0x00 ; MC_RCR Offset
; Enter Undefined Instruction Mode and set its Stack Pointer ; Enter Undefined Instruction Mode and set its Stack Pointer
MSR CPSR_c, #Mode_UND:OR:I_Bit:OR:F_Bit MSR CPSR_c, #Mode_UND:OR:I_Bit:OR:F_Bit
MOV SP, R0 MOV SP, R0
SUB R0, R0, #UND_Stack_Size ;SUB R0, R0, #UND_Stack_Size
; Enter Abort Mode and set its Stack Pointer ; Enter Abort Mode and set its Stack Pointer
MSR CPSR_c, #Mode_ABT:OR:I_Bit:OR:F_Bit MSR CPSR_c, #Mode_ABT:OR:I_Bit:OR:F_Bit
MOV SP, R0 MOV SP, R0
SUB R0, R0, #ABT_Stack_Size ;SUB R0, R0, #ABT_Stack_Size
; Enter FIQ Mode and set its Stack Pointer ; Enter FIQ Mode and set its Stack Pointer
MSR CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit MSR CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit
MOV SP, R0 MOV SP, R0
SUB R0, R0, #FIQ_Stack_Size ;SUB R0, R0, #FIQ_Stack_Size
; Enter IRQ Mode and set its Stack Pointer ; Enter IRQ Mode and set its Stack Pointer
MSR CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit MSR CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit
MOV SP, R0 MOV SP, R0
SUB R0, R0, #IRQ_Stack_Size ;SUB R0, R0, #IRQ_Stack_Size
; Enter Supervisor Mode and set its Stack Pointer ; Enter Supervisor Mode and set its Stack Pointer
MSR CPSR_c, #Mode_SVC:OR:I_Bit:OR:F_Bit MSR CPSR_c, #Mode_SVC:OR:I_Bit:OR:F_Bit
@ -414,6 +415,16 @@ MC_RCR EQU 0x00 ; MC_RCR Offset
IMPORT rt_interrupt_from_thread IMPORT rt_interrupt_from_thread
IMPORT rt_interrupt_to_thread IMPORT rt_interrupt_to_thread
IMPORT rt_hw_trap_irq IMPORT rt_hw_trap_irq
IMPORT rt_hw_trap_abort
Abort_Handler PROC
EXPORT Abort_Handler
stmfd sp!, {r0-r12,lr}
bl rt_interrupt_enter
bl rt_hw_trap_abort
bl rt_interrupt_leave
b SWITCH
ENDP
IRQ_Handler PROC IRQ_Handler PROC
EXPORT IRQ_Handler EXPORT IRQ_Handler
@ -424,7 +435,7 @@ IRQ_Handler PROC
; if rt_thread_switch_interrput_flag set, jump to ; if rt_thread_switch_interrput_flag set, jump to
; rt_hw_context_switch_interrupt_do and don't return ; rt_hw_context_switch_interrupt_do and don't return
LDR r0, =rt_thread_switch_interrput_flag SWITCH LDR r0, =rt_thread_switch_interrput_flag
LDR r1, [r0] LDR r1, [r0]
CMP r1, #1 CMP r1, #1
BEQ rt_hw_context_switch_interrupt_do BEQ rt_hw_context_switch_interrupt_do
@ -492,7 +503,7 @@ rt_hw_context_switch_interrupt_do PROC
__user_initial_stackheap __user_initial_stackheap
LDR R0, = Heap_Mem LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + SVC_Stack_Size) LDR R1, = (Stack_Mem + IRQ_Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size) LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem LDR R3, = Stack_Mem
BX LR BX LR

14
libcpu/arm/AT91SAM7X/trap.c
View File

@ -15,7 +15,7 @@
#include <rtthread.h> #include <rtthread.h>
#include <rthw.h> #include <rthw.h>
#include "AT91SAM7X.h" #include "AT91SAM7X256.h"
/** /**
* @addtogroup AT91SAM7 * @addtogroup AT91SAM7
@ -24,12 +24,12 @@
void rt_hw_trap_irq() void rt_hw_trap_irq()
{ {
rt_isr_handler_t hander = (rt_isr_handler_t)AT91C_AIC_IVR; rt_isr_handler_t hander = (rt_isr_handler_t)AT91C_BASE_AIC->AIC_IVR;
hander(AT91C_AIC_ISR); hander(AT91C_BASE_AIC->AIC_ISR);
/* end of interrupt */ /* end of interrupt */
AT91C_AIC_EOICR = 0; AT91C_BASE_AIC->AIC_EOICR = 0;
} }
void rt_hw_trap_fiq() void rt_hw_trap_fiq()
@ -37,4 +37,10 @@ void rt_hw_trap_fiq()
rt_kprintf("fast interrupt request\n"); rt_kprintf("fast interrupt request\n");
} }
extern void rt_thread_exit(void);
void rt_hw_trap_abort()
{
rt_thread_exit();
rt_kprintf("Abort occured, thread terminated.\n");
}
/*@}*/ /*@}*/

3
src/thread.c
View File

@ -34,7 +34,6 @@ extern rt_uint8_t rt_current_priority;
extern rt_list_t rt_thread_defunct; extern rt_list_t rt_thread_defunct;
#endif #endif
static void rt_thread_exit(void);
void rt_thread_timeout(void* parameter); void rt_thread_timeout(void* parameter);
static rt_err_t _rt_thread_init(struct rt_thread* thread, static rt_err_t _rt_thread_init(struct rt_thread* thread,
@ -223,7 +222,7 @@ rt_err_t rt_thread_startup (rt_thread_t thread)
return RT_EOK; return RT_EOK;
} }
static void rt_thread_exit() void rt_thread_exit()
{ {
struct rt_thread* thread; struct rt_thread* thread;
register rt_base_t temp; register rt_base_t temp;