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[bsp]Mini optimized the drv_sound.c 

1.  "tx_fifo = rt_calloc(1, TX_FIFO_SIZE); "  , so deleted the line "rt_memset(tx_fifo, 0, TX_FIFO_SIZE);"
2. " rx_fifo = rt_calloc(1, TX_FIFO_SIZE); "  , so deleted the line "rt_memset(rx_fifo, 0, TX_FIFO_SIZE);"
This commit is contained in:
David Lin 2021-02-08 11:57:50 +08:00 committed by GitHub
parent 21ebf93e20
commit 79267212ef
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 3 additions and 5 deletions
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8
bsp/bluetrum/ab32vg1-ab-prougen/board/ports/audio/drv_sound.c
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@ -43,18 +43,18 @@ void adpll_init(uint8_t out_spr)
PLL1CON |= BIT(18); //pll1 sdm enable PLL1CON |= BIT(18); //pll1 sdm enable
if (out_spr) { if (out_spr) {
CLKCON2 |= BIT(4) | BIT(7); //adpll_div = 10 CLKCON2 |= BIT(4) | BIT(7); //adpll_div = 10
PLL1DIV = (245.76 * 65536) / 26; //245.76Mhz for 48K PLL1DIV = (245.76 * 65536) / 26; //245.76Mhz for 48K
// sys.aupll_type = 1; // sys.aupll_type = 1;
} else { } else {
CLKCON2 |= BIT(5) | BIT(7); //adpll_div = 11 CLKCON2 |= BIT(5) | BIT(7); //adpll_div = 11
PLL1DIV = (248.3712 * 65536) / 26; //248.3712MHz for 44.1k PLL1DIV = (248.3712 * 65536) / 26; //248.3712MHz for 44.1k
// sys.aupll_type = 0; // sys.aupll_type = 0;
} }
hal_mdelay(1); hal_mdelay(1);
PLL1CON |= BIT(20); //update pll1div PLL1CON |= BIT(20); //update pll1div
PLL1CON |= BIT(6); //enable analog pll1 PLL1CON |= BIT(6); //enable analog pll1
hal_mdelay(1); //wait pll1 stable hal_mdelay(1); //wait pll1 stable
} }
void dac_start(void) void dac_start(void)
@ -453,7 +453,6 @@ static int rt_hw_sound_init(void)
return -RT_ENOMEM; return -RT_ENOMEM;
} }
rt_memset(tx_fifo, 0, TX_FIFO_SIZE);
snd_dev.tx_fifo = tx_fifo; snd_dev.tx_fifo = tx_fifo;
/* 分配 DMA 搬运 buffer */ /* 分配 DMA 搬运 buffer */
@ -463,7 +462,6 @@ static int rt_hw_sound_init(void)
return -RT_ENOMEM; return -RT_ENOMEM;
} }
rt_memset(rx_fifo, 0, TX_FIFO_SIZE);
snd_dev.rx_fifo = rx_fifo; snd_dev.rx_fifo = rx_fifo;
/* init default configuration */ /* init default configuration */