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https://github.com/RT-Thread/rt-thread.git
synced 2025-02-28 01:57:05 +08:00
feat : 完成PWM驱动移植与自测
1. 添加PWM测试代码 2. 修正PWM驱动周期与脉冲错误问题
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1a01951a57
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776398d4d6
@ -103,46 +103,43 @@ static rt_err_t drv_pwm_enable(TIM_Module* TIMx, struct rt_pwm_configuration *co
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{
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{
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if(channel == 1)
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if(channel == 1)
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{
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{
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TIM_SelectOcMode(TIMx, TIM_CH_1, TIM_OCMODE_INACTIVE);
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TIM_EnableCapCmpCh(TIMx, TIM_CH_1, TIM_CAP_CMP_DISABLE);
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}
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}
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else if(channel == 2)
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else if(channel == 2)
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{
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{
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TIM_SelectOcMode(TIMx, TIM_CH_2, TIM_OCMODE_INACTIVE);
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TIM_EnableCapCmpCh(TIMx, TIM_CH_2, TIM_CAP_CMP_DISABLE);
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}
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}
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else if(channel == 3)
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else if(channel == 3)
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{
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{
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TIM_SelectOcMode(TIMx, TIM_CH_3, TIM_OCMODE_INACTIVE);
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TIM_EnableCapCmpCh(TIMx, TIM_CH_3, TIM_CAP_CMP_DISABLE);
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}
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}
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else if(channel == 4)
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else if(channel == 4)
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{
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{
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TIM_SelectOcMode(TIMx, TIM_CH_4, TIM_OCMODE_INACTIVE);
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TIM_EnableCapCmpCh(TIMx, TIM_CH_4, TIM_CAP_CMP_DISABLE);
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}
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}
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}
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}
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else
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else
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{
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{
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if(channel == 1)
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if(channel == 1)
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{
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{
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TIM_SelectOcMode(TIMx, TIM_CH_1, TIM_OCMODE_ACTIVE);
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TIM_EnableCapCmpCh(TIMx, TIM_CH_1, TIM_CAP_CMP_ENABLE);
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}
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}
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else if(channel == 2)
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else if(channel == 2)
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{
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{
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TIM_SelectOcMode(TIMx, TIM_CH_2, TIM_OCMODE_ACTIVE);
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TIM_EnableCapCmpCh(TIMx, TIM_CH_2, TIM_CAP_CMP_ENABLE);
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}
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}
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else if(channel == 3)
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else if(channel == 3)
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{
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{
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TIM_SelectOcMode(TIMx, TIM_CH_3, TIM_OCMODE_ACTIVE);
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TIM_EnableCapCmpCh(TIMx, TIM_CH_3, TIM_CAP_CMP_ENABLE);
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}
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}
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else if(channel == 4)
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else if(channel == 4)
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{
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{
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TIM_SelectOcMode(TIMx, TIM_CH_4, TIM_OCMODE_ACTIVE);
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TIM_EnableCapCmpCh(TIMx, TIM_CH_4, TIM_CAP_CMP_ENABLE);
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}
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}
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}
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}
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/* TIMx enable counter */
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TIM_Enable(TIMx, ENABLE);
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TIM_Enable(TIMx, ENABLE);
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rt_kprintf("2222222 ch=[%d], en=[%d]\n", channel, enable);
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return RT_EOK;
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return RT_EOK;
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}
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}
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@ -176,31 +173,38 @@ static rt_err_t drv_pwm_get(TIM_Module* TIMx, struct rt_pwm_configuration *confi
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if(channel == 4)
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if(channel == 4)
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configuration->pulse = (cc4 + 1) * (div + 1) * 1000UL / tim_clock;
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configuration->pulse = (cc4 + 1) * (div + 1) * 1000UL / tim_clock;
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rt_kprintf("33333333 ch=[%d], tim_clock=[%d], pulse=[%d]\n", channel, tim_clock, configuration->pulse);
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return RT_EOK;
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return RT_EOK;
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}
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}
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static rt_err_t drv_pwm_set(TIM_Module* TIMx, struct rt_pwm_configuration *configuration)
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static rt_err_t drv_pwm_set(TIM_Module* TIMx, struct rt_pwm_configuration *configuration)
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{
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{
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TIM_TimeBaseInitType TIM_TIMeBaseStructure;
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OCInitType TIM_OCInitStructure;
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rt_uint32_t period, pulse;
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rt_uint64_t psc;
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/* Get the channel number */
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rt_uint32_t channel = configuration->channel;
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/* Init timer pin and enable clock */
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/* Init timer pin and enable clock */
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n32_msp_tim_init(TIMx);
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n32_msp_tim_init(TIMx);
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/* Convert nanosecond to frequency and duty cycle. */
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RCC_ClocksType RCC_Clock;
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period = (unsigned long long)configuration->period ;
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RCC_GetClocksFreqValue(&RCC_Clock);
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psc = period / MAX_PERIOD + 1;
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rt_uint64_t input_clock;
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period = period / psc;
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if ((TIM1 == TIMx) || (TIM8 == TIMx))
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{
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RCC_ConfigTim18Clk(RCC_TIM18CLK_SRC_SYSCLK);
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input_clock = RCC_Clock.SysclkFreq;
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}
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else
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{
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if (1 == (RCC_Clock.HclkFreq/RCC_Clock.Pclk1Freq))
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input_clock = RCC_Clock.Pclk1Freq;
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else
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input_clock = RCC_Clock.Pclk1Freq * 2;
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}
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rt_kprintf("444444 period=[%d], psc=[%d], channel=[%d]\n", period, psc, channel);
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/* Convert nanosecond to frequency and duty cycle. */
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rt_uint32_t period = (unsigned long long)configuration->period ;
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rt_uint64_t psc = period / MAX_PERIOD + 1;
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period = period / psc;
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psc = psc * (input_clock / 1000000);
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/* TIMe base configuration */
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/* TIMe base configuration */
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TIM_TimeBaseInitType TIM_TIMeBaseStructure;
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TIM_InitTimBaseStruct(&TIM_TIMeBaseStructure);
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TIM_InitTimBaseStruct(&TIM_TIMeBaseStructure);
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TIM_TIMeBaseStructure.Period = period;
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TIM_TIMeBaseStructure.Period = period;
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TIM_TIMeBaseStructure.Prescaler = psc - 1;
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TIM_TIMeBaseStructure.Prescaler = psc - 1;
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@ -208,14 +212,16 @@ static rt_err_t drv_pwm_set(TIM_Module* TIMx, struct rt_pwm_configuration *confi
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TIM_TIMeBaseStructure.CntMode = TIM_CNT_MODE_UP;
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TIM_TIMeBaseStructure.CntMode = TIM_CNT_MODE_UP;
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TIM_InitTimeBase(TIMx, &TIM_TIMeBaseStructure);
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TIM_InitTimeBase(TIMx, &TIM_TIMeBaseStructure);
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pulse = (unsigned long long)configuration->pulse;
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rt_uint32_t pulse = (unsigned long long)configuration->pulse;
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/* PWM1 Mode configuration: Channel1 */
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/* PWM1 Mode configuration: Channel1 */
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OCInitType TIM_OCInitStructure;
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TIM_InitOcStruct(&TIM_OCInitStructure);
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TIM_InitOcStruct(&TIM_OCInitStructure);
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TIM_OCInitStructure.OcMode = TIM_OCMODE_PWM1;
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TIM_OCInitStructure.OcMode = TIM_OCMODE_PWM1;
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TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
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TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
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TIM_OCInitStructure.Pulse = pulse;
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TIM_OCInitStructure.Pulse = pulse;
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TIM_OCInitStructure.OcPolarity = TIM_OC_POLARITY_HIGH;
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TIM_OCInitStructure.OcPolarity = TIM_OC_POLARITY_HIGH;
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rt_uint32_t channel = configuration->channel;
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if(channel == 1)
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if(channel == 1)
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{
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{
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TIM_InitOc1(TIMx, &TIM_OCInitStructure);
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TIM_InitOc1(TIMx, &TIM_OCInitStructure);
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@ -238,11 +244,7 @@ static rt_err_t drv_pwm_set(TIM_Module* TIMx, struct rt_pwm_configuration *confi
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}
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}
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TIM_ConfigArPreload(TIMx, ENABLE);
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TIM_ConfigArPreload(TIMx, ENABLE);
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TIM_EnableCtrlPwmOutputs(TIMx, ENABLE);
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if(TIMx == TIM1 || TIMx == TIM8)
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{
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TIM_EnableCtrlPwmOutputs(TIMx,ENABLE);
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}
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return RT_EOK;
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return RT_EOK;
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}
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}
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@ -251,7 +253,6 @@ static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg
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{
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{
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struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
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struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
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TIM_Module *TIMx = (TIM_Module *)device->parent.user_data;
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TIM_Module *TIMx = (TIM_Module *)device->parent.user_data;
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rt_kprintf("11111111111\n");
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switch (cmd)
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switch (cmd)
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{
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{
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@ -270,8 +271,6 @@ static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg
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static int rt_hw_pwm_init(void)
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static int rt_hw_pwm_init(void)
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{
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{
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rt_kprintf("??????\n");
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int i = 0;
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int i = 0;
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int result = RT_EOK;
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int result = RT_EOK;
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@ -286,7 +285,6 @@ static int rt_hw_pwm_init(void)
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LOG_D("%s register failed", n32_pwm_obj[i].name);
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LOG_D("%s register failed", n32_pwm_obj[i].name);
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result = -RT_ERROR;
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result = -RT_ERROR;
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}
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}
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rt_kprintf("00000 i=[%d]\n", i);
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}
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}
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return result;
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return result;
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@ -162,35 +162,35 @@ void n32_msp_tim_init(void *Instance)
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GPIO_InitStruct(&GPIO_InitCtlStructure);
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GPIO_InitStruct(&GPIO_InitCtlStructure);
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TIM_Module *TIMx = (TIM_Module *)Instance;
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TIM_Module *TIMx = (TIM_Module *)Instance;
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// if(TIMx == TIM1)
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if(TIMx == TIM1)
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// {
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{
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// /* TIM1 clock enable */
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/* TIM1 clock enable */
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// RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM1, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM1, ENABLE);
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// /* GPIOA clock enable */
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/* GPIOA clock enable */
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// RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
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//
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// /* GPIOA Configuration:TIM1 Channel1 and Channel4 as alternate function push-pull */
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// GPIO_InitCtlStructure.Pin = GPIO_PIN_8 | GPIO_PIN_11;
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// GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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// GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
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//
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// GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
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// }
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// if(TIMx == TIM2)
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/* GPIOA Configuration:TIM1 Channel1 and Channel4 as alternate function push-pull */
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// {
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GPIO_InitCtlStructure.Pin = GPIO_PIN_8 | GPIO_PIN_11;
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// /* TIM2 clock enable */
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GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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// RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM2, ENABLE);
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GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
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// /* GPIOA clock enable */
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// RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
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//
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}
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// /* GPIOA Configuration:TIM2 Channel1 and Channel2 as alternate function push-pull */
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// GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1;
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if(TIMx == TIM2)
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// GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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{
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// GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
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/* TIM2 clock enable */
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//
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM2, ENABLE);
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// GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
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/* GPIOA clock enable */
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// }
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
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/* GPIOA Configuration:TIM2 Channel1 and Channel2 as alternate function push-pull */
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GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1;
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GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
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}
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if(TIMx == TIM3)
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if(TIMx == TIM3)
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{
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{
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@ -341,7 +341,7 @@ void n32_msp_can_init(void *Instance)
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#ifdef RT_USING_FINSH
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#ifdef RT_USING_FINSH
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#include <finsh.h>
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#include <finsh.h>
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#ifdef BSP_USING_UART
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#if defined(BSP_USING_UART2) || defined(BSP_USING_UART3)
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static void uart_test_rw(rt_device_t uartx, const char *name)
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static void uart_test_rw(rt_device_t uartx, const char *name)
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{
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{
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if (uartx == NULL)
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if (uartx == NULL)
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@ -488,16 +488,31 @@ static int pwm_set_test(const char *name, int ch,
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rt_pwm_enable(pwm_dev, ch);
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rt_pwm_enable(pwm_dev, ch);
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return RT_EOK;
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return RT_EOK;
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}
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}
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#define PWM_TEST_NAME_CH_1 "tim3pwm1"
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#define PWM_TEST_NAME_CH_2 "tim3pwm2"
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#define PWM_TEST_NAME_CH_3 "tim3pwm3"
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#define PWM_TEST_NAME_CH_4 "tim3pwm4"
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static int pwm_led_sample(int argc, char *argv[])
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static int pwm_led_sample(int argc, char *argv[])
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{
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{
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pwm_set_test("tim3pwm1", 1, 1000, 200);
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pwm_set_test(PWM_TEST_NAME_CH_1, 1, 1000, 200);
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pwm_set_test("tim3pwm2", 2, 1000, 400);
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pwm_set_test(PWM_TEST_NAME_CH_2, 2, 1000, 400);
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pwm_set_test("tim3pwm3", 3, 1000, 600);
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pwm_set_test(PWM_TEST_NAME_CH_3, 3, 1000, 600);
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pwm_set_test("tim3pwm4", 4, 1000, 700);
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pwm_set_test(PWM_TEST_NAME_CH_4, 4, 1000, 700);
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return RT_EOK;
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return RT_EOK;
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}
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}
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/* 导出到 msh 命令列表中 */
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MSH_CMD_EXPORT(pwm_led_sample, pwm sample);
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MSH_CMD_EXPORT(pwm_led_sample, pwm sample);
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static int pwm_led_sample_off(int argc, char *argv[])
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{
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struct rt_device_pwm *pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_TEST_NAME_CH_1);
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if (pwm_dev == RT_NULL)
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{
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rt_kprintf("pwm sample run failed! can't find %s device!\n", PWM_TEST_NAME_CH_1);
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return RT_ERROR;
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}
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rt_pwm_disable(pwm_dev, 1);
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return RT_EOK;
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}
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MSH_CMD_EXPORT(pwm_led_sample_off, pwm sample off);
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#endif
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#endif
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#endif
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#endif
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