From 776398d4d62f92c222037dddf66617b14683c7a4 Mon Sep 17 00:00:00 2001 From: linyuanbo_breo_server Date: Tue, 24 Aug 2021 07:35:33 +0000 Subject: [PATCH] =?UTF-8?q?feat=20:=20=E5=AE=8C=E6=88=90PWM=E9=A9=B1?= =?UTF-8?q?=E5=8A=A8=E7=A7=BB=E6=A4=8D=E4=B8=8E=E8=87=AA=E6=B5=8B?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 1. 添加PWM测试代码 2. 修正PWM驱动周期与脉冲错误问题 --- bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c | 68 ++++++++------- .../n32g452xx-mini-system/board/msp/n32_msp.c | 83 +++++++++++-------- 2 files changed, 82 insertions(+), 69 deletions(-) diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c index 3d358d32e1..0382da58cd 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c @@ -103,46 +103,43 @@ static rt_err_t drv_pwm_enable(TIM_Module* TIMx, struct rt_pwm_configuration *co { if(channel == 1) { - TIM_SelectOcMode(TIMx, TIM_CH_1, TIM_OCMODE_INACTIVE); + TIM_EnableCapCmpCh(TIMx, TIM_CH_1, TIM_CAP_CMP_DISABLE); } else if(channel == 2) { - TIM_SelectOcMode(TIMx, TIM_CH_2, TIM_OCMODE_INACTIVE); + TIM_EnableCapCmpCh(TIMx, TIM_CH_2, TIM_CAP_CMP_DISABLE); } else if(channel == 3) { - TIM_SelectOcMode(TIMx, TIM_CH_3, TIM_OCMODE_INACTIVE); + TIM_EnableCapCmpCh(TIMx, TIM_CH_3, TIM_CAP_CMP_DISABLE); } else if(channel == 4) { - TIM_SelectOcMode(TIMx, TIM_CH_4, TIM_OCMODE_INACTIVE); + TIM_EnableCapCmpCh(TIMx, TIM_CH_4, TIM_CAP_CMP_DISABLE); } } else { if(channel == 1) { - TIM_SelectOcMode(TIMx, TIM_CH_1, TIM_OCMODE_ACTIVE); + TIM_EnableCapCmpCh(TIMx, TIM_CH_1, TIM_CAP_CMP_ENABLE); } else if(channel == 2) { - TIM_SelectOcMode(TIMx, TIM_CH_2, TIM_OCMODE_ACTIVE); + TIM_EnableCapCmpCh(TIMx, TIM_CH_2, TIM_CAP_CMP_ENABLE); } else if(channel == 3) { - TIM_SelectOcMode(TIMx, TIM_CH_3, TIM_OCMODE_ACTIVE); + TIM_EnableCapCmpCh(TIMx, TIM_CH_3, TIM_CAP_CMP_ENABLE); } else if(channel == 4) { - TIM_SelectOcMode(TIMx, TIM_CH_4, TIM_OCMODE_ACTIVE); + TIM_EnableCapCmpCh(TIMx, TIM_CH_4, TIM_CAP_CMP_ENABLE); } } - /* TIMx enable counter */ TIM_Enable(TIMx, ENABLE); - rt_kprintf("2222222 ch=[%d], en=[%d]\n", channel, enable); - return RT_EOK; } @@ -176,31 +173,38 @@ static rt_err_t drv_pwm_get(TIM_Module* TIMx, struct rt_pwm_configuration *confi if(channel == 4) configuration->pulse = (cc4 + 1) * (div + 1) * 1000UL / tim_clock; - rt_kprintf("33333333 ch=[%d], tim_clock=[%d], pulse=[%d]\n", channel, tim_clock, configuration->pulse); - return RT_EOK; } static rt_err_t drv_pwm_set(TIM_Module* TIMx, struct rt_pwm_configuration *configuration) { - TIM_TimeBaseInitType TIM_TIMeBaseStructure; - OCInitType TIM_OCInitStructure; - rt_uint32_t period, pulse; - rt_uint64_t psc; - /* Get the channel number */ - rt_uint32_t channel = configuration->channel; - /* Init timer pin and enable clock */ n32_msp_tim_init(TIMx); - /* Convert nanosecond to frequency and duty cycle. */ - period = (unsigned long long)configuration->period ; - psc = period / MAX_PERIOD + 1; - period = period / psc; + RCC_ClocksType RCC_Clock; + RCC_GetClocksFreqValue(&RCC_Clock); + rt_uint64_t input_clock; + if ((TIM1 == TIMx) || (TIM8 == TIMx)) + { + RCC_ConfigTim18Clk(RCC_TIM18CLK_SRC_SYSCLK); + input_clock = RCC_Clock.SysclkFreq; + } + else + { + if (1 == (RCC_Clock.HclkFreq/RCC_Clock.Pclk1Freq)) + input_clock = RCC_Clock.Pclk1Freq; + else + input_clock = RCC_Clock.Pclk1Freq * 2; + } - rt_kprintf("444444 period=[%d], psc=[%d], channel=[%d]\n", period, psc, channel); + /* Convert nanosecond to frequency and duty cycle. */ + rt_uint32_t period = (unsigned long long)configuration->period ; + rt_uint64_t psc = period / MAX_PERIOD + 1; + period = period / psc; + psc = psc * (input_clock / 1000000); /* TIMe base configuration */ + TIM_TimeBaseInitType TIM_TIMeBaseStructure; TIM_InitTimBaseStruct(&TIM_TIMeBaseStructure); TIM_TIMeBaseStructure.Period = period; TIM_TIMeBaseStructure.Prescaler = psc - 1; @@ -208,14 +212,16 @@ static rt_err_t drv_pwm_set(TIM_Module* TIMx, struct rt_pwm_configuration *confi TIM_TIMeBaseStructure.CntMode = TIM_CNT_MODE_UP; TIM_InitTimeBase(TIMx, &TIM_TIMeBaseStructure); - pulse = (unsigned long long)configuration->pulse; + rt_uint32_t pulse = (unsigned long long)configuration->pulse; /* PWM1 Mode configuration: Channel1 */ + OCInitType TIM_OCInitStructure; TIM_InitOcStruct(&TIM_OCInitStructure); TIM_OCInitStructure.OcMode = TIM_OCMODE_PWM1; TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE; TIM_OCInitStructure.Pulse = pulse; TIM_OCInitStructure.OcPolarity = TIM_OC_POLARITY_HIGH; + rt_uint32_t channel = configuration->channel; if(channel == 1) { TIM_InitOc1(TIMx, &TIM_OCInitStructure); @@ -238,11 +244,7 @@ static rt_err_t drv_pwm_set(TIM_Module* TIMx, struct rt_pwm_configuration *confi } TIM_ConfigArPreload(TIMx, ENABLE); - - if(TIMx == TIM1 || TIMx == TIM8) - { - TIM_EnableCtrlPwmOutputs(TIMx,ENABLE); - } + TIM_EnableCtrlPwmOutputs(TIMx, ENABLE); return RT_EOK; } @@ -251,7 +253,6 @@ static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg { struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg; TIM_Module *TIMx = (TIM_Module *)device->parent.user_data; - rt_kprintf("11111111111\n"); switch (cmd) { @@ -270,8 +271,6 @@ static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg static int rt_hw_pwm_init(void) { - rt_kprintf("??????\n"); - int i = 0; int result = RT_EOK; @@ -286,7 +285,6 @@ static int rt_hw_pwm_init(void) LOG_D("%s register failed", n32_pwm_obj[i].name); result = -RT_ERROR; } - rt_kprintf("00000 i=[%d]\n", i); } return result; diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c index be73a668ff..09d2dd80bb 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c @@ -162,35 +162,35 @@ void n32_msp_tim_init(void *Instance) GPIO_InitStruct(&GPIO_InitCtlStructure); TIM_Module *TIMx = (TIM_Module *)Instance; -// if(TIMx == TIM1) -// { -// /* TIM1 clock enable */ -// RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM1, ENABLE); -// /* GPIOA clock enable */ -// RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); -// -// /* GPIOA Configuration:TIM1 Channel1 and Channel4 as alternate function push-pull */ -// GPIO_InitCtlStructure.Pin = GPIO_PIN_8 | GPIO_PIN_11; -// GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP; -// GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz; -// -// GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure); -// } + if(TIMx == TIM1) + { + /* TIM1 clock enable */ + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM1, ENABLE); + /* GPIOA clock enable */ + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); -// if(TIMx == TIM2) -// { -// /* TIM2 clock enable */ -// RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM2, ENABLE); -// /* GPIOA clock enable */ -// RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); -// -// /* GPIOA Configuration:TIM2 Channel1 and Channel2 as alternate function push-pull */ -// GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1; -// GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP; -// GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz; -// -// GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure); -// } + /* GPIOA Configuration:TIM1 Channel1 and Channel4 as alternate function push-pull */ + GPIO_InitCtlStructure.Pin = GPIO_PIN_8 | GPIO_PIN_11; + GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz; + + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure); + } + + if(TIMx == TIM2) + { + /* TIM2 clock enable */ + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM2, ENABLE); + /* GPIOA clock enable */ + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); + + /* GPIOA Configuration:TIM2 Channel1 and Channel2 as alternate function push-pull */ + GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1; + GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz; + + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure); + } if(TIMx == TIM3) { @@ -341,7 +341,7 @@ void n32_msp_can_init(void *Instance) #ifdef RT_USING_FINSH #include -#ifdef BSP_USING_UART +#if defined(BSP_USING_UART2) || defined(BSP_USING_UART3) static void uart_test_rw(rt_device_t uartx, const char *name) { if (uartx == NULL) @@ -488,16 +488,31 @@ static int pwm_set_test(const char *name, int ch, rt_pwm_enable(pwm_dev, ch); return RT_EOK; } +#define PWM_TEST_NAME_CH_1 "tim3pwm1" +#define PWM_TEST_NAME_CH_2 "tim3pwm2" +#define PWM_TEST_NAME_CH_3 "tim3pwm3" +#define PWM_TEST_NAME_CH_4 "tim3pwm4" static int pwm_led_sample(int argc, char *argv[]) { - pwm_set_test("tim3pwm1", 1, 1000, 200); - pwm_set_test("tim3pwm2", 2, 1000, 400); - pwm_set_test("tim3pwm3", 3, 1000, 600); - pwm_set_test("tim3pwm4", 4, 1000, 700); + pwm_set_test(PWM_TEST_NAME_CH_1, 1, 1000, 200); + pwm_set_test(PWM_TEST_NAME_CH_2, 2, 1000, 400); + pwm_set_test(PWM_TEST_NAME_CH_3, 3, 1000, 600); + pwm_set_test(PWM_TEST_NAME_CH_4, 4, 1000, 700); return RT_EOK; } -/* 导出到 msh 命令列表中 */ MSH_CMD_EXPORT(pwm_led_sample, pwm sample); +static int pwm_led_sample_off(int argc, char *argv[]) +{ + struct rt_device_pwm *pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_TEST_NAME_CH_1); + if (pwm_dev == RT_NULL) + { + rt_kprintf("pwm sample run failed! can't find %s device!\n", PWM_TEST_NAME_CH_1); + return RT_ERROR; + } + rt_pwm_disable(pwm_dev, 1); + return RT_EOK; +} +MSH_CMD_EXPORT(pwm_led_sample_off, pwm sample off); #endif #endif