diff --git a/bsp/bouffalo_lab/bl61x/.config b/bsp/bouffalo_lab/bl61x/.config
old mode 100755
new mode 100644
index a91ce5b8fb..032dd12360
--- a/bsp/bouffalo_lab/bl61x/.config
+++ b/bsp/bouffalo_lab/bl61x/.config
@@ -59,7 +59,6 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
#
# Memory Management
#
-CONFIG_RT_PAGE_MAX_ORDER=11
CONFIG_RT_USING_MEMPOOL=y
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
@@ -83,7 +82,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
-CONFIG_RT_VER_NUM=0x50000
+CONFIG_RT_VER_NUM=0x50001
# CONFIG_RT_USING_STDC_ATOMIC is not set
# CONFIG_RT_USING_CACHE is not set
# CONFIG_RT_USING_HW_ATOMIC is not set
@@ -118,6 +117,10 @@ CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10
+
+#
+# DFS: device virtual file system
+#
# CONFIG_RT_USING_DFS is not set
# CONFIG_RT_USING_FAL is not set
@@ -606,7 +609,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
-# CONFIG_PKG_USING_WM_LIBRARIES is not set
#
# Kendryte SDK
@@ -665,7 +667,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
-# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
# CONFIG_PKG_USING_RFM300 is not set
@@ -976,30 +977,93 @@ CONFIG_BSP_USING_ROMAPI=y
#
# General Drivers Configuration
#
-CONFIG_BSP_USING_GPIO=y
-# CONFIG_BSP_USING_ADC is not set
#
# General Purpose UARTs
#
CONFIG_BSP_USING_UART0=y
+# CONFIG_UART0_TX_USING_GPIO0 is not set
+# CONFIG_UART0_TX_USING_GPIO1 is not set
+# CONFIG_UART0_TX_USING_GPIO2 is not set
+# CONFIG_UART0_TX_USING_GPIO3 is not set
+# CONFIG_UART0_TX_USING_GPIO4 is not set
+# CONFIG_UART0_TX_USING_GPIO5 is not set
+# CONFIG_UART0_TX_USING_GPIO6 is not set
+# CONFIG_UART0_TX_USING_GPIO7 is not set
+# CONFIG_UART0_TX_USING_GPIO8 is not set
+# CONFIG_UART0_TX_USING_GPIO9 is not set
+# CONFIG_UART0_TX_USING_GPIO10 is not set
+# CONFIG_UART0_TX_USING_GPIO11 is not set
+# CONFIG_UART0_TX_USING_GPIO12 is not set
+# CONFIG_UART0_TX_USING_GPIO13 is not set
# CONFIG_UART0_TX_USING_GPIO14 is not set
+# CONFIG_UART0_TX_USING_GPIO15 is not set
# CONFIG_UART0_TX_USING_GPIO16 is not set
+# CONFIG_UART0_TX_USING_GPIO17 is not set
+# CONFIG_UART0_TX_USING_GPIO18 is not set
+# CONFIG_UART0_TX_USING_GPIO19 is not set
+# CONFIG_UART0_TX_USING_GPIO20 is not set
CONFIG_UART0_TX_USING_GPIO21=y
+# CONFIG_UART0_TX_USING_GPIO22 is not set
+# CONFIG_UART0_TX_USING_GPIO23 is not set
+# CONFIG_UART0_TX_USING_GPIO24 is not set
+# CONFIG_UART0_TX_USING_GPIO25 is not set
+# CONFIG_UART0_TX_USING_GPIO26 is not set
+# CONFIG_UART0_TX_USING_GPIO27 is not set
+# CONFIG_UART0_TX_USING_GPIO28 is not set
+# CONFIG_UART0_TX_USING_GPIO29 is not set
+# CONFIG_UART0_TX_USING_GPIO30 is not set
+# CONFIG_UART0_TX_USING_GPIO31 is not set
+# CONFIG_UART0_TX_USING_GPIO32 is not set
+# CONFIG_UART0_TX_USING_GPIO33 is not set
+# CONFIG_UART0_TX_USING_GPIO34 is not set
+# CONFIG_UART0_RX_USING_GPIO0 is not set
+# CONFIG_UART0_RX_USING_GPIO1 is not set
+# CONFIG_UART0_RX_USING_GPIO2 is not set
+# CONFIG_UART0_RX_USING_GPIO3 is not set
+# CONFIG_UART0_RX_USING_GPIO4 is not set
+# CONFIG_UART0_RX_USING_GPIO5 is not set
+# CONFIG_UART0_RX_USING_GPIO6 is not set
# CONFIG_UART0_RX_USING_GPIO7 is not set
+# CONFIG_UART0_RX_USING_GPIO8 is not set
+# CONFIG_UART0_RX_USING_GPIO9 is not set
+# CONFIG_UART0_RX_USING_GPIO10 is not set
+# CONFIG_UART0_RX_USING_GPIO11 is not set
+# CONFIG_UART0_RX_USING_GPIO12 is not set
+# CONFIG_UART0_RX_USING_GPIO13 is not set
+# CONFIG_UART0_RX_USING_GPIO14 is not set
# CONFIG_UART0_RX_USING_GPIO15 is not set
+# CONFIG_UART0_RX_USING_GPIO16 is not set
+# CONFIG_UART0_RX_USING_GPIO17 is not set
+# CONFIG_UART0_RX_USING_GPIO18 is not set
+# CONFIG_UART0_RX_USING_GPIO19 is not set
+# CONFIG_UART0_RX_USING_GPIO20 is not set
+# CONFIG_UART0_RX_USING_GPIO21 is not set
CONFIG_UART0_RX_USING_GPIO22=y
# CONFIG_UART0_RX_USING_GPIO23 is not set
-CONFIG_BSP_USING_UART1=y
-# CONFIG_UART1_TX_USING_GPIO4 is not set
-CONFIG_UART1_TX_USING_GPIO16=y
-# CONFIG_UART1_TX_USING_GPIO18 is not set
-# CONFIG_UART1_TX_USING_GPIO26 is not set
-# CONFIG_UART1_RX_USING_GPIO3 is not set
-# CONFIG_UART1_RX_USING_GPIO5 is not set
-CONFIG_UART1_RX_USING_GPIO17=y
-# CONFIG_UART1_RX_USING_GPIO19 is not set
-# CONFIG_UART1_RX_USING_GPIO27 is not set
+# CONFIG_UART0_RX_USING_GPIO24 is not set
+# CONFIG_UART0_RX_USING_GPIO25 is not set
+# CONFIG_UART0_RX_USING_GPIO26 is not set
+# CONFIG_UART0_RX_USING_GPIO27 is not set
+# CONFIG_UART0_RX_USING_GPIO28 is not set
+# CONFIG_UART0_RX_USING_GPIO29 is not set
+# CONFIG_UART0_RX_USING_GPIO30 is not set
+# CONFIG_UART0_RX_USING_GPIO31 is not set
+# CONFIG_UART0_RX_USING_GPIO32 is not set
+# CONFIG_UART0_RX_USING_GPIO33 is not set
+# CONFIG_UART0_RX_USING_GPIO34 is not set
+# CONFIG_BSP_USING_UART1 is not set
+# CONFIG_BSP_USING_GPIO is not set
+# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_RTC is not set
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_PWM is not set
+# CONFIG_BSP_USING_HWTIMER is not set
+
+#
+# General Purpose I2C
+#
+# CONFIG_BSP_USING_I2C1 is not set
+# CONFIG_BSP_USING_SPI is not set
+# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
+# CONFIG_BSP_USING_FS is not set
diff --git a/bsp/bouffalo_lab/bl61x/rtconfig.h b/bsp/bouffalo_lab/bl61x/rtconfig.h
index 1175315bd5..1dde34eb89 100644
--- a/bsp/bouffalo_lab/bl61x/rtconfig.h
+++ b/bsp/bouffalo_lab/bl61x/rtconfig.h
@@ -36,7 +36,6 @@
/* Memory Management */
-#define RT_PAGE_MAX_ORDER 11
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
@@ -48,7 +47,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
-#define RT_VER_NUM 0x50000
+#define RT_VER_NUM 0x50001
#define ARCH_RISCV
#define ARCH_RISCV_FPU
#define ARCH_RISCV_FPU_S
@@ -74,6 +73,9 @@
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
+/* DFS: device virtual file system */
+
+
/* Device Drivers */
#define RT_USING_DEVICE_IPC
@@ -227,15 +229,13 @@
/* General Drivers Configuration */
-#define BSP_USING_GPIO
-
/* General Purpose UARTs */
#define BSP_USING_UART0
#define UART0_TX_USING_GPIO21
#define UART0_RX_USING_GPIO22
-#define BSP_USING_UART1
-#define UART1_TX_USING_GPIO16
-#define UART1_RX_USING_GPIO17
+
+/* General Purpose I2C */
+
#endif
diff --git a/bsp/bouffalo_lab/bl808/d0/board/board.c b/bsp/bouffalo_lab/bl808/d0/board/board.c
index c2d2e73fa5..11da0d12d6 100644
--- a/bsp/bouffalo_lab/bl808/d0/board/board.c
+++ b/bsp/bouffalo_lab/bl808/d0/board/board.c
@@ -26,6 +26,7 @@ extern size_t MMUTable[];
struct mem_desc platform_mem_desc[] = {
{KERNEL_VADDR_START, (rt_size_t)RT_HW_PAGE_END - 1, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM},
+ {0x1000, ((KERNEL_VADDR_START - 1) & 0xfffff000) - 1, (rt_size_t)ARCH_MAP_FAILED, DEVICE_MEM},
};
#define NUM_MEM_DESC (sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]))
diff --git a/bsp/bouffalo_lab/bl808/m0/.config b/bsp/bouffalo_lab/bl808/m0/.config
index cce684d307..45591e475f 100644
--- a/bsp/bouffalo_lab/bl808/m0/.config
+++ b/bsp/bouffalo_lab/bl808/m0/.config
@@ -980,24 +980,108 @@ CONFIG_BSP_USING_PSRAM=y
#
# General Drivers Configuration
#
-CONFIG_BSP_USING_GPIO=y
-# CONFIG_BSP_USING_ADC is not set
#
# General Purpose UARTs
#
CONFIG_BSP_USING_UART0=y
+# CONFIG_UART0_TX_USING_GPIO0 is not set
+# CONFIG_UART0_TX_USING_GPIO1 is not set
+# CONFIG_UART0_TX_USING_GPIO2 is not set
+# CONFIG_UART0_TX_USING_GPIO3 is not set
+# CONFIG_UART0_TX_USING_GPIO4 is not set
+# CONFIG_UART0_TX_USING_GPIO5 is not set
+# CONFIG_UART0_TX_USING_GPIO6 is not set
+# CONFIG_UART0_TX_USING_GPIO7 is not set
+# CONFIG_UART0_TX_USING_GPIO8 is not set
+# CONFIG_UART0_TX_USING_GPIO9 is not set
+# CONFIG_UART0_TX_USING_GPIO10 is not set
+# CONFIG_UART0_TX_USING_GPIO11 is not set
+# CONFIG_UART0_TX_USING_GPIO12 is not set
+# CONFIG_UART0_TX_USING_GPIO13 is not set
CONFIG_UART0_TX_USING_GPIO14=y
+# CONFIG_UART0_TX_USING_GPIO15 is not set
# CONFIG_UART0_TX_USING_GPIO16 is not set
+# CONFIG_UART0_TX_USING_GPIO17 is not set
+# CONFIG_UART0_TX_USING_GPIO18 is not set
+# CONFIG_UART0_TX_USING_GPIO19 is not set
+# CONFIG_UART0_TX_USING_GPIO20 is not set
# CONFIG_UART0_TX_USING_GPIO21 is not set
+# CONFIG_UART0_TX_USING_GPIO22 is not set
+# CONFIG_UART0_TX_USING_GPIO23 is not set
+# CONFIG_UART0_TX_USING_GPIO24 is not set
+# CONFIG_UART0_TX_USING_GPIO25 is not set
+# CONFIG_UART0_TX_USING_GPIO26 is not set
+# CONFIG_UART0_TX_USING_GPIO27 is not set
+# CONFIG_UART0_TX_USING_GPIO28 is not set
+# CONFIG_UART0_TX_USING_GPIO29 is not set
+# CONFIG_UART0_TX_USING_GPIO30 is not set
+# CONFIG_UART0_TX_USING_GPIO31 is not set
+# CONFIG_UART0_TX_USING_GPIO32 is not set
+# CONFIG_UART0_TX_USING_GPIO33 is not set
+# CONFIG_UART0_TX_USING_GPIO34 is not set
+# CONFIG_UART0_TX_USING_GPIO35 is not set
+# CONFIG_UART0_TX_USING_GPIO36 is not set
+# CONFIG_UART0_TX_USING_GPIO37 is not set
+# CONFIG_UART0_TX_USING_GPIO38 is not set
+# CONFIG_UART0_TX_USING_GPIO39 is not set
+# CONFIG_UART0_TX_USING_GPIO44 is not set
+# CONFIG_UART0_TX_USING_GPIO45 is not set
+# CONFIG_UART0_RX_USING_GPIO0 is not set
+# CONFIG_UART0_RX_USING_GPIO1 is not set
+# CONFIG_UART0_RX_USING_GPIO2 is not set
+# CONFIG_UART0_RX_USING_GPIO3 is not set
+# CONFIG_UART0_RX_USING_GPIO4 is not set
+# CONFIG_UART0_RX_USING_GPIO5 is not set
+# CONFIG_UART0_RX_USING_GPIO6 is not set
# CONFIG_UART0_RX_USING_GPIO7 is not set
+# CONFIG_UART0_RX_USING_GPIO8 is not set
+# CONFIG_UART0_RX_USING_GPIO9 is not set
+# CONFIG_UART0_RX_USING_GPIO10 is not set
+# CONFIG_UART0_RX_USING_GPIO11 is not set
+# CONFIG_UART0_RX_USING_GPIO12 is not set
+# CONFIG_UART0_RX_USING_GPIO13 is not set
+# CONFIG_UART0_RX_USING_GPIO14 is not set
CONFIG_UART0_RX_USING_GPIO15=y
+# CONFIG_UART0_RX_USING_GPIO16 is not set
+# CONFIG_UART0_RX_USING_GPIO17 is not set
+# CONFIG_UART0_RX_USING_GPIO18 is not set
+# CONFIG_UART0_RX_USING_GPIO19 is not set
+# CONFIG_UART0_RX_USING_GPIO20 is not set
+# CONFIG_UART0_RX_USING_GPIO21 is not set
# CONFIG_UART0_RX_USING_GPIO22 is not set
# CONFIG_UART0_RX_USING_GPIO23 is not set
+# CONFIG_UART0_RX_USING_GPIO24 is not set
+# CONFIG_UART0_RX_USING_GPIO25 is not set
+# CONFIG_UART0_RX_USING_GPIO26 is not set
+# CONFIG_UART0_RX_USING_GPIO27 is not set
+# CONFIG_UART0_RX_USING_GPIO28 is not set
+# CONFIG_UART0_RX_USING_GPIO29 is not set
+# CONFIG_UART0_RX_USING_GPIO30 is not set
+# CONFIG_UART0_RX_USING_GPIO31 is not set
+# CONFIG_UART0_RX_USING_GPIO32 is not set
+# CONFIG_UART0_RX_USING_GPIO33 is not set
+# CONFIG_UART0_RX_USING_GPIO34 is not set
+# CONFIG_UART0_RX_USING_GPIO35 is not set
+# CONFIG_UART0_RX_USING_GPIO36 is not set
+# CONFIG_UART0_RX_USING_GPIO37 is not set
+# CONFIG_UART0_RX_USING_GPIO38 is not set
+# CONFIG_UART0_RX_USING_GPIO39 is not set
+# CONFIG_UART0_RX_USING_GPIO44 is not set
+# CONFIG_UART0_RX_USING_GPIO45 is not set
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_UART2 is not set
+# CONFIG_BSP_USING_GPIO is not set
+# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_RTC is not set
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_PWM is not set
# CONFIG_BSP_USING_HWTIMER is not set
+
+#
+# General Purpose I2C
+#
+# CONFIG_BSP_USING_I2C1 is not set
+# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
+# CONFIG_BSP_USING_FS is not set
diff --git a/bsp/bouffalo_lab/bl808/m0/rtconfig.h b/bsp/bouffalo_lab/bl808/m0/rtconfig.h
index 71d1b2d367..ca2aaee40d 100644
--- a/bsp/bouffalo_lab/bl808/m0/rtconfig.h
+++ b/bsp/bouffalo_lab/bl808/m0/rtconfig.h
@@ -234,12 +234,13 @@
/* General Drivers Configuration */
-#define BSP_USING_GPIO
-
/* General Purpose UARTs */
#define BSP_USING_UART0
#define UART0_TX_USING_GPIO14
#define UART0_RX_USING_GPIO15
+/* General Purpose I2C */
+
+
#endif
diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/arch/risc-v/t-head/csi_dsp/lib/libcsi_xt900p32f_dsp.a b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/arch/risc-v/t-head/csi_dsp/lib/libcsi_xt900p32f_dsp.a
new file mode 100755
index 0000000000..b6a033e08a
Binary files /dev/null and b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/arch/risc-v/t-head/csi_dsp/lib/libcsi_xt900p32f_dsp.a differ
diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/bflb_core.h b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/bflb_core.h
index 8f095c8023..e68737b854 100755
--- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/bflb_core.h
+++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/bflb_core.h
@@ -90,7 +90,7 @@ void assert_func(uint8_t *file, uint32_t line, uint8_t *function, uint8_t *strin
struct bflb_device_s {
const char *name;
- size_t reg_base;
+ uint32_t reg_base;
uint8_t irq_num;
uint8_t idx;
uint8_t sub_idx;
diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_gpio.c b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_gpio.c
index 43a91ed1db..b20e6717cb 100755
--- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_gpio.c
+++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_gpio.c
@@ -4,8 +4,8 @@
void bflb_gpio_init(struct bflb_device_s *dev, uint8_t pin, uint32_t cfgset)
{
uint32_t cfg = 0;
- size_t reg_base;
- size_t cfg_address;
+ uint32_t reg_base;
+ uint32_t cfg_address;
uint8_t drive;
uint8_t function;
uint16_t mode;
@@ -202,7 +202,7 @@ uint32_t bflb_gpio_pin32_63_read(struct bflb_device_s *dev)
void bflb_gpio_int_init(struct bflb_device_s *dev, uint8_t pin, uint8_t trig_mode)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t cfg_address;
uint32_t regval;
@@ -234,7 +234,7 @@ void bflb_gpio_int_init(struct bflb_device_s *dev, uint8_t pin, uint8_t trig_mod
void bflb_gpio_int_mask(struct bflb_device_s *dev, uint8_t pin, bool mask)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t cfg_address;
uint32_t regval;
@@ -272,7 +272,7 @@ bool bflb_gpio_get_intstatus(struct bflb_device_s *dev, uint8_t pin)
void bflb_gpio_int_clear(struct bflb_device_s *dev, uint8_t pin)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t cfg_address;
uint32_t regval;
@@ -298,7 +298,7 @@ void bflb_gpio_int_clear(struct bflb_device_s *dev, uint8_t pin)
void bflb_gpio_uart_init(struct bflb_device_s *dev, uint8_t pin, uint8_t uart_func)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t regval;
uint8_t sig;
uint8_t sig_pos;
@@ -412,7 +412,7 @@ void bflb_gpio_uart_init(struct bflb_device_s *dev, uint8_t pin, uint8_t uart_fu
int bflb_gpio_feature_control(struct bflb_device_s *dev, int cmd, size_t arg)
{
int ret = 0;
- size_t reg_base;
+ uint32_t reg_base;
uint32_t regval;
uint8_t pin = arg;
diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_uart.c b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_uart.c
index d838fb6140..a3f260e7af 100755
--- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_uart.c
+++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_uart.c
@@ -7,7 +7,7 @@ void bflb_uart_init(struct bflb_device_s *dev, const struct bflb_uart_config_s *
uint32_t div = 0;
uint32_t tx_cfg;
uint32_t rx_cfg;
- size_t reg_base;
+ uint32_t reg_base;
uint32_t regval;
reg_base = dev->reg_base;
@@ -119,7 +119,7 @@ void bflb_uart_init(struct bflb_device_s *dev, const struct bflb_uart_config_s *
void bflb_uart_deinit(struct bflb_device_s *dev)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t tx_cfg;
uint32_t rx_cfg;
@@ -134,7 +134,7 @@ void bflb_uart_deinit(struct bflb_device_s *dev)
void bflb_uart_enable(struct bflb_device_s *dev)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t tx_cfg;
uint32_t rx_cfg;
@@ -149,7 +149,7 @@ void bflb_uart_enable(struct bflb_device_s *dev)
void bflb_uart_disable(struct bflb_device_s *dev)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t tx_cfg;
uint32_t rx_cfg;
@@ -164,7 +164,7 @@ void bflb_uart_disable(struct bflb_device_s *dev)
void bflb_uart_link_txdma(struct bflb_device_s *dev, bool enable)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t regval;
reg_base = dev->reg_base;
@@ -179,7 +179,7 @@ void bflb_uart_link_txdma(struct bflb_device_s *dev, bool enable)
void bflb_uart_link_rxdma(struct bflb_device_s *dev, bool enable)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t regval;
reg_base = dev->reg_base;
@@ -195,7 +195,7 @@ void bflb_uart_link_rxdma(struct bflb_device_s *dev, bool enable)
ATTR_TCM_SECTION int bflb_uart_putchar(struct bflb_device_s *dev, int ch)
{
uint64_t start_time;
- size_t reg_base;
+ uint32_t reg_base;
reg_base = dev->reg_base;
// start_time = bflb_mtimer_get_time_ms();
@@ -211,7 +211,7 @@ ATTR_TCM_SECTION int bflb_uart_putchar(struct bflb_device_s *dev, int ch)
ATTR_TCM_SECTION int bflb_uart_getchar(struct bflb_device_s *dev)
{
int ch = -1;
- size_t reg_base;
+ uint32_t reg_base;
reg_base = dev->reg_base;
if ((getreg32(reg_base + UART_FIFO_CONFIG_1_OFFSET) & UART_RX_FIFO_CNT_MASK) != 0) {
@@ -250,7 +250,7 @@ ATTR_TCM_SECTION int bflb_uart_get(struct bflb_device_s *dev, uint8_t *data, uin
bool bflb_uart_txready(struct bflb_device_s *dev)
{
- size_t reg_base;
+ uint32_t reg_base;
reg_base = dev->reg_base;
if ((getreg32(reg_base + UART_FIFO_CONFIG_1_OFFSET) & UART_TX_FIFO_CNT_MASK) != 0) {
@@ -262,7 +262,7 @@ bool bflb_uart_txready(struct bflb_device_s *dev)
bool bflb_uart_txempty(struct bflb_device_s *dev)
{
- size_t reg_base;
+ uint32_t reg_base;
reg_base = dev->reg_base;
if ((getreg32(reg_base + UART_FIFO_CONFIG_1_OFFSET) & UART_TX_FIFO_CNT_MASK) == (UART_TX_FIFO_CNT_MASK >> 1) + 1) {
@@ -274,7 +274,7 @@ bool bflb_uart_txempty(struct bflb_device_s *dev)
bool bflb_uart_rxavailable(struct bflb_device_s *dev)
{
- size_t reg_base;
+ uint32_t reg_base;
reg_base = dev->reg_base;
return ((getreg32(reg_base + UART_FIFO_CONFIG_1_OFFSET) & UART_RX_FIFO_CNT_MASK) != 0);
@@ -282,7 +282,7 @@ bool bflb_uart_rxavailable(struct bflb_device_s *dev)
void bflb_uart_txint_mask(struct bflb_device_s *dev, bool mask)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t int_mask;
reg_base = dev->reg_base;
@@ -297,7 +297,7 @@ void bflb_uart_txint_mask(struct bflb_device_s *dev, bool mask)
void bflb_uart_rxint_mask(struct bflb_device_s *dev, bool mask)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t int_mask;
reg_base = dev->reg_base;
@@ -314,7 +314,7 @@ void bflb_uart_rxint_mask(struct bflb_device_s *dev, bool mask)
void bflb_uart_errint_mask(struct bflb_device_s *dev, bool mask)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t int_mask;
reg_base = dev->reg_base;
@@ -339,7 +339,7 @@ void bflb_uart_errint_mask(struct bflb_device_s *dev, bool mask)
uint32_t bflb_uart_get_intstatus(struct bflb_device_s *dev)
{
- size_t reg_base;
+ uint32_t reg_base;
uint32_t int_status;
uint32_t int_mask;
@@ -351,7 +351,7 @@ uint32_t bflb_uart_get_intstatus(struct bflb_device_s *dev)
void bflb_uart_int_clear(struct bflb_device_s *dev, uint32_t int_clear)
{
- size_t reg_base;
+ uint32_t reg_base;
reg_base = dev->reg_base;
putreg32(int_clear, reg_base + UART_INT_CLEAR_OFFSET);
@@ -360,7 +360,7 @@ void bflb_uart_int_clear(struct bflb_device_s *dev, uint32_t int_clear)
int bflb_uart_feature_control(struct bflb_device_s *dev, int cmd, size_t arg)
{
int ret = 0;
- size_t reg_base;
+ uint32_t reg_base;
uint32_t tmp;
uint32_t tx_tmp;
uint32_t rx_tmp;
diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/SConscript b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/SConscript
index 6d4a32a324..7b0cf8d901 100755
--- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/SConscript
+++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/SConscript
@@ -55,7 +55,6 @@ if GetDepend('BL808_CORE_M0') or GetDepend('BL808_CORE_LP'):
""")
elif GetDepend('BL808_CORE_D0'):
src += Split("""
- std/src/bl808_ioremap.c
std/src/bl808_clock.c
std/src/bl808_hbn.c
std/port/bl808_clock.c
diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/bl808_ioremap.h b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/bl808_ioremap.h
deleted file mode 100644
index 6f9a1f927e..0000000000
--- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/bl808_ioremap.h
+++ /dev/null
@@ -1,163 +0,0 @@
-/**
- ******************************************************************************
- * @file bl808_ioremap.h
- * @version V1.0
- * @date
- * @brief This file is the standard driver header file
- ******************************************************************************
- * @attention
- *
- *
© COPYRIGHT(c) 2020 Bouffalo Lab
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of Bouffalo Lab nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-#ifndef __BL808_IOREMAP_H__
-#define __BL808_IOREMAP_H__
-
-#include
-
-#define GLB_BASE_PHY ((uint32_t)0x20000000)
-#define MIX_BASE ((uint32_t)0x20001000)
-#define GPIP_BASE ((uint32_t)0x20002000)
-#define PHY_BASE ((uint32_t)0x20002800)
-#define AGC_BASE ((uint32_t)0x20002c00)
-#define SEC_DBG_BASE ((uint32_t)0x20003000)
-#define SEC_ENG_BASE ((uint32_t)0x20004000)
-#define TZ1_BASE ((uint32_t)0x20005000)
-#define TZC_SEC_BASE ((uint32_t)0x20005000)
-#define TZ2_BASE ((uint32_t)0x20006000)
-#define TZC_NSEC_BASE ((uint32_t)0x20006000)
-#define EFUSE_BASE ((uint32_t)0x20056000)
-#define EF_DATA_BASE ((uint32_t)0x20056000)
-#define EF_CTRL_BASE ((uint32_t)0x20056000)
-#define CCI_BASE_PHY ((uint32_t)0x20008000)
-#define MCU_MISC_BASE ((uint32_t)0x20009000)
-#define L1C_BASE ((uint32_t)0x20009000)
-#define UART0_BASE ((uint32_t)0x2000a000)
-#define UART1_BASE ((uint32_t)0x2000a100)
-#define SPI0_BASE ((uint32_t)0x2000a200)
-#define I2C0_BASE ((uint32_t)0x2000a300)
-#define PWM_BASE ((uint32_t)0x2000a400)
-#define TIMER0_BASE ((uint32_t)0x2000a500)
-#define IR_BASE ((uint32_t)0x2000a600)
-#define CKS_BASE ((uint32_t)0x2000a700)
-#define IPC0_BASE ((uint32_t)0x2000a800)
-#define IPC1_BASE ((uint32_t)0x2000a840)
-#define I2C1_BASE ((uint32_t)0x2000a900)
-#define UART2_BASE ((uint32_t)0x2000aa00)
-#define I2S_BASE ((uint32_t)0x2000ab00)
-#define PDM0_BASE ((uint32_t)0x2000a000)
-#define LZ4D_BASE ((uint32_t)0x2000ad00)
-#define QSPI_BASE ((uint32_t)0x2000b000)
-#define SF_CTRL_BASE ((uint32_t)0x2000b000)
-#define SF_CTRL_BUF_BASE ((uint32_t)0x2000b600)
-#define DMA0_BASE ((uint32_t)0x2000c000)
-#define PDS_BASE_PHY ((uint32_t)0x2000e000)
-#define HBN_BASE_PHY ((uint32_t)0x2000f000)
-#define AON_BASE ((uint32_t)0x2000f000)
-#define EMI_MISC_BASE ((uint32_t)0x20050000)
-#define PSRAM_CTRL_BASE ((uint32_t)0x20052000)
-#define USB_BASE ((uint32_t)0x20072000)
-#define AUDIO_BASE ((uint32_t)0x20055000)
-#define SDH_BASE ((uint32_t)0x20060000)
-#define EMAC_BASE ((uint32_t)0x20070000)
-#define DMA1_BASE ((uint32_t)0x20071000)
-
-/* MMSYS */
-#define MM_MISC_BASE ((uint32_t)0x30000000)
-#define DMA2_BASE ((uint32_t)0x30001000)
-#define UART3_BASE ((uint32_t)0x30002000)
-#define I2C2_BASE ((uint32_t)0x30003000)
-#define I2C3_BASE ((uint32_t)0x30004000)
-#define IPC2_BASE ((uint32_t)0x30005000)
-#define DMA2D_BASE ((uint32_t)0x30006000)
-#define CLKRST_CTRL_BASE ((uint32_t)0x30007000)
-#define MM_GLB_BASE_PHY ((uint32_t)0x30007000)
-#define SPI1_BASE ((uint32_t)0x30008000)
-#define TIMER1_BASE ((uint32_t)0x30009000)
-#define PSRAM_UHS_BASE ((uint32_t)0x3000f000)
-
-/* SUBSYS */
-#define SUB_MISC_BASE ((uint32_t)0x30010000)
-#define SUB_BASE ((uint32_t)0x30011000)
-#define DVP0_BASE ((uint32_t)0x30012000)
-#define DVP1_BASE ((uint32_t)0x30012100)
-#define DVP2_BASE ((uint32_t)0x30012200)
-#define DVP3_BASE ((uint32_t)0x30012300)
-#define DVP4_BASE ((uint32_t)0x30012400)
-#define DVP5_BASE ((uint32_t)0x30012500)
-#define DVP6_BASE ((uint32_t)0x30012600)
-#define DVP7_BASE ((uint32_t)0x30012700)
-#define DVP_TSRC0_BASE ((uint32_t)0x30012800)
-#define DVP_TSRC1_BASE ((uint32_t)0x30012900)
-#define AXI_CTRL_NR3D_BASE ((uint32_t)0x30012a00)
-#define OSD_PROBE_BASE ((uint32_t)0x30012b00)
-#define OSD_A_BASE ((uint32_t)0x30013000)
-#define OSD_B_BASE ((uint32_t)0x30014000)
-#define OSD_DP_BASE ((uint32_t)0x30015000)
-#define OSD_BLEND0_OFFSET (0x000)
-#define OSD_BLEND1_OFFSET (0x100)
-#define OSD_BLEND2_OFFSET (0x200)
-#define OSD_BLEND3_OFFSET (0x300)
-#define OSD_DRAW_LOW_OFFSET (0x400)
-#define OSD_DRAW_HIGH_OFFSET (0x504)
-#define MIPI_BASE ((uint32_t)0x3001a000)
-#define DBI_BASE ((uint32_t)0x3001b000)
-#define DSI_BASE ((uint32_t)0x3001a100)
-#define CSI_BASE ((uint32_t)0x3001a000)
-
-/* CODEC_SUBSYS */
-#define CODEC_MISC_BASE ((uint32_t)0x30020000)
-#define MJPEG_BASE ((uint32_t)0x30021000)
-#define VIDEO_BASE ((uint32_t)0x30022000)
-#define MJPEG_DEC_BASE ((uint32_t)0x30023000)
-#define BL_CNN_BASE ((uint32_t)0x30024000)
-
-#define HBN_RAM_BASE ((uint32_t)0x20010000)
-
-#define RF_BASE ((uint32_t)0x20001000)
-
-
-extern void *glb_base;
-extern size_t get_glb_base(void);
-#define GLB_BASE get_glb_base()
-
-extern void *cci_base;
-extern size_t get_cci_base(void);
-#define CCI_BASE get_cci_base()
-
-extern void *hbn_base;
-extern size_t get_hbn_base(void);
-#define PDS_BASE get_pds_base()
-
-extern void *pds_base;
-extern size_t get_pds_base(void);
-#define HBN_BASE get_hbn_base()
-
-extern void *mm_glb_base;
-extern size_t get_mm_glb_base(void);
-#define MM_GLB_BASE get_mm_glb_base()
-
-#endif /* __BL808_IOREMAP_H__ */
\ No newline at end of file
diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/hardware/bl808.h b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/hardware/bl808.h
index f77bb2d727..4e34802d14 100755
--- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/hardware/bl808.h
+++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/hardware/bl808.h
@@ -399,9 +399,6 @@ typedef enum {
/*@} end of group Memory_Map_Section */
/* BL808 peripherals base address */
-
-#ifndef RT_USING_SMART
-
/* WLSYS */
#define GLB_BASE ((uint32_t)0x20000000)
#define MIX_BASE ((uint32_t)0x20001000)
@@ -504,12 +501,6 @@ typedef enum {
#define RF_BASE ((uint32_t)0x20001000)
-#else
-
-#include "bl808_ioremap.h"
-
-#endif
-
typedef enum {
BL_AHB_MASTER_CPU = 0x00,
BL_AHB_MASTER_SDU = 0x01,
diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/src/bl808_ioremap.c b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/src/bl808_ioremap.c
deleted file mode 100644
index 803f220735..0000000000
--- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/src/bl808_ioremap.c
+++ /dev/null
@@ -1,93 +0,0 @@
-/**
- ******************************************************************************
- * @file bl808_ioremap.c
- * @version V1.0
- * @date
- * @brief This file is the standard driver c file
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT(c) 2020 Bouffalo Lab
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of Bouffalo Lab nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-#ifdef RT_USING_SMART
-
-#include
-#include
-#include "bl808.h"
-
-void *glb_base = NULL;
-size_t get_glb_base(void)
-{
- if(glb_base == NULL)
- {
- glb_base = rt_ioremap((void *)GLB_BASE_PHY, 0x1000);
- }
- return (size_t)glb_base;
-}
-
-void *cci_base = NULL;
-size_t get_cci_base(void)
-{
- if(cci_base == NULL)
- {
- cci_base = rt_ioremap((void *)CCI_BASE_PHY, 0x1000);
- }
- return (size_t)cci_base;
-}
-
-void *pds_base = NULL;
-size_t get_pds_base(void)
-{
- if(pds_base == NULL)
- {
- pds_base = rt_ioremap((void *)PDS_BASE_PHY, 0x1000);
- }
- return (size_t)pds_base;
-}
-
-void *hbn_base = NULL;
-size_t get_hbn_base(void)
-{
- if(hbn_base == NULL)
- {
- hbn_base = rt_ioremap((void *)HBN_BASE_PHY, 0x1000);
- }
- return (size_t)hbn_base;
-}
-
-void *mm_glb_base = NULL;
-size_t get_mm_glb_base(void)
-{
- if(mm_glb_base == NULL)
- {
- mm_glb_base = rt_ioremap((void *)MM_GLB_BASE_PHY, 0x1000);
- }
- return (size_t)mm_glb_base;
-}
-
-#endif
diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/tools/bflb_tools/get_bflb_fw_post_proc.sh b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/tools/bflb_tools/get_bflb_fw_post_proc.sh
index 65fe042e5e..add15593a1 100755
--- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/tools/bflb_tools/get_bflb_fw_post_proc.sh
+++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/tools/bflb_tools/get_bflb_fw_post_proc.sh
@@ -2,16 +2,14 @@
CHIPNAME=$1
BIN_FILE=$2
-set -e
-
SYSTEM=`uname -s`
echo "system: $SYSTEM"
SHELL_DIR=$(cd "$(dirname "$0")"; pwd)
TOOL_DIR=$SHELL_DIR
-URL_GITEE=https://gitee.com/flyingcys/bflb_tools/releases/download/v1.0.4
-URL_GITHUB=https://github.com/flyingcys/bflb_tools/releases/download/v1.0.4
+URL_GITEE="https://gitee.com/flyingcys/bflb_tools/releases/download/v1.0.4"
+URL_GITHUB="https://github.com/flyingcys/bflb_tools/releases/download/v1.0.4"
if [ $SYSTEM = "Darwin" ]
then
TOOL_NAME=bflb_fw_post_proc-macos
@@ -33,15 +31,33 @@ else
echo "bflb_fw_post_proc not exist, try download... "
echo "url:$DOWNLOAD_URL/$FILE_NAME"
- # 连接超时30s 下载超时120s
- curl -LjO --connect-timeout 30 -m 120 $DOWNLOAD_URL/$FILE_NAME
+ download_finish=0
+ for i in 1 2 3
+ do
+ timeout=$(expr $i \* 60)
+ for url in $URL_GITEE $URL_GITHUB
+ do
+ # 连接超时30s 下载超时120s
+ curl -C - -LjO --connect-timeout 30 -m $timeout $url/$FILE_NAME
+ if [ $? -ne 0 ];then
+ echo "download failed, try again..."
+ else
+ mkdir -p $TOOL_DIR/bflb_fw_post_proc
+ tar zxvf $FILE_NAME -C $TOOL_DIR/bflb_fw_post_proc
+ rm -rf $FILE_NAME
+ if [ $SYSTEM = "Darwin" ]; then
+ chmod +x $TOOL_DIR/bflb_fw_post_proc/$TOOL_NAME
+ elif [ $SYSTEM = "Linux" ]; then
+ chmod +x $TOOL_DIR/bflb_fw_post_proc/$TOOL_NAME
+ fi
- mkdir -p $TOOL_DIR/bflb_fw_post_proc
- tar zxvf $FILE_NAME -C $TOOL_DIR/bflb_fw_post_proc
- rm -rf $FILE_NAME
- if [ $SYSTEM = "Darwin" ]; then
- chmod +x $TOOL_DIR/bflb_fw_post_proc/$TOOL_NAME
- elif [ $SYSTEM = "Linux" ]; then
- chmod +x $TOOL_DIR/bflb_fw_post_proc/$TOOL_NAME
- fi
+ download_finish=1
+ break
+ fi
+ done
+
+ if [ $download_finish -ne 0 ]; then
+ break
+ fi
+ done
fi
diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/tools/bflb_tools/get_bouffalo_flash_cube.sh b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/tools/bflb_tools/get_bouffalo_flash_cube.sh
index 6fe36ee8eb..eab2a40fe3 100755
--- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/tools/bflb_tools/get_bouffalo_flash_cube.sh
+++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/tools/bflb_tools/get_bouffalo_flash_cube.sh
@@ -2,8 +2,6 @@
CHIPNAME=$1
BIN_FILE=$2
-set -e
-
SYSTEM=`uname -s`
echo "system: $SYSTEM"
@@ -33,14 +31,32 @@ else
echo "bouffalo_flash_cube not exist, try download... "
echo "url:$DOWNLOAD_URL/$FILE_NAME"
- # 连接超时30s 下载超时300s
- curl -LjO --connect-timeout 30 -m 300 $DOWNLOAD_URL/$FILE_NAME
+ download_finish=0
+ for i in 1 2 3
+ do
+ timeout=$(expr $i \* 300)
+ for url in $URL_GITEE $URL_GITHUB
+ do
+ # 连接超时30s 下载超时300s
+ curl -C - -LjO --connect-timeout 30 -m $timeout $url/$FILE_NAME
+ if [ $? -ne 0 ];then
+ echo "download failed, try again..."
+ else
+ tar zxvf $FILE_NAME -C $TOOL_DIR
+ rm -rf $FILE_NAME
+ if [ $SYSTEM = "Darwin" ]; then
+ chmod +x $TOOL_DIR/bouffalo_flash_cube/$TOOL_NAME
+ elif [ $SYSTEM = "Linux" ]; then
+ chmod +x $TOOL_DIR/bouffalo_flash_cube/$TOOL_NAME
+ fi
- tar zxvf $FILE_NAME -C $TOOL_DIR
- rm -rf $FILE_NAME
- if [ $SYSTEM = "Darwin" ]; then
- chmod +x $TOOL_DIR/bouffalo_flash_cube/$TOOL_NAME
- elif [ $SYSTEM = "Linux" ]; then
- chmod +x $TOOL_DIR/bouffalo_flash_cube/$TOOL_NAME
- fi
+ download_finish=1
+ break
+ fi
+ done
+
+ if [ $download_finish -ne 0 ]; then
+ break
+ fi
+ done
fi
diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/Kconfig b/bsp/bouffalo_lab/libraries/rt_drivers/Kconfig
index 3f58f34fe0..841bde380d 100755
--- a/bsp/bouffalo_lab/libraries/rt_drivers/Kconfig
+++ b/bsp/bouffalo_lab/libraries/rt_drivers/Kconfig
@@ -12,13 +12,113 @@ menu "General Drivers Configuration"
default UART0_TX_USING_GPIO14 if BSP_USING_BL70X
default UART0_TX_USING_GPIO14 if BSP_USING_BL808
+ config UART0_TX_USING_GPIO0
+ bool "GPIO_0"
+ config UART0_TX_USING_GPIO1
+ bool "GPIO_1"
+ config UART0_TX_USING_GPIO2
+ bool "GPIO_2"
+ config UART0_TX_USING_GPIO3
+ bool "GPIO_3"
+ config UART0_TX_USING_GPIO4
+ bool "GPIO_4"
+ config UART0_TX_USING_GPIO5
+ bool "GPIO_5"
+ config UART0_TX_USING_GPIO6
+ bool "GPIO_6"
+ config UART0_TX_USING_GPIO7
+ bool "GPIO_7"
+ config UART0_TX_USING_GPIO8
+ bool "GPIO_8"
+ config UART0_TX_USING_GPIO9
+ bool "GPIO_9"
+ config UART0_TX_USING_GPIO10
+ bool "GPIO_10"
+ config UART0_TX_USING_GPIO11
+ bool "GPIO_11"
+ config UART0_TX_USING_GPIO12
+ bool "GPIO_12"
+ config UART0_TX_USING_GPIO13
+ bool "GPIO_13"
+ config UART0_TX_USING_GPIO13
+ bool "GPIO_13"
config UART0_TX_USING_GPIO14
bool "GPIO_14"
+ config UART0_TX_USING_GPIO15
+ bool "GPIO_15"
config UART0_TX_USING_GPIO16
bool "GPIO_16"
+ config UART0_TX_USING_GPIO17
+ bool "GPIO_17"
+ config UART0_TX_USING_GPIO18
+ bool "GPIO_18"
+ config UART0_TX_USING_GPIO19
+ bool "GPIO_19"
+ config UART0_TX_USING_GPIO20
+ bool "GPIO_20"
config UART0_TX_USING_GPIO21
bool "GPIO_21"
+ config UART0_TX_USING_GPIO22
+ bool "GPIO_22"
+ config UART0_TX_USING_GPIO23
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_23"
+ config UART0_TX_USING_GPIO24
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_24"
+ config UART0_TX_USING_GPIO25
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_25"
+ config UART0_TX_USING_GPIO26
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_26"
+ config UART0_TX_USING_GPIO27
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_27"
+ config UART0_TX_USING_GPIO28
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_28"
+ config UART0_TX_USING_GPIO29
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_29"
+ config UART0_TX_USING_GPIO30
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_30"
+ config UART0_TX_USING_GPIO31
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_31"
+ config UART0_TX_USING_GPIO32
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_32"
+ config UART0_TX_USING_GPIO33
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_33"
+ config UART0_TX_USING_GPIO34
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_34"
+ config UART0_TX_USING_GPIO35
+ depends on BSP_USING_BL808
+ bool "GPIO_35"
+ config UART0_TX_USING_GPIO36
+ depends on BSP_USING_BL808
+ bool "GPIO_36"
+ config UART0_TX_USING_GPIO37
+ depends on BSP_USING_BL808
+ bool "GPIO_37"
+ config UART0_TX_USING_GPIO38
+ depends on BSP_USING_BL808
+ bool "GPIO_38"
+ config UART0_TX_USING_GPIO39
+ depends on BSP_USING_BL808
+ bool "GPIO_39"
+ config UART0_TX_USING_GPIO44
+ depends on BSP_USING_BL808
+ bool "GPIO_44"
+ config UART0_TX_USING_GPIO45
+ depends on BSP_USING_BL808
+ bool "GPIO_45"
endchoice
+
choice
prompt "UART0 RX PIN"
default UART0_RX_USING_GPIO7 if BSP_USING_BL60X
@@ -26,14 +126,110 @@ menu "General Drivers Configuration"
default UART0_RX_USING_GPIO23 if BSP_USING_BL70X
default UART0_RX_USING_GPIO15 if BSP_USING_BL808
+ config UART0_RX_USING_GPIO0
+ bool "GPIO_0"
+ config UART0_RX_USING_GPIO1
+ bool "GPIO_1"
+ config UART0_RX_USING_GPIO2
+ bool "GPIO_2"
+ config UART0_RX_USING_GPIO3
+ bool "GPIO_3"
+ config UART0_RX_USING_GPIO4
+ bool "GPIO_4"
+ config UART0_RX_USING_GPIO5
+ bool "GPIO_5"
+ config UART0_RX_USING_GPIO6
+ bool "GPIO_6"
config UART0_RX_USING_GPIO7
bool "GPIO_7"
+ config UART0_RX_USING_GPIO8
+ bool "GPIO_8"
+ config UART0_RX_USING_GPIO9
+ bool "GPIO_9"
+ config UART0_RX_USING_GPIO10
+ bool "GPIO_10"
+ config UART0_RX_USING_GPIO11
+ bool "GPIO_11"
+ config UART0_RX_USING_GPIO12
+ bool "GPIO_12"
+ config UART0_RX_USING_GPIO13
+ bool "GPIO_13"
+ config UART0_RX_USING_GPIO14
+ bool "GPIO_14"
config UART0_RX_USING_GPIO15
bool "GPIO_15"
+ config UART0_RX_USING_GPIO16
+ bool "GPIO_16"
+ config UART0_RX_USING_GPIO17
+ bool "GPIO_17"
+ config UART0_RX_USING_GPIO18
+ bool "GPIO_18"
+ config UART0_RX_USING_GPIO19
+ bool "GPIO_19"
+ config UART0_RX_USING_GPIO20
+ bool "GPIO_20"
+ config UART0_RX_USING_GPIO21
+ bool "GPIO_21"
config UART0_RX_USING_GPIO22
bool "GPIO_22"
config UART0_RX_USING_GPIO23
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
bool "GPIO_23"
+ config UART0_RX_USING_GPIO24
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_24"
+ config UART0_RX_USING_GPIO25
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_25"
+ config UART0_RX_USING_GPIO26
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_26"
+ config UART0_RX_USING_GPIO27
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_27"
+ config UART0_RX_USING_GPIO28
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_28"
+ config UART0_RX_USING_GPIO29
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_29"
+ config UART0_RX_USING_GPIO30
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_30"
+ config UART0_RX_USING_GPIO31
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_31"
+ config UART0_RX_USING_GPIO32
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_32"
+ config UART0_RX_USING_GPIO33
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_33"
+ config UART0_RX_USING_GPIO34
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_34"
+ config UART0_RX_USING_GPIO35
+ depends on BSP_USING_BL808
+ bool "GPIO_35"
+ config UART0_RX_USING_GPIO36
+ depends on BSP_USING_BL808
+ bool "GPIO_36"
+ config UART0_RX_USING_GPIO37
+ depends on BSP_USING_BL808
+ bool "GPIO_37"
+ config UART0_RX_USING_GPIO38
+ depends on BSP_USING_BL808
+ bool "GPIO_38"
+ config UART0_RX_USING_GPIO39
+ depends on BSP_USING_BL808
+ bool "GPIO_39"
+ config UART0_RX_USING_GPIO44
+ depends on BSP_USING_BL808
+ bool "GPIO_44"
+ config UART0_RX_USING_GPIO45
+ depends on BSP_USING_BL808
+ bool "GPIO_45"
+
endchoice
endif
@@ -48,15 +244,111 @@ menu "General Drivers Configuration"
default UART1_TX_USING_GPIO26 if BSP_USING_BL70X
default UART1_TX_USING_GPIO18 if BSP_USING_BL808
+ config UART1_TX_USING_GPIO0
+ bool "GPIO_0"
+ config UART1_TX_USING_GPIO1
+ bool "GPIO_1"
+ config UART1_TX_USING_GPIO2
+ bool "GPIO_2"
+ config UART1_TX_USING_GPIO3
+ bool "GPIO_3"
config UART1_TX_USING_GPIO4
bool "GPIO_4"
+ config UART1_TX_USING_GPIO5
+ bool "GPIO_5"
+ config UART1_TX_USING_GPIO6
+ bool "GPIO_6"
+ config UART1_TX_USING_GPIO7
+ bool "GPIO_7"
+ config UART1_TX_USING_GPIO8
+ bool "GPIO_8"
+ config UART1_TX_USING_GPIO9
+ bool "GPIO_9"
+ config UART1_TX_USING_GPIO10
+ bool "GPIO_10"
+ config UART1_TX_USING_GPIO11
+ bool "GPIO_11"
+ config UART1_TX_USING_GPIO12
+ bool "GPIO_12"
+ config UART1_TX_USING_GPIO13
+ bool "GPIO_13"
+ config UART1_TX_USING_GPIO14
+ bool "GPIO_14"
+ config UART1_TX_USING_GPIO15
+ bool "GPIO_15"
config UART1_TX_USING_GPIO16
bool "GPIO_16"
+ config UART1_TX_USING_GPIO17
+ bool "GPIO_17"
config UART1_TX_USING_GPIO18
bool "GPIO_18"
+ config UART1_TX_USING_GPIO19
+ bool "GPIO_19"
+ config UART1_TX_USING_GPIO20
+ bool "GPIO_20"
+ config UART1_TX_USING_GPIO21
+ bool "GPIO_21"
+ config UART1_TX_USING_GPIO22
+ bool "GPIO_22"
+ config UART1_TX_USING_GPIO23
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_23"
+ config UART1_TX_USING_GPIO24
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_24"
+ config UART1_TX_USING_GPIO25
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_25"
config UART1_TX_USING_GPIO26
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
bool "GPIO_26"
+ config UART1_TX_USING_GPIO27
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_27"
+ config UART1_TX_USING_GPIO28
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_28"
+ config UART1_TX_USING_GPIO29
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_29"
+ config UART1_TX_USING_GPIO30
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_30"
+ config UART1_TX_USING_GPIO31
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_31"
+ config UART1_TX_USING_GPIO32
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_32"
+ config UART1_TX_USING_GPIO33
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_33"
+ config UART1_TX_USING_GPIO34
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_34"
+ config UART1_TX_USING_GPIO35
+ depends on BSP_USING_BL808
+ bool "GPIO_35"
+ config UART1_TX_USING_GPIO36
+ depends on BSP_USING_BL808
+ bool "GPIO_36"
+ config UART1_TX_USING_GPIO37
+ depends on BSP_USING_BL808
+ bool "GPIO_37"
+ config UART1_TX_USING_GPIO38
+ depends on BSP_USING_BL808
+ bool "GPIO_38"
+ config UART1_TX_USING_GPIO39
+ depends on BSP_USING_BL808
+ bool "GPIO_39"
+ config UART1_TX_USING_GPIO44
+ depends on BSP_USING_BL808
+ bool "GPIO_44"
+ config UART1_TX_USING_GPIO45
+ depends on BSP_USING_BL808
+ bool "GPIO_45"
endchoice
+
choice
prompt "UART1 RX PIN"
default UART1_RX_USING_GPIO3 if BSP_USING_BL60X
@@ -64,16 +356,109 @@ menu "General Drivers Configuration"
default UART1_RX_USING_GPIO27 if BSP_USING_BL70X
default UART1_RX_USING_GPIO19 if BSP_USING_BL808
+ config UART1_RX_USING_GPIO0
+ bool "GPIO_0"
+ config UART1_RX_USING_GPIO1
+ bool "GPIO_1"
+ config UART1_RX_USING_GPIO2
+ bool "GPIO_2"
config UART1_RX_USING_GPIO3
bool "GPIO_3"
+ config UART1_RX_USING_GPIO4
+ bool "GPIO_4"
config UART1_RX_USING_GPIO5
bool "GPIO_5"
+ config UART1_RX_USING_GPIO6
+ bool "GPIO_6"
+ config UART1_RX_USING_GPIO7
+ bool "GPIO_7"
+ config UART1_RX_USING_GPIO8
+ bool "GPIO_8"
+ config UART1_RX_USING_GPIO9
+ bool "GPIO_9"
+ config UART1_RX_USING_GPIO10
+ bool "GPIO_10"
+ config UART1_RX_USING_GPIO11
+ bool "GPIO_11"
+ config UART1_RX_USING_GPIO12
+ bool "GPIO_12"
+ config UART1_RX_USING_GPIO13
+ bool "GPIO_13"
+ config UART1_RX_USING_GPIO14
+ bool "GPIO_14"
+ config UART1_RX_USING_GPIO15
+ bool "GPIO_15"
+ config UART1_RX_USING_GPIO16
+ bool "GPIO_16"
config UART1_RX_USING_GPIO17
bool "GPIO_17"
+ config UART1_RX_USING_GPIO18
+ bool "GPIO_18"
config UART1_RX_USING_GPIO19
bool "GPIO_19"
+ config UART1_RX_USING_GPIO20
+ bool "GPIO_20"
+ config UART1_RX_USING_GPIO21
+ bool "GPIO_21"
+ config UART1_RX_USING_GPIO22
+ bool "GPIO_22"
+ config UART1_RX_USING_GPIO23
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_23"
+ config UART1_RX_USING_GPIO24
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_24"
+ config UART1_RX_USING_GPIO25
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_25"
+ config UART1_RX_USING_GPIO26
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_26"
config UART1_RX_USING_GPIO27
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
bool "GPIO_27"
+ config UART1_RX_USING_GPIO28
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_28"
+ config UART1_RX_USING_GPIO29
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_29"
+ config UART1_RX_USING_GPIO30
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_30"
+ config UART1_RX_USING_GPIO31
+ depends on BSP_USING_BL61X || BSP_USING_BL70X || BSP_USING_BL808
+ bool "GPIO_31"
+ config UART1_RX_USING_GPIO32
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_32"
+ config UART1_RX_USING_GPIO33
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_33"
+ config UART1_RX_USING_GPIO34
+ depends on BSP_USING_BL61X || BSP_USING_BL808
+ bool "GPIO_34"
+ config UART1_RX_USING_GPIO35
+ depends on BSP_USING_BL808
+ bool "GPIO_35"
+ config UART1_RX_USING_GPIO36
+ depends on BSP_USING_BL808
+ bool "GPIO_36"
+ config UART1_RX_USING_GPIO37
+ depends on BSP_USING_BL808
+ bool "GPIO_37"
+ config UART1_RX_USING_GPIO38
+ depends on BSP_USING_BL808
+ bool "GPIO_38"
+ config UART1_RX_USING_GPIO39
+ depends on BSP_USING_BL808
+ bool "GPIO_39"
+ config UART1_RX_USING_GPIO44
+ depends on BSP_USING_BL808
+ bool "GPIO_44"
+ config UART1_RX_USING_GPIO45
+ depends on BSP_USING_BL808
+ bool "GPIO_45"
endchoice
endif
@@ -86,29 +471,181 @@ menu "General Drivers Configuration"
prompt "UART2 TX PIN"
default UART2_TX_USING_GPIO20
+ config UART2_TX_USING_GPIO0
+ bool "GPIO_0"
+ config UART2_TX_USING_GPIO1
+ bool "GPIO_1"
+ config UART2_TX_USING_GPIO2
+ bool "GPIO_2"
+ config UART2_TX_USING_GPIO3
+ bool "GPIO_3"
config UART2_TX_USING_GPIO4
bool "GPIO_4"
+ config UART2_TX_USING_GPIO5
+ bool "GPIO_5"
+ config UART2_TX_USING_GPIO6
+ bool "GPIO_6"
+ config UART2_TX_USING_GPIO7
+ bool "GPIO_7"
+ config UART2_TX_USING_GPIO8
+ bool "GPIO_8"
+ config UART2_TX_USING_GPIO9
+ bool "GPIO_9"
+ config UART2_TX_USING_GPIO10
+ bool "GPIO_10"
+ config UART2_TX_USING_GPIO11
+ bool "GPIO_11"
+ config UART2_TX_USING_GPIO12
+ bool "GPIO_12"
+ config UART2_TX_USING_GPIO13
+ bool "GPIO_13"
+ config UART2_TX_USING_GPIO14
+ bool "GPIO_14"
+ config UART2_TX_USING_GPIO15
+ bool "GPIO_15"
config UART2_TX_USING_GPIO16
bool "GPIO_16"
+ config UART2_TX_USING_GPIO17
+ bool "GPIO_17"
config UART2_TX_USING_GPIO18
bool "GPIO_18"
+ config UART2_TX_USING_GPIO19
+ bool "GPIO_19"
config UART2_TX_USING_GPIO20
bool "GPIO_20"
+ config UART2_TX_USING_GPIO21
+ bool "GPIO_21"
+ config UART2_TX_USING_GPIO22
+ bool "GPIO_22"
+ config UART2_TX_USING_GPIO23
+ bool "GPIO_23"
+ config UART2_TX_USING_GPIO24
+ bool "GPIO_24"
+ config UART2_TX_USING_GPIO25
+ bool "GPIO_25"
+ config UART2_TX_USING_GPIO26
+ bool "GPIO_26"
+ config UART2_TX_USING_GPIO27
+ bool "GPIO_27"
+ config UART2_TX_USING_GPIO28
+ bool "GPIO_28"
+ config UART2_TX_USING_GPIO29
+ bool "GPIO_29"
+ config UART2_TX_USING_GPIO30
+ bool "GPIO_30"
+ config UART2_TX_USING_GPIO31
+ bool "GPIO_31"
+ config UART2_TX_USING_GPIO32
+ bool "GPIO_32"
+ config UART2_TX_USING_GPIO33
+ bool "GPIO_33"
+ config UART2_TX_USING_GPIO34
+ bool "GPIO_34"
+ config UART2_TX_USING_GPIO35
+ bool "GPIO_35"
+ config UART2_TX_USING_GPIO36
+ bool "GPIO_36"
+ config UART2_TX_USING_GPIO37
+ bool "GPIO_37"
+ config UART2_TX_USING_GPIO38
+ bool "GPIO_38"
+ config UART2_TX_USING_GPIO39
+ bool "GPIO_39"
+ config UART2_TX_USING_GPIO44
+ bool "GPIO_44"
+ config UART2_TX_USING_GPIO45
+ bool "GPIO_45"
endchoice
choice
prompt "UART2 RX PIN"
default UART2_RX_USING_GPIO21
+ config UART2_RX_USING_GPIO0
+ bool "GPIO_0"
+ config UART2_RX_USING_GPIO1
+ bool "GPIO_1"
+ config UART2_RX_USING_GPIO2
+ bool "GPIO_2"
config UART2_RX_USING_GPIO3
bool "GPIO_3"
+ config UART2_RX_USING_GPIO4
+ bool "GPIO_4"
config UART2_RX_USING_GPIO5
bool "GPIO_5"
+ config UART2_RX_USING_GPIO6
+ bool "GPIO_6"
+ config UART2_RX_USING_GPIO7
+ bool "GPIO_7"
+ config UART2_RX_USING_GPIO8
+ bool "GPIO_8"
+ config UART2_RX_USING_GPIO9
+ bool "GPIO_9"
+ config UART2_RX_USING_GPIO10
+ bool "GPIO_10"
+ config UART2_RX_USING_GPIO11
+ bool "GPIO_11"
+ config UART2_RX_USING_GPIO12
+ bool "GPIO_12"
+ config UART2_RX_USING_GPIO13
+ bool "GPIO_13"
+ config UART2_RX_USING_GPIO13
+ bool "GPIO_13"
+ config UART2_RX_USING_GPIO14
+ bool "GPIO_14"
+ config UART2_RX_USING_GPIO15
+ bool "GPIO_15"
+ config UART2_RX_USING_GPIO16
+ bool "GPIO_16"
config UART2_RX_USING_GPIO17
bool "GPIO_17"
+ config UART2_RX_USING_GPIO18
+ bool "GPIO_18"
config UART2_RX_USING_GPIO19
bool "GPIO_19"
+ config UART2_RX_USING_GPIO20
+ bool "GPIO_20"
config UART2_RX_USING_GPIO21
bool "GPIO_21"
+ config UART2_RX_USING_GPIO22
+ bool "GPIO_22"
+ config UART2_RX_USING_GPIO23
+ bool "GPIO_23"
+ config UART2_RX_USING_GPIO24
+ bool "GPIO_24"
+ config UART2_RX_USING_GPIO25
+ bool "GPIO_25"
+ config UART2_RX_USING_GPIO26
+ bool "GPIO_26"
+ config UART2_RX_USING_GPIO27
+ bool "GPIO_27"
+ config UART2_RX_USING_GPIO28
+ bool "GPIO_28"
+ config UART2_RX_USING_GPIO29
+ bool "GPIO_29"
+ config UART2_RX_USING_GPIO30
+ bool "GPIO_30"
+ config UART2_RX_USING_GPIO31
+ bool "GPIO_31"
+ config UART2_RX_USING_GPIO32
+ bool "GPIO_32"
+ config UART2_RX_USING_GPIO33
+ bool "GPIO_33"
+ config UART2_RX_USING_GPIO34
+ bool "GPIO_34"
+ config UART2_RX_USING_GPIO35
+ bool "GPIO_35"
+ config UART2_RX_USING_GPIO36
+ bool "GPIO_36"
+ config UART2_RX_USING_GPIO37
+ bool "GPIO_37"
+ config UART2_RX_USING_GPIO38
+ bool "GPIO_38"
+ config UART2_RX_USING_GPIO39
+ bool "GPIO_39"
+ config UART2_RX_USING_GPIO44
+ bool "GPIO_44"
+ config UART2_RX_USING_GPIO45
+ bool "GPIO_45"
endchoice
endif
endif
diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/SConscript b/bsp/bouffalo_lab/libraries/rt_drivers/SConscript
index c6fc95188a..5f6b7a0227 100755
--- a/bsp/bouffalo_lab/libraries/rt_drivers/SConscript
+++ b/bsp/bouffalo_lab/libraries/rt_drivers/SConscript
@@ -20,7 +20,7 @@ if GetDepend('BSP_USING_RTC'):
if GetDepend('BSP_USING_PWM'):
src += ['drv_pwm.c']
- src += ['src/pwm_led_sample.c']
+ src += ['sample/pwm_led_sample.c']
if GetDepend('BSP_USING_WDT'):
src += ['drv_wdt.c']
diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/drv_flash.c b/bsp/bouffalo_lab/libraries/rt_drivers/drv_flash.c
index 88cd39051d..23872e39ce 100644
--- a/bsp/bouffalo_lab/libraries/rt_drivers/drv_flash.c
+++ b/bsp/bouffalo_lab/libraries/rt_drivers/drv_flash.c
@@ -8,9 +8,9 @@
* 2023-04-08 wcx1024979076 first version
*/
-#include "drv_flash.h"
#include
#include
+#include "drv_flash.h"
#ifdef BSP_USING_ON_CHIP_FLASH
diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.c b/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.c
index 3dac639224..ef4845c290 100644
--- a/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.c
+++ b/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.c
@@ -25,127 +25,6 @@
#define UART_DEFAULT_BAUDRATE 2000000
-// uart0
-#ifdef UART0_TX_USING_GPIO14
-#define UART0_GPIO_TX GPIO_PIN_14
-#elif defined(UART0_TX_USING_GPIO16)
-#define UART0_GPIO_TX GPIO_PIN_16
-#elif defined(UART0_TX_USING_GPIO21)
-#define UART0_GPIO_TX GPIO_PIN_21
-#endif
-
-#ifdef UART0_RX_USING_GPIO7
-#define UART0_GPIO_RX GPIO_PIN_7
-#elif defined(UART0_RX_USING_GPIO15)
-#define UART0_GPIO_RX GPIO_PIN_15
-#elif defined(UART0_RX_USING_GPIO22)
-#define UART0_GPIO_RX GPIO_PIN_22
-#elif defined(UART0_RX_USING_GPIO23)
-#define UART0_GPIO_RX GPIO_PIN_23
-#endif
-
-// uart1
-#ifdef UART1_TX_USING_GPIO4
-#define UART1_GPIO_TX GPIO_PIN_4
-#elif defined(UART1_TX_USING_GPIO16)
-#define UART1_GPIO_TX GPIO_PIN_16
-#elif defined(UART1_TX_USING_GPIO18)
-#define UART1_GPIO_TX GPIO_PIN_18
-#elif defined(UART1_TX_USING_GPIO26)
-#define UART1_GPIO_TX GPIO_PIN_26
-#endif
-
-#ifdef UART1_RX_USING_GPIO3
-#define UART1_GPIO_RX GPIO_PIN_3
-#elif defined(UART1_RX_USING_GPIO5)
-#define UART1_GPIO_RX GPIO_PIN_5
-#elif defined(UART1_RX_USING_GPIO17)
-#define UART1_GPIO_RX GPIO_PIN_17
-#elif defined(UART1_RX_USING_GPIO19)
-#define UART1_GPIO_RX GPIO_PIN_19
-#elif defined(UART1_RX_USING_GPIO27)
-#define UART1_GPIO_RX GPIO_PIN_27
-#endif
-
-// uart2
-#ifdef UART2_TX_USING_GPIO4
-#define UART2_GPIO_TX GPIO_PIN_4
-#elif defined(UART2_TX_USING_GPIO16)
-#define UART2_GPIO_TX GPIO_PIN_16
-#elif defined(UART2_TX_USING_GPIO18)
-#define UART2_GPIO_TX GPIO_PIN_18
-#elif defined(UART2_TX_USING_GPIO20)
-#define UART2_GPIO_TX GPIO_PIN_20
-#endif
-
-#ifdef UART2_RX_USING_GPIO3
-#define UART2_GPIO_RX GPIO_PIN_3
-#elif defined(UART2_RX_USING_GPIO5)
-#define UART2_GPIO_RX GPIO_PIN_5
-#elif defined(UART2_RX_USING_GPIO17)
-#define UART2_GPIO_RX GPIO_PIN_17
-#elif defined(UART2_RX_USING_GPIO19)
-#define UART2_GPIO_RX GPIO_PIN_19
-#elif defined(UART2_RX_USING_GPIO21)
-#define UART2_GPIO_RX GPIO_PIN_21
-#endif
-
-
-// uart3
-#ifdef UART3_TX_USING_GPIO0
-#define UART3_GPIO_TX GPIO_PIN_0
-#elif defined(UART3_TX_USING_GPIO4)
-#define UART3_GPIO_TX GPIO_PIN_4
-#elif defined(UART3_TX_USING_GPIO8)
-#define UART3_GPIO_TX GPIO_PIN_8
-#elif defined(UART3_TX_USING_GPIO12)
-#define UART3_GPIO_TX GPIO_PIN_12
-#elif defined(UART3_TX_USING_GPIO16)
-#define UART3_GPIO_TX GPIO_PIN_16
-#elif defined(UART3_TX_USING_GPIO18)
-#define UART3_GPIO_TX GPIO_PIN_18
-#elif defined(UART3_TX_USING_GPIO20)
-#define UART3_GPIO_TX GPIO_PIN_20
-#elif defined(UART3_TX_USING_GPIO24)
-#define UART3_GPIO_TX GPIO_PIN_24
-#elif defined(UART3_TX_USING_GPIO28)
-#define UART3_GPIO_TX GPIO_PIN_28
-#elif defined(UART3_TX_USING_GPIO32)
-#define UART3_GPIO_TX GPIO_PIN_32
-#elif defined(UART3_TX_USING_GPIO36)
-#define UART3_GPIO_TX GPIO_PIN_36
-#elif defined(UART3_TX_USING_GPIO40)
-#define UART3_GPIO_TX GPIO_PIN_40
-#elif defined(UART3_TX_USING_GPIO44)
-#define UART3_GPIO_TX GPIO_PIN_44
-#endif
-
-#ifdef UART3_RX_USING_GPIO1
-#define UART3_GPIO_RX GPIO_PIN_1
-#elif defined(UART3_RX_USING_GPIO5)
-#define UART3_GPIO_RX GPIO_PIN_5
-#elif defined(UART3_RX_USING_GPIO9)
-#define UART3_GPIO_RX GPIO_PIN_9
-#elif defined(UART3_RX_USING_GPIO13)
-#define UART3_GPIO_RX GPIO_PIN_13
-#elif defined(UART3_RX_USING_GPIO17)
-#define UART3_GPIO_RX GPIO_PIN_17
-#elif defined(UART3_RX_USING_GPIO21)
-#define UART3_GPIO_RX GPIO_PIN_21
-#elif defined(UART3_RX_USING_GPIO25)
-#define UART3_GPIO_RX GPIO_PIN_25
-#elif defined(UART3_RX_USING_GPIO29)
-#define UART3_GPIO_RX GPIO_PIN_29
-#elif defined(UART3_RX_USING_GPIO33)
-#define UART3_GPIO_RX GPIO_PIN_33
-#elif defined(UART3_RX_USING_GPIO37)
-#define UART3_GPIO_RX GPIO_PIN_37
-#elif defined(UART3_RX_USING_GPIO41)
-#define UART3_GPIO_RX GPIO_PIN_41
-#elif defined(UART3_RX_USING_GPIO45)
-#define UART3_GPIO_RX GPIO_PIN_45
-#endif
-
struct device_uart
{
struct rt_serial_device serial;
@@ -406,11 +285,6 @@ int rt_hw_uart_init(void)
static struct device_uart bl_uart3;
bl_uart3.bflb_device = bflb_device_get_by_name("uart3");
-#ifdef RT_USING_SMART
- gpio->reg_base = (size_t)rt_ioremap((void *)gpio->reg_base, 0x1000);
- bl_uart3.bflb_device->reg_base = (size_t)rt_ioremap((void *)bl_uart3.bflb_device->reg_base, 0x1000);
-#endif
-
bflb_gpio_init(gpio, UART3_GPIO_TX, 21 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_init(gpio, UART3_GPIO_RX, 21 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.h b/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.h
index f70c981d6b..325a76fd2d 100755
--- a/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.h
+++ b/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.h
@@ -18,6 +18,580 @@
#include "bflb_uart.h"
#include "bflb_gpio.h"
+// uart0
+#ifdef UART0_TX_USING_GPIO0
+#define UART0_GPIO_TX GPIO_PIN_0
+#elif defined(UART0_TX_USING_GPIO1)
+#define UART0_GPIO_TX GPIO_PIN_1
+#elif defined(UART0_TX_USING_GPIO2)
+#define UART0_GPIO_TX GPIO_PIN_2
+#elif defined(UART0_TX_USING_GPIO3)
+#define UART0_GPIO_TX GPIO_PIN_3
+#elif defined(UART0_TX_USING_GPIO4)
+#define UART0_GPIO_TX GPIO_PIN_4
+#elif defined(UART0_TX_USING_GPIO5)
+#define UART0_GPIO_TX GPIO_PIN_5
+#elif defined(UART0_TX_USING_GPIO6)
+#define UART0_GPIO_TX GPIO_PIN_6
+#elif defined(UART0_TX_USING_GPIO7)
+#define UART0_GPIO_TX GPIO_PIN_7
+#elif defined(UART0_TX_USING_GPIO8)
+#define UART0_GPIO_TX GPIO_PIN_8
+#elif defined(UART0_TX_USING_GPIO9)
+#define UART0_GPIO_TX GPIO_PIN_9
+#elif defined(UART0_TX_USING_GPIO10)
+#define UART0_GPIO_TX GPIO_PIN_10
+#elif defined(UART0_TX_USING_GPIO11)
+#define UART0_GPIO_TX GPIO_PIN_11
+#elif defined(UART0_TX_USING_GPIO12)
+#define UART0_GPIO_TX GPIO_PIN_12
+#elif defined(UART0_TX_USING_GPIO13)
+#define UART0_GPIO_TX GPIO_PIN_13
+#elif defined(UART0_TX_USING_GPIO14)
+#define UART0_GPIO_TX GPIO_PIN_14
+#elif defined(UART0_TX_USING_GPIO15)
+#define UART0_GPIO_TX GPIO_PIN_15
+#elif defined(UART0_TX_USING_GPIO16)
+#define UART0_GPIO_TX GPIO_PIN_16
+#elif defined(UART0_TX_USING_GPIO17)
+#define UART0_GPIO_TX GPIO_PIN_17
+#elif defined(UART0_TX_USING_GPIO18)
+#define UART0_GPIO_TX GPIO_PIN_18
+#elif defined(UART0_TX_USING_GPIO19)
+#define UART0_GPIO_TX GPIO_PIN_19
+#elif defined(UART0_TX_USING_GPIO20)
+#define UART0_GPIO_TX GPIO_PIN_20
+#elif defined(UART0_TX_USING_GPIO21)
+#define UART0_GPIO_TX GPIO_PIN_21
+#elif defined(UART0_TX_USING_GPIO22)
+#define UART0_GPIO_TX GPIO_PIN_22
+#elif defined(UART0_TX_USING_GPIO23)
+#define UART0_GPIO_TX GPIO_PIN_23
+#elif defined(UART0_TX_USING_GPIO24)
+#define UART0_GPIO_TX GPIO_PIN_24
+#elif defined(UART0_TX_USING_GPIO25)
+#define UART0_GPIO_TX GPIO_PIN_25
+#elif defined(UART0_TX_USING_GPIO26)
+#define UART0_GPIO_TX GPIO_PIN_26
+#elif defined(UART0_TX_USING_GPIO27)
+#define UART0_GPIO_TX GPIO_PIN_27
+#elif defined(UART0_TX_USING_GPIO28)
+#define UART0_GPIO_TX GPIO_PIN_28
+#elif defined(UART0_TX_USING_GPIO29)
+#define UART0_GPIO_TX GPIO_PIN_29
+#elif defined(UART0_TX_USING_GPIO30)
+#define UART0_GPIO_TX GPIO_PIN_30
+#elif defined(UART0_TX_USING_GPIO31)
+#define UART0_GPIO_TX GPIO_PIN_31
+#elif defined(UART0_TX_USING_GPIO32)
+#define UART0_GPIO_TX GPIO_PIN_32
+#elif defined(UART0_TX_USING_GPIO33)
+#define UART0_GPIO_TX GPIO_PIN_33
+#elif defined(UART0_TX_USING_GPIO34)
+#define UART0_GPIO_TX GPIO_PIN_34
+#elif defined(UART0_TX_USING_GPIO35)
+#define UART0_GPIO_TX GPIO_PIN_35
+#elif defined(UART0_TX_USING_GPIO36)
+#define UART0_GPIO_TX GPIO_PIN_36
+#elif defined(UART0_TX_USING_GPIO37)
+#define UART0_GPIO_TX GPIO_PIN_37
+#elif defined(UART0_TX_USING_GPIO38)
+#define UART0_GPIO_TX GPIO_PIN_38
+#elif defined(UART0_TX_USING_GPIO39)
+#define UART0_GPIO_TX GPIO_PIN_39
+#elif defined(UART0_TX_USING_GPIO44)
+#define UART0_GPIO_TX GPIO_PIN_44
+#elif defined(UART0_TX_USING_GPIO45)
+#define UART0_GPIO_TX GPIO_PIN_45
+#endif
+
+#ifdef UART0_RX_USING_GPIO0
+#define UART0_GPIO_RX GPIO_PIN_0
+#elif defined(UART0_RX_USING_GPIO1)
+#define UART0_GPIO_RX GPIO_PIN_1
+#elif defined(UART0_RX_USING_GPIO2)
+#define UART0_GPIO_RX GPIO_PIN_2
+#elif defined(UART0_RX_USING_GPIO3)
+#define UART0_GPIO_RX GPIO_PIN_3
+#elif defined(UART0_RX_USING_GPIO4)
+#define UART0_GPIO_RX GPIO_PIN_4
+#elif defined(UART0_RX_USING_GPIO5)
+#define UART0_GPIO_RX GPIO_PIN_5
+#elif defined(UART0_RX_USING_GPIO6)
+#define UART0_GPIO_RX GPIO_PIN_6
+#elif defined(UART0_RX_USING_GPIO7)
+#define UART0_GPIO_RX GPIO_PIN_7
+#elif defined(UART0_RX_USING_GPIO8)
+#define UART0_GPIO_RX GPIO_PIN_8
+#elif defined(UART0_RX_USING_GPIO9)
+#define UART0_GPIO_RX GPIO_PIN_9
+#elif defined(UART0_RX_USING_GPIO10)
+#define UART0_GPIO_RX GPIO_PIN_10
+#elif defined(UART0_RX_USING_GPIO11)
+#define UART0_GPIO_RX GPIO_PIN_11
+#elif defined(UART0_RX_USING_GPIO12)
+#define UART0_GPIO_RX GPIO_PIN_12
+#elif defined(UART0_RX_USING_GPIO13)
+#define UART0_GPIO_RX GPIO_PIN_13
+#elif defined(UART0_RX_USING_GPIO14)
+#define UART0_GPIO_RX GPIO_PIN_14
+#elif defined(UART0_RX_USING_GPIO15)
+#define UART0_GPIO_RX GPIO_PIN_15
+#elif defined(UART0_RX_USING_GPIO16)
+#define UART0_GPIO_RX GPIO_PIN_16
+#elif defined(UART0_RX_USING_GPIO17)
+#define UART0_GPIO_RX GPIO_PIN_17
+#elif defined(UART0_RX_USING_GPIO18)
+#define UART0_GPIO_RX GPIO_PIN_18
+#elif defined(UART0_RX_USING_GPIO19)
+#define UART0_GPIO_RX GPIO_PIN_19
+#elif defined(UART0_RX_USING_GPIO20)
+#define UART0_GPIO_RX GPIO_PIN_20
+#elif defined(UART0_RX_USING_GPIO21)
+#define UART0_GPIO_RX GPIO_PIN_21
+#elif defined(UART0_RX_USING_GPIO22)
+#define UART0_GPIO_RX GPIO_PIN_22
+#elif defined(UART0_RX_USING_GPIO23)
+#define UART0_GPIO_RX GPIO_PIN_23
+#elif defined(UART0_RX_USING_GPIO24)
+#define UART0_GPIO_RX GPIO_PIN_24
+#elif defined(UART0_RX_USING_GPIO25)
+#define UART0_GPIO_RX GPIO_PIN_25
+#elif defined(UART0_RX_USING_GPIO26)
+#define UART0_GPIO_RX GPIO_PIN_26
+#elif defined(UART0_RX_USING_GPIO27)
+#define UART0_GPIO_RX GPIO_PIN_27
+#elif defined(UART0_RX_USING_GPIO28)
+#define UART0_GPIO_RX GPIO_PIN_28
+#elif defined(UART0_RX_USING_GPIO29)
+#define UART0_GPIO_RX GPIO_PIN_29
+#elif defined(UART0_RX_USING_GPIO30)
+#define UART0_GPIO_RX GPIO_PIN_30
+#elif defined(UART0_RX_USING_GPIO31)
+#define UART0_GPIO_RX GPIO_PIN_31
+#elif defined(UART0_RX_USING_GPIO31)
+#define UART0_GPIO_RX GPIO_PIN_32
+#elif defined(UART0_RX_USING_GPIO33)
+#define UART0_GPIO_RX GPIO_PIN_33
+#elif defined(UART0_RX_USING_GPIO34)
+#define UART0_GPIO_RX GPIO_PIN_34
+#elif defined(UART0_RX_USING_GPIO35)
+#define UART0_GPIO_RX GPIO_PIN_35
+#elif defined(UART0_RX_USING_GPIO36)
+#define UART0_GPIO_RX GPIO_PIN_36
+#elif defined(UART0_RX_USING_GPIO37)
+#define UART0_GPIO_RX GPIO_PIN_37
+#elif defined(UART0_RX_USING_GPIO38)
+#define UART0_GPIO_RX GPIO_PIN_38
+#elif defined(UART0_RX_USING_GPIO39)
+#define UART0_GPIO_RX GPIO_PIN_39
+#elif defined(UART0_RX_USING_GPIO44)
+#define UART0_GPIO_RX GPIO_PIN_44
+#elif defined(UART0_RX_USING_GPIO45)
+#define UART0_GPIO_RX GPIO_PIN_45
+#endif
+
+// uart1
+#ifdef UART1_TX_USING_GPIO0
+#define UART1_GPIO_TX GPIO_PIN_0
+#elif defined(UART1_TX_USING_GPIO1)
+#define UART1_GPIO_TX GPIO_PIN_1
+#elif defined(UART1_TX_USING_GPIO2)
+#define UART1_GPIO_TX GPIO_PIN_2
+#elif defined(UART1_TX_USING_GPIO3)
+#define UART1_GPIO_TX GPIO_PIN_3
+#elif defined(UART1_TX_USING_GPIO4)
+#define UART1_GPIO_TX GPIO_PIN_4
+#elif defined(UART1_TX_USING_GPIO5)
+#define UART1_GPIO_TX GPIO_PIN_5
+#elif defined(UART1_TX_USING_GPIO6)
+#define UART1_GPIO_TX GPIO_PIN_6
+#elif defined(UART1_TX_USING_GPIO7)
+#define UART1_GPIO_TX GPIO_PIN_7
+#elif defined(UART1_TX_USING_GPIO8)
+#define UART1_GPIO_TX GPIO_PIN_8
+#elif defined(UART1_TX_USING_GPIO9)
+#define UART1_GPIO_TX GPIO_PIN_9
+#elif defined(UART1_TX_USING_GPIO10)
+#define UART1_GPIO_TX GPIO_PIN_10
+#elif defined(UART1_TX_USING_GPIO11)
+#define UART1_GPIO_TX GPIO_PIN_11
+#elif defined(UART1_TX_USING_GPIO12)
+#define UART1_GPIO_TX GPIO_PIN_12
+#elif defined(UART1_TX_USING_GPIO13)
+#define UART1_GPIO_TX GPIO_PIN_13
+#elif defined(UART1_TX_USING_GPIO14)
+#define UART1_GPIO_TX GPIO_PIN_14
+#elif defined(UART1_TX_USING_GPIO15)
+#define UART1_GPIO_TX GPIO_PIN_15
+#elif defined(UART1_TX_USING_GPIO16)
+#define UART1_GPIO_TX GPIO_PIN_16
+#elif defined(UART1_TX_USING_GPIO17)
+#define UART1_GPIO_TX GPIO_PIN_17
+#elif defined(UART1_TX_USING_GPIO18)
+#define UART1_GPIO_TX GPIO_PIN_18
+#elif defined(UART1_TX_USING_GPIO19)
+#define UART1_GPIO_TX GPIO_PIN_19
+#elif defined(UART1_TX_USING_GPIO20)
+#define UART1_GPIO_TX GPIO_PIN_20
+#elif defined(UART1_TX_USING_GPIO21)
+#define UART1_GPIO_TX GPIO_PIN_21
+#elif defined(UART1_TX_USING_GPIO22)
+#define UART1_GPIO_TX GPIO_PIN_22
+#elif defined(UART1_TX_USING_GPIO23)
+#define UART1_GPIO_TX GPIO_PIN_23
+#elif defined(UART1_TX_USING_GPIO24)
+#define UART1_GPIO_TX GPIO_PIN_24
+#elif defined(UART1_TX_USING_GPIO25)
+#define UART1_GPIO_TX GPIO_PIN_25
+#elif defined(UART1_TX_USING_GPIO26)
+#define UART1_GPIO_TX GPIO_PIN_26
+#elif defined(UART1_TX_USING_GPIO27)
+#define UART1_GPIO_TX GPIO_PIN_27
+#elif defined(UART1_TX_USING_GPIO28)
+#define UART1_GPIO_TX GPIO_PIN_28
+#elif defined(UART1_TX_USING_GPIO29)
+#define UART1_GPIO_TX GPIO_PIN_29
+#elif defined(UART1_TX_USING_GPIO30)
+#define UART1_GPIO_TX GPIO_PIN_30
+#elif defined(UART1_TX_USING_GPIO31)
+#define UART1_GPIO_TX GPIO_PIN_31
+#elif defined(UART1_TX_USING_GPIO32)
+#define UART1_GPIO_TX GPIO_PIN_32
+#elif defined(UART1_TX_USING_GPIO33)
+#define UART1_GPIO_TX GPIO_PIN_33
+#elif defined(UART1_TX_USING_GPIO34)
+#define UART1_GPIO_TX GPIO_PIN_34
+#elif defined(UART1_TX_USING_GPIO35)
+#define UART1_GPIO_TX GPIO_PIN_35
+#elif defined(UART1_TX_USING_GPIO36)
+#define UART1_GPIO_TX GPIO_PIN_36
+#elif defined(UART1_TX_USING_GPIO37)
+#define UART1_GPIO_TX GPIO_PIN_37
+#elif defined(UART1_TX_USING_GPIO38)
+#define UART1_GPIO_TX GPIO_PIN_38
+#elif defined(UART1_TX_USING_GPIO39)
+#define UART1_GPIO_TX GPIO_PIN_39
+#elif defined(UART1_TX_USING_GPIO44)
+#define UART1_GPIO_TX GPIO_PIN_44
+#elif defined(UART1_TX_USING_GPIO45)
+#define UART1_GPIO_TX GPIO_PIN_45
+#endif
+
+#ifdef UART1_RX_USING_GPIO0
+#define UART1_GPIO_RX GPIO_PIN_0
+#elif defined(UART1_RX_USING_GPIO1)
+#define UART1_GPIO_RX GPIO_PIN_1
+#elif defined(UART1_RX_USING_GPIO2)
+#define UART1_GPIO_RX GPIO_PIN_2
+#elif defined(UART1_RX_USING_GPIO3)
+#define UART1_GPIO_RX GPIO_PIN_3
+#elif defined(UART1_RX_USING_GPIO4)
+#define UART1_GPIO_RX GPIO_PIN_4
+#elif defined(UART1_RX_USING_GPIO5)
+#define UART1_GPIO_RX GPIO_PIN_5
+#elif defined(UART1_RX_USING_GPIO6)
+#define UART1_GPIO_RX GPIO_PIN_6
+#elif defined(UART1_RX_USING_GPIO7)
+#define UART1_GPIO_RX GPIO_PIN_7
+#elif defined(UART1_RX_USING_GPIO8)
+#define UART1_GPIO_RX GPIO_PIN_8
+#elif defined(UART1_RX_USING_GPIO9)
+#define UART1_GPIO_RX GPIO_PIN_9
+#elif defined(UART1_RX_USING_GPIO10)
+#define UART1_GPIO_RX GPIO_PIN_10
+#elif defined(UART1_RX_USING_GPIO11)
+#define UART1_GPIO_RX GPIO_PIN_11
+#elif defined(UART1_RX_USING_GPIO12)
+#define UART1_GPIO_RX GPIO_PIN_12
+#elif defined(UART1_RX_USING_GPIO13)
+#define UART1_GPIO_RX GPIO_PIN_13
+#elif defined(UART1_RX_USING_GPIO14)
+#define UART1_GPIO_RX GPIO_PIN_14
+#elif defined(UART1_RX_USING_GPIO15)
+#define UART1_GPIO_RX GPIO_PIN_15
+#elif defined(UART1_RX_USING_GPIO16)
+#define UART1_GPIO_RX GPIO_PIN_16
+#elif defined(UART1_RX_USING_GPIO17)
+#define UART1_GPIO_RX GPIO_PIN_17
+#elif defined(UART1_RX_USING_GPIO18)
+#define UART1_GPIO_RX GPIO_PIN_18
+#elif defined(UART1_RX_USING_GPIO19)
+#define UART1_GPIO_RX GPIO_PIN_19
+#elif defined(UART1_RX_USING_GPIO20)
+#define UART1_GPIO_RX GPIO_PIN_20
+#elif defined(UART1_RX_USING_GPIO21)
+#define UART1_GPIO_RX GPIO_PIN_21
+#elif defined(UART1_RX_USING_GPIO22)
+#define UART1_GPIO_RX GPIO_PIN_22
+#elif defined(UART1_RX_USING_GPIO23)
+#define UART1_GPIO_RX GPIO_PIN_23
+#elif defined(UART1_RX_USING_GPIO24)
+#define UART1_GPIO_RX GPIO_PIN_24
+#elif defined(UART1_RX_USING_GPIO25)
+#define UART1_GPIO_RX GPIO_PIN_25
+#elif defined(UART1_RX_USING_GPIO26)
+#define UART1_GPIO_RX GPIO_PIN_26
+#elif defined(UART1_RX_USING_GPIO27)
+#define UART1_GPIO_RX GPIO_PIN_27
+#elif defined(UART1_RX_USING_GPIO28)
+#define UART1_GPIO_RX GPIO_PIN_28
+#elif defined(UART1_RX_USING_GPIO29)
+#define UART1_GPIO_RX GPIO_PIN_29
+#elif defined(UART1_RX_USING_GPIO30)
+#define UART1_GPIO_RX GPIO_PIN_30
+#elif defined(UART1_RX_USING_GPIO31)
+#define UART1_GPIO_RX GPIO_PIN_31
+#elif defined(UART1_RX_USING_GPIO31)
+#define UART1_GPIO_RX GPIO_PIN_32
+#elif defined(UART1_RX_USING_GPIO33)
+#define UART1_GPIO_RX GPIO_PIN_33
+#elif defined(UART1_RX_USING_GPIO34)
+#define UART1_GPIO_RX GPIO_PIN_34
+#elif defined(UART1_RX_USING_GPIO35)
+#define UART1_GPIO_RX GPIO_PIN_35
+#elif defined(UART1_RX_USING_GPIO36)
+#define UART1_GPIO_RX GPIO_PIN_36
+#elif defined(UART1_RX_USING_GPIO37)
+#define UART1_GPIO_RX GPIO_PIN_37
+#elif defined(UART1_RX_USING_GPIO38)
+#define UART1_GPIO_RX GPIO_PIN_38
+#elif defined(UART1_RX_USING_GPIO39)
+#define UART1_GPIO_RX GPIO_PIN_39
+#elif defined(UART1_RX_USING_GPIO44)
+#define UART1_GPIO_RX GPIO_PIN_44
+#elif defined(UART1_RX_USING_GPIO45)
+#define UART1_GPIO_RX GPIO_PIN_45
+#endif
+
+// uart2
+#ifdef UART2_TX_USING_GPIO0
+#define UART2_GPIO_TX GPIO_PIN_0
+#elif defined(UART2_TX_USING_GPIO1)
+#define UART2_GPIO_TX GPIO_PIN_1
+#elif defined(UART2_TX_USING_GPIO2)
+#define UART2_GPIO_TX GPIO_PIN_2
+#elif defined(UART2_TX_USING_GPIO3)
+#define UART2_GPIO_TX GPIO_PIN_3
+#elif defined(UART2_TX_USING_GPIO4)
+#define UART2_GPIO_TX GPIO_PIN_4
+#elif defined(UART2_TX_USING_GPIO5)
+#define UART2_GPIO_TX GPIO_PIN_5
+#elif defined(UART2_TX_USING_GPIO6)
+#define UART2_GPIO_TX GPIO_PIN_6
+#elif defined(UART2_TX_USING_GPIO7)
+#define UART2_GPIO_TX GPIO_PIN_7
+#elif defined(UART2_TX_USING_GPIO8)
+#define UART2_GPIO_TX GPIO_PIN_8
+#elif defined(UART2_TX_USING_GPIO9)
+#define UART2_GPIO_TX GPIO_PIN_9
+#elif defined(UART2_TX_USING_GPIO10)
+#define UART2_GPIO_TX GPIO_PIN_10
+#elif defined(UART2_TX_USING_GPIO11)
+#define UART2_GPIO_TX GPIO_PIN_11
+#elif defined(UART2_TX_USING_GPIO12)
+#define UART2_GPIO_TX GPIO_PIN_12
+#elif defined(UART2_TX_USING_GPIO13)
+#define UART2_GPIO_TX GPIO_PIN_13
+#elif defined(UART2_TX_USING_GPIO14)
+#define UART2_GPIO_TX GPIO_PIN_14
+#elif defined(UART2_TX_USING_GPIO15)
+#define UART2_GPIO_TX GPIO_PIN_15
+#elif defined(UART2_TX_USING_GPIO16)
+#define UART2_GPIO_TX GPIO_PIN_16
+#elif defined(UART2_TX_USING_GPIO17)
+#define UART2_GPIO_TX GPIO_PIN_17
+#elif defined(UART2_TX_USING_GPIO18)
+#define UART2_GPIO_TX GPIO_PIN_18
+#elif defined(UART2_TX_USING_GPIO19)
+#define UART2_GPIO_TX GPIO_PIN_19
+#elif defined(UART2_TX_USING_GPIO20)
+#define UART2_GPIO_TX GPIO_PIN_20
+#elif defined(UART2_TX_USING_GPIO21)
+#define UART2_GPIO_TX GPIO_PIN_21
+#elif defined(UART2_TX_USING_GPIO22)
+#define UART2_GPIO_TX GPIO_PIN_22
+#elif defined(UART2_TX_USING_GPIO23)
+#define UART2_GPIO_TX GPIO_PIN_23
+#elif defined(UART2_TX_USING_GPIO24)
+#define UART2_GPIO_TX GPIO_PIN_24
+#elif defined(UART2_TX_USING_GPIO25)
+#define UART2_GPIO_TX GPIO_PIN_25
+#elif defined(UART2_TX_USING_GPIO26)
+#define UART2_GPIO_TX GPIO_PIN_26
+#elif defined(UART2_TX_USING_GPIO27)
+#define UART2_GPIO_TX GPIO_PIN_27
+#elif defined(UART2_TX_USING_GPIO28)
+#define UART2_GPIO_TX GPIO_PIN_28
+#elif defined(UART2_TX_USING_GPIO29)
+#define UART2_GPIO_TX GPIO_PIN_29
+#elif defined(UART2_TX_USING_GPIO30)
+#define UART2_GPIO_TX GPIO_PIN_30
+#elif defined(UART2_TX_USING_GPIO31)
+#define UART2_GPIO_TX GPIO_PIN_31
+#elif defined(UART2_TX_USING_GPIO32)
+#define UART2_GPIO_TX GPIO_PIN_32
+#elif defined(UART2_TX_USING_GPIO33)
+#define UART2_GPIO_TX GPIO_PIN_33
+#elif defined(UART2_TX_USING_GPIO34)
+#define UART2_GPIO_TX GPIO_PIN_34
+#elif defined(UART2_TX_USING_GPIO35)
+#define UART2_GPIO_TX GPIO_PIN_35
+#elif defined(UART2_TX_USING_GPIO36)
+#define UART2_GPIO_TX GPIO_PIN_36
+#elif defined(UART2_TX_USING_GPIO37)
+#define UART2_GPIO_TX GPIO_PIN_37
+#elif defined(UART2_TX_USING_GPIO38)
+#define UART2_GPIO_TX GPIO_PIN_38
+#elif defined(UART2_TX_USING_GPIO39)
+#define UART2_GPIO_TX GPIO_PIN_39
+#elif defined(UART2_TX_USING_GPIO44)
+#define UART2_GPIO_TX GPIO_PIN_44
+#elif defined(UART2_TX_USING_GPIO45)
+#define UART2_GPIO_TX GPIO_PIN_45
+#endif
+
+#ifdef UART2_RX_USING_GPIO0
+#define UART2_GPIO_RX GPIO_PIN_0
+#elif defined(UART2_RX_USING_GPIO1)
+#define UART2_GPIO_RX GPIO_PIN_1
+#elif defined(UART2_RX_USING_GPIO2)
+#define UART2_GPIO_RX GPIO_PIN_2
+#elif defined(UART2_RX_USING_GPIO3)
+#define UART2_GPIO_RX GPIO_PIN_3
+#elif defined(UART2_RX_USING_GPIO4)
+#define UART2_GPIO_RX GPIO_PIN_4
+#elif defined(UART2_RX_USING_GPIO5)
+#define UART2_GPIO_RX GPIO_PIN_5
+#elif defined(UART2_RX_USING_GPIO6)
+#define UART2_GPIO_RX GPIO_PIN_6
+#elif defined(UART2_RX_USING_GPIO7)
+#define UART2_GPIO_RX GPIO_PIN_7
+#elif defined(UART2_RX_USING_GPIO8)
+#define UART2_GPIO_RX GPIO_PIN_8
+#elif defined(UART2_RX_USING_GPIO9)
+#define UART2_GPIO_RX GPIO_PIN_9
+#elif defined(UART2_RX_USING_GPIO10)
+#define UART2_GPIO_RX GPIO_PIN_10
+#elif defined(UART2_RX_USING_GPIO11)
+#define UART2_GPIO_RX GPIO_PIN_11
+#elif defined(UART2_RX_USING_GPIO12)
+#define UART2_GPIO_RX GPIO_PIN_12
+#elif defined(UART2_RX_USING_GPIO13)
+#define UART2_GPIO_RX GPIO_PIN_13
+#elif defined(UART2_RX_USING_GPIO14)
+#define UART2_GPIO_RX GPIO_PIN_14
+#elif defined(UART2_RX_USING_GPIO15)
+#define UART2_GPIO_RX GPIO_PIN_15
+#elif defined(UART2_RX_USING_GPIO16)
+#define UART2_GPIO_RX GPIO_PIN_16
+#elif defined(UART2_RX_USING_GPIO17)
+#define UART2_GPIO_RX GPIO_PIN_17
+#elif defined(UART2_RX_USING_GPIO18)
+#define UART2_GPIO_RX GPIO_PIN_18
+#elif defined(UART2_RX_USING_GPIO19)
+#define UART2_GPIO_RX GPIO_PIN_19
+#elif defined(UART2_RX_USING_GPIO20)
+#define UART2_GPIO_RX GPIO_PIN_20
+#elif defined(UART2_RX_USING_GPIO21)
+#define UART2_GPIO_RX GPIO_PIN_21
+#elif defined(UART2_RX_USING_GPIO22)
+#define UART2_GPIO_RX GPIO_PIN_22
+#elif defined(UART2_RX_USING_GPIO23)
+#define UART2_GPIO_RX GPIO_PIN_23
+#elif defined(UART2_RX_USING_GPIO24)
+#define UART2_GPIO_RX GPIO_PIN_24
+#elif defined(UART2_RX_USING_GPIO25)
+#define UART2_GPIO_RX GPIO_PIN_25
+#elif defined(UART2_RX_USING_GPIO26)
+#define UART2_GPIO_RX GPIO_PIN_26
+#elif defined(UART2_RX_USING_GPIO27)
+#define UART2_GPIO_RX GPIO_PIN_27
+#elif defined(UART2_RX_USING_GPIO28)
+#define UART2_GPIO_RX GPIO_PIN_28
+#elif defined(UART2_RX_USING_GPIO29)
+#define UART2_GPIO_RX GPIO_PIN_29
+#elif defined(UART2_RX_USING_GPIO30)
+#define UART2_GPIO_RX GPIO_PIN_30
+#elif defined(UART2_RX_USING_GPIO31)
+#define UART2_GPIO_RX GPIO_PIN_31
+#elif defined(UART2_RX_USING_GPIO31)
+#define UART2_GPIO_RX GPIO_PIN_32
+#elif defined(UART2_RX_USING_GPIO33)
+#define UART2_GPIO_RX GPIO_PIN_33
+#elif defined(UART2_RX_USING_GPIO34)
+#define UART2_GPIO_RX GPIO_PIN_34
+#elif defined(UART2_RX_USING_GPIO35)
+#define UART2_GPIO_RX GPIO_PIN_35
+#elif defined(UART2_RX_USING_GPIO36)
+#define UART2_GPIO_RX GPIO_PIN_36
+#elif defined(UART2_RX_USING_GPIO37)
+#define UART2_GPIO_RX GPIO_PIN_37
+#elif defined(UART2_RX_USING_GPIO38)
+#define UART2_GPIO_RX GPIO_PIN_38
+#elif defined(UART2_RX_USING_GPIO39)
+#define UART2_GPIO_RX GPIO_PIN_39
+#elif defined(UART2_RX_USING_GPIO44)
+#define UART2_GPIO_RX GPIO_PIN_44
+#elif defined(UART2_RX_USING_GPIO45)
+#define UART2_GPIO_RX GPIO_PIN_45
+#endif
+
+// uart3
+#ifdef UART3_TX_USING_GPIO0
+#define UART3_GPIO_TX GPIO_PIN_0
+#elif defined(UART3_TX_USING_GPIO4)
+#define UART3_GPIO_TX GPIO_PIN_4
+#elif defined(UART3_TX_USING_GPIO8)
+#define UART3_GPIO_TX GPIO_PIN_8
+#elif defined(UART3_TX_USING_GPIO12)
+#define UART3_GPIO_TX GPIO_PIN_12
+#elif defined(UART3_TX_USING_GPIO16)
+#define UART3_GPIO_TX GPIO_PIN_16
+#elif defined(UART3_TX_USING_GPIO18)
+#define UART3_GPIO_TX GPIO_PIN_18
+#elif defined(UART3_TX_USING_GPIO20)
+#define UART3_GPIO_TX GPIO_PIN_20
+#elif defined(UART3_TX_USING_GPIO24)
+#define UART3_GPIO_TX GPIO_PIN_24
+#elif defined(UART3_TX_USING_GPIO28)
+#define UART3_GPIO_TX GPIO_PIN_28
+#elif defined(UART3_TX_USING_GPIO32)
+#define UART3_GPIO_TX GPIO_PIN_32
+#elif defined(UART3_TX_USING_GPIO36)
+#define UART3_GPIO_TX GPIO_PIN_36
+#elif defined(UART3_TX_USING_GPIO40)
+#define UART3_GPIO_TX GPIO_PIN_40
+#elif defined(UART3_TX_USING_GPIO44)
+#define UART3_GPIO_TX GPIO_PIN_44
+#endif
+
+#ifdef UART3_RX_USING_GPIO1
+#define UART3_GPIO_RX GPIO_PIN_1
+#elif defined(UART3_RX_USING_GPIO5)
+#define UART3_GPIO_RX GPIO_PIN_5
+#elif defined(UART3_RX_USING_GPIO9)
+#define UART3_GPIO_RX GPIO_PIN_9
+#elif defined(UART3_RX_USING_GPIO13)
+#define UART3_GPIO_RX GPIO_PIN_13
+#elif defined(UART3_RX_USING_GPIO17)
+#define UART3_GPIO_RX GPIO_PIN_17
+#elif defined(UART3_RX_USING_GPIO21)
+#define UART3_GPIO_RX GPIO_PIN_21
+#elif defined(UART3_RX_USING_GPIO25)
+#define UART3_GPIO_RX GPIO_PIN_25
+#elif defined(UART3_RX_USING_GPIO29)
+#define UART3_GPIO_RX GPIO_PIN_29
+#elif defined(UART3_RX_USING_GPIO33)
+#define UART3_GPIO_RX GPIO_PIN_33
+#elif defined(UART3_RX_USING_GPIO37)
+#define UART3_GPIO_RX GPIO_PIN_37
+#elif defined(UART3_RX_USING_GPIO41)
+#define UART3_GPIO_RX GPIO_PIN_41
+#elif defined(UART3_RX_USING_GPIO45)
+#define UART3_GPIO_RX GPIO_PIN_45
+#endif
+
int rt_hw_uart_init(void);
#endif /* __DRV_USART_H__ */