[bluetrum] Fix the cache mechanism

bsp/bluetrum/ab32vg1-ab-prougen/board/board.c

@@ -19,14 +19,13 @@ void rt_soft_isr(int vector, void *param);
 void cpu_irq_comm(void);
 void set_cpu_irq_comm(void (*irq_hook)(void));
 void load_cache();
+void os_cache_init(void);
 void sys_error_hook(uint8_t err_no);
 
-typedef void (*os_cache_setfunc_func)(void *load_cache_func, void *io_read);
 typedef void (*spiflash_init_func)(uint8_t sf_read, uint8_t dummy);
 
-#define os_cache_setfunc        ((os_cache_setfunc_func) 0x84024)
-
 static struct rt_mutex mutex_spiflash = {0};
+static struct rt_mutex mutex_cache = {0};
 extern volatile rt_uint8_t rt_interrupt_nest;
 extern uint32_t __heap_start, __heap_end;
 
@@ -148,8 +147,9 @@ void rt_hw_us_delay(rt_uint32_t us)
 RT_SECTION(".irq.cache")
 void cache_init(void)
 {
-    os_cache_setfunc(load_cache, NULL);
+    os_cache_init();
     rt_mutex_init(&mutex_spiflash, "flash_mutex", RT_IPC_FLAG_FIFO);
+    rt_mutex_init(&mutex_cache, "cache_mutex", RT_IPC_FLAG_FIFO);
 }
 
 RT_SECTION(".irq.cache")
@@ -170,6 +170,24 @@ void os_spiflash_unlock(void)
     }
 }
 
+RT_SECTION(".irq.cache")
+void os_cache_lock(void)
+{
+    // if (rt_thread_self()->stat == RT_THREAD_RUNNING) {
+    if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
+        rt_mutex_take(&mutex_cache, RT_WAITING_FOREVER);
+    }
+}
+
+RT_SECTION(".irq.cache")
+void os_cache_unlock(void)
+{
+    // if (rt_thread_self()->stat == RT_THREAD_RUNNING) {
+    if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
+        rt_mutex_release(&mutex_cache);
+    }
+}
+
 RT_SECTION(".irq.err.str")
 static const char stack_info[] = "thread sp=0x%x name=%s";
 

bsp/bluetrum/ab32vg1-ab-prougen/link.lds

@@ -43,7 +43,7 @@ SECTIONS
         . = ALIGN(4);
         PROVIDE(__ctors_start__ = .);
         KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
+        KEEP (*(.init_array*))
         PROVIDE(__ctors_end__ = .);
 
         . = ALIGN(4);
@@ -73,21 +73,17 @@ SECTIONS
     .comm __comm_vma : {
         . = ALIGN(4);
         KEEP(*(.vector))
+        *(.irq.cache)
         *(.irq*)
-        /*applications**.o (.text .rodata)*/
+        *components*src**.o (.text* .rodata*)
-        *hal_libraries*ab32vg1_hal**.o (.text .rodata)
+        *ab32vg1_hal**.o (.text* .rodata*)
-        *(.text.unlikely)
+        *drv_gpio.o (.text* .rodata*)
-        *(.text.startup)
+        *drv_usart.o (.rodata*)
-        *hal_drivers**.o (.rodata)
+        EXCLUDE_FILE(*lib_a**.o *unwind*.o) *(.srodata*)
-        *audio*drv_sound.o (.rodata)
-        *system_ab32vgx.o (.rodata)
-        EXCLUDE_FILE(*lib_a**.o *cp-demangle.o *cp-demangle.o 
-        *src*mem.o *src*memheap.o *dfs**.o *components.o *drivers*sdio**.o *cmd.o *msh_file.o
-        *drv_sdio.o *drv_wdt.o) *(.rodata.str1.4)
-        EXCLUDE_FILE(*lib_a**.o *unwind*.o) *(.srodata)
         *(.rela*)
         *(.data*)
         *(.sdata*)
+        *(.com_text*)
     } > comm AT > flash
 
     .bss (NOLOAD):

bsp/bluetrum/libraries/hal_libraries/bmsis/source/startup.S

@@ -9,6 +9,8 @@
 .global _start
 .section .reset, "ax"
 _start:
+    la      tp, _tp
+    la      gp, _gp
 
     //load comm
     la      a0, __comm_vma
@@ -25,7 +27,7 @@ _start:
     la      a0, __irq_stack_start           //Stack清成0x23
     li      a1, 0x23
     la      a2, __irq_stack_size
-    call    memset
+    call    0x84040
     la      ra, __irq_stack
     lui	    a5, 0x1
     sw	    zero, -1920(a5)
@@ -35,7 +37,7 @@ _start:
     la      a0, __bss_start
     li      a1, 0
     la      a2, __bss_size
-    call    memset
+    call    0x84040
 
     call    cache_init
 
@@ -56,32 +58,33 @@ __exception:
 
     .org    0x40
     jal x0, low_prio_irq
-    mret
 
     .org    0x80
 #define METHOD 1
 #if METHOD == 1
     addi    sp, sp, -6*4
-    lw      a0, PICEN(zero)
+    # lw      a0, PICEN(zero)
     lw      a1, EPC(zero)
     lw      a2, EPICCON(zero)
-    sw      a0, 3*4(sp)
+    # sw      a0, 3*4(sp)
     sw      a1, 4*4(sp)
     sw      a2, 5*4(sp)
-    andi    a0, a0, 1
+    # andi    a0, a0, 1
-    sw      a0, PICEN(zero)
+    # sw      a0, PICEN(zero)
+    li      a2, 0
+    sw      a2, EPICCON(zero)
     la      a0, 0f
     sw      a0, EPC(zero)
-    j       0x84020
+    j       isr_cache
 0:
     sw      a0, 0(sp)
     sw      a1, 4(sp)
     sw      a2, 8(sp)
 
-    lw      a0, 3*4(sp)
+    # lw      a0, 3*4(sp)
     lw      a1, 4*4(sp)
     lw      a2, 5*4(sp)
-    sw      a0, PICEN(zero)
+    # sw      a0, PICEN(zero)
     sw      a1, EPC(zero)
     sw      a2, EPICCON(zero)
 
@@ -90,9 +93,6 @@ __exception:
     lw      a2, 8(sp)
     addi    sp, sp, 6*4
     mret
-    .align  4
-1:  .word   0, 0
-    j       0x84020
 #endif
 
     .global cpu_irq_comm
@@ -102,3 +102,6 @@ cpu_irq_comm:
     j       cpu_irq_comm_do
 
     ret
+
+    .global _tp
+    .set    _tp,        0x84800