[bsp][stm32] add stm32h750-fk750m1-vbt6 bsp
This commit is contained in:
NU-LL
Man, Jianting (Meco)
parent
575abd58ff
commit
735fb14fe7
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@ -187,6 +187,7 @@ jobs:
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# - {RTT_BSP: "stm32h750-armfly-h7-tool", RTT_TOOL_CHAIN: "sourcery-arm"}
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- {RTT_BSP: "stm32/stm32h750-artpi", RTT_TOOL_CHAIN: "sourcery-arm"}
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- {RTT_BSP: "stm32/stm32h750-weact-ministm32h7xx", RTT_TOOL_CHAIN: "sourcery-arm"}
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- {RTT_BSP: "stm32/stm32h750-fk750m1-vbt6", RTT_TOOL_CHAIN: "sourcery-arm"}
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- {RTT_BSP: "stm32/stm32l4r5-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
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- {RTT_BSP: "stm32/stm32l4r9-st-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
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- {RTT_BSP: "stm32/stm32l4r9-st-sensortile-box", RTT_TOOL_CHAIN: "sourcery-arm"}
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@ -45,6 +45,8 @@ tags
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.idea
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.vscode
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*.code-workspace
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*.eide.*
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.history
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CMakeLists.txt
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cmake-build-debug
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@ -283,7 +283,7 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur
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static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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HAL_StatusTypeDef state = HAL_OK;;
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HAL_StatusTypeDef state = HAL_OK;
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rt_size_t message_length, already_send_length;
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rt_uint16_t send_length;
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rt_uint8_t *recv_buf;
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@ -0,0 +1,38 @@
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---
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BasedOnStyle: Microsoft
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Language: Cpp
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###################################
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# indent conf
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###################################
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UseTab: Never
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IndentWidth: 4
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TabWidth: 4
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ColumnLimit: 0
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AccessModifierOffset: -4
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NamespaceIndentation: All
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FixNamespaceComments: false
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BreakBeforeBraces: Linux
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###################################
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# other styles
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###################################
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#
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# for more conf, you can ref: https://clang.llvm.org/docs/ClangFormatStyleOptions.html
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#
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AllowShortIfStatementsOnASingleLine: true
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AllowShortLoopsOnASingleLine: true
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AllowShortBlocksOnASingleLine: true
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IndentCaseLabels: true
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SortIncludes: false
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AlignConsecutiveMacros: AcrossEmptyLines
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AlignConsecutiveAssignments: Consecutive
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,42 @@
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*.pyc
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*.map
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*.dblite
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*.elf
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*.bin
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*.hex
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*.axf
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*.exe
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*.pdb
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*.idb
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*.ilk
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*.old
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build
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Debug
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documentation/html
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packages/
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*~
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*.o
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*.obj
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*.out
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*.bak
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*.dep
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*.lib
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*.i
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*.d
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.DS_Stor*
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.config 3
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.config 4
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.config 5
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Midea-X1
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*.uimg
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GPATH
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GRTAGS
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GTAGS
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.vscode
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JLinkLog.txt
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JLinkSettings.ini
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DebugConfig/
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RTE/
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settings/
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*.uvguix*
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cconfig.h
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@ -0,0 +1,9 @@
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<?xml version="1.0" encoding="utf-8"?>
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<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
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<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
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<events>
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</events>
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</component_viewer>
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@ -0,0 +1,21 @@
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mainmenu "RT-Thread Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "../libraries/Kconfig"
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source "board/Kconfig"
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@ -0,0 +1,122 @@
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# FANKE FK750M1-VBT6 开发板 BSP 说明
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## 简介
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本文档为 FANKE FK750M1-VBT6 开发板的 BSP (板级支持包) 说明。
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主要内容如下：
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- 开发板资源介绍
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- BSP 快速上手
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- 进阶使用方法
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通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
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## 开发板介绍
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FK750M1-VBT6 是 FANKE 推出的一款基于 ARM Cortex-M7 内核的核心板，最高频率为480Mhz，具有128KB ROM、1MB RAM，外接 8MB QSPI Flash，板载资源如下：
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* 外扩 W25Q64，容量 8M 字节
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* 1 个复位按键，1 个用户按键
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* 1 个 BOOT 按键
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* 1 个用户 LED
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* 1 个 Type C 接口
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* 1 个 TF 卡接口
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* 1 个SPI 液晶和摄像头接口
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* 引出 73 个 IO 口
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开发板外观如下图所示：
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## 外设支持
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本 BSP 目前对外设的支持情况如下：
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| **板载外设** | **支持情况** | **备注** |
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| :----------------- | :----------------: | :------------: |
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| TF Card | 待支持 | |
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| QSPI Flash | 待支持 | W25Q64JV |
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| OV2640 Camera | 支持 | |
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| OV5640 Camera | 待支持 | |
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| 0.96' LCD | 待支持 | 160*80 |
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| 1.14' LCD | 待支持 | 240*135 |
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| 1.30' LCD | 支持 | 240*240 |
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| 1.54' LCD | 待支持 | 240*240 |
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| 1.69' LCD | 待支持 | 240*280 |
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| 2.00' LCD | 待支持 | 240*320 |
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| **片上外设** | **支持情况** | **备注** |
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| GPIO | 支持 | |
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| UART | 支持 | USART1 |
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| SPI | 支持 | |
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| RTC | 支持 | |
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| USB Device | 待支持 | |
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## 使用说明
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使用说明分为如下两个章节：
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- 快速上手
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本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
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- 进阶使用
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本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
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### 快速上手
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本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
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#### 硬件连接
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使用数据线连接开发板到 PC。使用 usb 转串口工具连接 PA9 ( USART1_TX ) 和 PA10 ( USART1_RX )。
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#### 编译下载
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双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
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#### 运行结果
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下载程序成功之后，系统会自动运行，LED闪烁。
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连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
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```bash
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\ | /
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- RT - Thread Operating System
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/ | \ 5.0.0 build Mar 22 2023 00:10:44
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2006 - 2022 Copyright by RT-Thread team
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msh />
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```
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### 进阶使用
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此 BSP 默认只开启了 GPIO 和 串口1 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
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1. 在 bsp 下打开 env 工具。
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2. 输入 `menuconfig` 命令配置工程，配置好之后保存退出。
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3. 输入 `pkgs --update` 命令更新软件包。
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4. 输入 `scons --target=mdk4/mdk5/iar` 命令重新生成工程。
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本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
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## 注意事项
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- 目前仅测试 V1.1 版本硬件，较老的 V1.0 暂未测试
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- 默认仅开启 LCD 功能，此时生成的固件大小约为 110k 左右，如果开启其他功能固件超过 128k ，可以通过如下方式：
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1. H750 实际上可以使用片内 2M ram，但是 128k 后 ST 不保证可用性，此时可以：
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1. 在 keil 中芯片选为 H743 ，此时会出现 2MB Flash 的下载算法，选择此下载算法下载程序
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2. bsp\stm32\stm32h750-weact-ministm32h7xx 目录下会提供一份 h750 的 keil 内部 ram 的下载算法，可以采用下载算法
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2. 通过 bootloader 从片外 qspi flash 启动
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- 调试串口为串口1 映射说明
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PA9 ------> USART1_TX
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PA10 ------> USART1_RX
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## 联系人信息
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维护人:
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- [NU-LL](https://github.com/NU-LL)
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@ -0,0 +1,14 @@
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# for module compiling
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import os
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from building import *
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cwd = GetCurrentDir()
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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@ -0,0 +1,60 @@
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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try:
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from building import *
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except:
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print('Cannot found RT-Thread root directory, please check RTT_ROOT')
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print(RTT_ROOT)
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exit(-1)
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TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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if rtconfig.PLATFORM in ['iccarm']:
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env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(ARFLAGS = [''])
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env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
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Export('RTT_ROOT')
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Export('rtconfig')
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SDK_ROOT = os.path.abspath('./')
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if os.path.exists(SDK_ROOT + '/libraries'):
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libraries_path_prefix = SDK_ROOT + '/libraries'
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else:
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libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
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SDK_LIB = libraries_path_prefix
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Export('SDK_LIB')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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stm32_library = 'STM32H7xx_HAL'
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rtconfig.BSP_LIBRARY_TYPE = stm32_library
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# include drivers
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objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript')))
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# include libraries
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objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
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# make a building
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DoBuilding(TARGET, objs)
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@ -0,0 +1,16 @@
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import rtconfig
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from building import *
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import os
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cwd = GetCurrentDir()
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path = [cwd]
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src = Glob('*.c')
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = path)
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list = os.listdir(cwd)
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for item in list:
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if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
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group = group + SConscript(os.path.join(item, 'SConscript'))
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Return('group')
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@ -0,0 +1,32 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-10-25 zylx first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <board.h>
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/* defined the LED1 pin: PC13 */
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#define LED1_PIN GET_PIN(C, 13)
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int main(void)
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{
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int count = 1;
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/* set LED0 pin mode to output */
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rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
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while (count++)
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{
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rt_pin_write(LED1_PIN, PIN_HIGH);
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rt_thread_mdelay(500);
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rt_pin_write(LED1_PIN, PIN_LOW);
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rt_thread_mdelay(500);
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}
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return RT_EOK;
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}
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@ -0,0 +1,329 @@
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#MicroXplorer Configuration settings - do not modify
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CAD.formats=[]
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CAD.pinconfig=Project naming
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CAD.provider=
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CORTEX_M7.CPU_DCache=Enabled
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CORTEX_M7.CPU_ICache=Enabled
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CORTEX_M7.IPParameters=CPU_ICache,CPU_DCache
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DCMI.IPParameters=PCKPolarity
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DCMI.PCKPolarity=DCMI_PCKPOLARITY_RISING
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File.Version=6
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GPIO.groupedBy=
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KeepUserPlacement=false
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Mcu.CPN=STM32H750VBT6
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Mcu.Family=STM32H7
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Mcu.IP0=CORTEX_M7
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Mcu.IP1=DCMI
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Mcu.IP10=USART1
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Mcu.IP2=DEBUG
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Mcu.IP3=NVIC
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Mcu.IP4=QUADSPI
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Mcu.IP5=RCC
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Mcu.IP6=RTC
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Mcu.IP7=SDMMC1
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Mcu.IP8=SPI4
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Mcu.IP9=SYS
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Mcu.IPNb=11
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Mcu.Name=STM32H750VBTx
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Mcu.Package=LQFP100
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Mcu.Pin0=PE2
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Mcu.Pin1=PE4
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Mcu.Pin10=PB2
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Mcu.Pin11=PE11
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Mcu.Pin12=PE12
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Mcu.Pin13=PE14
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Mcu.Pin14=PD11
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Mcu.Pin15=PD12
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Mcu.Pin16=PD13
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Mcu.Pin17=PC6
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Mcu.Pin18=PC7
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Mcu.Pin19=PC8
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Mcu.Pin2=PE5
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Mcu.Pin20=PC9
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Mcu.Pin21=PA9
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Mcu.Pin22=PA10
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Mcu.Pin23=PA13 (JTMS/SWDIO)
|
||||
Mcu.Pin24=PA14 (JTCK/SWCLK)
|
||||
Mcu.Pin25=PC10
|
||||
Mcu.Pin26=PC11
|
||||
Mcu.Pin27=PC12
|
||||
Mcu.Pin28=PD2
|
||||
Mcu.Pin29=PD3
|
||||
Mcu.Pin3=PE6
|
||||
Mcu.Pin30=PB6
|
||||
Mcu.Pin31=PB7
|
||||
Mcu.Pin32=PE0
|
||||
Mcu.Pin33=PE1
|
||||
Mcu.Pin34=VP_RTC_VS_RTC_Activate
|
||||
Mcu.Pin35=VP_SYS_VS_Systick
|
||||
Mcu.Pin4=PC14-OSC32_IN (OSC32_IN)
|
||||
Mcu.Pin5=PC15-OSC32_OUT (OSC32_OUT)
|
||||
Mcu.Pin6=PH0-OSC_IN (PH0)
|
||||
Mcu.Pin7=PH1-OSC_OUT (PH1)
|
||||
Mcu.Pin8=PA4
|
||||
Mcu.Pin9=PA6
|
||||
Mcu.PinsNb=36
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32H750VBTx
|
||||
MxCube.Version=6.8.0
|
||||
MxDb.Version=DB.6.0.80
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.DCMI_IRQn=true\:0\:0\:true\:false\:true\:true\:true\:true
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.ForceEnableDMAVector=true
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
|
||||
NVIC.SDMMC1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
PA10.Locked=true
|
||||
PA10.Mode=Asynchronous
|
||||
PA10.Signal=USART1_RX
|
||||
PA13\ (JTMS/SWDIO).Mode=Serial_Wire
|
||||
PA13\ (JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
|
||||
PA14\ (JTCK/SWCLK).Mode=Serial_Wire
|
||||
PA14\ (JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
|
||||
PA4.GPIOParameters=GPIO_Speed
|
||||
PA4.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PA4.Mode=Slave_8_bits_External_Synchro
|
||||
PA4.Signal=DCMI_HSYNC
|
||||
PA6.GPIOParameters=GPIO_Speed
|
||||
PA6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PA6.Mode=Slave_8_bits_External_Synchro
|
||||
PA6.Signal=DCMI_PIXCLK
|
||||
PA9.Locked=true
|
||||
PA9.Mode=Asynchronous
|
||||
PA9.Signal=USART1_TX
|
||||
PB2.GPIOParameters=GPIO_Speed
|
||||
PB2.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PB2.Mode=Single Bank 1
|
||||
PB2.Signal=QUADSPI_CLK
|
||||
PB6.GPIOParameters=GPIO_Speed
|
||||
PB6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PB6.Locked=true
|
||||
PB6.Mode=Single Bank 1
|
||||
PB6.Signal=QUADSPI_BK1_NCS
|
||||
PB7.GPIOParameters=GPIO_Speed
|
||||
PB7.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PB7.Mode=Slave_8_bits_External_Synchro
|
||||
PB7.Signal=DCMI_VSYNC
|
||||
PC10.Mode=SD_4_bits_Wide_bus
|
||||
PC10.Signal=SDMMC1_D2
|
||||
PC11.Mode=SD_4_bits_Wide_bus
|
||||
PC11.Signal=SDMMC1_D3
|
||||
PC12.Mode=SD_4_bits_Wide_bus
|
||||
PC12.Signal=SDMMC1_CK
|
||||
PC14-OSC32_IN\ (OSC32_IN).Mode=LSE-External-Oscillator
|
||||
PC14-OSC32_IN\ (OSC32_IN).Signal=RCC_OSC32_IN
|
||||
PC15-OSC32_OUT\ (OSC32_OUT).Mode=LSE-External-Oscillator
|
||||
PC15-OSC32_OUT\ (OSC32_OUT).Signal=RCC_OSC32_OUT
|
||||
PC6.GPIOParameters=GPIO_Speed
|
||||
PC6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PC6.Mode=Slave_8_bits_External_Synchro
|
||||
PC6.Signal=DCMI_D0
|
||||
PC7.GPIOParameters=GPIO_Speed
|
||||
PC7.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PC7.Mode=Slave_8_bits_External_Synchro
|
||||
PC7.Signal=DCMI_D1
|
||||
PC8.Mode=SD_4_bits_Wide_bus
|
||||
PC8.Signal=SDMMC1_D0
|
||||
PC9.Mode=SD_4_bits_Wide_bus
|
||||
PC9.Signal=SDMMC1_D1
|
||||
PD11.GPIOParameters=GPIO_Speed
|
||||
PD11.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PD11.Mode=Single Bank 1
|
||||
PD11.Signal=QUADSPI_BK1_IO0
|
||||
PD12.GPIOParameters=GPIO_Speed
|
||||
PD12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PD12.Mode=Single Bank 1
|
||||
PD12.Signal=QUADSPI_BK1_IO1
|
||||
PD13.GPIOParameters=GPIO_Speed
|
||||
PD13.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PD13.Locked=true
|
||||
PD13.Mode=Single Bank 1
|
||||
PD13.Signal=QUADSPI_BK1_IO3
|
||||
PD2.Mode=SD_4_bits_Wide_bus
|
||||
PD2.Signal=SDMMC1_CMD
|
||||
PD3.GPIOParameters=GPIO_Speed
|
||||
PD3.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PD3.Mode=Slave_8_bits_External_Synchro
|
||||
PD3.Signal=DCMI_D5
|
||||
PE0.GPIOParameters=GPIO_Speed
|
||||
PE0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE0.Locked=true
|
||||
PE0.Mode=Slave_8_bits_External_Synchro
|
||||
PE0.Signal=DCMI_D2
|
||||
PE1.GPIOParameters=GPIO_Speed
|
||||
PE1.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE1.Locked=true
|
||||
PE1.Mode=Slave_8_bits_External_Synchro
|
||||
PE1.Signal=DCMI_D3
|
||||
PE11.GPIOParameters=GPIO_Speed
|
||||
PE11.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE11.Mode=NSS_Signal_Hard_Output
|
||||
PE11.Signal=SPI4_NSS
|
||||
PE12.GPIOParameters=GPIO_Speed
|
||||
PE12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE12.Mode=TX_Only_Simplex_Unidirect_Master
|
||||
PE12.Signal=SPI4_SCK
|
||||
PE14.GPIOParameters=GPIO_Speed
|
||||
PE14.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE14.Mode=TX_Only_Simplex_Unidirect_Master
|
||||
PE14.Signal=SPI4_MOSI
|
||||
PE2.GPIOParameters=GPIO_Speed
|
||||
PE2.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE2.Mode=Single Bank 1
|
||||
PE2.Signal=QUADSPI_BK1_IO2
|
||||
PE4.GPIOParameters=GPIO_Speed
|
||||
PE4.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE4.Mode=Slave_8_bits_External_Synchro
|
||||
PE4.Signal=DCMI_D4
|
||||
PE5.GPIOParameters=GPIO_Speed
|
||||
PE5.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE5.Mode=Slave_8_bits_External_Synchro
|
||||
PE5.Signal=DCMI_D6
|
||||
PE6.GPIOParameters=GPIO_Speed
|
||||
PE6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE6.Mode=Slave_8_bits_External_Synchro
|
||||
PE6.Signal=DCMI_D7
|
||||
PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
|
||||
PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
|
||||
PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator
|
||||
PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT
|
||||
PinOutPanel.RotationAngle=0
|
||||
ProjectManager.AskForMigrate=true
|
||||
ProjectManager.BackupPrevious=false
|
||||
ProjectManager.CompilerOptimize=6
|
||||
ProjectManager.ComputerToolchain=false
|
||||
ProjectManager.CoupleFile=false
|
||||
ProjectManager.CustomerFirmwarePackage=
|
||||
ProjectManager.DefaultFWLocation=true
|
||||
ProjectManager.DeletePrevious=true
|
||||
ProjectManager.DeviceId=STM32H750VBTx
|
||||
ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.11.0
|
||||
ProjectManager.FreePins=false
|
||||
ProjectManager.HalAssertFull=false
|
||||
ProjectManager.HeapSize=0x4000
|
||||
ProjectManager.KeepUserCode=true
|
||||
ProjectManager.LastFirmware=true
|
||||
ProjectManager.LibraryCopy=1
|
||||
ProjectManager.MainLocation=Core/Src
|
||||
ProjectManager.NoMain=false
|
||||
ProjectManager.PreviousToolchain=
|
||||
ProjectManager.ProjectBuild=false
|
||||
ProjectManager.ProjectFileName=CubeMX_Config.ioc
|
||||
ProjectManager.ProjectName=CubeMX_Config
|
||||
ProjectManager.ProjectStructure=
|
||||
ProjectManager.RegisterCallBack=
|
||||
ProjectManager.StackSize=0x3000
|
||||
ProjectManager.TargetToolchain=MDK-ARM V5.32
|
||||
ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UnderRoot=false
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_QUADSPI_Init-QUADSPI-false-HAL-true,4-MX_DCMI_Init-DCMI-false-HAL-true,5-MX_RTC_Init-RTC-false-HAL-true,6-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,7-MX_USART1_UART_Init-USART1-false-HAL-true,8-MX_SPI4_Init-SPI4-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
||||
QUADSPI.ClockMode=QSPI_CLOCK_MODE_3
|
||||
QUADSPI.ClockPrescaler=1
|
||||
QUADSPI.FifoThreshold=32
|
||||
QUADSPI.FlashSize=22
|
||||
QUADSPI.IPParameters=ClockPrescaler,FifoThreshold,SampleShifting,FlashSize,ClockMode
|
||||
QUADSPI.SampleShifting=QSPI_SAMPLE_SHIFTING_HALFCYCLE
|
||||
RCC.ADCFreq_Value=50390625
|
||||
RCC.AHB12Freq_Value=240000000
|
||||
RCC.AHB4Freq_Value=240000000
|
||||
RCC.APB1Freq_Value=120000000
|
||||
RCC.APB2Freq_Value=120000000
|
||||
RCC.APB3Freq_Value=120000000
|
||||
RCC.APB4Freq_Value=120000000
|
||||
RCC.AXIClockFreq_Value=240000000
|
||||
RCC.CECFreq_Value=32000
|
||||
RCC.CKPERFreq_Value=64000000
|
||||
RCC.CortexFreq_Value=480000000
|
||||
RCC.CpuClockFreq_Value=480000000
|
||||
RCC.D1CPREFreq_Value=480000000
|
||||
RCC.D1PPRE=RCC_APB3_DIV2
|
||||
RCC.D2PPRE1=RCC_APB1_DIV2
|
||||
RCC.D2PPRE2=RCC_APB2_DIV2
|
||||
RCC.D3PPRE=RCC_APB4_DIV2
|
||||
RCC.DFSDMACLkFreq_Value=240000000
|
||||
RCC.DFSDMFreq_Value=120000000
|
||||
RCC.DIVM1=5
|
||||
RCC.DIVN1=192
|
||||
RCC.DIVP1Freq_Value=480000000
|
||||
RCC.DIVP2Freq_Value=50390625
|
||||
RCC.DIVP3Freq_Value=50390625
|
||||
RCC.DIVQ1=4
|
||||
RCC.DIVQ1Freq_Value=240000000
|
||||
RCC.DIVQ2Freq_Value=50390625
|
||||
RCC.DIVQ3Freq_Value=50390625
|
||||
RCC.DIVR1Freq_Value=480000000
|
||||
RCC.DIVR2Freq_Value=50390625
|
||||
RCC.DIVR3Freq_Value=50390625
|
||||
RCC.FDCANFreq_Value=240000000
|
||||
RCC.FMCFreq_Value=240000000
|
||||
RCC.FamilyName=M
|
||||
RCC.HCLK3ClockFreq_Value=240000000
|
||||
RCC.HCLKFreq_Value=240000000
|
||||
RCC.HPRE=RCC_HCLK_DIV2
|
||||
RCC.HRTIMFreq_Value=240000000
|
||||
RCC.I2C123Freq_Value=120000000
|
||||
RCC.I2C4Freq_Value=120000000
|
||||
RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLSourceVirtual,ProductRev,QSPIFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
|
||||
RCC.LPTIM1Freq_Value=120000000
|
||||
RCC.LPTIM2Freq_Value=120000000
|
||||
RCC.LPTIM345Freq_Value=120000000
|
||||
RCC.LPUART1Freq_Value=120000000
|
||||
RCC.LTDCFreq_Value=50390625
|
||||
RCC.MCO1PinFreq_Value=64000000
|
||||
RCC.MCO2PinFreq_Value=480000000
|
||||
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
|
||||
RCC.ProductRev=revV
|
||||
RCC.QSPIFreq_Value=240000000
|
||||
RCC.RNGFreq_Value=48000000
|
||||
RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
|
||||
RCC.RTCFreq_Value=32768
|
||||
RCC.SAI1Freq_Value=240000000
|
||||
RCC.SAI23Freq_Value=240000000
|
||||
RCC.SAI4AFreq_Value=240000000
|
||||
RCC.SAI4BFreq_Value=240000000
|
||||
RCC.SDMMCFreq_Value=240000000
|
||||
RCC.SPDIFRXFreq_Value=240000000
|
||||
RCC.SPI123Freq_Value=240000000
|
||||
RCC.SPI45Freq_Value=120000000
|
||||
RCC.SPI6Freq_Value=120000000
|
||||
RCC.SWPMI1Freq_Value=120000000
|
||||
RCC.SYSCLKFreq_VALUE=480000000
|
||||
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
||||
RCC.Tim1OutputFreq_Value=240000000
|
||||
RCC.Tim2OutputFreq_Value=240000000
|
||||
RCC.TraceFreq_Value=480000000
|
||||
RCC.USART16Freq_Value=120000000
|
||||
RCC.USART234578Freq_Value=120000000
|
||||
RCC.USBFreq_Value=240000000
|
||||
RCC.VCO1OutputFreq_Value=960000000
|
||||
RCC.VCO2OutputFreq_Value=100781250
|
||||
RCC.VCO3OutputFreq_Value=100781250
|
||||
RCC.VCOInput1Freq_Value=5000000
|
||||
RCC.VCOInput2Freq_Value=781250
|
||||
RCC.VCOInput3Freq_Value=781250
|
||||
SDMMC1.ClockDiv=6
|
||||
SDMMC1.IPParameters=ClockDiv
|
||||
SPI4.CalculateBaudRate=60.0 MBits/s
|
||||
SPI4.DataSize=SPI_DATASIZE_8BIT
|
||||
SPI4.Direction=SPI_DIRECTION_2LINES_TXONLY
|
||||
SPI4.FifoThreshold=SPI_FIFO_THRESHOLD_02DATA
|
||||
SPI4.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,DataSize,FifoThreshold,TIMode
|
||||
SPI4.Mode=SPI_MODE_MASTER
|
||||
SPI4.TIMode=SPI_TIMODE_DISABLE
|
||||
SPI4.VirtualNSS=VM_NSSHARD
|
||||
SPI4.VirtualType=VM_MASTER
|
||||
USART1.IPParameters=VirtualMode-Asynchronous
|
||||
USART1.VirtualMode-Asynchronous=VM_ASYNC
|
||||
VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
|
||||
VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
|
||||
VP_SYS_VS_Systick.Mode=SysTick
|
||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||
board=custom
|
||||
|
|
@ -0,0 +1,69 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.h
|
||||
* @brief : Header for main.c file.
|
||||
* This file contains the common defines of the application.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H
|
||||
#define __MAIN_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_hal.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void Error_Handler(void);
|
||||
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H */
|
||||
|
|
@ -0,0 +1,515 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx_hal_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief HAL configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7xx_HAL_CONF_H
|
||||
#define STM32H7xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
#define HAL_MODULE_ENABLED
|
||||
|
||||
/* #define HAL_ADC_MODULE_ENABLED */
|
||||
/* #define HAL_FDCAN_MODULE_ENABLED */
|
||||
/* #define HAL_FMAC_MODULE_ENABLED */
|
||||
/* #define HAL_CEC_MODULE_ENABLED */
|
||||
/* #define HAL_COMP_MODULE_ENABLED */
|
||||
/* #define HAL_CORDIC_MODULE_ENABLED */
|
||||
/* #define HAL_CRC_MODULE_ENABLED */
|
||||
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||
/* #define HAL_DAC_MODULE_ENABLED */
|
||||
#define HAL_DCMI_MODULE_ENABLED
|
||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||
/* #define HAL_ETH_MODULE_ENABLED */
|
||||
/* #define HAL_ETH_LEGACY_MODULE_ENABLED */
|
||||
/* #define HAL_NAND_MODULE_ENABLED */
|
||||
/* #define HAL_NOR_MODULE_ENABLED */
|
||||
/* #define HAL_OTFDEC_MODULE_ENABLED */
|
||||
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||
/* #define HAL_HASH_MODULE_ENABLED */
|
||||
/* #define HAL_HRTIM_MODULE_ENABLED */
|
||||
/* #define HAL_HSEM_MODULE_ENABLED */
|
||||
/* #define HAL_GFXMMU_MODULE_ENABLED */
|
||||
/* #define HAL_JPEG_MODULE_ENABLED */
|
||||
/* #define HAL_OPAMP_MODULE_ENABLED */
|
||||
/* #define HAL_OSPI_MODULE_ENABLED */
|
||||
/* #define HAL_OSPI_MODULE_ENABLED */
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_SMBUS_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||
#define HAL_QSPI_MODULE_ENABLED
|
||||
/* #define HAL_RAMECC_MODULE_ENABLED */
|
||||
/* #define HAL_RNG_MODULE_ENABLED */
|
||||
#define HAL_RTC_MODULE_ENABLED
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
#define HAL_SD_MODULE_ENABLED
|
||||
/* #define HAL_MMC_MODULE_ENABLED */
|
||||
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
/* #define HAL_SWPMI_MODULE_ENABLED */
|
||||
/* #define HAL_TIM_MODULE_ENABLED */
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
/* #define HAL_USART_MODULE_ENABLED */
|
||||
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||
/* #define HAL_PCD_MODULE_ENABLED */
|
||||
/* #define HAL_HCD_MODULE_ENABLED */
|
||||
/* #define HAL_DFSDM_MODULE_ENABLED */
|
||||
/* #define HAL_DSI_MODULE_ENABLED */
|
||||
/* #define HAL_JPEG_MODULE_ENABLED */
|
||||
/* #define HAL_MDIOS_MODULE_ENABLED */
|
||||
/* #define HAL_PSSI_MODULE_ENABLED */
|
||||
/* #define HAL_DTS_MODULE_ENABLED */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
#define HAL_MDMA_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_I2C_MODULE_ENABLED
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
#define HAL_HSEM_MODULE_ENABLED
|
||||
|
||||
/* ########################## Oscillator Values adaptation ####################*/
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE (25000000UL) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal oscillator (CSI) default value.
|
||||
* This value is the default CSI value after Reset.
|
||||
*/
|
||||
#if !defined (CSI_VALUE)
|
||||
#define CSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* CSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE (64000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE (32768UL) /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
|
||||
/**
|
||||
* @brief External clock source for I2S peripheral
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE 12288000UL /*!< Value of the External clock in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY (15UL) /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0
|
||||
#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */
|
||||
#define USE_SPI_CRC 0U /*!< use CRC in SPI */
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */
|
||||
#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U /* CORDIC register callback disabled */
|
||||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
||||
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
|
||||
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
|
||||
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
|
||||
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
|
||||
#define USE_HAL_DTS_REGISTER_CALLBACKS 0U /* DTS register callback disabled */
|
||||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
|
||||
#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */
|
||||
#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U /* FMAC register callback disabled */
|
||||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
|
||||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
|
||||
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
|
||||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
|
||||
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
|
||||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
|
||||
#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U /* GFXMMU register callback disabled */
|
||||
#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||
#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */
|
||||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
|
||||
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
|
||||
#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
|
||||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
|
||||
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
|
||||
#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U /* OSPI register callback disabled */
|
||||
#define USE_HAL_OTFDEC_REGISTER_CALLBACKS 0U /* OTFDEC register callback disabled */
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
|
||||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
|
||||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||
#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U /* SWPMI register callback disabled */
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||
|
||||
/* ########################### Ethernet Configuration ######################### */
|
||||
#define ETH_TX_DESC_CNT 4U /* number of Ethernet Tx DMA descriptors */
|
||||
#define ETH_RX_DESC_CNT 4U /* number of Ethernet Rx DMA descriptors */
|
||||
|
||||
#define ETH_MAC_ADDR0 (0x02UL)
|
||||
#define ETH_MAC_ADDR1 (0x00UL)
|
||||
#define ETH_MAC_ADDR2 (0x00UL)
|
||||
#define ETH_MAC_ADDR3 (0x00UL)
|
||||
#define ETH_MAC_ADDR4 (0x00UL)
|
||||
#define ETH_MAC_ADDR5 (0x00UL)
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MDMA_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_mdma.h"
|
||||
#endif /* HAL_MDMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DSI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dsi.h"
|
||||
#endif /* HAL_DSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dfsdm.h"
|
||||
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DTS_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dts.h"
|
||||
#endif /* HAL_DTS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_eth_legacy.h"
|
||||
#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_fdcan.h"
|
||||
#endif /* HAL_FDCAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_comp.h"
|
||||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORDIC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_cordic.h"
|
||||
#endif /* HAL_CORDIC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GFXMMU_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_gfxmmu.h"
|
||||
#endif /* HAL_GFXMMU_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FMAC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_fmac.h"
|
||||
#endif /* HAL_FMAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HRTIM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hrtim.h"
|
||||
#endif /* HAL_HRTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HSEM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hsem.h"
|
||||
#endif /* HAL_HSEM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_JPEG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_jpeg.h"
|
||||
#endif /* HAL_JPEG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MDIOS_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_mdios.h"
|
||||
#endif /* HAL_MDIOS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OPAMP_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_opamp.h"
|
||||
#endif /* HAL_OPAMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_ospi.h"
|
||||
#endif /* HAL_OSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OTFDEC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_otfdec.h"
|
||||
#endif /* HAL_OTFDEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PSSI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_pssi.h"
|
||||
#endif /* HAL_PSSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RAMECC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_ramecc.h"
|
||||
#endif /* HAL_RAMECC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_spdifrx.h"
|
||||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SWPMI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_swpmi.h"
|
||||
#endif /* HAL_SWPMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t *file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7xx_HAL_CONF_H */
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx_it.h
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32H7xx_IT_H
|
||||
#define __STM32H7xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
void SDMMC1_IRQHandler(void);
|
||||
void DCMI_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H7xx_IT_H */
|
||||
|
|
@ -0,0 +1,493 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.c
|
||||
* @brief : Main program body
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PTD */
|
||||
|
||||
/* USER CODE END PTD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
DCMI_HandleTypeDef hdcmi;
|
||||
|
||||
QSPI_HandleTypeDef hqspi;
|
||||
|
||||
RTC_HandleTypeDef hrtc;
|
||||
|
||||
SD_HandleTypeDef hsd1;
|
||||
|
||||
SPI_HandleTypeDef hspi4;
|
||||
|
||||
UART_HandleTypeDef huart1;
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
void SystemClock_Config(void);
|
||||
static void MX_GPIO_Init(void);
|
||||
static void MX_QUADSPI_Init(void);
|
||||
static void MX_DCMI_Init(void);
|
||||
static void MX_RTC_Init(void);
|
||||
static void MX_SDMMC1_SD_Init(void);
|
||||
static void MX_USART1_UART_Init(void);
|
||||
static void MX_SPI4_Init(void);
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/**
|
||||
* @brief The application entry point.
|
||||
* @retval int
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/* Enable I-Cache---------------------------------------------------------*/
|
||||
SCB_EnableICache();
|
||||
|
||||
/* Enable D-Cache---------------------------------------------------------*/
|
||||
SCB_EnableDCache();
|
||||
|
||||
/* MCU Configuration--------------------------------------------------------*/
|
||||
|
||||
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||||
HAL_Init();
|
||||
|
||||
/* USER CODE BEGIN Init */
|
||||
|
||||
/* USER CODE END Init */
|
||||
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config();
|
||||
|
||||
/* USER CODE BEGIN SysInit */
|
||||
|
||||
/* USER CODE END SysInit */
|
||||
|
||||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_QUADSPI_Init();
|
||||
MX_DCMI_Init();
|
||||
MX_RTC_Init();
|
||||
MX_SDMMC1_SD_Init();
|
||||
MX_USART1_UART_Init();
|
||||
MX_SPI4_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
/* USER CODE END 2 */
|
||||
|
||||
/* Infinite loop */
|
||||
/* USER CODE BEGIN WHILE */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE END WHILE */
|
||||
|
||||
/* USER CODE BEGIN 3 */
|
||||
}
|
||||
/* USER CODE END 3 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
*/
|
||||
void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
|
||||
/** Supply configuration update enable
|
||||
*/
|
||||
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
|
||||
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
|
||||
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||
|
||||
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||
|
||||
/** Configure LSE Drive Capability
|
||||
*/
|
||||
HAL_PWR_EnableBkUpAccess();
|
||||
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
|
||||
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 5;
|
||||
RCC_OscInitStruct.PLL.PLLN = 192;
|
||||
RCC_OscInitStruct.PLL.PLLP = 2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 4;
|
||||
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
|
||||
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
||||
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
||||
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
|
||||
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DCMI Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_DCMI_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN DCMI_Init 0 */
|
||||
|
||||
/* USER CODE END DCMI_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN DCMI_Init 1 */
|
||||
|
||||
/* USER CODE END DCMI_Init 1 */
|
||||
hdcmi.Instance = DCMI;
|
||||
hdcmi.Init.SynchroMode = DCMI_SYNCHRO_HARDWARE;
|
||||
hdcmi.Init.PCKPolarity = DCMI_PCKPOLARITY_RISING;
|
||||
hdcmi.Init.VSPolarity = DCMI_VSPOLARITY_LOW;
|
||||
hdcmi.Init.HSPolarity = DCMI_HSPOLARITY_LOW;
|
||||
hdcmi.Init.CaptureRate = DCMI_CR_ALL_FRAME;
|
||||
hdcmi.Init.ExtendedDataMode = DCMI_EXTEND_DATA_8B;
|
||||
hdcmi.Init.JPEGMode = DCMI_JPEG_DISABLE;
|
||||
hdcmi.Init.ByteSelectMode = DCMI_BSM_ALL;
|
||||
hdcmi.Init.ByteSelectStart = DCMI_OEBS_ODD;
|
||||
hdcmi.Init.LineSelectMode = DCMI_LSM_ALL;
|
||||
hdcmi.Init.LineSelectStart = DCMI_OELS_ODD;
|
||||
if (HAL_DCMI_Init(&hdcmi) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN DCMI_Init 2 */
|
||||
|
||||
/* USER CODE END DCMI_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief QUADSPI Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_QUADSPI_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_Init 0 */
|
||||
|
||||
/* USER CODE END QUADSPI_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_Init 1 */
|
||||
|
||||
/* USER CODE END QUADSPI_Init 1 */
|
||||
/* QUADSPI parameter configuration*/
|
||||
hqspi.Instance = QUADSPI;
|
||||
hqspi.Init.ClockPrescaler = 1;
|
||||
hqspi.Init.FifoThreshold = 32;
|
||||
hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
|
||||
hqspi.Init.FlashSize = 22;
|
||||
hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
|
||||
hqspi.Init.ClockMode = QSPI_CLOCK_MODE_3;
|
||||
hqspi.Init.FlashID = QSPI_FLASH_ID_1;
|
||||
hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
|
||||
if (HAL_QSPI_Init(&hqspi) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN QUADSPI_Init 2 */
|
||||
|
||||
/* USER CODE END QUADSPI_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RTC Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_RTC_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN RTC_Init 0 */
|
||||
|
||||
/* USER CODE END RTC_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN RTC_Init 1 */
|
||||
|
||||
/* USER CODE END RTC_Init 1 */
|
||||
|
||||
/** Initialize RTC Only
|
||||
*/
|
||||
hrtc.Instance = RTC;
|
||||
hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
|
||||
hrtc.Init.AsynchPrediv = 127;
|
||||
hrtc.Init.SynchPrediv = 255;
|
||||
hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
|
||||
hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
|
||||
hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
|
||||
hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
|
||||
if (HAL_RTC_Init(&hrtc) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN RTC_Init 2 */
|
||||
|
||||
/* USER CODE END RTC_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SDMMC1 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_SDMMC1_SD_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN SDMMC1_Init 0 */
|
||||
|
||||
/* USER CODE END SDMMC1_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN SDMMC1_Init 1 */
|
||||
|
||||
/* USER CODE END SDMMC1_Init 1 */
|
||||
hsd1.Instance = SDMMC1;
|
||||
hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
|
||||
hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
|
||||
hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B;
|
||||
hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
|
||||
hsd1.Init.ClockDiv = 6;
|
||||
if (HAL_SD_Init(&hsd1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN SDMMC1_Init 2 */
|
||||
|
||||
/* USER CODE END SDMMC1_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI4 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_SPI4_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN SPI4_Init 0 */
|
||||
|
||||
/* USER CODE END SPI4_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN SPI4_Init 1 */
|
||||
|
||||
/* USER CODE END SPI4_Init 1 */
|
||||
/* SPI4 parameter configuration*/
|
||||
hspi4.Instance = SPI4;
|
||||
hspi4.Init.Mode = SPI_MODE_MASTER;
|
||||
hspi4.Init.Direction = SPI_DIRECTION_2LINES_TXONLY;
|
||||
hspi4.Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
hspi4.Init.CLKPolarity = SPI_POLARITY_LOW;
|
||||
hspi4.Init.CLKPhase = SPI_PHASE_1EDGE;
|
||||
hspi4.Init.NSS = SPI_NSS_HARD_OUTPUT;
|
||||
hspi4.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
|
||||
hspi4.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||
hspi4.Init.TIMode = SPI_TIMODE_DISABLE;
|
||||
hspi4.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||||
hspi4.Init.CRCPolynomial = 0x0;
|
||||
hspi4.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
|
||||
hspi4.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
|
||||
hspi4.Init.FifoThreshold = SPI_FIFO_THRESHOLD_02DATA;
|
||||
hspi4.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
|
||||
hspi4.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
|
||||
hspi4.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
|
||||
hspi4.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
|
||||
hspi4.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
|
||||
hspi4.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
|
||||
hspi4.Init.IOSwap = SPI_IO_SWAP_DISABLE;
|
||||
if (HAL_SPI_Init(&hspi4) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN SPI4_Init 2 */
|
||||
|
||||
/* USER CODE END SPI4_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USART1 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_USART1_UART_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN USART1_Init 0 */
|
||||
|
||||
/* USER CODE END USART1_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN USART1_Init 1 */
|
||||
|
||||
/* USER CODE END USART1_Init 1 */
|
||||
huart1.Instance = USART1;
|
||||
huart1.Init.BaudRate = 115200;
|
||||
huart1.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
huart1.Init.StopBits = UART_STOPBITS_1;
|
||||
huart1.Init.Parity = UART_PARITY_NONE;
|
||||
huart1.Init.Mode = UART_MODE_TX_RX;
|
||||
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||
huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||
huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
|
||||
huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||
if (HAL_UART_Init(&huart1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN USART1_Init 2 */
|
||||
|
||||
/* USER CODE END USART1_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief GPIO Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_GPIO_Init(void)
|
||||
{
|
||||
/* USER CODE BEGIN MX_GPIO_Init_1 */
|
||||
/* USER CODE END MX_GPIO_Init_1 */
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
|
||||
/* USER CODE BEGIN MX_GPIO_Init_2 */
|
||||
/* USER CODE END MX_GPIO_Init_2 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 4 */
|
||||
|
||||
/* USER CODE END 4 */
|
||||
|
||||
/**
|
||||
* @brief This function is executed in case of error occurrence.
|
||||
* @retval None
|
||||
*/
|
||||
void Error_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN Error_Handler_Debug */
|
||||
/* User can add his own implementation to report the HAL error return state */
|
||||
__disable_irq();
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END Error_Handler_Debug */
|
||||
}
|
||||
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief Reports the name of the source file and the source line number
|
||||
* where the assert_param error has occurred.
|
||||
* @param file: pointer to the source file name
|
||||
* @param line: assert_param error line source number
|
||||
* @retval None
|
||||
*/
|
||||
void assert_failed(uint8_t *file, uint32_t line)
|
||||
{
|
||||
/* USER CODE BEGIN 6 */
|
||||
/* User can add his own implementation to report the file name and line number,
|
||||
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
||||
/* USER CODE END 6 */
|
||||
}
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
|
@ -0,0 +1,643 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx_hal_msp.c
|
||||
* @brief This file provides code for the MSP Initialization
|
||||
* and de-Initialization codes.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
/* USER CODE BEGIN Includes */
|
||||
#include "drv_common.h"
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Define */
|
||||
|
||||
/* USER CODE END Define */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Macro */
|
||||
|
||||
/* USER CODE END Macro */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* External functions --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ExternalFunctions */
|
||||
|
||||
/* USER CODE END ExternalFunctions */
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
/**
|
||||
* Initializes the Global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
|
||||
/* USER CODE END MspInit 0 */
|
||||
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
|
||||
/* System interrupt init*/
|
||||
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DCMI MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hdcmi: DCMI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(hdcmi->Instance==DCMI)
|
||||
{
|
||||
/* USER CODE BEGIN DCMI_MspInit 0 */
|
||||
|
||||
/* USER CODE END DCMI_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_DCMI_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**DCMI GPIO Configuration
|
||||
PE4 ------> DCMI_D4
|
||||
PE5 ------> DCMI_D6
|
||||
PE6 ------> DCMI_D7
|
||||
PA4 ------> DCMI_HSYNC
|
||||
PA6 ------> DCMI_PIXCLK
|
||||
PC6 ------> DCMI_D0
|
||||
PC7 ------> DCMI_D1
|
||||
PD3 ------> DCMI_D5
|
||||
PB7 ------> DCMI_VSYNC
|
||||
PE0 ------> DCMI_D2
|
||||
PE1 ------> DCMI_D3
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_0
|
||||
|GPIO_PIN_1;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* DCMI interrupt Init */
|
||||
HAL_NVIC_SetPriority(DCMI_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(DCMI_IRQn);
|
||||
/* USER CODE BEGIN DCMI_MspInit 1 */
|
||||
|
||||
/* USER CODE END DCMI_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DCMI MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hdcmi: DCMI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi)
|
||||
{
|
||||
if(hdcmi->Instance==DCMI)
|
||||
{
|
||||
/* USER CODE BEGIN DCMI_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END DCMI_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_DCMI_CLK_DISABLE();
|
||||
|
||||
/**DCMI GPIO Configuration
|
||||
PE4 ------> DCMI_D4
|
||||
PE5 ------> DCMI_D6
|
||||
PE6 ------> DCMI_D7
|
||||
PA4 ------> DCMI_HSYNC
|
||||
PA6 ------> DCMI_PIXCLK
|
||||
PC6 ------> DCMI_D0
|
||||
PC7 ------> DCMI_D1
|
||||
PD3 ------> DCMI_D5
|
||||
PB7 ------> DCMI_VSYNC
|
||||
PE0 ------> DCMI_D2
|
||||
PE1 ------> DCMI_D3
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_0
|
||||
|GPIO_PIN_1);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_6);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_6|GPIO_PIN_7);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_3);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
|
||||
|
||||
/* DCMI interrupt DeInit */
|
||||
HAL_NVIC_DisableIRQ(DCMI_IRQn);
|
||||
/* USER CODE BEGIN DCMI_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END DCMI_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief QSPI MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hqspi: QSPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
if(hqspi->Instance==QUADSPI)
|
||||
{
|
||||
/* USER CODE BEGIN QUADSPI_MspInit 0 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_QSPI;
|
||||
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_QSPI_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
/**QUADSPI GPIO Configuration
|
||||
PE2 ------> QUADSPI_BK1_IO2
|
||||
PB2 ------> QUADSPI_CLK
|
||||
PD11 ------> QUADSPI_BK1_IO0
|
||||
PD12 ------> QUADSPI_BK1_IO1
|
||||
PD13 ------> QUADSPI_BK1_IO3
|
||||
PB6 ------> QUADSPI_BK1_NCS
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_MspInit 1 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief QSPI MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hqspi: QSPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
|
||||
{
|
||||
if(hqspi->Instance==QUADSPI)
|
||||
{
|
||||
/* USER CODE BEGIN QUADSPI_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_QSPI_CLK_DISABLE();
|
||||
|
||||
/**QUADSPI GPIO Configuration
|
||||
PE2 ------> QUADSPI_BK1_IO2
|
||||
PB2 ------> QUADSPI_CLK
|
||||
PD11 ------> QUADSPI_BK1_IO0
|
||||
PD12 ------> QUADSPI_BK1_IO1
|
||||
PD13 ------> QUADSPI_BK1_IO3
|
||||
PB6 ------> QUADSPI_BK1_NCS
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_2|GPIO_PIN_6);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13);
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RTC MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hrtc: RTC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
|
||||
{
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
if(hrtc->Instance==RTC)
|
||||
{
|
||||
/* USER CODE BEGIN RTC_MspInit 0 */
|
||||
|
||||
/* USER CODE END RTC_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
|
||||
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_RTC_ENABLE();
|
||||
/* USER CODE BEGIN RTC_MspInit 1 */
|
||||
|
||||
/* USER CODE END RTC_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RTC MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hrtc: RTC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
|
||||
{
|
||||
if(hrtc->Instance==RTC)
|
||||
{
|
||||
/* USER CODE BEGIN RTC_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END RTC_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_RTC_DISABLE();
|
||||
/* USER CODE BEGIN RTC_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END RTC_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SD MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hsd: SD handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
if(hsd->Instance==SDMMC1)
|
||||
{
|
||||
/* USER CODE BEGIN SDMMC1_MspInit 0 */
|
||||
|
||||
/* USER CODE END SDMMC1_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC;
|
||||
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_SDMMC1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
/**SDMMC1 GPIO Configuration
|
||||
PC8 ------> SDMMC1_D0
|
||||
PC9 ------> SDMMC1_D1
|
||||
PC10 ------> SDMMC1_D2
|
||||
PC11 ------> SDMMC1_D3
|
||||
PC12 ------> SDMMC1_CK
|
||||
PD2 ------> SDMMC1_CMD
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|
||||
|GPIO_PIN_12;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO1;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO1;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
/* SDMMC1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(SDMMC1_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(SDMMC1_IRQn);
|
||||
/* USER CODE BEGIN SDMMC1_MspInit 1 */
|
||||
|
||||
/* USER CODE END SDMMC1_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SD MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hsd: SD handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
|
||||
{
|
||||
if(hsd->Instance==SDMMC1)
|
||||
{
|
||||
/* USER CODE BEGIN SDMMC1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SDMMC1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SDMMC1_CLK_DISABLE();
|
||||
|
||||
/**SDMMC1 GPIO Configuration
|
||||
PC8 ------> SDMMC1_D0
|
||||
PC9 ------> SDMMC1_D1
|
||||
PC10 ------> SDMMC1_D2
|
||||
PC11 ------> SDMMC1_D3
|
||||
PC12 ------> SDMMC1_CK
|
||||
PD2 ------> SDMMC1_CMD
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|
||||
|GPIO_PIN_12);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
|
||||
|
||||
/* SDMMC1 interrupt DeInit */
|
||||
HAL_NVIC_DisableIRQ(SDMMC1_IRQn);
|
||||
/* USER CODE BEGIN SDMMC1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SDMMC1_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hspi: SPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
if(hspi->Instance==SPI4)
|
||||
{
|
||||
/* USER CODE BEGIN SPI4_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI4_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI4;
|
||||
PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_D2PCLK1;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_SPI4_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
/**SPI4 GPIO Configuration
|
||||
PE11 ------> SPI4_NSS
|
||||
PE12 ------> SPI4_SCK
|
||||
PE14 ------> SPI4_MOSI
|
||||
*/
|
||||
// GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_14;
|
||||
// GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
// GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
// GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
// GPIO_InitStruct.Alternate = GPIO_AF5_SPI4;
|
||||
// HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI4_MspInit 1 */
|
||||
|
||||
/**SPI4 GPIO Configuration
|
||||
PE11 ------> soft CS
|
||||
PE12 ------> SPI4_SCK
|
||||
PE14 ------> SPI4_MOSI
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_14;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI4;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE END SPI4_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hspi: SPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
if(hspi->Instance==SPI4)
|
||||
{
|
||||
/* USER CODE BEGIN SPI4_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI4_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI4_CLK_DISABLE();
|
||||
|
||||
/**SPI4 GPIO Configuration
|
||||
PE11 ------> SPI4_NSS
|
||||
PE12 ------> SPI4_SCK
|
||||
PE14 ------> SPI4_MOSI
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_14);
|
||||
|
||||
/* USER CODE BEGIN SPI4_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI4_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
if(huart->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
|
||||
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_USART1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**USART1 GPIO Configuration
|
||||
PA9 ------> USART1_TX
|
||||
PA10 ------> USART1_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN USART1_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
if(huart->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART1_CLK_DISABLE();
|
||||
|
||||
/**USART1 GPIO Configuration
|
||||
PA9 ------> USART1_TX
|
||||
PA10 ------> USART1_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
|
||||
|
||||
/* USER CODE BEGIN USART1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
|
@ -0,0 +1,232 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx_it.c
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "stm32h7xx_it.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern DCMI_HandleTypeDef hdcmi;
|
||||
extern SD_HandleTypeDef hsd1;
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory management fault.
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pre-fetch fault, memory access fault.
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Undefined instruction or illegal state.
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug monitor.
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32H7xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32h7xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles SDMMC1 global interrupt.
|
||||
*/
|
||||
void SDMMC1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SDMMC1_IRQn 0 */
|
||||
|
||||
/* USER CODE END SDMMC1_IRQn 0 */
|
||||
HAL_SD_IRQHandler(&hsd1);
|
||||
/* USER CODE BEGIN SDMMC1_IRQn 1 */
|
||||
|
||||
/* USER CODE END SDMMC1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DCMI global interrupt.
|
||||
*/
|
||||
void DCMI_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DCMI_IRQn 0 */
|
||||
|
||||
/* USER CODE END DCMI_IRQn 0 */
|
||||
HAL_DCMI_IRQHandler(&hdcmi);
|
||||
/* USER CODE BEGIN DCMI_IRQn 1 */
|
||||
|
||||
/* USER CODE END DCMI_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
|
@ -0,0 +1,450 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32h7xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-Mx Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32h7xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock, it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32h7xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32h7xx.h"
|
||||
#include <math.h>
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (CSI_VALUE)
|
||||
#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* CSI_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
/*!< Uncomment the following line if you need to use initialized data in D2 domain SRAM (AHB SRAM) */
|
||||
/* #define DATA_IN_D2_SRAM */
|
||||
|
||||
/* Note: Following vector table addresses must be defined in line with linker
|
||||
configuration. */
|
||||
/*!< Uncomment the following line if you need to relocate the vector table
|
||||
anywhere in FLASH BANK1 or AXI SRAM, else the vector table is kept at the automatic
|
||||
remap of boot address selected */
|
||||
/* #define USER_VECT_TAB_ADDRESS */
|
||||
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
#if defined(DUAL_CORE) && defined(CORE_CM4)
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table
|
||||
in D2 AXI SRAM else user remap will be done in FLASH BANK2. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#if defined(VECT_TAB_SRAM)
|
||||
#define VECT_TAB_BASE_ADDRESS D2_AXISRAM_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x400. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x400. */
|
||||
#else
|
||||
#define VECT_TAB_BASE_ADDRESS FLASH_BANK2_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x400. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x400. */
|
||||
#endif /* VECT_TAB_SRAM */
|
||||
#else
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table
|
||||
in D1 AXI SRAM else user remap will be done in FLASH BANK1. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#if defined(VECT_TAB_SRAM)
|
||||
#define VECT_TAB_BASE_ADDRESS D1_AXISRAM_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x400. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x400. */
|
||||
#else
|
||||
#define VECT_TAB_BASE_ADDRESS FLASH_BANK1_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x400. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x400. */
|
||||
#endif /* VECT_TAB_SRAM */
|
||||
#endif /* DUAL_CORE && CORE_CM4 */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 64000000;
|
||||
uint32_t SystemD2Clock = 64000000;
|
||||
const uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the FPU setting and vector table location
|
||||
* configuration.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
#if defined (DATA_IN_D2_SRAM)
|
||||
__IO uint32_t tmpreg;
|
||||
#endif /* DATA_IN_D2_SRAM */
|
||||
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||
|
||||
/* Increasing the CPU frequency */
|
||||
if(FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
|
||||
{
|
||||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||||
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
|
||||
}
|
||||
|
||||
/* Set HSION bit */
|
||||
RCC->CR |= RCC_CR_HSION;
|
||||
|
||||
/* Reset CFGR register */
|
||||
RCC->CFGR = 0x00000000;
|
||||
|
||||
/* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
|
||||
RCC->CR &= 0xEAF6ED7FU;
|
||||
|
||||
/* Decreasing the number of wait states because of lower CPU frequency */
|
||||
if(FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
|
||||
{
|
||||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||||
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
|
||||
}
|
||||
|
||||
#if defined(D3_SRAM_BASE)
|
||||
/* Reset D1CFGR register */
|
||||
RCC->D1CFGR = 0x00000000;
|
||||
|
||||
/* Reset D2CFGR register */
|
||||
RCC->D2CFGR = 0x00000000;
|
||||
|
||||
/* Reset D3CFGR register */
|
||||
RCC->D3CFGR = 0x00000000;
|
||||
#else
|
||||
/* Reset CDCFGR1 register */
|
||||
RCC->CDCFGR1 = 0x00000000;
|
||||
|
||||
/* Reset CDCFGR2 register */
|
||||
RCC->CDCFGR2 = 0x00000000;
|
||||
|
||||
/* Reset SRDCFGR register */
|
||||
RCC->SRDCFGR = 0x00000000;
|
||||
#endif
|
||||
/* Reset PLLCKSELR register */
|
||||
RCC->PLLCKSELR = 0x02020200;
|
||||
|
||||
/* Reset PLLCFGR register */
|
||||
RCC->PLLCFGR = 0x01FF0000;
|
||||
/* Reset PLL1DIVR register */
|
||||
RCC->PLL1DIVR = 0x01010280;
|
||||
/* Reset PLL1FRACR register */
|
||||
RCC->PLL1FRACR = 0x00000000;
|
||||
|
||||
/* Reset PLL2DIVR register */
|
||||
RCC->PLL2DIVR = 0x01010280;
|
||||
|
||||
/* Reset PLL2FRACR register */
|
||||
|
||||
RCC->PLL2FRACR = 0x00000000;
|
||||
/* Reset PLL3DIVR register */
|
||||
RCC->PLL3DIVR = 0x01010280;
|
||||
|
||||
/* Reset PLL3FRACR register */
|
||||
RCC->PLL3FRACR = 0x00000000;
|
||||
|
||||
/* Reset HSEBYP bit */
|
||||
RCC->CR &= 0xFFFBFFFFU;
|
||||
|
||||
/* Disable all interrupts */
|
||||
RCC->CIER = 0x00000000;
|
||||
|
||||
#if (STM32H7_DEV_ID == 0x450UL)
|
||||
/* dual core CM7 or single core line */
|
||||
if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
|
||||
{
|
||||
/* if stm32h7 revY*/
|
||||
/* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
|
||||
*((__IO uint32_t*)0x51008108) = 0x000000001U;
|
||||
}
|
||||
#endif /* STM32H7_DEV_ID */
|
||||
|
||||
#if defined(DATA_IN_D2_SRAM)
|
||||
/* in case of initialized data in D2 SRAM (AHB SRAM), enable the D2 SRAM clock (AHB SRAM clock) */
|
||||
#if defined(RCC_AHB2ENR_D2SRAM3EN)
|
||||
RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | RCC_AHB2ENR_D2SRAM3EN);
|
||||
#elif defined(RCC_AHB2ENR_D2SRAM2EN)
|
||||
RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN);
|
||||
#else
|
||||
RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN);
|
||||
#endif /* RCC_AHB2ENR_D2SRAM3EN */
|
||||
|
||||
tmpreg = RCC->AHB2ENR;
|
||||
(void) tmpreg;
|
||||
#endif /* DATA_IN_D2_SRAM */
|
||||
|
||||
#if defined(DUAL_CORE) && defined(CORE_CM4)
|
||||
/* Configure the Vector Table location add offset address for cortex-M4 ------------------*/
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D2 AXI-RAM or in Internal FLASH */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
|
||||
#else
|
||||
/*
|
||||
* Disable the FMC bank1 (enabled after reset).
|
||||
* This, prevents CPU speculation access on this bank which blocks the use of FMC during
|
||||
* 24us. During this time the others FMC master (such as LTDC) cannot use it!
|
||||
*/
|
||||
FMC_Bank1_R->BTCR[0] = 0x000030D2;
|
||||
|
||||
/* Configure the Vector Table location -------------------------------------*/
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
|
||||
#endif /*DUAL_CORE && CORE_CM4*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock , it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(*)
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the CSI_VALUE(*),
|
||||
* HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (*) CSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||
* 4 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
* (**) HSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||
* 64 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (***)HSE_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||
* 25 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||
* frequency of the crystal used. Otherwise, this function may
|
||||
* have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t pllp, pllsource, pllm, pllfracen, hsivalue, tmp;
|
||||
uint32_t common_system_clock;
|
||||
float_t fracn1, pllvco;
|
||||
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
|
||||
switch (RCC->CFGR & RCC_CFGR_SWS)
|
||||
{
|
||||
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
|
||||
common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
|
||||
break;
|
||||
|
||||
case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */
|
||||
common_system_clock = CSI_VALUE;
|
||||
break;
|
||||
|
||||
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
|
||||
common_system_clock = HSE_VALUE;
|
||||
break;
|
||||
|
||||
case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */
|
||||
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
|
||||
SYSCLK = PLL_VCO / PLLR
|
||||
*/
|
||||
pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
|
||||
pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ;
|
||||
pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos);
|
||||
fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3));
|
||||
|
||||
if (pllm != 0U)
|
||||
{
|
||||
switch (pllsource)
|
||||
{
|
||||
case RCC_PLLCKSELR_PLLSRC_HSI: /* HSI used as PLL clock source */
|
||||
|
||||
hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ;
|
||||
pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||
|
||||
break;
|
||||
|
||||
case RCC_PLLCKSELR_PLLSRC_CSI: /* CSI used as PLL clock source */
|
||||
pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||
break;
|
||||
|
||||
case RCC_PLLCKSELR_PLLSRC_HSE: /* HSE used as PLL clock source */
|
||||
pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||
break;
|
||||
|
||||
default:
|
||||
hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ;
|
||||
pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||
break;
|
||||
}
|
||||
pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1U ) ;
|
||||
common_system_clock = (uint32_t)(float_t)(pllvco/(float_t)pllp);
|
||||
}
|
||||
else
|
||||
{
|
||||
common_system_clock = 0U;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
|
||||
break;
|
||||
}
|
||||
|
||||
/* Compute SystemClock frequency --------------------------------------------------*/
|
||||
#if defined (RCC_D1CFGR_D1CPRE)
|
||||
tmp = D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos];
|
||||
|
||||
/* common_system_clock frequency : CM7 CPU frequency */
|
||||
common_system_clock >>= tmp;
|
||||
|
||||
/* SystemD2Clock frequency : CM4 CPU, AXI and AHBs Clock frequency */
|
||||
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
|
||||
|
||||
#else
|
||||
tmp = D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos];
|
||||
|
||||
/* common_system_clock frequency : CM7 CPU frequency */
|
||||
common_system_clock >>= tmp;
|
||||
|
||||
/* SystemD2Clock frequency : AXI and AHBs Clock frequency */
|
||||
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_HPRE)>> RCC_CDCFGR1_HPRE_Pos]) & 0x1FU));
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(DUAL_CORE) && defined(CORE_CM4)
|
||||
SystemCoreClock = SystemD2Clock;
|
||||
#else
|
||||
SystemCoreClock = common_system_clock;
|
||||
#endif /* DUAL_CORE && CORE_CM4 */
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -0,0 +1,132 @@
|
|||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_STM32H750VBT6
|
||||
bool
|
||||
select SOC_SERIES_STM32H7
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
config BSP_USING_LCD_SPI
|
||||
bool "Enable 1.30' 240*240 LCD(ST7789)(not support spi tx dma)"
|
||||
select BSP_USING_GPIO
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI4
|
||||
# select BSP_SPI4_TX_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_USING_OV2640
|
||||
bool "Enable camera (ov2640)"
|
||||
select BSP_USING_DCMI
|
||||
select BSP_USING_I2C
|
||||
select BSP_USING_I2C1
|
||||
default n
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
config BSP_USING_GPIO
|
||||
bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
default y
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
if BSP_USING_UART
|
||||
config BSP_USING_UART1
|
||||
bool "Enable UART1"
|
||||
default y
|
||||
|
||||
config BSP_UART1_RX_USING_DMA
|
||||
bool "Enable UART1 RX DMA"
|
||||
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
endif
|
||||
|
||||
config BSP_USING_QSPI
|
||||
bool "Enable QSPI BUS"
|
||||
select RT_USING_QSPI
|
||||
select RT_USING_SPI
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI BUS"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI4
|
||||
bool "Enable SPI4 BUS"
|
||||
default n
|
||||
|
||||
config BSP_SPI4_TX_USING_DMA
|
||||
bool "Enable SPI4 TX DMA"
|
||||
depends on BSP_USING_SPI4
|
||||
default n
|
||||
endif
|
||||
|
||||
config BSP_USING_DCMI
|
||||
bool "Enable DCMI"
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Enable I2C BUS (software simulation)"
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
default n
|
||||
if BSP_USING_I2C
|
||||
menuconfig BSP_USING_I2C1
|
||||
bool "Enable I2C1 BUS (software simulation)"
|
||||
default n
|
||||
if BSP_USING_I2C1
|
||||
comment "Notice: PB8 --> 24; PB9 --> 25"
|
||||
config BSP_I2C1_SCL_PIN
|
||||
int "i2c1 scl pin number"
|
||||
range 1 176
|
||||
default 24
|
||||
config BSP_I2C1_SDA_PIN
|
||||
int "I2C1 sda pin number"
|
||||
range 1 176
|
||||
default 25
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C2
|
||||
bool "Enable I2C2 BUS (software simulation)"
|
||||
default n
|
||||
if BSP_USING_I2C2
|
||||
comment "Notice: PB10 --> 26; PB11 --> 27"
|
||||
config BSP_I2C2_SCL_PIN
|
||||
int "i2c2 scl pin number"
|
||||
range 1 176
|
||||
default 26
|
||||
config BSP_I2C2_SDA_PIN
|
||||
int "I2C2 sda pin number"
|
||||
range 1 176
|
||||
default 27
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ONCHIP_RTC
|
||||
bool "Enable RTC"
|
||||
select RT_USING_RTC
|
||||
select RT_USING_LIBC
|
||||
default n
|
||||
|
||||
config BSP_USING_ON_CHIP_FLASH
|
||||
bool "Enable on-chip FLASH"
|
||||
default n
|
||||
|
||||
source "../libraries/HAL_Drivers/Kconfig"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
'''
|
||||
Author: spaceman
|
||||
Date: 2023-03-21 02:10:16
|
||||
LastEditTime: 2023-03-25 18:59:06
|
||||
LastEditors: spaceman
|
||||
Description:
|
||||
FilePath: \stm32h750-fk750m1-vbt6\board\SConscript
|
||||
'''
|
||||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
Import('SDK_LIB')
|
||||
|
||||
objs = []
|
||||
cwd = GetCurrentDir()
|
||||
list = os.listdir(cwd)
|
||||
|
||||
path = [cwd]
|
||||
path += [cwd + '/CubeMX_Config/Inc']
|
||||
path += [cwd + '/port']
|
||||
|
||||
# add the general drivers.
|
||||
src = Glob('board.c')
|
||||
src += Glob('CubeMX_Config/Src/stm32h7xx_hal_msp.c')
|
||||
|
||||
if GetDepend('BSP_USING_LCD_SPI'):
|
||||
src = src + ['port/lcd/drv_lcd_spi.c']
|
||||
src = src + ['port/lcd/drv_lcd_spi_ext.c']
|
||||
path += [cwd + '/port/lcd']
|
||||
|
||||
if GetDepend('BSP_USING_DCMI'):
|
||||
src = src + ['port/camera/drv_dcmi.c']
|
||||
path += [cwd + '/port/camera']
|
||||
|
||||
if GetDepend('BSP_USING_OV2640'):
|
||||
src = src + ['port/camera/drv_ov2640.c']
|
||||
path += [cwd + '/port/camera']
|
||||
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
startup_path_prefix = SDK_LIB
|
||||
|
||||
if rtconfig.PLATFORM in ['gcc']:
|
||||
src += [startup_path_prefix + '/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h750xx.s']
|
||||
elif rtconfig.PLATFORM in ['armcc', 'armclang']:
|
||||
src += [startup_path_prefix + '/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h750xx.s']
|
||||
elif rtconfig.PLATFORM in ['iccarm']:
|
||||
src += [startup_path_prefix + '/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h750xx.s']
|
||||
|
||||
# STM32H743xx || STM32H750xx || STM32F753xx
|
||||
# You can select chips from the list above
|
||||
CPPDEFINES = ['STM32H750xx']
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
|
|
@ -0,0 +1,132 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-24 spaceman the first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
|
||||
#define AXI_SRAM_ADDR (0X24000000)
|
||||
#define AXI_SRAM_SIZE (512*1024)
|
||||
#define SRAM1_ADDR (0X30000000)
|
||||
#define SRAM1_SIZE (128*1024)
|
||||
#define SRAM2_ADDR (0X30020000)
|
||||
#define SRAM2_SIZE (128*1024)
|
||||
#define SRAM3_ADDR (0X30040000)
|
||||
#define SRAM3_SIZE (32*1024)
|
||||
#define SRAM4_ADDR (0X38000000)
|
||||
#define SRAM4_SIZE (64*1024)
|
||||
#define BACKUP_ADDR (0X38800000)
|
||||
#define BACKUP_SIZE (4*1024)
|
||||
|
||||
static struct rt_memheap _heap_axi_sram;
|
||||
static struct rt_memheap _heap_sram1;
|
||||
static struct rt_memheap _heap_sram2;
|
||||
static struct rt_memheap _heap_sram3;
|
||||
static struct rt_memheap _heap_sram4;
|
||||
static struct rt_memheap _heap_backup_sram;
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
*/
|
||||
void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
|
||||
/** Supply configuration update enable
|
||||
*/
|
||||
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||
|
||||
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||
/** Configure LSE Drive Capability
|
||||
*/
|
||||
HAL_PWR_EnableBkUpAccess();
|
||||
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 5;
|
||||
RCC_OscInitStruct.PLL.PLLN = 192;
|
||||
RCC_OscInitStruct.PLL.PLLP = 2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 2;
|
||||
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
|
||||
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
||||
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
||||
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
|
||||
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_UART4
|
||||
|RCC_PERIPHCLK_USART1;
|
||||
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
|
||||
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
|
||||
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
static int init_sram(void)
|
||||
{
|
||||
__HAL_RCC_D2SRAM1_CLK_ENABLE();
|
||||
__HAL_RCC_D2SRAM2_CLK_ENABLE();
|
||||
__HAL_RCC_D2SRAM3_CLK_ENABLE();
|
||||
rt_memheap_init(&_heap_axi_sram, "axi_sram", (void *)AXI_SRAM_ADDR, AXI_SRAM_SIZE);
|
||||
rt_memheap_init(&_heap_sram1, "sram1", (void *)SRAM1_ADDR, SRAM1_SIZE);
|
||||
rt_memheap_init(&_heap_sram2, "sram2", (void *)SRAM2_ADDR, SRAM2_SIZE);
|
||||
rt_memheap_init(&_heap_sram3, "sram3", (void *)SRAM3_ADDR, SRAM3_SIZE);
|
||||
rt_memheap_init(&_heap_sram4, "sram4", (void *)SRAM4_ADDR, SRAM4_SIZE);
|
||||
rt_memheap_init(&_heap_backup_sram, "bak_sram", (void *)BACKUP_ADDR, BACKUP_SIZE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_BOARD_EXPORT(init_sram);
|
||||
|
||||
/**
|
||||
* Function ota_app_vtor_reconfig
|
||||
* Description Set Vector Table base location to the start addr of app(RT_APP_PART_ADDR).
|
||||
*/
|
||||
static int ota_app_vtor_reconfig(void)
|
||||
{
|
||||
#define RT_APP_PART_ADDR 0x08020000
|
||||
#define NVIC_VTOR_MASK 0x3FFFFF80
|
||||
/* Set the Vector Table base location by user application firmware definition */
|
||||
SCB->VTOR = RT_APP_PART_ADDR & NVIC_VTOR_MASK;
|
||||
|
||||
return 0;
|
||||
}
|
||||
// INIT_BOARD_EXPORT(ota_app_vtor_reconfig);
|
||||
|
|
@ -0,0 +1,100 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-5 SummerGift first version
|
||||
* 2020-8-6 NU-LL Add stm32h750vbt6 support
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <stm32h7xx.h>
|
||||
// #include "drv_common.h"
|
||||
#include "drv_gpio.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-------------------------- CHIP CONFIG BEGIN --------------------------*/
|
||||
|
||||
#define CHIP_FAMILY_STM32
|
||||
#define CHIP_SERIES_STM32H7
|
||||
#define CHIP_NAME_STM32H750XBHX
|
||||
|
||||
/*-------------------------- CHIP CONFIG END --------------------------*/
|
||||
|
||||
/*-------------------------- ROM/RAM CONFIG BEGIN --------------------------*/
|
||||
#define ROM_START ((uint32_t)0x80000000)
|
||||
#define ROM_SIZE (128)
|
||||
#define ROM_END ((uint32_t)(ROM_START + ROM_SIZE * 1024))
|
||||
|
||||
#define RAM_START (0x20000000)//DTCM_region
|
||||
#define RAM_SIZE (128)
|
||||
#define RAM_END (RAM_START + RAM_SIZE * 1024)
|
||||
|
||||
/*-------------------------- ROM/RAM CONFIG END --------------------------*/
|
||||
|
||||
/*-------------------------- CLOCK CONFIG BEGIN --------------------------*/
|
||||
|
||||
#define BSP_CLOCK_SOURCE ("HSE")
|
||||
#define BSP_CLOCK_SOURCE_FREQ_MHZ ((int32_t)0)
|
||||
#define BSP_CLOCK_SYSTEM_FREQ_MHZ ((int32_t)480)
|
||||
|
||||
/*-------------------------- CLOCK CONFIG END --------------------------*/
|
||||
|
||||
/*-------------------------- UART CONFIG BEGIN --------------------------*/
|
||||
|
||||
/** After configuring corresponding UART or UART DMA, you can use it.
|
||||
*
|
||||
* STEP 1, define macro define related to the serial port opening based on the serial port number
|
||||
* such as #define BSP_USING_UATR1
|
||||
*
|
||||
* STEP 2, according to the corresponding pin of serial port, define the related serial port information macro
|
||||
* such as #define BSP_UART1_TX_PIN "PA9"
|
||||
* #define BSP_UART1_RX_PIN "PA10"
|
||||
*
|
||||
* STEP 3, if you want using SERIAL DMA, you must open it in the RT-Thread Settings.
|
||||
* RT-Thread Setting -> Components -> Device Drivers -> Serial Device Drivers -> Enable Serial DMA Mode
|
||||
*
|
||||
* STEP 4, according to serial port number to define serial port tx/rx DMA function in the board.h file
|
||||
* such as #define BSP_UART1_RX_USING_DMA
|
||||
*
|
||||
*/
|
||||
|
||||
#define BSP_UART1_RX_BUFSIZE 256
|
||||
#define BSP_UART1_TX_BUFSIZE 256
|
||||
|
||||
#define STM32_FLASH_START_ADRESS ROM_START
|
||||
#define STM32_FLASH_SIZE ROM_SIZE
|
||||
#define STM32_FLASH_END_ADDRESS ROM_END
|
||||
|
||||
#define STM32_SRAM_SIZE RAM_SIZE
|
||||
#define STM32_SRAM_START RAM_START
|
||||
#define STM32_SRAM_END RAM_END
|
||||
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN (&__bss_end)
|
||||
#endif
|
||||
|
||||
#define HEAP_END STM32_SRAM_END
|
||||
|
||||
void SystemClock_Config(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08020000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08020000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x08200000;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20020000;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x800;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x400;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite, last block CSTACK};
|
||||
|
|
@ -0,0 +1,157 @@
|
|||
/*
|
||||
* linker script for STM32F4xx with GNU ld
|
||||
* bernard.xiong 2009-10-14
|
||||
*/
|
||||
|
||||
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08020000, LENGTH = 1920k /* 1920KB flash */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 128k /* 128K DTCM */
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x200;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
_etext = .;
|
||||
} > ROM = 0
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
} > ROM
|
||||
__exidx_end = .;
|
||||
|
||||
/* .data section which is used for initialized data */
|
||||
|
||||
.data : AT (_sidata)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
} >RAM
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sstack = .;
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
} >RAM
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
|
||||
*(.bss.init)
|
||||
} > RAM
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x001E0000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x001E0000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00020000 { ; DTCM 128K
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,457 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-24 spaceman the first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
#include "drv_dcmi.h"
|
||||
|
||||
#ifdef BSP_USING_DCMI
|
||||
|
||||
#define DRV_DEBUG
|
||||
#define LOG_TAG "drv.dcmi"
|
||||
#include <drv_log.h>
|
||||
|
||||
static struct stm32_dcmi rt_dcmi_dev = {0};
|
||||
static volatile uint8_t ov2640_fps; // 帧率
|
||||
|
||||
|
||||
static void rt_hw_dmci_dma_init(struct stm32_dcmi *dcmi_dev)
|
||||
{
|
||||
RT_ASSERT(dcmi_dev != RT_NULL);
|
||||
DCMI_HandleTypeDef *_dcmi_handle = &dcmi_dev->dcmi_handle;
|
||||
DMA_HandleTypeDef *_dma_handle = &dcmi_dev->dma_handle;
|
||||
RT_ASSERT(_dcmi_handle != RT_NULL);
|
||||
RT_ASSERT(_dma_handle != RT_NULL);
|
||||
|
||||
__HAL_RCC_DMA2_CLK_ENABLE(); // 使能DMA2时钟
|
||||
|
||||
_dma_handle->Instance = DMA2_Stream7; // DMA2数据流7
|
||||
_dma_handle->Init.Request = DMA_REQUEST_DCMI; // DMA请求来自DCMI
|
||||
_dma_handle->Init.Direction = DMA_PERIPH_TO_MEMORY; // 外设到存储器模式
|
||||
_dma_handle->Init.PeriphInc = DMA_PINC_DISABLE; // 外设地址禁止自增
|
||||
_dma_handle->Init.MemInc = DMA_MINC_ENABLE; // 存储器地址自增
|
||||
_dma_handle->Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; // DCMI数据位宽，32位
|
||||
_dma_handle->Init.MemDataAlignment = DMA_MDATAALIGN_WORD; // 存储器数据位宽，32位
|
||||
_dma_handle->Init.Mode = DMA_CIRCULAR; // 循环模式
|
||||
_dma_handle->Init.Priority = DMA_PRIORITY_LOW; // 优先级低
|
||||
_dma_handle->Init.FIFOMode = DMA_FIFOMODE_ENABLE; // 使能fifo
|
||||
_dma_handle->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; // 全fifo模式，4*32bit大小
|
||||
_dma_handle->Init.MemBurst = DMA_MBURST_SINGLE; // 单次传输
|
||||
_dma_handle->Init.PeriphBurst = DMA_PBURST_SINGLE; // 单次传输
|
||||
|
||||
if (HAL_DMA_Init(_dma_handle) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
HAL_DMA_Init(_dma_handle); // 配置DMA
|
||||
__HAL_LINKDMA(_dcmi_handle, DMA_Handle, *_dma_handle); // 关联DCMI句柄
|
||||
HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); // 设置中断优先级
|
||||
HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); // 使能中断
|
||||
}
|
||||
|
||||
static rt_err_t rt_hw_dcmi_init(struct stm32_dcmi *dcmi_dev)
|
||||
{
|
||||
RT_ASSERT(dcmi_dev != RT_NULL);
|
||||
DCMI_HandleTypeDef *_dcmi_handle = &dcmi_dev->dcmi_handle;
|
||||
RT_ASSERT(_dcmi_handle != RT_NULL);
|
||||
|
||||
_dcmi_handle->Instance = DCMI;
|
||||
_dcmi_handle->Init.SynchroMode = DCMI_SYNCHRO_HARDWARE; // 硬件同步模式，即使用外部的VS、HS信号进行同步
|
||||
_dcmi_handle->Init.PCKPolarity = DCMI_PCKPOLARITY_RISING; // 像素时钟上升沿有效
|
||||
_dcmi_handle->Init.VSPolarity = DCMI_VSPOLARITY_LOW; // VS低电平有效
|
||||
_dcmi_handle->Init.HSPolarity = DCMI_HSPOLARITY_LOW; // HS低电平有效
|
||||
_dcmi_handle->Init.CaptureRate = DCMI_CR_ALL_FRAME; // 捕获等级，设置每一帧都进行捕获
|
||||
_dcmi_handle->Init.ExtendedDataMode = DCMI_EXTEND_DATA_8B; // 8位数据模式
|
||||
_dcmi_handle->Init.JPEGMode = DCMI_JPEG_DISABLE; // 禁止JPEG模式
|
||||
_dcmi_handle->Init.ByteSelectMode = DCMI_BSM_ALL; // DCMI接口捕捉所有数据
|
||||
_dcmi_handle->Init.ByteSelectStart = DCMI_OEBS_ODD; // 选择开始字节，从 帧/行 的第一个数据开始捕获
|
||||
_dcmi_handle->Init.LineSelectMode = DCMI_LSM_ALL; // 捕获所有行
|
||||
_dcmi_handle->Init.LineSelectStart = DCMI_OELS_ODD; // 选择开始行,在帧开始后捕获第一行
|
||||
if (HAL_DCMI_Init(_dcmi_handle) != HAL_OK) {
|
||||
LOG_E("dcmi init error!");
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
HAL_NVIC_SetPriority(DCMI_IRQn, 0, 5); // 设置中断优先级
|
||||
HAL_NVIC_EnableIRQ(DCMI_IRQn); // 开启DCMI中断
|
||||
|
||||
DCMI->IER = 0x0;
|
||||
|
||||
// 在JPG模式下，一定要单独使能该中断
|
||||
__HAL_DCMI_ENABLE_IT(_dcmi_handle, DCMI_IT_FRAME);
|
||||
__HAL_DCMI_ENABLE(_dcmi_handle);
|
||||
|
||||
rt_hw_dmci_dma_init(dcmi_dev);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
/***************************************************************************************************************************************
|
||||
* 函 数 名: ov2640_dcmi_crop
|
||||
*
|
||||
* 入口参数: displey_xsize 、displey_ysize - 显示器的长宽
|
||||
* sensor_xsize、sensor_ysize - 摄像头传感器输出图像的长宽
|
||||
*
|
||||
* 函数功能: 使用DCMI的裁剪功能，将传感器输出的图像裁剪成适应屏幕的大小
|
||||
*
|
||||
* 说 明: 1. 因为摄像头输出的画面比例固定为4:3，不一定匹配显示器
|
||||
* 2. 需要注意的是，摄像头输出的图像长、宽必须要能被4整除！（ 使用OV2640_Set_Framesize函数进行设置 ）
|
||||
* 3. DCMI的水平有效像素也必须要能被4整除！
|
||||
* 4. 函数会计算水平和垂直偏移，尽量让画面居中裁剪
|
||||
*****************************************************************************************************************************************/
|
||||
static rt_err_t ov2640_dcmi_crop(struct stm32_dcmi *dcmi_dev, uint16_t displey_xsize, uint16_t displey_ysize, uint16_t sensor_xsize, uint16_t sensor_ysize)
|
||||
{
|
||||
RT_ASSERT(dcmi_dev != RT_NULL);
|
||||
DCMI_HandleTypeDef *_dcmi_handle = &dcmi_dev->dcmi_handle;
|
||||
RT_ASSERT(_dcmi_handle != RT_NULL);
|
||||
|
||||
uint16_t dcmi_x_offset, dcmi_y_offset; // 水平和垂直偏移，垂直代表的是行数，水平代表的是像素时钟数（pclk周期数）
|
||||
uint16_t dcmi_capcnt; // 水平有效像素，代表的是像素时钟数（pclk周期数）
|
||||
uint16_t dcmi_vline; // 垂直有效行数
|
||||
|
||||
if ((displey_xsize >= sensor_xsize) || (displey_ysize >= sensor_ysize)) {
|
||||
LOG_E("actual displayed size (%d, %d) >= camera output size (%d, %d), exit dcmi cropping", displey_xsize, displey_ysize, sensor_xsize, sensor_ysize);
|
||||
return -RT_ERROR; // 如果实际显示的尺寸大于或等于摄像头输出的尺寸，则退出当前函数，不进行裁剪
|
||||
}
|
||||
|
||||
// 在设置为rgb565格式时，水平偏移，必须是奇数，否则画面色彩不正确，
|
||||
// 因为一个有效像素是2个字节，需要2个pclk周期，所以必须从奇数位开始，不然数据会错乱，
|
||||
// 需要注意的是，寄存器值是从0开始算起的 ！
|
||||
dcmi_x_offset = sensor_xsize - displey_xsize; // 实际计算过程为（sensor_xsize - lcd_xsize）/2*2
|
||||
|
||||
// 计算垂直偏移，尽量让画面居中裁剪，该值代表的是行数，
|
||||
dcmi_y_offset = (sensor_ysize - displey_ysize) / 2 - 1; // 寄存器值是从0开始算起的，所以要-1
|
||||
|
||||
// 因为一个有效像素是2个字节，需要2个pclk周期，所以要乘2
|
||||
// 最终得到的寄存器值，必须要能被4整除！
|
||||
dcmi_capcnt = displey_xsize * 2 - 1; // 寄存器值是从0开始算起的，所以要-1
|
||||
|
||||
dcmi_vline = displey_ysize - 1; // 垂直有效行数
|
||||
|
||||
// LOG_D("%d %d %d %d", dcmi_x_offset, dcmi_y_offset, dcmi_capcnt, dcmi_vline);
|
||||
HAL_DCMI_ConfigCrop(_dcmi_handle, dcmi_x_offset, dcmi_y_offset, dcmi_capcnt, dcmi_vline); // 设置裁剪窗口
|
||||
HAL_DCMI_EnableCrop(_dcmi_handle); // 使能裁剪
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
/***************************************************************************************************************************************
|
||||
* 函 数 名: ov2640_dma_transmit_continuous
|
||||
*
|
||||
* 入口参数: dma_buffer - DMA将要传输的地址，即用于存储摄像头数据的存储区地址
|
||||
* dma_buffersize - 传输的数据大小，32位宽
|
||||
*
|
||||
* 函数功能: 启动DMA传输，连续模式
|
||||
*
|
||||
* 说 明: 1. 开启连续模式之后，会一直进行传输，除非挂起或者停止DCMI
|
||||
* 2. OV2640使用RGB565模式时，1个像素点需要2个字节来存储
|
||||
* 3. 因为DMA配置传输数据为32位宽，计算 dma_buffersize 时，需要除以4，例如：
|
||||
* 要获取 240*240分辨率 的图像，需要传输 240*240*2 = 115200 字节的数据，
|
||||
* 则 dma_buffersize = 115200 / 4 = 28800 。
|
||||
*
|
||||
*****************************************************************************************************************************************/
|
||||
static void ov2640_dma_transmit_continuous(struct stm32_dcmi *dcmi_dev, uint32_t dma_buffer, uint32_t dma_buffersize)
|
||||
{
|
||||
RT_ASSERT(dcmi_dev != RT_NULL);
|
||||
DCMI_HandleTypeDef *_dcmi_handle = &dcmi_dev->dcmi_handle;
|
||||
DMA_HandleTypeDef *_dma_handle = &dcmi_dev->dma_handle;
|
||||
RT_ASSERT(_dcmi_handle != RT_NULL);
|
||||
RT_ASSERT(_dma_handle != RT_NULL);
|
||||
|
||||
_dma_handle->Init.Mode = DMA_CIRCULAR; // 循环模式
|
||||
|
||||
HAL_DMA_Init(_dma_handle); // 配置DMA
|
||||
|
||||
// 使能DCMI采集数据,连续采集模式
|
||||
HAL_DCMI_Start_DMA(_dcmi_handle, DCMI_MODE_CONTINUOUS, (uint32_t)dma_buffer, dma_buffersize);
|
||||
}
|
||||
|
||||
/***************************************************************************************************************************************
|
||||
* 函 数 名: ov2640_dma_transmit_snapshot
|
||||
*
|
||||
* 入口参数: dma_buffer - DMA将要传输的地址，即用于存储摄像头数据的存储区地址
|
||||
* dma_buffersize - 传输的数据大小，32位宽
|
||||
*
|
||||
* 函数功能: 启动DMA传输，快照模式，传输一帧图像后停止
|
||||
*
|
||||
* 说 明: 1. 快照模式，只传输一帧的数据
|
||||
* 2. OV2640使用RGB565模式时，1个像素点需要2个字节来存储
|
||||
* 3. 因为DMA配置传输数据为32位宽，计算 dma_buffersize 时，需要除以4，例如：
|
||||
* 要获取 240*240分辨率 的图像，需要传输 240*240*2 = 115200 字节的数据，
|
||||
* 则 dma_buffersize = 115200 / 4 = 28800 。
|
||||
* 4. 使用该模式传输完成之后，DCMI会被挂起，再次启用传输之前，需要调用 OV2640_DCMI_Resume() 恢复DCMI
|
||||
*
|
||||
*****************************************************************************************************************************************/
|
||||
static void ov2640_dma_transmit_snapshot(struct stm32_dcmi *dcmi_dev, uint32_t dma_buffer, uint32_t dma_buffersize)
|
||||
{
|
||||
RT_ASSERT(dcmi_dev != RT_NULL);
|
||||
DCMI_HandleTypeDef *_dcmi_handle = &dcmi_dev->dcmi_handle;
|
||||
DMA_HandleTypeDef *_dma_handle = &dcmi_dev->dma_handle;
|
||||
RT_ASSERT(_dcmi_handle != RT_NULL);
|
||||
RT_ASSERT(_dma_handle != RT_NULL);
|
||||
|
||||
_dma_handle->Init.Mode = DMA_NORMAL; // 正常模式
|
||||
|
||||
HAL_DMA_Init(_dma_handle); // 配置DMA
|
||||
|
||||
HAL_DCMI_Start_DMA(_dcmi_handle, DCMI_MODE_SNAPSHOT, (uint32_t)dma_buffer, dma_buffersize);
|
||||
}
|
||||
|
||||
/***************************************************************************************************************************************
|
||||
* 函 数 名: ov2640_dcmi_suspend
|
||||
*
|
||||
* 函数功能: 挂起dcmi，停止捕获数据
|
||||
*
|
||||
* 说 明: 1. 开启连续模式之后，再调用该函数，会停止捕获dcmi的数据
|
||||
* 2. 可以调用 ov2640_dcmi_resume() 恢复dcmi
|
||||
* 3. 需要注意的，挂起dcmi期间，dma是没有停止工作的
|
||||
*fanke
|
||||
*****************************************************************************************************************************************/
|
||||
static void ov2640_dcmi_suspend(struct stm32_dcmi *dcmi_dev)
|
||||
{
|
||||
RT_ASSERT(dcmi_dev != RT_NULL);
|
||||
DCMI_HandleTypeDef *_dcmi_handle = &dcmi_dev->dcmi_handle;
|
||||
RT_ASSERT(_dcmi_handle != RT_NULL);
|
||||
|
||||
HAL_DCMI_Suspend(_dcmi_handle); // 挂起dcmi
|
||||
}
|
||||
|
||||
/***************************************************************************************************************************************
|
||||
* 函 数 名: ov2640_dcmi_resume
|
||||
*
|
||||
* 函数功能: 恢复dcmi，开始捕获数据
|
||||
*
|
||||
* 说 明: 1. 当dcmi被挂起时，可以调用该函数恢复
|
||||
* 2. 使用 ov2640_dma_transmit_snapshot() 快照模式，传输完成之后，dcmi也会被挂起，再次启用传输之前，
|
||||
* 需要调用本函数恢复dcmi捕获
|
||||
*
|
||||
*****************************************************************************************************************************************/
|
||||
static void ov2640_dcmi_resume(struct stm32_dcmi *dcmi_dev)
|
||||
{
|
||||
RT_ASSERT(dcmi_dev != RT_NULL);
|
||||
DCMI_HandleTypeDef *_dcmi_handle = &dcmi_dev->dcmi_handle;
|
||||
RT_ASSERT(_dcmi_handle != RT_NULL);
|
||||
|
||||
_dcmi_handle->State = HAL_DCMI_STATE_BUSY; // 变更dcmi标志
|
||||
_dcmi_handle->Instance->CR |= DCMI_CR_CAPTURE; // 开启dcmi捕获
|
||||
}
|
||||
|
||||
/***************************************************************************************************************************************
|
||||
* 函 数 名: ov2640_dcmi_stop
|
||||
*
|
||||
* 函数功能: 禁止dcmi的dma请求，停止dcmi捕获，禁止dcmi外设
|
||||
*
|
||||
*****************************************************************************************************************************************/
|
||||
static void ov2640_dcmi_stop(struct stm32_dcmi *dcmi_dev)
|
||||
{
|
||||
RT_ASSERT(dcmi_dev != RT_NULL);
|
||||
DCMI_HandleTypeDef *_dcmi_handle = &dcmi_dev->dcmi_handle;
|
||||
RT_ASSERT(_dcmi_handle != RT_NULL);
|
||||
|
||||
HAL_DCMI_Stop(_dcmi_handle);
|
||||
}
|
||||
|
||||
void DCMI_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
HAL_DCMI_IRQHandler(&rt_dcmi_dev.dcmi_handle);
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void DMA2_Stream7_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
HAL_DMA_IRQHandler(&rt_dcmi_dev.dma_handle);
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
/* Capture a frame of the image */
|
||||
void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
static uint32_t dcmi_tick = 0; // 用于保存当前的时间计数值
|
||||
static uint8_t dcmi_frame_count = 0; // 帧数计数
|
||||
if (HAL_GetTick() - dcmi_tick >= 1000) // 每隔 1s 计算一次帧率
|
||||
{
|
||||
dcmi_tick = HAL_GetTick(); // 重新获取当前时间计数值
|
||||
ov2640_fps = dcmi_frame_count; // 获得fps
|
||||
dcmi_frame_count = 0; // 计数清0
|
||||
}
|
||||
dcmi_frame_count++; // 没进入一次中断（每次传输完一帧数据），计数值+1
|
||||
|
||||
rt_sem_release(&rt_dcmi_dev.cam_semaphore);
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
if (HAL_DCMI_GetError(hdcmi) == HAL_DCMI_ERROR_OVR) {
|
||||
LOG_E("FIFO overflow error");
|
||||
}
|
||||
LOG_E("error:0x%08x", HAL_DCMI_GetError(hdcmi));
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
static rt_err_t rt_dcmi_init(rt_device_t dev)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
rt_err_t result = RT_EOK;
|
||||
struct stm32_dcmi *_rt_dcmi_dev = DCMI_DEVICE(dev);
|
||||
|
||||
result = rt_hw_dcmi_init(_rt_dcmi_dev);
|
||||
if (result != RT_EOK) {
|
||||
return result;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static rt_err_t rt_dcmi_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_dcmi_close(rt_device_t dev)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_dcmi_control(rt_device_t dev, int cmd, void *args)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
struct stm32_dcmi *_rt_dcmi_dev = DCMI_DEVICE(dev);
|
||||
|
||||
switch (cmd) {
|
||||
case DCMI_CTRL_CROP: {
|
||||
RT_ASSERT(args != RT_NULL);
|
||||
struct stm32_dcmi_cropsize* cropsize = (struct stm32_dcmi_cropsize*)args;
|
||||
ov2640_dcmi_crop(_rt_dcmi_dev, cropsize->displey_xsize, cropsize->displey_ysize, cropsize->sensor_xsize, cropsize->sensor_ysize);
|
||||
} break;
|
||||
case DCMI_CTRL_TRANSMIT_CONTINUOUS: {
|
||||
RT_ASSERT(args != RT_NULL);
|
||||
struct stm32_dcmi_dma_transmitbuffer* transmitbuffer = (struct stm32_dcmi_dma_transmitbuffer*)args;
|
||||
ov2640_dma_transmit_continuous(_rt_dcmi_dev, transmitbuffer->dma_buffer, transmitbuffer->dma_buffersize);
|
||||
} break;
|
||||
case DCMI_CTRL_TRANSMIT_SNAPSHOT: {
|
||||
RT_ASSERT(args != RT_NULL);
|
||||
struct stm32_dcmi_dma_transmitbuffer* transmitbuffer = (struct stm32_dcmi_dma_transmitbuffer*)args;
|
||||
ov2640_dma_transmit_snapshot(_rt_dcmi_dev, transmitbuffer->dma_buffer, transmitbuffer->dma_buffersize);
|
||||
} break;
|
||||
case DCMI_CTRL_SUSPEND: {
|
||||
ov2640_dcmi_suspend(_rt_dcmi_dev);
|
||||
} break;
|
||||
case DCMI_CTRL_RESUME: {
|
||||
ov2640_dcmi_resume(_rt_dcmi_dev);
|
||||
} break;
|
||||
case DCMI_CTRL_STOP: {
|
||||
ov2640_dcmi_stop(_rt_dcmi_dev);
|
||||
} break;
|
||||
case DCMI_CTRL_GET_FPS: {
|
||||
*(uint8_t*)args = ov2640_fps;
|
||||
} break;
|
||||
|
||||
default:
|
||||
return -RT_EINVAL;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_ssize_t rt_dcmi_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_ssize_t rt_dcmi_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
const static struct rt_device_ops dcmi_ops =
|
||||
{
|
||||
rt_dcmi_init,
|
||||
rt_dcmi_open,
|
||||
rt_dcmi_close,
|
||||
rt_dcmi_read,
|
||||
rt_dcmi_write,
|
||||
rt_dcmi_control,
|
||||
};
|
||||
#endif
|
||||
|
||||
int dcmi_init(void)
|
||||
{
|
||||
int ret = 0;
|
||||
rt_device_t device = &rt_dcmi_dev.parent;
|
||||
|
||||
/* memset rt_dcmi_dev to zero */
|
||||
memset(&rt_dcmi_dev, 0x00, sizeof(rt_dcmi_dev));
|
||||
|
||||
/* init cam_semaphore semaphore */
|
||||
ret = rt_sem_init(&rt_dcmi_dev.cam_semaphore, "cam_sem", 0, RT_IPC_FLAG_FIFO);
|
||||
if (ret != RT_EOK) {
|
||||
LOG_E("init semaphore failed!\n");
|
||||
ret = -RT_ENOMEM;
|
||||
goto __exit;
|
||||
}
|
||||
|
||||
device->type = RT_Device_Class_Miscellaneous;
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
device->ops = &dcmi_ops;
|
||||
#else
|
||||
device->init = rt_dcmi_init;
|
||||
device->open = rt_dcmi_open;
|
||||
device->close = rt_dcmi_close;
|
||||
device->read = rt_dcmi_read;
|
||||
device->write = rt_dcmi_write;
|
||||
device->control = rt_dcmi_control;
|
||||
#endif
|
||||
device->user_data = RT_NULL;
|
||||
|
||||
ret = rt_device_register(device, "dcmi", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
|
||||
if (ret != RT_EOK) {
|
||||
LOG_E("dcmi registered fail!\n\r");
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
LOG_I("dcmi init success!");
|
||||
|
||||
return RT_EOK;
|
||||
__exit:
|
||||
if (ret != RT_EOK) {
|
||||
rt_sem_delete(&rt_dcmi_dev.cam_semaphore);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
INIT_BOARD_EXPORT(dcmi_init);
|
||||
|
||||
#endif /* BSP_USING_DCMI */
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-24 spaceman the first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_DCMI_H__
|
||||
#define __DRV_DCMI_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "board.h"
|
||||
|
||||
#ifdef BSP_USING_DCMI
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define DCMI_DEVICE(dev) (struct stm32_dcmi *)(dev)
|
||||
|
||||
#define DCMI_CTRL_CROP (0x01)
|
||||
#define DCMI_CTRL_TRANSMIT_CONTINUOUS (0x02)
|
||||
#define DCMI_CTRL_TRANSMIT_SNAPSHOT (0x03)
|
||||
#define DCMI_CTRL_SUSPEND (0x04)
|
||||
#define DCMI_CTRL_RESUME (0x05)
|
||||
#define DCMI_CTRL_STOP (0x06)
|
||||
#define DCMI_CTRL_GET_FPS (0x07)
|
||||
|
||||
struct stm32_dcmi {
|
||||
struct rt_device parent;
|
||||
|
||||
DCMI_HandleTypeDef dcmi_handle;
|
||||
DMA_HandleTypeDef dma_handle;
|
||||
|
||||
struct rt_semaphore cam_semaphore;
|
||||
};
|
||||
|
||||
struct stm32_dcmi_cropsize {
|
||||
uint16_t displey_xsize;
|
||||
uint16_t displey_ysize;
|
||||
uint16_t sensor_xsize;
|
||||
uint16_t sensor_ysize;
|
||||
};
|
||||
|
||||
struct stm32_dcmi_dma_transmitbuffer {
|
||||
uint32_t dma_buffer;
|
||||
uint32_t dma_buffersize;
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* BSP_USING_DCMI */
|
||||
|
||||
#endif /* __DRV_DCMI_H__ */
|
||||
|
|
@ -0,0 +1,538 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-24 spaceman the first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
|
||||
#ifdef BSP_USING_OV2640
|
||||
|
||||
#include <dfs_file.h>
|
||||
#include <unistd.h>
|
||||
#include <stdio.h>
|
||||
#include <sys/stat.h>
|
||||
#include <sys/statfs.h>
|
||||
#include "drv_dcmi.h"
|
||||
#include "drv_ov2640.h"
|
||||
#include "drv_ov2640_cfg.h"
|
||||
|
||||
#define DRV_DEBUG
|
||||
//#define CAMERA_DUMP
|
||||
#define LOG_TAG "drv.ov2640"
|
||||
#include <drv_log.h>
|
||||
|
||||
#define CHIP_ADDRESS 0x30 /* OV2640 address */
|
||||
// #define CHIP_ADDRESS 0x3C /* OV5640 address */
|
||||
#define I2C_NAME "i2c1"
|
||||
#define PWDN_PIN GET_PIN(D, 14)
|
||||
|
||||
struct rt_i2c_bus_device *i2c_bus = RT_NULL;
|
||||
|
||||
#if defined(CAMERA_DUMP)
|
||||
#define __is_print(ch) ((unsigned int)((ch) - ' ') < 127u - ' ')
|
||||
static void dump_hex(const rt_uint8_t *ptr, rt_size_t buflen)
|
||||
{
|
||||
unsigned char *buf = (unsigned char *)ptr;
|
||||
int i, j;
|
||||
|
||||
for (i = 0; i < buflen; i += 16)
|
||||
{
|
||||
rt_kprintf("%08x:", i);
|
||||
|
||||
for (j = 0; j < 16; j++)
|
||||
{
|
||||
if (i + j < buflen)
|
||||
{
|
||||
rt_kprintf("%02x", buf[i + j]);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf(" ");
|
||||
}
|
||||
}
|
||||
rt_kprintf(" ");
|
||||
|
||||
for (j = 0; j < 16; j++)
|
||||
{
|
||||
if (i + j < buflen)
|
||||
{
|
||||
rt_kprintf("%c", __is_print(buf[i + j]) ? buf[i + j] : '.');
|
||||
}
|
||||
}
|
||||
rt_kprintf("\n");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/* i2c read reg */
|
||||
static rt_err_t read_reg(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t len, rt_uint8_t *buf)
|
||||
{
|
||||
struct rt_i2c_msg msg[2] = {0, 0};
|
||||
|
||||
RT_ASSERT(bus != RT_NULL);
|
||||
|
||||
msg[0].addr = CHIP_ADDRESS;
|
||||
msg[0].flags = RT_I2C_WR;
|
||||
msg[0].buf = ®
|
||||
msg[0].len = 1;
|
||||
|
||||
msg[1].addr = CHIP_ADDRESS;
|
||||
msg[1].flags = RT_I2C_RD;
|
||||
msg[1].len = len;
|
||||
msg[1].buf = buf;
|
||||
|
||||
if (rt_i2c_transfer(bus, msg, 2) == 2)
|
||||
{
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
/* i2c write reg */
|
||||
static rt_err_t write_reg(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t data)
|
||||
{
|
||||
rt_uint8_t buf[2];
|
||||
struct rt_i2c_msg msgs;
|
||||
|
||||
RT_ASSERT(bus != RT_NULL);
|
||||
|
||||
buf[0] = reg;
|
||||
buf[1] = data;
|
||||
|
||||
msgs.addr = CHIP_ADDRESS;
|
||||
msgs.flags = RT_I2C_WR;
|
||||
msgs.buf = buf;
|
||||
msgs.len = 2;
|
||||
|
||||
if (rt_i2c_transfer(bus, &msgs, 1) == 1)
|
||||
{
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
static rt_err_t ov2640_read_id(struct rt_i2c_bus_device *bus, rt_uint16_t *id)
|
||||
{
|
||||
rt_uint8_t read_value[2];
|
||||
|
||||
write_reg(bus, OV2640_SEL_Registers, OV2640_SEL_SENSOR); // 选择 SENSOR 寄存器组
|
||||
|
||||
read_reg(bus, OV2640_SENSOR_PIDH, 1, &read_value[0]); // 读取ID高字节
|
||||
read_reg(bus, OV2640_SENSOR_PIDL, 1, &read_value[1]); // 读取ID低字节
|
||||
|
||||
*id = ((rt_uint16_t)(read_value[0] << 8) & 0xFF00);
|
||||
*id |= ((rt_uint16_t)(read_value[1]) & 0x00FF);
|
||||
|
||||
if ((*id != OV2640_ID1) && (*id != OV2640_ID2)) {
|
||||
LOG_E("ov2640 init error, id: 0x%04x", *id);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
LOG_I("ov2640 init success, id: 0x%04x", *id);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t ov2640_reset(struct rt_i2c_bus_device *bus)
|
||||
{
|
||||
rt_pin_mode(PWDN_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
rt_thread_mdelay(5); // 等待模块上电稳定，最少5ms，然后拉低PWDN
|
||||
rt_pin_write(PWDN_PIN, PIN_LOW); // PWDN 引脚输出低电平，不开启掉电模式，摄像头正常工作，此时摄像头模块的白色LED会点亮
|
||||
|
||||
// 根据OV2640的上电时序，硬件复位的持续时间要>=3ms，反客的OV2640采用硬件RC复位，持续时间大概在6ms左右
|
||||
// 因此加入延时，等待硬件复位完成并稳定下来
|
||||
rt_thread_mdelay(5);
|
||||
|
||||
write_reg(bus, OV2640_SEL_Registers, OV2640_SEL_SENSOR); // 选择 SENSOR 寄存器组
|
||||
write_reg(bus, OV2640_SENSOR_COM7, 0x80); // 启动软件复位
|
||||
|
||||
// 根据OV2640的软件复位时序，软件复位执行后，要>=2ms方可执行SCCB配置，此处采用保守一点的参数，延时10ms
|
||||
rt_thread_mdelay(10);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t ov2640_config(struct rt_i2c_bus_device *bus, const rt_uint8_t (*configdata)[2])
|
||||
{
|
||||
rt_uint32_t i = 0;
|
||||
|
||||
for (i = 0; configdata[i][0]; i++) {
|
||||
write_reg(bus, configdata[i][0], configdata[i][1]); // 进行参数配置
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
void ov2640_set_pixformat(struct rt_i2c_bus_device *bus, rt_uint8_t pixformat)
|
||||
{
|
||||
const rt_uint8_t(*configdata)[2];
|
||||
uint32_t i; // 计数变量
|
||||
|
||||
switch (pixformat) {
|
||||
case Pixformat_RGB565:
|
||||
configdata = OV2640_RGB565_Config;
|
||||
break;
|
||||
case Pixformat_JPEG:
|
||||
configdata = OV2640_JPEG_Config;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
for (i = 0; configdata[i][0]; i++) {
|
||||
write_reg(bus, configdata[i][0], configdata[i][1]); // 进行参数配置
|
||||
}
|
||||
}
|
||||
|
||||
rt_err_t ov2640_set_framesize(struct rt_i2c_bus_device *bus, rt_uint16_t width, rt_uint16_t height)
|
||||
{
|
||||
if ((width % 4) || (height % 4)) // 输出图像的大小一定要能被4整除
|
||||
{
|
||||
return -RT_ERROR; // 返回错误标志
|
||||
}
|
||||
|
||||
write_reg(bus, OV2640_SEL_Registers,OV2640_SEL_DSP); // 选择 dsp寄存器组
|
||||
|
||||
write_reg(bus, 0x5a, width / 4 & 0xff); // 实际图像输出的宽度（outw），7~0 bit，寄存器的值等于实际值/4
|
||||
write_reg(bus, 0x5b, height / 4 & 0xff); // 实际图像输出的高度（outh），7~0 bit，寄存器的值等于实际值/4
|
||||
write_reg(bus, 0x5c, (width / 4 >> 8 & 0x03) | (height / 4 >> 6 & 0x04)); // 设置zmhh的bit[2:0]，也就是outh 的第 8 bit，outw 的第 9~8 bit，
|
||||
|
||||
write_reg(bus, OV2640_DSP_RESET, 0x00); // 复位
|
||||
|
||||
return RT_EOK; // 成功
|
||||
}
|
||||
|
||||
rt_err_t ov2640_set_horizontal_mirror(struct rt_i2c_bus_device *bus, rt_uint8_t configstate)
|
||||
{
|
||||
rt_uint8_t ov2640_reg; // 寄存器的值
|
||||
|
||||
write_reg(bus, OV2640_SEL_Registers, OV2640_SEL_SENSOR); // 选择 sensor 寄存器组
|
||||
read_reg(bus, OV2640_SENSOR_REG04, 1, &ov2640_reg); // 读取 0x04 的寄存器值
|
||||
|
||||
// reg04,寄存器组4，寄存器地址为 0x04，该寄存器的bit[7]，用于设置水平是否镜像
|
||||
if (configstate == OV2640_Enable) // 如果使能镜像
|
||||
{
|
||||
ov2640_reg |= 0x80; // bit[7]置1则镜像
|
||||
} else // 取消镜像
|
||||
{
|
||||
ov2640_reg &= ~0x80; // bit[7]置0则是正常模式
|
||||
}
|
||||
return write_reg(bus, OV2640_SENSOR_REG04, ov2640_reg); // 写入寄存器
|
||||
}
|
||||
|
||||
rt_err_t ov2640_set_vertical_flip(struct rt_i2c_bus_device *bus, rt_uint8_t configstate)
|
||||
{
|
||||
rt_uint8_t ov2640_reg; // 寄存器的值
|
||||
|
||||
write_reg(bus, OV2640_SEL_Registers, OV2640_SEL_SENSOR); // 选择 sensor 寄存器组
|
||||
read_reg(bus, OV2640_SENSOR_REG04, 1, &ov2640_reg); // 读取 0x04 的寄存器值
|
||||
|
||||
// reg04,寄存器组4，寄存器地址为 0x04，该寄存器的第bit[6]，用于设置水平是垂直翻转
|
||||
if (configstate == OV2640_Enable) {
|
||||
// 此处设置参考openmv的驱动
|
||||
// bit[4]具体的作用是什么手册没有说，如果垂直翻转之后，该位不置1的话，颜色会不对
|
||||
ov2640_reg |= 0x40 | 0x10; // bit[6]置1时，图像会垂直翻转
|
||||
} else // 取消翻转
|
||||
{
|
||||
ov2640_reg &= ~(0x40 | 0x10); // 将bit[6]和bit[4]都写0
|
||||
}
|
||||
return write_reg(bus, OV2640_SENSOR_REG04, ov2640_reg); // 写入寄存器
|
||||
}
|
||||
|
||||
void ov2640_set_saturation(struct rt_i2c_bus_device *bus, rt_int8_t saturation)
|
||||
{
|
||||
write_reg(bus, OV2640_SEL_Registers, OV2640_SEL_DSP); // 选择 dsp寄存器组
|
||||
|
||||
switch (saturation) {
|
||||
case 2:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x02);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x03);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x68);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x68);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x02);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x03);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x58);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x58);
|
||||
break;
|
||||
|
||||
case 0:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x02);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x03);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x48);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x48);
|
||||
break;
|
||||
|
||||
case -1:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x02);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x03);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x38);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x38);
|
||||
break;
|
||||
|
||||
case -2:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x02);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x03);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x28);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x28);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void ov2640_set_brightness(struct rt_i2c_bus_device *bus, rt_int8_t brightness)
|
||||
{
|
||||
write_reg(bus, OV2640_SEL_Registers, OV2640_SEL_DSP); // 选择 dsp寄存器组
|
||||
|
||||
switch (brightness) {
|
||||
case 2:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x04);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x09);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x40);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x00);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x04);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x09);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x30);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x00);
|
||||
break;
|
||||
|
||||
case 0:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x04);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x09);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x20);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x00);
|
||||
break;
|
||||
|
||||
case -1:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x04);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x09);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x10);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x00);
|
||||
break;
|
||||
|
||||
case -2:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x04);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x09);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x00);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void ov2640_set_contrast(struct rt_i2c_bus_device *bus, rt_int8_t contrast)
|
||||
{
|
||||
write_reg(bus, OV2640_SEL_Registers, OV2640_SEL_DSP); // 选择 dsp寄存器组
|
||||
|
||||
switch (contrast) {
|
||||
case 2:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x04);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x07);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x20);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x28);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x0c);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x06);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x04);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x07);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x20);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x24);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x16);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x06);
|
||||
break;
|
||||
|
||||
case 0:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x04);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x07);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x20);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x20);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x20);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x06);
|
||||
break;
|
||||
|
||||
case -1:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x04);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x07);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x20);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x1c);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x2a);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x06);
|
||||
break;
|
||||
|
||||
case -2:
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x04);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x07);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x20);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x18);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x34);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x06);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void ov2640_set_effect(struct rt_i2c_bus_device *bus, rt_uint8_t effect_mode)
|
||||
{
|
||||
write_reg(bus, OV2640_SEL_Registers, OV2640_SEL_DSP); // 选择 dsp寄存器组
|
||||
|
||||
switch (effect_mode) {
|
||||
case OV2640_Effect_Normal: // 正常模式
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x05);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x80);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x80);
|
||||
break;
|
||||
|
||||
case OV2640_Effect_Negative: // 负片模式，也就是颜色全部取反
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x40);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x05);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x80);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x80);
|
||||
break;
|
||||
|
||||
case OV2640_Effect_BW: // 黑白模式
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x18);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x05);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x80);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x80);
|
||||
break;
|
||||
|
||||
case OV2640_Effect_BW_Negative: // 黑白+负片模式
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x00);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x58);
|
||||
write_reg(bus, OV2640_DSP_BPADDR, 0x05);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x80);
|
||||
write_reg(bus, OV2640_DSP_BPDATA, 0x80);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int rt_hw_ov2640_init(void)
|
||||
{
|
||||
extern rt_err_t ov2640_dcmi_crop(uint16_t displey_xsize, uint16_t displey_ysize, uint16_t sensor_xsize, uint16_t sensor_ysize);
|
||||
|
||||
static rt_uint16_t id = 0;
|
||||
rt_device_t dcmi_dev = RT_NULL;
|
||||
|
||||
i2c_bus = rt_i2c_bus_device_find(I2C_NAME);
|
||||
if (i2c_bus == RT_NULL)
|
||||
{
|
||||
LOG_E("can't find %c deivce", I2C_NAME);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
/* dcmi init */
|
||||
dcmi_dev = rt_device_find("dcmi");
|
||||
if (dcmi_dev == RT_NULL)
|
||||
{
|
||||
LOG_E("can't find dcmi device!");
|
||||
return -RT_ERROR;
|
||||
}
|
||||
rt_device_open(dcmi_dev, RT_DEVICE_FLAG_RDWR);
|
||||
|
||||
ov2640_reset(i2c_bus);
|
||||
ov2640_read_id(i2c_bus, &id);
|
||||
ov2640_config(i2c_bus, OV2640_SVGA_Config); // 配置 SVGA模式 ------> 800*600， 最大帧率30帧
|
||||
// ov2640_config(i2c_bus, OV2640_UXGA_Config); // 配置 UXGA模式 ------> 1600*1200，最大帧率15帧
|
||||
ov2640_set_framesize(i2c_bus, OV2640_Width, OV2640_Height); // 设置OV2640输出的图像大小
|
||||
|
||||
// 将OV2640输出图像裁剪成适应屏幕的大小
|
||||
struct stm32_dcmi_cropsize cropsize = {Display_Width, Display_Height, OV2640_Width, OV2640_Height};
|
||||
rt_device_control(dcmi_dev, DCMI_CTRL_CROP, &cropsize);
|
||||
|
||||
ov2640_set_pixformat(i2c_bus, Pixformat_RGB565);
|
||||
// ov2640_set_pixformat(i2c_bus, Pixformat_JPEG);
|
||||
|
||||
ov2640_set_saturation(i2c_bus, 0);
|
||||
ov2640_set_brightness(i2c_bus, 0);
|
||||
ov2640_set_contrast(i2c_bus, 0);
|
||||
ov2640_set_effect(i2c_bus, OV2640_Effect_Normal);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_APP_EXPORT(rt_hw_ov2640_init);
|
||||
|
||||
#ifdef DRV_DEBUG
|
||||
#ifdef FINSH_USING_MSH
|
||||
#ifdef BSP_USING_LCD_SPI
|
||||
#include "drv_lcd_spi.h"
|
||||
int camera_sample(int argc, char **argv)
|
||||
{
|
||||
rt_device_t dcmi_dev = RT_NULL;
|
||||
rt_uint8_t fps = 0;
|
||||
dcmi_dev = rt_device_find("dcmi");
|
||||
if (dcmi_dev == RT_NULL)
|
||||
{
|
||||
LOG_E("can't find dcmi device!");
|
||||
return -RT_ERROR;
|
||||
}
|
||||
struct stm32_dcmi* stm32_dcmi_dev = DCMI_DEVICE(dcmi_dev);
|
||||
|
||||
// malloc dma memory
|
||||
struct rt_memheap* axi_sram = (struct rt_memheap*)rt_object_find("axi_sram", RT_Object_Class_MemHeap);
|
||||
void* buff_ptr = rt_memheap_alloc(axi_sram, OV2640_BufferSize);
|
||||
|
||||
// 启动DMA连续传输
|
||||
struct stm32_dcmi_dma_transmitbuffer transmitbuffer = {(uint32_t)buff_ptr, OV2640_BufferSize};
|
||||
rt_device_control(dcmi_dev, DCMI_CTRL_TRANSMIT_CONTINUOUS, &transmitbuffer);
|
||||
|
||||
while (1) {
|
||||
rt_sem_take(&stm32_dcmi_dev->cam_semaphore, RT_WAITING_FOREVER);
|
||||
// rt_device_control(dcmi_dev, DCMI_CTRL_SUSPEND, RT_NULL);
|
||||
|
||||
// 将图像数据复制到屏幕
|
||||
lcd_copybuffer(0, 0, Display_Width, Display_Height, (uint16_t *)buff_ptr);
|
||||
// rt_device_control(dcmi_dev, DCMI_CTRL_RESUME, RT_NULL);
|
||||
rt_device_control(dcmi_dev, DCMI_CTRL_GET_FPS, &fps);
|
||||
LOG_D("fps: %d", fps);
|
||||
}
|
||||
rt_memheap_free(buff_ptr);
|
||||
}
|
||||
MSH_CMD_EXPORT(camera_sample, record picture to lcd);
|
||||
|
||||
#endif /* BSP_USING_LCD_SPI */
|
||||
#endif /* FINSH_USING_MSH */
|
||||
#endif /* DRV_DEBUG */
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,94 @@
|
|||
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-24 spaceman the first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_OV2640_H__
|
||||
#define __DRV_OV2640_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <lcd_port.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief OV2640 ID
|
||||
*/
|
||||
#define OV2640_ID1 0x2640U
|
||||
#define OV2640_ID2 0x2642U
|
||||
|
||||
#define OV2640_Enable 1
|
||||
#define OV2640_Disable 0
|
||||
|
||||
// 用于设置输出的格式，被 ov2640_set_pixformat() 引用
|
||||
#define Pixformat_RGB565 0
|
||||
#define Pixformat_JPEG 1
|
||||
|
||||
// OV2640的特效模式，被 ov2640_set_effect() 引用
|
||||
#define OV2640_Effect_Normal 0 // 正常模式
|
||||
#define OV2640_Effect_Negative 1 // 负片模式，也就是颜色全部取反
|
||||
#define OV2640_Effect_BW 2 // 黑白模式
|
||||
#define OV2640_Effect_BW_Negative 3 // 黑白模式+负片模式
|
||||
|
||||
// 1. 定义OV2640实际输出的图像大小，可以根据实际的应用或者显示屏进行调整（同时也要修改配置参数里的时钟分频）
|
||||
// 2. 这两个参数不会影响帧率，且不能超过对应模式的最大尺寸
|
||||
// 3. SVGA模式下，输出图像最大分辨率为 800*600, 最大帧率30帧
|
||||
// 4. UXGA模式下，输出图像最大分辨率为 1600*1200,最大帧率15帧
|
||||
// 5. 要设置的图像长、宽必须能被4整除！
|
||||
// 6. 要设置的图像长、宽比必须满足4:3，不然画面会被拉伸畸变
|
||||
#define OV2640_Width 400 // 图像长度
|
||||
#define OV2640_Height 300 // 图像宽度
|
||||
|
||||
// 1. 定义要显示的画面大小，数值一定要能被4整除！！
|
||||
// 2. RGB565格式下，最终会由DCMI将OV2640输出的4:3图像裁剪为适应屏幕的比例
|
||||
// 3. 此处的分辨率不能超过 OV2640_Width 和 OV2640_Height
|
||||
// 4. 分辨率太高时，需要修改PCLK的时钟速度，详细计算说明可参考 dcmi_ov2640_cfg.h 里的 0xd3 寄存器配置
|
||||
#define Display_Width LCD_WIDTH
|
||||
#define Display_Height LCD_HEIGHT
|
||||
|
||||
// 1.RGB565模式下，需要 图像分辨率*2 的大小
|
||||
// 2.JPG模式下，需要的缓冲区大小并不是固定的，例如 640*480分辨率，JPG图像大概要占30K，
|
||||
// 缓冲区预留2倍左右大小即可，用户可根据实际情况去设置,
|
||||
#define OV2640_BufferSize Display_Width *Display_Height * 2 / 4 // DMA传输数据大小（32位宽）
|
||||
// #define OV2640_BufferSize 100*1024/4 // DMA传输数据大小（32位宽）
|
||||
|
||||
#define OV2640_SEL_Registers 0xFF // 寄存器组选择寄存器
|
||||
#define OV2640_SEL_DSP 0x00 // 设置为0x00时，选择 DSP 寄存器组
|
||||
#define OV2640_SEL_SENSOR 0x01 // 设置为0x01时，选择 SENSOR 寄存器组
|
||||
|
||||
// DSP 寄存器组 (0xFF = 0x00)
|
||||
#define OV2640_DSP_RESET 0xE0 // 可选择复位 控制器、SCCB单元、JPEG单元、DVP接口单元等
|
||||
#define OV2640_DSP_BPADDR 0x7C // 间接寄存器访问:地址
|
||||
#define OV2640_DSP_BPDATA 0x7D // 间接寄存器访问:数据
|
||||
|
||||
// SENSOR 寄存器组 (0xFF = 0x01)
|
||||
#define OV2640_SENSOR_COM7 0x12 // 公共控制,系统复位、摄像头分辨率选择、缩放模式、颜色彩条设置
|
||||
#define OV2640_SENSOR_REG04 0x04 // 寄存器组4,可设置摄像头扫描方向等
|
||||
#define OV2640_SENSOR_PIDH 0x0a // ID高字节
|
||||
#define OV2640_SENSOR_PIDL 0x0b // ID低字节
|
||||
|
||||
void ov2640_set_pixformat(struct rt_i2c_bus_device *bus, rt_uint8_t pixformat);
|
||||
|
||||
rt_err_t ov2640_set_framesize(struct rt_i2c_bus_device *bus, rt_uint16_t width, rt_uint16_t height);
|
||||
|
||||
rt_err_t ov2640_set_horizontal_mirror(struct rt_i2c_bus_device *bus, rt_uint8_t configstate);
|
||||
rt_err_t ov2640_set_vertical_flip(struct rt_i2c_bus_device *bus, rt_uint8_t configstate);
|
||||
|
||||
void ov2640_set_saturation(struct rt_i2c_bus_device *bus, rt_int8_t saturation);
|
||||
void ov2640_set_brightness(struct rt_i2c_bus_device *bus, rt_int8_t brightness);
|
||||
void ov2640_set_contrast(struct rt_i2c_bus_device *bus, rt_int8_t contrast);
|
||||
void ov2640_set_effect(struct rt_i2c_bus_device *bus, rt_uint8_t effect_mode);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,495 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-24 spaceman the first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_OV2640_CFG_H
|
||||
#define __DRV_OV2640_CFG_H
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
// RGB565格式配置
|
||||
const rt_uint8_t OV2640_RGB565_Config[][2] =
|
||||
{
|
||||
{0xff, 0x00}, // 设置DSP寄存器租
|
||||
{0xda, 0x09}, // 数据接口模式
|
||||
{0xd7, 0x03}, // 手册里没有说明该寄存器的功能,此处参考OpenMV的设置
|
||||
{0xE0, 0x00}, // RESET,可选择复位 控制器、SCCB单元、JPEG单元、DVP接口单元等
|
||||
{0x05, 0x00}, // 使能DSP
|
||||
{0, 0}, // 结束
|
||||
};
|
||||
|
||||
// JPEG格式配置
|
||||
const rt_uint8_t OV2640_JPEG_Config[][2] =
|
||||
{
|
||||
{0xff, 0x00}, // 设置DSP寄存器租
|
||||
{0xda, 0x10}, // 数据接口模式
|
||||
{0xe1, 0x77}, // 手册里没有说明该寄存器的功能,此处参考OpenMV的设置，JPG模式一定要设置为0x77！！
|
||||
{0xd7, 0x03}, // 手册里没有说明该寄存器的功能,此处参考OpenMV的设置
|
||||
{0xe0, 0x00}, // RESET,可选择复位 控制器、SCCB单元、JPEG单元、DVP接口单元等
|
||||
{0x05, 0x00}, // 使能DSP
|
||||
{0, 0}, // 结束
|
||||
};
|
||||
|
||||
/* SVGA 分辨率为800*600，最高支持30帧 */
|
||||
const rt_uint8_t OV2640_SVGA_Config[][2] =
|
||||
{
|
||||
{0xff, 0x01}, // 设置 sensor 寄存器组
|
||||
{0x12, 0x80}, // 复位全部寄存
|
||||
|
||||
{0xff, 0x00}, // 设置DSP寄存器租
|
||||
{0x2c, 0xff}, // 手册里没有说明该寄存器的功能,但是给出的参考代码又配置了该寄存器,因此保留
|
||||
{0x2e, 0xdf},
|
||||
|
||||
{0xff, 0x01}, // 设置 sensor 寄存器组
|
||||
|
||||
// 手册里没有说明这些寄存器的作用,这里直接保留官方给的设置参数
|
||||
{0x3c, 0x32},
|
||||
{0x2c, 0x0c},
|
||||
{0x33, 0x78},
|
||||
{0x3a, 0x33},
|
||||
{0x3b, 0xfB},
|
||||
{0x3e, 0x00},
|
||||
{0x43, 0x11},
|
||||
{0x16, 0x10},
|
||||
{0x39, 0x92},
|
||||
{0x35, 0xda},
|
||||
{0x22, 0x1a},
|
||||
{0x37, 0xc3},
|
||||
{0x36, 0x1a},
|
||||
{0x4c, 0x00},
|
||||
{0x5B, 0x00},
|
||||
{0x42, 0x03},
|
||||
{0x4a, 0x81},
|
||||
{0x21, 0x99},
|
||||
{0x5c, 0x00},
|
||||
{0x63, 0x00},
|
||||
{0x7c, 0x05},
|
||||
{0x6c, 0x00},
|
||||
{0x6d, 0x80},
|
||||
{0x6e, 0x00},
|
||||
{0x70, 0x02},
|
||||
{0x71, 0x94},
|
||||
{0x73, 0xc1},
|
||||
{0x20, 0x80},
|
||||
{0x28, 0x30},
|
||||
{0x37, 0xc0},
|
||||
{0x3d, 0x38},
|
||||
{0x6d, 0x00},
|
||||
{0x23, 0x00},
|
||||
{0x06, 0x88},
|
||||
{0x07, 0xc0},
|
||||
{0x0d, 0x87},
|
||||
{0x0e, 0x41},
|
||||
|
||||
// 该寄存器用于控制OV2640的系统时钟是否倍频或者分频
|
||||
// Bit[7]： 设置为1时,开启PLL倍频,系统时钟 = 2倍的 XVCLK
|
||||
// Bit[5:0]：分频系数, 系统时钟 = XVCLK / (Bit[5:0] + 1)
|
||||
// 我们的模块使用的 XVCLK 是24M,是OV2640默认的时钟,因此不用调整,系统时钟 = XVCLK =24M
|
||||
{0x11, 0x00}, // CLKRC,时钟分频控制
|
||||
|
||||
{0x09, 0x02}, // COM2,公共控制,输出驱动能力选择
|
||||
{0x04, 0x28}, // REG04,寄存器组4,可设置摄像头扫描方向等
|
||||
{0x12, 0x40}, // COM7,公共控制,系统复位、摄像头分辨率选择、缩放模式、颜色彩条设置
|
||||
{0x14, 0x48}, // COM9,公共控制,增益设置
|
||||
{0x15, 0x00}, // COM10,公共控制,PCLK、HS、VS输出极性控制
|
||||
{0x32, 0x09}, // REG32,寄存器组32,像素时钟分频以及水平起始、终止像素的（低3位）
|
||||
{0x03, 0x8a}, // COM1,公共控制,无效帧设置、垂直窗口起始、结束行（低2位）
|
||||
{0x46, 0x00}, // FLL,帧率长度调整,通过插入空行来降低帧率,也可以通过 0x2a/0x2b/0x47等寄存器去调整
|
||||
{0x24, 0x40}, // AEW,环境平均亮度大于AEW(7:0)时,AEC/AGC值将降低
|
||||
{0x25, 0x38}, // AEB,环境平均亮度小于AEB(7:0)时,AEC/AGC值将增加
|
||||
{0x26, 0x82}, // VV,快速模式步进阈值
|
||||
{0x34, 0xc0}, // ARCOM2,缩放窗口水平起始像素
|
||||
{0x61, 0x70}, // HISTO_LOW ,低等级直方图算法
|
||||
{0x62, 0x80}, // HISTO_HIGH,高等级直方图算法
|
||||
|
||||
{0x17, 0x11}, // HREFST,水平窗口起始像素（高8位）,默认值0x11
|
||||
{0x18, 0x43}, // HREFEND,水平窗口终止像素（高8位）,UXGA默认值 0x75, SVGA和CIF默认值0x43
|
||||
// VSTRT,垂直窗口起始行（高8位）,数据手册建议的配置是：UXGA为 0x01, SVGA和CIF模式为 0x00
|
||||
// 在OpenMV的配置中,不管什么模式都建议配置成 0x01,代码的解释是解决垃圾像素的问题。
|
||||
// 在笔者实际的测试中,如果配置成0x00,发现在图像垂直翻转的时候会有一行显示不对,应该就是openMV所说的垃圾像素
|
||||
// 因此这里也直接配置成 0x01,问题解决
|
||||
{0x19, 0x01}, // VSTRT,垂直窗口起始行（高8位）
|
||||
{0x1a, 0x97}, // VEND, 垂直窗口结束行（高8位）,默认值 0x97
|
||||
|
||||
// 以下5个寄存器，共同决定了光带滤除的效果（室内照明灯具开关频率是50HZ，对于传感器而言，会捕捉到明暗交错的光带）
|
||||
// 用户可以结合手册，根据实际场景去配置，以达到最佳的光带滤除效果
|
||||
{0x13, 0xe5}, // COM8,公共控制,曝光、自动增益、滤波设置
|
||||
{0x0c, 0x3a}, // COM3,公共控制,自动或手动设置带宽、快照和视频输出配置
|
||||
{0x4f, 0xbb}, // BD50,50Hz带宽 AEC低8位
|
||||
{0x50, 0x9c}, // BD60,60HZ带宽 AEC低8位
|
||||
{0x5a, 0x23}, // 手册没有说明该寄存器的作用，参考手册进行配置
|
||||
|
||||
{0xff, 0x00}, // 设置DSP寄存器租
|
||||
|
||||
// 手册里没有说明这些寄存器的作用,这里直接保留官方给的设置参数 FanKe
|
||||
{0xe5, 0x7f},
|
||||
{0x41, 0x24},
|
||||
{0x76, 0xff},
|
||||
{0x33, 0xa0},
|
||||
{0x42, 0x20},
|
||||
{0x43, 0x18},
|
||||
{0x4c, 0x00},
|
||||
{0xd7, 0x03},
|
||||
{0xd9, 0x10},
|
||||
{0x88, 0x3f},
|
||||
{0xc8, 0x08},
|
||||
{0xc9, 0x80},
|
||||
{0x7c, 0x00},
|
||||
{0x7d, 0x00},
|
||||
{0x7c, 0x03},
|
||||
{0x7d, 0x48},
|
||||
{0x7d, 0x48},
|
||||
{0x7c, 0x08},
|
||||
{0x7d, 0x20},
|
||||
{0x7d, 0x10},
|
||||
{0x7d, 0x0e},
|
||||
{0x90, 0x00},
|
||||
{0x91, 0x0e},
|
||||
{0x91, 0x1a},
|
||||
{0x91, 0x31},
|
||||
{0x91, 0x5a},
|
||||
{0x91, 0x69},
|
||||
{0x91, 0x75},
|
||||
{0x91, 0x7e},
|
||||
{0x91, 0x88},
|
||||
{0x91, 0x8f},
|
||||
{0x91, 0x96},
|
||||
{0x91, 0xa3},
|
||||
{0x91, 0xaf},
|
||||
{0x91, 0xc4},
|
||||
{0x91, 0xd7},
|
||||
{0x91, 0xe8},
|
||||
{0x91, 0x20},
|
||||
{0x92, 0x00},
|
||||
{0x93, 0x06},
|
||||
{0x93, 0xe3},
|
||||
{0x93, 0x05},
|
||||
{0x93, 0x05},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x04},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x96, 0x00},
|
||||
{0x97, 0x08},
|
||||
{0x97, 0x19},
|
||||
{0x97, 0x02},
|
||||
{0x97, 0x0c},
|
||||
{0x97, 0x24},
|
||||
{0x97, 0x30},
|
||||
{0x97, 0x28},
|
||||
{0x97, 0x26},
|
||||
{0x97, 0x02},
|
||||
{0x97, 0x98},
|
||||
{0x97, 0x80},
|
||||
{0x97, 0x00},
|
||||
{0x97, 0x00},
|
||||
{0xa4, 0x00},
|
||||
{0xa8, 0x00},
|
||||
{0xc5, 0x11},
|
||||
{0xc6, 0x51},
|
||||
{0xbf, 0x80},
|
||||
{0xc7, 0x10},
|
||||
{0xb6, 0x66},
|
||||
{0xb8, 0xA5},
|
||||
{0xb7, 0x64},
|
||||
{0xb9, 0x7C},
|
||||
{0xb3, 0xaf},
|
||||
{0xb4, 0x97},
|
||||
{0xb5, 0xFF},
|
||||
{0xb0, 0xC5},
|
||||
{0xb1, 0x94},
|
||||
{0xb2, 0x0f},
|
||||
{0xc4, 0x5c},
|
||||
{0x7f, 0x00},
|
||||
|
||||
{0xf9, 0xc0}, // MC_BIST,控制器复位、ROM选择
|
||||
{0xe0, 0x14}, // RESET,可选择复位 控制器、SCCB单元、JPEG单元、DVP接口单元等
|
||||
{0x87, 0xd0}, // CTRL3,使能芯片内部的指定的模块
|
||||
{0xc3, 0xed}, // CTRL1,使能芯片内部的指定的模块
|
||||
{0xc2, 0x0e}, // CTRL0,使能YUV422、YUV_EN、RGB_EN
|
||||
{0x86, 0x3d}, // CTRL2,使能芯片内部的指定的模块
|
||||
{0xda, 0x09}, // 图像输出模式,可设置JPEG输出、RGB565等,可设置是否翻转DVP接口的输出
|
||||
|
||||
// 此处设置的是传感器的图像尺寸,与配置的模式有关,例如SVGA需要设置成800*480,XVGA要设置成1600*1200
|
||||
{0xc0, 0x64}, // 图像的水平尺寸,10~3 bit
|
||||
{0xc1, 0x4b}, // 图像的垂直尺寸,10~3 bit
|
||||
{0x8c, 0x00}, // 图像水平尺寸的第 11 bit以及2~0bit,图像垂直尺寸的 2~0bit
|
||||
|
||||
{0x50, 0x00}, // CTRLI,设置 水平和垂直分频器
|
||||
{0x51, 0xc8}, // 水平尺寸,7~0 bit,必须要能被4整除
|
||||
{0x52, 0x96}, // 垂直尺寸,7~0 bit,必须要能被4整除
|
||||
{0x53, 0x00}, // 水平偏移,7~0 bit,
|
||||
{0x54, 0x00}, // 垂直偏移,7~0 bit,
|
||||
{0x55, 0x00}, // 水平、垂直尺寸的第 8 bit, 水平、垂直偏移的 第 10~8 bit
|
||||
{0x57, 0x00}, // 水平尺寸的第 9 bit
|
||||
|
||||
// 0xd3 寄存器用于设置像素驱动时钟,即 PCLK 的输出频率，有自动模式和手动模式
|
||||
// 在自动模式下，PCLK的频率会非常高，适用于高分辨率或者有高速缓存的场合，用户可根据实际工况选择最合适的模式
|
||||
//
|
||||
// Bit[7]： 设置为1时,开启自动模式,此时 PCLK 由OV2640自动控制,该模式下的PCLK频率非常高，
|
||||
// 适用于高分辨率或者有高速缓存的场合
|
||||
//
|
||||
// Bit[6:0]：手动设置分频系数,当设置成YUV模式或RGB565模式时, PCLK = sysclk / Bit[6:0] ,
|
||||
// 当 时钟控制寄存器 0x11（CLKRC）设置为 不分频 且外部输入时钟为24M时，
|
||||
// 在SVGA模式下， PCLK = 2*24M / Bit[6:0]
|
||||
// fanke
|
||||
// 如果要手动配置,用户需要根据实际输出的图像尺寸去计算具体的 PCLK ,这里以 480*360 分辨率为例：
|
||||
// 一帧 RGB565（16位色） 图像的数据量为：480*360*2 = 345.6 KB ,
|
||||
// OV2640在 SVGA模式下,帧率为30左右,则每秒的数据量在 345.6 * 30 = 10.4 MB 左右,
|
||||
// 因为模块是8位的接口,则PCLK最少要设置为 10.4 MHz,才能满足图像传输的需求,不然会导致花屏 ,
|
||||
// 加上OV2640的帧率是可以微调的,因此实际的 PCLK 要稍微大些,此处设置为 12M，
|
||||
// 即 PCLK = 48M / Bit[6:0] = 48 / 0x04 = 12M
|
||||
{0xd3, 0x04}, // R_DVP_SP, 设置 PCLK 引脚的时钟
|
||||
|
||||
// 手册里没有说明这些寄存器的作用,这里直接保留官方给的设置参数
|
||||
{0xe5, 0x1f},
|
||||
{0xe1, 0x67},
|
||||
{0xdd, 0x7f},
|
||||
|
||||
{0xe0, 0x00}, // RESET,可选择复位 控制器、SCCB单元、JPEG单元、DVP接口单元等
|
||||
{0x05, 0x00}, // 使能DSP
|
||||
|
||||
// 以下为OpenMV增加的设置,0x0f寄存器在数据手册里没有说明,但是在编程手册4.2小节有提到,
|
||||
// 按照编程手册给的代码, 0x0f这个寄存器是自动控制帧率用的,但是手册里只有在夜晚模式时才进行配置
|
||||
// {0xff, 0x01}, // 设置 sensor 寄存器组
|
||||
// {0x0f, 0x4b},
|
||||
// fanke
|
||||
|
||||
{0, 0}, // 结束
|
||||
};
|
||||
|
||||
/* UXGA 分辨率为1600*1200，最高支持15帧 */
|
||||
const rt_uint8_t OV2640_UXGA_Config[][2] =
|
||||
{
|
||||
{0xff, 0x01}, // 设置 sensor 寄存器组
|
||||
{0x12, 0x80}, // 复位全部寄存
|
||||
|
||||
{0xff, 0x00}, // 设置DSP寄存器租
|
||||
{0x2c, 0xff}, // 手册里没有说明该寄存器的功能,但是给出的参考代码又配置了该寄存器,因此保留
|
||||
{0x2e, 0xdf},
|
||||
|
||||
{0xff, 0x01}, // 设置 sensor 寄存器组
|
||||
|
||||
// 手册里没有说明这些寄存器的作用,这里直接保留官方给的设置参数
|
||||
{0x3c, 0x32},
|
||||
{0x2c, 0x0c},
|
||||
{0x33, 0x78},
|
||||
{0x3a, 0x33},
|
||||
{0x3b, 0xfB},
|
||||
{0x3e, 0x00},
|
||||
{0x43, 0x11},
|
||||
{0x39, 0x82},
|
||||
{0x35, 0x88},
|
||||
{0x22, 0x0a},
|
||||
{0x37, 0x40},
|
||||
{0x23, 0x00},
|
||||
{0x36, 0x1a},
|
||||
{0x06, 0x02},
|
||||
{0x07, 0xc0},
|
||||
{0x0d, 0xb7},
|
||||
{0x0e, 0x01},
|
||||
{0x42, 0x83},
|
||||
{0x4c, 0x00},
|
||||
{0x5B, 0x00},
|
||||
{0x4a, 0x81},
|
||||
{0x21, 0x99},
|
||||
{0x5c, 0x00},
|
||||
{0x63, 0x00},
|
||||
{0x7c, 0x05},
|
||||
{0x20, 0x80},
|
||||
{0x28, 0x30},
|
||||
{0x6c, 0x00},
|
||||
{0x6d, 0x80},
|
||||
{0x6e, 0x00},
|
||||
{0x70, 0x02},
|
||||
{0x71, 0x94},
|
||||
{0x73, 0xc1},
|
||||
{0x3d, 0x34},
|
||||
{0x16, 0x10},
|
||||
|
||||
// 该寄存器用于控制OV2640的系统时钟是否倍频或者分频
|
||||
// Bit[7]： 设置为1时,开启PLL倍频,系统时钟 = 2倍的 XVCLK
|
||||
// Bit[5:0]：分频系数, 系统时钟 = XVCLK / (Bit[5:0] + 1)
|
||||
// 我们的模块使用的 XVCLK 是24M,是OV2640默认的时钟,因此不用调整,系统时钟 = XVCLK =24M
|
||||
{0x11, 0x00}, // CLKRC,时钟分频控制
|
||||
|
||||
{0x09, 0x02}, // COM2,公共控制,输出驱动能力选择
|
||||
{0x04, 0x28}, // REG04,寄存器组4,可设置摄像头扫描方向等
|
||||
{0x12, 0x00}, // COM7,公共控制,系统复位、摄像头分辨率选择、缩放模式、颜色彩条设置
|
||||
{0x14, 0x48}, // COM9,公共控制,增益设置
|
||||
{0x15, 0x00}, // COM10,公共控制,PCLK、HS、VS输出极性控制
|
||||
{0x32, 0x36}, // REG32,寄存器组32,像素时钟分频以及水平起始、终止像素的（低3位）
|
||||
{0x03, 0x8F}, // COM1,公共控制,无效帧设置、垂直窗口起始、结束行（低2位）
|
||||
{0x46, 0x00}, // FLL,帧率长度调整,通过插入空行来降低帧率,也可以通过 0x2a/0x2b/0x47等寄存器去调整
|
||||
{0x24, 0x40}, // AEW,环境平均亮度大于AEW(7:0)时,AEC/AGC值将降低
|
||||
{0x25, 0x38}, // AEB,环境平均亮度小于AEB(7:0)时,AEC/AGC值将增加
|
||||
{0x26, 0x82}, // VV,快速模式步进阈值
|
||||
{0x34, 0xa0}, // ARCOM2,缩放窗口水平起始像素
|
||||
{0x61, 0x70}, // HISTO_LOW ,低等级直方图算法
|
||||
{0x62, 0x80}, // HISTO_HIGH,高等级直方图算法
|
||||
|
||||
{0x17, 0x11}, // HREFST,水平窗口起始像素（高8位）,默认值0x11
|
||||
{0x18, 0x75}, // HREFEND,水平窗口终止像素（高8位）,UXGA默认值 0x75, SVGA和CIF默认值0x43
|
||||
// VSTRT,垂直窗口起始行（高8位）,数据手册建议的配置是：UXGA为 0x01, SVGA和CIF模式为 0x00
|
||||
{0x19, 0x01}, // VSTRT,垂直窗口起始行（高8位）
|
||||
{0x1a, 0x97}, // VEND, 垂直窗口结束行（高8位）,默认值 0x97
|
||||
|
||||
// 以下5个寄存器，共同决定了光带滤除的效果（室内照明灯具开关频率是50HZ，对于传感器而言，会捕捉到明暗交错的光带）
|
||||
// 用户可以结合手册，根据实际场景去配置，以达到最佳的光带滤除效果
|
||||
{0x13, 0xe5}, // COM8,公共控制,曝光、自动增益、滤波设置
|
||||
{0x0c, 0x3c}, // COM3,公共控制,自动或手动设置带宽、快照和视频输出配置
|
||||
{0x4f, 0xa8}, // BD50,50Hz带宽 AEC低8位
|
||||
{0x50, 0x8C}, // BD60,60HZ带宽 AEC低8位
|
||||
{0x5a, 0x78}, // 手册没有说明该寄存器的作用，参考手册进行配置
|
||||
|
||||
{0xff, 0x00}, // 设置DSP寄存器租
|
||||
|
||||
// 手册里没有说明这些寄存器的作用,这里直接保留官方给的设置参数 Fanke
|
||||
{0xe5, 0x7f},
|
||||
{0x41, 0x24},
|
||||
{0x76, 0xff},
|
||||
{0x33, 0xa0},
|
||||
{0x42, 0x20},
|
||||
{0x43, 0x18},
|
||||
{0x4c, 0x00},
|
||||
{0xc8, 0x08},
|
||||
{0xc9, 0x80},
|
||||
{0x7c, 0x00},
|
||||
{0x7d, 0x00},
|
||||
{0x7c, 0x03},
|
||||
{0x7d, 0x48},
|
||||
{0x7d, 0x48},
|
||||
{0x7c, 0x08},
|
||||
{0x7d, 0x20},
|
||||
{0x7d, 0x10},
|
||||
{0x7d, 0x0e},
|
||||
{0x90, 0x00},
|
||||
{0x91, 0x0e},
|
||||
{0x91, 0x1a},
|
||||
{0x91, 0x31},
|
||||
{0x91, 0x5a},
|
||||
{0x91, 0x69},
|
||||
{0x91, 0x75},
|
||||
{0x91, 0x7e},
|
||||
{0x91, 0x88},
|
||||
{0x91, 0x8f},
|
||||
{0x91, 0x96},
|
||||
{0x91, 0xa3},
|
||||
{0x91, 0xaf},
|
||||
{0x91, 0xc4},
|
||||
{0x91, 0xd7},
|
||||
{0x91, 0xe8},
|
||||
{0x91, 0x20},
|
||||
{0x92, 0x00},
|
||||
{0x93, 0x06},
|
||||
{0x93, 0xe3},
|
||||
{0x93, 0x05},
|
||||
{0x93, 0x05},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x04},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x96, 0x00},
|
||||
{0x97, 0x08},
|
||||
{0x97, 0x19},
|
||||
{0x97, 0x02},
|
||||
{0x97, 0x0c},
|
||||
{0x97, 0x24},
|
||||
{0x97, 0x30},
|
||||
{0x97, 0x28},
|
||||
{0x97, 0x26},
|
||||
{0x97, 0x02},
|
||||
{0x97, 0x98},
|
||||
{0x97, 0x80},
|
||||
{0x97, 0x00},
|
||||
{0x97, 0x00},
|
||||
{0x88, 0x3f},
|
||||
{0xc4, 0x9a},
|
||||
{0xa4, 0x00},
|
||||
{0xa8, 0x00},
|
||||
{0xc5, 0x11},
|
||||
{0xc6, 0x51},
|
||||
{0xbf, 0x80},
|
||||
{0xc7, 0x10},
|
||||
{0xb6, 0x66},
|
||||
{0xb8, 0xA5},
|
||||
{0xb7, 0x64},
|
||||
{0xb9, 0x7C},
|
||||
{0xb3, 0xaf},
|
||||
{0xb4, 0x97},
|
||||
{0xb5, 0xFF},
|
||||
{0xb0, 0xC5},
|
||||
{0xb1, 0x94},
|
||||
{0xb2, 0x0f},
|
||||
{0xc4, 0x5c},
|
||||
{0x7f, 0x00},
|
||||
{0xd7, 0x03},
|
||||
{0xd9, 0x10},
|
||||
|
||||
{0xf9, 0xc0}, // MC_BIST,控制器复位、ROM选择
|
||||
{0xe0, 0x14}, // RESET,可选择复位 控制器、SCCB单元、JPEG单元、DVP接口单元等
|
||||
{0x87, 0xd0}, // CTRL3,使能芯片内部的指定的模块
|
||||
{0xc3, 0xed}, // CTRL1,使能芯片内部的指定的模块
|
||||
{0xc2, 0x0e}, // CTRL0,使能YUV422、YUV_EN、RGB_EN
|
||||
{0x86, 0x3d}, // CTRL2,使能芯片内部的指定的模块
|
||||
{0xda, 0x09}, // 图像输出模式,可设置JPEG输出、RGB565等,可设置是否翻转DVP接口的输出
|
||||
|
||||
// 此处设置的是传感器的图像尺寸,与配置的模式有关,例如SVGA需要设置成800*480,XVGA要设置成1600*1200
|
||||
{0xc0, 0xc8}, // 图像的水平尺寸,10~3 bit
|
||||
{0xc1, 0x96}, // 图像的垂直尺寸,10~3 bit
|
||||
{0x8c, 0x00}, // 图像水平尺寸的第 11 bit以及2~0bit,图像垂直尺寸的 2~0bit
|
||||
|
||||
{0x50, 0x00}, // CTRLI,设置 水平和垂直分频器
|
||||
{0x51, 0x90}, // 水平尺寸,7~0 bit,必须要能被4整除
|
||||
{0x52, 0x2c}, // 垂直尺寸,7~0 bit,必须要能被4整除
|
||||
{0x53, 0x00}, // 水平偏移,7~0 bit,
|
||||
{0x54, 0x00}, // 垂直偏移,7~0 bit,
|
||||
{0x55, 0x88}, // 水平、垂直尺寸的第 8 bit, 水平、垂直偏移的 第 10~8 bit
|
||||
{0x57, 0x00}, // 水平尺寸的第 9 bit
|
||||
|
||||
// 0xd3 寄存器用于设置像素驱动时钟,即 PCLK 的输出频率，有自动模式和手动模式
|
||||
// 在自动模式下，PCLK的频率会非常高，适用于高分辨率或者有高速缓存的场合，用户可根据实际工况选择最合适的模式
|
||||
//
|
||||
// Bit[7]： 设置为1时,开启自动模式,此时 PCLK 由OV2640自动控制,该模式下的PCLK频率非常高，
|
||||
// 适用于高分辨率或者有高速缓存的场合
|
||||
//
|
||||
// Bit[6:0]：手动设置分频系数,当设置成YUV模式或RGB565模式时, PCLK = sysclk / Bit[6:0] ,
|
||||
// 当 时钟控制寄存器 0x11（CLKRC）设置为 不分频 且外部输入时钟为24M时，
|
||||
// 在 UXGA模式下， PCLK = 3*24M / Bit[6:0]
|
||||
//
|
||||
// 如果要手动配置,用户需要根据实际输出的图像尺寸去计算具体的 PCLK ,这里以 480*360 分辨率为例：
|
||||
// 一帧 RGB565（16位色） 图像的数据量为：480*360*2 = 345.6 KB ,
|
||||
// OV2640在 SVGA模式下,帧率为30左右,则每秒的数据量在 345.6 * 15 = 5.2 MB 左右,
|
||||
// 因为模块是8位的接口,则PCLK最少要设置为 5.2 MHz,才能满足图像传输的需求,不然会导致花屏 ,
|
||||
// 加上OV2640的帧率是可以微调的,因此实际的 PCLK 要稍微大些,此处设置为 7.2M，
|
||||
// 即 PCLK = 72M / Bit[6:0] = 72 / 0x0a = 7.2M
|
||||
{0xd3, 0x0a}, // R_DVP_SP, 设置 PCLK 引脚的时钟
|
||||
|
||||
// 手册里没有说明这些寄存器的作用,这里直接保留官方给的设置参数
|
||||
{0xe5, 0x1f},
|
||||
{0xe1, 0x67},
|
||||
{0xdd, 0x7f},
|
||||
|
||||
{0xe0, 0x00}, // RESET,可选择复位 控制器、SCCB单元、JPEG单元、DVP接口单元等
|
||||
{0x05, 0x00}, // 使能DSP
|
||||
|
||||
{0, 0}, // 结束
|
||||
};
|
||||
|
||||
#endif //__DRV_OV2640_CFG_H
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
/*
|
||||
* File : fal_cfg.h
|
||||
* This file is part of FAL (Flash Abstraction Layer) package
|
||||
* COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-05-17 armink the first version
|
||||
*/
|
||||
|
||||
#ifndef _FAL_CFG_H_
|
||||
#define _FAL_CFG_H_
|
||||
|
||||
#ifdef RT_USING_FAL
|
||||
|
||||
#include <rtconfig.h>
|
||||
#include <board.h>
|
||||
|
||||
#define FLASH_SIZE_GRANULARITY_128K (16 * 128 * 1024)
|
||||
|
||||
/* ===================== Flash device Configuration ========================= */
|
||||
extern const struct fal_flash_dev stm32_onchip_flash_128k;
|
||||
extern struct fal_flash_dev nor_flash0;
|
||||
extern struct fal_flash_dev nor_flash1;
|
||||
|
||||
/* flash device table */
|
||||
#define FAL_FLASH_DEV_TABLE \
|
||||
{ \
|
||||
&stm32_onchip_flash_128k, \
|
||||
&nor_flash0, \
|
||||
&nor_flash1, \
|
||||
}
|
||||
/* ====================== Partition Configuration ========================== */
|
||||
#ifdef FAL_PART_HAS_TABLE_CFG
|
||||
/* partition table */
|
||||
#define FAL_PART_TABLE \
|
||||
{ \
|
||||
{FAL_PART_MAGIC_WORD, "bootloader", "onchip_flash_128k", 0, 128*1024, 0}, \
|
||||
{FAL_PART_MAGIC_WORD, "filesystem", FAL_USING_NOR_FLASH_DEV_NAME, 0, 8*1024*1024, 0}, \
|
||||
{FAL_PART_MAGIC_WORD, "fs_qspi", "W25Q64_q", 0, 8*1024*1024, 0}, \
|
||||
}
|
||||
#endif /* FAL_PART_HAS_TABLE_CFG */
|
||||
|
||||
#endif /* RT_USING_FAL */
|
||||
|
||||
#endif /* _FAL_CFG_H_ */
|
||||
|
|
@ -0,0 +1,621 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-24 spaceman the first version
|
||||
*/
|
||||
|
||||
#include <board.h>
|
||||
|
||||
#ifdef BSP_USING_LCD_SPI
|
||||
#include <drv_spi.h>
|
||||
#include <drv_lcd_spi.h>
|
||||
#include <drv_lcd_spi_ext.h>
|
||||
#include <lcd_port.h>
|
||||
#include <string.h>
|
||||
|
||||
#define DRV_DEBUG
|
||||
#define LOG_TAG "drv.lcd"
|
||||
#include <drv_log.h>
|
||||
|
||||
#define ABS(X) ((X) > 0 ? (X) : -(X))
|
||||
|
||||
static struct drv_lcd_device _lcd;
|
||||
static rt_uint8_t lcd_bn = 0;
|
||||
|
||||
// 因为这类SPI的屏幕，每次更新显示时，需要先配置坐标区域、再写显存，
|
||||
// 在显示字符时，如果是一个个点去写坐标写显存，会非常慢，
|
||||
// 因此开辟一片缓冲区，先将需要显示的数据写进缓冲区，最后再批量写入显存。
|
||||
// 用户可以根据实际情况去修改此处缓冲区的大小，
|
||||
// 例如，用户需要显示32*32的汉字时，需要的大小为 32*32*2 = 2048 字节（每个像素点占2字节）
|
||||
static uint16_t LCD_Buff[1024]; // LCD缓冲区，16位宽（每个像素点占2字节）
|
||||
|
||||
static void set_lcd_backlight(rt_uint8_t value)
|
||||
{
|
||||
if (value)
|
||||
rt_pin_write(LCD_BACKLIGHT_PIN, PIN_HIGH);
|
||||
else
|
||||
rt_pin_write(LCD_BACKLIGHT_PIN, PIN_LOW);
|
||||
lcd_bn = value;
|
||||
}
|
||||
|
||||
static rt_uint8_t get_lcd_backlight(void)
|
||||
{
|
||||
return lcd_bn;
|
||||
}
|
||||
|
||||
static void lcd_writecommand(uint8_t lcd_command)
|
||||
{
|
||||
rt_pin_write(LCD_CMD_DATA_PIN, PIN_LOW); // cmd
|
||||
rt_spi_send((struct rt_spi_device *)_lcd.lcd_spi_dev, &lcd_command, 1);
|
||||
}
|
||||
|
||||
static void lcd_writedata_8bit(uint8_t lcd_data)
|
||||
{
|
||||
rt_pin_write(LCD_CMD_DATA_PIN, PIN_HIGH); // data
|
||||
rt_spi_send((struct rt_spi_device *)_lcd.lcd_spi_dev, &lcd_data, 1);
|
||||
}
|
||||
|
||||
static void lcd_writedata_16bit(uint16_t lcd_data)
|
||||
{
|
||||
uint8_t lcd_data_buff[2]; // 数据发送区
|
||||
lcd_data_buff[0] = lcd_data >> 8; // 将数据拆分
|
||||
lcd_data_buff[1] = lcd_data;
|
||||
|
||||
rt_pin_write(LCD_CMD_DATA_PIN, PIN_HIGH); // data
|
||||
rt_spi_send((struct rt_spi_device *)_lcd.lcd_spi_dev, lcd_data_buff, 2);
|
||||
}
|
||||
|
||||
void lcd_writebuff(uint16_t *databuff, uint16_t datasize)
|
||||
{
|
||||
struct stm32_spi *spi_drv = rt_container_of(((struct rt_spi_device *)_lcd.lcd_spi_dev)->bus, struct stm32_spi, spi_bus);
|
||||
SPI_HandleTypeDef *spi_handle = &spi_drv->handle;
|
||||
|
||||
rt_pin_write(LCD_CMD_DATA_PIN, PIN_HIGH); // data
|
||||
|
||||
// Additional setting (FifoThreshold) are required here, so we do not use rt_spi_configure
|
||||
spi_handle->Init.DataSize = SPI_DATASIZE_16BIT;
|
||||
spi_handle->Init.FifoThreshold = SPI_FIFO_THRESHOLD_02DATA;
|
||||
HAL_SPI_Init(spi_handle);
|
||||
|
||||
rt_spi_send((struct rt_spi_device *)_lcd.lcd_spi_dev, databuff, datasize);
|
||||
|
||||
spi_handle->Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
spi_handle->Init.FifoThreshold = SPI_FIFO_THRESHOLD_08DATA;
|
||||
HAL_SPI_Init(spi_handle);
|
||||
}
|
||||
|
||||
void lcd_setaddress(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2)
|
||||
{
|
||||
lcd_writecommand(0x2a); // 列地址设置，即X坐标
|
||||
lcd_writedata_16bit(x1);
|
||||
lcd_writedata_16bit(x2);
|
||||
|
||||
lcd_writecommand(0x2b); // 行地址设置，即Y坐标
|
||||
lcd_writedata_16bit(y1);
|
||||
lcd_writedata_16bit(y2);
|
||||
|
||||
lcd_writecommand(0x2c); // 开始写入显存，即要显示的颜色数据
|
||||
}
|
||||
|
||||
void lcd_clear(uint32_t color)
|
||||
{
|
||||
rt_err_t res;
|
||||
struct stm32_spi *spi_drv = rt_container_of(((struct rt_spi_device *)_lcd.lcd_spi_dev)->bus, struct stm32_spi, spi_bus);
|
||||
SPI_HandleTypeDef *spi_handle = &spi_drv->handle;
|
||||
|
||||
lcd_setaddress(0, 0, LCD_WIDTH - 1, LCD_HEIGHT - 1); // 设置坐标
|
||||
|
||||
rt_pin_write(LCD_CMD_DATA_PIN, PIN_HIGH); // data
|
||||
|
||||
// Additional setting (FifoThreshold) are required here, so we do not use rt_spi_configure
|
||||
spi_handle->Init.DataSize = SPI_DATASIZE_16BIT;
|
||||
spi_handle->Init.FifoThreshold = SPI_FIFO_THRESHOLD_02DATA;
|
||||
HAL_SPI_Init(spi_handle);
|
||||
|
||||
rt_pin_write(LCD_SPI_DEV_CS_PIN, PIN_LOW); // cs
|
||||
res = SPI_Transmit_Ext((uint16_t)color, LCD_WIDTH * LCD_HEIGHT);
|
||||
rt_pin_write(LCD_SPI_DEV_CS_PIN, PIN_HIGH); // cs
|
||||
if(res != RT_EOK)
|
||||
LOG_E("SPI_Transmit_Ext error: %d", res);
|
||||
|
||||
spi_handle->Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
spi_handle->Init.FifoThreshold = SPI_FIFO_THRESHOLD_08DATA;
|
||||
HAL_SPI_Init(spi_handle);
|
||||
}
|
||||
|
||||
void lcd_clearrect(uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint32_t color)
|
||||
{
|
||||
rt_err_t res;
|
||||
struct stm32_spi *spi_drv = rt_container_of(((struct rt_spi_device *)_lcd.lcd_spi_dev)->bus, struct stm32_spi, spi_bus);
|
||||
SPI_HandleTypeDef *spi_handle = &spi_drv->handle;
|
||||
|
||||
lcd_setaddress(x, y, x + width - 1, y + height - 1); // 设置坐标
|
||||
|
||||
rt_pin_write(LCD_CMD_DATA_PIN, PIN_HIGH); // data
|
||||
|
||||
// Additional setting (FifoThreshold) are required here, so we do not use rt_spi_configure
|
||||
spi_handle->Init.DataSize = SPI_DATASIZE_16BIT;
|
||||
spi_handle->Init.FifoThreshold = SPI_FIFO_THRESHOLD_02DATA;
|
||||
HAL_SPI_Init(spi_handle);
|
||||
|
||||
rt_pin_write(LCD_SPI_DEV_CS_PIN, PIN_LOW); // cs
|
||||
res = SPI_Transmit_Ext((uint16_t)color, width * height);
|
||||
rt_pin_write(LCD_SPI_DEV_CS_PIN, PIN_HIGH); // cs
|
||||
if(res != RT_EOK)
|
||||
LOG_E("SPI_Transmit_Ext error: %d", res);
|
||||
|
||||
spi_handle->Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
spi_handle->Init.FifoThreshold = SPI_FIFO_THRESHOLD_08DATA;
|
||||
HAL_SPI_Init(spi_handle);
|
||||
}
|
||||
|
||||
void lcd_copybuffer(uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint16_t *databuff)
|
||||
{
|
||||
rt_err_t res;
|
||||
struct stm32_spi *spi_drv = rt_container_of(((struct rt_spi_device *)_lcd.lcd_spi_dev)->bus, struct stm32_spi, spi_bus);
|
||||
SPI_HandleTypeDef *spi_handle = &spi_drv->handle;
|
||||
|
||||
lcd_setaddress(x, y, x + width - 1, y + height - 1); // 设置坐标
|
||||
|
||||
rt_pin_write(LCD_CMD_DATA_PIN, PIN_HIGH); // data
|
||||
|
||||
// Additional setting (FifoThreshold) are required here, so we do not use rt_spi_configure
|
||||
spi_handle->Init.DataSize = SPI_DATASIZE_16BIT;
|
||||
spi_handle->Init.FifoThreshold = SPI_FIFO_THRESHOLD_02DATA;
|
||||
HAL_SPI_Init(spi_handle);
|
||||
|
||||
rt_pin_write(LCD_SPI_DEV_CS_PIN, PIN_LOW); // cs
|
||||
res = SPI_TransmitBuffer_Ext(databuff, width * height);
|
||||
rt_pin_write(LCD_SPI_DEV_CS_PIN, PIN_HIGH); // cs
|
||||
if(res != RT_EOK)
|
||||
LOG_E("SPI_TransmitBuffer_Ext error: %d", res);
|
||||
|
||||
spi_handle->Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
spi_handle->Init.FifoThreshold = SPI_FIFO_THRESHOLD_08DATA;
|
||||
HAL_SPI_Init(spi_handle);
|
||||
}
|
||||
|
||||
void lcd_drawpoint(uint16_t x, uint16_t y, uint32_t color)
|
||||
{
|
||||
lcd_setaddress(x, y, x, y); // 设置坐标
|
||||
lcd_writedata_16bit(color);
|
||||
}
|
||||
|
||||
void lcd_drawline(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint32_t color)
|
||||
{
|
||||
int16_t deltax = 0, deltay = 0, x = 0, y = 0, xinc1 = 0, xinc2 = 0,
|
||||
yinc1 = 0, yinc2 = 0, den = 0, num = 0, numadd = 0, numpixels = 0,
|
||||
curpixel = 0;
|
||||
|
||||
deltax = ABS(x2 - x1); /* The difference between the x's */
|
||||
deltay = ABS(y2 - y1); /* The difference between the y's */
|
||||
x = x1; /* Start x off at the first pixel */
|
||||
y = y1; /* Start y off at the first pixel */
|
||||
|
||||
if (x2 >= x1) /* The x-values are increasing */
|
||||
{
|
||||
xinc1 = 1;
|
||||
xinc2 = 1;
|
||||
} else /* The x-values are decreasing */
|
||||
{
|
||||
xinc1 = -1;
|
||||
xinc2 = -1;
|
||||
}
|
||||
|
||||
if (y2 >= y1) /* The y-values are increasing */
|
||||
{
|
||||
yinc1 = 1;
|
||||
yinc2 = 1;
|
||||
} else /* The y-values are decreasing */
|
||||
{
|
||||
yinc1 = -1;
|
||||
yinc2 = -1;
|
||||
}
|
||||
|
||||
if (deltax >= deltay) /* There is at least one x-value for every y-value */
|
||||
{
|
||||
xinc1 = 0; /* Don't change the x when numerator >= denominator */
|
||||
yinc2 = 0; /* Don't change the y for every iteration */
|
||||
den = deltax;
|
||||
num = deltax / 2;
|
||||
numadd = deltay;
|
||||
numpixels = deltax; /* There are more x-values than y-values */
|
||||
} else /* There is at least one y-value for every x-value */
|
||||
{
|
||||
xinc2 = 0; /* Don't change the x for every iteration */
|
||||
yinc1 = 0; /* Don't change the y when numerator >= denominator */
|
||||
den = deltay;
|
||||
num = deltay / 2;
|
||||
numadd = deltax;
|
||||
numpixels = deltay; /* There are more y-values than x-values */
|
||||
}
|
||||
for (curpixel = 0; curpixel <= numpixels; curpixel++) {
|
||||
lcd_drawpoint(x, y, color); /* Draw the current pixel */
|
||||
num += numadd; /* Increase the numerator by the top of the fraction */
|
||||
if (num >= den) /* Check if numerator >= denominator */
|
||||
{
|
||||
num -= den; /* Calculate the new numerator value */
|
||||
x += xinc1; /* Change the x as appropriate */
|
||||
y += yinc1; /* Change the y as appropriate */
|
||||
}
|
||||
x += xinc2; /* Change the x as appropriate */
|
||||
y += yinc2; /* Change the y as appropriate */
|
||||
}
|
||||
}
|
||||
|
||||
void lcd_drawline_v(uint16_t x, uint16_t y, uint16_t height, uint32_t color)
|
||||
{
|
||||
uint16_t i; // 计数变量
|
||||
for (i = 0; i < height; i++) {
|
||||
LCD_Buff[i] = color; // 写入缓冲区
|
||||
}
|
||||
lcd_setaddress(x, y, x, y + height - 1); // 设置坐标
|
||||
lcd_writebuff(LCD_Buff, height); // 写入显存
|
||||
}
|
||||
|
||||
void lcd_drawline_h(uint16_t x, uint16_t y, uint16_t width, uint32_t color)
|
||||
{
|
||||
uint16_t i; // 计数变量
|
||||
for (i = 0; i < width; i++) {
|
||||
LCD_Buff[i] = color; // 写入缓冲区
|
||||
}
|
||||
lcd_setaddress(x, y, x + width - 1, y); // 设置坐标
|
||||
lcd_writebuff(LCD_Buff, width); // 写入显存
|
||||
}
|
||||
|
||||
static rt_err_t stm32_lcd_init(struct drv_lcd_device *lcd)
|
||||
{
|
||||
rt_err_t result;
|
||||
struct rt_spi_configuration cfg;
|
||||
|
||||
result = rt_hw_spi_device_attach(LCD_SPI_BUS_NAME, LCD_SPI_DEV_NAME, LCD_SPI_DEV_CS_PIN);
|
||||
|
||||
lcd->lcd_spi_dev = rt_device_find(LCD_SPI_DEV_NAME);
|
||||
cfg.data_width = 8;
|
||||
cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_0 | RT_SPI_MSB | RT_SPI_3WIRE;
|
||||
cfg.max_hz = LCD_SPI_MAX_SPEED;
|
||||
rt_spi_configure((struct rt_spi_device *)lcd->lcd_spi_dev, &cfg);
|
||||
|
||||
rt_pin_mode(LCD_BACKLIGHT_PIN, PIN_MODE_OUTPUT);
|
||||
rt_pin_mode(LCD_CMD_DATA_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
// init lcd
|
||||
rt_thread_mdelay(10);
|
||||
lcd_writecommand(0x36); // 显存访问控制 指令，用于设置访问显存的方式
|
||||
lcd_writedata_8bit(0x00); // 配置成 从上到下、从左到右，RGB像素格式 垂直显示
|
||||
// lcd_writedata_8bit(0x70); // 横屏显示
|
||||
// lcd_writedata_8bit(0xA0); // 横屏显示，并上下翻转，RGB像素格式
|
||||
// lcd_writedata_8bit(0xC0); // 垂直显示，并上下翻转，RGB像素格式
|
||||
|
||||
lcd_writecommand(0x3A); // 接口像素格式 指令，用于设置使用 12位、16位还是18位色
|
||||
lcd_writedata_8bit(0x05); // 此处配置成 16位 像素格式
|
||||
|
||||
// 接下来很多都是电压设置指令，直接使用厂家给设定值
|
||||
lcd_writecommand(0xB2);
|
||||
lcd_writedata_8bit(0x0C);
|
||||
lcd_writedata_8bit(0x0C);
|
||||
lcd_writedata_8bit(0x00);
|
||||
lcd_writedata_8bit(0x33);
|
||||
lcd_writedata_8bit(0x33);
|
||||
|
||||
lcd_writecommand(0xB7); // 栅极电压设置指令
|
||||
lcd_writedata_8bit(0x35); // VGH = 13.26V，VGL = -10.43V
|
||||
|
||||
lcd_writecommand(0xBB); // 公共电压设置指令
|
||||
lcd_writedata_8bit(0x19); // VCOM = 1.35V
|
||||
|
||||
lcd_writecommand(0xC0);
|
||||
lcd_writedata_8bit(0x2C);
|
||||
|
||||
lcd_writecommand(0xC2); // VDV 和 VRH 来源设置
|
||||
lcd_writedata_8bit(0x01); // VDV 和 VRH 由用户自由配置
|
||||
|
||||
lcd_writecommand(0xC3); // VRH电压 设置指令
|
||||
lcd_writedata_8bit(0x12); // VRH电压 = 4.6+( vcom+vcom offset+vdv)
|
||||
|
||||
lcd_writecommand(0xC4); // VDV电压 设置指令
|
||||
lcd_writedata_8bit(0x20); // VDV电压 = 0v
|
||||
|
||||
lcd_writecommand(0xC6); // 正常模式的帧率控制指令
|
||||
lcd_writedata_8bit(0x0F); // 设置屏幕控制器的刷新帧率为60帧
|
||||
|
||||
lcd_writecommand(0xD0); // 电源控制指令
|
||||
lcd_writedata_8bit(0xA4); // 无效数据，固定写入0xA4
|
||||
lcd_writedata_8bit(0xA1); // AVDD = 6.8V ，AVDD = -4.8V ，VDS = 2.3V
|
||||
|
||||
lcd_writecommand(0xE0); // 正极电压伽马值设定
|
||||
lcd_writedata_8bit(0xD0);
|
||||
lcd_writedata_8bit(0x04);
|
||||
lcd_writedata_8bit(0x0D);
|
||||
lcd_writedata_8bit(0x11);
|
||||
lcd_writedata_8bit(0x13);
|
||||
lcd_writedata_8bit(0x2B);
|
||||
lcd_writedata_8bit(0x3F);
|
||||
lcd_writedata_8bit(0x54);
|
||||
lcd_writedata_8bit(0x4C);
|
||||
lcd_writedata_8bit(0x18);
|
||||
lcd_writedata_8bit(0x0D);
|
||||
lcd_writedata_8bit(0x0B);
|
||||
lcd_writedata_8bit(0x1F);
|
||||
lcd_writedata_8bit(0x23);
|
||||
|
||||
lcd_writecommand(0xE1); // 负极电压伽马值设定
|
||||
lcd_writedata_8bit(0xD0);
|
||||
lcd_writedata_8bit(0x04);
|
||||
lcd_writedata_8bit(0x0C);
|
||||
lcd_writedata_8bit(0x11);
|
||||
lcd_writedata_8bit(0x13);
|
||||
lcd_writedata_8bit(0x2C);
|
||||
lcd_writedata_8bit(0x3F);
|
||||
lcd_writedata_8bit(0x44);
|
||||
lcd_writedata_8bit(0x51);
|
||||
lcd_writedata_8bit(0x2F);
|
||||
lcd_writedata_8bit(0x1F);
|
||||
lcd_writedata_8bit(0x1F);
|
||||
lcd_writedata_8bit(0x20);
|
||||
lcd_writedata_8bit(0x23);
|
||||
|
||||
lcd_writecommand(0x21); // 打开反显，因为面板是常黑型，操作需要反过来
|
||||
|
||||
// 退出休眠指令，LCD控制器在刚上电、复位时，会自动进入休眠模式 ，因此操作屏幕之前，需要退出休眠
|
||||
lcd_writecommand(0x11); // 退出休眠 指令
|
||||
rt_thread_mdelay(120); // 需要等待120ms，让电源电压和时钟电路稳定下来
|
||||
|
||||
// 打开显示指令，LCD控制器在刚上电、复位时，会自动关闭显示
|
||||
lcd_writecommand(0x29); // 打开显示
|
||||
|
||||
// set spi handler to ensure SPI_Transmit_Ext/SPI_TransmitBuffer_Ext function can be used
|
||||
struct stm32_spi *spi_drv = rt_container_of(((struct rt_spi_device *)lcd->lcd_spi_dev)->bus, struct stm32_spi, spi_bus);
|
||||
SPI_HandleTypeDef *spi_handle = &spi_drv->handle;
|
||||
Set_SPI_Handle_Ext(spi_handle);
|
||||
|
||||
lcd_clear(0xFFFFFF); // 清屏
|
||||
|
||||
// 全部设置完毕之后，打开背光
|
||||
set_lcd_backlight(1);
|
||||
|
||||
LOG_D("lcd init ok");
|
||||
|
||||
// lcd_drawline_v(120, 0, LCD_HEIGHT, 0xffaaff);
|
||||
// lcd_drawline_h(0, 120, LCD_WIDTH, 0xffaaff);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static rt_err_t drv_lcd_init(struct rt_device *device)
|
||||
{
|
||||
struct drv_lcd_device *lcd = LCD_DEVICE(device);
|
||||
return stm32_lcd_init(lcd);
|
||||
}
|
||||
|
||||
static rt_err_t drv_lcd_control(struct rt_device *device, int cmd, void *args)
|
||||
{
|
||||
struct drv_lcd_device *lcd = LCD_DEVICE(device);
|
||||
|
||||
switch (cmd) {
|
||||
case RTGRAPHIC_CTRL_RECT_UPDATE: {
|
||||
lcd_setaddress(0, 0, lcd->lcd_info.width - 1, lcd->lcd_info.height - 1);
|
||||
lcd_writebuff((uint16_t*)lcd->lcd_info.framebuffer, LCD_BUF_SIZE / 2); // 16 bit write buffer
|
||||
} break;
|
||||
|
||||
case RTGRAPHIC_CTRL_GET_INFO: {
|
||||
struct rt_device_graphic_info *info = (struct rt_device_graphic_info *)args;
|
||||
|
||||
RT_ASSERT(info != RT_NULL);
|
||||
info->pixel_format = lcd->lcd_info.pixel_format;
|
||||
info->bits_per_pixel = 16;
|
||||
info->width = lcd->lcd_info.width;
|
||||
info->height = lcd->lcd_info.height;
|
||||
info->framebuffer = lcd->lcd_info.framebuffer;
|
||||
} break;
|
||||
|
||||
case RTGRAPHIC_CTRL_SET_BRIGHTNESS: {
|
||||
set_lcd_backlight(*((rt_uint8_t *)args));
|
||||
} break;
|
||||
|
||||
case RTGRAPHIC_CTRL_GET_BRIGHTNESS: {
|
||||
*((rt_uint8_t *)args) = get_lcd_backlight();
|
||||
} break;
|
||||
|
||||
default:
|
||||
return -RT_EINVAL;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
const static struct rt_device_ops lcd_ops =
|
||||
{
|
||||
drv_lcd_init,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
drv_lcd_control
|
||||
};
|
||||
#endif
|
||||
|
||||
static void set_pixel(const char *pixel, int x, int y)
|
||||
{
|
||||
lcd_drawpoint(x, y, *pixel);
|
||||
}
|
||||
|
||||
void draw_hline(const char *pixel, int x1, int x2, int y)
|
||||
{
|
||||
lcd_drawline_h(x1, y, ABS(x2 - x1), *((uint16_t*)pixel));
|
||||
}
|
||||
|
||||
void draw_vline(const char *pixel, int x, int y1, int y2)
|
||||
{
|
||||
lcd_drawline_v(x, y1, ABS(y2 - y1), *((uint16_t*)pixel));
|
||||
}
|
||||
|
||||
const static struct rt_device_graphic_ops lcd_graphic_ops =
|
||||
{
|
||||
set_pixel,
|
||||
RT_NULL,
|
||||
draw_hline,
|
||||
draw_vline,
|
||||
RT_NULL
|
||||
};
|
||||
|
||||
int drv_hw_lcd_init(void)
|
||||
{
|
||||
rt_err_t result = RT_EOK;
|
||||
struct rt_device *device = &_lcd.parent;
|
||||
|
||||
/* memset _lcd to zero */
|
||||
memset(&_lcd, 0x00, sizeof(_lcd));
|
||||
|
||||
/* init lcd_lock semaphore */
|
||||
result = rt_sem_init(&_lcd.lcd_lock, "lcd_lock", 0, RT_IPC_FLAG_FIFO);
|
||||
if (result != RT_EOK) {
|
||||
LOG_E("init semaphore failed!\n");
|
||||
result = -RT_ENOMEM;
|
||||
goto __exit;
|
||||
}
|
||||
|
||||
/* config LCD dev info */
|
||||
_lcd.lcd_info.height = LCD_HEIGHT;
|
||||
_lcd.lcd_info.width = LCD_WIDTH;
|
||||
_lcd.lcd_info.bits_per_pixel = LCD_BITS_PER_PIXEL;
|
||||
_lcd.lcd_info.pixel_format = LCD_PIXEL_FORMAT;
|
||||
|
||||
/* malloc memory for Triple Buffering */
|
||||
_lcd.lcd_info.framebuffer = rt_malloc_align(LCD_BUF_SIZE, 32);
|
||||
_lcd.back_buf = rt_malloc_align(LCD_BUF_SIZE, 32);
|
||||
_lcd.front_buf = rt_malloc_align(LCD_BUF_SIZE, 32);
|
||||
if (_lcd.lcd_info.framebuffer == RT_NULL || _lcd.back_buf == RT_NULL || _lcd.front_buf == RT_NULL) {
|
||||
LOG_E("init frame buffer failed!\n");
|
||||
result = -RT_ENOMEM;
|
||||
goto __exit;
|
||||
}
|
||||
|
||||
/* memset buff to 0xFF */
|
||||
memset(_lcd.lcd_info.framebuffer, 0xFF, LCD_BUF_SIZE);
|
||||
memset(_lcd.back_buf, 0xFF, LCD_BUF_SIZE);
|
||||
memset(_lcd.front_buf, 0xFF, LCD_BUF_SIZE);
|
||||
|
||||
device->type = RT_Device_Class_Graphic;
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
device->ops = &lcd_ops;
|
||||
#else
|
||||
device->init = drv_lcd_init;
|
||||
device->control = drv_lcd_control;
|
||||
#endif
|
||||
device->user_data = (void*)&lcd_graphic_ops;
|
||||
|
||||
/* register lcd device */
|
||||
rt_device_register(device, "lcd", RT_DEVICE_FLAG_RDWR);
|
||||
|
||||
/* init stm32 spi lcd */
|
||||
if (rt_device_init(device) != RT_EOK) {
|
||||
result = -RT_ERROR;
|
||||
goto __exit;
|
||||
}
|
||||
|
||||
__exit:
|
||||
if (result != RT_EOK) {
|
||||
rt_sem_delete(&_lcd.lcd_lock);
|
||||
|
||||
if (_lcd.lcd_info.framebuffer) {
|
||||
rt_free_align(_lcd.lcd_info.framebuffer);
|
||||
}
|
||||
|
||||
if (_lcd.back_buf) {
|
||||
rt_free_align(_lcd.back_buf);
|
||||
}
|
||||
|
||||
if (_lcd.front_buf) {
|
||||
rt_free_align(_lcd.front_buf);
|
||||
}
|
||||
}
|
||||
return result;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(drv_hw_lcd_init);
|
||||
|
||||
#ifdef DRV_DEBUG
|
||||
#ifdef FINSH_USING_MSH
|
||||
int lcd_test()
|
||||
{
|
||||
struct drv_lcd_device *lcd;
|
||||
lcd = (struct drv_lcd_device *)rt_device_find("lcd");
|
||||
|
||||
rt_device_open((rt_device_t)lcd, RT_DEVICE_FLAG_RDWR);
|
||||
|
||||
while (1) {
|
||||
/* red */
|
||||
for (int i = 0; i < LCD_BUF_SIZE / 2; i++) {
|
||||
lcd->lcd_info.framebuffer[2 * i] = 0x00;
|
||||
lcd->lcd_info.framebuffer[2 * i + 1] = 0xF8;
|
||||
}
|
||||
// lcd_clear(0xFFFF00);
|
||||
rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
|
||||
rt_thread_mdelay(1000);
|
||||
/* green */
|
||||
for (int i = 0; i < LCD_BUF_SIZE / 2; i++) {
|
||||
lcd->lcd_info.framebuffer[2 * i] = 0xE0;
|
||||
lcd->lcd_info.framebuffer[2 * i + 1] = 0x07;
|
||||
}
|
||||
// lcd_clear(0xFF00FF);
|
||||
rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
|
||||
rt_thread_mdelay(1000);
|
||||
/* blue */
|
||||
for (int i = 0; i < LCD_BUF_SIZE / 2; i++) {
|
||||
lcd->lcd_info.framebuffer[2 * i] = 0x1F;
|
||||
lcd->lcd_info.framebuffer[2 * i + 1] = 0x00;
|
||||
}
|
||||
// lcd_clear(0x00FFFF);
|
||||
rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
|
||||
rt_thread_mdelay(1000);
|
||||
}
|
||||
}
|
||||
MSH_CMD_EXPORT(lcd_test, lcd_test);
|
||||
|
||||
void lcd_auto_fill(void *para)
|
||||
{
|
||||
int num = (int)para;
|
||||
do
|
||||
{
|
||||
lcd_clear(rt_tick_get());
|
||||
rt_thread_mdelay(1000);
|
||||
}while(--num);
|
||||
}
|
||||
|
||||
#include <stdlib.h> /* atoi */
|
||||
void lcd_fill(int argc, void **argv)
|
||||
{
|
||||
static rt_uint8_t lcd_init = 0;
|
||||
rt_device_t lcd = RT_NULL;
|
||||
|
||||
if(lcd_init == 0)
|
||||
{
|
||||
lcd_init = 1;
|
||||
|
||||
lcd = rt_device_find("lcd");
|
||||
rt_device_init(lcd);
|
||||
}
|
||||
|
||||
if(argc == 1)
|
||||
{
|
||||
lcd_auto_fill((void *)1);
|
||||
}
|
||||
else if(argc == 3)
|
||||
{
|
||||
if(rt_strcmp(argv[1], "-t")==0)
|
||||
{
|
||||
rt_thread_t tid = RT_NULL;
|
||||
tid = rt_thread_create("lcd_fill", lcd_auto_fill, (void *)atoi(argv[2]), 512, 23,10);
|
||||
rt_thread_startup(tid);
|
||||
}
|
||||
}
|
||||
}
|
||||
MSH_CMD_EXPORT(lcd_fill, lcd fill test for mcu lcd);
|
||||
#endif /* FINSH_USING_MSH */
|
||||
#endif /* DRV_DEBUG */
|
||||
#endif /* BSP_USING_LCD */
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-24 spaceman the first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_LCD_SPI_H__
|
||||
#define __DRV_LCD_SPI_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define LCD_DEVICE(dev) (struct drv_lcd_device*)(dev)
|
||||
|
||||
struct drv_lcd_device
|
||||
{
|
||||
struct rt_device parent;
|
||||
rt_device_t lcd_spi_dev;
|
||||
|
||||
struct rt_device_graphic_info lcd_info;
|
||||
|
||||
struct rt_semaphore lcd_lock;
|
||||
|
||||
/* 0:front_buf is being used 1: back_buf is being used*/
|
||||
rt_uint8_t cur_buf;
|
||||
rt_uint8_t *front_buf;
|
||||
rt_uint8_t *back_buf;
|
||||
};
|
||||
|
||||
|
||||
|
||||
void lcd_writebuff(uint16_t *databuff, uint16_t datasize);
|
||||
|
||||
void lcd_setaddress(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2);
|
||||
|
||||
void lcd_clear(uint32_t color);
|
||||
void lcd_clearrect(uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint32_t color);
|
||||
void lcd_copybuffer(uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint16_t *databuff);
|
||||
|
||||
void lcd_drawpoint(uint16_t x, uint16_t y, uint32_t color);
|
||||
|
||||
void lcd_drawline(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint32_t color);
|
||||
void lcd_drawline_v(uint16_t x, uint16_t y, uint16_t height, uint32_t color);
|
||||
void lcd_drawline_h(uint16_t x, uint16_t y, uint16_t width, uint32_t color);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __DRV_LCD_SPI_H__ */
|
||||
|
|
@ -0,0 +1,332 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-24 spaceman the first version
|
||||
*/
|
||||
|
||||
#include "drv_lcd_spi_ext.h"
|
||||
#include "stm32h7xx_hal.h"
|
||||
|
||||
static SPI_HandleTypeDef* spi_handle;
|
||||
|
||||
void Set_SPI_Handle_Ext(SPI_HandleTypeDef *handle)
|
||||
{
|
||||
spi_handle = handle;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Handle SPI Communication Timeout.
|
||||
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
|
||||
* the configuration information for SPI module.
|
||||
* @param Flag: SPI flag to check
|
||||
* @param Status: flag state to check
|
||||
* @param Timeout: Timeout duration
|
||||
* @param Tickstart: Tick start value
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef LCD_SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status,
|
||||
uint32_t Tickstart, uint32_t Timeout)
|
||||
{
|
||||
/* Wait until flag is set */
|
||||
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) == Status) {
|
||||
/* Check for the Timeout */
|
||||
if ((((HAL_GetTick() - Tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) {
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Close Transfer and clear flags.
|
||||
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
|
||||
* the configuration information for SPI module.
|
||||
* @retval HAL_ERROR: if any error detected
|
||||
* HAL_OK: if nothing detected
|
||||
*/
|
||||
void LCD_SPI_CloseTransfer(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
uint32_t itflag = hspi->Instance->SR;
|
||||
|
||||
__HAL_SPI_CLEAR_EOTFLAG(hspi);
|
||||
__HAL_SPI_CLEAR_TXTFFLAG(hspi);
|
||||
|
||||
/* Disable SPI peripheral */
|
||||
__HAL_SPI_DISABLE(hspi);
|
||||
|
||||
/* Disable ITs */
|
||||
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_EOT | SPI_IT_TXP | SPI_IT_RXP | SPI_IT_DXP | SPI_IT_UDR | SPI_IT_OVR | SPI_IT_FRE | SPI_IT_MODF));
|
||||
|
||||
/* Disable Tx DMA Request */
|
||||
CLEAR_BIT(hspi->Instance->CFG1, SPI_CFG1_TXDMAEN | SPI_CFG1_RXDMAEN);
|
||||
|
||||
/* Report UnderRun error for non RX Only communication */
|
||||
if (hspi->State != HAL_SPI_STATE_BUSY_RX) {
|
||||
if ((itflag & SPI_FLAG_UDR) != 0UL) {
|
||||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_UDR);
|
||||
__HAL_SPI_CLEAR_UDRFLAG(hspi);
|
||||
}
|
||||
}
|
||||
|
||||
/* Report OverRun error for non TX Only communication */
|
||||
if (hspi->State != HAL_SPI_STATE_BUSY_TX) {
|
||||
if ((itflag & SPI_FLAG_OVR) != 0UL) {
|
||||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
|
||||
__HAL_SPI_CLEAR_OVRFLAG(hspi);
|
||||
}
|
||||
}
|
||||
|
||||
/* SPI Mode Fault error interrupt occurred -------------------------------*/
|
||||
if ((itflag & SPI_FLAG_MODF) != 0UL) {
|
||||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
|
||||
__HAL_SPI_CLEAR_MODFFLAG(hspi);
|
||||
}
|
||||
|
||||
/* SPI Frame error interrupt occurred ------------------------------------*/
|
||||
if ((itflag & SPI_FLAG_FRE) != 0UL) {
|
||||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
|
||||
__HAL_SPI_CLEAR_FREFLAG(hspi);
|
||||
}
|
||||
|
||||
hspi->TxXferCount = (uint16_t)0UL;
|
||||
hspi->RxXferCount = (uint16_t)0UL;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief 专为屏幕清屏而修改，将需要清屏的颜色批量传输
|
||||
* @param pData : 要写入的数据
|
||||
* @param Size : 数据大小
|
||||
* @retval status
|
||||
*/
|
||||
|
||||
rt_err_t SPI_Transmit_Ext(uint16_t pData, uint32_t Size)
|
||||
{
|
||||
uint32_t tickstart;
|
||||
uint32_t Timeout = 1000; // 超时判断
|
||||
uint32_t LCD_pData_32bit; // 按32位传输时的数据
|
||||
uint32_t LCD_TxDataCount; // 传输计数
|
||||
rt_err_t errorcode = RT_EOK;
|
||||
SPI_HandleTypeDef *hspi = spi_handle;
|
||||
|
||||
/* Check Direction parameter */
|
||||
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE_2LINES_TXONLY(hspi->Init.Direction));
|
||||
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(hspi);
|
||||
|
||||
/* Init tickstart for timeout management*/
|
||||
tickstart = HAL_GetTick();
|
||||
|
||||
if (hspi->State != HAL_SPI_STATE_READY) {
|
||||
errorcode = -RT_EBUSY;
|
||||
__HAL_UNLOCK(hspi);
|
||||
return errorcode;
|
||||
}
|
||||
|
||||
if (Size == 0UL) {
|
||||
errorcode = -RT_ERROR;
|
||||
__HAL_UNLOCK(hspi);
|
||||
return errorcode;
|
||||
}
|
||||
|
||||
/* Set the transaction information */
|
||||
hspi->State = HAL_SPI_STATE_BUSY_TX;
|
||||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||||
|
||||
LCD_TxDataCount = Size; // 传输的数据长度
|
||||
LCD_pData_32bit = (pData << 16) | pData; // 按32位传输时，合并2个像素点的颜色
|
||||
|
||||
/*Init field not used in handle to zero */
|
||||
hspi->pRxBuffPtr = NULL;
|
||||
hspi->RxXferSize = (uint16_t)0UL;
|
||||
hspi->RxXferCount = (uint16_t)0UL;
|
||||
hspi->TxISR = NULL;
|
||||
hspi->RxISR = NULL;
|
||||
|
||||
/* Configure communication direction : 1Line */
|
||||
if (hspi->Init.Direction == SPI_DIRECTION_1LINE) {
|
||||
SPI_1LINE_TX(hspi);
|
||||
}
|
||||
|
||||
// 不使用硬件 TSIZE 控制，此处设置为0，即不限制传输的数据长度
|
||||
MODIFY_REG(hspi->Instance->CR2, SPI_CR2_TSIZE, 0);
|
||||
|
||||
/* Enable SPI peripheral */
|
||||
__HAL_SPI_ENABLE(hspi);
|
||||
|
||||
if (hspi->Init.Mode == SPI_MODE_MASTER) {
|
||||
/* Master transfer start */
|
||||
SET_BIT(hspi->Instance->CR1, SPI_CR1_CSTART);
|
||||
}
|
||||
|
||||
/* Transmit data in 16 Bit mode */
|
||||
while (LCD_TxDataCount > 0UL) {
|
||||
/* Wait until TXP flag is set to send data */
|
||||
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXP)) {
|
||||
if ((hspi->TxXferCount > 1UL) && (hspi->Init.FifoThreshold > SPI_FIFO_THRESHOLD_01DATA)) {
|
||||
*((__IO uint32_t *)&hspi->Instance->TXDR) = (uint32_t)LCD_pData_32bit;
|
||||
LCD_TxDataCount -= (uint16_t)2UL;
|
||||
} else {
|
||||
*((__IO uint16_t *)&hspi->Instance->TXDR) = (uint16_t)pData;
|
||||
LCD_TxDataCount--;
|
||||
}
|
||||
} else {
|
||||
/* Timeout management */
|
||||
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) {
|
||||
/* Call standard close procedure with error check */
|
||||
LCD_SPI_CloseTransfer(hspi);
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hspi);
|
||||
|
||||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_TIMEOUT);
|
||||
hspi->State = HAL_SPI_STATE_READY;
|
||||
return -RT_ERROR;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (LCD_SPI_WaitOnFlagUntilTimeout(hspi, SPI_SR_TXC, RESET, tickstart, Timeout) != HAL_OK) {
|
||||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
|
||||
}
|
||||
|
||||
SET_BIT((hspi)->Instance->CR1, SPI_CR1_CSUSP); // 请求挂起SPI传输
|
||||
/* 等待SPI挂起 */
|
||||
if (LCD_SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_SUSP, RESET, tickstart, Timeout) != HAL_OK) {
|
||||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
|
||||
}
|
||||
LCD_SPI_CloseTransfer(hspi); /* Call standard close procedure with error check */
|
||||
|
||||
SET_BIT((hspi)->Instance->IFCR, SPI_IFCR_SUSPC); // 清除挂起标志位
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hspi);
|
||||
|
||||
hspi->State = HAL_SPI_STATE_READY;
|
||||
|
||||
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) {
|
||||
return -RT_ERROR;
|
||||
}
|
||||
return errorcode;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief 专为批量写入数据修改，使之不限长度的传输数据
|
||||
* @param pData : 要写入的数据
|
||||
* @param Size : 数据大小
|
||||
* @retval status
|
||||
*/
|
||||
rt_err_t SPI_TransmitBuffer_Ext(uint16_t *pData, uint32_t Size)
|
||||
{
|
||||
uint32_t tickstart;
|
||||
uint32_t Timeout = 1000; // 超时判断
|
||||
uint32_t LCD_TxDataCount; // 传输计数
|
||||
rt_err_t errorcode = RT_EOK;
|
||||
SPI_HandleTypeDef *hspi = spi_handle;
|
||||
|
||||
/* Check Direction parameter */
|
||||
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE_2LINES_TXONLY(hspi->Init.Direction));
|
||||
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(hspi);
|
||||
|
||||
/* Init tickstart for timeout management*/
|
||||
tickstart = HAL_GetTick();
|
||||
|
||||
if (hspi->State != HAL_SPI_STATE_READY) {
|
||||
errorcode = -RT_EBUSY;
|
||||
__HAL_UNLOCK(hspi);
|
||||
return errorcode;
|
||||
}
|
||||
|
||||
if (Size == 0UL) {
|
||||
errorcode = -RT_ERROR;
|
||||
__HAL_UNLOCK(hspi);
|
||||
return errorcode;
|
||||
}
|
||||
|
||||
/* Set the transaction information */
|
||||
hspi->State = HAL_SPI_STATE_BUSY_TX;
|
||||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||||
|
||||
LCD_TxDataCount = Size; // 传输的数据长度
|
||||
|
||||
/*Init field not used in handle to zero */
|
||||
hspi->pRxBuffPtr = NULL;
|
||||
hspi->RxXferSize = (uint16_t)0UL;
|
||||
hspi->RxXferCount = (uint16_t)0UL;
|
||||
hspi->TxISR = NULL;
|
||||
hspi->RxISR = NULL;
|
||||
|
||||
/* Configure communication direction : 1Line */
|
||||
if (hspi->Init.Direction == SPI_DIRECTION_1LINE) {
|
||||
SPI_1LINE_TX(hspi);
|
||||
}
|
||||
|
||||
// 不使用硬件 TSIZE 控制，此处设置为0，即不限制传输的数据长度
|
||||
MODIFY_REG(hspi->Instance->CR2, SPI_CR2_TSIZE, 0);
|
||||
|
||||
/* Enable SPI peripheral */
|
||||
__HAL_SPI_ENABLE(hspi);
|
||||
|
||||
if (hspi->Init.Mode == SPI_MODE_MASTER) {
|
||||
/* Master transfer start */
|
||||
SET_BIT(hspi->Instance->CR1, SPI_CR1_CSTART);
|
||||
}
|
||||
|
||||
/* Transmit data in 16 Bit mode */
|
||||
while (LCD_TxDataCount > 0UL) {
|
||||
/* Wait until TXP flag is set to send data */
|
||||
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXP)) {
|
||||
if ((LCD_TxDataCount > 1UL) && (hspi->Init.FifoThreshold > SPI_FIFO_THRESHOLD_01DATA)) {
|
||||
*((__IO uint32_t *)&hspi->Instance->TXDR) = *((uint32_t *)pData);
|
||||
pData += 2;
|
||||
LCD_TxDataCount -= 2;
|
||||
} else {
|
||||
*((__IO uint16_t *)&hspi->Instance->TXDR) = *((uint16_t *)pData);
|
||||
pData += 1;
|
||||
LCD_TxDataCount--;
|
||||
}
|
||||
} else {
|
||||
/* Timeout management */
|
||||
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) {
|
||||
/* Call standard close procedure with error check */
|
||||
LCD_SPI_CloseTransfer(hspi);
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hspi);
|
||||
|
||||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_TIMEOUT);
|
||||
hspi->State = HAL_SPI_STATE_READY;
|
||||
return -RT_ERROR;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (LCD_SPI_WaitOnFlagUntilTimeout(hspi, SPI_SR_TXC, RESET, tickstart, Timeout) != HAL_OK) {
|
||||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
|
||||
}
|
||||
|
||||
SET_BIT((hspi)->Instance->CR1, SPI_CR1_CSUSP); // 请求挂起SPI传输
|
||||
/* 等待SPI挂起 */
|
||||
if (LCD_SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_SUSP, RESET, tickstart, Timeout) != HAL_OK) {
|
||||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
|
||||
}
|
||||
LCD_SPI_CloseTransfer(hspi); /* Call standard close procedure with error check */
|
||||
|
||||
SET_BIT((hspi)->Instance->IFCR, SPI_IFCR_SUSPC); // 清除挂起标志位
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hspi);
|
||||
|
||||
hspi->State = HAL_SPI_STATE_READY;
|
||||
|
||||
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) {
|
||||
return -RT_ERROR;
|
||||
}
|
||||
return errorcode;
|
||||
}
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-24 spaceman the first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_LCD_SPI_EXT_H__
|
||||
#define __DRV_LCD_SPI_EXT_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <drv_spi.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void Set_SPI_Handle_Ext(SPI_HandleTypeDef *handle);
|
||||
|
||||
/**
|
||||
* @brief 专为屏幕清屏而修改，将需要清屏的颜色批量传输
|
||||
* @param pData : 要写入的数据
|
||||
* @param Size : 数据大小
|
||||
* @retval status
|
||||
*/
|
||||
|
||||
rt_err_t SPI_Transmit_Ext(uint16_t pData, uint32_t Size);
|
||||
|
||||
/**
|
||||
* @brief 专为批量写入数据修改，使之不限长度的传输数据
|
||||
* @param pData : 要写入的数据
|
||||
* @param Size : 数据大小
|
||||
* @retval status
|
||||
*/
|
||||
rt_err_t SPI_TransmitBuffer_Ext(uint16_t *pData, uint32_t Size);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __DRV_LCD_SPI_EXT_H__ */
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-24 spaceman the first version
|
||||
*/
|
||||
|
||||
#ifndef __LCD_PORT_H__
|
||||
#define __LCD_PORT_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//LCD
|
||||
#define LCD_HEIGHT (240U)
|
||||
#define LCD_WIDTH (240U)
|
||||
#define LCD_BITS_PER_PIXEL (16)
|
||||
#define LCD_PIXEL_FORMAT (RTGRAPHIC_PIXEL_FORMAT_RGB565)
|
||||
#define LCD_BUF_SIZE (LCD_WIDTH*LCD_HEIGHT*LCD_BITS_PER_PIXEL/8)
|
||||
//BACKLIGHT
|
||||
#define LCD_BACKLIGHT_PIN (GET_PIN(D, 15))
|
||||
//CMD/DATA
|
||||
#define LCD_CMD_DATA_PIN (GET_PIN(E, 15))
|
||||
//SPI
|
||||
#define LCD_SPI_BUS_NAME "spi4"
|
||||
#define LCD_SPI_DEV_NAME "spi40"
|
||||
#define LCD_SPI_DEV_CS_PIN (GET_PIN(E, 11))
|
||||
#define LCD_SPI_MAX_SPEED (60 * 1000 *1000) /* 60M */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __LCD_PORT_H__ */
|
||||
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 481 KiB |
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,10 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\project.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,264 @@
|
|||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 8
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_KSERVICE_USING_STDLIB
|
||||
#define RT_DEBUG
|
||||
#define RT_DEBUG_COLOR
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_PAGE_MAX_ORDER 11
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_MEMHEAP_FAST_MODE
|
||||
#define RT_USING_MEMHEAP_AS_HEAP
|
||||
#define RT_USING_MEMHEAP_AUTO_BINDING
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x50000
|
||||
#define RT_USING_CACHE
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M7
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
#define RT_USING_MSH
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_POSIX
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FILESYSTEMS_MAX 4
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 4
|
||||
#define DFS_FD_MAX 16
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V2
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_USING_I2C
|
||||
#define RT_USING_I2C_BITOPS
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_RTC
|
||||
#define RT_USING_SPI
|
||||
#define RT_USING_QSPI
|
||||
#define RT_USING_SFUD
|
||||
#define RT_SFUD_USING_SFDP
|
||||
#define RT_SFUD_USING_FLASH_INFO_TABLE
|
||||
#define RT_SFUD_USING_QSPI
|
||||
#define RT_SFUD_SPI_MAX_HZ 10000000
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* C/C++ and POSIX layer */
|
||||
|
||||
#define RT_LIBC_DEFAULT_TIMEZONE 8
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
|
||||
/* Interprocess Communication (IPC) */
|
||||
|
||||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
|
||||
/* Network */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
|
||||
|
||||
|
||||
/* XML: Extensible Markup Language */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* LVGL: powerful and easy-to-use embedded GUI library */
|
||||
|
||||
|
||||
/* u8g2: a monochrome graphic library */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* enhanced kernel services */
|
||||
|
||||
|
||||
/* acceleration: Assembly language or algorithmic acceleration packages */
|
||||
|
||||
|
||||
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
||||
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
|
||||
/* Arduino libraries */
|
||||
|
||||
|
||||
/* Projects */
|
||||
|
||||
|
||||
/* Sensors */
|
||||
|
||||
|
||||
/* Display */
|
||||
|
||||
|
||||
/* Timing */
|
||||
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
|
||||
/* Device Control */
|
||||
|
||||
|
||||
/* Other */
|
||||
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
#define SOC_FAMILY_STM32
|
||||
#define SOC_SERIES_STM32H7
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_STM32H750VBT6
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_LCD_SPI
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART1
|
||||
#define BSP_USING_SPI
|
||||
#define BSP_USING_SPI4
|
||||
|
||||
/* Board extended module Drivers */
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m7'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
# bsp lib config
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'/opt/gcc-arm-none-eabi/bin/'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = r'D:/Keil/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iccarm'
|
||||
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.3'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
CXX = PREFIX + 'g++'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M7.fp.sp'
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'armclang':
|
||||
# toolchains
|
||||
CC = 'armclang'
|
||||
CXX = 'armclang'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M7.fp.sp '
|
||||
CFLAGS = ' --target=arm-arm-none-eabi -mcpu=cortex-M7 '
|
||||
CFLAGS += ' -mcpu=cortex-M7 -mfpu=fpv4-sp-d16 '
|
||||
CFLAGS += ' -mfloat-abi=hard -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar '
|
||||
CFLAGS += ' -gdwarf-3 -ffunction-sections '
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers '
|
||||
LFLAGS += ' --list rt-thread.map '
|
||||
LFLAGS += r' --strict --scatter "board\linker_scripts\link.sct" '
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCLANG/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib'
|
||||
|
||||
EXEC_PATH += '/ARM/ARMCLANG/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O1' # armclang recommend
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iccarm':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M7'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=VFPv5_sp'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M7'
|
||||
AFLAGS += ' --fpu VFPv5_sp'
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,10 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\template.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,184 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>18</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>6</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U59700618 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO11 -FD20000000 -FC8000 -FN1 -FF0STM32H750VB_W25Qxx_WeActStudio -FS090000000 -FL01000000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC8000 -FD20000000 -FF0STM32H7x_2048 -FL0200000 -FS08000000 -FP0($$Device:STM32H743IIKx$CMSIS\Flash\STM32H7x_2048.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
<DebugDescription>
|
||||
<Enable>1</Enable>
|
||||
<EnableFlashSeq>1</EnableFlashSeq>
|
||||
<EnableLog>0</EnableLog>
|
||||
<Protocol>2</Protocol>
|
||||
<DbgClock>10000000</DbgClock>
|
||||
</DebugDescription>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
|
|
@ -0,0 +1,390 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32H750VBTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32H7xx_DFP.3.0.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x24000000,0x00080000) IROM(0x08000000,0x00100000) IROM2(0x08100000,0x00100000) XRAM(0x30000000,0x00048000) XRAM2(0x38000000,0x00010000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC8000 -FN1 -FF0STM32H7x_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32H750VBTx$CMSIS\Flash\STM32H7x_2048.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:STM32H750VBTx$Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h7xx.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32H750VBTx$CMSIS\SVD\STM32H743x.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\build\</OutputDirectory>
|
||||
<OutputName>rt-thread</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM7</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> -MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M7"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>1</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>3</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>1</hadIRAM2>
|
||||
<hadIROM2>1</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>4</RoSelD>
|
||||
<RwSelD>4</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>1</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>1</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x30000000</StartAddress>
|
||||
<Size>0x48000</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8100000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x30000000</StartAddress>
|
||||
<Size>0x48000</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x38000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x24000000</StartAddress>
|
||||
<Size>0x80000</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>1</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>0</v6Lang>
|
||||
<v6LangP>0</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
Loading…
Reference in New Issue