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Added nand_read.c for start_rvds.s 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@384 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
gary.li.wenchao.4 2010-02-07 09:51:27 +00:00
parent e8a1b81d6d
commit 72afd7d85b
1 changed files with 67 additions and 0 deletions
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67
libcpu/arm/s3c24x0/nand_read.c Normal file
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/*
* nand flash read
*/
#define NFCONF (*(volatile unsigned int *)0x4e000000)
#define rNFCONT (*(volatile unsigned int *)0x4E000004)
#define NFCMD (*(volatile unsigned int *)0x4e000008)
#define NFADDR (*(volatile unsigned char *)0x4e00000C)
#define NFDATA (*(volatile unsigned char *)0x4e000010)
#define NFSTAT (*(volatile unsigned char *)0x4e000020)
#define BUSY 1
#define NAND_SECTOR_SIZE 512
#define NAND_BLOCK_MASK (NAND_SECTOR_SIZE - 1)
void wait_idle(void) {
int i;
while (!(NFSTAT & BUSY)) {
for(i=0; i<10; i++) {
;
}
}
}
/* low level nand read function */
int nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)
{
int i, j;
/*
* K9F5608UOC asks for 512B per page, and read/write operation must
* do with page. Therefore, first judge whether start_addr and size
* are valid.
*/
if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) {
return -1; /* invalid alignment */
}
/* chip Enable */
NFCONF &= ~0x800;
for (i=0; i<10; i++) {
;
}
for (i=start_addr; i < (start_addr + size); i+=NAND_SECTOR_SIZE) {
NFCMD = 0;
/* Write Address */
NFADDR = i & 0xff;
NFADDR = (i >> 9) & 0xff;
NFADDR = (i >> 17) & 0xff;
NFADDR = (i >> 25) & 0xff;
wait_idle();
for(j=0; j < NAND_SECTOR_SIZE; j++) {
*buf++ = (NFDATA & 0xff);
}
}
/* chip Disable */
NFCONF |= 0x800; /* chip disable */
return 0;
}