for rt-thread 1.1.0

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2372 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
nongli1031@gmail.com 2012-10-26 03:36:13 +00:00
parent 2cdbbf8b05
commit 6fe2afed8c
11 changed files with 683 additions and 649 deletions

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@ -11,7 +11,7 @@
* Date Author Notes * Date Author Notes
* 2006-08-23 Bernard first implementation * 2006-08-23 Bernard first implementation
* *
* 2011-12-17 nl1031 for MicroBlaze * 2011-12-17 nl1031 for MacroBlaze
* *
*/ */
@ -48,6 +48,9 @@ XGpio gpio_output; /* The driver instance for GPIO Device configured as O/P */
XUartLite uart_lite; /* Instance of the UartLite device */ XUartLite uart_lite; /* Instance of the UartLite device */
XIntc int_ctl; /* The instance of the Interrupt Controller */ XIntc int_ctl; /* The instance of the Interrupt Controller */
static rt_uint32_t led_data; static rt_uint32_t led_data;
static int cnt;
static void rt_hw_board_led_init(void); static void rt_hw_board_led_init(void);
@ -58,6 +61,7 @@ static void rt_hw_board_led_init()
{ {
rt_uint32_t status; rt_uint32_t status;
led_data = 0; led_data = 0;
cnt = 0;
status = XGpio_Initialize(&gpio_output, LEDS_DEVICE_ID); status = XGpio_Initialize(&gpio_output, LEDS_DEVICE_ID);
if (status != XST_SUCCESS) if (status != XST_SUCCESS)
{ {
@ -96,9 +100,10 @@ void rt_hw_board_led_off(rt_uint32_t led)
XGpio_DiscreteWrite(&gpio_output, 1, led_data); XGpio_DiscreteWrite(&gpio_output, 1, led_data);
} }
void rt_hw_led_flash(void) void rt_hw_led_flash(void)
{ {
rt_uint32_t i; volatile rt_uint32_t i;
rt_hw_board_led_off(1); rt_hw_board_led_off(1);
for (i = 0; i < 20000; i ++); for (i = 0; i < 20000; i ++);
@ -107,6 +112,7 @@ void rt_hw_led_flash(void)
for (i = 0; i < 20000; i ++); for (i = 0; i < 20000; i ++);
} }
#ifdef RT_USING_CONSOLE #ifdef RT_USING_CONSOLE
/* /*
@ -124,6 +130,7 @@ void rt_hw_console_output(const char* str)
{ {
/* Transmit Character */ /* Transmit Character */
XUartLite_SendByte(STDOUT_BASEADDRESS, *str); XUartLite_SendByte(STDOUT_BASEADDRESS, *str);
if (*str == '\n') if (*str == '\n')
XUartLite_SendByte(STDOUT_BASEADDRESS, '\r'); XUartLite_SendByte(STDOUT_BASEADDRESS, '\r');
@ -147,6 +154,7 @@ static void rt_hw_console_init()
} }
#endif #endif
void rt_hw_timer_handler(void) void rt_hw_timer_handler(void)
{ {
rt_uint32_t csr; rt_uint32_t csr;
@ -157,12 +165,12 @@ void rt_hw_timer_handler(void)
if (csr & XTC_CSR_INT_OCCURED_MASK) if (csr & XTC_CSR_INT_OCCURED_MASK)
{ {
rt_tick_increase(); rt_tick_increase();
XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TCSR_OFFSET, csr | XTC_CSR_INT_OCCURED_MASK); XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TCSR_OFFSET, csr | XTC_CSR_INT_OCCURED_MASK);
} }
} }
/* /*
********************************************************************************************************* *********************************************************************************************************
* rt_intc_init() * rt_intc_init()
@ -186,31 +194,33 @@ void rt_intc_init(void)
/* install interrupt handler */ /* install interrupt handler */
rt_hw_interrupt_install(XPAR_INTC_0_TMRCTR_0_VEC_ID, (rt_isr_handler_t)rt_hw_timer_handler, RT_NULL); rt_hw_interrupt_install(XPAR_INTC_0_TMRCTR_0_VEC_ID, (rt_isr_handler_t)rt_hw_timer_handler, RT_NULL);
rt_hw_interrupt_umask(XPAR_INTC_0_TMRCTR_0_VEC_ID); rt_hw_interrupt_umask(XPAR_INTC_0_TMRCTR_0_VEC_ID);
XIntc_Start(&int_ctl, XIN_REAL_MODE); XIntc_Start(&int_ctl, XIN_REAL_MODE);
} }
void rt_tmr_init (void) void rt_tmr_init (void)
{ {
rt_uint32_t ctl; rt_uint32_t ctl;
XStatus status; XStatus status;
status = XTmrCtr_Initialize(&timer,XPAR_AXI_TIMER_0_DEVICE_ID); status = XTmrCtr_Initialize(&timer,XPAR_AXI_TIMER_0_DEVICE_ID);
XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TLR_OFFSET, PIV); XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TLR_OFFSET, PIV);
ctl = XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK; ctl = XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK;
XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TCSR_OFFSET, ctl); XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TCSR_OFFSET, ctl);
} }
/** /**
* This function will initial SPARTAN 6 LX9 board. * This function will initial SPARTAN 6 LX9 board.
*/ */
void rt_hw_board_init() void rt_hw_board_init()
{ {
microblaze_disable_icache();
microblaze_disable_dcache();
/* init hardware console */ /* init hardware console */
rt_hw_console_init(); rt_hw_console_init();
@ -223,4 +233,5 @@ void rt_hw_board_init()
/* timer init */ /* timer init */
rt_tmr_init(); rt_tmr_init();
} }

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@ -13,6 +13,7 @@
#define __BOARD_H__ #define __BOARD_H__
#define MCK 50000000
void rt_hw_board_led_on(rt_uint32_t); void rt_hw_board_led_on(rt_uint32_t);
void rt_hw_board_led_off(rt_uint32_t); void rt_hw_board_led_off(rt_uint32_t);

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@ -16,6 +16,7 @@
/* Tick per Second*/ /* Tick per Second*/
#define RT_TICK_PER_SECOND 100 #define RT_TICK_PER_SECOND 100
/* SECTION: RT_DEBUG */ /* SECTION: RT_DEBUG */
/* Thread Debug*/ /* Thread Debug*/
/* #define RT_THREAD_DEBUG */ /* #define RT_THREAD_DEBUG */
@ -88,6 +89,7 @@
#define FINSH_THREAD_STACK_SIZE 8192 #define FINSH_THREAD_STACK_SIZE 8192
#define RT_USING_TC #define RT_USING_TC
/* SECTION: a runtime libc library */ /* SECTION: a runtime libc library */
/* a runtime libc library*/ /* a runtime libc library*/
/* #define RT_USING_NEWLIB */ /* #define RT_USING_NEWLIB */

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@ -25,6 +25,7 @@ extern void finsh_system_init(void);
extern void rt_hw_led_flash(void); extern void rt_hw_led_flash(void);
/*@{*/ /*@{*/
#ifdef __CC_ARM #ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
@ -70,6 +71,7 @@ void rtthread_startup(void)
rt_system_heap_init(__segment_end("HEAP"), (void*)0x204000); rt_system_heap_init(__segment_end("HEAP"), (void*)0x204000);
#else #else
rt_system_heap_init((void*)&__bss_end, (void*)(&__bss_end+0x4000)); rt_system_heap_init((void*)&__bss_end, (void*)(&__bss_end+0x4000));
#endif #endif
#endif #endif

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@ -131,7 +131,7 @@ int _tc_thread_delete()
tc_cleanup(_tc_cleanup); tc_cleanup(_tc_cleanup);
thread_delete_init(); thread_delete_init();
return 25; return 27;
} }
FINSH_FUNCTION_EXPORT(_tc_thread_delete, a thread delete example); FINSH_FUNCTION_EXPORT(_tc_thread_delete, a thread delete example);
#else #else

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@ -6,8 +6,8 @@ static struct rt_thread thread2;
static char thread1_stack[THREAD_STACK_SIZE]; static char thread1_stack[THREAD_STACK_SIZE];
static char thread2_stack[THREAD_STACK_SIZE]; static char thread2_stack[THREAD_STACK_SIZE];
static rt_uint32_t t1_count = 0; volatile static rt_uint32_t t1_count = 0;
static rt_uint32_t t2_count = 0; volatile static rt_uint32_t t2_count = 0;
static void thread1_entry(void* parameter) static void thread1_entry(void* parameter)
{ {
while (1) while (1)
@ -65,8 +65,12 @@ static void _tc_cleanup()
/* unlock scheduler */ /* unlock scheduler */
rt_exit_critical(); rt_exit_critical();
rt_kprintf("t1_count=%d t2_count=%d\n",t1_count,t2_count);
if (t1_count / t2_count != 2) if (t1_count / t2_count != 2)
tc_stat(TC_STAT_END | TC_STAT_FAILED); tc_stat(TC_STAT_END | TC_STAT_FAILED);
else
tc_done(TC_STAT_PASSED);
} }
int _tc_thread_same_priority() int _tc_thread_same_priority()

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@ -44,7 +44,6 @@ rt_hw_interrupt_disable:
RTSD r15, 8 RTSD r15, 8
AND r0, r0, r0 AND r0, r0, r0
.end rt_hw_interrupt_disable .end rt_hw_interrupt_disable
/* /*
@ -57,7 +56,6 @@ rt_hw_interrupt_disable:
rt_hw_interrupt_enable: rt_hw_interrupt_enable:
RTSD r15, 8 RTSD r15, 8
MTS rMSR, r5 /* Move the saved status from r5 into rMSR */ MTS rMSR, r5 /* Move the saved status from r5 into rMSR */
.end rt_hw_interrupt_enable .end rt_hw_interrupt_enable
/* /*
@ -99,7 +97,6 @@ rt_hw_context_switch_ie:
ADDIK r1, r1, STACK_SIZE ADDIK r1, r1, STACK_SIZE
RTID r14, 0 /* IE bit will be set automatically */ RTID r14, 0 /* IE bit will be set automatically */
AND r0, r0, r0 AND r0, r0, r0
.end rt_hw_context_switch .end rt_hw_context_switch
/* /*
@ -145,11 +142,11 @@ _reswitch:
SWI r6, r3, 0 /* rt_interrupt_to_thread = to */ SWI r6, r3, 0 /* rt_interrupt_to_thread = to */
RTSD r15, 8 RTSD r15, 8
AND r0, r0, r0 AND r0, r0, r0
.end rt_hw_context_switch_interrupt .end rt_hw_context_switch_interrupt
.globl _interrupt_handler .globl _interrupt_handler
.section .text
.align 2 .align 2
.ent _interrupt_handler .ent _interrupt_handler
.type _interrupt_handler, @function .type _interrupt_handler, @function

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@ -99,7 +99,8 @@ static rt_err_t rt_serial_init(rt_device_t dev)
RT_ASSERT(serial != RT_NULL); RT_ASSERT(serial != RT_NULL);
RT_ASSERT(serial->peripheral_id != XPAR_INTC_0_UARTLITE_1_VEC_ID); RT_ASSERT(serial->peripheral_id != XPAR_UARTLITE_1_DEVICE_ID);
/* reset rx index */ /* reset rx index */
serial->save_index = 0; serial->save_index = 0;
@ -168,7 +169,8 @@ static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_
serial->read_index ++; serial->read_index ++;
if (serial->read_index >= RT_UART_RX_BUFFER_SIZE) if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
serial->read_index = 0; serial->read_index = 0;
} else }
else
{ {
/* no data in rx buffer */ /* no data in rx buffer */
@ -180,23 +182,23 @@ static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_
/* enable interrupt */ /* enable interrupt */
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
ptr++; ptr ++; size --;
size--;
} }
return (rt_uint32_t)ptr - (rt_uint32_t)buffer; return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
} else if (dev->flag & RT_DEVICE_FLAG_DMA_RX) }
else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
{ {
/* not support right now */ /* not support right now */
RT_ASSERT(0); RT_ASSERT(0);
} else }
else
{ {
/* poll mode */ /* poll mode */
while (size) while (size)
{ {
/* Wait for Full Rx Buffer */ /* Wait for Full Rx Buffer */
while (!(serial->hw_base->STAT_REG & XUL_SR_RX_FIFO_VALID_DATA)) while (!(serial->hw_base->STAT_REG & XUL_SR_RX_FIFO_VALID_DATA));
;
/* Read Character */ /* Read Character */
*ptr = serial->hw_base->Rx_FIFO; *ptr = serial->hw_base->Rx_FIFO;
@ -227,8 +229,7 @@ static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buff
/* stream mode */ /* stream mode */
if (*ptr == '\n') if (*ptr == '\n')
{ {
while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY)) while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
;
serial->hw_base->Tx_FIFO = '\r'; serial->hw_base->Tx_FIFO = '\r';
} }
@ -237,8 +238,11 @@ static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buff
/* Transmit Character */ /* Transmit Character */
serial->hw_base->Tx_FIFO = *ptr; serial->hw_base->Tx_FIFO = *ptr;
ptr++; if (*ptr & 1)
size--; rt_hw_board_led_on(2);
else
rt_hw_board_led_off(2);
ptr ++; size --;
} }
} }
else else
@ -246,13 +250,15 @@ static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buff
while (size) while (size)
{ {
/* Wait for Empty Tx Buffer */ /* Wait for Empty Tx Buffer */
while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY)) while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
;
/* Transmit Character */ /* Transmit Character */
serial->hw_base->Tx_FIFO = *ptr; serial->hw_base->Tx_FIFO = *ptr;
ptr++; if (*ptr & 1)
size--; rt_hw_board_led_on(2);
else
rt_hw_board_led_off(2);
ptr ++; size --;
} }
} }
} }
@ -288,8 +294,8 @@ rt_err_t rt_hw_serial_init()
/* init serial device private data */ /* init serial device private data */
serial1.hw_base = (struct rt_mb_uart_lite_hw*)XPAR_USB_UART_BASEADDR; serial1.hw_base = (struct rt_mb_uart_lite_hw*)XPAR_USB_UART_BASEADDR;
serial1.peripheral_id = XPAR_INTC_0_UARTLITE_1_VEC_ID; serial1.peripheral_id = XPAR_UARTLITE_1_DEVICE_ID;
serial1.baudrate = 9600; serial1.baudrate = 115200;
/* set device virtual interface */ /* set device virtual interface */
device->init = rt_serial_init; device->init = rt_serial_init;
@ -303,6 +309,8 @@ rt_err_t rt_hw_serial_init()
rt_device_register(device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); rt_device_register(device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
#endif #endif
return RT_EOK; return RT_EOK;
} }

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@ -16,6 +16,8 @@
extern void *_SDA_BASE_; extern void *_SDA_BASE_;
extern void *_SDA2_BASE_; extern void *_SDA2_BASE_;
/** /**
* This function will initialize thread stack * This function will initialize thread stack
* *
@ -26,7 +28,8 @@ extern void *_SDA2_BASE_;
* *
* @return stack address * @return stack address
*/ */
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_addr, void *texit) rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
rt_uint8_t *stack_addr, void *texit)
{ {
unsigned long *stk; unsigned long *stk;

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@ -20,14 +20,17 @@
#include "xintc_i.h" #include "xintc_i.h"
#include "xintc_l.h" #include "xintc_l.h"
#define MAX_HANDLERS XPAR_INTC_MAX_NUM_INTR_INPUTS #define MAX_HANDLERS XPAR_INTC_MAX_NUM_INTR_INPUTS
extern XIntc int_ctl; /* The instance of the Interrupt Controller */ extern XIntc int_ctl; /* The instance of the Interrupt Controller */
extern rt_uint32_t rt_interrupt_nest; extern rt_uint32_t rt_interrupt_nest;
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread; rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag; rt_uint32_t rt_thread_switch_interrupt_flag;
void rt_hw_interrupt_handler(int vector) void rt_hw_interrupt_handler(int vector)
{ {
rt_kprintf("Unhandled interrupt %d occured!!!\n", vector); rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
@ -42,8 +45,10 @@ void rt_hw_interrupt_init()
XIntc_Config *CfgPtr; XIntc_Config *CfgPtr;
CfgPtr = &XIntc_ConfigTable[0]; CfgPtr = &XIntc_ConfigTable[0];
for (index = 0; index < MAX_HANDLERS; index ++) for (index = 0; index < MAX_HANDLERS; index ++)
{ {
CfgPtr->HandlerTable[index].Handler = (XInterruptHandler)rt_hw_interrupt_handler; CfgPtr->HandlerTable[index].Handler = (XInterruptHandler)rt_hw_interrupt_handler;
@ -89,10 +94,8 @@ void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_ha
if(vector >= 0 && vector < MAX_HANDLERS) if(vector >= 0 && vector < MAX_HANDLERS)
{ {
if (*old_handler != RT_NULL) if (*old_handler != RT_NULL) *old_handler = (rt_isr_handler_t)CfgPtr->HandlerTable[vector].Handler;
*old_handler = (rt_isr_handler_t) CfgPtr->HandlerTable[vector].Handler; if (new_handler != RT_NULL) CfgPtr->HandlerTable[vector].Handler = (XInterruptHandler)new_handler;
if (new_handler != RT_NULL)
CfgPtr->HandlerTable[vector].Handler = (XInterruptHandler) new_handler;
} }
} }
@ -125,6 +128,7 @@ void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_ha
* *
******************************************************************************/ ******************************************************************************/
void rt_hw_trap_irq(void ) void rt_hw_trap_irq(void )
{ {
u32 intr_status; u32 intr_status;
@ -133,6 +137,7 @@ void rt_hw_trap_irq(void)
volatile u32 reg; /* used as bit bucket */ volatile u32 reg; /* used as bit bucket */
XIntc_Config *cfg_ptr; XIntc_Config *cfg_ptr;
/* Get the configuration data using the device ID */ /* Get the configuration data using the device ID */
cfg_ptr = &XIntc_ConfigTable[0]; cfg_ptr = &XIntc_ConfigTable[0];
@ -203,3 +208,4 @@ void rt_hw_trap_irq(void)
} }
} }