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[bsp]SECTION=>RT_SECTION(与catch2中SECTION冲突)

This commit is contained in:
liruncong 2021-02-09 23:25:56 +08:00
parent 0208fc5546
commit 6df5634b52
10 changed files with 10 additions and 10 deletions
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2
bsp/dm365/applications/board.c
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@ -41,7 +41,7 @@
rt_uint8_t _fiq_stack_start[1024];
rt_uint8_t _undefined_stack_start[512];
rt_uint8_t _abort_stack_start[512];
rt_uint8_t _svc_stack_start[1024] SECTION(".nobss");
rt_uint8_t _svc_stack_start[1024] RT_SECTION(".nobss");
extern unsigned char __bss_start;
extern unsigned char __bss_end;
#endif

2
bsp/fh8620/platform/fh8620/iot_cam/startup.c
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@ -63,7 +63,7 @@ rt_uint8_t _irq_stack_start[1024];
rt_uint8_t _fiq_stack_start[1024];
rt_uint8_t _undefined_stack_start[512];
rt_uint8_t _abort_stack_start[512];
rt_uint8_t _svc_stack_start[4096] SECTION(".nobss");
rt_uint8_t _svc_stack_start[4096] RT_SECTION(".nobss");
extern unsigned char __bss_start;
extern unsigned char __bss_end;

2
bsp/imxrt/libraries/drivers/drv_lcd.c
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@ -46,7 +46,7 @@ struct imxrt_lcd
};
static struct imxrt_lcd lcd;
ALIGN(64) static uint16_t frame_buffer[LCD_HEIGHT][LCD_WIDTH] SECTION("NonCacheable");
ALIGN(64) static uint16_t frame_buffer[LCD_HEIGHT][LCD_WIDTH] RT_SECTION("NonCacheable");
static rt_err_t imxrt_lcd_init(rt_device_t device)
{

2
bsp/imxrt/libraries/drivers/drv_sdio.c
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@ -61,7 +61,7 @@ static int enable_log = 1;
/* Endian mode. */
#define USDHC_ENDIAN_MODE kUSDHC_EndianModeLittle
ALIGN(USDHC_ADMA2_ADDR_ALIGN) uint32_t g_usdhcAdma2Table[USDHC_ADMA_TABLE_WORDS] SECTION("NonCacheable");
ALIGN(USDHC_ADMA2_ADDR_ALIGN) uint32_t g_usdhcAdma2Table[USDHC_ADMA_TABLE_WORDS] RT_SECTION("NonCacheable");
struct imxrt_mmcsd
{

2
bsp/lpc43xx/M0/applications/vbus_drv.c
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@ -14,7 +14,7 @@
#include <vbus.h>
#include <board.h>
struct rt_vbus_ring rt_vbus_rings[2] SECTION("vbus_ring");
struct rt_vbus_ring rt_vbus_rings[2] RT_SECTION("vbus_ring");
int rt_vbus_do_init(void)
{

2
bsp/lpc43xx/M4/applications/application.c
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@ -22,7 +22,7 @@
#include <vbus.h>
#endif
static const unsigned char _M0_CODE[] SECTION("M0_CODE") = {
static const unsigned char _M0_CODE[] RT_SECTION("M0_CODE") = {
#include "M0_CODE.h"
};

2
bsp/lpc43xx/M4/applications/vbus_drv.c
View File

@ -14,7 +14,7 @@
#include <vbus.h>
#include <board.h>
struct rt_vbus_ring rt_vbus_rings[2] SECTION("vbus_ring");
struct rt_vbus_ring rt_vbus_rings[2] RT_SECTION("vbus_ring");
int rt_vbus_do_init(void)
{

2
bsp/lpc43xx/drivers/drv_emac.c
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@ -20,7 +20,7 @@
#define EMAC_PHY_100MBIT 2
#define MAX_ADDR_LEN 6
static rt_uint32_t ETH_RAM_BASE[4 * 1024] SECTION("ETH_RAM");
static rt_uint32_t ETH_RAM_BASE[4 * 1024] RT_SECTION("ETH_RAM");
/* EMAC variables located in 16K Ethernet SRAM */
#define RX_DESC_BASE (uint32_t)&ETH_RAM_BASE[0]

2
bsp/mini2440/drivers/board.c
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@ -35,7 +35,7 @@
rt_uint8_t _fiq_stack_start[1024];
rt_uint8_t _undefined_stack_start[512];
rt_uint8_t _abort_stack_start[512];
rt_uint8_t _svc_stack_start[4096] SECTION(".nobss");
rt_uint8_t _svc_stack_start[4096] RT_SECTION(".nobss");
#endif
#if defined(__CC_ARM)

2
bsp/sep6200/application/startup.c
View File

@ -42,7 +42,7 @@ rt_uint8_t _irq_stack_start[1024];
rt_uint8_t _fiq_stack_start[1024];
rt_uint8_t _undefined_stack_start[512];
rt_uint8_t _abort_stack_start[512];
rt_uint8_t _priv_stack_start[4096]; SECTION(".nobss");
rt_uint8_t _priv_stack_start[4096]; RT_SECTION(".nobss");
extern unsigned char __bss_start;
extern unsigned char __bss_end;