zhuangwei123
parent
6725dfa598
commit
6a1fee138c
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@ -32,102 +32,102 @@
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struct rt_uart_ls1c
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{
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ls1c_uart_t UARTx;
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rt_uint32_t IRQ;
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rt_uint32_t IRQ;
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};
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static rt_err_t ls1c_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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ls1c_uart_info_t uart_info = {0};
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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ls1c_uart_info_t uart_info = {0};
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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// 初始化串口
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uart_info.UARTx = uart_dev->UARTx;
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uart_info.baudrate = cfg->baud_rate;
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uart_info.rx_enable= TRUE;
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// 初始化串口
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uart_info.UARTx = uart_dev->UARTx;
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uart_info.baudrate = cfg->baud_rate;
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uart_info.rx_enable = TRUE;
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uart_init(&uart_info);
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return RT_EOK;
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return RT_EOK;
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}
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static rt_err_t ls1c_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */
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rt_hw_interrupt_mask(uart_dev->IRQ);
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break;
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break;
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case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */
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rt_hw_interrupt_umask(uart_dev->IRQ);
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break;
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case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */
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rt_hw_interrupt_umask(uart_dev->IRQ);
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break;
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default:
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break;
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}
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default:
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break;
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}
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return RT_EOK;
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return RT_EOK;
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}
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static int ls1c_uart_putc(struct rt_serial_device *serial, char c)
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{
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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uart_putc(uart_dev->UARTx, c);
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RT_ASSERT(serial != RT_NULL);
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return 1;
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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uart_putc(uart_dev->UARTx, c);
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return 1;
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}
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static int ls1c_uart_getc(struct rt_serial_device *serial)
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{
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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void *uart_base = uart_get_base(uart_dev->UARTx);
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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if(LSR_RXRDY & reg_read_8(uart_base + LS1C_UART_LSR_OFFSET))
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{
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return reg_read_8(uart_base + LS1C_UART_DAT_OFFSET);
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}
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RT_ASSERT(serial != RT_NULL);
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return -1;
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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void *uart_base = uart_get_base(uart_dev->UARTx);
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if (LSR_RXRDY & reg_read_8(uart_base + LS1C_UART_LSR_OFFSET))
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{
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return reg_read_8(uart_base + LS1C_UART_DAT_OFFSET);
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}
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return -1;
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}
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/* UART interrupt handler */
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static void uart_irq_handler(int vector, void *param)
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{
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struct rt_serial_device *serial = (struct rt_serial_device*)param;
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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struct rt_serial_device *serial = (struct rt_serial_device *)param;
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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void *uart_base = uart_get_base(uart_dev->UARTx);
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unsigned char iir = reg_read_8(uart_base + LS1C_UART_IIR_OFFSET);
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RT_ASSERT(serial != RT_NULL);
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// 判断是否为接收超时或接收到有效数据
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if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir))
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{
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rt_interrupt_enter();
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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rt_interrupt_leave();
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}
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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void *uart_base = uart_get_base(uart_dev->UARTx);
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unsigned char iir = reg_read_8(uart_base + LS1C_UART_IIR_OFFSET);
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// 判断是否为接收超时或接收到有效数据
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if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir))
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{
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rt_interrupt_enter();
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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rt_interrupt_leave();
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}
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}
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@ -159,12 +159,12 @@ void rt_hw_uart_init(void)
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serial2.ops = &stm32_uart_ops;
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serial2.config = config;
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pin_set_purpose(36, PIN_PURPOSE_OTHER);
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pin_set_purpose(37, PIN_PURPOSE_OTHER);
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pin_set_remap(36, PIN_REMAP_SECOND);
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pin_set_remap(37, PIN_REMAP_SECOND);
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pin_set_purpose(36, PIN_PURPOSE_OTHER);
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pin_set_purpose(37, PIN_PURPOSE_OTHER);
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pin_set_remap(36, PIN_REMAP_SECOND);
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pin_set_remap(37, PIN_REMAP_SECOND);
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rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial2, "UART2");
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rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial2, "UART2");
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/* register UART1 device */
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rt_hw_serial_register(&serial2,
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@ -1,11 +1,21 @@
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/*
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* File : drv_uart.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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* COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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@ -18,84 +28,84 @@
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#include "ls1c.h"
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#define DEV_CLK 252000000 // 252MHz
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#define UART_BAUDRATE 115200
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#define UART_BAUDRATE 115200
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#define UART0_BASE 0xBFE40000
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//#define UART0_1_BASE 0xBFE41000
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#define UART1_BASE 0xBFE44000
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#define UART2_BASE 0xBFE48000
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#define UART3_BASE 0xBFE4C000
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#define UART4_BASE 0xBFE4C400
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#define UART5_BASE 0xBFE4C500
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#define UART6_BASE 0xBFE4C600
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#define UART7_BASE 0xBFE4C700
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#define UART8_BASE 0xBFE4C800
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#define UART9_BASE 0xBFE4C900
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#define UART10_BASE 0xBFE4Ca00
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#define UART11_BASE 0xBFE4Cb00
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#define UART0_BASE 0xBFE40000
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//#define UART0_1_BASE 0xBFE41000
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#define UART1_BASE 0xBFE44000
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#define UART2_BASE 0xBFE48000
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#define UART3_BASE 0xBFE4C000
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#define UART4_BASE 0xBFE4C400
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#define UART5_BASE 0xBFE4C500
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#define UART6_BASE 0xBFE4C600
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#define UART7_BASE 0xBFE4C700
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#define UART8_BASE 0xBFE4C800
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#define UART9_BASE 0xBFE4C900
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#define UART10_BASE 0xBFE4Ca00
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#define UART11_BASE 0xBFE4Cb00
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/* UART registers */
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#define UART_DAT(base) __REG8(base + 0x00)
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#define UART_IER(base) __REG8(base + 0x01)
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#define UART_IIR(base) __REG8(base + 0x02)
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#define UART_FCR(base) __REG8(base + 0x02)
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#define UART_LCR(base) __REG8(base + 0x03)
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#define UART_MCR(base) __REG8(base + 0x04)
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#define UART_LSR(base) __REG8(base + 0x05)
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#define UART_MSR(base) __REG8(base + 0x06)
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#define UART_DAT(base) __REG8(base + 0x00)
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#define UART_IER(base) __REG8(base + 0x01)
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#define UART_IIR(base) __REG8(base + 0x02)
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#define UART_FCR(base) __REG8(base + 0x02)
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#define UART_LCR(base) __REG8(base + 0x03)
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#define UART_MCR(base) __REG8(base + 0x04)
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#define UART_LSR(base) __REG8(base + 0x05)
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#define UART_MSR(base) __REG8(base + 0x06)
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#define UART_LSB(base) __REG8(base + 0x00)
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#define UART_MSB(base) __REG8(base + 0x01)
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#define UART_LSB(base) __REG8(base + 0x00)
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#define UART_MSB(base) __REG8(base + 0x01)
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/* UART0 registers */
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#define UART0_DAT __REG8(UART0_BASE + 0x00)
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#define UART0_IER __REG8(UART0_BASE + 0x01)
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#define UART0_IIR __REG8(UART0_BASE + 0x02)
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#define UART0_FCR __REG8(UART0_BASE + 0x02)
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#define UART0_LCR __REG8(UART0_BASE + 0x03)
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#define UART0_MCR __REG8(UART0_BASE + 0x04)
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#define UART0_LSR __REG8(UART0_BASE + 0x05)
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#define UART0_MSR __REG8(UART0_BASE + 0x06)
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#define UART0_DAT __REG8(UART0_BASE + 0x00)
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#define UART0_IER __REG8(UART0_BASE + 0x01)
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#define UART0_IIR __REG8(UART0_BASE + 0x02)
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#define UART0_FCR __REG8(UART0_BASE + 0x02)
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#define UART0_LCR __REG8(UART0_BASE + 0x03)
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#define UART0_MCR __REG8(UART0_BASE + 0x04)
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#define UART0_LSR __REG8(UART0_BASE + 0x05)
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#define UART0_MSR __REG8(UART0_BASE + 0x06)
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#define UART0_LSB __REG8(UART0_BASE + 0x00)
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#define UART0_MSB __REG8(UART0_BASE + 0x01)
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#define UART0_LSB __REG8(UART0_BASE + 0x00)
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#define UART0_MSB __REG8(UART0_BASE + 0x01)
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/* UART1 registers */
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#define UART1_DAT __REG8(UART1_BASE + 0x00)
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#define UART1_IER __REG8(UART1_BASE + 0x01)
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#define UART1_IIR __REG8(UART1_BASE + 0x02)
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#define UART1_FCR __REG8(UART1_BASE + 0x02)
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#define UART1_LCR __REG8(UART1_BASE + 0x03)
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#define UART1_MCR __REG8(UART1_BASE + 0x04)
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#define UART1_LSR __REG8(UART1_BASE + 0x05)
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#define UART1_MSR __REG8(UART1_BASE + 0x06)
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#define UART1_DAT __REG8(UART1_BASE + 0x00)
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#define UART1_IER __REG8(UART1_BASE + 0x01)
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#define UART1_IIR __REG8(UART1_BASE + 0x02)
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#define UART1_FCR __REG8(UART1_BASE + 0x02)
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#define UART1_LCR __REG8(UART1_BASE + 0x03)
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#define UART1_MCR __REG8(UART1_BASE + 0x04)
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#define UART1_LSR __REG8(UART1_BASE + 0x05)
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#define UART1_MSR __REG8(UART1_BASE + 0x06)
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#define UART1_LSB __REG8(UART1_BASE + 0x00)
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#define UART1_MSB __REG8(UART1_BASE + 0x01)
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#define UART1_LSB __REG8(UART1_BASE + 0x00)
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#define UART1_MSB __REG8(UART1_BASE + 0x01)
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/* UART interrupt enable register value */
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#define UARTIER_IME (1 << 3)
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#define UARTIER_ILE (1 << 2)
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#define UARTIER_ITXE (1 << 1)
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#define UARTIER_IRXE (1 << 0)
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#define UARTIER_IME (1 << 3)
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#define UARTIER_ILE (1 << 2)
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#define UARTIER_ITXE (1 << 1)
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#define UARTIER_IRXE (1 << 0)
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/* UART line control register value */
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#define UARTLCR_DLAB (1 << 7)
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#define UARTLCR_BCB (1 << 6)
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#define UARTLCR_SPB (1 << 5)
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#define UARTLCR_EPS (1 << 4)
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#define UARTLCR_PE (1 << 3)
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#define UARTLCR_SB (1 << 2)
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#define UARTLCR_DLAB (1 << 7)
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#define UARTLCR_BCB (1 << 6)
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#define UARTLCR_SPB (1 << 5)
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#define UARTLCR_EPS (1 << 4)
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#define UARTLCR_PE (1 << 3)
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#define UARTLCR_SB (1 << 2)
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/* UART line status register value */
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#define UARTLSR_ERROR (1 << 7)
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#define UARTLSR_TE (1 << 6)
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#define UARTLSR_TFE (1 << 5)
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#define UARTLSR_BI (1 << 4)
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#define UARTLSR_FE (1 << 3)
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#define UARTLSR_PE (1 << 2)
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#define UARTLSR_OE (1 << 1)
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#define UARTLSR_DR (1 << 0)
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#define UARTLSR_ERROR (1 << 7)
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#define UARTLSR_TE (1 << 6)
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#define UARTLSR_TFE (1 << 5)
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#define UARTLSR_BI (1 << 4)
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#define UARTLSR_FE (1 << 3)
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#define UARTLSR_PE (1 << 2)
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#define UARTLSR_OE (1 << 1)
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#define UARTLSR_DR (1 << 0)
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void rt_hw_uart_init(void);
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Reference in New Issue