add stm32 cl
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@33 bbd45198-f89e-11dd-88c7-29a3b14d5316
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@ -109,6 +109,7 @@ __heap_limit
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IMPORT EXTI15_10_IRQHandler
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IMPORT RTCAlarm_IRQHandler
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IMPORT USBWakeUp_IRQHandler
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; HD
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IMPORT TIM8_BRK_IRQHandler
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IMPORT TIM8_UP_IRQHandler
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IMPORT TIM8_TRG_COM_IRQHandler
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@ -126,6 +127,15 @@ __heap_limit
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IMPORT DMA2_Channel2_IRQHandler
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IMPORT DMA2_Channel3_IRQHandler
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IMPORT DMA2_Channel4_5_IRQHandler
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; CL (DMA2_Channel4 DMA2_Channel5 is alone)
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IMPORT DMA2_Channel5_IRQHandler ; DMA2 Channel5
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IMPORT ETH_IRQHandler ; Ethernet
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IMPORT ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
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IMPORT CAN2_TX_IRQHandler ; CAN2 TX
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IMPORT CAN2_RX0_IRQHandler ; CAN2 RX0
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IMPORT CAN2_RX1_IRQHandler ; CAN2 RX1
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IMPORT CAN2_SCE_IRQHandler ; CAN2 SCE
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IMPORT OTG_FS_IRQHandler ; USB OTG FS
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;*******************************************************************************
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; Fill-up the Vector Table entries with the exceptions ISR address
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@ -192,6 +202,7 @@ __Vectors DCD __initial_sp ; Top of Stack
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DCD EXTI15_10_IRQHandler
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DCD RTCAlarm_IRQHandler
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DCD USBWakeUp_IRQHandler
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; HD
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DCD TIM8_BRK_IRQHandler
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DCD TIM8_UP_IRQHandler
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DCD TIM8_TRG_COM_IRQHandler
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@ -209,6 +220,16 @@ __Vectors DCD __initial_sp ; Top of Stack
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DCD DMA2_Channel2_IRQHandler
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DCD DMA2_Channel3_IRQHandler
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DCD DMA2_Channel4_5_IRQHandler
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; CL (DMA2_Channel4 DMA2_Channel5 is alone)
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DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
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DCD ETH_IRQHandler ; Ethernet
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DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
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DCD CAN2_TX_IRQHandler ; CAN2 TX
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DCD CAN2_RX0_IRQHandler ; CAN2 RX0
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DCD CAN2_RX1_IRQHandler ; CAN2 RX1
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DCD CAN2_SCE_IRQHandler ; CAN2 SCE
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DCD OTG_FS_IRQHandler ; USB OTG FS
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AREA |.text|, CODE, READONLY
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