ping test e2000d pass

bsp/phytium/aarch64/.config

@@ -8,7 +8,7 @@ CONFIG_RT_NAME_MAX=16
 # CONFIG_RT_USING_NANO is not set
 # CONFIG_RT_USING_AMP is not set
 CONFIG_RT_USING_SMP=y
-CONFIG_RT_CPUS_NR=4
+CONFIG_RT_CPUS_NR=2
 CONFIG_RT_ALIGN_SIZE=4
 # CONFIG_RT_THREAD_PRIORITY_8 is not set
 CONFIG_RT_THREAD_PRIORITY_32=y
@@ -44,7 +44,7 @@ CONFIG_RT_KLIBC_USING_PRINTF_LONGLONG=y
 CONFIG_RT_USING_DEBUG=y
 CONFIG_RT_DEBUGING_ASSERT=y
 CONFIG_RT_DEBUGING_COLOR=y
-CONFIG_RT_DEBUGING_CONTEXT=y
+# CONFIG_RT_DEBUGING_CONTEXT is not set
 # CONFIG_RT_DEBUGING_AUTO_INIT is not set
 # CONFIG_RT_DEBUGING_PAGE_LEAK is not set
 # CONFIG_RT_DEBUGING_SPINLOCK is not set
@@ -91,7 +91,7 @@ CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
 CONFIG_RT_VER_NUM=0x50200
-# CONFIG_RT_USING_STDC_ATOMIC is not set
+CONFIG_RT_USING_STDC_ATOMIC=y
 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
 # end of RT-Thread Kernel
 
@@ -204,7 +204,7 @@ CONFIG_RT_USING_SERIAL_V1=y
 CONFIG_RT_SERIAL_USING_DMA=y
 CONFIG_RT_SERIAL_RB_BUFSZ=64
 CONFIG_RT_USING_CAN=y
-# CONFIG_RT_CAN_USING_HDR is not set
+CONFIG_RT_CAN_USING_HDR=y
 CONFIG_RT_CAN_USING_CANFD=y
 # CONFIG_RT_USING_CPUTIME is not set
 CONFIG_RT_USING_I2C=y
@@ -383,7 +383,7 @@ CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=16184
 CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
 CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192
 CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
-# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
+CONFIG_RT_LWIP_REASSEMBLY_FRAG=y
 CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
 CONFIG_LWIP_NETIF_LINK_CALLBACK=1
 CONFIG_RT_LWIP_NETIF_NAMESIZE=6
@@ -1286,7 +1286,11 @@ CONFIG_RT_USING_SPIM0=y
 CONFIG_RT_USING_SPIM1=y
 CONFIG_RT_USING_SPIM2=y
 CONFIG_RT_USING_SPIM3=y
-# CONFIG_BSP_USING_CAN is not set
+CONFIG_BSP_USING_CAN=y
+CONFIG_RT_USING_CANFD=y
+# CONFIG_RT_USING_FILTER is not set
+CONFIG_RT_USING_CAN0=y
+# CONFIG_RT_USING_CAN1 is not set
 # CONFIG_BSP_USING_GPIO is not set
 CONFIG_BSP_USING_QSPI=y
 CONFIG_RT_USING_QSPI0=y
@@ -1294,20 +1298,12 @@ CONFIG_USING_QSPI_CHANNEL0=y
 # CONFIG_USING_QSPI_CHANNEL1 is not set
 CONFIG_BSP_USING_ETH=y
 CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
-CONFIG_BSP_USING_PWM=y
+# CONFIG_BSP_USING_PWM is not set
-# CONFIG_RT_USING_PWM0 is not set
-# CONFIG_RT_USING_PWM1 is not set
-CONFIG_RT_USING_PWM2=y
-# CONFIG_RT_USING_PWM3 is not set
-# CONFIG_RT_USING_PWM4 is not set
-# CONFIG_RT_USING_PWM5 is not set
-# CONFIG_RT_USING_PWM6 is not set
-# CONFIG_RT_USING_PWM7 is not set
 CONFIG_BSP_USING_I2C=y
 CONFIG_I2C_USE_MIO=y
-CONFIG_RT_USING_MIO0=y
+# CONFIG_RT_USING_MIO0 is not set
-CONFIG_RT_USING_MIO1=y
+# CONFIG_RT_USING_MIO1 is not set
-CONFIG_RT_USING_MIO2=y
+# CONFIG_RT_USING_MIO2 is not set
 # CONFIG_RT_USING_MIO3 is not set
 # CONFIG_RT_USING_MIO4 is not set
 # CONFIG_RT_USING_MIO5 is not set
@@ -1315,22 +1311,24 @@ CONFIG_RT_USING_MIO2=y
 # CONFIG_RT_USING_MIO7 is not set
 # CONFIG_RT_USING_MIO8 is not set
 # CONFIG_RT_USING_MIO9 is not set
-CONFIG_RT_USING_MIO10=y
+# CONFIG_RT_USING_MIO10 is not set
 # CONFIG_RT_USING_MIO11 is not set
 # CONFIG_RT_USING_MIO12 is not set
 # CONFIG_RT_USING_MIO13 is not set
 # CONFIG_RT_USING_MIO14 is not set
-# CONFIG_RT_USING_MIO15 is not set
+CONFIG_RT_USING_MIO15=y
 # CONFIG_I2C_USE_CONTROLLER is not set
 CONFIG_BSP_USING_SDIF=y
 CONFIG_BSP_USING_SDCARD_FATFS=y
-# CONFIG_USING_SDIF0 is not set
+CONFIG_USING_SDIF0=y
+# CONFIG_USE_SDIF0_TF is not set
+CONFIG_USE_SDIF0_EMMC=y
 CONFIG_USING_SDIF1=y
 CONFIG_USE_SDIF1_TF=y
 # CONFIG_USE_SDIF1_EMMC is not set
 CONFIG_BSP_USING_DC=y
 # CONFIG_RT_USING_DC_CHANNEL0 is not set
-# CONFIG_RT_USING_DC_CHANNEL1 is not set
+CONFIG_RT_USING_DC_CHANNEL1=y
 # CONFIG_BSP_USING_XHCI is not set
 # CONFIG_BSP_USING_PUSB2 is not set
 # end of On-chip Peripheral Drivers
@@ -1343,7 +1341,7 @@ CONFIG_BSP_USING_DC=y
 CONFIG_BSP_USING_GIC=y
 CONFIG_BSP_USING_GICV3=y
 CONFIG_PHYTIUM_ARCH_AARCH64=y
-CONFIG_ARM_SPI_BIND_CPU_ID=2
+CONFIG_ARM_SPI_BIND_CPU_ID=0
 
 #
 # Standalone Setting
@@ -1353,15 +1351,16 @@ CONFIG_TARGET_ARMV8_AARCH64=y
 #
 # Soc configuration
 #
-CONFIG_TARGET_PHYTIUMPI=y
+# CONFIG_TARGET_PHYTIUMPI is not set
 # CONFIG_TARGET_E2000Q is not set
-# CONFIG_TARGET_E2000D is not set
+CONFIG_TARGET_E2000D=y
 # CONFIG_TARGET_E2000S is not set
 # CONFIG_TARGET_FT2004 is not set
 # CONFIG_TARGET_D2000 is not set
 # CONFIG_TARGET_PD2308 is not set
-CONFIG_SOC_NAME="phytiumpi"
+CONFIG_SOC_NAME="e2000"
-CONFIG_SOC_CORE_NUM=4
+CONFIG_TARGET_TYPE_NAME="d"
+CONFIG_SOC_CORE_NUM=2
 CONFIG_F32BIT_MEMORY_ADDRESS=0x80000000
 CONFIG_F32BIT_MEMORY_LENGTH=0x80000000
 CONFIG_F64BIT_MEMORY_ADDRESS=0x2000000000
@@ -1375,21 +1374,22 @@ CONFIG_DEFAULT_DEBUG_PRINT_UART1=y
 #
 # Board Configuration
 #
-CONFIG_BOARD_NAME="firefly"
+CONFIG_E2000D_DEMO_BOARD=y
+CONFIG_BOARD_NAME="demo"
+
+#
+# IO mux configuration when board start up
+#
 # CONFIG_USE_SPI_IOPAD is not set
 # CONFIG_USE_GPIO_IOPAD is not set
 # CONFIG_USE_CAN_IOPAD is not set
 # CONFIG_USE_QSPI_IOPAD is not set
 # CONFIG_USE_PWM_IOPAD is not set
+# CONFIG_USE_ADC_IOPAD is not set
 # CONFIG_USE_MIO_IOPAD is not set
 # CONFIG_USE_TACHO_IOPAD is not set
 # CONFIG_USE_UART_IOPAD is not set
 # CONFIG_USE_THIRD_PARTY_IOPAD is not set
-CONFIG_FIREFLY_DEMO_BOARD=y
-
-#
-# IO mux configuration when board start up
-#
 # end of IO mux configuration when board start up
 
 # CONFIG_CUS_DEMO_BOARD is not set

bsp/phytium/aarch64/configs/e2000d_demo_rtsmart

@@ -394,7 +394,7 @@ CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=16184
 CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
 CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192
 CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
-# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
+CONFIG_RT_LWIP_REASSEMBLY_FRAG=y
 CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
 CONFIG_LWIP_NETIF_LINK_CALLBACK=1
 CONFIG_RT_LWIP_NETIF_NAMESIZE=6

bsp/phytium/aarch64/configs/e2000d_demo_rtsmart.h

@@ -266,6 +266,7 @@
 #define RT_LWIP_ETHTHREAD_PRIORITY 12
 #define RT_LWIP_ETHTHREAD_STACKSIZE 8192
 #define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
+#define RT_LWIP_REASSEMBLY_FRAG
 #define LWIP_NETIF_STATUS_CALLBACK 1
 #define LWIP_NETIF_LINK_CALLBACK 1
 #define RT_LWIP_NETIF_NAMESIZE 6

bsp/phytium/aarch64/configs/e2000d_demo_rtthread

@@ -91,7 +91,7 @@ CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
 CONFIG_RT_VER_NUM=0x50200
-# CONFIG_RT_USING_STDC_ATOMIC is not set
+CONFIG_RT_USING_STDC_ATOMIC=y
 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
 # end of RT-Thread Kernel
 
@@ -383,7 +383,7 @@ CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=16184
 CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
 CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192
 CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
-# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
+CONFIG_RT_LWIP_REASSEMBLY_FRAG=y
 CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
 CONFIG_LWIP_NETIF_LINK_CALLBACK=1
 CONFIG_RT_LWIP_NETIF_NAMESIZE=6

bsp/phytium/aarch64/configs/e2000d_demo_rtthread.h

@@ -58,6 +58,7 @@
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart1"
 #define RT_VER_NUM 0x50200
+#define RT_USING_STDC_ATOMIC
 #define RT_BACKTRACE_LEVEL_MAX_NR 32
 /* end of RT-Thread Kernel */
 
@@ -246,6 +247,7 @@
 #define RT_LWIP_ETHTHREAD_PRIORITY 12
 #define RT_LWIP_ETHTHREAD_STACKSIZE 8192
 #define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
+#define RT_LWIP_REASSEMBLY_FRAG
 #define LWIP_NETIF_STATUS_CALLBACK 1
 #define LWIP_NETIF_LINK_CALLBACK 1
 #define RT_LWIP_NETIF_NAMESIZE 6

bsp/phytium/aarch64/configs/e2000q_demo_rtsmart

@@ -394,7 +394,7 @@ CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=16184
 CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
 CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192
 CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
-# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
+CONFIG_RT_LWIP_REASSEMBLY_FRAG=y
 CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
 CONFIG_LWIP_NETIF_LINK_CALLBACK=1
 CONFIG_RT_LWIP_NETIF_NAMESIZE=6

bsp/phytium/aarch64/configs/e2000q_demo_rtsmart.h

@@ -266,6 +266,7 @@
 #define RT_LWIP_ETHTHREAD_PRIORITY 12
 #define RT_LWIP_ETHTHREAD_STACKSIZE 8192
 #define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
+#define RT_LWIP_REASSEMBLY_FRAG
 #define LWIP_NETIF_STATUS_CALLBACK 1
 #define LWIP_NETIF_LINK_CALLBACK 1
 #define RT_LWIP_NETIF_NAMESIZE 6

bsp/phytium/aarch64/configs/e2000q_demo_rtthread

@@ -91,7 +91,7 @@ CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
 CONFIG_RT_VER_NUM=0x50200
-# CONFIG_RT_USING_STDC_ATOMIC is not set
+CONFIG_RT_USING_STDC_ATOMIC=y
 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
 # end of RT-Thread Kernel
 
@@ -383,7 +383,7 @@ CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=16184
 CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
 CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192
 CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
-# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
+CONFIG_RT_LWIP_REASSEMBLY_FRAG=y
 CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
 CONFIG_LWIP_NETIF_LINK_CALLBACK=1
 CONFIG_RT_LWIP_NETIF_NAMESIZE=6

bsp/phytium/aarch64/configs/e2000q_demo_rtthread.h

@@ -58,6 +58,7 @@
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart1"
 #define RT_VER_NUM 0x50200
+#define RT_USING_STDC_ATOMIC
 #define RT_BACKTRACE_LEVEL_MAX_NR 32
 /* end of RT-Thread Kernel */
 
@@ -246,6 +247,7 @@
 #define RT_LWIP_ETHTHREAD_PRIORITY 12
 #define RT_LWIP_ETHTHREAD_STACKSIZE 8192
 #define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
+#define RT_LWIP_REASSEMBLY_FRAG
 #define LWIP_NETIF_STATUS_CALLBACK 1
 #define LWIP_NETIF_LINK_CALLBACK 1
 #define RT_LWIP_NETIF_NAMESIZE 6

bsp/phytium/aarch64/configs/phytium_pi_rtsmart

@@ -394,7 +394,7 @@ CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=16184
 CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
 CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192
 CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
-# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
+CONFIG_RT_LWIP_REASSEMBLY_FRAG=y
 CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
 CONFIG_LWIP_NETIF_LINK_CALLBACK=1
 CONFIG_RT_LWIP_NETIF_NAMESIZE=6

bsp/phytium/aarch64/configs/phytium_pi_rtsmart.h

@@ -265,6 +265,7 @@
 #define RT_LWIP_ETHTHREAD_PRIORITY 12
 #define RT_LWIP_ETHTHREAD_STACKSIZE 8192
 #define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
+#define RT_LWIP_REASSEMBLY_FRAG
 #define LWIP_NETIF_STATUS_CALLBACK 1
 #define LWIP_NETIF_LINK_CALLBACK 1
 #define RT_LWIP_NETIF_NAMESIZE 6

bsp/phytium/aarch64/configs/phytium_pi_rtthread

@@ -91,7 +91,7 @@ CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
 CONFIG_RT_VER_NUM=0x50200
-# CONFIG_RT_USING_STDC_ATOMIC is not set
+CONFIG_RT_USING_STDC_ATOMIC=y
 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
 # end of RT-Thread Kernel
 
@@ -383,7 +383,7 @@ CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=16184
 CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
 CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192
 CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
-# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
+CONFIG_RT_LWIP_REASSEMBLY_FRAG=y
 CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
 CONFIG_LWIP_NETIF_LINK_CALLBACK=1
 CONFIG_RT_LWIP_NETIF_NAMESIZE=6

bsp/phytium/aarch64/configs/phytium_pi_rtthread.h

@@ -59,6 +59,7 @@
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart1"
 #define RT_VER_NUM 0x50200
+#define RT_USING_STDC_ATOMIC
 #define RT_BACKTRACE_LEVEL_MAX_NR 32
 /* end of RT-Thread Kernel */
 
@@ -246,6 +247,7 @@
 #define RT_LWIP_ETHTHREAD_PRIORITY 12
 #define RT_LWIP_ETHTHREAD_STACKSIZE 8192
 #define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
+#define RT_LWIP_REASSEMBLY_FRAG
 #define LWIP_NETIF_STATUS_CALLBACK 1
 #define LWIP_NETIF_LINK_CALLBACK 1
 #define RT_LWIP_NETIF_NAMESIZE 6

bsp/phytium/aarch64/rtconfig.h

@@ -5,7 +5,7 @@
 
 #define RT_NAME_MAX 16
 #define RT_USING_SMP
-#define RT_CPUS_NR 4
+#define RT_CPUS_NR 2
 #define RT_ALIGN_SIZE 4
 #define RT_THREAD_PRIORITY_32
 #define RT_THREAD_PRIORITY_MAX 32
@@ -32,7 +32,6 @@
 #define RT_USING_DEBUG
 #define RT_DEBUGING_ASSERT
 #define RT_DEBUGING_COLOR
-#define RT_DEBUGING_CONTEXT
 
 /* Inter-Thread communication */
 
@@ -59,6 +58,7 @@
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart1"
 #define RT_VER_NUM 0x50200
+#define RT_USING_STDC_ATOMIC
 #define RT_BACKTRACE_LEVEL_MAX_NR 32
 /* end of RT-Thread Kernel */
 
@@ -141,6 +141,7 @@
 #define RT_SERIAL_USING_DMA
 #define RT_SERIAL_RB_BUFSZ 64
 #define RT_USING_CAN
+#define RT_CAN_USING_HDR
 #define RT_CAN_USING_CANFD
 #define RT_USING_I2C
 #define RT_USING_I2C_BITOPS
@@ -246,6 +247,7 @@
 #define RT_LWIP_ETHTHREAD_PRIORITY 12
 #define RT_LWIP_ETHTHREAD_STACKSIZE 8192
 #define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
+#define RT_LWIP_REASSEMBLY_FRAG
 #define LWIP_NETIF_STATUS_CALLBACK 1
 #define LWIP_NETIF_LINK_CALLBACK 1
 #define RT_LWIP_NETIF_NAMESIZE 6
@@ -450,24 +452,25 @@
 #define RT_USING_SPIM1
 #define RT_USING_SPIM2
 #define RT_USING_SPIM3
+#define BSP_USING_CAN
+#define RT_USING_CANFD
+#define RT_USING_CAN0
 #define BSP_USING_QSPI
 #define RT_USING_QSPI0
 #define USING_QSPI_CHANNEL0
 #define BSP_USING_ETH
 #define RT_LWIP_PBUF_POOL_BUFSIZE 1700
-#define BSP_USING_PWM
-#define RT_USING_PWM2
 #define BSP_USING_I2C
 #define I2C_USE_MIO
-#define RT_USING_MIO0
+#define RT_USING_MIO15
-#define RT_USING_MIO1
-#define RT_USING_MIO2
-#define RT_USING_MIO10
 #define BSP_USING_SDIF
 #define BSP_USING_SDCARD_FATFS
+#define USING_SDIF0
+#define USE_SDIF0_EMMC
 #define USING_SDIF1
 #define USE_SDIF1_TF
 #define BSP_USING_DC
+#define RT_USING_DC_CHANNEL1
 /* end of On-chip Peripheral Drivers */
 
 /* Board extended module Drivers */
@@ -476,7 +479,7 @@
 #define BSP_USING_GIC
 #define BSP_USING_GICV3
 #define PHYTIUM_ARCH_AARCH64
-#define ARM_SPI_BIND_CPU_ID 2
+#define ARM_SPI_BIND_CPU_ID 0
 
 /* Standalone Setting */
 
@@ -484,9 +487,10 @@
 
 /* Soc configuration */
 
-#define TARGET_PHYTIUMPI
+#define TARGET_E2000D
-#define SOC_NAME "phytiumpi"
+#define SOC_NAME "e2000"
-#define SOC_CORE_NUM 4
+#define TARGET_TYPE_NAME "d"
+#define SOC_CORE_NUM 2
 #define F32BIT_MEMORY_ADDRESS 0x80000000
 #define F32BIT_MEMORY_LENGTH 0x80000000
 #define F64BIT_MEMORY_ADDRESS 0x2000000000
@@ -497,8 +501,8 @@
 
 /* Board Configuration */
 
-#define BOARD_NAME "firefly"
+#define E2000D_DEMO_BOARD
-#define FIREFLY_DEMO_BOARD
+#define BOARD_NAME "demo"
 
 /* IO mux configuration when board start up */