[bsp][cvitek] Initialize the Milk-V Duo 256M using the device tree (#8841)
Initialize the board using the device tree
This commit is contained in:
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ee8c61126d
commit
62544df564
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@ -33,11 +33,14 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192
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#
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#
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# kservice optimization
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# kservice optimization
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#
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#
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CONFIG_RT_KSERVICE_USING_STDLIB=y
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# CONFIG_RT_KSERVICE_USING_STDLIB_MEMORY is not set
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# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
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# CONFIG_RT_USING_TINY_FFS is not set
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# CONFIG_RT_USING_TINY_FFS is not set
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CONFIG_RT_KPRINTF_USING_LONGLONG=y
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#
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# klibc optimization
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#
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# CONFIG_RT_KLIBC_USING_STDLIB is not set
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# CONFIG_RT_KLIBC_USING_TINY_SIZE is not set
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CONFIG_RT_KLIBC_USING_PRINTF_LONGLONG=y
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CONFIG_RT_USING_DEBUG=y
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CONFIG_RT_USING_DEBUG=y
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CONFIG_RT_DEBUGING_COLOR=y
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CONFIG_RT_DEBUGING_COLOR=y
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CONFIG_RT_DEBUGING_CONTEXT=y
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CONFIG_RT_DEBUGING_CONTEXT=y
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@ -82,7 +85,7 @@ CONFIG_RT_USING_SCHED_THREAD_CTX=y
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=256
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CONFIG_RT_CONSOLEBUF_SIZE=256
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
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CONFIG_RT_VER_NUM=0x50100
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CONFIG_RT_VER_NUM=0x50200
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CONFIG_RT_USING_STDC_ATOMIC=y
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CONFIG_RT_USING_STDC_ATOMIC=y
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CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
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CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
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@ -173,7 +176,7 @@ CONFIG_RT_USING_DFS_ROMFS=y
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#
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#
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# Device Drivers
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# Device Drivers
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#
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#
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# CONFIG_RT_USING_DM is not set
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CONFIG_RT_USING_DM=y
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CONFIG_RT_USING_DEVICE_IPC=y
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CONFIG_RT_USING_DEVICE_IPC=y
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CONFIG_RT_UNAMED_PIPE_NUMBER=64
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CONFIG_RT_UNAMED_PIPE_NUMBER=64
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CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
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CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
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@ -224,8 +227,14 @@ CONFIG_RT_USING_VIRTIO_CONSOLE=y
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CONFIG_RT_USING_VIRTIO_CONSOLE_PORT_MAX_NR=4
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CONFIG_RT_USING_VIRTIO_CONSOLE_PORT_MAX_NR=4
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CONFIG_RT_USING_VIRTIO_GPU=y
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CONFIG_RT_USING_VIRTIO_GPU=y
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CONFIG_RT_USING_VIRTIO_INPUT=y
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CONFIG_RT_USING_VIRTIO_INPUT=y
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CONFIG_RT_USING_OFW=y
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# CONFIG_RT_USING_BUILTIN_FDT is not set
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CONFIG_RT_FDT_EARLYCON_MSG_SIZE=128
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# CONFIG_RT_USING_PIC is not set
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CONFIG_RT_USING_PIN=y
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CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_PINCTRL is not set
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CONFIG_RT_USING_KTIME=y
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CONFIG_RT_USING_KTIME=y
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CONFIG_RT_USING_CLK=y
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# CONFIG_RT_USING_HWTIMER is not set
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# CONFIG_RT_USING_HWTIMER is not set
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#
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#
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@ -14,9 +14,16 @@
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#include <mm_page.h>
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#include <mm_page.h>
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#include <drv_uart.h>
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#include <drv_uart.h>
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#include <gtimer.h>
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#include <gtimer.h>
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#include <setup.h>
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extern size_t MMUTable[];
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extern size_t MMUTable[];
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#ifndef RT_USING_OFW
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void idle_wfi(void)
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{
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asm volatile("wfi");
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}
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#ifdef RT_USING_SMART
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#ifdef RT_USING_SMART
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struct mem_desc platform_mem_desc[] = {
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struct mem_desc platform_mem_desc[] = {
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{KERNEL_VADDR_START, KERNEL_VADDR_START + 0x0FFFFFFF, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM},
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{KERNEL_VADDR_START, KERNEL_VADDR_START + 0x0FFFFFFF, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM},
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@ -31,13 +38,6 @@ struct mem_desc platform_mem_desc[] =
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const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]);
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const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]);
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void idle_wfi(void)
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{
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asm volatile("wfi");
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}
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static rt_ubase_t pinmux_base = RT_NULL;
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void rt_hw_board_init(void)
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void rt_hw_board_init(void)
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{
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{
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#ifdef RT_USING_SMART
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#ifdef RT_USING_SMART
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@ -76,6 +76,21 @@ void rt_hw_board_init(void)
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rt_components_board_init();
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rt_components_board_init();
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#endif
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#endif
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}
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}
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#else
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void rt_hw_board_init(void)
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{
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rt_fdt_commit_memregion_early(&(rt_region_t)
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{
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.name = "memheap",
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.start = (rt_size_t)rt_kmem_v2p((void *)HEAP_BEGIN),
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.end = (rt_size_t)rt_kmem_v2p((void *)HEAP_END),
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}, RT_TRUE);
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rt_hw_common_setup();
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}
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#endif /* RT_USING_OFW */
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static rt_ubase_t pinmux_base = RT_NULL;
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rt_ubase_t pinmux_base_ioremap(void)
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rt_ubase_t pinmux_base_ioremap(void)
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{
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{
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@ -24,8 +24,10 @@
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/* kservice optimization */
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/* kservice optimization */
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#define RT_KSERVICE_USING_STDLIB
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#define RT_KPRINTF_USING_LONGLONG
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/* klibc optimization */
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#define RT_KLIBC_USING_PRINTF_LONGLONG
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#define RT_USING_DEBUG
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#define RT_USING_DEBUG
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#define RT_DEBUGING_COLOR
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#define RT_DEBUGING_COLOR
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#define RT_DEBUGING_CONTEXT
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#define RT_DEBUGING_CONTEXT
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@ -56,7 +58,7 @@
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#define RT_USING_CONSOLE
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#define RT_USING_CONSOLE
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#define RT_CONSOLEBUF_SIZE 256
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#define RT_CONSOLEBUF_SIZE 256
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#define RT_CONSOLE_DEVICE_NAME "uart0"
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#define RT_CONSOLE_DEVICE_NAME "uart0"
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#define RT_VER_NUM 0x50100
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#define RT_VER_NUM 0x50200
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#define RT_USING_STDC_ATOMIC
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#define RT_USING_STDC_ATOMIC
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#define RT_BACKTRACE_LEVEL_MAX_NR 32
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#define RT_BACKTRACE_LEVEL_MAX_NR 32
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@ -122,6 +124,7 @@
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/* Device Drivers */
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/* Device Drivers */
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#define RT_USING_DM
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#define RT_USING_DEVICE_IPC
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#define RT_USING_DEVICE_IPC
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#define RT_UNAMED_PIPE_NUMBER 64
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#define RT_UNAMED_PIPE_NUMBER 64
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#define RT_USING_SYSTEM_WORKQUEUE
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#define RT_USING_SYSTEM_WORKQUEUE
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@ -145,8 +148,11 @@
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#define RT_USING_VIRTIO_CONSOLE_PORT_MAX_NR 4
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#define RT_USING_VIRTIO_CONSOLE_PORT_MAX_NR 4
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#define RT_USING_VIRTIO_GPU
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#define RT_USING_VIRTIO_GPU
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#define RT_USING_VIRTIO_INPUT
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#define RT_USING_VIRTIO_INPUT
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#define RT_USING_OFW
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#define RT_FDT_EARLYCON_MSG_SIZE 128
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#define RT_USING_PIN
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#define RT_USING_PIN
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#define RT_USING_KTIME
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#define RT_USING_KTIME
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#define RT_USING_CLK
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/* Using USB */
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/* Using USB */
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@ -252,45 +252,45 @@ int rt_hw_uart_init(void)
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PINMUX_CONFIG(UART0_RX, UART0_RX);
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PINMUX_CONFIG(UART0_RX, UART0_RX);
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PINMUX_CONFIG(UART0_TX, UART0_TX);
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PINMUX_CONFIG(UART0_TX, UART0_TX);
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BSP_INSTALL_UART_DEVICE(0);
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BSP_INSTALL_UART_DEVICE(0);
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#if defined(ARCH_ARM) && defined(RT_USING_SMART)
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#if defined(ARCH_ARM)
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uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
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uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
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#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
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#endif /* defined(ARCH_ARM) */
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#endif
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#endif
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#ifdef RT_USING_UART1
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#ifdef RT_USING_UART1
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PINMUX_CONFIG(IIC0_SDA, UART1_RX);
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PINMUX_CONFIG(IIC0_SDA, UART1_RX);
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PINMUX_CONFIG(IIC0_SCL, UART1_TX);
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PINMUX_CONFIG(IIC0_SCL, UART1_TX);
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BSP_INSTALL_UART_DEVICE(1);
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BSP_INSTALL_UART_DEVICE(1);
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#if defined(ARCH_ARM) && defined(RT_USING_SMART)
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#if defined(ARCH_ARM)
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uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
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uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
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#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
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#endif /* defined(ARCH_ARM) */
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#endif
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#endif
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#ifdef RT_USING_UART2
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#ifdef RT_USING_UART2
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PINMUX_CONFIG(SD1_D1, UART2_RX);
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PINMUX_CONFIG(SD1_D1, UART2_RX);
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PINMUX_CONFIG(SD1_D2, UART2_TX);
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PINMUX_CONFIG(SD1_D2, UART2_TX);
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BSP_INSTALL_UART_DEVICE(2);
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BSP_INSTALL_UART_DEVICE(2);
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#if defined(ARCH_ARM) && defined(RT_USING_SMART)
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#if defined(ARCH_ARM)
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uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
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uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
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#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
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#endif /* defined(ARCH_ARM) */
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#endif
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#endif
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#ifdef RT_USING_UART3
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#ifdef RT_USING_UART3
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PINMUX_CONFIG(SD1_D1, UART3_RX);
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PINMUX_CONFIG(SD1_D1, UART3_RX);
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PINMUX_CONFIG(SD1_D2, UART3_TX);
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PINMUX_CONFIG(SD1_D2, UART3_TX);
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BSP_INSTALL_UART_DEVICE(3);
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BSP_INSTALL_UART_DEVICE(3);
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#if defined(ARCH_ARM) && defined(RT_USING_SMART)
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#if defined(ARCH_ARM)
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uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
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uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
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#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
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#endif /* defined(ARCH_ARM) */
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#endif
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#endif
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#ifdef RT_USING_UART4
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#ifdef RT_USING_UART4
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PINMUX_CONFIG(SD1_GP0, UART4_RX);
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PINMUX_CONFIG(SD1_GP0, UART4_RX);
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PINMUX_CONFIG(SD1_GP1, UART4_TX);
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PINMUX_CONFIG(SD1_GP1, UART4_TX);
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BSP_INSTALL_UART_DEVICE(4);
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BSP_INSTALL_UART_DEVICE(4);
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#if defined(ARCH_ARM) && defined(RT_USING_SMART)
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#if defined(ARCH_ARM)
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uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
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uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
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#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
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#endif /* defined(ARCH_ARM) */
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#endif
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#endif
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return 0;
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return 0;
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#define PAD_MIPI_TXM0__MIPI_TXM0 0
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#define PAD_MIPI_TXM0__MIPI_TXM0 0
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#define PAD_MIPI_TXP0__MIPI_TXP0 0
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#define PAD_MIPI_TXP0__MIPI_TXP0 0
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#if defined(ARCH_ARM) && defined(RT_USING_SMART)
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#if defined(ARCH_ARM)
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extern rt_ubase_t pinmux_base_ioremap(void);
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extern rt_ubase_t pinmux_base_ioremap(void);
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#define PINMUX_BASE pinmux_base_ioremap()
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#define PINMUX_BASE pinmux_base_ioremap()
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#else
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#else
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#define PINMUX_BASE 0x03001000
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#define PINMUX_BASE 0x03001000
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#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
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#endif /* defined(ARCH_ARM) */
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#define PINMUX_MASK(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_MASK
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#define PINMUX_MASK(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_MASK
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#define PINMUX_OFFSET(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_OFFSET
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#define PINMUX_OFFSET(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_OFFSET
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#define PINMUX_VALUE(PIN_NAME, FUNC_NAME) PIN_NAME##__##FUNC_NAME
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#define PINMUX_VALUE(PIN_NAME, FUNC_NAME) PIN_NAME##__##FUNC_NAME
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