Merge pull request #1330 from balanceTWK/master

[BSP][i.mxrt1052] fix uart
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Tanek 2018-03-30 12:01:27 +08:00 committed by GitHub
commit 5f81f8e771
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3 changed files with 46 additions and 60 deletions

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@ -78,9 +78,8 @@ static void BOARD_BootClockRUN(void)
CLOCK_DeinitEnetPll(); CLOCK_DeinitEnetPll();
CLOCK_DeinitUsb2Pll(); CLOCK_DeinitUsb2Pll();
/* Configure UART divider to default */ /* iomuxc clock (iomuxc_clk_enable): 0x03u */
CLOCK_SetMux(kCLOCK_UartMux, 0); /* Set UART source to PLL3 80M */ CLOCK_EnableClock(kCLOCK_Iomuxc);
CLOCK_SetDiv(kCLOCK_UartDiv, 0); /* Set UART divider to 1 */
/* Update core clock */ /* Update core clock */
SystemCoreClockUpdate(); SystemCoreClockUpdate();

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@ -21,7 +21,6 @@
#ifdef RT_USING_SERIAL #ifdef RT_USING_SERIAL
/* GPIO外设时钟会在LPUART_Init中自动配置, 如果定义了以下宏则不会自动配置 */
#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL #if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!" #error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
#endif #endif
@ -129,7 +128,8 @@ void LPUART8_IRQHandler(void)
#endif /* RT_USING_UART8 */ #endif /* RT_USING_UART8 */
static const struct imxrt_uart uarts[] = { static const struct imxrt_uart uarts[] =
{
#ifdef RT_USING_UART1 #ifdef RT_USING_UART1
{ {
LPUART1, LPUART1,
@ -198,7 +198,7 @@ static const struct imxrt_uart uarts[] = {
}; };
/* Get debug console frequency. */ /* Get debug console frequency. */
uint32_t BOARD_DebugConsoleSrcFreq(void) uint32_t GetUartSrcFreq(void)
{ {
uint32_t freq; uint32_t freq;
@ -231,7 +231,6 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
if (uart->uart_base != RT_NULL) if (uart->uart_base != RT_NULL)
{ {
#ifdef RT_USING_UART1 #ifdef RT_USING_UART1
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
IOMUXC_SetPinMux( IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */ IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */
@ -261,7 +260,6 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
Hyst. Enable Field: Hysteresis Disabled */ Hyst. Enable Field: Hysteresis Disabled */
#endif #endif
#ifdef RT_USING_UART2 #ifdef RT_USING_UART2
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux( IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_02_LPUART2_TX, IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
@ -272,15 +270,12 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_02_LPUART2_TX, IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
0x10B0u); 0x10B0u);
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_03_LPUART2_RX, IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
0x10B0u); 0x10B0u);
#endif #endif
#ifdef RT_USING_UART3 #ifdef RT_USING_UART3
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux( IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_06_LPUART3_TX, IOMUXC_GPIO_AD_B1_06_LPUART3_TX,
@ -291,13 +286,11 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_06_LPUART3_TX, IOMUXC_GPIO_AD_B1_06_LPUART3_TX,
0x10B0u); 0x10B0u);
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_07_LPUART3_RX, IOMUXC_GPIO_AD_B1_07_LPUART3_RX,
0x10B0u); 0x10B0u);
#endif #endif
#ifdef RT_USING_UART4 #ifdef RT_USING_UART4
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux( IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_00_LPUART4_TX, IOMUXC_GPIO_B1_00_LPUART4_TX,
@ -308,13 +301,11 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_00_LPUART4_TX, IOMUXC_GPIO_B1_00_LPUART4_TX,
0x10B0u); 0x10B0u);
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_01_LPUART4_RX, IOMUXC_GPIO_B1_01_LPUART4_RX,
0x10B0u); 0x10B0u);
#endif #endif
#ifdef RT_USING_UART5 #ifdef RT_USING_UART5
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux( IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_12_LPUART5_TX, IOMUXC_GPIO_B1_12_LPUART5_TX,
@ -325,13 +316,11 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_12_LPUART5_TX, IOMUXC_GPIO_B1_12_LPUART5_TX,
0x10B0u); 0x10B0u);
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_13_LPUART5_RX, IOMUXC_GPIO_B1_13_LPUART5_RX,
0x10B0u); 0x10B0u);
#endif #endif
#ifdef RT_USING_UART6 #ifdef RT_USING_UART6
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux( IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_02_LPUART6_TX, IOMUXC_GPIO_AD_B0_02_LPUART6_TX,
@ -342,13 +331,11 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_02_LPUART6_TX, IOMUXC_GPIO_AD_B0_02_LPUART6_TX,
0x10B0u); 0x10B0u);
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_03_LPUART6_RX, IOMUXC_GPIO_AD_B0_03_LPUART6_RX,
0x10B0u); 0x10B0u);
#endif #endif
#ifdef RT_USING_UART7 #ifdef RT_USING_UART7
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux( IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_31_LPUART7_TX, IOMUXC_GPIO_EMC_31_LPUART7_TX,
@ -359,13 +346,11 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_EMC_31_LPUART7_TX, IOMUXC_GPIO_EMC_31_LPUART7_TX,
0x10B0u); 0x10B0u);
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_EMC_32_LPUART7_RX, IOMUXC_GPIO_EMC_32_LPUART7_RX,
0x10B0u); 0x10B0u);
#endif #endif
#ifdef RT_USING_UART8 #ifdef RT_USING_UART8
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux( IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_10_LPUART8_TX, IOMUXC_GPIO_AD_B1_10_LPUART8_TX,
@ -376,7 +361,6 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_10_LPUART8_TX, IOMUXC_GPIO_AD_B1_10_LPUART8_TX,
0x10B0u); 0x10B0u);
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_11_LPUART8_RX, IOMUXC_GPIO_AD_B1_11_LPUART8_RX,
0x10B0u); 0x10B0u);
@ -440,8 +424,7 @@ static rt_err_t imxrt_configure(struct rt_serial_device *serial, struct serial_c
config.enableTx = true; config.enableTx = true;
config.enableRx = true; config.enableRx = true;
LPUART_Init(uart->uart_base, &config, BOARD_DebugConsoleSrcFreq()); LPUART_Init(uart->uart_base, &config, GetUartSrcFreq());
return RT_EOK; return RT_EOK;
} }
@ -546,16 +529,21 @@ static const struct rt_uart_ops imxrt_uart_ops =
imxrt_getc, imxrt_getc,
}; };
int imxrt_hw_usart_init(void) int imxrt_hw_uart_init(void)
{ {
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
int i; int i;
/* Configure UART divider to default */
CLOCK_SetMux(kCLOCK_UartMux, 0); /* Set UART source to PLL3 80M */
CLOCK_SetDiv(kCLOCK_UartDiv, 0); /* Set UART divider to 1 */
for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++) for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
{ {
uarts[i].serial->ops = &imxrt_uart_ops; uarts[i].serial->ops = &imxrt_uart_ops;
uarts[i].serial->config = config; uarts[i].serial->config = config;
/* register UART1 device */ /* register UART device */
rt_hw_serial_register(uarts[i].serial, rt_hw_serial_register(uarts[i].serial,
uarts[i].device_name, uarts[i].device_name,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
@ -564,6 +552,6 @@ int imxrt_hw_usart_init(void)
return 0; return 0;
} }
INIT_BOARD_EXPORT(imxrt_hw_usart_init); INIT_BOARD_EXPORT(imxrt_hw_uart_init);
#endif /*RT_USING_SERIAL */ #endif /*RT_USING_SERIAL */

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@ -12,12 +12,11 @@
* 2017-10-10 Tanek the first version * 2017-10-10 Tanek the first version
*/ */
#ifndef __DRV_USART_H__ #ifndef __DRV_UART_H__
#define __DRV_USART_H__ #define __DRV_UART_H__
#include <rthw.h> #include <rthw.h>
#include <rtthread.h> #include <rtthread.h>
int rt_hw_usart_init(void);
#endif #endif