bsp/tm4c123: add hardware i2c support
This commit is contained in:
parent
86f1a0d2b2
commit
5e9257fcd1
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@ -188,21 +188,75 @@ menu "On-chip Peripheral Drivers"
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default n
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endif
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menuconfig BSP_USING_I2C1
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bool "Enable I2C1 BUS (software simulation)"
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menuconfig BSP_USING_I2C
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bool "Enable I2C BUS"
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default n
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select RT_USING_I2C
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select RT_USING_I2C_BITOPS
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select RT_USING_PIN
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if BSP_USING_I2C1
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config BSP_I2C1_SCL_PIN
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int "i2c1 scl pin number"
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range 0 175
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default 22
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config BSP_I2C1_SDA_PIN
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int "I2C1 sda pin number"
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range 0 175
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default 23
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if BSP_USING_I2C
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config BSP_USING_I2C0
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bool "Enable I2C0 BUS"
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default n
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if BSP_USING_I2C0
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choice
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prompt "I2C0 CLK frequency"
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default BSP_I2C0_CLK_100
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config BSP_I2C0_CLK_100
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bool "100kHz"
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config BSP_I2C0_CLK_400
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bool "400kHz"
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endchoice
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endif
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config BSP_USING_I2C1
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bool "Enable I2C1 BUS"
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default n
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if BSP_USING_I2C1
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choice
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prompt "I2C1 CLK frequency"
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default BSP_I2C1_CLK_100
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config BSP_I2C1_CLK_100
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bool "100kHz"
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config BSP_I2C1_CLK_400
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bool "400kHz"
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endchoice
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endif
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config BSP_USING_I2C2
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bool "Enable I2C2 BUS"
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default n
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if BSP_USING_I2C2
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choice
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prompt "I2C2 CLK frequency"
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default BSP_I2C3_CLK_100
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config BSP_I2C2_CLK_100
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bool "100kHz"
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config BSP_I2C2_CLK_400
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bool "400kHz"
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endchoice
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endif
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config BSP_USING_I2C3
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bool "Enable I2C3 BUS"
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default n
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if BSP_USING_I2C3
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choice
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prompt "I2C3 CLK frequency"
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default BSP_I2C4_CLK_100
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config BSP_I2C3_CLK_100
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bool "100kHz"
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config BSP_I2C3_CLK_400
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bool "400kHz"
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endchoice
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endif
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endif
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menuconfig BSP_USING_TIM
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@ -58,6 +58,9 @@ void rt_hw_board_init()
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#endif
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#ifdef RT_USING_PWM
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rt_hw_pwm_init();
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#endif
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#ifdef RT_USING_I2C
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rt_hw_i2c_init();
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#endif
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/* Call components board initial (use INIT_BOARD_EXPORT()) */
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#ifdef RT_USING_COMPONENTS_INIT
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@ -47,6 +47,10 @@
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#include "drv_spi.h"
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#endif /* RT_USING_SPI*/
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#ifdef RT_USING_I2C
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#include "drv_i2c.h"
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#endif /* RT_USING_I2C*/
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#endif /*__BOARD_H__*/
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/************************** end of file ******************/
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@ -26,9 +26,9 @@ if GetDepend(['RT_USING_SPI']):
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if GetDepend(['RT_USING_QSPI']):
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src += ['drv_qspi.c']
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if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
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if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2') or GetDepend('BSP_USING_I2C3') or GetDepend('BSP_USING_I2C4'):
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src += ['drv_soft_i2c.c']
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if GetDepend(['RT_USING_I2C']):
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if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2') or GetDepend('BSP_USING_I2C3'):
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src += ['drv_i2c.c']
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if GetDepend(['BSP_USING_ETH', 'RT_USING_LWIP']):
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src += ['drv_eth.c']
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@ -0,0 +1,93 @@
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-01-20 wirano first version
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*/
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#ifndef __I2C_CONFIG_H__
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#define __I2C_CONFIG_H__
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#include <rtthread.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_I2C0_CLK_100)
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#define I2C0_CLK 100000
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#elif defined(BSP_I2C0_CLK_400)
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#define I2C0_CLK 400000
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#endif
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#if defined(BSP_I2C1_CLK_100)
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#define I2C1_CLK 100000
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#elif defined(BSP_I2C1_CLK_400)
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#define I2C1_CLK 400000
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#endif
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#if defined(BSP_I2C2_CLK_100)
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#define I2C2_CLK 100000
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#elif defined(BSP_I2C2_CLK_400)
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#define I2C2_CLK 400000
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#endif
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#if defined(BSP_I2C3_CLK_100)
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#define I2C3_CLK 100000
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#elif defined(BSP_I2C3_CLK_400)
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#define I2C3_CLK 400000
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#endif
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#ifdef BSP_USING_I2C0
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#ifndef I2C0_BUS_CONFIG
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#define I2C0_BUS_CONFIG \
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{ \
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.base = I2C0_BASE, \
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.bus_name = "i2c0", \
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.clk_freq = I2C0_CLK, \
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}
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#endif /* I2C0_BUS_CONFIG */
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#endif /* BSP_USING_I2C0 */
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#ifdef BSP_USING_I2C1
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#ifndef I2C1_BUS_CONFIG
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#define I2C1_BUS_CONFIG \
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{ \
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.base = I2C1_BASE, \
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.bus_name = "i2c1", \
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.clk_freq = I2C1_CLK, \
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}
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#endif /* I2C1_BUS_CONFIG */
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#endif /* BSP_USING_I2C1 */
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#ifdef BSP_USING_I2C2
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#ifndef I2C2_BUS_CONFIG
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#define I2C2_BUS_CONFIG \
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{ \
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.base = I2C2_BASE, \
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.bus_name = "i2c2", \
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.clk_freq = I2C2_CLK, \
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}
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#endif /* I2C2_BUS_CONFIG */
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#endif /* BSP_USING_I2C2 */
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#ifdef BSP_USING_I2C3
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#ifndef I2C3_BUS_CONFIG
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#define I2C3_BUS_CONFIG \
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{ \
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.base = I2C3_BASE, \
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.bus_name = "i2c3", \
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.clk_freq = I2C3_CLK, \
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}
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#endif /* I2C3_BUS_CONFIG */
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#endif /* BSP_USING_I2C3 */
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#ifdef __cplusplus
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}
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#endif
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#endif //__I2C_CONFIG_H__
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@ -0,0 +1,226 @@
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-01-20 wirano first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <rtdbg.h>
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#ifdef BSP_USING_I2C
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#if defined(BSP_USING_I2C0) || defined(BSP_USING_I2C1) || defined(BSP_USING_I2C2) || defined(BSP_USING_I2C3)
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#include "drv_i2c.h"
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#include "inc/hw_memmap.h"
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#include <stdbool.h>
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#include "i2c_config.h"
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#include "driverlib/rom.h"
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#include "driverlib/sysctl.h"
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#include "driverlib/pin_map.h"
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#include "driverlib/gpio.h"
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#include "driverlib/i2c.h"
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enum {
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#ifdef BSP_USING_I2C0
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I2C0_INDEX,
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#endif
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#ifdef BSP_USING_I2C1
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I2C1_INDEX,
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#endif
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#ifdef BSP_USING_I2C2
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I2C2_INDEX,
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#endif
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#ifdef BSP_USING_I2C3
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I2C3_INDEX,
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#endif
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};
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static struct tm4c123_i2c tm4c123_i2cs[] =
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{
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#ifdef BSP_USING_I2C0
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I2C0_BUS_CONFIG,
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#endif
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#ifdef BSP_USING_I2C1
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I2C1_BUS_CONFIG,
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#endif
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#ifdef BSP_USING_I2C2
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I2C2_BUS_CONFIG,
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#endif
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#ifdef BSP_USING_I2C3
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I2C3_BUS_CONFIG,
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#endif
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};
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static rt_ssize_t tm4c123_i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num);
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struct rt_i2c_bus_device_ops tm4c123_i2c_ops =
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{
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tm4c123_i2c_xfer,
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RT_NULL,
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RT_NULL
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};
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static rt_ssize_t tm4c123_i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num) {
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RT_ASSERT(bus != RT_NULL);
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RT_ASSERT(msgs != RT_NULL);
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struct rt_i2c_msg *msg;
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struct tm4c123_i2c *i2c_info = (struct tm4c123_i2c *) bus;
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rt_err_t ret = -RT_ERROR;
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rt_uint32_t i;
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for (i = 0; i < num; i++) {
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msg = &msgs[i];
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if (msg->flags & RT_I2C_ADDR_10BIT) {
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LOG_E("does not support 10bits address!\n");
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}
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if (msg->flags & RT_I2C_RD) {
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rt_uint8_t *data = msg->buf;
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ROM_I2CMasterSlaveAddrSet(i2c_info->base, msg->addr, true);
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if (msg->flags & RT_I2C_NO_START) {
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_RECEIVE_CONT);
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while (ROM_I2CMasterBusy(i2c_info->base));
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*data = ROM_I2CMasterDataGet(i2c_info->base);
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} else {
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_RECEIVE_START);
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while (ROM_I2CMasterBusy(i2c_info->base));
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*data = ROM_I2CMasterDataGet(i2c_info->base);
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}
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if (msg->len > 1) {
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data++;
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for (int j = 1; j < msg->len - 1; ++j) {
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_RECEIVE_CONT);
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while (ROM_I2CMasterBusy(i2c_info->base));
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*data = ROM_I2CMasterDataGet(i2c_info->base);
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data++;
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}
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if (msg->flags & RT_I2C_NO_STOP) {
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_RECEIVE_CONT);
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while (ROM_I2CMasterBusy(i2c_info->base));
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*data = ROM_I2CMasterDataGet(i2c_info->base);
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} else {
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
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while (ROM_I2CMasterBusy(i2c_info->base));
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*data = ROM_I2CMasterDataGet(i2c_info->base);
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}
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}
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} else {
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rt_uint8_t *data = msg->buf;
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ROM_I2CMasterSlaveAddrSet(i2c_info->base, msg->addr, false);
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// use single send when data len = 1
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if (msg->len == 1) {
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if (msg->flags & RT_I2C_NO_START) {
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ROM_I2CMasterDataPut(i2c_info->base, *data);
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_SEND_CONT);
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} else if (msg->flags & RT_I2C_NO_STOP) {
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ROM_I2CMasterDataPut(i2c_info->base, *data);
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_SEND_CONT);
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} else {
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_SINGLE_SEND);
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ROM_I2CMasterDataPut(i2c_info->base, *data);
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}
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while (ROM_I2CMasterBusy(i2c_info->base));
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// otherwise use burst send
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} else {
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if (msg->flags & RT_I2C_NO_START) {
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ROM_I2CMasterDataPut(i2c_info->base, *data);
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_SEND_CONT);
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while (ROM_I2CMasterBusy(i2c_info->base));
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} else {
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ROM_I2CMasterDataPut(i2c_info->base, *data);
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_SEND_START);
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while (ROM_I2CMasterBusy(i2c_info->base));
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}
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data++;
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for (int j = 1; j < msg->len - 1; ++j) {
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ROM_I2CMasterDataPut(i2c_info->base, *data);
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_SEND_CONT);
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while (ROM_I2CMasterBusy(i2c_info->base));
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data++;
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}
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if (msg->flags & RT_I2C_NO_STOP) {
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ROM_I2CMasterDataPut(i2c_info->base, *data);
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_SEND_CONT);
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} else {
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ROM_I2CMasterDataPut(i2c_info->base, *data);
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ROM_I2CMasterControl(i2c_info->base, I2C_MASTER_CMD_BURST_SEND_FINISH);
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}
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while (ROM_I2CMasterBusy(i2c_info->base));
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}
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}
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}
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ret = i;
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return ret;
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}
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int rt_hw_i2c_init(void) {
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rt_err_t ret = RT_EOK;
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for (uint32_t i = 0; i < sizeof(tm4c123_i2cs) / sizeof(tm4c123_i2cs[0]); i++) {
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ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
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ROM_GPIOPinConfigure(GPIO_PB2_I2C0SCL);
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ROM_GPIOPinConfigure(GPIO_PB3_I2C0SDA);
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ROM_GPIOPinTypeI2CSCL(GPIO_PORTB_BASE, GPIO_PIN_2);
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ROM_GPIOPinTypeI2C(GPIO_PORTB_BASE, GPIO_PIN_3);
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ROM_SysCtlPeripheralDisable(SYSCTL_PERIPH_I2C0);
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ROM_SysCtlPeripheralReset(SYSCTL_PERIPH_I2C0);
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ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C0);
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while (!SysCtlPeripheralReady(SYSCTL_PERIPH_I2C0));
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// timeout:5ms
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ROM_I2CMasterTimeoutSet(I2C0_BASE, 0x7d);
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if (tm4c123_i2cs[i].clk_freq == 400000) {
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ROM_I2CMasterInitExpClk(tm4c123_i2cs[i].base, ROM_SysCtlClockGet(), RT_TRUE);
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} else {
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ROM_I2CMasterInitExpClk(tm4c123_i2cs[i].base, ROM_SysCtlClockGet(), RT_FALSE);
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}
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ROM_I2CMasterEnable(tm4c123_i2cs[i].base);
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tm4c123_i2cs[i].bus.ops = &tm4c123_i2c_ops;
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ret = rt_i2c_bus_device_register(&tm4c123_i2cs[i].bus, tm4c123_i2cs[i].bus_name);
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if (ret != RT_EOK) {
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LOG_E("rt i2c device %s register failed, status=%d\n", tm4c123_i2cs[i].bus_name, ret);
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}
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}
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return ret;
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}
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INIT_DEVICE_EXPORT(rt_hw_i2c_init);
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#endif /* BSP_USING_I2C1 || BSP_USING_I2C2 || BSP_USING_I2C3 || BSP_USING_I2C4 */
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#endif /* BSP_USING_I2C */
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||||
|
|
@ -0,0 +1,31 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-01-20 wirano first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_I2C_H__
|
||||
#define __DRV_I2C_H__
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
#include <rtdevice.h>
|
||||
#include <rthw.h>
|
||||
|
||||
|
||||
struct tm4c123_i2c
|
||||
{
|
||||
struct rt_i2c_bus_device bus;
|
||||
uint32_t base;
|
||||
char *bus_name;
|
||||
uint32_t clk_freq;
|
||||
};
|
||||
|
||||
int rt_hw_i2c_init(void);
|
||||
|
||||
#endif /* __DRV_I2C_H__ */
|
||||
|
|
@ -20,7 +20,8 @@ tm4c123_driverlib/src/gpio.c
|
|||
if GetDepend(['RT_USING_SERIAL']):
|
||||
src += ['tm4c123_driverlib/src/uart.c']
|
||||
|
||||
#if GetDepend(['RT_USING_I2C']):
|
||||
if GetDepend(['RT_USING_I2C']):
|
||||
src += ['tm4c123_driverlib/src/i2c.c']
|
||||
|
||||
|
||||
if GetDepend(['RT_USING_SPI']):
|
||||
|
|
Loading…
Reference in New Issue