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[bsp][imxrt] Remove SeeedStudio network dependencies

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This commit is contained in:
guozhanxin 2018-10-10 09:19:38 +08:00
parent 1253a1b445
commit 5d4e4ae390
4 changed files with 7 additions and 7 deletions
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2
bsp/imxrt/Libraries/imxrt1050/drivers/SConscript
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@ -54,7 +54,7 @@ if GetDepend('RT_USING_USB_DEVICE'):
src += Glob('usb/phy/*.c')
CPPDEFINES += ['ENDIANNESS']
if GetDepend('BOARD_RT1050_EVK') or GetDepend('BOARD_RT1050_SeeedStudio'):
if GetDepend('BOARD_RT1050_EVK'):
if GetDepend('RT_USING_LWIP'):
src += ['drv_eth.c', 'fsl_phy.c']
CPPDEFINES += ['FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE']

6
bsp/imxrt/Libraries/imxrt1050/drivers/drv_eth.c
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@ -43,7 +43,7 @@
#define PHY_ADDRESS 0x00u
#endif
#if defined(BOARD_RT1050_EVK) || defined(BOARD_RT1050_SeeedStudio)
#if defined(BOARD_RT1050_EVK)
#define PHY_ADDRESS 0x02u
#endif
/* debug option */
@ -137,7 +137,7 @@ void _enet_callback(ENET_Type *base, enet_handle_t *handle, enet_event_t event,
break;
}
}
#if defined(BOARD_RT1050_SeeedStudio) || defined(BOARD_RT1050_EVK)
#if defined(BOARD_RT1050_EVK)
static void evk_enet_io_init(void)
{
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
@ -1127,7 +1127,7 @@ static int rt_hw_imxrt_eth_init(void)
fire_enet_io_init();
#endif
#if defined(BOARD_RT1050_EVK) || defined(BOARD_RT1050_SeeedStudio)
#if defined(BOARD_RT1050_EVK)
evk_enet_io_init();
#endif
_enet_clk_init();

2
bsp/imxrt/Libraries/imxrt1050/drivers/fsl_phy.c
View File

@ -328,7 +328,7 @@ status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *
#if defined(BOARD_RT1050_FIRE) || defined(BOARD_RT1050_ATK)
result = PHY_Read(base, phyAddr, PHY_CONTROL2_REG, &ctlReg);
#endif
#if defined(BOARD_RT1050_EVK) || defined(BOARD_RT1050_SeeedStudio)
#if defined(BOARD_RT1050_EVK)
result = PHY_Read(base, phyAddr, PHY_CONTROL1_REG, &ctlReg);
#endif
if (result == kStatus_Success)

4
bsp/imxrt/Libraries/imxrt1050/drivers/fsl_phy.h
View File

@ -56,7 +56,7 @@
#if defined(BOARD_RT1050_FIRE) || defined(BOARD_RT1050_ATK)
#define PHY_CONTROL_ID1 0x07U /*!< The PHY ID1*/
#endif
#if defined(BOARD_RT1050_EVK) || defined(BOARD_RT1050_SeeedStudio)
#if defined(BOARD_RT1050_EVK)
#define PHY_CONTROL_ID1 0x22U /*!< The PHY ID1*/
#endif
/*! @brief Defines the mask flag in basic control register. */
@ -83,7 +83,7 @@
#define PHY_CTL1_LINKUP_MASK 0x100U /*!< The PHY link up. */
#define PHY_LINK_READY_MASK (PHY_CTL1_ENERGYDETECT_MASK | PHY_CTL1_LINKUP_MASK)
#endif
#if defined(BOARD_RT1050_EVK) || defined(BOARD_RT1050_SeeedStudio)
#if defined(BOARD_RT1050_EVK)
#define PHY_CTL2_REMOTELOOP_MASK 0x0004U /*!< The PHY remote loopback mask. */
#define PHY_CTL2_REFCLK_SELECT_MASK 0x0080U /*!< The PHY RMII reference clock select. */
#define PHY_CTL1_10HALFDUPLEX_MASK 0x0001U /*!< The PHY 10M half duplex mask. */