From f0d03af696767d593463b9119194e3f87374ffa8 Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 17:51:35 +0800 Subject: [PATCH 01/11] remove unused file. --- bsp/stm32f10x/stm3210c_eval_lcd.c | 567 ------------------------------ bsp/stm32f10x/stm3210c_eval_lcd.h | 149 -------- bsp/stm32f10x/stm3210e_eval_lcd.c | 501 -------------------------- bsp/stm32f10x/stm3210e_eval_lcd.h | 162 --------- 4 files changed, 1379 deletions(-) delete mode 100644 bsp/stm32f10x/stm3210c_eval_lcd.c delete mode 100644 bsp/stm32f10x/stm3210c_eval_lcd.h delete mode 100644 bsp/stm32f10x/stm3210e_eval_lcd.c delete mode 100644 bsp/stm32f10x/stm3210e_eval_lcd.h diff --git a/bsp/stm32f10x/stm3210c_eval_lcd.c b/bsp/stm32f10x/stm3210c_eval_lcd.c deleted file mode 100644 index 7ad481d7a0..0000000000 --- a/bsp/stm32f10x/stm3210c_eval_lcd.c +++ /dev/null @@ -1,567 +0,0 @@ -/* - * File : stm3210c_eval_lcd.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-11-01 Bernard the first version - */ - -#include -#include "stm3210c_eval_lcd.h" -#include "stm32f10x.h" -#include "stm32f10x_spi.h" - -#include -#include -#include -#include - -#define START_BYTE 0x70 -#define SET_INDEX 0x00 -#define READ_STATUS 0x01 -#define LCD_WRITE_REG 0x02 -#define LCD_READ_REG 0x03 - -void rt_hw_lcd_update(rtgui_rect_t *rect); -rt_uint8_t * rt_hw_lcd_get_framebuffer(void); -void rt_hw_lcd_set_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y); -void rt_hw_lcd_get_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y); -void rt_hw_lcd_draw_hline(rtgui_color_t *c, rt_base_t x1, rt_base_t x2, rt_base_t y); -void rt_hw_lcd_draw_vline(rtgui_color_t *c, rt_base_t x, rt_base_t y1, rt_base_t y2); -void rt_hw_lcd_draw_raw_hline(rt_uint8_t *pixels, rt_base_t x1, rt_base_t x2, rt_base_t y); - -struct rtgui_graphic_driver _rtgui_lcd_driver = - { - "lcd", - 2, - 320, - 240, - rt_hw_lcd_update, - rt_hw_lcd_get_framebuffer, - rt_hw_lcd_set_pixel, - rt_hw_lcd_get_pixel, - rt_hw_lcd_draw_hline, - rt_hw_lcd_draw_vline, - rt_hw_lcd_draw_raw_hline - }; - -static void _delay_(__IO uint32_t nCount) -{ - __IO uint32_t index = 0; - for(index = (100000 * nCount); index != 0; index--) - {} -} - -/** - * @brief Sets or reset LCD control lines. - * @param GPIOx: where x can be B or D to select the GPIO peripheral. - * @param CtrlPins: the Control line. This parameter can be: - * @arg LCD_NCS_PIN: Chip Select pin - * @param BitVal: specifies the value to be written to the selected bit. - * This parameter can be: - * @arg Bit_RESET: to clear the port pin - * @arg Bit_SET: to set the port pin - * @retval None - */ -void LCD_CtrlLinesWrite(GPIO_TypeDef* GPIOx, uint16_t CtrlPins, BitAction BitVal) -{ - /* Set or Reset the control line */ - GPIO_WriteBit(GPIOx, CtrlPins, BitVal); -} - -/** - * @brief Reset LCD control line(/CS) and Send Start-Byte - * @param Start_Byte: the Start-Byte to be sent - * @retval None - */ -void LCD_nCS_StartByte(uint8_t Start_Byte) -{ - LCD_CtrlLinesWrite(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, Bit_RESET); - SPI_I2S_SendData(LCD_SPI, Start_Byte); - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_BSY) != RESET) - {} -} - -/** - * @brief Configures LCD control lines in Output Push-Pull mode. - * @param None - * @retval None - */ -void LCD_CtrlLinesConfig(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - - /* Enable GPIO clock */ - RCC_APB2PeriphClockCmd(LCD_NCS_GPIO_CLK, ENABLE); - - /* Configure NCS in Output Push-Pull mode */ - GPIO_InitStructure.GPIO_Pin = LCD_NCS_PIN; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_Init(LCD_NCS_GPIO_PORT, &GPIO_InitStructure); -} - -/** - * @brief Writes index to select the LCD register. - * @param LCD_Reg: address of the selected register. - * @retval None - */ -void LCD_WriteRegIndex(uint8_t LCD_Reg) -{ - /* Reset LCD control line(/CS) and Send Start-Byte */ - LCD_nCS_StartByte(START_BYTE | SET_INDEX); - /* Write 16-bit Reg Index (High Byte is 0) */ - SPI_I2S_SendData(LCD_SPI, 0x00); - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_BSY) != RESET) - {} - SPI_I2S_SendData(LCD_SPI, LCD_Reg); - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_BSY) != RESET) - {} - LCD_CtrlLinesWrite(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, Bit_SET); -} - -/** - * @brief Reads the selected LCD Register. - * @param None - * @retval LCD Register Value. - */ -uint16_t LCD_ReadReg(uint8_t LCD_Reg) -{ - uint16_t tmp = 0; - uint8_t i = 0; - - /* LCD_SPI prescaler: 4 */ - LCD_SPI->CR1 &= 0xFFC7; - LCD_SPI->CR1 |= 0x0008; - /* Write 16-bit Index (then Read Reg) */ - LCD_WriteRegIndex(LCD_Reg); - /* Read 16-bit Reg */ - /* Reset LCD control line(/CS) and Send Start-Byte */ - LCD_nCS_StartByte(START_BYTE | LCD_READ_REG); - - for(i = 0; i < 5; i++) - { - SPI_I2S_SendData(LCD_SPI, 0xFF); - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_BSY) != RESET) - {} - /* One byte of invalid dummy data read after the start byte */ - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_RXNE) == RESET) - {} - SPI_I2S_ReceiveData(LCD_SPI); - } - SPI_I2S_SendData(LCD_SPI, 0xFF); - /* Read upper byte */ - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_BSY) != RESET) - {} - /* Read lower byte */ - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_RXNE) == RESET) - {} - tmp = SPI_I2S_ReceiveData(LCD_SPI); - - - SPI_I2S_SendData(LCD_SPI, 0xFF); - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_BSY) != RESET) - {} - /* Read lower byte */ - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_RXNE) == RESET) - {} - tmp = ((tmp & 0xFF) << 8) | SPI_I2S_ReceiveData(LCD_SPI); - LCD_CtrlLinesWrite(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, Bit_SET); - /* LCD_SPI prescaler: 2 */ - LCD_SPI->CR1 &= 0xFFC7; - return tmp; -} - -/** - * @brief Writes to the selected LCD register. - * @param LCD_Reg: address of the selected register. - * @param LCD_RegValue: value to write to the selected register. - * @retval None - */ -void LCD_WriteReg(uint8_t LCD_Reg, uint16_t LCD_RegValue) -{ - /* Write 16-bit Index (then Write Reg) */ - LCD_WriteRegIndex(LCD_Reg); - /* Write 16-bit Reg */ - /* Reset LCD control line(/CS) and Send Start-Byte */ - LCD_nCS_StartByte(START_BYTE | LCD_WRITE_REG); - SPI_I2S_SendData(LCD_SPI, LCD_RegValue>>8); - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_BSY) != RESET) - {} - SPI_I2S_SendData(LCD_SPI, (LCD_RegValue & 0xFF)); - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_BSY) != RESET) - {} - LCD_CtrlLinesWrite(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, Bit_SET); -} - -/** - * @brief Writes to the LCD RAM. - * @param RGB_Code: the pixel color in RGB mode (5-6-5). - * @retval None - */ -void LCD_WriteRAM(uint16_t RGB_Code) -{ - SPI_I2S_SendData(LCD_SPI, RGB_Code >> 8); - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_BSY) != RESET) - {} - SPI_I2S_SendData(LCD_SPI, RGB_Code & 0xFF); - while(SPI_I2S_GetFlagStatus(LCD_SPI, SPI_I2S_FLAG_BSY) != RESET) - {} -} - -/** - * @brief Prepare to write to the LCD RAM. - * @param None - * @retval None - */ -void LCD_WriteRAM_Prepare(void) -{ - LCD_WriteRegIndex(R34); /* Select GRAM Reg */ - /* Reset LCD control line(/CS) and Send Start-Byte */ - LCD_nCS_StartByte(START_BYTE | LCD_WRITE_REG); -} - -/** - * @brief Writes 1 word to the LCD RAM. - * @param RGB_Code: the pixel color in RGB mode (5-6-5). - * @retval None - */ -void LCD_WriteRAMWord(uint16_t RGB_Code) -{ - LCD_WriteRAM_Prepare(); - LCD_WriteRAM(RGB_Code); - LCD_CtrlLinesWrite(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, Bit_SET); -} - -/** - * @brief Power on the LCD. - * @param None - * @retval None - */ -void LCD_PowerOn(void) -{ - /* Power On sequence ---------------------------------------------------------*/ - LCD_WriteReg(R16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ - LCD_WriteReg(R17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ - LCD_WriteReg(R18, 0x0000); /* VREG1OUT voltage */ - LCD_WriteReg(R19, 0x0000); /* VDV[4:0] for VCOM amplitude */ - _delay_(20); /* Dis-charge capacitor power voltage (200ms) */ - LCD_WriteReg(R16, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ - LCD_WriteReg(R17, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */ - _delay_(5); /* Delay 50 ms */ - LCD_WriteReg(R18, 0x0139); /* VREG1OUT voltage */ - _delay_(5); /* delay 50 ms */ - LCD_WriteReg(R19, 0x1d00); /* VDV[4:0] for VCOM amplitude */ - LCD_WriteReg(R41, 0x0013); /* VCM[4:0] for VCOMH */ - _delay_(5); /* delay 50 ms */ - LCD_WriteReg(R7, 0x0173); /* 262K color and display ON */ -} - -/** - * @brief Enables the Display. - * @param None - * @retval None - */ -void LCD_DisplayOn(void) -{ - /* Display On */ - LCD_WriteReg(R7, 0x0173); /* 262K color and display ON */ - -} - -/** - * @brief Disables the Display. - * @param None - * @retval None - */ -void LCD_DisplayOff(void) -{ - /* Display Off */ - LCD_WriteReg(R7, 0x0); -} - -/** - * @brief Configures the LCD_SPI interface. - * @param None - * @retval None - */ -void LCD_SPIConfig(void) -{ - SPI_InitTypeDef SPI_InitStructure; - GPIO_InitTypeDef GPIO_InitStructure; - - /* Enable GPIO clock */ - RCC_APB2PeriphClockCmd(LCD_SPI_GPIO_CLK | RCC_APB2Periph_AFIO, ENABLE); - GPIO_PinRemapConfig(GPIO_Remap_SPI3, ENABLE); - - /* Enable SPI clock */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE); - - /* Configure SPI pins: SCK, MISO and MOSI */ - GPIO_InitStructure.GPIO_Pin = LCD_SPI_SCK_PIN | LCD_SPI_MISO_PIN | LCD_SPI_MOSI_PIN; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(LCD_SPI_GPIO_PORT, &GPIO_InitStructure); - - SPI_I2S_DeInit(LCD_SPI); - - /* SPI Config */ - SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; - SPI_InitStructure.SPI_Mode = SPI_Mode_Master; - SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; - SPI_InitStructure.SPI_CPOL = SPI_CPOL_High; - SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge; - SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; - SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; - SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; - SPI_Init(LCD_SPI, &SPI_InitStructure); - - /* SPI enable */ - SPI_Cmd(LCD_SPI, ENABLE); -} - -/** - * @brief Setups the LCD. - * @param None - * @retval None - */ -void LCD_Setup(void) -{ - /* Configure the LCD Control pins --------------------------------------------*/ - LCD_CtrlLinesConfig(); - - /* Configure the LCD_SPI interface ----------------------------------------------*/ - LCD_SPIConfig(); - _delay_(5); /* Delay 50 ms */ - /* Start Initial Sequence ------------------------------------------------*/ - LCD_WriteReg(R229, 0x8000); /* Set the internal vcore voltage */ - LCD_WriteReg(R0, 0x0001); /* Start internal OSC. */ - LCD_WriteReg(R1, 0x0100); /* set SS and SM bit */ - LCD_WriteReg(R2, 0x0700); /* set 1 line inversion */ - LCD_WriteReg(R3, 0x1030); /* set GRAM write direction and BGR=1. */ - LCD_WriteReg(R4, 0x0000); /* Resize register */ - LCD_WriteReg(R8, 0x0202); /* set the back porch and front porch */ - LCD_WriteReg(R9, 0x0000); /* set non-display area refresh cycle ISC[3:0] */ - LCD_WriteReg(R10, 0x0000); /* FMARK function */ - LCD_WriteReg(R12, 0x0000); /* RGB interface setting */ - LCD_WriteReg(R13, 0x0000); /* Frame marker Position */ - LCD_WriteReg(R15, 0x0000); /* RGB interface polarity */ - /* Power On sequence -----------------------------------------------------*/ - LCD_WriteReg(R16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ - LCD_WriteReg(R17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ - LCD_WriteReg(R18, 0x0000); /* VREG1OUT voltage */ - LCD_WriteReg(R19, 0x0000); /* VDV[4:0] for VCOM amplitude */ - _delay_(20); /* Dis-charge capacitor power voltage (200ms) */ - LCD_WriteReg(R16, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ - LCD_WriteReg(R17, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */ - _delay_(5); /* Delay 50 ms */ - LCD_WriteReg(R18, 0x0139); /* VREG1OUT voltage */ - _delay_(5); /* Delay 50 ms */ - LCD_WriteReg(R19, 0x1d00); /* VDV[4:0] for VCOM amplitude */ - LCD_WriteReg(R41, 0x0013); /* VCM[4:0] for VCOMH */ - _delay_(5); /* Delay 50 ms */ - LCD_WriteReg(R32, 0x0000); /* GRAM horizontal Address */ - LCD_WriteReg(R33, 0x0000); /* GRAM Vertical Address */ - /* Adjust the Gamma Curve ------------------------------------------------*/ - LCD_WriteReg(R48, 0x0006); - LCD_WriteReg(R49, 0x0101); - LCD_WriteReg(R50, 0x0003); - LCD_WriteReg(R53, 0x0106); - LCD_WriteReg(R54, 0x0b02); - LCD_WriteReg(R55, 0x0302); - LCD_WriteReg(R56, 0x0707); - LCD_WriteReg(R57, 0x0007); - LCD_WriteReg(R60, 0x0600); - LCD_WriteReg(R61, 0x020b); - - /* Set GRAM area ---------------------------------------------------------*/ - LCD_WriteReg(R80, 0x0000); /* Horizontal GRAM Start Address */ - LCD_WriteReg(R81, 0x00EF); /* Horizontal GRAM End Address */ - LCD_WriteReg(R82, 0x0000); /* Vertical GRAM Start Address */ - LCD_WriteReg(R83, 0x013F); /* Vertical GRAM End Address */ - LCD_WriteReg(R96, 0xa700); /* Gate Scan Line */ - LCD_WriteReg(R97, 0x0001); /* NDL,VLE, REV */ - LCD_WriteReg(R106, 0x0000); /* set scrolling line */ - /* Partial Display Control -----------------------------------------------*/ - LCD_WriteReg(R128, 0x0000); - LCD_WriteReg(R129, 0x0000); - LCD_WriteReg(R130, 0x0000); - LCD_WriteReg(R131, 0x0000); - LCD_WriteReg(R132, 0x0000); - LCD_WriteReg(R133, 0x0000); - /* Panel Control ---------------------------------------------------------*/ - LCD_WriteReg(R144, 0x0010); - LCD_WriteReg(R146, 0x0000); - LCD_WriteReg(R147, 0x0003); - LCD_WriteReg(R149, 0x0110); - LCD_WriteReg(R151, 0x0000); - LCD_WriteReg(R152, 0x0000); - /* Set GRAM write direction and BGR = 1 */ - /* I/D=01 (Horizontal : increment, Vertical : decrement) */ - /* AM=1 (address is updated in vertical writing direction) */ - LCD_WriteReg(R3, 0x1018); - LCD_WriteReg(R7, 0x0173); /* 262K color and display ON */ -} - -/** - * @brief Sets the cursor position. - * @param Xpos: specifies the X position. - * @param Ypos: specifies the Y position. - * @retval None - */ -void LCD_SetCursor(uint8_t Xpos, uint16_t Ypos) -{ - LCD_WriteReg(R32, Xpos); - LCD_WriteReg(R33, Ypos); -} - - -void rt_hw_lcd_update(rtgui_rect_t *rect) -{ - /* nothing for none-DMA mode driver */ -} - -rt_uint8_t * rt_hw_lcd_get_framebuffer(void) -{ - return RT_NULL; /* no framebuffer driver */ -} - -void rt_hw_lcd_set_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y) -{ - unsigned short p; - - /* get color pixel */ - p = rtgui_color_to_565p(*c); - - /* set x and y */ - LCD_SetCursor(y, 319 - x); - LCD_WriteRAMWord(p); -} - -void rt_hw_lcd_get_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y) -{ - // unsigned short p; - - /* set x and y */ - LCD_SetCursor(y, 319 - x); - - *c = rtgui_color_from_565p(0xffff); -} - -void rt_hw_lcd_draw_hline(rtgui_color_t *c, rt_base_t x1, rt_base_t x2, rt_base_t y) -{ - unsigned short p; - - /* get color pixel */ - p = rtgui_color_to_565p(*c); - - LCD_SetCursor(y, 319 - x1); - LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ - while (x1 < x2) - { - LCD_WriteRAM(p); - x1 ++; - } - LCD_CtrlLinesWrite(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, Bit_SET); -} - -void rt_hw_lcd_draw_vline(rtgui_color_t *c, rt_base_t x, rt_base_t y1, rt_base_t y2) -{ - unsigned short p; - - /* get color pixel */ - p = rtgui_color_to_565p(*c); - - LCD_SetCursor(y1, 319 - x); - while (y1 < y2) - { - LCD_WriteRAMWord(p); - - y1++; - LCD_SetCursor(y1, 319 - x); - } -} - -void rt_hw_lcd_draw_raw_hline(rt_uint8_t *pixels, rt_base_t x1, rt_base_t x2, rt_base_t y) -{ - rt_uint16_t *ptr; - - /* get pixel */ - ptr = (rt_uint16_t*) pixels; - - LCD_SetCursor(y, 319 - x1); - LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ - while (x1 < x2) - { - LCD_WriteRAM(*ptr); - x1 ++; ptr ++; - } - LCD_CtrlLinesWrite(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, Bit_SET); -} - -rt_err_t rt_hw_lcd_init(void) -{ - LCD_Setup(); - - /* add lcd driver into graphic driver */ - rtgui_graphic_driver_add(&_rtgui_lcd_driver); - return RT_EOK; -} - -void stm3210c_rtgui_init() -{ - rtgui_rect_t rect; - - rtgui_system_server_init(); - - /* register dock panel */ - rect.x1 = 0; - rect.y1 = 0; - rect.x2 = 320; - rect.y2 = 25; - rtgui_panel_register("info", &rect); - - /* register main panel */ - rect.x1 = 0; - rect.y1 = 25; - rect.x2 = 320; - rect.y2 = 240; - rtgui_panel_register("main", &rect); - rtgui_panel_set_default_focused("main"); - - rt_hw_lcd_init(); - - info_init(); - today_init(); -} - -#ifdef RT_USING_FINSH -#include - -void hline(rt_base_t x1, rt_base_t x2, rt_base_t y, rt_uint32_t pixel) -{ - rt_hw_lcd_draw_hline(&pixel, x1, x2, y); -} -FINSH_FUNCTION_EXPORT(hline, draw a hline); - -void vline(int x, int y1, int y2, rt_uint32_t pixel) -{ - rt_hw_lcd_draw_vline(&pixel, x, y1, y2); -} -FINSH_FUNCTION_EXPORT(vline, draw a vline); - -void cls(rt_uint32_t c) -{ - rt_size_t index; - - for(index = 0; index < 240; index ++) - rt_hw_lcd_draw_hline(&c, 0, 320, index); -} -FINSH_FUNCTION_EXPORT(cls, clear screen); -#endif diff --git a/bsp/stm32f10x/stm3210c_eval_lcd.h b/bsp/stm32f10x/stm3210c_eval_lcd.h deleted file mode 100644 index a39a8adb4c..0000000000 --- a/bsp/stm32f10x/stm3210c_eval_lcd.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * File : stm3210c_eval_lcd.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-11-01 Bernard the first version - */ - -#ifndef __STM3210C_EVAL_LCD_H__ -#define __STM3210C_EVAL_LCD_H__ - - -/** - * @brief LCD Control pins - */ -#define LCD_NCS_PIN GPIO_Pin_2 -#define LCD_NCS_GPIO_PORT GPIOB -#define LCD_NCS_GPIO_CLK RCC_APB2Periph_GPIOB - -/** - * @brief LCD SPI Interface pins - */ -#define LCD_SPI_SCK_PIN GPIO_Pin_10 -#define LCD_SPI_MISO_PIN GPIO_Pin_11 -#define LCD_SPI_MOSI_PIN GPIO_Pin_12 -#define LCD_SPI_GPIO_PORT GPIOC -#define LCD_SPI_GPIO_CLK RCC_APB2Periph_GPIOC -#define LCD_SPI SPI3 -#define LCD_SPI_CLK RCC_APB1Periph_SPI3 - -/** - * @brief LCD Registers - */ -#define R0 0x00 -#define R1 0x01 -#define R2 0x02 -#define R3 0x03 -#define R4 0x04 -#define R5 0x05 -#define R6 0x06 -#define R7 0x07 -#define R8 0x08 -#define R9 0x09 -#define R10 0x0A -#define R12 0x0C -#define R13 0x0D -#define R14 0x0E -#define R15 0x0F -#define R16 0x10 -#define R17 0x11 -#define R18 0x12 -#define R19 0x13 -#define R20 0x14 -#define R21 0x15 -#define R22 0x16 -#define R23 0x17 -#define R24 0x18 -#define R25 0x19 -#define R26 0x1A -#define R27 0x1B -#define R28 0x1C -#define R29 0x1D -#define R30 0x1E -#define R31 0x1F -#define R32 0x20 -#define R33 0x21 -#define R34 0x22 -#define R36 0x24 -#define R37 0x25 -#define R40 0x28 -#define R41 0x29 -#define R43 0x2B -#define R45 0x2D -#define R48 0x30 -#define R49 0x31 -#define R50 0x32 -#define R51 0x33 -#define R52 0x34 -#define R53 0x35 -#define R54 0x36 -#define R55 0x37 -#define R56 0x38 -#define R57 0x39 -#define R59 0x3B -#define R60 0x3C -#define R61 0x3D -#define R62 0x3E -#define R63 0x3F -#define R64 0x40 -#define R65 0x41 -#define R66 0x42 -#define R67 0x43 -#define R68 0x44 -#define R69 0x45 -#define R70 0x46 -#define R71 0x47 -#define R72 0x48 -#define R73 0x49 -#define R74 0x4A -#define R75 0x4B -#define R76 0x4C -#define R77 0x4D -#define R78 0x4E -#define R79 0x4F -#define R80 0x50 -#define R81 0x51 -#define R82 0x52 -#define R83 0x53 -#define R96 0x60 -#define R97 0x61 -#define R106 0x6A -#define R118 0x76 -#define R128 0x80 -#define R129 0x81 -#define R130 0x82 -#define R131 0x83 -#define R132 0x84 -#define R133 0x85 -#define R134 0x86 -#define R135 0x87 -#define R136 0x88 -#define R137 0x89 -#define R139 0x8B -#define R140 0x8C -#define R141 0x8D -#define R143 0x8F -#define R144 0x90 -#define R145 0x91 -#define R146 0x92 -#define R147 0x93 -#define R148 0x94 -#define R149 0x95 -#define R150 0x96 -#define R151 0x97 -#define R152 0x98 -#define R153 0x99 -#define R154 0x9A -#define R157 0x9D -#define R192 0xC0 -#define R193 0xC1 -#define R229 0xE5 - -#endif diff --git a/bsp/stm32f10x/stm3210e_eval_lcd.c b/bsp/stm32f10x/stm3210e_eval_lcd.c deleted file mode 100644 index 782897670f..0000000000 --- a/bsp/stm32f10x/stm3210e_eval_lcd.c +++ /dev/null @@ -1,501 +0,0 @@ -/* - * File : stm3210e_eval_lcd.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-11-01 Bernard the first version - */ - -#include - -#include "stm32f10x.h" -#include "stm32f10x_fsmc.h" -#include "stm3210e_eval_lcd.h" - -#ifdef RT_USING_RTGUI - -#include -#include - -/* - * LCD Driver - * RGB mode (5-6-5) - * 240 x 320 pixel LCD - */ -/* convert rtgui color to hardware color, rgb 5-6-5 */ -typedef struct -{ - rt_uint16_t LCD_REG; - rt_uint16_t LCD_RAM; -} LCD_TypeDef; - -/* Note: LCD /CS is CE4 - Bank 4 of NOR/SRAM Bank 1~4 */ -#define LCD_BASE ((rt_uint32_t)(0x60000000 | 0x0C000000)) -#define LCD ((LCD_TypeDef *) LCD_BASE) - -/******************************************************************************* -* Function Name : LCD_WriteReg -* Description : Writes to the selected LCD register. -* Input : - LCD_Reg: address of the selected register. -* - LCD_RegValue: value to write to the selected register. -* Output : None -* Return : None -*******************************************************************************/ -void LCD_WriteReg(rt_uint8_t LCD_Reg, rt_uint16_t LCD_RegValue) -{ - /* Write 16-bit Index, then Write Reg */ - LCD->LCD_REG = LCD_Reg; - /* Write 16-bit Reg */ - LCD->LCD_RAM = LCD_RegValue; -} - -/******************************************************************************* -* Function Name : LCD_ReadReg -* Description : Reads the selected LCD Register. -* Input : None -* Output : None -* Return : LCD Register Value. -*******************************************************************************/ -rt_uint16_t LCD_ReadReg(rt_uint8_t LCD_Reg) -{ - /* Write 16-bit Index (then Read Reg) */ - LCD->LCD_REG = LCD_Reg; - /* Read 16-bit Reg */ - return (LCD->LCD_RAM); -} - -/******************************************************************************* -* Function Name : LCD_WriteRAM_Prepare -* Description : Prepare to write to the LCD RAM. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void LCD_WriteRAM_Prepare(void) -{ - LCD->LCD_REG = R34; -} - -/******************************************************************************* -* Function Name : LCD_WriteRAM -* Description : Writes to the LCD RAM. -* Input : - RGB_Code: the pixel color in RGB mode (5-6-5). -* Output : None -* Return : None -*******************************************************************************/ -rt_inline void LCD_WriteRAM(rt_uint16_t RGB_Code) -{ - /* Write 16-bit GRAM Reg */ - LCD->LCD_RAM = RGB_Code; -} - -/******************************************************************************* -* Function Name : LCD_ReadRAM -* Description : Reads the LCD RAM. -* Input : None -* Output : None -* Return : LCD RAM Value. -*******************************************************************************/ -rt_inline rt_uint16_t LCD_ReadRAM(void) -{ - /* Write 16-bit Index (then Read Reg) */ - LCD->LCD_REG = R34; /* Select GRAM Reg */ - /* Read 16-bit Reg */ - return LCD->LCD_RAM; -} - -/******************************************************************************* -* Function Name : LCD_DisplayOn -* Description : Enables the Display. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void LCD_DisplayOn(void) -{ - /* Display On */ - LCD_WriteReg(0x26, 0x3C); /* 262K color and display ON */ -} - -/******************************************************************************* -* Function Name : LCD_DisplayOff -* Description : Disables the Display. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void LCD_DisplayOff(void) -{ - /* Display Off */ - LCD_WriteReg(0x26, 0x0); -} - -/******************************************************************************* -* Function Name : LCD_SetCursor -* Description : Sets the cursor position. -* Input : - Xpos: specifies the X position. -* - Ypos: specifies the Y position. -* Output : None -* Return : None -*******************************************************************************/ -void LCD_SetCursor(rt_uint32_t x, rt_uint32_t y) -{ - LCD_WriteReg(0x06, (x & 0xff00) >> 8); - LCD_WriteReg(0x07, (x & 0x00ff)); - - LCD_WriteReg(0x02, (y & 0xff00) >> 8); - LCD_WriteReg(0x03, (y & 0x00ff)); -} - -/******************************************************************************* -* Function Name : LCD_CtrlLinesConfig -* Description : Configures LCD Control lines (FSMC Pins) in alternate function - Push-Pull mode. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void LCD_CtrlLinesConfig(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - - /* Enable FSMC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */ - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | - RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG | - RCC_APB2Periph_AFIO, ENABLE); - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8; - //背光 - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_Init(GPIOA, &GPIO_InitStructure); - GPIO_ResetBits(GPIOA, GPIO_Pin_8); - //蜂鸣器 - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; - GPIO_Init(GPIOC, &GPIO_InitStructure); - GPIO_SetBits(GPIOC, GPIO_Pin_6); - - /* Set PD.00(D2), PD.01(D3), PD.04(NOE), PD.05(NWE), PD.08(D13), PD.09(D14), - PD.10(D15), PD.14(D0), PD.15(D1) as alternate - function push pull */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | - GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_14 | - GPIO_Pin_15; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOD, &GPIO_InitStructure); - - /* Set PE.07(D4), PE.08(D5), PE.09(D6), PE.10(D7), PE.11(D8), PE.12(D9), PE.13(D10), - PE.14(D11), PE.15(D12) as alternate function push pull */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | - GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | - GPIO_Pin_15; - GPIO_Init(GPIOE, &GPIO_InitStructure); - - // GPIO_WriteBit(GPIOE, GPIO_Pin_6, Bit_SET); - /* Set PF.00(A0 (RS)) as alternate function push pull */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; - GPIO_Init(GPIOF, &GPIO_InitStructure); - - /* Set PG.12(NE4 (LCD/CS)) as alternate function push pull - CE3(LCD /CS) */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; - GPIO_Init(GPIOG, &GPIO_InitStructure); -} - -/******************************************************************************* -* Function Name : LCD_FSMCConfig -* Description : Configures the Parallel interface (FSMC) for LCD(Parallel mode) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void LCD_FSMCConfig(void) -{ - FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; - FSMC_NORSRAMTimingInitTypeDef p; - - /*-- FSMC Configuration ------------------------------------------------------*/ - /*----------------------- SRAM Bank 4 ----------------------------------------*/ - /* FSMC_Bank1_NORSRAM4 configuration */ - p.FSMC_AddressSetupTime = 0; - p.FSMC_AddressHoldTime = 0; - p.FSMC_DataSetupTime = 2; - p.FSMC_BusTurnAroundDuration = 0; - p.FSMC_CLKDivision = 0; - p.FSMC_DataLatency = 0; - p.FSMC_AccessMode = FSMC_AccessMode_A; - - /* Color LCD configuration ------------------------------------ - LCD configured as follow: - - Data/Address MUX = Disable - - Memory Type = SRAM - - Data Width = 16bit - - Write Operation = Enable - - Extended Mode = Enable - - Asynchronous Wait = Disable */ - FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4; - FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; - FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; - FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; - FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; - FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; - FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; - FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; - // FSMC_NORSRAMInitStructure.FSMC_AsyncWait = FSMC_AsyncWait_Disable; - FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; - FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; - FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; - - FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); - - /* BANK 4 (of NOR/SRAM Bank 1~4) is enabled */ - FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); -} - -void rt_hw_lcd_update(rtgui_rect_t *rect) -{ - /* nothing */ -} - -rt_uint8_t * rt_hw_lcd_get_framebuffer(void) -{ - return RT_NULL; -} - -void rt_hw_lcd_set_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y) -{ - unsigned short p; - - /* get color pixel */ - p = rtgui_color_to_565p(*c); - - LCD_SetCursor(y, x); - - /* Prepare to write GRAM */ - LCD_WriteRAM_Prepare(); - LCD_WriteRAM(p); -} - -void rt_hw_lcd_get_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y) -{ - rt_uint16_t hc; - - LCD_SetCursor(y, x); - hc = LCD_ReadRAM(); - *c = rtgui_color_from_565p(hc); -} - -void rt_hw_lcd_draw_hline(rtgui_color_t *c, rt_base_t x1, rt_base_t x2, rt_base_t y) -{ - rt_uint16_t hc; - - hc = rtgui_color_to_565p(*c); - - LCD_SetCursor(y, x1); - LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ - - while (x1 < x2) - { - LCD_WriteRAM(hc); - x1 ++; - } -} - -void rt_hw_lcd_draw_vline(rtgui_color_t *c, rt_base_t x, rt_base_t y1, rt_base_t y2) -{ - rt_uint16_t hc; - - hc = rtgui_color_to_565p(*c); - - while (y1 < y2) - { - LCD_SetCursor(y1, x); y1 ++; - - /* Prepare to write GRAM */ - LCD_WriteRAM_Prepare(); - LCD_WriteRAM(hc); - } -} - -void rt_hw_lcd_draw_raw_hline(rt_uint8_t *pixels, rt_base_t x1, rt_base_t x2, rt_base_t y) -{ - rt_uint16_t *ptr; - - /* get pixel */ - ptr = (rt_uint16_t*) pixels; - - LCD_SetCursor(y, x1); - LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ - - while (x1 < x2) - { - LCD_WriteRAM(*ptr); - x1 ++; ptr ++; - } -} - -struct rtgui_graphic_driver _rtgui_lcd_driver = -{ - "lcd", - 2, - 320, - 240, - rt_hw_lcd_update, - rt_hw_lcd_get_framebuffer, - rt_hw_lcd_set_pixel, - rt_hw_lcd_get_pixel, - rt_hw_lcd_draw_hline, - rt_hw_lcd_draw_vline, - rt_hw_lcd_draw_raw_hline -}; - -#define Delay(v) \ - { \ - volatile rt_uint32_t index; \ - for (index = 0; index < v * 100; index ++) \ - ; \ - } - -void rt_hw_lcd_init() -{ - /* Configure the LCD Control pins --------------------------------------------*/ - LCD_CtrlLinesConfig(); - - /* Configure the FSMC Parallel interface -------------------------------------*/ - LCD_FSMCConfig(); - - Delay(5); /* delay 50 ms */ - // Gamma for CMO 3.2” - LCD_WriteReg(0x46,0x94); - LCD_WriteReg(0x47,0x41); - LCD_WriteReg(0x48,0x00); - LCD_WriteReg(0x49,0x33); - LCD_WriteReg(0x4a,0x23); - LCD_WriteReg(0x4b,0x45); - LCD_WriteReg(0x4c,0x44); - LCD_WriteReg(0x4d,0x77); - LCD_WriteReg(0x4e,0x12); - LCD_WriteReg(0x4f,0xcc); - LCD_WriteReg(0x50,0x46); - LCD_WriteReg(0x51,0x82); - - //240x320 window setting - LCD_WriteReg(0x02,0x00); - LCD_WriteReg(0x03,0x00); - LCD_WriteReg(0x04,0x01); - LCD_WriteReg(0x05,0x3f); - LCD_WriteReg(0x06,0x00); - LCD_WriteReg(0x07,0x00); - LCD_WriteReg(0x08,0x00); - LCD_WriteReg(0x09,0xef); - - // Display Setting - LCD_WriteReg(0x01,0x06); - LCD_WriteReg(0x16,0x68); - LCD_WriteReg(0x23,0x95); - LCD_WriteReg(0x24,0x95); - LCD_WriteReg(0x25,0xff); - - LCD_WriteReg(0x27,0x02); - LCD_WriteReg(0x28,0x02); - LCD_WriteReg(0x29,0x02); - LCD_WriteReg(0x2a,0x02); - LCD_WriteReg(0x2c,0x02); - LCD_WriteReg(0x2d,0x02); - - LCD_WriteReg(0x3a,0x01);///******************* - LCD_WriteReg(0x3b,0x01); - LCD_WriteReg(0x3c,0xf0); - LCD_WriteReg(0x3d,0x00); - - Delay(2); - - LCD_WriteReg(0x35,0x38); - LCD_WriteReg(0x36,0x78); - - LCD_WriteReg(0x3e,0x38); - - LCD_WriteReg(0x40,0x0f); - LCD_WriteReg(0x41,0xf0); - - // Power Supply Setting - LCD_WriteReg(0x19,0x49);//******** - LCD_WriteReg(0x93,0x0f);//******* - - Delay(1); - - LCD_WriteReg(0x20,0x30); - LCD_WriteReg(0x1d,0x07); - LCD_WriteReg(0x1e,0x00); - LCD_WriteReg(0x1f,0x07); - - // VCOM Setting for CMO 3.2” Panel - LCD_WriteReg(0x44,0x4d);//4d***************4f - LCD_WriteReg(0x45,0x13);//0x0a); - Delay(1); - LCD_WriteReg(0x1c,0x04); - Delay(2); - LCD_WriteReg(0x43,0x80); - Delay(5); - LCD_WriteReg(0x1b,0x08); - Delay(4); - LCD_WriteReg(0x1b,0x10); - Delay(4); - - // Display ON Setting - LCD_WriteReg(0x90,0x7f); - LCD_WriteReg(0x26,0x04); - Delay(4); - LCD_WriteReg(0x26,0x24); - LCD_WriteReg(0x26,0x2c); - Delay(4); - LCD_WriteReg(0x26,0x3c); - - // Set internal VDDD voltage - LCD_WriteReg(0x57,0x02); - LCD_WriteReg(0x55,0x00); - LCD_WriteReg(0x57,0x00); - - /* add lcd driver into graphic driver */ - rtgui_list_init(&_rtgui_lcd_driver.list); - rtgui_graphic_driver_add(&_rtgui_lcd_driver); -} - -#endif - -void stm3210e_rtgui_init() -{ - rtgui_rect_t rect; - - rtgui_system_server_init(); - - /* register dock panel */ - rect.x1 = 0; - rect.y1 = 0; - rect.x2 = 320; - rect.y2 = 25; - rtgui_panel_register("info", &rect); - - /* register main panel */ - rect.x1 = 0; - rect.y1 = 25; - rect.x2 = 320; - rect.y2 = 240; - rtgui_panel_register("main", &rect); - rtgui_panel_set_default_focused("main"); - - rt_hw_lcd_init(); - - info_init(); - today_init(); -} diff --git a/bsp/stm32f10x/stm3210e_eval_lcd.h b/bsp/stm32f10x/stm3210e_eval_lcd.h deleted file mode 100644 index b2e6656610..0000000000 --- a/bsp/stm32f10x/stm3210e_eval_lcd.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * File : stm3210e_eval_lcd.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-11-01 Bernard the first version - */ - -#ifndef __LCD_H__ -#define __LCD_H__ - -#include -#include - -/* LCD Registers */ -#define R0 0x00 -#define R1 0x01 -#define R2 0x02 -#define R3 0x03 -#define R4 0x04 -#define R5 0x05 -#define R6 0x06 -#define R7 0x07 -#define R8 0x08 -#define R9 0x09 -#define R10 0x0A -#define R12 0x0C -#define R13 0x0D -#define R14 0x0E -#define R15 0x0F -#define R16 0x10 -#define R17 0x11 -#define R18 0x12 -#define R19 0x13 -#define R20 0x14 -#define R21 0x15 -#define R22 0x16 -#define R23 0x17 -#define R24 0x18 -#define R25 0x19 -#define R26 0x1A -#define R27 0x1B -#define R28 0x1C -#define R29 0x1D -#define R30 0x1E -#define R31 0x1F -#define R32 0x20 -#define R33 0x21 -#define R34 0x22 -#define R36 0x24 -#define R37 0x25 -#define R40 0x28 -#define R41 0x29 -#define R43 0x2B -#define R45 0x2D -#define R48 0x30 -#define R49 0x31 -#define R50 0x32 -#define R51 0x33 -#define R52 0x34 -#define R53 0x35 -#define R54 0x36 -#define R55 0x37 -#define R56 0x38 -#define R57 0x39 -#define R59 0x3B -#define R60 0x3C -#define R61 0x3D -#define R62 0x3E -#define R63 0x3F -#define R64 0x40 -#define R65 0x41 -#define R66 0x42 -#define R67 0x43 -#define R68 0x44 -#define R69 0x45 -#define R70 0x46 -#define R71 0x47 -#define R72 0x48 -#define R73 0x49 -#define R74 0x4A -#define R75 0x4B -#define R76 0x4C -#define R77 0x4D -#define R78 0x4E -#define R79 0x4F -#define R80 0x50 -#define R81 0x51 -#define R82 0x52 -#define R83 0x53 -#define R96 0x60 -#define R97 0x61 -#define R106 0x6A -#define R118 0x76 -#define R128 0x80 -#define R129 0x81 -#define R130 0x82 -#define R131 0x83 -#define R132 0x84 -#define R133 0x85 -#define R134 0x86 -#define R135 0x87 -#define R136 0x88 -#define R137 0x89 -#define R139 0x8B -#define R140 0x8C -#define R141 0x8D -#define R143 0x8F -#define R144 0x90 -#define R145 0x91 -#define R146 0x92 -#define R147 0x93 -#define R148 0x94 -#define R149 0x95 -#define R150 0x96 -#define R151 0x97 -#define R152 0x98 -#define R153 0x99 -#define R154 0x9A -#define R157 0x9D -#define R192 0xC0 -#define R193 0xC1 -#define R229 0xE5 - -/* LCD Control pins */ -#define CtrlPin_NCS GPIO_Pin_2 /* PB.02 */ -#define CtrlPin_RS GPIO_Pin_7 /* PD.07 */ -#define CtrlPin_NWR GPIO_Pin_15 /* PD.15 */ - -/* LCD color */ -#define White 0xFFFF -#define Black 0x0000 -#define Grey 0xF7DE -#define Blue 0x001F -#define Blue2 0x051F -#define Red 0xF800 -#define Magenta 0xF81F -#define Green 0x07E0 -#define Cyan 0x7FFF -#define Yellow 0xFFE0 - -#define Line0 0 -#define Line1 24 -#define Line2 48 -#define Line3 72 -#define Line4 96 -#define Line5 120 -#define Line6 144 -#define Line7 168 -#define Line8 192 -#define Line9 216 - -#define Horizontal 0x00 -#define Vertical 0x01 - -#endif From 8c2a11c2340fb938d7889316f29de053736ef699 Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 18:14:39 +0800 Subject: [PATCH 02/11] update stm32f10x project directory structure. --- bsp/stm32f10x/SConscript | 39 +- bsp/stm32f10x/SConstruct | 4 +- bsp/stm32f10x/applications/SConscript | 11 + .../{ => applications}/application.c | 0 bsp/stm32f10x/{ => applications}/startup.c | 0 bsp/stm32f10x/drivers/SConscript | 40 + bsp/stm32f10x/{ => drivers}/board.c | 0 bsp/stm32f10x/{ => drivers}/board.h | 0 bsp/stm32f10x/{ => drivers}/dm9000a.c | 0 bsp/stm32f10x/{ => drivers}/dm9000a.h | 0 bsp/stm32f10x/{ => drivers}/ili_lcd_general.c | 0 bsp/stm32f10x/{ => drivers}/ili_lcd_general.h | 0 bsp/stm32f10x/{ => drivers}/led.c | 0 bsp/stm32f10x/{ => drivers}/led.h | 0 bsp/stm32f10x/{ => drivers}/rtc.c | 0 bsp/stm32f10x/{ => drivers}/rtc.h | 0 bsp/stm32f10x/{ => drivers}/sdcard.c | 0 bsp/stm32f10x/{ => drivers}/sdcard.h | 0 bsp/stm32f10x/{ => drivers}/serial.c | 0 bsp/stm32f10x/{ => drivers}/serial.h | 0 bsp/stm32f10x/{ => drivers}/ssd1289.c | 0 bsp/stm32f10x/{ => drivers}/ssd1289.h | 0 bsp/stm32f10x/{ => drivers}/stm32f10x_conf.h | 0 bsp/stm32f10x/{ => drivers}/stm32f10x_it.c | 0 bsp/stm32f10x/{ => drivers}/stm32f10x_it.h | 0 bsp/stm32f10x/{ => drivers}/touch.c | 0 bsp/stm32f10x/{ => drivers}/touch.h | 0 bsp/stm32f10x/{ => drivers}/usart.c | 0 bsp/stm32f10x/{ => drivers}/usart.h | 0 bsp/stm32f10x/enc28j60.c | 779 --------------- bsp/stm32f10x/enc28j60.h | 315 ------ bsp/stm32f10x/msd.c | 942 ------------------ bsp/stm32f10x/msd.h | 173 ---- 33 files changed, 62 insertions(+), 2241 deletions(-) create mode 100644 bsp/stm32f10x/applications/SConscript rename bsp/stm32f10x/{ => applications}/application.c (100%) rename bsp/stm32f10x/{ => applications}/startup.c (100%) create mode 100644 bsp/stm32f10x/drivers/SConscript rename bsp/stm32f10x/{ => drivers}/board.c (100%) rename bsp/stm32f10x/{ => drivers}/board.h (100%) rename bsp/stm32f10x/{ => drivers}/dm9000a.c (100%) rename bsp/stm32f10x/{ => drivers}/dm9000a.h (100%) rename bsp/stm32f10x/{ => drivers}/ili_lcd_general.c (100%) rename bsp/stm32f10x/{ => drivers}/ili_lcd_general.h (100%) rename bsp/stm32f10x/{ => drivers}/led.c (100%) rename bsp/stm32f10x/{ => drivers}/led.h (100%) rename bsp/stm32f10x/{ => drivers}/rtc.c (100%) rename bsp/stm32f10x/{ => drivers}/rtc.h (100%) rename bsp/stm32f10x/{ => drivers}/sdcard.c (100%) rename bsp/stm32f10x/{ => drivers}/sdcard.h (100%) rename bsp/stm32f10x/{ => drivers}/serial.c (100%) rename bsp/stm32f10x/{ => drivers}/serial.h (100%) rename bsp/stm32f10x/{ => drivers}/ssd1289.c (100%) rename bsp/stm32f10x/{ => drivers}/ssd1289.h (100%) rename bsp/stm32f10x/{ => drivers}/stm32f10x_conf.h (100%) rename bsp/stm32f10x/{ => drivers}/stm32f10x_it.c (100%) rename bsp/stm32f10x/{ => drivers}/stm32f10x_it.h (100%) rename bsp/stm32f10x/{ => drivers}/touch.c (100%) rename bsp/stm32f10x/{ => drivers}/touch.h (100%) rename bsp/stm32f10x/{ => drivers}/usart.c (100%) rename bsp/stm32f10x/{ => drivers}/usart.h (100%) delete mode 100644 bsp/stm32f10x/enc28j60.c delete mode 100644 bsp/stm32f10x/enc28j60.h delete mode 100644 bsp/stm32f10x/msd.c delete mode 100644 bsp/stm32f10x/msd.h diff --git a/bsp/stm32f10x/SConscript b/bsp/stm32f10x/SConscript index 496f6560be..fe0ae941ae 100644 --- a/bsp/stm32f10x/SConscript +++ b/bsp/stm32f10x/SConscript @@ -1,33 +1,14 @@ -import rtconfig +# for module compiling +import os Import('RTT_ROOT') -from building import * -src_bsp = ['application.c', 'startup.c', 'board.c', 'stm32f10x_it.c'] -src_drv = ['rtc.c', 'usart.c', 'serial.c', 'led.c'] +cwd = str(Dir('#')) +objs = [] +list = os.listdir(cwd) -if GetDepend('RT_USING_DFS'): - if rtconfig.STM32_TYPE == 'STM32F10X_HD': - src_drv += ['sdcard.c'] - else: - src_drv += ['msd.c'] +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) -if GetDepend('RT_USING_LWIP'): - src_drv += ['enc28j60.c'] + ['dm9000a.c'] - -if GetDepend('RT_USING_RTGUI'): - src_drv += ['touch.c'] - -if GetDepend('RT_USING_RTGUI'): - if rtconfig.RT_USING_LCD_TYPE == 'FMT0371': - src_drv += ['lcd_a70.c'] - elif rtconfig.RT_USING_LCD_TYPE == 'ILI932X': - src_drv += ['ili_lcd_general.c'] - elif rtconfig.RT_USING_LCD_TYPE == 'SSD1289': - src_drv += ['ssd1289.c'] - -src = src_bsp + src_drv -CPPPATH = [ GetCurrentDir() ] -CPPDEFINES = [] -group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES) - -Return('group') +Return('objs') diff --git a/bsp/stm32f10x/SConstruct b/bsp/stm32f10x/SConstruct index 54df76872b..1b757827f8 100644 --- a/bsp/stm32f10x/SConstruct +++ b/bsp/stm32f10x/SConstruct @@ -28,10 +28,8 @@ Export('RTT_ROOT') Export('rtconfig') # prepare building environment -objs = PrepareBuilding(env, RTT_ROOT) +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) -# STM32 firemare library building script -objs = objs + SConscript( GetCurrentDir() + '/Libraries/SConscript', variant_dir='build/bsp/Libraries', duplicate=0) # make a building DoBuilding(TARGET, objs) diff --git a/bsp/stm32f10x/applications/SConscript b/bsp/stm32f10x/applications/SConscript new file mode 100644 index 0000000000..01eb940dfb --- /dev/null +++ b/bsp/stm32f10x/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'applications') +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/stm32f10x/application.c b/bsp/stm32f10x/applications/application.c similarity index 100% rename from bsp/stm32f10x/application.c rename to bsp/stm32f10x/applications/application.c diff --git a/bsp/stm32f10x/startup.c b/bsp/stm32f10x/applications/startup.c similarity index 100% rename from bsp/stm32f10x/startup.c rename to bsp/stm32f10x/applications/startup.c diff --git a/bsp/stm32f10x/drivers/SConscript b/bsp/stm32f10x/drivers/SConscript new file mode 100644 index 0000000000..36bc419f66 --- /dev/null +++ b/bsp/stm32f10x/drivers/SConscript @@ -0,0 +1,40 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'drivers') + +# add the general drvers. +src = Split(""" +board.c +led.c +serial.c +usart.c +""") + +# add Ethernet drvers. +if GetDepend('RT_USING_LWIP'): + src += ['dm9000a.c'] + +# add Ethernet drvers. +if GetDepend('RT_USING_DFS'): + src += ['sdcard.c'] + +# add Ethernet drvers. +if GetDepend('RT_USING_RTC'): + src += ['rtc.c'] + +# add Ethernet drvers. +if GetDepend('RT_USING_RTGUI'): + src += ['touch.c'] + if rtconfig.RT_USING_LCD_TYPE == 'ILI932X': + src += ['ili_lcd_general.c'] + elif rtconfig.RT_USING_LCD_TYPE == 'SSD1289': + src += ['ssd1289.c'] + + +CPPPATH = [cwd] + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/stm32f10x/board.c b/bsp/stm32f10x/drivers/board.c similarity index 100% rename from bsp/stm32f10x/board.c rename to bsp/stm32f10x/drivers/board.c diff --git a/bsp/stm32f10x/board.h b/bsp/stm32f10x/drivers/board.h similarity index 100% rename from bsp/stm32f10x/board.h rename to bsp/stm32f10x/drivers/board.h diff --git a/bsp/stm32f10x/dm9000a.c b/bsp/stm32f10x/drivers/dm9000a.c similarity index 100% rename from bsp/stm32f10x/dm9000a.c rename to bsp/stm32f10x/drivers/dm9000a.c diff --git a/bsp/stm32f10x/dm9000a.h b/bsp/stm32f10x/drivers/dm9000a.h similarity index 100% rename from bsp/stm32f10x/dm9000a.h rename to bsp/stm32f10x/drivers/dm9000a.h diff --git a/bsp/stm32f10x/ili_lcd_general.c b/bsp/stm32f10x/drivers/ili_lcd_general.c similarity index 100% rename from bsp/stm32f10x/ili_lcd_general.c rename to bsp/stm32f10x/drivers/ili_lcd_general.c diff --git a/bsp/stm32f10x/ili_lcd_general.h b/bsp/stm32f10x/drivers/ili_lcd_general.h similarity index 100% rename from bsp/stm32f10x/ili_lcd_general.h rename to bsp/stm32f10x/drivers/ili_lcd_general.h diff --git a/bsp/stm32f10x/led.c b/bsp/stm32f10x/drivers/led.c similarity index 100% rename from bsp/stm32f10x/led.c rename to bsp/stm32f10x/drivers/led.c diff --git a/bsp/stm32f10x/led.h b/bsp/stm32f10x/drivers/led.h similarity index 100% rename from bsp/stm32f10x/led.h rename to bsp/stm32f10x/drivers/led.h diff --git a/bsp/stm32f10x/rtc.c b/bsp/stm32f10x/drivers/rtc.c similarity index 100% rename from bsp/stm32f10x/rtc.c rename to bsp/stm32f10x/drivers/rtc.c diff --git a/bsp/stm32f10x/rtc.h b/bsp/stm32f10x/drivers/rtc.h similarity index 100% rename from bsp/stm32f10x/rtc.h rename to bsp/stm32f10x/drivers/rtc.h diff --git a/bsp/stm32f10x/sdcard.c b/bsp/stm32f10x/drivers/sdcard.c similarity index 100% rename from bsp/stm32f10x/sdcard.c rename to bsp/stm32f10x/drivers/sdcard.c diff --git a/bsp/stm32f10x/sdcard.h b/bsp/stm32f10x/drivers/sdcard.h similarity index 100% rename from bsp/stm32f10x/sdcard.h rename to bsp/stm32f10x/drivers/sdcard.h diff --git a/bsp/stm32f10x/serial.c b/bsp/stm32f10x/drivers/serial.c similarity index 100% rename from bsp/stm32f10x/serial.c rename to bsp/stm32f10x/drivers/serial.c diff --git a/bsp/stm32f10x/serial.h b/bsp/stm32f10x/drivers/serial.h similarity index 100% rename from bsp/stm32f10x/serial.h rename to bsp/stm32f10x/drivers/serial.h diff --git a/bsp/stm32f10x/ssd1289.c b/bsp/stm32f10x/drivers/ssd1289.c similarity index 100% rename from bsp/stm32f10x/ssd1289.c rename to bsp/stm32f10x/drivers/ssd1289.c diff --git a/bsp/stm32f10x/ssd1289.h b/bsp/stm32f10x/drivers/ssd1289.h similarity index 100% rename from bsp/stm32f10x/ssd1289.h rename to bsp/stm32f10x/drivers/ssd1289.h diff --git a/bsp/stm32f10x/stm32f10x_conf.h b/bsp/stm32f10x/drivers/stm32f10x_conf.h similarity index 100% rename from bsp/stm32f10x/stm32f10x_conf.h rename to bsp/stm32f10x/drivers/stm32f10x_conf.h diff --git a/bsp/stm32f10x/stm32f10x_it.c b/bsp/stm32f10x/drivers/stm32f10x_it.c similarity index 100% rename from bsp/stm32f10x/stm32f10x_it.c rename to bsp/stm32f10x/drivers/stm32f10x_it.c diff --git a/bsp/stm32f10x/stm32f10x_it.h b/bsp/stm32f10x/drivers/stm32f10x_it.h similarity index 100% rename from bsp/stm32f10x/stm32f10x_it.h rename to bsp/stm32f10x/drivers/stm32f10x_it.h diff --git a/bsp/stm32f10x/touch.c b/bsp/stm32f10x/drivers/touch.c similarity index 100% rename from bsp/stm32f10x/touch.c rename to bsp/stm32f10x/drivers/touch.c diff --git a/bsp/stm32f10x/touch.h b/bsp/stm32f10x/drivers/touch.h similarity index 100% rename from bsp/stm32f10x/touch.h rename to bsp/stm32f10x/drivers/touch.h diff --git a/bsp/stm32f10x/usart.c b/bsp/stm32f10x/drivers/usart.c similarity index 100% rename from bsp/stm32f10x/usart.c rename to bsp/stm32f10x/drivers/usart.c diff --git a/bsp/stm32f10x/usart.h b/bsp/stm32f10x/drivers/usart.h similarity index 100% rename from bsp/stm32f10x/usart.h rename to bsp/stm32f10x/drivers/usart.h diff --git a/bsp/stm32f10x/enc28j60.c b/bsp/stm32f10x/enc28j60.c deleted file mode 100644 index c87b69ae9f..0000000000 --- a/bsp/stm32f10x/enc28j60.c +++ /dev/null @@ -1,779 +0,0 @@ -/* - * File : enc28j60.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-05-05 Bernard the first version - */ -#include "enc28j60.h" - -#include -#include -#include - -#define MAX_ADDR_LEN 6 - -#define CSACTIVE GPIOC->BRR = GPIO_Pin_12; -#define CSPASSIVE GPIOC->BSRR = GPIO_Pin_12; - -struct net_device -{ - /* inherit from ethernet device */ - struct eth_device parent; - - /* interface address info. */ - rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */ -}; - -static struct net_device enc28j60_dev_entry; -static struct net_device *enc28j60_dev =&enc28j60_dev_entry; -static rt_uint8_t Enc28j60Bank; -static rt_uint16_t NextPacketPtr; -static struct rt_semaphore lock_sem; - -void _delay_us(rt_uint32_t us) -{ - rt_uint32_t len; - for (;us > 0; us --) - for (len = 0; len < 20; len++ ); -} - -void delay_ms(rt_uint32_t ms) -{ - rt_uint32_t len; - for (;ms > 0; ms --) - for (len = 0; len < 100; len++ ); -} - -rt_uint8_t spi_read_op(rt_uint8_t op, rt_uint8_t address) -{ - int temp=0; - CSACTIVE; - - SPI_I2S_SendData(SPI1, (op | (address & ADDR_MASK))); - while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); - SPI_I2S_ReceiveData(SPI1); - SPI_I2S_SendData(SPI1, 0x00); - while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); - - // do dummy read if needed (for mac and mii, see datasheet page 29) - if(address & 0x80) - { - SPI_I2S_ReceiveData(SPI1); - SPI_I2S_SendData(SPI1, 0x00); - while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); - } - // release CS - - temp=SPI_I2S_ReceiveData(SPI1); - // for(t=0;t<20;t++); - CSPASSIVE; - return (temp); -} - -// 参数: 命令,地址,数据 -void spi_write_op(rt_uint8_t op, rt_uint8_t address, rt_uint8_t data) -{ - rt_uint32_t level; - - level = rt_hw_interrupt_disable(); - - CSACTIVE; - SPI_I2S_SendData(SPI1, op | (address & ADDR_MASK)); - while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); - SPI_I2S_SendData(SPI1,data); - while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); - CSPASSIVE; - - rt_hw_interrupt_enable(level); -} - -void enc28j60_set_bank(rt_uint8_t address) -{ - // set the bank (if needed) - if((address & BANK_MASK) != Enc28j60Bank) - { - // set the bank - spi_write_op(ENC28J60_BIT_FIELD_CLR, ECON1, (ECON1_BSEL1|ECON1_BSEL0)); - spi_write_op(ENC28J60_BIT_FIELD_SET, ECON1, (address & BANK_MASK)>>5); - Enc28j60Bank = (address & BANK_MASK); - } -} - -rt_uint8_t spi_read(rt_uint8_t address) -{ - // set the bank - enc28j60_set_bank(address); - // do the read - return spi_read_op(ENC28J60_READ_CTRL_REG, address); -} - -void spi_read_buffer(rt_uint8_t* data, rt_size_t len) -{ - CSACTIVE; - - SPI_I2S_SendData(SPI1,ENC28J60_READ_BUF_MEM); - while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); - - SPI_I2S_ReceiveData(SPI1); - - while(len) - { - len--; - SPI_I2S_SendData(SPI1,0x00) ; - while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); - - *data= SPI_I2S_ReceiveData(SPI1); - data++; - } - - CSPASSIVE; -} - -void spi_write(rt_uint8_t address, rt_uint8_t data) -{ - // set the bank - enc28j60_set_bank(address); - // do the write - spi_write_op(ENC28J60_WRITE_CTRL_REG, address, data); -} - -void enc28j60_phy_write(rt_uint8_t address, rt_uint16_t data) -{ - // set the PHY register address - spi_write(MIREGADR, address); - - // write the PHY data - spi_write(MIWRL, data); - spi_write(MIWRH, data>>8); - - // wait until the PHY write completes - while(spi_read(MISTAT) & MISTAT_BUSY) - { - _delay_us(15); - } -} - -// read upper 8 bits -rt_uint16_t enc28j60_phy_read(rt_uint8_t address) -{ - // Set the right address and start the register read operation - spi_write(MIREGADR, address); - spi_write(MICMD, MICMD_MIIRD); - - _delay_us(15); - - // wait until the PHY read completes - while(spi_read(MISTAT) & MISTAT_BUSY); - - // reset reading bit - spi_write(MICMD, 0x00); - - return (spi_read(MIRDH)); -} - -void enc28j60_clkout(rt_uint8_t clk) -{ - //setup clkout: 2 is 12.5MHz: - spi_write(ECOCON, clk & 0x7); -} - -rt_inline rt_uint32_t enc28j60_interrupt_disable() -{ - rt_uint32_t level; - - /* switch to bank 0 */ - enc28j60_set_bank(EIE); - - /* get last interrupt level */ - level = spi_read(EIE); - /* disable interrutps */ - spi_write_op(ENC28J60_BIT_FIELD_CLR, EIE, level); - - return level; -} - -rt_inline void enc28j60_interrupt_enable(rt_uint32_t level) -{ - /* switch to bank 0 */ - enc28j60_set_bank(EIE); - spi_write_op(ENC28J60_BIT_FIELD_SET, EIE, level); -} - -/* - * Access the PHY to determine link status - */ -static rt_bool_t enc28j60_check_link_status() -{ - rt_uint16_t reg; - int duplex; - - reg = enc28j60_phy_read(PHSTAT2); - duplex = reg & PHSTAT2_DPXSTAT; - - if (reg & PHSTAT2_LSTAT) - { - /* on */ - return RT_TRUE; - } - else - { - /* off */ - return RT_FALSE; - } -} - -#ifdef RT_USING_FINSH -/* - * Debug routine to dump useful register contents - */ -static void enc28j60(void) -{ - rt_kprintf("-- enc28j60 registers:\n"); - rt_kprintf("HwRevID: 0x%02x\n", spi_read(EREVID)); - rt_kprintf("Cntrl: ECON1 ECON2 ESTAT EIR EIE\n"); - rt_kprintf(" 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n",spi_read(ECON1), spi_read(ECON2), spi_read(ESTAT), spi_read(EIR), spi_read(EIE)); - rt_kprintf("MAC : MACON1 MACON3 MACON4\n"); - rt_kprintf(" 0x%02x 0x%02x 0x%02x\n", spi_read(MACON1), spi_read(MACON3), spi_read(MACON4)); - rt_kprintf("Rx : ERXST ERXND ERXWRPT ERXRDPT ERXFCON EPKTCNT MAMXFL\n"); - rt_kprintf(" 0x%04x 0x%04x 0x%04x 0x%04x ", - (spi_read(ERXSTH) << 8) | spi_read(ERXSTL), - (spi_read(ERXNDH) << 8) | spi_read(ERXNDL), - (spi_read(ERXWRPTH) << 8) | spi_read(ERXWRPTL), - (spi_read(ERXRDPTH) << 8) | spi_read(ERXRDPTL)); - rt_kprintf("0x%02x 0x%02x 0x%04x\n", spi_read(ERXFCON), spi_read(EPKTCNT), - (spi_read(MAMXFLH) << 8) | spi_read(MAMXFLL)); - - rt_kprintf("Tx : ETXST ETXND MACLCON1 MACLCON2 MAPHSUP\n"); - rt_kprintf(" 0x%04x 0x%04x 0x%02x 0x%02x 0x%02x\n", - (spi_read(ETXSTH) << 8) | spi_read(ETXSTL), - (spi_read(ETXNDH) << 8) | spi_read(ETXNDL), - spi_read(MACLCON1), spi_read(MACLCON2), spi_read(MAPHSUP)); -} -#include -FINSH_FUNCTION_EXPORT(enc28j60, dump enc28j60 registers); -#endif - -/* - * RX handler - * ignore PKTIF because is unreliable! (look at the errata datasheet) - * check EPKTCNT is the suggested workaround. - * We don't need to clear interrupt flag, automatically done when - * enc28j60_hw_rx() decrements the packet counter. - */ -void enc28j60_isr() -{ - /* Variable definitions can be made now. */ - volatile rt_uint32_t eir, pk_counter; - volatile rt_bool_t rx_activiated; - - rx_activiated = RT_FALSE; - - /* get EIR */ - eir = spi_read(EIR); - // rt_kprintf("eir: 0x%08x\n", eir); - - do - { - /* errata #4, PKTIF does not reliable */ - pk_counter = spi_read(EPKTCNT); - if (pk_counter) - { - /* a frame has been received */ - eth_device_ready((struct eth_device*)&(enc28j60_dev->parent)); - - // switch to bank 0 - enc28j60_set_bank(EIE); - // disable rx interrutps - spi_write_op(ENC28J60_BIT_FIELD_CLR, EIE, EIE_PKTIE); - } - - /* clear PKTIF */ - if (eir & EIR_PKTIF) - { - enc28j60_set_bank(EIR); - spi_write_op(ENC28J60_BIT_FIELD_CLR, EIR, EIR_PKTIF); - - rx_activiated = RT_TRUE; - } - - /* clear DMAIF */ - if (eir & EIR_DMAIF) - { - enc28j60_set_bank(EIR); - spi_write_op(ENC28J60_BIT_FIELD_CLR, EIR, EIR_DMAIF); - } - - /* LINK changed handler */ - if ( eir & EIR_LINKIF) - { - enc28j60_check_link_status(); - - /* read PHIR to clear the flag */ - enc28j60_phy_read(PHIR); - - enc28j60_set_bank(EIR); - spi_write_op(ENC28J60_BIT_FIELD_CLR, EIR, EIR_LINKIF); - } - - if (eir & EIR_TXIF) - { - /* A frame has been transmitted. */ - enc28j60_set_bank(EIR); - spi_write_op(ENC28J60_BIT_FIELD_CLR, EIR, EIR_TXIF); - } - - /* TX Error handler */ - if ((eir & EIR_TXERIF) != 0) - { - enc28j60_set_bank(ECON1); - spi_write_op(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRST); - spi_write_op(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRST); - enc28j60_set_bank(EIR); - spi_write_op(ENC28J60_BIT_FIELD_CLR, EIR, EIR_TXERIF); - } - - eir = spi_read(EIR); - // rt_kprintf("inner eir: 0x%08x\n", eir); - } while ((rx_activiated != RT_TRUE && eir != 0)); -} - -/* RT-Thread Device Interface */ - -/* initialize the interface */ -rt_err_t enc28j60_init(rt_device_t dev) -{ - CSPASSIVE; - - // perform system reset - spi_write_op(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET); - delay_ms(50); - NextPacketPtr = RXSTART_INIT; - - // Rx start - spi_write(ERXSTL, RXSTART_INIT&0xFF); - spi_write(ERXSTH, RXSTART_INIT>>8); - // set receive pointer address - spi_write(ERXRDPTL, RXSTOP_INIT&0xFF); - spi_write(ERXRDPTH, RXSTOP_INIT>>8); - // RX end - spi_write(ERXNDL, RXSTOP_INIT&0xFF); - spi_write(ERXNDH, RXSTOP_INIT>>8); - - // TX start - spi_write(ETXSTL, TXSTART_INIT&0xFF); - spi_write(ETXSTH, TXSTART_INIT>>8); - // set transmission pointer address - spi_write(EWRPTL, TXSTART_INIT&0xFF); - spi_write(EWRPTH, TXSTART_INIT>>8); - // TX end - spi_write(ETXNDL, TXSTOP_INIT&0xFF); - spi_write(ETXNDH, TXSTOP_INIT>>8); - - // do bank 1 stuff, packet filter: - // For broadcast packets we allow only ARP packtets - // All other packets should be unicast only for our mac (MAADR) - // - // The pattern to match on is therefore - // Type ETH.DST - // ARP BROADCAST - // 06 08 -- ff ff ff ff ff ff -> ip checksum for theses bytes=f7f9 - // in binary these poitions are:11 0000 0011 1111 - // This is hex 303F->EPMM0=0x3f,EPMM1=0x30 - spi_write(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_BCEN); - - // do bank 2 stuff - // enable MAC receive - spi_write(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS); - // enable automatic padding to 60bytes and CRC operations - // spi_write_op(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN); - spi_write_op(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX); - // bring MAC out of reset - - // set inter-frame gap (back-to-back) - // spi_write(MABBIPG, 0x12); - spi_write(MABBIPG, 0x15); - - spi_write(MACON4, MACON4_DEFER); - spi_write(MACLCON2, 63); - - // set inter-frame gap (non-back-to-back) - spi_write(MAIPGL, 0x12); - spi_write(MAIPGH, 0x0C); - - // Set the maximum packet size which the controller will accept - // Do not send packets longer than MAX_FRAMELEN: - spi_write(MAMXFLL, MAX_FRAMELEN&0xFF); - spi_write(MAMXFLH, MAX_FRAMELEN>>8); - - // do bank 3 stuff - // write MAC address - // NOTE: MAC address in ENC28J60 is byte-backward - spi_write(MAADR0, enc28j60_dev->dev_addr[5]); - spi_write(MAADR1, enc28j60_dev->dev_addr[4]); - spi_write(MAADR2, enc28j60_dev->dev_addr[3]); - spi_write(MAADR3, enc28j60_dev->dev_addr[2]); - spi_write(MAADR4, enc28j60_dev->dev_addr[1]); - spi_write(MAADR5, enc28j60_dev->dev_addr[0]); - - /* output off */ - spi_write(ECOCON, 0x00); - - // enc28j60_phy_write(PHCON1, 0x00); - enc28j60_phy_write(PHCON1, PHCON1_PDPXMD); // full duplex - // no loopback of transmitted frames - enc28j60_phy_write(PHCON2, PHCON2_HDLDIS); - - enc28j60_set_bank(ECON2); - spi_write_op(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_AUTOINC); - - // switch to bank 0 - enc28j60_set_bank(ECON1); - // enable interrutps - spi_write_op(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE|EIE_PKTIE|EIR_TXIF); - // enable packet reception - spi_write_op(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN); - - /* clock out */ - // enc28j60_clkout(2); - - enc28j60_phy_write(PHLCON, 0xD76); //0x476 - delay_ms(20); - - return RT_EOK; -} - -/* control the interface */ -rt_err_t enc28j60_control(rt_device_t dev, rt_uint8_t cmd, void *args) -{ - switch(cmd) - { - case NIOCTL_GADDR: - /* get mac address */ - if(args) rt_memcpy(args, enc28j60_dev_entry.dev_addr, 6); - else return -RT_ERROR; - break; - - default : - break; - } - - return RT_EOK; -} - -/* Open the ethernet interface */ -rt_err_t enc28j60_open(rt_device_t dev, rt_uint16_t oflag) -{ - return RT_EOK; -} - -/* Close the interface */ -rt_err_t enc28j60_close(rt_device_t dev) -{ - return RT_EOK; -} - -/* Read */ -rt_size_t enc28j60_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) -{ - rt_set_errno(-RT_ENOSYS); - return 0; -} - -/* Write */ -rt_size_t enc28j60_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) -{ - rt_set_errno(-RT_ENOSYS); - return 0; -} - -/* ethernet device interface */ -/* - * Transmit packet. - */ -rt_err_t enc28j60_tx( rt_device_t dev, struct pbuf* p) -{ - struct pbuf* q; - rt_uint32_t len; - rt_uint8_t* ptr; - rt_uint32_t level; - - //rt_kprintf("tx pbuf: 0x%08x, total len %d\n", p, p->tot_len); - - /* lock enc28j60 */ - rt_sem_take(&lock_sem, RT_WAITING_FOREVER); - /* disable enc28j60 interrupt */ - level = enc28j60_interrupt_disable(); - - // Set the write pointer to start of transmit buffer area - spi_write(EWRPTL, TXSTART_INIT&0xFF); - spi_write(EWRPTH, TXSTART_INIT>>8); - // Set the TXND pointer to correspond to the packet size given - spi_write(ETXNDL, (TXSTART_INIT+ p->tot_len + 1)&0xFF); - spi_write(ETXNDH, (TXSTART_INIT+ p->tot_len + 1)>>8); - - // write per-packet control byte (0x00 means use macon3 settings) - spi_write_op(ENC28J60_WRITE_BUF_MEM, 0, 0x00); - - for (q = p; q != NULL; q = q->next) - { - CSACTIVE; - - SPI_I2S_SendData(SPI1, ENC28J60_WRITE_BUF_MEM); - while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); - - len = q->len; - ptr = q->payload; - while(len) - { - SPI_I2S_SendData(SPI1,*ptr) ; - while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET);; - ptr++; - - len--; - } - - CSPASSIVE; - } - - // send the contents of the transmit buffer onto the network - spi_write_op(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRTS); - // Reset the transmit logic problem. See Rev. B4 Silicon Errata point 12. - if( (spi_read(EIR) & EIR_TXERIF) ) - { - spi_write_op(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRTS); - } - - /* enable enc28j60 interrupt */ - enc28j60_interrupt_enable(level); - rt_sem_release(&lock_sem); - - return RT_EOK; -} - -struct pbuf *enc28j60_rx(rt_device_t dev) -{ - struct pbuf* p; - rt_uint32_t len; - rt_uint16_t rxstat; - rt_uint32_t pk_counter; - rt_uint32_t level; - - p = RT_NULL; - - /* lock enc28j60 */ - rt_sem_take(&lock_sem, RT_WAITING_FOREVER); - /* disable enc28j60 interrupt */ - level = enc28j60_interrupt_disable(); - - pk_counter = spi_read(EPKTCNT); - if (pk_counter) - { - // Set the read pointer to the start of the received packet - spi_write(ERDPTL, (NextPacketPtr)); - spi_write(ERDPTH, (NextPacketPtr)>>8); - - // read the next packet pointer - NextPacketPtr = spi_read_op(ENC28J60_READ_BUF_MEM, 0); - NextPacketPtr |= spi_read_op(ENC28J60_READ_BUF_MEM, 0)<<8; - - // read the packet length (see datasheet page 43) - len = spi_read_op(ENC28J60_READ_BUF_MEM, 0); //0x54 - len |= spi_read_op(ENC28J60_READ_BUF_MEM, 0) <<8; //5554 - - len-=4; //remove the CRC count - - // read the receive status (see datasheet page 43) - rxstat = spi_read_op(ENC28J60_READ_BUF_MEM, 0); - rxstat |= ((rt_uint16_t)spi_read_op(ENC28J60_READ_BUF_MEM, 0))<<8; - - // check CRC and symbol errors (see datasheet page 44, table 7-3): - // The ERXFCON.CRCEN is set by default. Normally we should not - // need to check this. - if ((rxstat & 0x80)==0) - { - // invalid - len=0; - } - else - { - /* allocation pbuf */ - p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM); - if (p != RT_NULL) - { - rt_uint8_t* data; - struct pbuf* q; - - for (q = p; q != RT_NULL; q= q->next) - { - data = q->payload; - len = q->len; - - CSACTIVE; - - SPI_I2S_SendData(SPI1,ENC28J60_READ_BUF_MEM); - while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); - - SPI_I2S_ReceiveData(SPI1); - - while(len) - { - len--; - SPI_I2S_SendData(SPI1,0x00) ; - while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); - - *data= SPI_I2S_ReceiveData(SPI1); - data++; - } - - CSPASSIVE; - } - } - } - - // Move the RX read pointer to the start of the next received packet - // This frees the memory we just read out - spi_write(ERXRDPTL, (NextPacketPtr)); - spi_write(ERXRDPTH, (NextPacketPtr)>>8); - - // decrement the packet counter indicate we are done with this packet - spi_write_op(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PKTDEC); - } - else - { - // switch to bank 0 - enc28j60_set_bank(ECON1); - // enable packet reception - spi_write_op(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN); - - level |= EIE_PKTIE; - } - - /* enable enc28j60 interrupt */ - enc28j60_interrupt_enable(level); - rt_sem_release(&lock_sem); - - return p; -} - -static void RCC_Configuration(void) -{ - //RCC_PCLK2Config ( uint32_t RCC_HCLK ) - /* enable SPI1 clock */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); - - /* enable gpiob port clock */ - //RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE); - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC , ENABLE); -} - -static void NVIC_Configuration(void) -{ - NVIC_InitTypeDef NVIC_InitStructure; - - /* Enable the EXTI0 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = EXTI2_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -} - -static void GPIO_Configuration() -{ - GPIO_InitTypeDef GPIO_InitStructure; - EXTI_InitTypeDef EXTI_InitStructure; - - /* configure PB0 as external interrupt */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD; - GPIO_Init(GPIOC, &GPIO_InitStructure); - - /* Configure SPI1 pins: SCK, MISO and MOSI ----------------------------*/ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOA, &GPIO_InitStructure); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_Init(GPIOC, &GPIO_InitStructure); - - /* Connect ENC28J60 EXTI Line to GPIOB Pin 0 */ - GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource2); - - /* Configure ENC28J60 EXTI Line to generate an interrupt on falling edge */ - EXTI_InitStructure.EXTI_Line = EXTI_Line2; - EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; - EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; - EXTI_InitStructure.EXTI_LineCmd = ENABLE; - EXTI_Init(&EXTI_InitStructure); - - /* Clear the Key Button EXTI line pending bit */ - EXTI_ClearITPendingBit(EXTI_Line2); -} - -static void SetupSPI (void) -{ - SPI_InitTypeDef SPI_InitStructure; - SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; - SPI_InitStructure.SPI_Mode = SPI_Mode_Master; - SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; - SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; - SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; - SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; - SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;//SPI_BaudRatePrescaler_4; - SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; - SPI_InitStructure.SPI_CRCPolynomial = 7; - SPI_Init(SPI1, &SPI_InitStructure); - SPI_Cmd(SPI1, ENABLE); -} - -void rt_hw_enc28j60_init() -{ - /* configuration PB5 as INT */ - RCC_Configuration(); - NVIC_Configuration(); - GPIO_Configuration(); - SetupSPI(); - - /* init rt-thread device interface */ - enc28j60_dev_entry.parent.parent.init = enc28j60_init; - enc28j60_dev_entry.parent.parent.open = enc28j60_open; - enc28j60_dev_entry.parent.parent.close = enc28j60_close; - enc28j60_dev_entry.parent.parent.read = enc28j60_read; - enc28j60_dev_entry.parent.parent.write = enc28j60_write; - enc28j60_dev_entry.parent.parent.control = enc28j60_control; - enc28j60_dev_entry.parent.eth_rx = enc28j60_rx; - enc28j60_dev_entry.parent.eth_tx = enc28j60_tx; - - /* Update MAC address */ - /* OUI 00-04-A3 Microchip Technology, Inc. */ - enc28j60_dev_entry.dev_addr[0] = 0x00; - enc28j60_dev_entry.dev_addr[1] = 0x04; - enc28j60_dev_entry.dev_addr[2] = 0xA3; - /* generate MAC addr (only for test) */ - enc28j60_dev_entry.dev_addr[3] = 0x11; - enc28j60_dev_entry.dev_addr[4] = 0x22; - enc28j60_dev_entry.dev_addr[5] = 0x33; - - rt_sem_init(&lock_sem, "lock", 1, RT_IPC_FLAG_FIFO); - - eth_device_init(&(enc28j60_dev->parent), "e0"); -} - -#ifdef RT_USING_FINSH -#include -void show_reg(void) -{ - // -} -FINSH_FUNCTION_EXPORT(show_reg,show en28j60 regs) -#endif diff --git a/bsp/stm32f10x/enc28j60.h b/bsp/stm32f10x/enc28j60.h deleted file mode 100644 index 9624b74dea..0000000000 --- a/bsp/stm32f10x/enc28j60.h +++ /dev/null @@ -1,315 +0,0 @@ -/* - * File : enc28j60.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-01-05 Bernard the first version - */ - -#ifndef __ENC28J60_H__ -#define __ENC28J60_H__ - -#include - -// ENC28J60 Control Registers -// Control register definitions are a combination of address, -// bank number, and Ethernet/MAC/PHY indicator bits. -// - Register address (bits 0-4) -// - Bank number (bits 5-6) -// - MAC/PHY indicator (bit 7) -#define ADDR_MASK 0x1F -#define BANK_MASK 0x60 -#define SPRD_MASK 0x80 -// All-bank registers -#define EIE 0x1B -#define EIR 0x1C -#define ESTAT 0x1D -#define ECON2 0x1E -#define ECON1 0x1F -// Bank 0 registers -#define ERDPTL (0x00|0x00) -#define ERDPTH (0x01|0x00) -#define EWRPTL (0x02|0x00) -#define EWRPTH (0x03|0x00) -#define ETXSTL (0x04|0x00) -#define ETXSTH (0x05|0x00) -#define ETXNDL (0x06|0x00) -#define ETXNDH (0x07|0x00) -#define ERXSTL (0x08|0x00) -#define ERXSTH (0x09|0x00) -#define ERXNDL (0x0A|0x00) -#define ERXNDH (0x0B|0x00) -#define ERXRDPTL (0x0C|0x00) -#define ERXRDPTH (0x0D|0x00) -#define ERXWRPTL (0x0E|0x00) -#define ERXWRPTH (0x0F|0x00) -#define EDMASTL (0x10|0x00) -#define EDMASTH (0x11|0x00) -#define EDMANDL (0x12|0x00) -#define EDMANDH (0x13|0x00) -#define EDMADSTL (0x14|0x00) -#define EDMADSTH (0x15|0x00) -#define EDMACSL (0x16|0x00) -#define EDMACSH (0x17|0x00) -// Bank 1 registers -#define EHT0 (0x00|0x20) -#define EHT1 (0x01|0x20) -#define EHT2 (0x02|0x20) -#define EHT3 (0x03|0x20) -#define EHT4 (0x04|0x20) -#define EHT5 (0x05|0x20) -#define EHT6 (0x06|0x20) -#define EHT7 (0x07|0x20) -#define EPMM0 (0x08|0x20) -#define EPMM1 (0x09|0x20) -#define EPMM2 (0x0A|0x20) -#define EPMM3 (0x0B|0x20) -#define EPMM4 (0x0C|0x20) -#define EPMM5 (0x0D|0x20) -#define EPMM6 (0x0E|0x20) -#define EPMM7 (0x0F|0x20) -#define EPMCSL (0x10|0x20) -#define EPMCSH (0x11|0x20) -#define EPMOL (0x14|0x20) -#define EPMOH (0x15|0x20) -#define EWOLIE (0x16|0x20) -#define EWOLIR (0x17|0x20) -#define ERXFCON (0x18|0x20) -#define EPKTCNT (0x19|0x20) -// Bank 2 registers -#define MACON1 (0x00|0x40|0x80) -#define MACON2 (0x01|0x40|0x80) -#define MACON3 (0x02|0x40|0x80) -#define MACON4 (0x03|0x40|0x80) -#define MABBIPG (0x04|0x40|0x80) -#define MAIPGL (0x06|0x40|0x80) -#define MAIPGH (0x07|0x40|0x80) -#define MACLCON1 (0x08|0x40|0x80) -#define MACLCON2 (0x09|0x40|0x80) -#define MAMXFLL (0x0A|0x40|0x80) -#define MAMXFLH (0x0B|0x40|0x80) -#define MAPHSUP (0x0D|0x40|0x80) -#define MICON (0x11|0x40|0x80) -#define MICMD (0x12|0x40|0x80) -#define MIREGADR (0x14|0x40|0x80) -#define MIWRL (0x16|0x40|0x80) -#define MIWRH (0x17|0x40|0x80) -#define MIRDL (0x18|0x40|0x80) -#define MIRDH (0x19|0x40|0x80) -// Bank 3 registers -#define MAADR1 (0x00|0x60|0x80) -#define MAADR0 (0x01|0x60|0x80) -#define MAADR3 (0x02|0x60|0x80) -#define MAADR2 (0x03|0x60|0x80) -#define MAADR5 (0x04|0x60|0x80) -#define MAADR4 (0x05|0x60|0x80) -#define EBSTSD (0x06|0x60) -#define EBSTCON (0x07|0x60) -#define EBSTCSL (0x08|0x60) -#define EBSTCSH (0x09|0x60) -#define MISTAT (0x0A|0x60|0x80) -#define EREVID (0x12|0x60) -#define ECOCON (0x15|0x60) -#define EFLOCON (0x17|0x60) -#define EPAUSL (0x18|0x60) -#define EPAUSH (0x19|0x60) -// PHY registers -#define PHCON1 0x00 -#define PHSTAT1 0x01 -#define PHHID1 0x02 -#define PHHID2 0x03 -#define PHCON2 0x10 -#define PHSTAT2 0x11 -#define PHIE 0x12 -#define PHIR 0x13 -#define PHLCON 0x14 - -// ENC28J60 ERXFCON Register Bit Definitions -#define ERXFCON_UCEN 0x80 -#define ERXFCON_ANDOR 0x40 -#define ERXFCON_CRCEN 0x20 -#define ERXFCON_PMEN 0x10 -#define ERXFCON_MPEN 0x08 -#define ERXFCON_HTEN 0x04 -#define ERXFCON_MCEN 0x02 -#define ERXFCON_BCEN 0x01 -// ENC28J60 EIE Register Bit Definitions -#define EIE_INTIE 0x80 -#define EIE_PKTIE 0x40 -#define EIE_DMAIE 0x20 -#define EIE_LINKIE 0x10 -#define EIE_TXIE 0x08 -#define EIE_WOLIE 0x04 -#define EIE_TXERIE 0x02 -#define EIE_RXERIE 0x01 -// ENC28J60 EIR Register Bit Definitions -#define EIR_PKTIF 0x40 -#define EIR_DMAIF 0x20 -#define EIR_LINKIF 0x10 -#define EIR_TXIF 0x08 -#define EIR_WOLIF 0x04 -#define EIR_TXERIF 0x02 -#define EIR_RXERIF 0x01 -// ENC28J60 ESTAT Register Bit Definitions -#define ESTAT_INT 0x80 -#define ESTAT_LATECOL 0x10 -#define ESTAT_RXBUSY 0x04 -#define ESTAT_TXABRT 0x02 -#define ESTAT_CLKRDY 0x01 -// ENC28J60 ECON2 Register Bit Definitions -#define ECON2_AUTOINC 0x80 -#define ECON2_PKTDEC 0x40 -#define ECON2_PWRSV 0x20 -#define ECON2_VRPS 0x08 -// ENC28J60 ECON1 Register Bit Definitions -#define ECON1_TXRST 0x80 -#define ECON1_RXRST 0x40 -#define ECON1_DMAST 0x20 -#define ECON1_CSUMEN 0x10 -#define ECON1_TXRTS 0x08 -#define ECON1_RXEN 0x04 -#define ECON1_BSEL1 0x02 -#define ECON1_BSEL0 0x01 -// ENC28J60 MACON1 Register Bit Definitions -#define MACON1_LOOPBK 0x10 -#define MACON1_TXPAUS 0x08 -#define MACON1_RXPAUS 0x04 -#define MACON1_PASSALL 0x02 -#define MACON1_MARXEN 0x01 -// ENC28J60 MACON2 Register Bit Definitions -#define MACON2_MARST 0x80 -#define MACON2_RNDRST 0x40 -#define MACON2_MARXRST 0x08 -#define MACON2_RFUNRST 0x04 -#define MACON2_MATXRST 0x02 -#define MACON2_TFUNRST 0x01 -// ENC28J60 MACON3 Register Bit Definitions -#define MACON3_PADCFG2 0x80 -#define MACON3_PADCFG1 0x40 -#define MACON3_PADCFG0 0x20 -#define MACON3_TXCRCEN 0x10 -#define MACON3_PHDRLEN 0x08 -#define MACON3_HFRMLEN 0x04 -#define MACON3_FRMLNEN 0x02 -#define MACON3_FULDPX 0x01 -// ENC28J60 MACON4 Register Bit Definitions -#define MACON4_DEFER (1<<6) -#define MACON4_BPEN (1<<5) -#define MACON4_NOBKOFF (1<<4) -// ENC28J60 MICMD Register Bit Definitions -#define MICMD_MIISCAN 0x02 -#define MICMD_MIIRD 0x01 -// ENC28J60 MISTAT Register Bit Definitions -#define MISTAT_NVALID 0x04 -#define MISTAT_SCAN 0x02 -#define MISTAT_BUSY 0x01 -// ENC28J60 PHY PHCON1 Register Bit Definitions -#define PHCON1_PRST 0x8000 -#define PHCON1_PLOOPBK 0x4000 -#define PHCON1_PPWRSV 0x0800 -#define PHCON1_PDPXMD 0x0100 -// ENC28J60 PHY PHSTAT1 Register Bit Definitions -#define PHSTAT1_PFDPX 0x1000 -#define PHSTAT1_PHDPX 0x0800 -#define PHSTAT1_LLSTAT 0x0004 -#define PHSTAT1_JBSTAT 0x0002 -/* ENC28J60 PHY PHSTAT2 Register Bit Definitions */ -#define PHSTAT2_TXSTAT (1 << 13) -#define PHSTAT2_RXSTAT (1 << 12) -#define PHSTAT2_COLSTAT (1 << 11) -#define PHSTAT2_LSTAT (1 << 10) -#define PHSTAT2_DPXSTAT (1 << 9) -#define PHSTAT2_PLRITY (1 << 5) -// ENC28J60 PHY PHCON2 Register Bit Definitions -#define PHCON2_FRCLINK 0x4000 -#define PHCON2_TXDIS 0x2000 -#define PHCON2_JABBER 0x0400 -#define PHCON2_HDLDIS 0x0100 - -// ENC28J60 Packet Control Byte Bit Definitions -#define PKTCTRL_PHUGEEN 0x08 -#define PKTCTRL_PPADEN 0x04 -#define PKTCTRL_PCRCEN 0x02 -#define PKTCTRL_POVERRIDE 0x01 - -/* ENC28J60 Transmit Status Vector */ -#define TSV_TXBYTECNT 0 -#define TSV_TXCOLLISIONCNT 16 -#define TSV_TXCRCERROR 20 -#define TSV_TXLENCHKERROR 21 -#define TSV_TXLENOUTOFRANGE 22 -#define TSV_TXDONE 23 -#define TSV_TXMULTICAST 24 -#define TSV_TXBROADCAST 25 -#define TSV_TXPACKETDEFER 26 -#define TSV_TXEXDEFER 27 -#define TSV_TXEXCOLLISION 28 -#define TSV_TXLATECOLLISION 29 -#define TSV_TXGIANT 30 -#define TSV_TXUNDERRUN 31 -#define TSV_TOTBYTETXONWIRE 32 -#define TSV_TXCONTROLFRAME 48 -#define TSV_TXPAUSEFRAME 49 -#define TSV_BACKPRESSUREAPP 50 -#define TSV_TXVLANTAGFRAME 51 - -#define TSV_SIZE 7 -#define TSV_BYTEOF(x) ((x) / 8) -#define TSV_BITMASK(x) (1 << ((x) % 8)) -#define TSV_GETBIT(x, y) (((x)[TSV_BYTEOF(y)] & TSV_BITMASK(y)) ? 1 : 0) - -/* ENC28J60 Receive Status Vector */ -#define RSV_RXLONGEVDROPEV 16 -#define RSV_CARRIEREV 18 -#define RSV_CRCERROR 20 -#define RSV_LENCHECKERR 21 -#define RSV_LENOUTOFRANGE 22 -#define RSV_RXOK 23 -#define RSV_RXMULTICAST 24 -#define RSV_RXBROADCAST 25 -#define RSV_DRIBBLENIBBLE 26 -#define RSV_RXCONTROLFRAME 27 -#define RSV_RXPAUSEFRAME 28 -#define RSV_RXUNKNOWNOPCODE 29 -#define RSV_RXTYPEVLAN 30 - -#define RSV_SIZE 6 -#define RSV_BITMASK(x) (1 << ((x) - 16)) -#define RSV_GETBIT(x, y) (((x) & RSV_BITMASK(y)) ? 1 : 0) - -// SPI operation codes -#define ENC28J60_READ_CTRL_REG 0x00 -#define ENC28J60_READ_BUF_MEM 0x3A -#define ENC28J60_WRITE_CTRL_REG 0x40 -#define ENC28J60_WRITE_BUF_MEM 0x7A -#define ENC28J60_BIT_FIELD_SET 0x80 -#define ENC28J60_BIT_FIELD_CLR 0xA0 -#define ENC28J60_SOFT_RESET 0xFF - -// The RXSTART_INIT should be zero. See Rev. B4 Silicon Errata -// buffer boundaries applied to internal 8K ram -// the entire available packet buffer space is allocated -// - -// start with recbuf at 0/ -#define RXSTART_INIT 0x0 -// receive buffer end -#define RXSTOP_INIT (0x1FFF-0x0600) - 1 -// start TX buffer at 0x1FFF-0x0600, pace for one full ethernet frame (~1500 bytes) - -#define TXSTART_INIT (0x1FFF-0x0600) -// stp TX buffer at end of mem -#define TXSTOP_INIT 0x1FFF - -// max frame length which the conroller will accept: -#define MAX_FRAMELEN 1518 - -void rt_hw_enc28j60_init(void); - -#endif diff --git a/bsp/stm32f10x/msd.c b/bsp/stm32f10x/msd.c deleted file mode 100644 index 2d08078ccc..0000000000 --- a/bsp/stm32f10x/msd.c +++ /dev/null @@ -1,942 +0,0 @@ -/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** -* File Name : msd.c -* Author : MCD Application Team -* Version : V2.1 -* Date : 05/30/2008 -* Description : MSD card driver source file. -* Pin assignment: -* ---------------------------------------------- -* | STM32F10x | MSD Pin | -* ---------------------------------------------- -* | P0.4 | ChipSelect 1 | -* | P0.1 / MOSI | DataIn 2 | -* | | GND 3 (0 V) | -* | | VDD 4 (3.3 V) | -* | P0.2 / SCLK | Clock 5 | -* | | GND 6 (0 V) | -* | P0.0 / MISO | DataOut 7 | -* ----------------------------------------------- -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -* FOR MORE INFORMATION PLEASE CAREFULLY READ THE LICENSE AGREEMENT FILE LOCATED -* IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "msd.h" -#include - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Select MSD Card: ChipSelect pin low */ -#define MSD_CS_LOW() GPIO_ResetBits(GPIOD, GPIO_Pin_9) -/* Deselect MSD Card: ChipSelect pin high */ -#define MSD_CS_HIGH() GPIO_SetBits(GPIOD, GPIO_Pin_9) -#define MSD_SPI SPI1 -#define MSD_RCC_SPI RCC_APB2Periph_SPI1 - -/* Private function prototypes -----------------------------------------------*/ -static void SPI_Config(void); -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : MSD_Init -* Description : Initializes the MSD/SD communication. -* Input : None -* Output : None -* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed -* - MSD_RESPONSE_NO_ERROR: Sequence succeed -*******************************************************************************/ -u8 MSD_Init(void) -{ - u32 i = 0; - - /* Initialize SPI */ - SPI_Config(); - /* MSD chip select high */ - MSD_CS_HIGH(); - /* Send dummy byte 0xFF, 10 times with CS high*/ - /* rise CS and MOSI for 80 clocks cycles */ - for (i = 0; i <= 9; i++) - { - /* Send dummy byte 0xFF */ - MSD_WriteByte(DUMMY); - } - /*------------Put MSD in SPI mode--------------*/ - /* MSD initialized and set to SPI mode properly */ - return (MSD_GoIdleState()); -} - -/******************************************************************************* -* Function Name : MSD_WriteBlock -* Description : Writes a block on the MSD -* Input : - pBuffer : pointer to the buffer containing the data to be -* written on the MSD. -* - WriteAddr : address to write on. -* - NumByteToWrite: number of data to write -* Output : None -* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed -* - MSD_RESPONSE_NO_ERROR: Sequence succeed -*******************************************************************************/ -u8 MSD_WriteBlock(u8* pBuffer, u32 WriteAddr, u16 NumByteToWrite) -{ - u32 i = 0; - u8 rvalue = MSD_RESPONSE_FAILURE; - - /* MSD chip select low */ - MSD_CS_LOW(); - /* Send CMD24 (MSD_WRITE_BLOCK) to write multiple block */ - MSD_SendCmd(MSD_WRITE_BLOCK, WriteAddr, 0xFF); - - /* Check if the MSD acknowledged the write block command: R1 response (0x00: no errors) */ - if (!MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) - { - /* Send a dummy byte */ - MSD_WriteByte(DUMMY); - /* Send the data token to signify the start of the data */ - MSD_WriteByte(0xFE); - /* Write the block data to MSD : write count data by block */ - for (i = 0; i < NumByteToWrite; i++) - { - /* Send the pointed byte */ - MSD_WriteByte(*pBuffer); - /* Point to the next location where the byte read will be saved */ - pBuffer++; - } - /* Put CRC bytes (not really needed by us, but required by MSD) */ - MSD_ReadByte(); - MSD_ReadByte(); - /* Read data response */ - if (MSD_GetDataResponse() == MSD_DATA_OK) - { - rvalue = MSD_RESPONSE_NO_ERROR; - } - } - - /* MSD chip select high */ - MSD_CS_HIGH(); - /* Send dummy byte: 8 Clock pulses of delay */ - MSD_WriteByte(DUMMY); - /* Returns the reponse */ - return rvalue; -} - -/******************************************************************************* -* Function Name : MSD_ReadBlock -* Description : Reads a block of data from the MSD. -* Input : - pBuffer : pointer to the buffer that receives the data read -* from the MSD. -* - ReadAddr : MSD's internal address to read from. -* - NumByteToRead : number of bytes to read from the MSD. -* Output : None -* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed -* - MSD_RESPONSE_NO_ERROR: Sequence succeed -*******************************************************************************/ -u8 MSD_ReadBlock(u8* pBuffer, u32 ReadAddr, u16 NumByteToRead) -{ - u32 i = 0; - u8 rvalue = MSD_RESPONSE_FAILURE; - - /* MSD chip select low */ - MSD_CS_LOW(); - /* Send CMD17 (MSD_READ_SINGLE_BLOCK) to read one block */ - MSD_SendCmd(MSD_READ_SINGLE_BLOCK, ReadAddr, 0xFF); - - /* Check if the MSD acknowledged the read block command: R1 response (0x00: no errors) */ - if (!MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) - { - /* Now look for the data token to signify the start of the data */ - if (!MSD_GetResponse(MSD_START_DATA_SINGLE_BLOCK_READ)) - { - /* Read the MSD block data : read NumByteToRead data */ - for (i = 0; i < NumByteToRead; i++) - { - /* Save the received data */ - *pBuffer = MSD_ReadByte(); - /* Point to the next location where the byte read will be saved */ - pBuffer++; - } - /* Get CRC bytes (not really needed by us, but required by MSD) */ - MSD_ReadByte(); - MSD_ReadByte(); - /* Set response value to success */ - rvalue = MSD_RESPONSE_NO_ERROR; - } - } - - /* MSD chip select high */ - MSD_CS_HIGH(); - /* Send dummy byte: 8 Clock pulses of delay */ - MSD_WriteByte(DUMMY); - /* Returns the reponse */ - return rvalue; -} - -/******************************************************************************* -* Function Name : MSD_WriteBuffer -* Description : Writes many blocks on the MSD -* Input : - pBuffer : pointer to the buffer containing the data to be -* written on the MSD. -* - WriteAddr : address to write on. -* - NumByteToWrite: number of data to write -* Output : None -* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed -* - MSD_RESPONSE_NO_ERROR: Sequence succeed -*******************************************************************************/ -u8 MSD_WriteBuffer(u8* pBuffer, u32 WriteAddr, u32 NumByteToWrite) -{ - u32 i = 0, NbrOfBlock = 0, Offset = 0; - u8 rvalue = MSD_RESPONSE_FAILURE; - - /* Calculate number of blocks to write */ - NbrOfBlock = NumByteToWrite / BLOCK_SIZE; - /* MSD chip select low */ - MSD_CS_LOW(); - - /* Data transfer */ - while (NbrOfBlock --) - { - /* Send CMD24 (MSD_WRITE_BLOCK) to write blocks */ - MSD_SendCmd(MSD_WRITE_BLOCK, WriteAddr + Offset, 0xFF); - - /* Check if the MSD acknowledged the write block command: R1 response (0x00: no errors) */ - if (MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) - { - return MSD_RESPONSE_FAILURE; - } - /* Send dummy byte */ - MSD_WriteByte(DUMMY); - /* Send the data token to signify the start of the data */ - MSD_WriteByte(MSD_START_DATA_SINGLE_BLOCK_WRITE); - /* Write the block data to MSD : write count data by block */ - for (i = 0; i < BLOCK_SIZE; i++) - { - /* Send the pointed byte */ - MSD_WriteByte(*pBuffer); - /* Point to the next location where the byte read will be saved */ - pBuffer++; - } - /* Set next write address */ - Offset += 512; - /* Put CRC bytes (not really needed by us, but required by MSD) */ - MSD_ReadByte(); - MSD_ReadByte(); - /* Read data response */ - if (MSD_GetDataResponse() == MSD_DATA_OK) - { - /* Set response value to success */ - rvalue = MSD_RESPONSE_NO_ERROR; - } - else - { - /* Set response value to failure */ - rvalue = MSD_RESPONSE_FAILURE; - } - } - - /* MSD chip select high */ - MSD_CS_HIGH(); - /* Send dummy byte: 8 Clock pulses of delay */ - MSD_WriteByte(DUMMY); - /* Returns the reponse */ - return rvalue; -} - -/******************************************************************************* -* Function Name : MSD_ReadBuffer -* Description : Reads multiple block of data from the MSD. -* Input : - pBuffer : pointer to the buffer that receives the data read -* from the MSD. -* - ReadAddr : MSD's internal address to read from. -* - NumByteToRead : number of bytes to read from the MSD. -* Output : None -* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed -* - MSD_RESPONSE_NO_ERROR: Sequence succeed -*******************************************************************************/ -u8 MSD_ReadBuffer(u8* pBuffer, u32 ReadAddr, u32 NumByteToRead) -{ - u32 i = 0, NbrOfBlock = 0, Offset = 0; - u8 rvalue = MSD_RESPONSE_FAILURE; - - /* Calculate number of blocks to read */ - NbrOfBlock = NumByteToRead / BLOCK_SIZE; - /* MSD chip select low */ - MSD_CS_LOW(); - - /* Data transfer */ - while (NbrOfBlock --) - { - /* Send CMD17 (MSD_READ_SINGLE_BLOCK) to read one block */ - MSD_SendCmd (MSD_READ_SINGLE_BLOCK, ReadAddr + Offset, 0xFF); - /* Check if the MSD acknowledged the read block command: R1 response (0x00: no errors) */ - if (MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) - { - return MSD_RESPONSE_FAILURE; - } - /* Now look for the data token to signify the start of the data */ - if (!MSD_GetResponse(MSD_START_DATA_SINGLE_BLOCK_READ)) - { - /* Read the MSD block data : read NumByteToRead data */ - for (i = 0; i < BLOCK_SIZE; i++) - { - /* Read the pointed data */ - *pBuffer = MSD_ReadByte(); - /* Point to the next location where the byte read will be saved */ - pBuffer++; - } - /* Set next read address*/ - Offset += 512; - /* get CRC bytes (not really needed by us, but required by MSD) */ - MSD_ReadByte(); - MSD_ReadByte(); - /* Set response value to success */ - rvalue = MSD_RESPONSE_NO_ERROR; - } - else - { - /* Set response value to failure */ - rvalue = MSD_RESPONSE_FAILURE; - } - } - - /* MSD chip select high */ - MSD_CS_HIGH(); - /* Send dummy byte: 8 Clock pulses of delay */ - MSD_WriteByte(DUMMY); - /* Returns the reponse */ - return rvalue; -} - -/******************************************************************************* -* Function Name : MSD_GetCSDRegister -* Description : Read the CSD card register. -* Reading the contents of the CSD register in SPI mode -* is a simple read-block transaction. -* Input : - MSD_csd: pointer on an SCD register structure -* Output : None -* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed -* - MSD_RESPONSE_NO_ERROR: Sequence succeed -*******************************************************************************/ -u8 MSD_GetCSDRegister(sMSD_CSD* MSD_csd) -{ - u32 i = 0; - u8 rvalue = MSD_RESPONSE_FAILURE; - u8 CSD_Tab[16]; - - /* MSD chip select low */ - MSD_CS_LOW(); - /* Send CMD9 (CSD register) or CMD10(CSD register) */ - MSD_SendCmd(MSD_SEND_CSD, 0, 0xFF); - - /* Wait for response in the R1 format (0x00 is no errors) */ - if (!MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) - { - if (!MSD_GetResponse(MSD_START_DATA_SINGLE_BLOCK_READ)) - { - for (i = 0; i < 16; i++) - { - /* Store CSD register value on CSD_Tab */ - CSD_Tab[i] = MSD_ReadByte(); - } - } - /* Get CRC bytes (not really needed by us, but required by MSD) */ - MSD_WriteByte(DUMMY); - MSD_WriteByte(DUMMY); - /* Set response value to success */ - rvalue = MSD_RESPONSE_NO_ERROR; - } - - /* MSD chip select high */ - MSD_CS_HIGH(); - /* Send dummy byte: 8 Clock pulses of delay */ - MSD_WriteByte(DUMMY); - - /* Byte 0 */ - MSD_csd->CSDStruct = (CSD_Tab[0] & 0xC0) >> 6; - MSD_csd->SysSpecVersion = (CSD_Tab[0] & 0x3C) >> 2; - MSD_csd->Reserved1 = CSD_Tab[0] & 0x03; - /* Byte 1 */ - MSD_csd->TAAC = CSD_Tab[1] ; - /* Byte 2 */ - MSD_csd->NSAC = CSD_Tab[2]; - /* Byte 3 */ - MSD_csd->MaxBusClkFrec = CSD_Tab[3]; - /* Byte 4 */ - MSD_csd->CardComdClasses = CSD_Tab[4] << 4; - /* Byte 5 */ - MSD_csd->CardComdClasses |= (CSD_Tab[5] & 0xF0) >> 4; - MSD_csd->RdBlockLen = CSD_Tab[5] & 0x0F; - /* Byte 6 */ - MSD_csd->PartBlockRead = (CSD_Tab[6] & 0x80) >> 7; - MSD_csd->WrBlockMisalign = (CSD_Tab[6] & 0x40) >> 6; - MSD_csd->RdBlockMisalign = (CSD_Tab[6] & 0x20) >> 5; - MSD_csd->DSRImpl = (CSD_Tab[6] & 0x10) >> 4; - MSD_csd->Reserved2 = 0; /* Reserved */ - MSD_csd->DeviceSize = (CSD_Tab[6] & 0x03) << 10; - /* Byte 7 */ - MSD_csd->DeviceSize |= (CSD_Tab[7]) << 2; - /* Byte 8 */ - MSD_csd->DeviceSize |= (CSD_Tab[8] & 0xC0) >> 6; - MSD_csd->MaxRdCurrentVDDMin = (CSD_Tab[8] & 0x38) >> 3; - MSD_csd->MaxRdCurrentVDDMax = (CSD_Tab[8] & 0x07); - /* Byte 9 */ - MSD_csd->MaxWrCurrentVDDMin = (CSD_Tab[9] & 0xE0) >> 5; - MSD_csd->MaxWrCurrentVDDMax = (CSD_Tab[9] & 0x1C) >> 2; - MSD_csd->DeviceSizeMul = (CSD_Tab[9] & 0x03) << 1; - /* Byte 10 */ - MSD_csd->DeviceSizeMul |= (CSD_Tab[10] & 0x80) >> 7; - MSD_csd->EraseGrSize = (CSD_Tab[10] & 0x7C) >> 2; - MSD_csd->EraseGrMul = (CSD_Tab[10] & 0x03) << 3; - /* Byte 11 */ - MSD_csd->EraseGrMul |= (CSD_Tab[11] & 0xE0) >> 5; - MSD_csd->WrProtectGrSize = (CSD_Tab[11] & 0x1F); - /* Byte 12 */ - MSD_csd->WrProtectGrEnable = (CSD_Tab[12] & 0x80) >> 7; - MSD_csd->ManDeflECC = (CSD_Tab[12] & 0x60) >> 5; - MSD_csd->WrSpeedFact = (CSD_Tab[12] & 0x1C) >> 2; - MSD_csd->MaxWrBlockLen = (CSD_Tab[12] & 0x03) << 2; - /* Byte 13 */ - MSD_csd->MaxWrBlockLen |= (CSD_Tab[13] & 0xc0) >> 6; - MSD_csd->WriteBlockPaPartial = (CSD_Tab[13] & 0x20) >> 5; - MSD_csd->Reserved3 = 0; - MSD_csd->ContentProtectAppli = (CSD_Tab[13] & 0x01); - /* Byte 14 */ - MSD_csd->FileFormatGrouop = (CSD_Tab[14] & 0x80) >> 7; - MSD_csd->CopyFlag = (CSD_Tab[14] & 0x40) >> 6; - MSD_csd->PermWrProtect = (CSD_Tab[14] & 0x20) >> 5; - MSD_csd->TempWrProtect = (CSD_Tab[14] & 0x10) >> 4; - MSD_csd->FileFormat = (CSD_Tab[14] & 0x0C) >> 2; - MSD_csd->ECC = (CSD_Tab[14] & 0x03); - /* Byte 15 */ - MSD_csd->msd_CRC = (CSD_Tab[15] & 0xFE) >> 1; - MSD_csd->Reserved4 = 1; - - /* Return the reponse */ - return rvalue; -} - -/******************************************************************************* -* Function Name : MSD_GetCIDRegister -* Description : Read the CID card register. -* Reading the contents of the CID register in SPI mode -* is a simple read-block transaction. -* Input : - MSD_cid: pointer on an CID register structure -* Output : None -* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed -* - MSD_RESPONSE_NO_ERROR: Sequence succeed -*******************************************************************************/ -u8 MSD_GetCIDRegister(sMSD_CID* MSD_cid) -{ - u32 i = 0; - u8 rvalue = MSD_RESPONSE_FAILURE; - u8 CID_Tab[16]; - - /* MSD chip select low */ - MSD_CS_LOW(); - /* Send CMD10 (CID register) */ - MSD_SendCmd(MSD_SEND_CID, 0, 0xFF); - - /* Wait for response in the R1 format (0x00 is no errors) */ - if (!MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) - { - if (!MSD_GetResponse(MSD_START_DATA_SINGLE_BLOCK_READ)) - { - /* Store CID register value on CID_Tab */ - for (i = 0; i < 16; i++) - { - CID_Tab[i] = MSD_ReadByte(); - } - } - /* Get CRC bytes (not really needed by us, but required by MSD) */ - MSD_WriteByte(DUMMY); - MSD_WriteByte(DUMMY); - /* Set response value to success */ - rvalue = MSD_RESPONSE_NO_ERROR; - } - - /* MSD chip select high */ - MSD_CS_HIGH(); - /* Send dummy byte: 8 Clock pulses of delay */ - MSD_WriteByte(DUMMY); - - /* Byte 0 */ - MSD_cid->ManufacturerID = CID_Tab[0]; - /* Byte 1 */ - MSD_cid->OEM_AppliID = CID_Tab[1] << 8; - /* Byte 2 */ - MSD_cid->OEM_AppliID |= CID_Tab[2]; - /* Byte 3 */ - MSD_cid->ProdName1 = CID_Tab[3] << 24; - /* Byte 4 */ - MSD_cid->ProdName1 |= CID_Tab[4] << 16; - /* Byte 5 */ - MSD_cid->ProdName1 |= CID_Tab[5] << 8; - /* Byte 6 */ - MSD_cid->ProdName1 |= CID_Tab[6]; - /* Byte 7 */ - MSD_cid->ProdName2 = CID_Tab[7]; - /* Byte 8 */ - MSD_cid->ProdRev = CID_Tab[8]; - /* Byte 9 */ - MSD_cid->ProdSN = CID_Tab[9] << 24; - /* Byte 10 */ - MSD_cid->ProdSN |= CID_Tab[10] << 16; - /* Byte 11 */ - MSD_cid->ProdSN |= CID_Tab[11] << 8; - /* Byte 12 */ - MSD_cid->ProdSN |= CID_Tab[12]; - /* Byte 13 */ - MSD_cid->Reserved1 |= (CID_Tab[13] & 0xF0) >> 4; - /* Byte 14 */ - MSD_cid->ManufactDate = (CID_Tab[13] & 0x0F) << 8; - /* Byte 15 */ - MSD_cid->ManufactDate |= CID_Tab[14]; - /* Byte 16 */ - MSD_cid->msd_CRC = (CID_Tab[15] & 0xFE) >> 1; - MSD_cid->Reserved2 = 1; - - /* Return the reponse */ - return rvalue; -} - -/******************************************************************************* -* Function Name : MSD_SendCmd -* Description : Send 5 bytes command to the MSD card. -* Input : - Cmd: the user expected command to send to MSD card -* - Arg: the command argument -* - Crc: the CRC -* Output : None -* Return : None -*******************************************************************************/ -void MSD_SendCmd(u8 Cmd, u32 Arg, u8 Crc) -{ - u32 i = 0x00; - u8 Frame[6]; - - /* Construct byte1 */ - Frame[0] = (Cmd | 0x40); - /* Construct byte2 */ - Frame[1] = (u8)(Arg >> 24); - /* Construct byte3 */ - Frame[2] = (u8)(Arg >> 16); - /* Construct byte4 */ - Frame[3] = (u8)(Arg >> 8); - /* Construct byte5 */ - Frame[4] = (u8)(Arg); - /* Construct CRC: byte6 */ - Frame[5] = (Crc); - - /* Send the Cmd bytes */ - for (i = 0; i < 6; i++) - { - MSD_WriteByte(Frame[i]); - } -} - -/******************************************************************************* -* Function Name : MSD_GetDataResponse -* Description : Get MSD card data response. -* Input : None -* Output : None -* Return : The MSD status: Read data response xxx01 -* - status 010: Data accecpted -* - status 101: Data rejected due to a crc error -* - status 110: Data rejected due to a Write error. -* - status 111: Data rejected due to other error. -*******************************************************************************/ -u8 MSD_GetDataResponse(void) -{ - u32 i = 0; - u8 response, rvalue; - - while (i <= 64) - { - /* Read resonse */ - response = MSD_ReadByte(); - /* Mask unused bits */ - response &= 0x1F; - - switch (response) - { - case MSD_DATA_OK: - { - rvalue = MSD_DATA_OK; - break; - } - - case MSD_DATA_CRC_ERROR: - return MSD_DATA_CRC_ERROR; - - case MSD_DATA_WRITE_ERROR: - return MSD_DATA_WRITE_ERROR; - - default: - { - rvalue = MSD_DATA_OTHER_ERROR; - break; - } - } - /* Exit loop in case of data ok */ - if (rvalue == MSD_DATA_OK) - break; - /* Increment loop counter */ - i++; - } - /* Wait null data */ - while (MSD_ReadByte() == 0); - /* Return response */ - return response; -} - -/******************************************************************************* -* Function Name : MSD_GetResponse -* Description : Returns the MSD response. -* Input : None -* Output : None -* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed -* - MSD_RESPONSE_NO_ERROR: Sequence succeed -*******************************************************************************/ -u8 MSD_GetResponse(u8 Response) -{ - u32 Count = 0xFFF; - - /* Check if response is got or a timeout is happen */ - while ((MSD_ReadByte() != Response) && Count) - { - Count--; - } - - if (Count == 0) - { - /* After time out */ - return MSD_RESPONSE_FAILURE; - } - else - { - /* Right response got */ - return MSD_RESPONSE_NO_ERROR; - } -} - -/******************************************************************************* -* Function Name : MSD_GetStatus -* Description : Returns the MSD status. -* Input : None -* Output : None -* Return : The MSD status. -*******************************************************************************/ -u16 MSD_GetStatus(void) -{ - u16 Status = 0; - - /* MSD chip select low */ - MSD_CS_LOW(); - /* Send CMD13 (MSD_SEND_STATUS) to get MSD status */ - MSD_SendCmd(MSD_SEND_STATUS, 0, 0xFF); - - Status = MSD_ReadByte(); - Status |= (u16)(MSD_ReadByte() << 8); - - /* MSD chip select high */ - MSD_CS_HIGH(); - /* Send dummy byte 0xFF */ - MSD_WriteByte(DUMMY); - - return Status; -} - -/******************************************************************************* -* Function Name : MSD_GoIdleState -* Description : Put MSD in Idle state. -* Input : None -* Output : None -* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed -* - MSD_RESPONSE_NO_ERROR: Sequence succeed -*******************************************************************************/ -u8 MSD_GoIdleState(void) -{ - /* MSD chip select low */ - MSD_CS_LOW(); - /* Send CMD0 (GO_IDLE_STATE) to put MSD in SPI mode */ - MSD_SendCmd(MSD_GO_IDLE_STATE, 0, 0x95); - - /* Wait for In Idle State Response (R1 Format) equal to 0x01 */ - if (MSD_GetResponse(MSD_IN_IDLE_STATE)) - { - /* No Idle State Response: return response failue */ - return MSD_RESPONSE_FAILURE; - } - /*----------Activates the card initialization process-----------*/ - do - { - /* MSD chip select high */ - MSD_CS_HIGH(); - /* Send Dummy byte 0xFF */ - MSD_WriteByte(DUMMY); - - /* MSD chip select low */ - MSD_CS_LOW(); - - /* Send CMD1 (Activates the card process) until response equal to 0x0 */ - MSD_SendCmd(MSD_SEND_OP_COND, 0, 0xFF); - /* Wait for no error Response (R1 Format) equal to 0x00 */ - } - while (MSD_GetResponse(MSD_RESPONSE_NO_ERROR)); - - /* MSD chip select high */ - MSD_CS_HIGH(); - /* Send dummy byte 0xFF */ - MSD_WriteByte(DUMMY); - - return MSD_RESPONSE_NO_ERROR; -} - -/******************************************************************************* -* Function Name : MSD_WriteByte -* Description : Write a byte on the MSD. -* Input : Data: byte to send. -* Output : None -* Return : None. -*******************************************************************************/ -void MSD_WriteByte(u8 Data) -{ - /* Wait until the transmit buffer is empty */ - while (SPI_I2S_GetFlagStatus(MSD_SPI, SPI_I2S_FLAG_TXE) == RESET); - /* Send the byte */ - SPI_I2S_SendData(MSD_SPI, Data); - - /*!< Wait to receive a byte*/ - while(SPI_I2S_GetFlagStatus(MSD_SPI, SPI_I2S_FLAG_RXNE) == RESET); - /*!< Return the byte read from the SPI bus */ - SPI_I2S_ReceiveData(MSD_SPI); -} - -/******************************************************************************* -* Function Name : MSD_ReadByte -* Description : Read a byte from the MSD. -* Input : None. -* Output : None -* Return : The received byte. -*******************************************************************************/ -u8 MSD_ReadByte(void) -{ - u8 Data = 0; - - /* Wait until the transmit buffer is empty */ - while (SPI_I2S_GetFlagStatus(MSD_SPI, SPI_I2S_FLAG_TXE) == RESET); - /* Send the byte */ - SPI_I2S_SendData(MSD_SPI, DUMMY); - - /* Wait until a data is received */ - while (SPI_I2S_GetFlagStatus(MSD_SPI, SPI_I2S_FLAG_RXNE) == RESET); - /* Get the received data */ - Data = SPI_I2S_ReceiveData(MSD_SPI); - - /* Return the shifted data */ - return Data; -} - -/******************************************************************************* -* Function Name : SPI_Config -* Description : Initializes the SPI and CS pins. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void SPI_Config(void) -{ - uint32_t delay; - GPIO_InitTypeDef GPIO_InitStructure; - SPI_InitTypeDef SPI_InitStructure; - - /* GPIOA and GPIOC Periph clock enable */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOD, ENABLE); - /* SPI Periph clock enable */ - RCC_APB2PeriphClockCmd(MSD_RCC_SPI, ENABLE); - - /* Configure SPI pins: SCK, MISO and MOSI */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOA, &GPIO_InitStructure); - - /* Configure PD9 pin: CS pin ,PD10 : SD Power */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9|GPIO_Pin_10; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_Init(GPIOD, &GPIO_InitStructure); - - /* SPI Config */ - SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; - SPI_InitStructure.SPI_Mode = SPI_Mode_Master; - SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; - SPI_InitStructure.SPI_CPOL = SPI_CPOL_High; - SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge; - SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; - SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4; - SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; - SPI_InitStructure.SPI_CRCPolynomial = 7; - SPI_Init(MSD_SPI, &SPI_InitStructure); - - /* SPI enable */ - SPI_Cmd(MSD_SPI, ENABLE); - - /* active SD card */ - GPIO_ResetBits(GPIOD, GPIO_Pin_10); - for (delay = 0; delay < 0xfffff; delay ++); -} - -/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ - -/* - * RT-Thread SD Card Driver - * 2009-04-17 Bernard first version - * 2010-07-15 Modify read/write according new block driver interface - */ -#include -#include - -static struct rt_device sdcard_device; -static struct dfs_partition part; - -#define SECTOR_SIZE 512 - -/* RT-Thread Device Driver Interface */ -static rt_err_t rt_msd_init(rt_device_t dev) -{ - sMSD_CSD MSD_csd; - MSD_GetCSDRegister(&MSD_csd); - - return RT_EOK; -} - -static rt_err_t rt_msd_open(rt_device_t dev, rt_uint16_t oflag) -{ - return RT_EOK; -} - -static rt_err_t rt_msd_close(rt_device_t dev) -{ - return RT_EOK; -} - -static rt_size_t rt_msd_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) -{ - rt_uint8_t status; - rt_uint32_t i; - - status = MSD_RESPONSE_NO_ERROR; - // rt_kprintf("read: 0x%x, size %d\n", pos, size); - - /* read all sectors */ - for (i = 0; i < size; i ++) - { - status = MSD_ReadBlock((rt_uint8_t*)((rt_uint8_t*)buffer + i * SECTOR_SIZE), - (part.offset + pos + i)* SECTOR_SIZE, SECTOR_SIZE); - if (status != MSD_RESPONSE_NO_ERROR) - { - rt_kprintf("sd card read failed\n"); - return 0; - } - } - - if (status == MSD_RESPONSE_NO_ERROR) return size; - - rt_kprintf("read failed: %d\n", status); - return 0; -} - -static rt_size_t rt_msd_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) -{ - rt_uint8_t status; - rt_uint32_t i; - - status = MSD_RESPONSE_NO_ERROR; - // rt_kprintf("write: 0x%x, size %d\n", pos, size); - - /* write all sectors */ - for (i = 0; i < size; i ++) - { - status = MSD_WriteBuffer((rt_uint8_t*)((rt_uint8_t*)buffer + i * SECTOR_SIZE), - (part.offset + pos + i)* SECTOR_SIZE, SECTOR_SIZE); - if (status != MSD_RESPONSE_NO_ERROR) - { - rt_kprintf("sd card write failed\n"); - return 0; - } - } - - if (status == MSD_RESPONSE_NO_ERROR) return size; - - rt_kprintf("write failed: %d\n", status); - return 0; -} - -static rt_err_t rt_msd_control(rt_device_t dev, rt_uint8_t cmd, void *args) -{ - RT_ASSERT(dev != RT_NULL); - - return RT_EOK; -} - -void rt_hw_msd_init() -{ - if (MSD_Init() == MSD_RESPONSE_NO_ERROR) - { - rt_uint8_t status; - rt_uint8_t *sector; - - /* register sdcard device */ - sdcard_device.init = rt_msd_init; - sdcard_device.open = rt_msd_open; - sdcard_device.close = rt_msd_close; - sdcard_device.read = rt_msd_read; - sdcard_device.write = rt_msd_write; - sdcard_device.control = rt_msd_control; - - /* no private */ - sdcard_device.user_data = RT_NULL; - /* get the first sector to read partition table */ - sector = (rt_uint8_t*) rt_malloc (512); - if (sector == RT_NULL) - { - rt_kprintf("allocate partition sector buffer failed\n"); - return; - } - - status = MSD_ReadBlock(sector, 0, 512); - if (status == MSD_RESPONSE_NO_ERROR) - { - /* get the first partition */ - status = dfs_filesystem_get_partition(&part, sector, 0); - if (status != RT_EOK) - { - /* there is no partition table */ - part.offset = 0; - part.size = 0; - } - } - else - { - /* there is no partition table */ - part.offset = 0; - part.size = 0; - } - - /* release sector buffer */ - rt_free(sector); - - rt_device_register(&sdcard_device, "sd0", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE); - } - else - { - rt_kprintf("sdcard init failed\n"); - } -} diff --git a/bsp/stm32f10x/msd.h b/bsp/stm32f10x/msd.h deleted file mode 100644 index 66faeb5dc0..0000000000 --- a/bsp/stm32f10x/msd.h +++ /dev/null @@ -1,173 +0,0 @@ -/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** -* File Name : msd.h -* Author : MCD Application Team -* Version : V2.1 -* Date : 05/30/2008 -* Description : Header for msd.c file. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -* FOR MORE INFORMATION PLEASE CAREFULLY READ THE LICENSE AGREEMENT FILE LOCATED -* IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __MSD_H -#define __MSD_H - -/* Includes ------------------------------------------------------------------*/ -#include - -/* Private define ------------------------------------------------------------*/ -/* Block Size */ -#define BLOCK_SIZE 512 - -/* Dummy byte */ -#define DUMMY 0xFF - -/* Start Data tokens */ -/* Tokens (necessary because at nop/idle (and CS active) only 0xff is on the data/command line) */ -#define MSD_START_DATA_SINGLE_BLOCK_READ 0xFE /* Data token start byte, Start Single Block Read */ -#define MSD_START_DATA_MULTIPLE_BLOCK_READ 0xFE /* Data token start byte, Start Multiple Block Read */ -#define MSD_START_DATA_SINGLE_BLOCK_WRITE 0xFE /* Data token start byte, Start Single Block Write */ -#define MSD_START_DATA_MULTIPLE_BLOCK_WRITE 0xFD /* Data token start byte, Start Multiple Block Write */ -#define MSD_STOP_DATA_MULTIPLE_BLOCK_WRITE 0xFD /* Data toke stop byte, Stop Multiple Block Write */ - -/* MSD functions return */ -#define MSD_SUCCESS 0x00 -#define MSD_FAIL 0xFF - -/* MSD reponses and error flags */ -#define MSD_RESPONSE_NO_ERROR 0x00 -#define MSD_IN_IDLE_STATE 0x01 -#define MSD_ERASE_RESET 0x02 -#define MSD_ILLEGAL_COMMAND 0x04 -#define MSD_COM_CRC_ERROR 0x08 -#define MSD_ERASE_SEQUENCE_ERROR 0x10 -#define MSD_ADDRESS_ERROR 0x20 -#define MSD_PARAMETER_ERROR 0x40 -#define MSD_RESPONSE_FAILURE 0xFF - -/* Data response error */ -#define MSD_DATA_OK 0x05 -#define MSD_DATA_CRC_ERROR 0x0B -#define MSD_DATA_WRITE_ERROR 0x0D -#define MSD_DATA_OTHER_ERROR 0xFF - -/* Commands: CMDxx = CMD-number | 0x40 */ -#define MSD_GO_IDLE_STATE 0 /* CMD0=0x40 */ -#define MSD_SEND_OP_COND 1 /* CMD1=0x41 */ -#define MSD_SEND_CSD 9 /* CMD9=0x49 */ -#define MSD_SEND_CID 10 /* CMD10=0x4A */ -#define MSD_STOP_TRANSMISSION 12 /* CMD12=0x4C */ -#define MSD_SEND_STATUS 13 /* CMD13=0x4D */ -#define MSD_SET_BLOCKLEN 16 /* CMD16=0x50 */ -#define MSD_READ_SINGLE_BLOCK 17 /* CMD17=0x51 */ -#define MSD_READ_MULTIPLE_BLOCK 18 /* CMD18=0x52 */ -#define MSD_SET_BLOCK_COUNT 23 /* CMD23=0x57 */ -#define MSD_WRITE_BLOCK 24 /* CMD24=0x58 */ -#define MSD_WRITE_MULTIPLE_BLOCK 25 /* CMD25=0x59 */ -#define MSD_PROGRAM_CSD 27 /* CMD27=0x5B */ -#define MSD_SET_WRITE_PROT 28 /* CMD28=0x5C */ -#define MSD_CLR_WRITE_PROT 29 /* CMD29=0x5D */ -#define MSD_SEND_WRITE_PROT 30 /* CMD30=0x5E */ -#define MSD_TAG_SECTOR_START 32 /* CMD32=0x60 */ -#define MSD_TAG_SECTOR_END 33 /* CMD33=0x61 */ -#define MSD_UNTAG_SECTOR 34 /* CMD34=0x62 */ -#define MSD_TAG_ERASE_GROUP_START 35 /* CMD35=0x63 */ -#define MSD_TAG_ERASE_GROUP_END 36 /* CMD36=0x64 */ -#define MSD_UNTAG_ERASE_GROUP 37 /* CMD37=0x65 */ -#define MSD_ERASE 38 /* CMD38=0x66 */ -#define MSD_READ_OCR 39 /* CMD39=0x67 */ -#define MSD_CRC_ON_OFF 40 /* CMD40=0x68 */ - -/* Exported types ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -typedef struct _MSD_CSD /*Card Specific Data*/ -{ - vu8 CSDStruct; /* CSD structure */ - vu8 SysSpecVersion; /* System specification version */ - vu8 Reserved1; /* Reserved */ - vu8 TAAC; /* Data read access-time 1 */ - vu8 NSAC; /* Data read access-time 2 in CLK cycles */ - vu8 MaxBusClkFrec; /* Max. bus clock frequency */ - vu16 CardComdClasses; /* Card command classes */ - vu8 RdBlockLen; /* Max. read data block length */ - vu8 PartBlockRead; /* Partial blocks for read allowed */ - vu8 WrBlockMisalign; /* Write block misalignment */ - vu8 RdBlockMisalign; /* Read block misalignment */ - vu8 DSRImpl; /* DSR implemented */ - vu8 Reserved2; /* Reserved */ - vu16 DeviceSize; /* Device Size */ - vu8 MaxRdCurrentVDDMin; /* Max. read current @ VDD min */ - vu8 MaxRdCurrentVDDMax; /* Max. read current @ VDD max */ - vu8 MaxWrCurrentVDDMin; /* Max. write current @ VDD min */ - vu8 MaxWrCurrentVDDMax; /* Max. write current @ VDD max */ - vu8 DeviceSizeMul; /* Device size multiplier */ - vu8 EraseGrSize; /* Erase group size */ - vu8 EraseGrMul; /* Erase group size multiplier */ - vu8 WrProtectGrSize; /* Write protect group size */ - vu8 WrProtectGrEnable; /* Write protect group enable */ - vu8 ManDeflECC; /* Manufacturer default ECC */ - vu8 WrSpeedFact; /* Write speed factor */ - vu8 MaxWrBlockLen; /* Max. write data block length */ - vu8 WriteBlockPaPartial; /* Partial blocks for write allowed */ - vu8 Reserved3; /* Reserded */ - vu8 ContentProtectAppli; /* Content protection application */ - vu8 FileFormatGrouop; /* File format group */ - vu8 CopyFlag; /* Copy flag (OTP) */ - vu8 PermWrProtect; /* Permanent write protection */ - vu8 TempWrProtect; /* Temporary write protection */ - vu8 FileFormat; /* File Format */ - vu8 ECC; /* ECC code */ - vu8 msd_CRC; /* CRC */ - vu8 Reserved4; /* always 1*/ -} -sMSD_CSD; - -typedef struct _MSD_CID /*Card Identification Data*/ -{ - vu8 ManufacturerID; /* ManufacturerID */ - vu16 OEM_AppliID; /* OEM/Application ID */ - vu32 ProdName1; /* Product Name part1 */ - vu8 ProdName2; /* Product Name part2*/ - vu8 ProdRev; /* Product Revision */ - vu32 ProdSN; /* Product Serial Number */ - vu8 Reserved1; /* Reserved1 */ - vu16 ManufactDate; /* Manufacturing Date */ - vu8 msd_CRC; /* CRC */ - vu8 Reserved2; /* always 1*/ -} -sMSD_CID; - -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -/*----- High layer function -----*/ -u8 MSD_Init(void); -u8 MSD_WriteBlock(u8* pBuffer, u32 WriteAddr, u16 NumByteToWrite); -u8 MSD_ReadBlock(u8* pBuffer, u32 ReadAddr, u16 NumByteToRead); -u8 MSD_WriteBuffer(u8* pBuffer, u32 WriteAddr, u32 NumByteToWrite); -u8 MSD_ReadBuffer(u8* pBuffer, u32 ReadAddr, u32 NumByteToRead); -u8 MSD_GetCSDRegister(sMSD_CSD* MSD_csd); -u8 MSD_GetCIDRegister(sMSD_CID* MSD_cid); - -/*----- Medium layer function -----*/ -void MSD_SendCmd(u8 Cmd, u32 Arg, u8 Crc); -u8 MSD_GetResponse(u8 Response); -u8 MSD_GetDataResponse(void); -u8 MSD_GoIdleState(void); -u16 MSD_GetStatus(void); - -/*----- Low layer function -----*/ -void MSD_WriteByte(u8 byte); -u8 MSD_ReadByte(void); - -#endif /* __MSD_H */ - -/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ From a183f1fbe9667430be4a9063b7ea0e525e32a8aa Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 18:20:27 +0800 Subject: [PATCH 03/11] update stm32f10x project. --- bsp/stm32f10x/drivers/SConscript | 1 + bsp/stm32f10x/project.Uv2 | 136 +- bsp/stm32f10x/project.ewp | 4088 +++++++++++++++--------------- bsp/stm32f10x/project.eww | 20 +- bsp/stm32f10x/project.uvproj | 746 ++++++ bsp/stm32f10x/rtconfig.h | 4 +- bsp/stm32f10x/template.uvproj | 10 +- 7 files changed, 2886 insertions(+), 2119 deletions(-) create mode 100644 bsp/stm32f10x/project.uvproj diff --git a/bsp/stm32f10x/drivers/SConscript b/bsp/stm32f10x/drivers/SConscript index 36bc419f66..a09e059919 100644 --- a/bsp/stm32f10x/drivers/SConscript +++ b/bsp/stm32f10x/drivers/SConscript @@ -7,6 +7,7 @@ cwd = os.path.join(str(Dir('#')), 'drivers') # add the general drvers. src = Split(""" board.c +stm32f10x_it.c led.c serial.c usart.c diff --git a/bsp/stm32f10x/project.Uv2 b/bsp/stm32f10x/project.Uv2 index 6f9f30a436..7a86b63746 100644 --- a/bsp/stm32f10x/project.Uv2 +++ b/bsp/stm32f10x/project.Uv2 @@ -3,75 +3,79 @@ Target (RT-Thread STM32), 0x0004 // Tools: 'ARM-ADS' -Group (Startup) +Group (Applications) +Group (Drivers) +Group (STM32_StdPeriph) Group (Kernel) Group (CORTEX-M3) Group (finsh) -Group (STM32_StdPeriph) -File 1,1,<.\application.c> -File 1,1,<.\startup.c> -File 1,1,<.\board.c> -File 1,1,<.\stm32f10x_it.c> -File 1,1,<.\rtc.c> -File 1,1,<.\usart.c> -File 1,1,<.\serial.c> -File 1,1,<.\led.c> -File 2,1,<..\..\src\clock.c> -File 2,1,<..\..\src\device.c> -File 2,1,<..\..\src\idle.c> -File 2,1,<..\..\src\ipc.c> -File 2,1,<..\..\src\irq.c> -File 2,1,<..\..\src\kservice.c> -File 2,1,<..\..\src\mem.c> -File 2,1,<..\..\src\mempool.c> -File 2,1,<..\..\src\object.c> -File 2,1,<..\..\src\scheduler.c> -File 2,1,<..\..\src\thread.c> -File 2,1,<..\..\src\timer.c> -File 3,1,<..\..\libcpu\arm\cortex-m3\cpuport.c> -File 3,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S> -File 3,1,<..\..\libcpu\arm\common\backtrace.c> -File 3,1,<..\..\libcpu\arm\common\div0.c> -File 3,1,<..\..\libcpu\arm\common\showmem.c> -File 4,1,<..\..\components\finsh\cmd.c> -File 4,1,<..\..\components\finsh\finsh_compiler.c> -File 4,1,<..\..\components\finsh\finsh_error.c> -File 4,1,<..\..\components\finsh\finsh_heap.c> -File 4,1,<..\..\components\finsh\finsh_init.c> -File 4,1,<..\..\components\finsh\finsh_node.c> -File 4,1,<..\..\components\finsh\finsh_ops.c> -File 4,1,<..\..\components\finsh\finsh_parser.c> -File 4,1,<..\..\components\finsh\finsh_token.c> -File 4,1,<..\..\components\finsh\finsh_var.c> -File 4,1,<..\..\components\finsh\finsh_vm.c> -File 4,1,<..\..\components\finsh\shell.c> -File 4,1,<..\..\components\finsh\symbol.c> -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,1, -File 5,2, +File 1,1, +File 1,1, +File 2,1, +File 2,1, +File 2,1, +File 2,1, +File 2,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,2, +File 4,1,<..\..\src\clock.c> +File 4,1,<..\..\src\device.c> +File 4,1,<..\..\src\idle.c> +File 4,1,<..\..\src\ipc.c> +File 4,1,<..\..\src\irq.c> +File 4,1,<..\..\src\kservice.c> +File 4,1,<..\..\src\mem.c> +File 4,1,<..\..\src\mempool.c> +File 4,1,<..\..\src\object.c> +File 4,1,<..\..\src\scheduler.c> +File 4,1,<..\..\src\thread.c> +File 4,1,<..\..\src\timer.c> +File 5,1,<..\..\libcpu\arm\cortex-m3\cpuport.c> +File 5,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S> +File 5,1,<..\..\libcpu\arm\common\backtrace.c> +File 5,1,<..\..\libcpu\arm\common\div0.c> +File 5,1,<..\..\libcpu\arm\common\showmem.c> +File 6,1,<..\..\components\finsh\cmd.c> +File 6,1,<..\..\components\finsh\finsh_compiler.c> +File 6,1,<..\..\components\finsh\finsh_error.c> +File 6,1,<..\..\components\finsh\finsh_heap.c> +File 6,1,<..\..\components\finsh\finsh_init.c> +File 6,1,<..\..\components\finsh\finsh_node.c> +File 6,1,<..\..\components\finsh\finsh_ops.c> +File 6,1,<..\..\components\finsh\finsh_parser.c> +File 6,1,<..\..\components\finsh\finsh_token.c> +File 6,1,<..\..\components\finsh\finsh_var.c> +File 6,1,<..\..\components\finsh\finsh_vm.c> +File 6,1,<..\..\components\finsh\msh.c> +File 6,1,<..\..\components\finsh\msh_cmd.c> +File 6,1,<..\..\components\finsh\shell.c> +File 6,1,<..\..\components\finsh\symbol.c> + + Options 1,0,0 // Target 'RT-Thread STM32' @@ -132,7 +136,7 @@ Options 1,0,0 // Target 'RT-Thread STM32' ADSCMISC () ADSCDEFN (STM32F10X_HD, USE_STDPERIPH_DRIVER) ADSCUDEF () - ADSCINCD (Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\components\CMSIS\Include;.;..\..\include;..\..\libcpu\arm\cortex-m3;..\..\libcpu\arm\common;..\..\components\finsh;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x) + ADSCINCD (Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\include;drivers;..\..\components\CMSIS\Include;.;applications;..\..\libcpu\arm\cortex-m3;..\..\libcpu\arm\common;..\..\components\finsh;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x) ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } ADSAMISC () ADSADEFN () diff --git a/bsp/stm32f10x/project.ewp b/bsp/stm32f10x/project.ewp index 1a8050a5c4..5a73311af8 100644 --- a/bsp/stm32f10x/project.ewp +++ b/bsp/stm32f10x/project.ewp @@ -1,2039 +1,2049 @@ - - 2 - - Debug - - ARM - - 1 - - General - 3 - - 21 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 28 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 8 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 14 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - - Release - - ARM - - 0 - - General - 3 - - 21 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 28 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 8 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 14 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - - - Startup - - $PROJ_DIR$\.\application.c - - - $PROJ_DIR$\.\startup.c - - - $PROJ_DIR$\.\board.c - - - $PROJ_DIR$\.\stm32f10x_it.c - - - $PROJ_DIR$\.\rtc.c - - - $PROJ_DIR$\.\usart.c - - - $PROJ_DIR$\.\serial.c - - - $PROJ_DIR$\.\led.c - - - - Kernel - - $PROJ_DIR$\..\..\src\clock.c - - - $PROJ_DIR$\..\..\src\device.c - - - $PROJ_DIR$\..\..\src\idle.c - - - $PROJ_DIR$\..\..\src\ipc.c - - - $PROJ_DIR$\..\..\src\irq.c - - - $PROJ_DIR$\..\..\src\kservice.c - - - $PROJ_DIR$\..\..\src\mem.c - - - $PROJ_DIR$\..\..\src\mempool.c - - - $PROJ_DIR$\..\..\src\object.c - - - $PROJ_DIR$\..\..\src\scheduler.c - - - $PROJ_DIR$\..\..\src\thread.c - - - $PROJ_DIR$\..\..\src\timer.c - - - - CORTEX-M3 - - $PROJ_DIR$\..\..\libcpu\arm\cortex-m3\cpuport.c - - - $PROJ_DIR$\..\..\libcpu\arm\cortex-m3\context_iar.S - - - $PROJ_DIR$\..\..\libcpu\arm\common\backtrace.c - - - $PROJ_DIR$\..\..\libcpu\arm\common\div0.c - - - $PROJ_DIR$\..\..\libcpu\arm\common\showmem.c - - - - finsh - - $PROJ_DIR$\..\..\components\finsh\cmd.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_compiler.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_error.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_heap.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_init.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_node.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_ops.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_parser.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_token.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_var.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_vm.c - - - $PROJ_DIR$\..\..\components\finsh\shell.c - - - $PROJ_DIR$\..\..\components\finsh\symbol.c - - - - STM32_StdPeriph - - $PROJ_DIR$\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c - - - $PROJ_DIR$\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\iar\startup_stm32f10x_hd.s - - - + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 21 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 21 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 28 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 14 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + Applications + + $PROJ_DIR$\applications\application.c + + + $PROJ_DIR$\applications\startup.c + + + + Drivers + + $PROJ_DIR$\drivers\board.c + + + $PROJ_DIR$\drivers\stm32f10x_it.c + + + $PROJ_DIR$\drivers\led.c + + + $PROJ_DIR$\drivers\serial.c + + + $PROJ_DIR$\drivers\usart.c + + + + STM32_StdPeriph + + $PROJ_DIR$\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c + + + $PROJ_DIR$\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\iar\startup_stm32f10x_hd.s + + + + Kernel + + $PROJ_DIR$\..\..\src\clock.c + + + $PROJ_DIR$\..\..\src\device.c + + + $PROJ_DIR$\..\..\src\idle.c + + + $PROJ_DIR$\..\..\src\ipc.c + + + $PROJ_DIR$\..\..\src\irq.c + + + $PROJ_DIR$\..\..\src\kservice.c + + + $PROJ_DIR$\..\..\src\mem.c + + + $PROJ_DIR$\..\..\src\mempool.c + + + $PROJ_DIR$\..\..\src\object.c + + + $PROJ_DIR$\..\..\src\scheduler.c + + + $PROJ_DIR$\..\..\src\thread.c + + + $PROJ_DIR$\..\..\src\timer.c + + + + CORTEX-M3 + + $PROJ_DIR$\..\..\libcpu\arm\cortex-m3\cpuport.c + + + $PROJ_DIR$\..\..\libcpu\arm\cortex-m3\context_iar.S + + + $PROJ_DIR$\..\..\libcpu\arm\common\backtrace.c + + + $PROJ_DIR$\..\..\libcpu\arm\common\div0.c + + + $PROJ_DIR$\..\..\libcpu\arm\common\showmem.c + + + + finsh + + $PROJ_DIR$\..\..\components\finsh\cmd.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_compiler.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_error.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_heap.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_init.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_node.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_ops.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_parser.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_token.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_var.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_vm.c + + + $PROJ_DIR$\..\..\components\finsh\msh.c + + + $PROJ_DIR$\..\..\components\finsh\msh_cmd.c + + + $PROJ_DIR$\..\..\components\finsh\shell.c + + + $PROJ_DIR$\..\..\components\finsh\symbol.c + + + diff --git a/bsp/stm32f10x/project.eww b/bsp/stm32f10x/project.eww index c2cb02eb1e..faa93f37cd 100644 --- a/bsp/stm32f10x/project.eww +++ b/bsp/stm32f10x/project.eww @@ -1,10 +1,10 @@ - - - - - $WS_DIR$\project.ewp - - - - - + + + + + $WS_DIR$\project.ewp + + + + + diff --git a/bsp/stm32f10x/project.uvproj b/bsp/stm32f10x/project.uvproj new file mode 100644 index 0000000000..9a308910aa --- /dev/null +++ b/bsp/stm32f10x/project.uvproj @@ -0,0 +1,746 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + rtthread-stm32 + 0x4 + ARM-ADS + + + STM32F103ZE + STMicroelectronics + IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3") + + "STARTUP\ST\STM32F10x.s" ("STM32 Startup Code") + UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000) + 4216 + stm32f10x_lib.h + + + + + + + + + + SFD\ST\STM32F10xx\STM32F10xxE.sfr + 0 + + + + ST\STM32F10x\ + ST\STM32F10x\ + + 0 + 0 + 0 + 0 + 1 + + .\build\ + rtthread-stm32 + 1 + 0 + 0 + 1 + 0 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + + DARMSTM.DLL + -pSTM32F103ZE + SARMCM3.DLL + + TARMSTM.DLL + -pSTM32F103ZE + + + + 1 + 0 + 0 + 0 + 16 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 0 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + + 0 + 0 + + + + + + + + + + + + + + BIN\UL2CM3.DLL + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 0 + BIN\UL2CM3.DLL + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + STM32F10X_HD, USE_STDPERIPH_DRIVER + + .;..\..\components\CMSIS\Include;..\..\components\finsh;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;Libraries\STM32F10x_StdPeriph_Driver\inc;applications;drivers + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + --keep __fsym_* --keep __vsym_* + + + + + + + + Applications + + + application.c + 1 + applications\application.c + + + startup.c + 1 + applications\startup.c + + + + + Drivers + + + board.c + 1 + drivers\board.c + + + stm32f10x_it.c + 1 + drivers\stm32f10x_it.c + + + led.c + 1 + drivers\led.c + + + serial.c + 1 + drivers\serial.c + + + usart.c + 1 + drivers\usart.c + + + + + STM32_StdPeriph + + + system_stm32f10x.c + 1 + Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c + + + stm32f10x_crc.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c + + + stm32f10x_rcc.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c + + + stm32f10x_wwdg.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c + + + stm32f10x_pwr.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c + + + stm32f10x_exti.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c + + + stm32f10x_bkp.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c + + + stm32f10x_i2c.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c + + + stm32f10x_adc.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c + + + stm32f10x_dac.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c + + + stm32f10x_rtc.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c + + + stm32f10x_fsmc.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c + + + stm32f10x_tim.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c + + + stm32f10x_iwdg.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c + + + stm32f10x_spi.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c + + + stm32f10x_flash.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c + + + stm32f10x_sdio.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c + + + stm32f10x_gpio.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c + + + stm32f10x_usart.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c + + + stm32f10x_dbgmcu.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c + + + stm32f10x_dma.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c + + + stm32f10x_can.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c + + + stm32f10x_cec.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c + + + misc.c + 1 + Libraries\STM32F10x_StdPeriph_Driver\src\misc.c + + + startup_stm32f10x_hd.s + 2 + Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_hd.s + + + + + Kernel + + + clock.c + 1 + ..\..\src\clock.c + + + device.c + 1 + ..\..\src\device.c + + + idle.c + 1 + ..\..\src\idle.c + + + ipc.c + 1 + ..\..\src\ipc.c + + + irq.c + 1 + ..\..\src\irq.c + + + kservice.c + 1 + ..\..\src\kservice.c + + + mem.c + 1 + ..\..\src\mem.c + + + mempool.c + 1 + ..\..\src\mempool.c + + + object.c + 1 + ..\..\src\object.c + + + scheduler.c + 1 + ..\..\src\scheduler.c + + + thread.c + 1 + ..\..\src\thread.c + + + timer.c + 1 + ..\..\src\timer.c + + + + + CORTEX-M3 + + + cpuport.c + 1 + ..\..\libcpu\arm\cortex-m3\cpuport.c + + + context_rvds.S + 2 + ..\..\libcpu\arm\cortex-m3\context_rvds.S + + + backtrace.c + 1 + ..\..\libcpu\arm\common\backtrace.c + + + div0.c + 1 + ..\..\libcpu\arm\common\div0.c + + + showmem.c + 1 + ..\..\libcpu\arm\common\showmem.c + + + + + finsh + + + cmd.c + 1 + ..\..\components\finsh\cmd.c + + + finsh_compiler.c + 1 + ..\..\components\finsh\finsh_compiler.c + + + finsh_error.c + 1 + ..\..\components\finsh\finsh_error.c + + + finsh_heap.c + 1 + ..\..\components\finsh\finsh_heap.c + + + finsh_init.c + 1 + ..\..\components\finsh\finsh_init.c + + + finsh_node.c + 1 + ..\..\components\finsh\finsh_node.c + + + finsh_ops.c + 1 + ..\..\components\finsh\finsh_ops.c + + + finsh_parser.c + 1 + ..\..\components\finsh\finsh_parser.c + + + finsh_token.c + 1 + ..\..\components\finsh\finsh_token.c + + + finsh_var.c + 1 + ..\..\components\finsh\finsh_var.c + + + finsh_vm.c + 1 + ..\..\components\finsh\finsh_vm.c + + + msh.c + 1 + ..\..\components\finsh\msh.c + + + msh_cmd.c + 1 + ..\..\components\finsh\msh_cmd.c + + + shell.c + 1 + ..\..\components\finsh\shell.c + + + symbol.c + 1 + ..\..\components\finsh\symbol.c + + + + + + + + diff --git a/bsp/stm32f10x/rtconfig.h b/bsp/stm32f10x/rtconfig.h index 81b99f6fe5..049b3b5d63 100644 --- a/bsp/stm32f10x/rtconfig.h +++ b/bsp/stm32f10x/rtconfig.h @@ -64,7 +64,9 @@ /* SECTION: Console options */ #define RT_USING_CONSOLE /* the buffer size of console*/ -#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLEBUF_SIZE 128 +// +#define RT_CONSOLE_DEVICE_NAME "uart1" /* SECTION: finsh, a C-Express shell */ #define RT_USING_FINSH diff --git a/bsp/stm32f10x/template.uvproj b/bsp/stm32f10x/template.uvproj index d92b75b400..9304eff62a 100644 --- a/bsp/stm32f10x/template.uvproj +++ b/bsp/stm32f10x/template.uvproj @@ -49,7 +49,7 @@ 0 0 1 - 1 + 0 .\build\ 1 0 @@ -61,6 +61,8 @@ 0 0 + 0 + 0 0 @@ -134,6 +136,7 @@ 1 0 1 + 0 0 0 @@ -162,6 +165,7 @@ 1 4096 + 0 BIN\UL2CM3.DLL "" () @@ -342,6 +346,7 @@ 0 0 0 + 0 @@ -357,6 +362,7 @@ 0 0 0 + 0 @@ -382,8 +388,6 @@ - - From e749fb6e9af34bbda250e4b2d5bf8a4339435bd1 Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 18:38:30 +0800 Subject: [PATCH 04/11] cleanup code. --- bsp/stm32f10x/applications/startup.c | 29 +----- bsp/stm32f10x/drivers/board.c | 6 +- bsp/stm32f10x/drivers/board.h | 39 +------- bsp/stm32f10x/drivers/sdcard.c | 14 +++ bsp/stm32f10x/drivers/stm32f10x_it.c | 133 ++++++--------------------- 5 files changed, 55 insertions(+), 166 deletions(-) diff --git a/bsp/stm32f10x/applications/startup.c b/bsp/stm32f10x/applications/startup.c index 445e1419bf..57afa388d0 100644 --- a/bsp/stm32f10x/applications/startup.c +++ b/bsp/stm32f10x/applications/startup.c @@ -15,9 +15,7 @@ #include #include -#include "stm32f10x.h" #include "board.h" -#include "rtc.h" /** * @addtogroup STM32 @@ -68,9 +66,6 @@ void rtthread_startup(void) /* show version */ rt_show_version(); - /* init tick */ - rt_system_tick_init(); - /* init kernel object */ rt_system_object_init(); @@ -89,25 +84,14 @@ void rtthread_startup(void) /* init memory system */ rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END); #endif -#endif -#endif +#endif /* STM32_EXT_SRAM */ +#endif /* RT_USING_HEAP */ /* init scheduler system */ rt_system_scheduler_init(); -#ifdef RT_USING_DFS - /* init sdcard driver */ -#if STM32_USE_SDIO - rt_hw_sdcard_init(); -#else - rt_hw_msd_init(); -#endif -#endif - - rt_hw_rtc_init(); - - /* init all device */ - rt_device_init_all(); + /* init timer thread */ + rt_system_timer_thread_init(); /* init application */ rt_application_init(); @@ -115,12 +99,9 @@ void rtthread_startup(void) #ifdef RT_USING_FINSH /* init finsh */ finsh_system_init(); - finsh_set_device("uart1"); + finsh_set_device(RT_CONSOLE_DEVICE_NAME); #endif - /* init timer thread */ - rt_system_timer_thread_init(); - /* init idle thread */ rt_thread_idle_init(); diff --git a/bsp/stm32f10x/drivers/board.c b/bsp/stm32f10x/drivers/board.c index 010ac851f0..dd2b7b19df 100644 --- a/bsp/stm32f10x/drivers/board.c +++ b/bsp/stm32f10x/drivers/board.c @@ -153,7 +153,7 @@ void EXT_SRAM_Configuration(void) * This is the timer interrupt service routine. * */ -void rt_hw_timer_handler(void) +void SysTick_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); @@ -167,7 +167,7 @@ void rt_hw_timer_handler(void) /** * This function will initial STM32 board. */ -void rt_hw_board_init() +void rt_hw_board_init(void) { /* NVIC Configuration */ NVIC_Configuration(); @@ -180,7 +180,7 @@ void rt_hw_board_init() #endif rt_hw_usart_init(); - rt_console_set_device(CONSOLE_DEVICE); + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); } /*@}*/ diff --git a/bsp/stm32f10x/drivers/board.h b/bsp/stm32f10x/drivers/board.h index 6454bf5407..b33e397954 100644 --- a/bsp/stm32f10x/drivers/board.h +++ b/bsp/stm32f10x/drivers/board.h @@ -16,10 +16,9 @@ #ifndef __BOARD_H__ #define __BOARD_H__ +#include "stm32f10x.h" + /* board configuration */ -// SDCard Driver <1=>SDIO sdcard <0=>SPI MMC card -// Default: 1 -#define STM32_USE_SDIO 1 /* whether use board external SRAM memory */ // Use external SRAM memory on the board @@ -38,38 +37,6 @@ #define STM32_SRAM_SIZE 64 #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) -// Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3 -// Default: 1 -#define STM32_CONSOLE_USART 1 - -// Ethernet Interface: <0=> Microchip ENC28J60 <1=> Davicom DM9000A -// Default: 0 -#define STM32_ETH_IF 1 - -void rt_hw_board_led_on(int n); -void rt_hw_board_led_off(int n); -void rt_hw_board_init(void); - -#if STM32_CONSOLE_USART == 0 -#define CONSOLE_DEVICE "no" -#elif STM32_CONSOLE_USART == 1 -#define CONSOLE_DEVICE "uart1" -#elif STM32_CONSOLE_USART == 2 -#define CONSOLE_DEVICE "uart2" -#elif STM32_CONSOLE_USART == 3 -#define CONSOLE_DEVICE "uart3" -#endif - -void rt_hw_usart_init(void); - -/* SD Card init function */ -void rt_hw_sdcard_init(void); -void rt_hw_msd_init(void); - -/* ETH interface init function */ -void rt_hw_enc28j60_init(void); -void rt_hw_dm9000_init(void); - -#endif +#endif /* __BOARD_H__ */ // <<< Use Configuration Wizard in Context Menu >>> diff --git a/bsp/stm32f10x/drivers/sdcard.c b/bsp/stm32f10x/drivers/sdcard.c index 1ceea2e227..630e0fe4dd 100644 --- a/bsp/stm32f10x/drivers/sdcard.c +++ b/bsp/stm32f10x/drivers/sdcard.c @@ -3236,3 +3236,17 @@ __return: rt_kprintf("sdcard init failed\n"); GPIO_SetBits(GPIOC,GPIO_Pin_6); /* SD card power down */ } + +void SDIO_IRQHandler(void) +{ + extern int SD_ProcessIRQSrc(void); + + /* enter interrupt */ + rt_interrupt_enter(); + + /* Process All SDIO Interrupt Sources */ + SD_ProcessIRQSrc(); + + /* leave interrupt */ + rt_interrupt_leave(); +} diff --git a/bsp/stm32f10x/drivers/stm32f10x_it.c b/bsp/stm32f10x/drivers/stm32f10x_it.c index 86a9eef9ed..f521dab52a 100644 --- a/bsp/stm32f10x/drivers/stm32f10x_it.c +++ b/bsp/stm32f10x/drivers/stm32f10x_it.c @@ -57,10 +57,10 @@ void NMI_Handler(void) */ void MemManage_Handler(void) { - /* Go to infinite loop when Memory Manage exception occurs */ - while (1) - { - } + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) + { + } } /** @@ -70,10 +70,10 @@ void MemManage_Handler(void) */ void BusFault_Handler(void) { - /* Go to infinite loop when Bus Fault exception occurs */ - while (1) - { - } + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) + { + } } /** @@ -83,10 +83,10 @@ void BusFault_Handler(void) */ void UsageFault_Handler(void) { - /* Go to infinite loop when Usage Fault exception occurs */ - while (1) - { - } + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) + { + } } /** @@ -107,11 +107,10 @@ void DebugMon_Handler(void) { } -void SysTick_Handler(void) -{ - extern void rt_hw_timer_handler(void); - rt_hw_timer_handler(); -} +//void SysTick_Handler(void) +//{ +// // definition in boarc.c +//} /******************************************************************************/ /* STM32F10x Peripherals Interrupt Handlers */ @@ -131,7 +130,7 @@ void DMA1_Channel2_IRQHandler(void) { #ifdef RT_USING_UART3 extern struct rt_device uart3_device; - extern void rt_hw_serial_dma_tx_isr(struct rt_device *device); + extern void rt_hw_serial_dma_tx_isr(struct rt_device *device); /* enter interrupt */ rt_interrupt_enter(); @@ -161,7 +160,7 @@ void USART1_IRQHandler(void) { #ifdef RT_USING_UART1 extern struct rt_device uart1_device; - extern void rt_hw_serial_isr(struct rt_device *device); + extern void rt_hw_serial_isr(struct rt_device *device); /* enter interrupt */ rt_interrupt_enter(); @@ -184,7 +183,7 @@ void USART2_IRQHandler(void) { #ifdef RT_USING_UART2 extern struct rt_device uart2_device; - extern void rt_hw_serial_isr(struct rt_device *device); + extern void rt_hw_serial_isr(struct rt_device *device); /* enter interrupt */ rt_interrupt_enter(); @@ -207,7 +206,7 @@ void USART3_IRQHandler(void) { #ifdef RT_USING_UART3 extern struct rt_device uart3_device; - extern void rt_hw_serial_isr(struct rt_device *device); + extern void rt_hw_serial_isr(struct rt_device *device); /* enter interrupt */ rt_interrupt_enter(); @@ -219,77 +218,7 @@ void USART3_IRQHandler(void) #endif } -#if defined(RT_USING_DFS) && STM32_USE_SDIO -/******************************************************************************* -* Function Name : SDIO_IRQHandler -* Description : This function handles SDIO global interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void SDIO_IRQHandler(void) -{ - extern int SD_ProcessIRQSrc(void); - - /* enter interrupt */ - rt_interrupt_enter(); - - /* Process All SDIO Interrupt Sources */ - SD_ProcessIRQSrc(); - - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef RT_USING_LWIP -#ifdef STM32F10X_CL -/******************************************************************************* -* Function Name : ETH_IRQHandler -* Description : This function handles ETH interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void ETH_IRQHandler(void) -{ - extern void rt_hw_stm32_eth_isr(void); - - /* enter interrupt */ - rt_interrupt_enter(); - - rt_hw_stm32_eth_isr(); - - /* leave interrupt */ - rt_interrupt_leave(); -} -#else -#if (STM32_ETH_IF == 0) -/******************************************************************************* -* Function Name : EXTI0_IRQHandler -* Description : This function handles External interrupt Line 0 request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EXTI2_IRQHandler(void) -{ - extern void enc28j60_isr(void); - - /* enter interrupt */ - rt_interrupt_enter(); - - enc28j60_isr(); - - /* Clear the Key Button EXTI line pending bit */ - EXTI_ClearITPendingBit(EXTI_Line2); - - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#if (STM32_ETH_IF == 1) +#ifdef RT_USING_LWIP /******************************************************************************* * Function Name : EXTI4_IRQHandler * Description : This function handles External lines 9 to 5 interrupt request. @@ -299,22 +228,20 @@ void EXTI2_IRQHandler(void) *******************************************************************************/ void EXTI4_IRQHandler(void) { - extern void rt_dm9000_isr(void); + extern void rt_dm9000_isr(void); - /* enter interrupt */ - rt_interrupt_enter(); + /* enter interrupt */ + rt_interrupt_enter(); - /* Clear the DM9000A EXTI line pending bit */ - EXTI_ClearITPendingBit(EXTI_Line4); + /* Clear the DM9000A EXTI line pending bit */ + EXTI_ClearITPendingBit(EXTI_Line4); - rt_dm9000_isr(); + rt_dm9000_isr(); - /* leave interrupt */ - rt_interrupt_leave(); + /* leave interrupt */ + rt_interrupt_leave(); } -#endif -#endif -#endif /* end of RT_USING_LWIP */ +#endif /* RT_USING_LWIP */ /** * @} From 5183697fd43052bf2fa7bf94d2ec19a1a8185a2a Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 22:50:50 +0800 Subject: [PATCH 05/11] update linker script for components auto initial. --- bsp/stm32f10x/stm32f10x_flash.icf | 1 + 1 file changed, 1 insertion(+) diff --git a/bsp/stm32f10x/stm32f10x_flash.icf b/bsp/stm32f10x/stm32f10x_flash.icf index f98793b6ef..0380cc7620 100644 --- a/bsp/stm32f10x/stm32f10x_flash.icf +++ b/bsp/stm32f10x/stm32f10x_flash.icf @@ -26,6 +26,7 @@ do not initialize { section .noinit }; keep { section FSymTab }; keep { section VSymTab }; +keep { section .rti_fn* }; place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; From 020d05ca92266b8d4f8e7f9db2cc3be2f8b394f8 Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 22:52:23 +0800 Subject: [PATCH 06/11] update SD card driver for auto initial. --- bsp/stm32f10x/drivers/sdcard.c | 4619 ++++++++++++++++---------------- 1 file changed, 2310 insertions(+), 2309 deletions(-) diff --git a/bsp/stm32f10x/drivers/sdcard.c b/bsp/stm32f10x/drivers/sdcard.c index 630e0fe4dd..5d64bddfce 100644 --- a/bsp/stm32f10x/drivers/sdcard.c +++ b/bsp/stm32f10x/drivers/sdcard.c @@ -142,46 +142,46 @@ static void DMA_RxConfiguration(uint32_t *BufferDST, uint32_t BufferSize); */ SD_Error SD_Init(void) { - SD_Error errorstatus = SD_OK; + SD_Error errorstatus = SD_OK; - /* Configure SDIO interface GPIO */ - GPIO_Configuration(); + /* Configure SDIO interface GPIO */ + GPIO_Configuration(); - /* Enable the SDIO AHB Clock */ - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_SDIO, ENABLE); + /* Enable the SDIO AHB Clock */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_SDIO, ENABLE); - /* Enable the DMA2 Clock */ - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE); + /* Enable the DMA2 Clock */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE); - SDIO_DeInit(); + SDIO_DeInit(); - errorstatus = SD_PowerON(); + errorstatus = SD_PowerON(); + + if (errorstatus != SD_OK) + { + /* CMD Response TimeOut (wait for CMDSENT flag) */ + return(errorstatus); + } + + errorstatus = SD_InitializeCards(); + + if (errorstatus != SD_OK) + { + /* CMD Response TimeOut (wait for CMDSENT flag) */ + return(errorstatus); + } + + /* Configure the SDIO peripheral */ + /* HCLK = 72 MHz, SDIOCLK = 72 MHz, SDIO_CK = HCLK/(2 + 1) = 24 MHz */ + SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; + SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; + SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; + SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; + SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; + SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Enable; + SDIO_Init(&SDIO_InitStructure); - if (errorstatus != SD_OK) - { - /* CMD Response TimeOut (wait for CMDSENT flag) */ return(errorstatus); - } - - errorstatus = SD_InitializeCards(); - - if (errorstatus != SD_OK) - { - /* CMD Response TimeOut (wait for CMDSENT flag) */ - return(errorstatus); - } - - /* Configure the SDIO peripheral */ - /* HCLK = 72 MHz, SDIOCLK = 72 MHz, SDIO_CK = HCLK/(2 + 1) = 24 MHz */ - SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; - SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; - SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; - SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; - SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; - SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Enable; - SDIO_Init(&SDIO_InitStructure); - - return(errorstatus); } /** @@ -192,69 +192,78 @@ SD_Error SD_Init(void) */ SD_Error SD_PowerON(void) { - SD_Error errorstatus = SD_OK; - uint32_t response = 0, count = 0, i = 0; - bool validvoltage = false; - uint32_t SDType = SD_STD_CAPACITY; + SD_Error errorstatus = SD_OK; + uint32_t response = 0, count = 0, i = 0; + bool validvoltage = false; + uint32_t SDType = SD_STD_CAPACITY; - /* Power ON Sequence -------------------------------------------------------*/ - /* Configure the SDIO peripheral */ - SDIO_InitStructure.SDIO_ClockDiv = SDIO_INIT_CLK_DIV; /* HCLK = 72MHz, SDIOCLK = 72MHz, SDIO_CK = HCLK/(178 + 2) = 400 KHz */ - SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; - SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; - SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; - SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; - SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; - SDIO_Init(&SDIO_InitStructure); + /* Power ON Sequence -------------------------------------------------------*/ + /* Configure the SDIO peripheral */ + SDIO_InitStructure.SDIO_ClockDiv = SDIO_INIT_CLK_DIV; /* HCLK = 72MHz, SDIOCLK = 72MHz, SDIO_CK = HCLK/(178 + 2) = 400 KHz */ + SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; + SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; + SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; + SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; + SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; + SDIO_Init(&SDIO_InitStructure); - /* Set Power State to ON */ - SDIO_SetPowerState(SDIO_PowerState_ON); + /* Set Power State to ON */ + SDIO_SetPowerState(SDIO_PowerState_ON); - /* Enable SDIO Clock */ - SDIO_ClockCmd(ENABLE); + /* Enable SDIO Clock */ + SDIO_ClockCmd(ENABLE); - /* CMD0: GO_IDLE_STATE -------------------------------------------------------*/ - /* No CMD response required */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_GO_IDLE_STATE; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_No; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + /* CMD0: GO_IDLE_STATE -------------------------------------------------------*/ + /* No CMD response required */ + SDIO_CmdInitStructure.SDIO_Argument = 0x0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_GO_IDLE_STATE; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_No; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - for(i = 0;i < 74; i++) - { + for(i = 0; i < 74; i++) + { + SDIO_SendCommand(&SDIO_CmdInitStructure); + errorstatus = CmdError(); + } + + if (errorstatus != SD_OK) + { + /* CMD Response TimeOut (wait for CMDSENT flag) */ + return(errorstatus); + } + + /* CMD8: SEND_IF_COND --------------------------------------------------------*/ + /* Send CMD8 to verify SD card interface operating condition */ + /* Argument: - [31:12]: Reserved (shall be set to '0') + - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V) + - [7:0]: Check Pattern (recommended 0xAA) */ + /* CMD Response: R7 */ + SDIO_CmdInitStructure.SDIO_Argument = SD_CHECK_PATTERN; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_IF_COND; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdError(); - } - if (errorstatus != SD_OK) - { - /* CMD Response TimeOut (wait for CMDSENT flag) */ - return(errorstatus); - } + errorstatus = CmdResp7Error(); - /* CMD8: SEND_IF_COND --------------------------------------------------------*/ - /* Send CMD8 to verify SD card interface operating condition */ - /* Argument: - [31:12]: Reserved (shall be set to '0') - - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V) - - [7:0]: Check Pattern (recommended 0xAA) */ - /* CMD Response: R7 */ - SDIO_CmdInitStructure.SDIO_Argument = SD_CHECK_PATTERN; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_IF_COND; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp7Error(); - - if (errorstatus == SD_OK) - { - CardType = SDIO_STD_CAPACITY_SD_CARD_V2_0; /* SD Card 2.0 */ - SDType = SD_HIGH_CAPACITY; - } - else - { + if (errorstatus == SD_OK) + { + CardType = SDIO_STD_CAPACITY_SD_CARD_V2_0; /* SD Card 2.0 */ + SDType = SD_HIGH_CAPACITY; + } + else + { + /* CMD55 */ + SDIO_CmdInitStructure.SDIO_Argument = 0x00; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + errorstatus = CmdResp1Error(SDIO_APP_CMD); + } /* CMD55 */ SDIO_CmdInitStructure.SDIO_Argument = 0x00; SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; @@ -263,101 +272,92 @@ SD_Error SD_PowerON(void) SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; SDIO_SendCommand(&SDIO_CmdInitStructure); errorstatus = CmdResp1Error(SDIO_APP_CMD); - } - /* CMD55 */ - SDIO_CmdInitStructure.SDIO_Argument = 0x00; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_APP_CMD); - /* If errorstatus is Command TimeOut, it is a MMC card */ - /* If errorstatus is SD_OK it is a SD card: SD card 2.0 (voltage range mismatch) - or SD card 1.x */ - if (errorstatus == SD_OK) - { - /* SD CARD */ - /* Send ACMD41 SD_APP_OP_COND with Argument 0x80100000 */ - while ((!validvoltage) && (count < SD_MAX_VOLT_TRIAL)) + /* If errorstatus is Command TimeOut, it is a MMC card */ + /* If errorstatus is SD_OK it is a SD card: SD card 2.0 (voltage range mismatch) + or SD card 1.x */ + if (errorstatus == SD_OK) { + /* SD CARD */ + /* Send ACMD41 SD_APP_OP_COND with Argument 0x80100000 */ + while ((!validvoltage) && (count < SD_MAX_VOLT_TRIAL)) + { - /* SEND CMD55 APP_CMD with RCA as 0 */ - SDIO_CmdInitStructure.SDIO_Argument = 0x00; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); + /* SEND CMD55 APP_CMD with RCA as 0 */ + SDIO_CmdInitStructure.SDIO_Argument = 0x00; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_APP_CMD); + errorstatus = CmdResp1Error(SDIO_APP_CMD); - if (errorstatus != SD_OK) - { - return(errorstatus); - } - SDIO_CmdInitStructure.SDIO_Argument = SD_VOLTAGE_WINDOW_SD | SDType; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_APP_OP_COND; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); + if (errorstatus != SD_OK) + { + return(errorstatus); + } + SDIO_CmdInitStructure.SDIO_Argument = SD_VOLTAGE_WINDOW_SD | SDType; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_APP_OP_COND; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp3Error(); - if (errorstatus != SD_OK) - { - return(errorstatus); - } + errorstatus = CmdResp3Error(); + if (errorstatus != SD_OK) + { + return(errorstatus); + } - response = SDIO_GetResponse(SDIO_RESP1); - validvoltage = (bool) (((response >> 31) == 1) ? 1 : 0); - count++; - } - if (count >= SD_MAX_VOLT_TRIAL) + response = SDIO_GetResponse(SDIO_RESP1); + validvoltage = (bool) (((response >> 31) == 1) ? 1 : 0); + count++; + } + if (count >= SD_MAX_VOLT_TRIAL) + { + errorstatus = SD_INVALID_VOLTRANGE; + return(errorstatus); + } + + if (response &= SD_HIGH_CAPACITY) + { + CardType = SDIO_HIGH_CAPACITY_SD_CARD; + } + }/* else MMC Card */ + else { - errorstatus = SD_INVALID_VOLTRANGE; - return(errorstatus); + CardType = SDIO_MULTIMEDIA_CARD; + + /* Send CMD1 SEND_OP_COND with Argument 0x80FF8000 */ + while ((!validvoltage) && (count < SD_MAX_VOLT_TRIAL)) + { + /* SEND CMD55 APP_CMD with RCA as 0 */ + SDIO_CmdInitStructure.SDIO_Argument = SD_VOLTAGE_WINDOW_MMC; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_OP_COND; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp3Error(); + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + response = SDIO_GetResponse(SDIO_RESP1); + validvoltage = (bool) (((response >> 31) == 1) ? 1 : 0); + count++; + } + if (count >= SD_MAX_VOLT_TRIAL) + { + errorstatus = SD_INVALID_VOLTRANGE; + return(errorstatus); + } } - if (response &= SD_HIGH_CAPACITY) - { - CardType = SDIO_HIGH_CAPACITY_SD_CARD; - } - }/* else MMC Card */ - else - { - CardType = SDIO_MULTIMEDIA_CARD; - - /* Send CMD1 SEND_OP_COND with Argument 0x80FF8000 */ - while ((!validvoltage) && (count < SD_MAX_VOLT_TRIAL)) - { - /* SEND CMD55 APP_CMD with RCA as 0 */ - SDIO_CmdInitStructure.SDIO_Argument = SD_VOLTAGE_WINDOW_MMC; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_OP_COND; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp3Error(); - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - response = SDIO_GetResponse(SDIO_RESP1); - validvoltage = (bool) (((response >> 31) == 1) ? 1 : 0); - count++; - } - if (count >= SD_MAX_VOLT_TRIAL) - { - errorstatus = SD_INVALID_VOLTRANGE; - return(errorstatus); - } - } - - return(SD_OK); + return(SD_OK); } /** @@ -367,12 +367,12 @@ SD_Error SD_PowerON(void) */ SD_Error SD_PowerOFF(void) { - SD_Error errorstatus = SD_OK; + SD_Error errorstatus = SD_OK; - /* Set Power State to OFF */ - SDIO_SetPowerState(SDIO_PowerState_OFF); + /* Set Power State to OFF */ + SDIO_SetPowerState(SDIO_PowerState_OFF); - return(errorstatus); + return(errorstatus); } /** @@ -383,56 +383,56 @@ SD_Error SD_PowerOFF(void) */ SD_Error SD_InitializeCards(void) { - SD_Error errorstatus = SD_OK; - uint16_t rca = 0x01; + SD_Error errorstatus = SD_OK; + uint16_t rca = 0x01; - if (SDIO_GetPowerState() == SDIO_PowerState_OFF) - { - errorstatus = SD_REQUEST_NOT_APPLICABLE; - return(errorstatus); - } - - if (SDIO_SECURE_DIGITAL_IO_CARD != CardType) - { - /* Send CMD2 ALL_SEND_CID */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_ALL_SEND_CID; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Long; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp2Error(); - - if (SD_OK != errorstatus) + if (SDIO_GetPowerState() == SDIO_PowerState_OFF) { - return(errorstatus); + errorstatus = SD_REQUEST_NOT_APPLICABLE; + return(errorstatus); } - CID_Tab[0] = SDIO_GetResponse(SDIO_RESP1); - CID_Tab[1] = SDIO_GetResponse(SDIO_RESP2); - CID_Tab[2] = SDIO_GetResponse(SDIO_RESP3); - CID_Tab[3] = SDIO_GetResponse(SDIO_RESP4); - } - if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_SECURE_DIGITAL_IO_COMBO_CARD == CardType) - || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) - { - /* Send CMD3 SET_REL_ADDR with argument 0 */ - /* SD Card publishes its RCA. */ - SDIO_CmdInitStructure.SDIO_Argument = 0x00; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_REL_ADDR; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp6Error(SDIO_SET_REL_ADDR, &rca); - - if (SD_OK != errorstatus) + if (SDIO_SECURE_DIGITAL_IO_CARD != CardType) { - return(errorstatus); + /* Send CMD2 ALL_SEND_CID */ + SDIO_CmdInitStructure.SDIO_Argument = 0x0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_ALL_SEND_CID; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Long; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp2Error(); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + + CID_Tab[0] = SDIO_GetResponse(SDIO_RESP1); + CID_Tab[1] = SDIO_GetResponse(SDIO_RESP2); + CID_Tab[2] = SDIO_GetResponse(SDIO_RESP3); + CID_Tab[3] = SDIO_GetResponse(SDIO_RESP4); + } + if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_SECURE_DIGITAL_IO_COMBO_CARD == CardType) + || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) + { + /* Send CMD3 SET_REL_ADDR with argument 0 */ + /* SD Card publishes its RCA. */ + SDIO_CmdInitStructure.SDIO_Argument = 0x00; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_REL_ADDR; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp6Error(SDIO_SET_REL_ADDR, &rca); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } } - } if (SDIO_MULTIMEDIA_CARD == CardType) { /* Send CMD3 SET_REL_ADDR with argument 0 */ @@ -452,34 +452,34 @@ SD_Error SD_InitializeCards(void) } } - if (SDIO_SECURE_DIGITAL_IO_CARD != CardType) - { - RCA = rca; - - /* Send CMD9 SEND_CSD with argument as card's RCA */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)(rca << 16); - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_CSD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Long; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp2Error(); - - if (SD_OK != errorstatus) + if (SDIO_SECURE_DIGITAL_IO_CARD != CardType) { - return(errorstatus); + RCA = rca; + + /* Send CMD9 SEND_CSD with argument as card's RCA */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)(rca << 16); + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_CSD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Long; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp2Error(); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + + CSD_Tab[0] = SDIO_GetResponse(SDIO_RESP1); + CSD_Tab[1] = SDIO_GetResponse(SDIO_RESP2); + CSD_Tab[2] = SDIO_GetResponse(SDIO_RESP3); + CSD_Tab[3] = SDIO_GetResponse(SDIO_RESP4); } - CSD_Tab[0] = SDIO_GetResponse(SDIO_RESP1); - CSD_Tab[1] = SDIO_GetResponse(SDIO_RESP2); - CSD_Tab[2] = SDIO_GetResponse(SDIO_RESP3); - CSD_Tab[3] = SDIO_GetResponse(SDIO_RESP4); - } + errorstatus = SD_OK; /* All cards get intialized */ - errorstatus = SD_OK; /* All cards get intialized */ - - return(errorstatus); + return(errorstatus); } /** @@ -490,204 +490,204 @@ SD_Error SD_InitializeCards(void) */ SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo) { - SD_Error errorstatus = SD_OK; - uint8_t tmp = 0; + SD_Error errorstatus = SD_OK; + uint8_t tmp = 0; - cardinfo->CardType = (uint8_t)CardType; - cardinfo->RCA = (uint16_t)RCA; + cardinfo->CardType = (uint8_t)CardType; + cardinfo->RCA = (uint16_t)RCA; - /* Byte 0 */ - tmp = (uint8_t)((CSD_Tab[0] & 0xFF000000) >> 24); - cardinfo->SD_csd.CSDStruct = (tmp & 0xC0) >> 6; - cardinfo->SD_csd.SysSpecVersion = (tmp & 0x3C) >> 2; - cardinfo->SD_csd.Reserved1 = tmp & 0x03; + /* Byte 0 */ + tmp = (uint8_t)((CSD_Tab[0] & 0xFF000000) >> 24); + cardinfo->SD_csd.CSDStruct = (tmp & 0xC0) >> 6; + cardinfo->SD_csd.SysSpecVersion = (tmp & 0x3C) >> 2; + cardinfo->SD_csd.Reserved1 = tmp & 0x03; - /* Byte 1 */ - tmp = (uint8_t)((CSD_Tab[0] & 0x00FF0000) >> 16); - cardinfo->SD_csd.TAAC = tmp; + /* Byte 1 */ + tmp = (uint8_t)((CSD_Tab[0] & 0x00FF0000) >> 16); + cardinfo->SD_csd.TAAC = tmp; - /* Byte 2 */ - tmp = (uint8_t)((CSD_Tab[0] & 0x0000FF00) >> 8); - cardinfo->SD_csd.NSAC = tmp; + /* Byte 2 */ + tmp = (uint8_t)((CSD_Tab[0] & 0x0000FF00) >> 8); + cardinfo->SD_csd.NSAC = tmp; - /* Byte 3 */ - tmp = (uint8_t)(CSD_Tab[0] & 0x000000FF); - cardinfo->SD_csd.MaxBusClkFrec = tmp; + /* Byte 3 */ + tmp = (uint8_t)(CSD_Tab[0] & 0x000000FF); + cardinfo->SD_csd.MaxBusClkFrec = tmp; - /* Byte 4 */ - tmp = (uint8_t)((CSD_Tab[1] & 0xFF000000) >> 24); - cardinfo->SD_csd.CardComdClasses = tmp << 4; + /* Byte 4 */ + tmp = (uint8_t)((CSD_Tab[1] & 0xFF000000) >> 24); + cardinfo->SD_csd.CardComdClasses = tmp << 4; - /* Byte 5 */ - tmp = (uint8_t)((CSD_Tab[1] & 0x00FF0000) >> 16); - cardinfo->SD_csd.CardComdClasses |= (tmp & 0xF0) >> 4; - cardinfo->SD_csd.RdBlockLen = tmp & 0x0F; + /* Byte 5 */ + tmp = (uint8_t)((CSD_Tab[1] & 0x00FF0000) >> 16); + cardinfo->SD_csd.CardComdClasses |= (tmp & 0xF0) >> 4; + cardinfo->SD_csd.RdBlockLen = tmp & 0x0F; - /* Byte 6 */ - tmp = (uint8_t)((CSD_Tab[1] & 0x0000FF00) >> 8); - cardinfo->SD_csd.PartBlockRead = (tmp & 0x80) >> 7; - cardinfo->SD_csd.WrBlockMisalign = (tmp & 0x40) >> 6; - cardinfo->SD_csd.RdBlockMisalign = (tmp & 0x20) >> 5; - cardinfo->SD_csd.DSRImpl = (tmp & 0x10) >> 4; - cardinfo->SD_csd.Reserved2 = 0; /* Reserved */ + /* Byte 6 */ + tmp = (uint8_t)((CSD_Tab[1] & 0x0000FF00) >> 8); + cardinfo->SD_csd.PartBlockRead = (tmp & 0x80) >> 7; + cardinfo->SD_csd.WrBlockMisalign = (tmp & 0x40) >> 6; + cardinfo->SD_csd.RdBlockMisalign = (tmp & 0x20) >> 5; + cardinfo->SD_csd.DSRImpl = (tmp & 0x10) >> 4; + cardinfo->SD_csd.Reserved2 = 0; /* Reserved */ - if ((CardType == SDIO_STD_CAPACITY_SD_CARD_V1_1) || (CardType == SDIO_STD_CAPACITY_SD_CARD_V2_0)) - { - cardinfo->SD_csd.DeviceSize = (tmp & 0x03) << 10; + if ((CardType == SDIO_STD_CAPACITY_SD_CARD_V1_1) || (CardType == SDIO_STD_CAPACITY_SD_CARD_V2_0)) + { + cardinfo->SD_csd.DeviceSize = (tmp & 0x03) << 10; + + /* Byte 7 */ + tmp = (uint8_t)(CSD_Tab[1] & 0x000000FF); + cardinfo->SD_csd.DeviceSize |= (tmp) << 2; + + /* Byte 8 */ + tmp = (uint8_t)((CSD_Tab[2] & 0xFF000000) >> 24); + cardinfo->SD_csd.DeviceSize |= (tmp & 0xC0) >> 6; + + cardinfo->SD_csd.MaxRdCurrentVDDMin = (tmp & 0x38) >> 3; + cardinfo->SD_csd.MaxRdCurrentVDDMax = (tmp & 0x07); + + /* Byte 9 */ + tmp = (uint8_t)((CSD_Tab[2] & 0x00FF0000) >> 16); + cardinfo->SD_csd.MaxWrCurrentVDDMin = (tmp & 0xE0) >> 5; + cardinfo->SD_csd.MaxWrCurrentVDDMax = (tmp & 0x1C) >> 2; + cardinfo->SD_csd.DeviceSizeMul = (tmp & 0x03) << 1; + /* Byte 10 */ + tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8); + cardinfo->SD_csd.DeviceSizeMul |= (tmp & 0x80) >> 7; + + cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) ; + cardinfo->CardCapacity *= (1 << (cardinfo->SD_csd.DeviceSizeMul + 2)); + cardinfo->CardBlockSize = 1 << (cardinfo->SD_csd.RdBlockLen); + cardinfo->CardCapacity *= cardinfo->CardBlockSize; + } + else if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + /* Byte 7 */ + tmp = (uint8_t)(CSD_Tab[1] & 0x000000FF); + cardinfo->SD_csd.DeviceSize = (tmp & 0x3F) << 16; + + /* Byte 8 */ + tmp = (uint8_t)((CSD_Tab[2] & 0xFF000000) >> 24); + + cardinfo->SD_csd.DeviceSize |= (tmp << 8); + + /* Byte 9 */ + tmp = (uint8_t)((CSD_Tab[2] & 0x00FF0000) >> 16); + + cardinfo->SD_csd.DeviceSize |= (tmp); + + /* Byte 10 */ + tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8); + + cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) * 512 * 1024; + cardinfo->CardBlockSize = 512; + } + + + cardinfo->SD_csd.EraseGrSize = (tmp & 0x40) >> 6; + cardinfo->SD_csd.EraseGrMul = (tmp & 0x3F) << 1; + + /* Byte 11 */ + tmp = (uint8_t)(CSD_Tab[2] & 0x000000FF); + cardinfo->SD_csd.EraseGrMul |= (tmp & 0x80) >> 7; + cardinfo->SD_csd.WrProtectGrSize = (tmp & 0x7F); + + /* Byte 12 */ + tmp = (uint8_t)((CSD_Tab[3] & 0xFF000000) >> 24); + cardinfo->SD_csd.WrProtectGrEnable = (tmp & 0x80) >> 7; + cardinfo->SD_csd.ManDeflECC = (tmp & 0x60) >> 5; + cardinfo->SD_csd.WrSpeedFact = (tmp & 0x1C) >> 2; + cardinfo->SD_csd.MaxWrBlockLen = (tmp & 0x03) << 2; + + /* Byte 13 */ + tmp = (uint8_t)((CSD_Tab[3] & 0x00FF0000) >> 16); + cardinfo->SD_csd.MaxWrBlockLen |= (tmp & 0xC0) >> 6; + cardinfo->SD_csd.WriteBlockPaPartial = (tmp & 0x20) >> 5; + cardinfo->SD_csd.Reserved3 = 0; + cardinfo->SD_csd.ContentProtectAppli = (tmp & 0x01); + + /* Byte 14 */ + tmp = (uint8_t)((CSD_Tab[3] & 0x0000FF00) >> 8); + cardinfo->SD_csd.FileFormatGrouop = (tmp & 0x80) >> 7; + cardinfo->SD_csd.CopyFlag = (tmp & 0x40) >> 6; + cardinfo->SD_csd.PermWrProtect = (tmp & 0x20) >> 5; + cardinfo->SD_csd.TempWrProtect = (tmp & 0x10) >> 4; + cardinfo->SD_csd.FileFormat = (tmp & 0x0C) >> 2; + cardinfo->SD_csd.ECC = (tmp & 0x03); + + /* Byte 15 */ + tmp = (uint8_t)(CSD_Tab[3] & 0x000000FF); + cardinfo->SD_csd.CSD_CRC = (tmp & 0xFE) >> 1; + cardinfo->SD_csd.Reserved4 = 1; + + + /* Byte 0 */ + tmp = (uint8_t)((CID_Tab[0] & 0xFF000000) >> 24); + cardinfo->SD_cid.ManufacturerID = tmp; + + /* Byte 1 */ + tmp = (uint8_t)((CID_Tab[0] & 0x00FF0000) >> 16); + cardinfo->SD_cid.OEM_AppliID = tmp << 8; + + /* Byte 2 */ + tmp = (uint8_t)((CID_Tab[0] & 0x000000FF00) >> 8); + cardinfo->SD_cid.OEM_AppliID |= tmp; + + /* Byte 3 */ + tmp = (uint8_t)(CID_Tab[0] & 0x000000FF); + cardinfo->SD_cid.ProdName1 = tmp << 24; + + /* Byte 4 */ + tmp = (uint8_t)((CID_Tab[1] & 0xFF000000) >> 24); + cardinfo->SD_cid.ProdName1 |= tmp << 16; + + /* Byte 5 */ + tmp = (uint8_t)((CID_Tab[1] & 0x00FF0000) >> 16); + cardinfo->SD_cid.ProdName1 |= tmp << 8; + + /* Byte 6 */ + tmp = (uint8_t)((CID_Tab[1] & 0x0000FF00) >> 8); + cardinfo->SD_cid.ProdName1 |= tmp; /* Byte 7 */ - tmp = (uint8_t)(CSD_Tab[1] & 0x000000FF); - cardinfo->SD_csd.DeviceSize |= (tmp) << 2; + tmp = (uint8_t)(CID_Tab[1] & 0x000000FF); + cardinfo->SD_cid.ProdName2 = tmp; /* Byte 8 */ - tmp = (uint8_t)((CSD_Tab[2] & 0xFF000000) >> 24); - cardinfo->SD_csd.DeviceSize |= (tmp & 0xC0) >> 6; - - cardinfo->SD_csd.MaxRdCurrentVDDMin = (tmp & 0x38) >> 3; - cardinfo->SD_csd.MaxRdCurrentVDDMax = (tmp & 0x07); + tmp = (uint8_t)((CID_Tab[2] & 0xFF000000) >> 24); + cardinfo->SD_cid.ProdRev = tmp; /* Byte 9 */ - tmp = (uint8_t)((CSD_Tab[2] & 0x00FF0000) >> 16); - cardinfo->SD_csd.MaxWrCurrentVDDMin = (tmp & 0xE0) >> 5; - cardinfo->SD_csd.MaxWrCurrentVDDMax = (tmp & 0x1C) >> 2; - cardinfo->SD_csd.DeviceSizeMul = (tmp & 0x03) << 1; - /* Byte 10 */ - tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8); - cardinfo->SD_csd.DeviceSizeMul |= (tmp & 0x80) >> 7; - - cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) ; - cardinfo->CardCapacity *= (1 << (cardinfo->SD_csd.DeviceSizeMul + 2)); - cardinfo->CardBlockSize = 1 << (cardinfo->SD_csd.RdBlockLen); - cardinfo->CardCapacity *= cardinfo->CardBlockSize; - } - else if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - /* Byte 7 */ - tmp = (uint8_t)(CSD_Tab[1] & 0x000000FF); - cardinfo->SD_csd.DeviceSize = (tmp & 0x3F) << 16; - - /* Byte 8 */ - tmp = (uint8_t)((CSD_Tab[2] & 0xFF000000) >> 24); - - cardinfo->SD_csd.DeviceSize |= (tmp << 8); - - /* Byte 9 */ - tmp = (uint8_t)((CSD_Tab[2] & 0x00FF0000) >> 16); - - cardinfo->SD_csd.DeviceSize |= (tmp); + tmp = (uint8_t)((CID_Tab[2] & 0x00FF0000) >> 16); + cardinfo->SD_cid.ProdSN = tmp << 24; /* Byte 10 */ - tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8); + tmp = (uint8_t)((CID_Tab[2] & 0x0000FF00) >> 8); + cardinfo->SD_cid.ProdSN |= tmp << 16; - cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) * 512 * 1024; - cardinfo->CardBlockSize = 512; - } + /* Byte 11 */ + tmp = (uint8_t)(CID_Tab[2] & 0x000000FF); + cardinfo->SD_cid.ProdSN |= tmp << 8; + /* Byte 12 */ + tmp = (uint8_t)((CID_Tab[3] & 0xFF000000) >> 24); + cardinfo->SD_cid.ProdSN |= tmp; - cardinfo->SD_csd.EraseGrSize = (tmp & 0x40) >> 6; - cardinfo->SD_csd.EraseGrMul = (tmp & 0x3F) << 1; + /* Byte 13 */ + tmp = (uint8_t)((CID_Tab[3] & 0x00FF0000) >> 16); + cardinfo->SD_cid.Reserved1 |= (tmp & 0xF0) >> 4; + cardinfo->SD_cid.ManufactDate = (tmp & 0x0F) << 8; - /* Byte 11 */ - tmp = (uint8_t)(CSD_Tab[2] & 0x000000FF); - cardinfo->SD_csd.EraseGrMul |= (tmp & 0x80) >> 7; - cardinfo->SD_csd.WrProtectGrSize = (tmp & 0x7F); + /* Byte 14 */ + tmp = (uint8_t)((CID_Tab[3] & 0x0000FF00) >> 8); + cardinfo->SD_cid.ManufactDate |= tmp; - /* Byte 12 */ - tmp = (uint8_t)((CSD_Tab[3] & 0xFF000000) >> 24); - cardinfo->SD_csd.WrProtectGrEnable = (tmp & 0x80) >> 7; - cardinfo->SD_csd.ManDeflECC = (tmp & 0x60) >> 5; - cardinfo->SD_csd.WrSpeedFact = (tmp & 0x1C) >> 2; - cardinfo->SD_csd.MaxWrBlockLen = (tmp & 0x03) << 2; + /* Byte 15 */ + tmp = (uint8_t)(CID_Tab[3] & 0x000000FF); + cardinfo->SD_cid.CID_CRC = (tmp & 0xFE) >> 1; + cardinfo->SD_cid.Reserved2 = 1; - /* Byte 13 */ - tmp = (uint8_t)((CSD_Tab[3] & 0x00FF0000) >> 16); - cardinfo->SD_csd.MaxWrBlockLen |= (tmp & 0xC0) >> 6; - cardinfo->SD_csd.WriteBlockPaPartial = (tmp & 0x20) >> 5; - cardinfo->SD_csd.Reserved3 = 0; - cardinfo->SD_csd.ContentProtectAppli = (tmp & 0x01); - - /* Byte 14 */ - tmp = (uint8_t)((CSD_Tab[3] & 0x0000FF00) >> 8); - cardinfo->SD_csd.FileFormatGrouop = (tmp & 0x80) >> 7; - cardinfo->SD_csd.CopyFlag = (tmp & 0x40) >> 6; - cardinfo->SD_csd.PermWrProtect = (tmp & 0x20) >> 5; - cardinfo->SD_csd.TempWrProtect = (tmp & 0x10) >> 4; - cardinfo->SD_csd.FileFormat = (tmp & 0x0C) >> 2; - cardinfo->SD_csd.ECC = (tmp & 0x03); - - /* Byte 15 */ - tmp = (uint8_t)(CSD_Tab[3] & 0x000000FF); - cardinfo->SD_csd.CSD_CRC = (tmp & 0xFE) >> 1; - cardinfo->SD_csd.Reserved4 = 1; - - - /* Byte 0 */ - tmp = (uint8_t)((CID_Tab[0] & 0xFF000000) >> 24); - cardinfo->SD_cid.ManufacturerID = tmp; - - /* Byte 1 */ - tmp = (uint8_t)((CID_Tab[0] & 0x00FF0000) >> 16); - cardinfo->SD_cid.OEM_AppliID = tmp << 8; - - /* Byte 2 */ - tmp = (uint8_t)((CID_Tab[0] & 0x000000FF00) >> 8); - cardinfo->SD_cid.OEM_AppliID |= tmp; - - /* Byte 3 */ - tmp = (uint8_t)(CID_Tab[0] & 0x000000FF); - cardinfo->SD_cid.ProdName1 = tmp << 24; - - /* Byte 4 */ - tmp = (uint8_t)((CID_Tab[1] & 0xFF000000) >> 24); - cardinfo->SD_cid.ProdName1 |= tmp << 16; - - /* Byte 5 */ - tmp = (uint8_t)((CID_Tab[1] & 0x00FF0000) >> 16); - cardinfo->SD_cid.ProdName1 |= tmp << 8; - - /* Byte 6 */ - tmp = (uint8_t)((CID_Tab[1] & 0x0000FF00) >> 8); - cardinfo->SD_cid.ProdName1 |= tmp; - - /* Byte 7 */ - tmp = (uint8_t)(CID_Tab[1] & 0x000000FF); - cardinfo->SD_cid.ProdName2 = tmp; - - /* Byte 8 */ - tmp = (uint8_t)((CID_Tab[2] & 0xFF000000) >> 24); - cardinfo->SD_cid.ProdRev = tmp; - - /* Byte 9 */ - tmp = (uint8_t)((CID_Tab[2] & 0x00FF0000) >> 16); - cardinfo->SD_cid.ProdSN = tmp << 24; - - /* Byte 10 */ - tmp = (uint8_t)((CID_Tab[2] & 0x0000FF00) >> 8); - cardinfo->SD_cid.ProdSN |= tmp << 16; - - /* Byte 11 */ - tmp = (uint8_t)(CID_Tab[2] & 0x000000FF); - cardinfo->SD_cid.ProdSN |= tmp << 8; - - /* Byte 12 */ - tmp = (uint8_t)((CID_Tab[3] & 0xFF000000) >> 24); - cardinfo->SD_cid.ProdSN |= tmp; - - /* Byte 13 */ - tmp = (uint8_t)((CID_Tab[3] & 0x00FF0000) >> 16); - cardinfo->SD_cid.Reserved1 |= (tmp & 0xF0) >> 4; - cardinfo->SD_cid.ManufactDate = (tmp & 0x0F) << 8; - - /* Byte 14 */ - tmp = (uint8_t)((CID_Tab[3] & 0x0000FF00) >> 8); - cardinfo->SD_cid.ManufactDate |= tmp; - - /* Byte 15 */ - tmp = (uint8_t)(CID_Tab[3] & 0x000000FF); - cardinfo->SD_cid.CID_CRC = (tmp & 0xFE) >> 1; - cardinfo->SD_cid.Reserved2 = 1; - - return(errorstatus); + return(errorstatus); } /** @@ -702,56 +702,56 @@ SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo) */ SD_Error SD_EnableWideBusOperation(uint32_t WideMode) { - SD_Error errorstatus = SD_OK; + SD_Error errorstatus = SD_OK; + + /* MMC Card doesn't support this feature */ + if (SDIO_MULTIMEDIA_CARD == CardType) + { + errorstatus = SD_UNSUPPORTED_FEATURE; + return(errorstatus); + } + else if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) + { + if (SDIO_BusWide_8b == WideMode) + { + errorstatus = SD_UNSUPPORTED_FEATURE; + return(errorstatus); + } + else if (SDIO_BusWide_4b == WideMode) + { + errorstatus = SDEnWideBus(ENABLE); + + if (SD_OK == errorstatus) + { + /* Configure the SDIO peripheral */ + SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; + SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; + SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; + SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; + SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_4b; + SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; + SDIO_Init(&SDIO_InitStructure); + } + } + else + { + errorstatus = SDEnWideBus(DISABLE); + + if (SD_OK == errorstatus) + { + /* Configure the SDIO peripheral */ + SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; + SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; + SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; + SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; + SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; + SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; + SDIO_Init(&SDIO_InitStructure); + } + } + } - /* MMC Card doesn't support this feature */ - if (SDIO_MULTIMEDIA_CARD == CardType) - { - errorstatus = SD_UNSUPPORTED_FEATURE; return(errorstatus); - } - else if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) - { - if (SDIO_BusWide_8b == WideMode) - { - errorstatus = SD_UNSUPPORTED_FEATURE; - return(errorstatus); - } - else if (SDIO_BusWide_4b == WideMode) - { - errorstatus = SDEnWideBus(ENABLE); - - if (SD_OK == errorstatus) - { - /* Configure the SDIO peripheral */ - SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; - SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; - SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; - SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; - SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_4b; - SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; - SDIO_Init(&SDIO_InitStructure); - } - } - else - { - errorstatus = SDEnWideBus(DISABLE); - - if (SD_OK == errorstatus) - { - /* Configure the SDIO peripheral */ - SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; - SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; - SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; - SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; - SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; - SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; - SDIO_Init(&SDIO_InitStructure); - } - } - } - - return(errorstatus); } /** @@ -766,17 +766,17 @@ SD_Error SD_EnableWideBusOperation(uint32_t WideMode) */ SD_Error SD_SetDeviceMode(uint32_t Mode) { - SD_Error errorstatus = SD_OK; + SD_Error errorstatus = SD_OK; - if ((Mode == SD_DMA_MODE) || (Mode == SD_INTERRUPT_MODE) || (Mode == SD_POLLING_MODE)) - { - DeviceMode = Mode; - } - else - { - errorstatus = SD_INVALID_PARAMETER; - } - return(errorstatus); + if ((Mode == SD_DMA_MODE) || (Mode == SD_INTERRUPT_MODE) || (Mode == SD_POLLING_MODE)) + { + DeviceMode = Mode; + } + else + { + errorstatus = SD_INVALID_PARAMETER; + } + return(errorstatus); } @@ -787,19 +787,19 @@ SD_Error SD_SetDeviceMode(uint32_t Mode) */ SD_Error SD_SelectDeselect(uint32_t addr) { - SD_Error errorstatus = SD_OK; + SD_Error errorstatus = SD_OK; - /* Send CMD7 SDIO_SEL_DESEL_CARD */ - SDIO_CmdInitStructure.SDIO_Argument = addr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEL_DESEL_CARD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); + /* Send CMD7 SDIO_SEL_DESEL_CARD */ + SDIO_CmdInitStructure.SDIO_Argument = addr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEL_DESEL_CARD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_SEL_DESEL_CARD); + errorstatus = CmdResp1Error(SDIO_SEL_DESEL_CARD); - return(errorstatus); + return(errorstatus); } /** @@ -812,170 +812,170 @@ SD_Error SD_SelectDeselect(uint32_t addr) */ SD_Error SD_ReadBlock(uint32_t addr, uint32_t *readbuff, uint16_t BlockSize) { - SD_Error errorstatus = SD_OK; - uint32_t count = 0, *tempbuff = readbuff; - uint8_t power = 0; + SD_Error errorstatus = SD_OK; + uint32_t count = 0, *tempbuff = readbuff; + uint8_t power = 0; - if (NULL == readbuff) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } + if (NULL == readbuff) + { + errorstatus = SD_INVALID_PARAMETER; + return(errorstatus); + } - TransferError = SD_OK; - TransferEnd = 0; - TotalNumberOfBytes = 0; + TransferError = SD_OK; + TransferEnd = 0; + TotalNumberOfBytes = 0; - /* Clear all DPSM configuration */ - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 0; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; - SDIO_DataConfig(&SDIO_DataInitStructure); - SDIO_DMACmd(DISABLE); + /* Clear all DPSM configuration */ + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = 0; + SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; + SDIO_DataConfig(&SDIO_DataInitStructure); + SDIO_DMACmd(DISABLE); - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } + if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) + { + errorstatus = SD_LOCK_UNLOCK_FAILED; + return(errorstatus); + } - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - // addr /= 512; - } - if ((BlockSize > 0) && (BlockSize <= 2048) && ((BlockSize & (BlockSize - 1)) == 0)) - { - power = convert_from_bytes_to_power_of_two(BlockSize); + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + BlockSize = 512; + // addr /= 512; + } + if ((BlockSize > 0) && (BlockSize <= 2048) && ((BlockSize & (BlockSize - 1)) == 0)) + { + power = convert_from_bytes_to_power_of_two(BlockSize); - /* Set Block Size for Card */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; + /* Set Block Size for Card */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + } + else + { + errorstatus = SD_INVALID_PARAMETER; + return(errorstatus); + } + + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = BlockSize; + SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + TotalNumberOfBytes = BlockSize; + StopCondition = 0; + DestBuffer = readbuff; + + /* Send CMD17 READ_SINGLE_BLOCK */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)addr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_READ_SINGLE_BLOCK; SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); + errorstatus = CmdResp1Error(SDIO_READ_SINGLE_BLOCK); - if (SD_OK != errorstatus) + if (errorstatus != SD_OK) { - return(errorstatus); + return(errorstatus); } - } - else - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = BlockSize; - SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; - SDIO_DataConfig(&SDIO_DataInitStructure); - - TotalNumberOfBytes = BlockSize; - StopCondition = 0; - DestBuffer = readbuff; - - /* Send CMD17 READ_SINGLE_BLOCK */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)addr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_READ_SINGLE_BLOCK; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_READ_SINGLE_BLOCK); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - /* In case of single block transfer, no need of stop transfer at all.*/ - if (DeviceMode == SD_POLLING_MODE) - { - /* Polling mode */ - while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) + /* In case of single block transfer, no need of stop transfer at all.*/ + if (DeviceMode == SD_POLLING_MODE) { - if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET) - { - for (count = 0; count < 8; count++) + /* Polling mode */ + while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) { - *(tempbuff + count) = SDIO_ReadData(); + if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET) + { + for (count = 0; count < 8; count++) + { + *(tempbuff + count) = SDIO_ReadData(); + } + tempbuff += 8; + } } - tempbuff += 8; - } - } - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_RXOVERR); - errorstatus = SD_RX_OVERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } - while (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) - { - *tempbuff = SDIO_ReadData(); - tempbuff++; - } + if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); + errorstatus = SD_DATA_TIMEOUT; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); + errorstatus = SD_DATA_CRC_FAIL; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_RXOVERR); + errorstatus = SD_RX_OVERRUN; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_STBITERR); + errorstatus = SD_START_BIT_ERR; + return(errorstatus); + } + while (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) + { + *tempbuff = SDIO_ReadData(); + tempbuff++; + } - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - } - else if (DeviceMode == SD_INTERRUPT_MODE) - { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_RXFIFOHF | SDIO_IT_STBITERR, ENABLE); - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); + /* Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); } - } - else if (DeviceMode == SD_DMA_MODE) - { - rt_tick_t tick; - - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_STBITERR, ENABLE); - SDIO_DMACmd(ENABLE); - tick = rt_tick_get(); - DMA_RxConfiguration(readbuff, BlockSize); - while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) + else if (DeviceMode == SD_INTERRUPT_MODE) { - if ((TransferError != SD_OK) || (rt_tick_get() - tick > 10)) - { - errorstatus = SD_ERROR; - // rt_kprintf("sd error\n"); - break; - } - } - } - return(errorstatus); + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_RXFIFOHF | SDIO_IT_STBITERR, ENABLE); + while ((TransferEnd == 0) && (TransferError == SD_OK)) + {} + if (TransferError != SD_OK) + { + return(TransferError); + } + } + else if (DeviceMode == SD_DMA_MODE) + { + rt_tick_t tick; + + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_STBITERR, ENABLE); + SDIO_DMACmd(ENABLE); + tick = rt_tick_get(); + DMA_RxConfiguration(readbuff, BlockSize); + while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) + { + if ((TransferError != SD_OK) || (rt_tick_get() - tick > 10)) + { + errorstatus = SD_ERROR; + // rt_kprintf("sd error\n"); + break; + } + } + } + return(errorstatus); } /** @@ -989,208 +989,208 @@ SD_Error SD_ReadBlock(uint32_t addr, uint32_t *readbuff, uint16_t BlockSize) */ SD_Error SD_ReadMultiBlocks(uint32_t addr, uint32_t *readbuff, uint16_t BlockSize, uint32_t NumberOfBlocks) { - SD_Error errorstatus = SD_OK; - uint32_t count = 0, *tempbuff = readbuff; - uint8_t power = 0; + SD_Error errorstatus = SD_OK; + uint32_t count = 0, *tempbuff = readbuff; + uint8_t power = 0; - if (NULL == readbuff) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - TransferError = SD_OK; - TransferEnd = 0; - TotalNumberOfBytes = 0; - - /* Clear all DPSM configuration */ - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 0; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; - SDIO_DataConfig(&SDIO_DataInitStructure); - SDIO_DMACmd(DISABLE); - - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } - - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - // addr /= 512; - } - - if ((BlockSize > 0) && (BlockSize <= 2048) && (0 == (BlockSize & (BlockSize - 1)))) - { - power = convert_from_bytes_to_power_of_two(BlockSize); - - /* Set Block Size for Card */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); - - if (SD_OK != errorstatus) + if (NULL == readbuff) { - return(errorstatus); - } - } - else - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - if (NumberOfBlocks > 1) - { - /* Common to all modes */ - if (NumberOfBlocks * BlockSize > SD_MAX_DATA_LENGTH) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); + errorstatus = SD_INVALID_PARAMETER; + return(errorstatus); } - TotalNumberOfBytes = NumberOfBlocks * BlockSize; - StopCondition = 1; - DestBuffer = readbuff; + TransferError = SD_OK; + TransferEnd = 0; + TotalNumberOfBytes = 0; + /* Clear all DPSM configuration */ SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize; - SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; + SDIO_DataInitStructure.SDIO_DataLength = 0; + SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; SDIO_DataConfig(&SDIO_DataInitStructure); + SDIO_DMACmd(DISABLE); - /* Send CMD18 READ_MULT_BLOCK with argument data address */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)addr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_READ_MULT_BLOCK; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_READ_MULT_BLOCK); - - if (errorstatus != SD_OK) + if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) { - return(errorstatus); + errorstatus = SD_LOCK_UNLOCK_FAILED; + return(errorstatus); } - if (DeviceMode == SD_POLLING_MODE) + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) { - /* Polling mode */ - while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DATAEND | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR))) - { - if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET) + BlockSize = 512; + // addr /= 512; + } + + if ((BlockSize > 0) && (BlockSize <= 2048) && (0 == (BlockSize & (BlockSize - 1)))) + { + power = convert_from_bytes_to_power_of_two(BlockSize); + + /* Set Block Size for Card */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); + + if (SD_OK != errorstatus) { - for (count = 0; count < SD_HALFFIFO; count++) - { - *(tempbuff + count) = SDIO_ReadData(); - } - tempbuff += SD_HALFFIFO; - } - } - - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_RXOVERR); - errorstatus = SD_RX_OVERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } - while (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) - { - *tempbuff = SDIO_ReadData(); - tempbuff++; - } - - if (SDIO_GetFlagStatus(SDIO_FLAG_DATAEND) != RESET) - { - /* In Case Of SD-CARD Send Command STOP_TRANSMISSION */ - if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType)) - { - /* Send CMD12 STOP_TRANSMISSION */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_STOP_TRANSMISSION; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_STOP_TRANSMISSION); - - if (errorstatus != SD_OK) - { return(errorstatus); - } } - } - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); } - else if (DeviceMode == SD_INTERRUPT_MODE) + else { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_RXFIFOHF | SDIO_IT_STBITERR, ENABLE); - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } + errorstatus = SD_INVALID_PARAMETER; + return(errorstatus); } - else if (DeviceMode == SD_DMA_MODE) - { - rt_tick_t tick; - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_STBITERR, ENABLE); - SDIO_DMACmd(ENABLE); - tick = rt_tick_get(); - DMA_RxConfiguration(readbuff, (NumberOfBlocks * BlockSize)); - while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) - { - if ((TransferError != SD_OK) || (rt_tick_get() - tick > 10)) - { - errorstatus = SD_ERROR; - // rt_kprintf("sd error\n"); - return errorstatus; - } - } - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } + if (NumberOfBlocks > 1) + { + /* Common to all modes */ + if (NumberOfBlocks * BlockSize > SD_MAX_DATA_LENGTH) + { + errorstatus = SD_INVALID_PARAMETER; + return(errorstatus); + } + + TotalNumberOfBytes = NumberOfBlocks * BlockSize; + StopCondition = 1; + DestBuffer = readbuff; + + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize; + SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + /* Send CMD18 READ_MULT_BLOCK with argument data address */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)addr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_READ_MULT_BLOCK; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_READ_MULT_BLOCK); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + if (DeviceMode == SD_POLLING_MODE) + { + /* Polling mode */ + while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DATAEND | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR))) + { + if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET) + { + for (count = 0; count < SD_HALFFIFO; count++) + { + *(tempbuff + count) = SDIO_ReadData(); + } + tempbuff += SD_HALFFIFO; + } + } + + if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); + errorstatus = SD_DATA_TIMEOUT; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); + errorstatus = SD_DATA_CRC_FAIL; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_RXOVERR); + errorstatus = SD_RX_OVERRUN; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_STBITERR); + errorstatus = SD_START_BIT_ERR; + return(errorstatus); + } + while (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) + { + *tempbuff = SDIO_ReadData(); + tempbuff++; + } + + if (SDIO_GetFlagStatus(SDIO_FLAG_DATAEND) != RESET) + { + /* In Case Of SD-CARD Send Command STOP_TRANSMISSION */ + if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType)) + { + /* Send CMD12 STOP_TRANSMISSION */ + SDIO_CmdInitStructure.SDIO_Argument = 0x0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_STOP_TRANSMISSION; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_STOP_TRANSMISSION); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + } + } + /* Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + } + else if (DeviceMode == SD_INTERRUPT_MODE) + { + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_RXFIFOHF | SDIO_IT_STBITERR, ENABLE); + while ((TransferEnd == 0) && (TransferError == SD_OK)) + {} + if (TransferError != SD_OK) + { + return(TransferError); + } + } + else if (DeviceMode == SD_DMA_MODE) + { + rt_tick_t tick; + + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_STBITERR, ENABLE); + SDIO_DMACmd(ENABLE); + tick = rt_tick_get(); + DMA_RxConfiguration(readbuff, (NumberOfBlocks * BlockSize)); + while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) + { + if ((TransferError != SD_OK) || (rt_tick_get() - tick > 10)) + { + errorstatus = SD_ERROR; + // rt_kprintf("sd error\n"); + return errorstatus; + } + } + while ((TransferEnd == 0) && (TransferError == SD_OK)) + {} + if (TransferError != SD_OK) + { + return(TransferError); + } + } } - } - return(errorstatus); + return(errorstatus); } /** @@ -1204,90 +1204,69 @@ SD_Error SD_ReadMultiBlocks(uint32_t addr, uint32_t *readbuff, uint16_t BlockSiz */ SD_Error SD_WriteBlock(uint32_t addr, uint32_t *writebuff, uint16_t BlockSize) { - SD_Error errorstatus = SD_OK; - uint8_t power = 0, cardstate = 0; - uint32_t timeout = 0, bytestransferred = 0; - uint32_t cardstatus = 0, count = 0, restwords = 0; - uint32_t *tempbuff = writebuff; + SD_Error errorstatus = SD_OK; + uint8_t power = 0, cardstate = 0; + uint32_t timeout = 0, bytestransferred = 0; + uint32_t cardstatus = 0, count = 0, restwords = 0; + uint32_t *tempbuff = writebuff; - if (writebuff == NULL) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - TransferError = SD_OK; - TransferEnd = 0; - TotalNumberOfBytes = 0; - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 0; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; - SDIO_DataConfig(&SDIO_DataInitStructure); - SDIO_DMACmd(DISABLE); - - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } - - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - // addr /= 512; - } - - /* Set the block size, both on controller and card */ - if ((BlockSize > 0) && (BlockSize <= 2048) && ((BlockSize & (BlockSize - 1)) == 0)) - { - power = convert_from_bytes_to_power_of_two(BlockSize); - - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); - - if (errorstatus != SD_OK) + if (writebuff == NULL) { - return(errorstatus); + errorstatus = SD_INVALID_PARAMETER; + return(errorstatus); } - } - else - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - /* Wait till card is ready for data Added */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); + TransferError = SD_OK; + TransferEnd = 0; + TotalNumberOfBytes = 0; - errorstatus = CmdResp1Error(SDIO_SEND_STATUS); + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = 0; + SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; + SDIO_DataConfig(&SDIO_DataInitStructure); + SDIO_DMACmd(DISABLE); - if (errorstatus != SD_OK) - { - return(errorstatus); - } + if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) + { + errorstatus = SD_LOCK_UNLOCK_FAILED; + return(errorstatus); + } - cardstatus = SDIO_GetResponse(SDIO_RESP1); + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + BlockSize = 512; + // addr /= 512; + } - timeout = SD_DATATIMEOUT; + /* Set the block size, both on controller and card */ + if ((BlockSize > 0) && (BlockSize <= 2048) && ((BlockSize & (BlockSize - 1)) == 0)) + { + power = convert_from_bytes_to_power_of_two(BlockSize); - while (((cardstatus & 0x00000100) == 0) && (timeout > 0)) - { - timeout--; + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + } + else + { + errorstatus = SD_INVALID_PARAMETER; + return(errorstatus); + } + + /* Wait till card is ready for data Added */ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; @@ -1299,132 +1278,153 @@ SD_Error SD_WriteBlock(uint32_t addr, uint32_t *writebuff, uint16_t BlockSize) if (errorstatus != SD_OK) { - return(errorstatus); + return(errorstatus); } + cardstatus = SDIO_GetResponse(SDIO_RESP1); - } - if (timeout == 0) - { - return(SD_ERROR); - } + timeout = SD_DATATIMEOUT; - /* Send CMD24 WRITE_SINGLE_BLOCK */ - SDIO_CmdInitStructure.SDIO_Argument = addr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_WRITE_SINGLE_BLOCK; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_WRITE_SINGLE_BLOCK); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - TotalNumberOfBytes = BlockSize; - StopCondition = 0; - SrcBuffer = writebuff; - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = BlockSize; - SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; - SDIO_DataConfig(&SDIO_DataInitStructure); - - /* In case of single data block transfer no need of stop command at all */ - if (DeviceMode == SD_POLLING_MODE) - { - while (!(SDIO->STA & (SDIO_FLAG_DBCKEND | SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR))) + while (((cardstatus & 0x00000100) == 0) && (timeout > 0)) { - if (SDIO_GetFlagStatus(SDIO_FLAG_TXFIFOHE) != RESET) - { - if ((TotalNumberOfBytes - bytestransferred) < 32) + timeout--; + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_SEND_STATUS); + + if (errorstatus != SD_OK) { - restwords = ((TotalNumberOfBytes - bytestransferred) % 4 == 0) ? ((TotalNumberOfBytes - bytestransferred) / 4) : (( TotalNumberOfBytes - bytestransferred) / 4 + 1); - - for (count = 0; count < restwords; count++, tempbuff++, bytestransferred += 4) - { - SDIO_WriteData(*tempbuff); - } + return(errorstatus); } - else + cardstatus = SDIO_GetResponse(SDIO_RESP1); + } + + if (timeout == 0) + { + return(SD_ERROR); + } + + /* Send CMD24 WRITE_SINGLE_BLOCK */ + SDIO_CmdInitStructure.SDIO_Argument = addr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_WRITE_SINGLE_BLOCK; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_WRITE_SINGLE_BLOCK); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + TotalNumberOfBytes = BlockSize; + StopCondition = 0; + SrcBuffer = writebuff; + + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = BlockSize; + SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + /* In case of single data block transfer no need of stop command at all */ + if (DeviceMode == SD_POLLING_MODE) + { + while (!(SDIO->STA & (SDIO_FLAG_DBCKEND | SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR))) { - for (count = 0; count < 8; count++) - { - SDIO_WriteData(*(tempbuff + count)); - } - tempbuff += 8; - bytestransferred += 32; + if (SDIO_GetFlagStatus(SDIO_FLAG_TXFIFOHE) != RESET) + { + if ((TotalNumberOfBytes - bytestransferred) < 32) + { + restwords = ((TotalNumberOfBytes - bytestransferred) % 4 == 0) ? ((TotalNumberOfBytes - bytestransferred) / 4) : (( TotalNumberOfBytes - bytestransferred) / 4 + 1); + + for (count = 0; count < restwords; count++, tempbuff++, bytestransferred += 4) + { + SDIO_WriteData(*tempbuff); + } + } + else + { + for (count = 0; count < 8; count++) + { + SDIO_WriteData(*(tempbuff + count)); + } + tempbuff += 8; + bytestransferred += 32; + } + } + } + if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); + errorstatus = SD_DATA_TIMEOUT; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); + errorstatus = SD_DATA_CRC_FAIL; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_TXUNDERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_TXUNDERR); + errorstatus = SD_TX_UNDERRUN; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_STBITERR); + errorstatus = SD_START_BIT_ERR; + return(errorstatus); } - } } - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) + else if (DeviceMode == SD_INTERRUPT_MODE) { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; - return(errorstatus); + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_FLAG_TXFIFOHE | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); + while ((TransferEnd == 0) && (TransferError == SD_OK)) + {} + if (TransferError != SD_OK) + { + return(TransferError); + } } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) + else if (DeviceMode == SD_DMA_MODE) { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); + DMA_TxConfiguration(writebuff, BlockSize); + SDIO_DMACmd(ENABLE); + while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) + {} + while ((TransferEnd == 0) && (TransferError == SD_OK)) + {} + if (TransferError != SD_OK) + { + return(TransferError); + } } - else if (SDIO_GetFlagStatus(SDIO_FLAG_TXUNDERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_TXUNDERR); - errorstatus = SD_TX_UNDERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } - } - else if (DeviceMode == SD_INTERRUPT_MODE) - { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_FLAG_TXFIFOHE | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } - } - else if (DeviceMode == SD_DMA_MODE) - { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); - DMA_TxConfiguration(writebuff, BlockSize); - SDIO_DMACmd(ENABLE); - while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) - {} - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } - } - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); + /* Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); - /* Wait till the card is in programming state */ - errorstatus = IsCardProgramming(&cardstate); - - while ((errorstatus == SD_OK) && ((cardstate == SD_CARD_PROGRAMMING) || (cardstate == SD_CARD_RECEIVING))) - { + /* Wait till the card is in programming state */ errorstatus = IsCardProgramming(&cardstate); - } - return(errorstatus); + while ((errorstatus == SD_OK) && ((cardstate == SD_CARD_PROGRAMMING) || (cardstate == SD_CARD_RECEIVING))) + { + errorstatus = IsCardProgramming(&cardstate); + } + + return(errorstatus); } /** @@ -1439,264 +1439,264 @@ SD_Error SD_WriteBlock(uint32_t addr, uint32_t *writebuff, uint16_t BlockSize) */ SD_Error SD_WriteMultiBlocks(uint32_t addr, uint32_t *writebuff, uint16_t BlockSize, uint32_t NumberOfBlocks) { - SD_Error errorstatus = SD_OK; - uint8_t power = 0, cardstate = 0; - uint32_t bytestransferred = 0; - uint32_t count = 0, restwords = 0; - uint32_t *tempbuff = writebuff; + SD_Error errorstatus = SD_OK; + uint8_t power = 0, cardstate = 0; + uint32_t bytestransferred = 0; + uint32_t count = 0, restwords = 0; + uint32_t *tempbuff = writebuff; - if (writebuff == NULL) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } + if (writebuff == NULL) + { + errorstatus = SD_INVALID_PARAMETER; + return(errorstatus); + } - TransferError = SD_OK; - TransferEnd = 0; - TotalNumberOfBytes = 0; + TransferError = SD_OK; + TransferEnd = 0; + TotalNumberOfBytes = 0; - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 0; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; - SDIO_DataConfig(&SDIO_DataInitStructure); - SDIO_DMACmd(DISABLE); + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = 0; + SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; + SDIO_DataConfig(&SDIO_DataInitStructure); + SDIO_DMACmd(DISABLE); - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } + if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) + { + errorstatus = SD_LOCK_UNLOCK_FAILED; + return(errorstatus); + } - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - // addr /= 512; - } + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + BlockSize = 512; + // addr /= 512; + } - /* Set the block size, both on controller and card */ - if ((BlockSize > 0) && (BlockSize <= 2048) && ((BlockSize & (BlockSize - 1)) == 0)) - { - power = convert_from_bytes_to_power_of_two(BlockSize); + /* Set the block size, both on controller and card */ + if ((BlockSize > 0) && (BlockSize <= 2048) && ((BlockSize & (BlockSize - 1)) == 0)) + { + power = convert_from_bytes_to_power_of_two(BlockSize); - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + } + else + { + errorstatus = SD_INVALID_PARAMETER; + return(errorstatus); + } + + /* Wait till card is ready for data Added */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); + errorstatus = CmdResp1Error(SDIO_SEND_STATUS); if (errorstatus != SD_OK) { - return(errorstatus); - } - } - else - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - /* Wait till card is ready for data Added */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SEND_STATUS); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - if (NumberOfBlocks > 1) - { - /* Common to all modes */ - if (NumberOfBlocks * BlockSize > SD_MAX_DATA_LENGTH) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) - { - /* To improve performance */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - if (errorstatus != SD_OK) - { return(errorstatus); - } - /* To improve performance */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)NumberOfBlocks; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCK_COUNT; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SET_BLOCK_COUNT); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } } - /* Send CMD25 WRITE_MULT_BLOCK with argument data address */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)addr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_WRITE_MULT_BLOCK; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_WRITE_MULT_BLOCK); - - if (SD_OK != errorstatus) + if (NumberOfBlocks > 1) { - return(errorstatus); - } - - TotalNumberOfBytes = NumberOfBlocks * BlockSize; - StopCondition = 1; - SrcBuffer = writebuff; - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize; - SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; - SDIO_DataConfig(&SDIO_DataInitStructure); - - if (DeviceMode == SD_POLLING_MODE) - { - while (!(SDIO->STA & (SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DATAEND | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR))) - { - if (SDIO_GetFlagStatus(SDIO_FLAG_TXFIFOHE) != RESET) + /* Common to all modes */ + if (NumberOfBlocks * BlockSize > SD_MAX_DATA_LENGTH) { - if (!((TotalNumberOfBytes - bytestransferred) < SD_HALFFIFOBYTES)) - { - for (count = 0; count < SD_HALFFIFO; count++) - { - SDIO_WriteData(*(tempbuff + count)); - } - tempbuff += SD_HALFFIFO; - bytestransferred += SD_HALFFIFOBYTES; - } - else - { - restwords = ((TotalNumberOfBytes - bytestransferred) % 4 == 0) ? ((TotalNumberOfBytes - bytestransferred) / 4) : - ((TotalNumberOfBytes - bytestransferred) / 4 + 1); - - for (count = 0; count < restwords; count++, tempbuff++, bytestransferred += 4) - { - SDIO_WriteData(*tempbuff); - } - } - } - } - - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_TXUNDERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_TXUNDERR); - errorstatus = SD_TX_UNDERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } - - if (SDIO_GetFlagStatus(SDIO_FLAG_DATAEND) != RESET) - { - if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) - { - /* Send CMD12 STOP_TRANSMISSION */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_STOP_TRANSMISSION; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - - errorstatus = CmdResp1Error(SDIO_STOP_TRANSMISSION); - - if (errorstatus != SD_OK) - { + errorstatus = SD_INVALID_PARAMETER; return(errorstatus); - } } - } - } - else if (DeviceMode == SD_INTERRUPT_MODE) - { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_TXFIFOHE | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } - } - else if (DeviceMode == SD_DMA_MODE) - { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); - SDIO_DMACmd(ENABLE); - DMA_TxConfiguration(writebuff, (NumberOfBlocks * BlockSize)); - while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) - {} - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } - } - } - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - /* Wait till the card is in programming state */ - errorstatus = IsCardProgramming(&cardstate); + if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) + { + /* To improve performance */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); - while ((errorstatus == SD_OK) && ((cardstate == SD_CARD_PROGRAMMING) || (cardstate == SD_CARD_RECEIVING))) - { + + errorstatus = CmdResp1Error(SDIO_APP_CMD); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + /* To improve performance */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)NumberOfBlocks; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCK_COUNT; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_SET_BLOCK_COUNT); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + } + + /* Send CMD25 WRITE_MULT_BLOCK with argument data address */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)addr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_WRITE_MULT_BLOCK; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_WRITE_MULT_BLOCK); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + + TotalNumberOfBytes = NumberOfBlocks * BlockSize; + StopCondition = 1; + SrcBuffer = writebuff; + + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize; + SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + if (DeviceMode == SD_POLLING_MODE) + { + while (!(SDIO->STA & (SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DATAEND | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR))) + { + if (SDIO_GetFlagStatus(SDIO_FLAG_TXFIFOHE) != RESET) + { + if (!((TotalNumberOfBytes - bytestransferred) < SD_HALFFIFOBYTES)) + { + for (count = 0; count < SD_HALFFIFO; count++) + { + SDIO_WriteData(*(tempbuff + count)); + } + tempbuff += SD_HALFFIFO; + bytestransferred += SD_HALFFIFOBYTES; + } + else + { + restwords = ((TotalNumberOfBytes - bytestransferred) % 4 == 0) ? ((TotalNumberOfBytes - bytestransferred) / 4) : + ((TotalNumberOfBytes - bytestransferred) / 4 + 1); + + for (count = 0; count < restwords; count++, tempbuff++, bytestransferred += 4) + { + SDIO_WriteData(*tempbuff); + } + } + } + } + + if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); + errorstatus = SD_DATA_TIMEOUT; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); + errorstatus = SD_DATA_CRC_FAIL; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_TXUNDERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_TXUNDERR); + errorstatus = SD_TX_UNDERRUN; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_STBITERR); + errorstatus = SD_START_BIT_ERR; + return(errorstatus); + } + + if (SDIO_GetFlagStatus(SDIO_FLAG_DATAEND) != RESET) + { + if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) + { + /* Send CMD12 STOP_TRANSMISSION */ + SDIO_CmdInitStructure.SDIO_Argument = 0x0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_STOP_TRANSMISSION; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + + errorstatus = CmdResp1Error(SDIO_STOP_TRANSMISSION); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + } + } + } + else if (DeviceMode == SD_INTERRUPT_MODE) + { + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_TXFIFOHE | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); + while ((TransferEnd == 0) && (TransferError == SD_OK)) + {} + if (TransferError != SD_OK) + { + return(TransferError); + } + } + else if (DeviceMode == SD_DMA_MODE) + { + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); + SDIO_DMACmd(ENABLE); + DMA_TxConfiguration(writebuff, (NumberOfBlocks * BlockSize)); + while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) + {} + while ((TransferEnd == 0) && (TransferError == SD_OK)) + {} + if (TransferError != SD_OK) + { + return(TransferError); + } + } + } + /* Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + /* Wait till the card is in programming state */ errorstatus = IsCardProgramming(&cardstate); - } - return(errorstatus); + while ((errorstatus == SD_OK) && ((cardstate == SD_CARD_PROGRAMMING) || (cardstate == SD_CARD_RECEIVING))) + { + errorstatus = IsCardProgramming(&cardstate); + } + + return(errorstatus); } /** @@ -1709,14 +1709,14 @@ SD_Error SD_WriteMultiBlocks(uint32_t addr, uint32_t *writebuff, uint16_t BlockS */ SDTransferState SD_GetTransferState(void) { - if (SDIO->STA & (SDIO_FLAG_TXACT | SDIO_FLAG_RXACT)) - { - return(SD_TRANSFER_IN_PROGRESS); - } - else - { - return(SD_NO_TRANSFER); - } + if (SDIO->STA & (SDIO_FLAG_TXACT | SDIO_FLAG_RXACT)) + { + return(SD_TRANSFER_IN_PROGRESS); + } + else + { + return(SD_NO_TRANSFER); + } } /** @@ -1726,19 +1726,19 @@ SDTransferState SD_GetTransferState(void) */ SD_Error SD_StopTransfer(void) { - SD_Error errorstatus = SD_OK; + SD_Error errorstatus = SD_OK; - /* Send CMD12 STOP_TRANSMISSION */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_STOP_TRANSMISSION; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); + /* Send CMD12 STOP_TRANSMISSION */ + SDIO_CmdInitStructure.SDIO_Argument = 0x0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_STOP_TRANSMISSION; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_STOP_TRANSMISSION); + errorstatus = CmdResp1Error(SDIO_STOP_TRANSMISSION); - return(errorstatus); + return(errorstatus); } /** @@ -1749,91 +1749,91 @@ SD_Error SD_StopTransfer(void) */ SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr) { - SD_Error errorstatus = SD_OK; - uint32_t delay = 0; - __IO uint32_t maxdelay = 0; - uint8_t cardstate = 0; + SD_Error errorstatus = SD_OK; + uint32_t delay = 0; + __IO uint32_t maxdelay = 0; + uint8_t cardstate = 0; - /* Check if the card coomnd class supports erase command */ - if (((CSD_Tab[1] >> 20) & SD_CCCC_ERASE) == 0) - { - errorstatus = SD_REQUEST_NOT_APPLICABLE; - return(errorstatus); - } + /* Check if the card coomnd class supports erase command */ + if (((CSD_Tab[1] >> 20) & SD_CCCC_ERASE) == 0) + { + errorstatus = SD_REQUEST_NOT_APPLICABLE; + return(errorstatus); + } - maxdelay = 72000 / ((SDIO->CLKCR & 0xFF) + 2); + maxdelay = 72000 / ((SDIO->CLKCR & 0xFF) + 2); - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } + if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) + { + errorstatus = SD_LOCK_UNLOCK_FAILED; + return(errorstatus); + } - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - startaddr /= 512; - endaddr /= 512; - } + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + startaddr /= 512; + endaddr /= 512; + } - /* According to sd-card spec 1.0 ERASE_GROUP_START (CMD32) and erase_group_end(CMD33) */ - if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) - { - /* Send CMD32 SD_ERASE_GRP_START with argument as addr */ - SDIO_CmdInitStructure.SDIO_Argument = startaddr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_ERASE_GRP_START; + /* According to sd-card spec 1.0 ERASE_GROUP_START (CMD32) and erase_group_end(CMD33) */ + if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) + { + /* Send CMD32 SD_ERASE_GRP_START with argument as addr */ + SDIO_CmdInitStructure.SDIO_Argument = startaddr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_ERASE_GRP_START; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_SD_ERASE_GRP_START); + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /* Send CMD33 SD_ERASE_GRP_END with argument as addr */ + SDIO_CmdInitStructure.SDIO_Argument = endaddr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_ERASE_GRP_END; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_SD_ERASE_GRP_END); + if (errorstatus != SD_OK) + { + return(errorstatus); + } + } + + /* Send CMD38 ERASE */ + SDIO_CmdInitStructure.SDIO_Argument = 0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_ERASE; SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_SD_ERASE_GRP_START); + errorstatus = CmdResp1Error(SDIO_ERASE); + if (errorstatus != SD_OK) { - return(errorstatus); + return(errorstatus); } - /* Send CMD33 SD_ERASE_GRP_END with argument as addr */ - SDIO_CmdInitStructure.SDIO_Argument = endaddr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_ERASE_GRP_END; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); + for (delay = 0; delay < maxdelay; delay++) + {} - errorstatus = CmdResp1Error(SDIO_SD_ERASE_GRP_END); - if (errorstatus != SD_OK) - { - return(errorstatus); - } - } - - /* Send CMD38 ERASE */ - SDIO_CmdInitStructure.SDIO_Argument = 0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_ERASE; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_ERASE); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - for (delay = 0; delay < maxdelay; delay++) - {} - - /* Wait till the card is in programming state */ - errorstatus = IsCardProgramming(&cardstate); - - while ((errorstatus == SD_OK) && ((SD_CARD_PROGRAMMING == cardstate) || (SD_CARD_RECEIVING == cardstate))) - { + /* Wait till the card is in programming state */ errorstatus = IsCardProgramming(&cardstate); - } - return(errorstatus); + while ((errorstatus == SD_OK) && ((SD_CARD_PROGRAMMING == cardstate) || (SD_CARD_RECEIVING == cardstate))) + { + errorstatus = IsCardProgramming(&cardstate); + } + + return(errorstatus); } /** @@ -1844,32 +1844,32 @@ SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr) */ SD_Error SD_SendStatus(uint32_t *pcardstatus) { - SD_Error errorstatus = SD_OK; + SD_Error errorstatus = SD_OK; + + if (pcardstatus == NULL) + { + errorstatus = SD_INVALID_PARAMETER; + return(errorstatus); + } + + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + + errorstatus = CmdResp1Error(SDIO_SEND_STATUS); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + *pcardstatus = SDIO_GetResponse(SDIO_RESP1); - if (pcardstatus == NULL) - { - errorstatus = SD_INVALID_PARAMETER; return(errorstatus); - } - - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - - errorstatus = CmdResp1Error(SDIO_SEND_STATUS); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - *pcardstatus = SDIO_GetResponse(SDIO_RESP1); - - return(errorstatus); } /** @@ -1880,118 +1880,118 @@ SD_Error SD_SendStatus(uint32_t *pcardstatus) */ SD_Error SD_SendSDStatus(uint32_t *psdstatus) { - SD_Error errorstatus = SD_OK; - uint32_t count = 0; + SD_Error errorstatus = SD_OK; + uint32_t count = 0; - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } - - /* Set block size for card if it is not equal to current block size for card. */ - SDIO_CmdInitStructure.SDIO_Argument = 64; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - /* CMD55 */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 64; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_64b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; - SDIO_DataConfig(&SDIO_DataInitStructure); - - /* Send ACMD13 SD_APP_STAUS with argument as card's RCA.*/ - SDIO_CmdInitStructure.SDIO_Argument = 0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_APP_STAUS; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_SD_APP_STAUS); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) - { - if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET) + if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) { - for (count = 0; count < 8; count++) - { - *(psdstatus + count) = SDIO_ReadData(); - } - psdstatus += 8; + errorstatus = SD_LOCK_UNLOCK_FAILED; + return(errorstatus); } - } - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_RXOVERR); - errorstatus = SD_RX_OVERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } + /* Set block size for card if it is not equal to current block size for card. */ + SDIO_CmdInitStructure.SDIO_Argument = 64; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); - while (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) - { - *psdstatus = SDIO_ReadData(); - psdstatus++; - } + errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); - /* Clear all the static status flags*/ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - psdstatus -= 16; - for (count = 0; count < 16; count++) - { - psdstatus[count] = ((psdstatus[count] & SD_0TO7BITS) << 24) |((psdstatus[count] & SD_8TO15BITS) << 8) | - ((psdstatus[count] & SD_16TO23BITS) >> 8) |((psdstatus[count] & SD_24TO31BITS) >> 24); - } - return(errorstatus); + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /* CMD55 */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + errorstatus = CmdResp1Error(SDIO_APP_CMD); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = 64; + SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_64b; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + /* Send ACMD13 SD_APP_STAUS with argument as card's RCA.*/ + SDIO_CmdInitStructure.SDIO_Argument = 0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_APP_STAUS; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + errorstatus = CmdResp1Error(SDIO_SD_APP_STAUS); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) + { + if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET) + { + for (count = 0; count < 8; count++) + { + *(psdstatus + count) = SDIO_ReadData(); + } + psdstatus += 8; + } + } + + if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); + errorstatus = SD_DATA_TIMEOUT; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); + errorstatus = SD_DATA_CRC_FAIL; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_RXOVERR); + errorstatus = SD_RX_OVERRUN; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_STBITERR); + errorstatus = SD_START_BIT_ERR; + return(errorstatus); + } + + while (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) + { + *psdstatus = SDIO_ReadData(); + psdstatus++; + } + + /* Clear all the static status flags*/ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + psdstatus -= 16; + for (count = 0; count < 16; count++) + { + psdstatus[count] = ((psdstatus[count] & SD_0TO7BITS) << 24) |((psdstatus[count] & SD_8TO15BITS) << 8) | + ((psdstatus[count] & SD_16TO23BITS) >> 8) |((psdstatus[count] & SD_24TO31BITS) >> 24); + } + return(errorstatus); } /** @@ -2001,130 +2001,130 @@ SD_Error SD_SendSDStatus(uint32_t *psdstatus) */ SD_Error SD_ProcessIRQSrc(void) { - uint32_t count = 0, restwords = 0; + uint32_t count = 0, restwords = 0; - if (DeviceMode == SD_INTERRUPT_MODE) - { - if (SDIO_GetITStatus(SDIO_IT_RXFIFOHF) != RESET) + if (DeviceMode == SD_INTERRUPT_MODE) { - for (count = 0; count < SD_HALFFIFO; count++) - { - *(DestBuffer + count) = SDIO_ReadData(); - } - DestBuffer += SD_HALFFIFO; - NumberOfBytes += SD_HALFFIFOBYTES; - } - else if (SDIO_GetITStatus(SDIO_IT_TXFIFOHE) != RESET) - { - if ((TotalNumberOfBytes - NumberOfBytes) < SD_HALFFIFOBYTES) - { - restwords = ((TotalNumberOfBytes - NumberOfBytes) % 4 == 0) ? - ((TotalNumberOfBytes - NumberOfBytes) / 4) : - ((TotalNumberOfBytes - NumberOfBytes) / 4 + 1); - - for (count = 0; count < restwords; count++, SrcBuffer++, NumberOfBytes += 4) + if (SDIO_GetITStatus(SDIO_IT_RXFIFOHF) != RESET) { - SDIO_WriteData(*SrcBuffer); + for (count = 0; count < SD_HALFFIFO; count++) + { + *(DestBuffer + count) = SDIO_ReadData(); + } + DestBuffer += SD_HALFFIFO; + NumberOfBytes += SD_HALFFIFOBYTES; } - } - else - { - for (count = 0; count < SD_HALFFIFO; count++) + else if (SDIO_GetITStatus(SDIO_IT_TXFIFOHE) != RESET) { - SDIO_WriteData(*(SrcBuffer + count)); + if ((TotalNumberOfBytes - NumberOfBytes) < SD_HALFFIFOBYTES) + { + restwords = ((TotalNumberOfBytes - NumberOfBytes) % 4 == 0) ? + ((TotalNumberOfBytes - NumberOfBytes) / 4) : + ((TotalNumberOfBytes - NumberOfBytes) / 4 + 1); + + for (count = 0; count < restwords; count++, SrcBuffer++, NumberOfBytes += 4) + { + SDIO_WriteData(*SrcBuffer); + } + } + else + { + for (count = 0; count < SD_HALFFIFO; count++) + { + SDIO_WriteData(*(SrcBuffer + count)); + } + + SrcBuffer += SD_HALFFIFO; + NumberOfBytes += SD_HALFFIFOBYTES; + } + } + } + + if (SDIO_GetITStatus(SDIO_IT_DATAEND) != RESET) + { + if (DeviceMode != SD_DMA_MODE) + { + while ((SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) && (NumberOfBytes < TotalNumberOfBytes)) + { + *DestBuffer = SDIO_ReadData(); + DestBuffer++; + NumberOfBytes += 4; + } } - SrcBuffer += SD_HALFFIFO; - NumberOfBytes += SD_HALFFIFOBYTES; - } + if (StopCondition == 1) + { + TransferError = SD_StopTransfer(); + } + else + { + TransferError = SD_OK; + } + SDIO_ClearITPendingBit(SDIO_IT_DATAEND); + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | + SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | + SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); + TransferEnd = 1; + NumberOfBytes = 0; + return(TransferError); } - } - if (SDIO_GetITStatus(SDIO_IT_DATAEND) != RESET) - { - if (DeviceMode != SD_DMA_MODE) + if (SDIO_GetITStatus(SDIO_IT_DCRCFAIL) != RESET) { - while ((SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) && (NumberOfBytes < TotalNumberOfBytes)) - { - *DestBuffer = SDIO_ReadData(); - DestBuffer++; - NumberOfBytes += 4; - } + SDIO_ClearITPendingBit(SDIO_IT_DCRCFAIL); + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | + SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | + SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); + NumberOfBytes = 0; + TransferError = SD_DATA_CRC_FAIL; + return(SD_DATA_CRC_FAIL); } - if (StopCondition == 1) + if (SDIO_GetITStatus(SDIO_IT_DTIMEOUT) != RESET) { - TransferError = SD_StopTransfer(); + SDIO_ClearITPendingBit(SDIO_IT_DTIMEOUT); + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | + SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | + SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); + NumberOfBytes = 0; + TransferError = SD_DATA_TIMEOUT; + return(SD_DATA_TIMEOUT); } - else + + if (SDIO_GetITStatus(SDIO_IT_RXOVERR) != RESET) { - TransferError = SD_OK; + SDIO_ClearITPendingBit(SDIO_IT_RXOVERR); + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | + SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | + SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); + NumberOfBytes = 0; + TransferError = SD_RX_OVERRUN; + return(SD_RX_OVERRUN); } - SDIO_ClearITPendingBit(SDIO_IT_DATAEND); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - TransferEnd = 1; - NumberOfBytes = 0; - return(TransferError); - } - if (SDIO_GetITStatus(SDIO_IT_DCRCFAIL) != RESET) - { - SDIO_ClearITPendingBit(SDIO_IT_DCRCFAIL); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - NumberOfBytes = 0; - TransferError = SD_DATA_CRC_FAIL; - return(SD_DATA_CRC_FAIL); - } + if (SDIO_GetITStatus(SDIO_IT_TXUNDERR) != RESET) + { + SDIO_ClearITPendingBit(SDIO_IT_TXUNDERR); + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | + SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | + SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); + NumberOfBytes = 0; + TransferError = SD_TX_UNDERRUN; + return(SD_TX_UNDERRUN); + } - if (SDIO_GetITStatus(SDIO_IT_DTIMEOUT) != RESET) - { - SDIO_ClearITPendingBit(SDIO_IT_DTIMEOUT); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - NumberOfBytes = 0; - TransferError = SD_DATA_TIMEOUT; - return(SD_DATA_TIMEOUT); - } + if (SDIO_GetITStatus(SDIO_IT_STBITERR) != RESET) + { + SDIO_ClearITPendingBit(SDIO_IT_STBITERR); + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | + SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | + SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); + NumberOfBytes = 0; + TransferError = SD_START_BIT_ERR; + return(SD_START_BIT_ERR); + } - if (SDIO_GetITStatus(SDIO_IT_RXOVERR) != RESET) - { - SDIO_ClearITPendingBit(SDIO_IT_RXOVERR); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - NumberOfBytes = 0; - TransferError = SD_RX_OVERRUN; - return(SD_RX_OVERRUN); - } - - if (SDIO_GetITStatus(SDIO_IT_TXUNDERR) != RESET) - { - SDIO_ClearITPendingBit(SDIO_IT_TXUNDERR); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - NumberOfBytes = 0; - TransferError = SD_TX_UNDERRUN; - return(SD_TX_UNDERRUN); - } - - if (SDIO_GetITStatus(SDIO_IT_STBITERR) != RESET) - { - SDIO_ClearITPendingBit(SDIO_IT_STBITERR); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - NumberOfBytes = 0; - TransferError = SD_START_BIT_ERR; - return(SD_START_BIT_ERR); - } - - return(SD_OK); + return(SD_OK); } /** @@ -2134,26 +2134,26 @@ SD_Error SD_ProcessIRQSrc(void) */ static SD_Error CmdError(void) { - SD_Error errorstatus = SD_OK; - uint32_t timeout; + SD_Error errorstatus = SD_OK; + uint32_t timeout; - timeout = SDIO_CMD0TIMEOUT; /* 10000 */ + timeout = SDIO_CMD0TIMEOUT; /* 10000 */ - while ((timeout > 0) && (SDIO_GetFlagStatus(SDIO_FLAG_CMDSENT) == RESET)) - { - timeout--; - } + while ((timeout > 0) && (SDIO_GetFlagStatus(SDIO_FLAG_CMDSENT) == RESET)) + { + timeout--; + } + + if (timeout == 0) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + return(errorstatus); + } + + /* Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); - if (timeout == 0) - { - errorstatus = SD_CMD_RSP_TIMEOUT; return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - return(errorstatus); } /** @@ -2164,34 +2164,34 @@ static SD_Error CmdError(void) */ static SD_Error CmdResp7Error(void) { - SD_Error errorstatus = SD_OK; - uint32_t status; - uint32_t timeout = SDIO_CMD0TIMEOUT; + SD_Error errorstatus = SD_OK; + uint32_t status; + uint32_t timeout = SDIO_CMD0TIMEOUT; - status = SDIO->STA; - - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) && (timeout > 0)) - { - timeout--; status = SDIO->STA; - } - if ((timeout == 0) || (status & SDIO_FLAG_CTIMEOUT)) - { - /* Card is not V2.0 complient or card does not support the set voltage range */ - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); - return(errorstatus); - } + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) && (timeout > 0)) + { + timeout--; + status = SDIO->STA; + } - if (status & SDIO_FLAG_CMDREND) - { - /* Card is SD V2.0 compliant */ - errorstatus = SD_OK; - SDIO_ClearFlag(SDIO_FLAG_CMDREND); + if ((timeout == 0) || (status & SDIO_FLAG_CTIMEOUT)) + { + /* Card is not V2.0 complient or card does not support the set voltage range */ + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + + if (status & SDIO_FLAG_CMDREND) + { + /* Card is SD V2.0 compliant */ + errorstatus = SD_OK; + SDIO_ClearFlag(SDIO_FLAG_CMDREND); + return(errorstatus); + } return(errorstatus); - } - return(errorstatus); } /** @@ -2202,143 +2202,143 @@ static SD_Error CmdResp7Error(void) */ static SD_Error CmdResp1Error(uint8_t cmd) { - SD_Error errorstatus = SD_OK; - uint32_t status; - uint32_t response_r1; + SD_Error errorstatus = SD_OK; + uint32_t status; + uint32_t response_r1; - status = SDIO->STA; - - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) - { status = SDIO->STA; - } - if (status & SDIO_FLAG_CTIMEOUT) - { - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) + { + status = SDIO->STA; + } + + if (status & SDIO_FLAG_CTIMEOUT) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + else if (status & SDIO_FLAG_CCRCFAIL) + { + errorstatus = SD_CMD_CRC_FAIL; + SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); + return(errorstatus); + } + + /* Check response received is of desired command */ + if (SDIO_GetCommandResponse() != cmd) + { + errorstatus = SD_ILLEGAL_CMD; + return(errorstatus); + } + + /* Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + /* We have received response, retrieve it for analysis */ + response_r1 = SDIO_GetResponse(SDIO_RESP1); + + if ((response_r1 & SD_OCR_ERRORBITS) == SD_ALLZERO) + { + return(errorstatus); + } + + if (response_r1 & SD_OCR_ADDR_OUT_OF_RANGE) + { + return(SD_ADDR_OUT_OF_RANGE); + } + + if (response_r1 & SD_OCR_ADDR_MISALIGNED) + { + return(SD_ADDR_MISALIGNED); + } + + if (response_r1 & SD_OCR_BLOCK_LEN_ERR) + { + return(SD_BLOCK_LEN_ERR); + } + + if (response_r1 & SD_OCR_ERASE_SEQ_ERR) + { + return(SD_ERASE_SEQ_ERR); + } + + if (response_r1 & SD_OCR_BAD_ERASE_PARAM) + { + return(SD_BAD_ERASE_PARAM); + } + + if (response_r1 & SD_OCR_WRITE_PROT_VIOLATION) + { + return(SD_WRITE_PROT_VIOLATION); + } + + if (response_r1 & SD_OCR_LOCK_UNLOCK_FAILED) + { + return(SD_LOCK_UNLOCK_FAILED); + } + + if (response_r1 & SD_OCR_COM_CRC_FAILED) + { + return(SD_COM_CRC_FAILED); + } + + if (response_r1 & SD_OCR_ILLEGAL_CMD) + { + return(SD_ILLEGAL_CMD); + } + + if (response_r1 & SD_OCR_CARD_ECC_FAILED) + { + return(SD_CARD_ECC_FAILED); + } + + if (response_r1 & SD_OCR_CC_ERROR) + { + return(SD_CC_ERROR); + } + + if (response_r1 & SD_OCR_GENERAL_UNKNOWN_ERROR) + { + return(SD_GENERAL_UNKNOWN_ERROR); + } + + if (response_r1 & SD_OCR_STREAM_READ_UNDERRUN) + { + return(SD_STREAM_READ_UNDERRUN); + } + + if (response_r1 & SD_OCR_STREAM_WRITE_OVERRUN) + { + return(SD_STREAM_WRITE_OVERRUN); + } + + if (response_r1 & SD_OCR_CID_CSD_OVERWRIETE) + { + return(SD_CID_CSD_OVERWRITE); + } + + if (response_r1 & SD_OCR_WP_ERASE_SKIP) + { + return(SD_WP_ERASE_SKIP); + } + + if (response_r1 & SD_OCR_CARD_ECC_DISABLED) + { + return(SD_CARD_ECC_DISABLED); + } + + if (response_r1 & SD_OCR_ERASE_RESET) + { + return(SD_ERASE_RESET); + } + + if (response_r1 & SD_OCR_AKE_SEQ_ERROR) + { + return(SD_AKE_SEQ_ERROR); + } return(errorstatus); - } - else if (status & SDIO_FLAG_CCRCFAIL) - { - errorstatus = SD_CMD_CRC_FAIL; - SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); - return(errorstatus); - } - - /* Check response received is of desired command */ - if (SDIO_GetCommandResponse() != cmd) - { - errorstatus = SD_ILLEGAL_CMD; - return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - /* We have received response, retrieve it for analysis */ - response_r1 = SDIO_GetResponse(SDIO_RESP1); - - if ((response_r1 & SD_OCR_ERRORBITS) == SD_ALLZERO) - { - return(errorstatus); - } - - if (response_r1 & SD_OCR_ADDR_OUT_OF_RANGE) - { - return(SD_ADDR_OUT_OF_RANGE); - } - - if (response_r1 & SD_OCR_ADDR_MISALIGNED) - { - return(SD_ADDR_MISALIGNED); - } - - if (response_r1 & SD_OCR_BLOCK_LEN_ERR) - { - return(SD_BLOCK_LEN_ERR); - } - - if (response_r1 & SD_OCR_ERASE_SEQ_ERR) - { - return(SD_ERASE_SEQ_ERR); - } - - if (response_r1 & SD_OCR_BAD_ERASE_PARAM) - { - return(SD_BAD_ERASE_PARAM); - } - - if (response_r1 & SD_OCR_WRITE_PROT_VIOLATION) - { - return(SD_WRITE_PROT_VIOLATION); - } - - if (response_r1 & SD_OCR_LOCK_UNLOCK_FAILED) - { - return(SD_LOCK_UNLOCK_FAILED); - } - - if (response_r1 & SD_OCR_COM_CRC_FAILED) - { - return(SD_COM_CRC_FAILED); - } - - if (response_r1 & SD_OCR_ILLEGAL_CMD) - { - return(SD_ILLEGAL_CMD); - } - - if (response_r1 & SD_OCR_CARD_ECC_FAILED) - { - return(SD_CARD_ECC_FAILED); - } - - if (response_r1 & SD_OCR_CC_ERROR) - { - return(SD_CC_ERROR); - } - - if (response_r1 & SD_OCR_GENERAL_UNKNOWN_ERROR) - { - return(SD_GENERAL_UNKNOWN_ERROR); - } - - if (response_r1 & SD_OCR_STREAM_READ_UNDERRUN) - { - return(SD_STREAM_READ_UNDERRUN); - } - - if (response_r1 & SD_OCR_STREAM_WRITE_OVERRUN) - { - return(SD_STREAM_WRITE_OVERRUN); - } - - if (response_r1 & SD_OCR_CID_CSD_OVERWRIETE) - { - return(SD_CID_CSD_OVERWRITE); - } - - if (response_r1 & SD_OCR_WP_ERASE_SKIP) - { - return(SD_WP_ERASE_SKIP); - } - - if (response_r1 & SD_OCR_CARD_ECC_DISABLED) - { - return(SD_CARD_ECC_DISABLED); - } - - if (response_r1 & SD_OCR_ERASE_RESET) - { - return(SD_ERASE_RESET); - } - - if (response_r1 & SD_OCR_AKE_SEQ_ERROR) - { - return(SD_AKE_SEQ_ERROR); - } - return(errorstatus); } /** @@ -2349,25 +2349,25 @@ static SD_Error CmdResp1Error(uint8_t cmd) */ static SD_Error CmdResp3Error(void) { - SD_Error errorstatus = SD_OK; - uint32_t status; + SD_Error errorstatus = SD_OK; + uint32_t status; - status = SDIO->STA; - - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) - { status = SDIO->STA; - } - if (status & SDIO_FLAG_CTIMEOUT) - { - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) + { + status = SDIO->STA; + } + + if (status & SDIO_FLAG_CTIMEOUT) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + /* Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); return(errorstatus); - } - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - return(errorstatus); } /** @@ -2378,33 +2378,33 @@ static SD_Error CmdResp3Error(void) */ static SD_Error CmdResp2Error(void) { - SD_Error errorstatus = SD_OK; - uint32_t status; + SD_Error errorstatus = SD_OK; + uint32_t status; - status = SDIO->STA; - - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CTIMEOUT | SDIO_FLAG_CMDREND))) - { status = SDIO->STA; - } - if (status & SDIO_FLAG_CTIMEOUT) - { - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CTIMEOUT | SDIO_FLAG_CMDREND))) + { + status = SDIO->STA; + } + + if (status & SDIO_FLAG_CTIMEOUT) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + else if (status & SDIO_FLAG_CCRCFAIL) + { + errorstatus = SD_CMD_CRC_FAIL; + SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); + return(errorstatus); + } + + /* Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + return(errorstatus); - } - else if (status & SDIO_FLAG_CCRCFAIL) - { - errorstatus = SD_CMD_CRC_FAIL; - SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); - return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - return(errorstatus); } /** @@ -2417,65 +2417,65 @@ static SD_Error CmdResp2Error(void) */ static SD_Error CmdResp6Error(uint8_t cmd, uint16_t *prca) { - SD_Error errorstatus = SD_OK; - uint32_t status; - uint32_t response_r1; + SD_Error errorstatus = SD_OK; + uint32_t status; + uint32_t response_r1; - status = SDIO->STA; - - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CTIMEOUT | SDIO_FLAG_CMDREND))) - { status = SDIO->STA; - } - if (status & SDIO_FLAG_CTIMEOUT) - { - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CTIMEOUT | SDIO_FLAG_CMDREND))) + { + status = SDIO->STA; + } + + if (status & SDIO_FLAG_CTIMEOUT) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + else if (status & SDIO_FLAG_CCRCFAIL) + { + errorstatus = SD_CMD_CRC_FAIL; + SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); + return(errorstatus); + } + + /* Check response received is of desired command */ + if (SDIO_GetCommandResponse() != cmd) + { + errorstatus = SD_ILLEGAL_CMD; + return(errorstatus); + } + + /* Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + /* We have received response, retrieve it. */ + response_r1 = SDIO_GetResponse(SDIO_RESP1); + + if (SD_ALLZERO == (response_r1 & (SD_R6_GENERAL_UNKNOWN_ERROR | SD_R6_ILLEGAL_CMD | SD_R6_COM_CRC_FAILED))) + { + *prca = (uint16_t) (response_r1 >> 16); + return(errorstatus); + } + + if (response_r1 & SD_R6_GENERAL_UNKNOWN_ERROR) + { + return(SD_GENERAL_UNKNOWN_ERROR); + } + + if (response_r1 & SD_R6_ILLEGAL_CMD) + { + return(SD_ILLEGAL_CMD); + } + + if (response_r1 & SD_R6_COM_CRC_FAILED) + { + return(SD_COM_CRC_FAILED); + } + return(errorstatus); - } - else if (status & SDIO_FLAG_CCRCFAIL) - { - errorstatus = SD_CMD_CRC_FAIL; - SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); - return(errorstatus); - } - - /* Check response received is of desired command */ - if (SDIO_GetCommandResponse() != cmd) - { - errorstatus = SD_ILLEGAL_CMD; - return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - /* We have received response, retrieve it. */ - response_r1 = SDIO_GetResponse(SDIO_RESP1); - - if (SD_ALLZERO == (response_r1 & (SD_R6_GENERAL_UNKNOWN_ERROR | SD_R6_ILLEGAL_CMD | SD_R6_COM_CRC_FAILED))) - { - *prca = (uint16_t) (response_r1 >> 16); - return(errorstatus); - } - - if (response_r1 & SD_R6_GENERAL_UNKNOWN_ERROR) - { - return(SD_GENERAL_UNKNOWN_ERROR); - } - - if (response_r1 & SD_R6_ILLEGAL_CMD) - { - return(SD_ILLEGAL_CMD); - } - - if (response_r1 & SD_R6_COM_CRC_FAILED) - { - return(SD_COM_CRC_FAILED); - } - - return(errorstatus); } /** @@ -2486,111 +2486,111 @@ static SD_Error CmdResp6Error(uint8_t cmd, uint16_t *prca) */ static SD_Error SDEnWideBus(FunctionalState NewState) { - SD_Error errorstatus = SD_OK; + SD_Error errorstatus = SD_OK; - uint32_t scr[2] = {0, 0}; + uint32_t scr[2] = {0, 0}; - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } - - /* Get SCR Register */ - errorstatus = FindSCR(RCA, scr); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - /* If wide bus operation to be enabled */ - if (NewState == ENABLE) - { - /* If requested card supports wide bus operation */ - if ((scr[1] & SD_WIDE_BUS_SUPPORT) != SD_ALLZERO) + if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) { - /* Send CMD55 APP_CMD with argument as card's RCA.*/ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - if (errorstatus != SD_OK) - { + errorstatus = SD_LOCK_UNLOCK_FAILED; return(errorstatus); - } - - /* Send ACMD6 APP_CMD with argument as 2 for wide bus mode */ - SDIO_CmdInitStructure.SDIO_Argument = 0x2; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_SD_SET_BUSWIDTH; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_APP_SD_SET_BUSWIDTH); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - return(errorstatus); } + + /* Get SCR Register */ + errorstatus = FindSCR(RCA, scr); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /* If wide bus operation to be enabled */ + if (NewState == ENABLE) + { + /* If requested card supports wide bus operation */ + if ((scr[1] & SD_WIDE_BUS_SUPPORT) != SD_ALLZERO) + { + /* Send CMD55 APP_CMD with argument as card's RCA.*/ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_APP_CMD); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /* Send ACMD6 APP_CMD with argument as 2 for wide bus mode */ + SDIO_CmdInitStructure.SDIO_Argument = 0x2; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_SD_SET_BUSWIDTH; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_APP_SD_SET_BUSWIDTH); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + return(errorstatus); + } + else + { + errorstatus = SD_REQUEST_NOT_APPLICABLE; + return(errorstatus); + } + } /* If wide bus operation to be disabled */ else { - errorstatus = SD_REQUEST_NOT_APPLICABLE; - return(errorstatus); + /* If requested card supports 1 bit mode operation */ + if ((scr[1] & SD_SINGLE_BUS_SUPPORT) != SD_ALLZERO) + { + /* Send CMD55 APP_CMD with argument as card's RCA.*/ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + + errorstatus = CmdResp1Error(SDIO_APP_CMD); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /* Send ACMD6 APP_CMD with argument as 2 for wide bus mode */ + SDIO_CmdInitStructure.SDIO_Argument = 0x00; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_SD_SET_BUSWIDTH; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_APP_SD_SET_BUSWIDTH); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + return(errorstatus); + } + else + { + errorstatus = SD_REQUEST_NOT_APPLICABLE; + return(errorstatus); + } } - } /* If wide bus operation to be disabled */ - else - { - /* If requested card supports 1 bit mode operation */ - if ((scr[1] & SD_SINGLE_BUS_SUPPORT) != SD_ALLZERO) - { - /* Send CMD55 APP_CMD with argument as card's RCA.*/ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - /* Send ACMD6 APP_CMD with argument as 2 for wide bus mode */ - SDIO_CmdInitStructure.SDIO_Argument = 0x00; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_SD_SET_BUSWIDTH; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_APP_SD_SET_BUSWIDTH); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - return(errorstatus); - } - else - { - errorstatus = SD_REQUEST_NOT_APPLICABLE; - return(errorstatus); - } - } } /** @@ -2601,155 +2601,155 @@ static SD_Error SDEnWideBus(FunctionalState NewState) */ static SD_Error IsCardProgramming(uint8_t *pstatus) { - SD_Error errorstatus = SD_OK; - __IO uint32_t respR1 = 0, status = 0; + SD_Error errorstatus = SD_OK; + __IO uint32_t respR1 = 0, status = 0; - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); - status = SDIO->STA; - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) - { status = SDIO->STA; - } + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) + { + status = SDIO->STA; + } + + if (status & SDIO_FLAG_CTIMEOUT) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + else if (status & SDIO_FLAG_CCRCFAIL) + { + errorstatus = SD_CMD_CRC_FAIL; + SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); + return(errorstatus); + } + + status = (uint32_t)SDIO_GetCommandResponse(); + + /* Check response received is of desired command */ + if (status != SDIO_SEND_STATUS) + { + errorstatus = SD_ILLEGAL_CMD; + return(errorstatus); + } + + /* Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + + /* We have received response, retrieve it for analysis */ + respR1 = SDIO_GetResponse(SDIO_RESP1); + + /* Find out card status */ + *pstatus = (uint8_t) ((respR1 >> 9) & 0x0000000F); + + if ((respR1 & SD_OCR_ERRORBITS) == SD_ALLZERO) + { + return(errorstatus); + } + + if (respR1 & SD_OCR_ADDR_OUT_OF_RANGE) + { + return(SD_ADDR_OUT_OF_RANGE); + } + + if (respR1 & SD_OCR_ADDR_MISALIGNED) + { + return(SD_ADDR_MISALIGNED); + } + + if (respR1 & SD_OCR_BLOCK_LEN_ERR) + { + return(SD_BLOCK_LEN_ERR); + } + + if (respR1 & SD_OCR_ERASE_SEQ_ERR) + { + return(SD_ERASE_SEQ_ERR); + } + + if (respR1 & SD_OCR_BAD_ERASE_PARAM) + { + return(SD_BAD_ERASE_PARAM); + } + + if (respR1 & SD_OCR_WRITE_PROT_VIOLATION) + { + return(SD_WRITE_PROT_VIOLATION); + } + + if (respR1 & SD_OCR_LOCK_UNLOCK_FAILED) + { + return(SD_LOCK_UNLOCK_FAILED); + } + + if (respR1 & SD_OCR_COM_CRC_FAILED) + { + return(SD_COM_CRC_FAILED); + } + + if (respR1 & SD_OCR_ILLEGAL_CMD) + { + return(SD_ILLEGAL_CMD); + } + + if (respR1 & SD_OCR_CARD_ECC_FAILED) + { + return(SD_CARD_ECC_FAILED); + } + + if (respR1 & SD_OCR_CC_ERROR) + { + return(SD_CC_ERROR); + } + + if (respR1 & SD_OCR_GENERAL_UNKNOWN_ERROR) + { + return(SD_GENERAL_UNKNOWN_ERROR); + } + + if (respR1 & SD_OCR_STREAM_READ_UNDERRUN) + { + return(SD_STREAM_READ_UNDERRUN); + } + + if (respR1 & SD_OCR_STREAM_WRITE_OVERRUN) + { + return(SD_STREAM_WRITE_OVERRUN); + } + + if (respR1 & SD_OCR_CID_CSD_OVERWRIETE) + { + return(SD_CID_CSD_OVERWRITE); + } + + if (respR1 & SD_OCR_WP_ERASE_SKIP) + { + return(SD_WP_ERASE_SKIP); + } + + if (respR1 & SD_OCR_CARD_ECC_DISABLED) + { + return(SD_CARD_ECC_DISABLED); + } + + if (respR1 & SD_OCR_ERASE_RESET) + { + return(SD_ERASE_RESET); + } + + if (respR1 & SD_OCR_AKE_SEQ_ERROR) + { + return(SD_AKE_SEQ_ERROR); + } - if (status & SDIO_FLAG_CTIMEOUT) - { - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); return(errorstatus); - } - else if (status & SDIO_FLAG_CCRCFAIL) - { - errorstatus = SD_CMD_CRC_FAIL; - SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); - return(errorstatus); - } - - status = (uint32_t)SDIO_GetCommandResponse(); - - /* Check response received is of desired command */ - if (status != SDIO_SEND_STATUS) - { - errorstatus = SD_ILLEGAL_CMD; - return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - - /* We have received response, retrieve it for analysis */ - respR1 = SDIO_GetResponse(SDIO_RESP1); - - /* Find out card status */ - *pstatus = (uint8_t) ((respR1 >> 9) & 0x0000000F); - - if ((respR1 & SD_OCR_ERRORBITS) == SD_ALLZERO) - { - return(errorstatus); - } - - if (respR1 & SD_OCR_ADDR_OUT_OF_RANGE) - { - return(SD_ADDR_OUT_OF_RANGE); - } - - if (respR1 & SD_OCR_ADDR_MISALIGNED) - { - return(SD_ADDR_MISALIGNED); - } - - if (respR1 & SD_OCR_BLOCK_LEN_ERR) - { - return(SD_BLOCK_LEN_ERR); - } - - if (respR1 & SD_OCR_ERASE_SEQ_ERR) - { - return(SD_ERASE_SEQ_ERR); - } - - if (respR1 & SD_OCR_BAD_ERASE_PARAM) - { - return(SD_BAD_ERASE_PARAM); - } - - if (respR1 & SD_OCR_WRITE_PROT_VIOLATION) - { - return(SD_WRITE_PROT_VIOLATION); - } - - if (respR1 & SD_OCR_LOCK_UNLOCK_FAILED) - { - return(SD_LOCK_UNLOCK_FAILED); - } - - if (respR1 & SD_OCR_COM_CRC_FAILED) - { - return(SD_COM_CRC_FAILED); - } - - if (respR1 & SD_OCR_ILLEGAL_CMD) - { - return(SD_ILLEGAL_CMD); - } - - if (respR1 & SD_OCR_CARD_ECC_FAILED) - { - return(SD_CARD_ECC_FAILED); - } - - if (respR1 & SD_OCR_CC_ERROR) - { - return(SD_CC_ERROR); - } - - if (respR1 & SD_OCR_GENERAL_UNKNOWN_ERROR) - { - return(SD_GENERAL_UNKNOWN_ERROR); - } - - if (respR1 & SD_OCR_STREAM_READ_UNDERRUN) - { - return(SD_STREAM_READ_UNDERRUN); - } - - if (respR1 & SD_OCR_STREAM_WRITE_OVERRUN) - { - return(SD_STREAM_WRITE_OVERRUN); - } - - if (respR1 & SD_OCR_CID_CSD_OVERWRIETE) - { - return(SD_CID_CSD_OVERWRITE); - } - - if (respR1 & SD_OCR_WP_ERASE_SKIP) - { - return(SD_WP_ERASE_SKIP); - } - - if (respR1 & SD_OCR_CARD_ECC_DISABLED) - { - return(SD_CARD_ECC_DISABLED); - } - - if (respR1 & SD_OCR_ERASE_RESET) - { - return(SD_ERASE_RESET); - } - - if (respR1 & SD_OCR_AKE_SEQ_ERROR) - { - return(SD_AKE_SEQ_ERROR); - } - - return(errorstatus); } /** @@ -2760,111 +2760,111 @@ static SD_Error IsCardProgramming(uint8_t *pstatus) */ static SD_Error FindSCR(uint16_t rca, uint32_t *pscr) { - uint32_t index = 0; - SD_Error errorstatus = SD_OK; - uint32_t tempscr[2] = {0, 0}; + uint32_t index = 0; + SD_Error errorstatus = SD_OK; + uint32_t tempscr[2] = {0, 0}; - /* Set Block Size To 8 Bytes */ - /* Send CMD55 APP_CMD with argument as card's RCA */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)8; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); + /* Set Block Size To 8 Bytes */ + /* Send CMD55 APP_CMD with argument as card's RCA */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)8; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); + errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - /* Send CMD55 APP_CMD with argument as card's RCA */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 8; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_8b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; - SDIO_DataConfig(&SDIO_DataInitStructure); - - /* make a delay */ - { - volatile uint32_t delay; - for(delay = 0; delay < 20; delay++); - } - - /* Send ACMD51 SD_APP_SEND_SCR with argument as 0 */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_APP_SEND_SCR; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SD_APP_SEND_SCR); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - while (!(SDIO->STA & (SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) - { - if (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) + if (errorstatus != SD_OK) { - *(tempscr + index) = SDIO_ReadData(); - index++; + return(errorstatus); } - } - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; + /* Send CMD55 APP_CMD with argument as card's RCA */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_APP_CMD); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = 8; + SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_8b; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + /* make a delay */ + { + volatile uint32_t delay; + for(delay = 0; delay < 20; delay++); + } + + /* Send ACMD51 SD_APP_SEND_SCR with argument as 0 */ + SDIO_CmdInitStructure.SDIO_Argument = 0x0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_APP_SEND_SCR; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SDIO_SD_APP_SEND_SCR); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + while (!(SDIO->STA & (SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) + { + if (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) + { + *(tempscr + index) = SDIO_ReadData(); + index++; + } + } + + if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); + errorstatus = SD_DATA_TIMEOUT; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); + errorstatus = SD_DATA_CRC_FAIL; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_RXOVERR); + errorstatus = SD_RX_OVERRUN; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_STBITERR); + errorstatus = SD_START_BIT_ERR; + return(errorstatus); + } + + /* Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + *(pscr + 1) = ((tempscr[0] & SD_0TO7BITS) << 24) | ((tempscr[0] & SD_8TO15BITS) << 8) | ((tempscr[0] & SD_16TO23BITS) >> 8) | ((tempscr[0] & SD_24TO31BITS) >> 24); + + *(pscr) = ((tempscr[1] & SD_0TO7BITS) << 24) | ((tempscr[1] & SD_8TO15BITS) << 8) | ((tempscr[1] & SD_16TO23BITS) >> 8) | ((tempscr[1] & SD_24TO31BITS) >> 24); + return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_RXOVERR); - errorstatus = SD_RX_OVERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - *(pscr + 1) = ((tempscr[0] & SD_0TO7BITS) << 24) | ((tempscr[0] & SD_8TO15BITS) << 8) | ((tempscr[0] & SD_16TO23BITS) >> 8) | ((tempscr[0] & SD_24TO31BITS) >> 24); - - *(pscr) = ((tempscr[1] & SD_0TO7BITS) << 24) | ((tempscr[1] & SD_8TO15BITS) << 8) | ((tempscr[1] & SD_16TO23BITS) >> 8) | ((tempscr[1] & SD_24TO31BITS) >> 24); - - return(errorstatus); } /** @@ -2875,14 +2875,14 @@ static SD_Error FindSCR(uint16_t rca, uint32_t *pscr) */ static uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes) { - uint8_t count = 0; + uint8_t count = 0; - while (NumberOfBytes != 1) - { - NumberOfBytes >>= 1; - count++; - } - return(count); + while (NumberOfBytes != 1) + { + NumberOfBytes >>= 1; + count++; + } + return(count); } /** @@ -2892,20 +2892,20 @@ static uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes) */ static void GPIO_Configuration(void) { - GPIO_InitTypeDef GPIO_InitStructure; + GPIO_InitTypeDef GPIO_InitStructure; - /* GPIOC and GPIOD Periph clock enable */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE); + /* GPIOC and GPIOD Periph clock enable */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE); - /* Configure PC.08, PC.09, PC.10, PC.11, PC.12 pin: D0, D1, D2, D3, CLK pin */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOC, &GPIO_InitStructure); + /* Configure PC.08, PC.09, PC.10, PC.11, PC.12 pin: D0, D1, D2, D3, CLK pin */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOC, &GPIO_InitStructure); - /* Configure PD.02 CMD line */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; - GPIO_Init(GPIOD, &GPIO_InitStructure); + /* Configure PD.02 CMD line */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; + GPIO_Init(GPIOD, &GPIO_InitStructure); } /** @@ -2916,29 +2916,29 @@ static void GPIO_Configuration(void) */ static void DMA_TxConfiguration(uint32_t *BufferSRC, uint32_t BufferSize) { - DMA_InitTypeDef DMA_InitStructure; + DMA_InitTypeDef DMA_InitStructure; - DMA_ClearFlag(DMA2_FLAG_TC4 | DMA2_FLAG_TE4 | DMA2_FLAG_HT4 | DMA2_FLAG_GL4); + DMA_ClearFlag(DMA2_FLAG_TC4 | DMA2_FLAG_TE4 | DMA2_FLAG_HT4 | DMA2_FLAG_GL4); - /* DMA2 Channel4 disable */ - DMA_Cmd(DMA2_Channel4, DISABLE); + /* DMA2 Channel4 disable */ + DMA_Cmd(DMA2_Channel4, DISABLE); - /* DMA2 Channel4 Config */ - DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_Address; - DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferSRC; - DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; - DMA_InitStructure.DMA_BufferSize = BufferSize / 4; - DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; - DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; - DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; - DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; - DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; - DMA_InitStructure.DMA_Priority = DMA_Priority_High; - DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; - DMA_Init(DMA2_Channel4, &DMA_InitStructure); + /* DMA2 Channel4 Config */ + DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_Address; + DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferSRC; + DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; + DMA_InitStructure.DMA_BufferSize = BufferSize / 4; + DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; + DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; + DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; + DMA_InitStructure.DMA_Priority = DMA_Priority_High; + DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; + DMA_Init(DMA2_Channel4, &DMA_InitStructure); - /* DMA2 Channel4 enable */ - DMA_Cmd(DMA2_Channel4, ENABLE); + /* DMA2 Channel4 enable */ + DMA_Cmd(DMA2_Channel4, ENABLE); } /** @@ -2949,29 +2949,29 @@ static void DMA_TxConfiguration(uint32_t *BufferSRC, uint32_t BufferSize) */ static void DMA_RxConfiguration(uint32_t *BufferDST, uint32_t BufferSize) { - DMA_InitTypeDef DMA_InitStructure; + DMA_InitTypeDef DMA_InitStructure; - DMA_ClearFlag(DMA2_FLAG_TC4 | DMA2_FLAG_TE4 | DMA2_FLAG_HT4 | DMA2_FLAG_GL4); + DMA_ClearFlag(DMA2_FLAG_TC4 | DMA2_FLAG_TE4 | DMA2_FLAG_HT4 | DMA2_FLAG_GL4); - /* DMA2 Channel4 disable */ - DMA_Cmd(DMA2_Channel4, DISABLE); + /* DMA2 Channel4 disable */ + DMA_Cmd(DMA2_Channel4, DISABLE); - /* DMA2 Channel4 Config */ - DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_Address; - DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferDST; - DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; - DMA_InitStructure.DMA_BufferSize = BufferSize / 4; - DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; - DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; - DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; - DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; - DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; - DMA_InitStructure.DMA_Priority = DMA_Priority_High; - DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; - DMA_Init(DMA2_Channel4, &DMA_InitStructure); + /* DMA2 Channel4 Config */ + DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_Address; + DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferDST; + DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; + DMA_InitStructure.DMA_BufferSize = BufferSize / 4; + DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; + DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; + DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; + DMA_InitStructure.DMA_Priority = DMA_Priority_High; + DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; + DMA_Init(DMA2_Channel4, &DMA_InitStructure); - /* DMA2 Channel4 enable */ - DMA_Cmd(DMA2_Channel4, ENABLE); + /* DMA2 Channel4 enable */ + DMA_Cmd(DMA2_Channel4, ENABLE); } /** @@ -3003,49 +3003,49 @@ static rt_uint8_t _sdcard_buffer[SECTOR_SIZE]; /* RT-Thread Device Driver Interface */ static rt_err_t rt_sdcard_init(rt_device_t dev) { - NVIC_InitTypeDef NVIC_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; - NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); + NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); - if (rt_sem_init(&sd_lock, "sdlock", 1, RT_IPC_FLAG_FIFO) != RT_EOK) - { - rt_kprintf("init sd lock semaphore failed\n"); - } + if (rt_sem_init(&sd_lock, "sdlock", 1, RT_IPC_FLAG_FIFO) != RT_EOK) + { + rt_kprintf("init sd lock semaphore failed\n"); + } - return RT_EOK; + return RT_EOK; } static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag) { - return RT_EOK; + return RT_EOK; } static rt_err_t rt_sdcard_close(rt_device_t dev) { - return RT_EOK; + return RT_EOK; } static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) { - SD_Error status; - rt_uint32_t retry; - rt_uint32_t factor; + SD_Error status; + rt_uint32_t retry; + rt_uint32_t factor; - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1; - else factor = SECTOR_SIZE; + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1; + else factor = SECTOR_SIZE; - rt_sem_take(&sd_lock, RT_WAITING_FOREVER); + rt_sem_take(&sd_lock, RT_WAITING_FOREVER); retry = 3; while(retry) { /* read all sectors */ if (((rt_uint32_t)buffer % 4 != 0) || - ((rt_uint32_t)buffer > 0x20080000)) + ((rt_uint32_t)buffer > 0x20080000)) { rt_uint32_t index; @@ -3053,7 +3053,7 @@ static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_ for (index = 0; index < size; index ++) { status = SD_ReadBlock((part.offset + index + pos) * factor, - (uint32_t*)_sdcard_buffer, SECTOR_SIZE); + (uint32_t*)_sdcard_buffer, SECTOR_SIZE); if (status != SD_OK) break; @@ -3066,12 +3066,12 @@ static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_ if (size == 1) { status = SD_ReadBlock((part.offset + pos) * factor, - (uint32_t*)buffer, SECTOR_SIZE); + (uint32_t*)buffer, SECTOR_SIZE); } else { status = SD_ReadMultiBlocks((part.offset + pos) * factor, - (uint32_t*)buffer, SECTOR_SIZE, size); + (uint32_t*)buffer, SECTOR_SIZE, size); } } @@ -3079,29 +3079,29 @@ static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_ retry --; } - rt_sem_release(&sd_lock); + rt_sem_release(&sd_lock); - if (status == SD_OK) return size; + if (status == SD_OK) return size; - rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer); - return 0; + rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer); + return 0; } static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) { - SD_Error status; - rt_uint32_t factor; + SD_Error status; + rt_uint32_t factor; - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1; - else factor = SECTOR_SIZE; + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1; + else factor = SECTOR_SIZE; - rt_sem_take(&sd_lock, RT_WAITING_FOREVER); + rt_sem_take(&sd_lock, RT_WAITING_FOREVER); - /* read all sectors */ - if (((rt_uint32_t)buffer % 4 != 0) || - ((rt_uint32_t)buffer > 0x20080000)) - { - rt_uint32_t index; + /* read all sectors */ + if (((rt_uint32_t)buffer % 4 != 0) || + ((rt_uint32_t)buffer > 0x20080000)) + { + rt_uint32_t index; /* which is not alignment with 4 or not chip SRAM */ for (index = 0; index < size; index ++) @@ -3110,31 +3110,31 @@ static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buf rt_memcpy(_sdcard_buffer, ((rt_uint8_t*)buffer + index * SECTOR_SIZE), SECTOR_SIZE); status = SD_WriteBlock((part.offset + index + pos) * factor, - (uint32_t*)_sdcard_buffer, SECTOR_SIZE); + (uint32_t*)_sdcard_buffer, SECTOR_SIZE); if (status != SD_OK) break; } - } - else - { + } + else + { if (size == 1) { status = SD_WriteBlock((part.offset + pos) * factor, - (uint32_t*)buffer, SECTOR_SIZE); + (uint32_t*)buffer, SECTOR_SIZE); } else { status = SD_WriteMultiBlocks((part.offset + pos) * factor, - (uint32_t*)buffer, SECTOR_SIZE, size); + (uint32_t*)buffer, SECTOR_SIZE, size); } - } + } - rt_sem_release(&sd_lock); + rt_sem_release(&sd_lock); - if (status == SD_OK) return size; + if (status == SD_OK) return size; - rt_kprintf("write failed: %d, buffer 0x%08x\n", status, buffer); - return 0; + rt_kprintf("write failed: %d, buffer 0x%08x\n", status, buffer); + return 0; } static rt_err_t rt_sdcard_control(rt_device_t dev, rt_uint8_t cmd, void *args) @@ -3150,16 +3150,16 @@ static rt_err_t rt_sdcard_control(rt_device_t dev, rt_uint8_t cmd, void *args) geometry->bytes_per_sector = 512; geometry->block_size = SDCardInfo.CardBlockSize; - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - geometry->sector_count = (SDCardInfo.SD_csd.DeviceSize + 1) * 1024; - else - geometry->sector_count = SDCardInfo.CardCapacity/SDCardInfo.CardBlockSize; + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + geometry->sector_count = (SDCardInfo.SD_csd.DeviceSize + 1) * 1024; + else + geometry->sector_count = SDCardInfo.CardCapacity/SDCardInfo.CardBlockSize; } - return RT_EOK; + return RT_EOK; } -void rt_hw_sdcard_init() +int rt_hw_sdcard_init(void) { /* SDIO POWER */ GPIO_InitTypeDef GPIO_InitStructure; @@ -3173,74 +3173,75 @@ void rt_hw_sdcard_init() // delay same time for SD card power up if (SD_Init() == SD_OK) - { - SD_Error status; - rt_uint8_t *sector; + { + SD_Error status; + rt_uint8_t *sector; - status = SD_GetCardInfo(&SDCardInfo); - if (status != SD_OK) goto __return; + status = SD_GetCardInfo(&SDCardInfo); + if (status != SD_OK) goto __return; - status = SD_SelectDeselect((u32) (SDCardInfo.RCA << 16)); - if (status != SD_OK) goto __return; + status = SD_SelectDeselect((u32) (SDCardInfo.RCA << 16)); + if (status != SD_OK) goto __return; - SD_EnableWideBusOperation(SDIO_BusWide_4b); - SD_SetDeviceMode(SD_DMA_MODE); + SD_EnableWideBusOperation(SDIO_BusWide_4b); + SD_SetDeviceMode(SD_DMA_MODE); - /* get the first sector to read partition table */ - sector = (rt_uint8_t*) rt_malloc (512); - if (sector == RT_NULL) - { - rt_kprintf("allocate partition sector buffer failed\n"); - return; - } - status = SD_ReadBlock(0, (uint32_t*)sector, 512); - if (status == SD_OK) - { - /* get the first partition */ - if (dfs_filesystem_get_partition(&part, sector, 0) != 0) + /* get the first sector to read partition table */ + sector = (rt_uint8_t*) rt_malloc (512); + if (sector == RT_NULL) + { + rt_kprintf("allocate partition sector buffer failed\n"); + return 0; + } + status = SD_ReadBlock(0, (uint32_t*)sector, 512); + if (status == SD_OK) + { + /* get the first partition */ + if (dfs_filesystem_get_partition(&part, sector, 0) != 0) { /* there is no partition */ part.offset = 0; part.size = 0; } - } - else - { - /* there is no partition table */ - part.offset = 0; - part.size = 0; - } + } + else + { + /* there is no partition table */ + part.offset = 0; + part.size = 0; + } - /* release sector buffer */ - rt_free(sector); + /* release sector buffer */ + rt_free(sector); - /* register sdcard device */ - sdcard_device.type = RT_Device_Class_Block; - sdcard_device.init = rt_sdcard_init; - sdcard_device.open = rt_sdcard_open; - sdcard_device.close = rt_sdcard_close; - sdcard_device.read = rt_sdcard_read; - sdcard_device.write = rt_sdcard_write; - sdcard_device.control = rt_sdcard_control; + /* register sdcard device */ + sdcard_device.type = RT_Device_Class_Block; + sdcard_device.init = rt_sdcard_init; + sdcard_device.open = rt_sdcard_open; + sdcard_device.close = rt_sdcard_close; + sdcard_device.read = rt_sdcard_read; + sdcard_device.write = rt_sdcard_write; + sdcard_device.control = rt_sdcard_control; - /* no private */ - sdcard_device.user_data = &SDCardInfo; + /* no private */ + sdcard_device.user_data = &SDCardInfo; - rt_device_register(&sdcard_device, "sd0", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE); + rt_device_register(&sdcard_device, "sd0", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE); - return; - } + return 0; + } __return: - rt_kprintf("sdcard init failed\n"); + rt_kprintf("sdcard init failed\n"); GPIO_SetBits(GPIOC,GPIO_Pin_6); /* SD card power down */ + + return 0; } +INIT_DEVICE_EXPORT(rt_hw_sdcard_init); void SDIO_IRQHandler(void) { - extern int SD_ProcessIRQSrc(void); - /* enter interrupt */ rt_interrupt_enter(); From 8890e83aa9636a442b75943607cd2be94ef69994 Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 22:54:53 +0800 Subject: [PATCH 07/11] update DM9000 ethernet driver for auto initial. --- bsp/stm32f10x/drivers/dm9000a.c | 5 ++++- bsp/stm32f10x/drivers/dm9000a.h | 2 -- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/bsp/stm32f10x/drivers/dm9000a.c b/bsp/stm32f10x/drivers/dm9000a.c index 4fb7b2251a..a42219a63f 100644 --- a/bsp/stm32f10x/drivers/dm9000a.c +++ b/bsp/stm32f10x/drivers/dm9000a.c @@ -731,7 +731,7 @@ static void FSMC_Configuration() FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); } -void rt_hw_dm9000_init() +int rt_hw_dm9000_init(void) { RCC_Configuration(); NVIC_Configuration(); @@ -771,7 +771,10 @@ void rt_hw_dm9000_init() dm9000_device.parent.eth_tx = rt_dm9000_tx; eth_device_init(&(dm9000_device.parent), "e0"); + + return 0; } +INIT_DEVICE_EXPORT(rt_hw_dm9000_init); void dm9000(void) { diff --git a/bsp/stm32f10x/drivers/dm9000a.h b/bsp/stm32f10x/drivers/dm9000a.h index 9f3c80f3aa..a269f64215 100644 --- a/bsp/stm32f10x/drivers/dm9000a.h +++ b/bsp/stm32f10x/drivers/dm9000a.h @@ -160,6 +160,4 @@ #define GPCR_GEP_CNTL (1<<0) -void rt_hw_dm9000_init(void); - #endif From c44b02f08c4babe00f995363967069c907e8fc03 Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 23:08:46 +0800 Subject: [PATCH 08/11] support auto initial. --- bsp/stm32f10x/applications/application.c | 163 ++++++++++------------- bsp/stm32f10x/applications/startup.c | 82 +++++------- bsp/stm32f10x/drivers/board.c | 93 +++++++------ bsp/stm32f10x/rtconfig.h | 5 +- 4 files changed, 158 insertions(+), 185 deletions(-) diff --git a/bsp/stm32f10x/applications/application.c b/bsp/stm32f10x/applications/application.c index 041405129d..7031711460 100644 --- a/bsp/stm32f10x/applications/application.c +++ b/bsp/stm32f10x/applications/application.c @@ -1,4 +1,3 @@ - /* * File : application.c * This file is part of RT-Thread RTOS @@ -11,6 +10,7 @@ * Change Logs: * Date Author Notes * 2009-01-05 Bernard the first version + * 2013-07-12 aozima update for auto initial. */ /** @@ -21,21 +21,17 @@ #include #include +#ifdef RT_USING_COMPONENTS_INIT +#include +#endif /* RT_USING_COMPONENTS_INIT */ + #ifdef RT_USING_DFS -/* dfs init */ -#include /* dfs filesystem:ELM filesystem init */ #include /* dfs Filesystem APIs */ #include #endif -#ifdef RT_USING_LWIP -#include -#include -#include -#endif - #ifdef RT_USING_RTGUI #include #include @@ -84,127 +80,102 @@ rt_bool_t cali_setup(void) void cali_store(struct calibration_data *data) { rt_kprintf("cali finished (%d, %d), (%d, %d)\n", - data->min_x, - data->max_x, - data->min_y, - data->max_y); + data->min_x, + data->max_x, + data->min_y, + data->max_y); } -#endif +#endif /* RT_USING_RTGUI */ void rt_init_thread_entry(void* parameter) { -/* Filesystem Initialization */ -#ifdef RT_USING_DFS - { - /* init the device filesystem */ - dfs_init(); - -#ifdef RT_USING_DFS_ELMFAT - /* init the elm chan FatFs filesystam*/ - elm_init(); - - /* mount sd card fat partition 1 as root directory */ - if (dfs_mount("sd0", "/", "elm", 0, 0) == 0) - { - rt_kprintf("File System initialized!\n"); - } - else - rt_kprintf("File System initialzation failed!\n"); -#endif - } +#ifdef RT_USING_COMPONENTS_INIT + /* initialization RT-Thread Components */ + rt_components_init(); #endif -/* LwIP Initialization */ -#ifdef RT_USING_LWIP - { - extern void lwip_sys_init(void); +#ifdef RT_USING_FINSH + finsh_set_device(RT_CONSOLE_DEVICE_NAME); +#endif /* RT_USING_FINSH */ - /* register ethernetif device */ - eth_system_device_init(); - -#ifdef STM32F10X_CL - rt_hw_stm32_eth_init(); -#else - /* STM32F103 */ - #if STM32_ETH_IF == 0 - rt_hw_enc28j60_init(); - #elif STM32_ETH_IF == 1 - rt_hw_dm9000_init(); - #endif -#endif - - /* re-init device driver */ - rt_device_init_all(); - - /* init lwip system */ - lwip_sys_init(); - rt_kprintf("TCP/IP initialized!\n"); - } -#endif + /* Filesystem Initialization */ +#if defined(RT_USING_DFS) && defined(RT_USING_DFS_ELMFAT) + /* mount sd card fat partition 1 as root directory */ + if (dfs_mount("sd0", "/", "elm", 0, 0) == 0) + { + rt_kprintf("File System initialized!\n"); + } + else + rt_kprintf("File System initialzation failed!\n"); +#endif /* RT_USING_DFS */ #ifdef RT_USING_RTGUI - { - extern void rtgui_system_server_init(void); - extern void rt_hw_lcd_init(); - extern void rtgui_touch_hw_init(void); + { + extern void rtgui_system_server_init(void); + extern void rt_hw_lcd_init(); + extern void rtgui_touch_hw_init(void); - rt_device_t lcd; + rt_device_t lcd; - /* init lcd */ - rt_hw_lcd_init(); + /* init lcd */ + rt_hw_lcd_init(); - /* init touch panel */ - rtgui_touch_hw_init(); + /* init touch panel */ + rtgui_touch_hw_init(); - /* re-init device driver */ - rt_device_init_all(); + /* re-init device driver */ + rt_device_init_all(); - /* find lcd device */ - lcd = rt_device_find("lcd"); + /* find lcd device */ + lcd = rt_device_find("lcd"); - /* set lcd device as rtgui graphic driver */ - rtgui_graphic_set_device(lcd); + /* set lcd device as rtgui graphic driver */ + rtgui_graphic_set_device(lcd); - /* init rtgui system server */ - rtgui_system_server_init(); + /* init rtgui system server */ + rtgui_system_server_init(); calibration_set_restore(cali_setup); calibration_set_after(cali_store); calibration_init(); - } + } #endif /* #ifdef RT_USING_RTGUI */ } -int rt_application_init() +int rt_application_init(void) { - rt_thread_t init_thread; + rt_thread_t init_thread; - rt_err_t result; + rt_err_t result; /* init led thread */ - result = rt_thread_init(&led_thread, - "led", - led_thread_entry, RT_NULL, - (rt_uint8_t*)&led_stack[0], sizeof(led_stack), 20, 5); - if (result == RT_EOK) - { + result = rt_thread_init(&led_thread, + "led", + led_thread_entry, + RT_NULL, + (rt_uint8_t*)&led_stack[0], + sizeof(led_stack), + 20, + 5); + if (result == RT_EOK) + { rt_thread_startup(&led_thread); - } + } #if (RT_THREAD_PRIORITY_MAX == 32) - init_thread = rt_thread_create("init", - rt_init_thread_entry, RT_NULL, - 2048, 8, 20); + init_thread = rt_thread_create("init", + rt_init_thread_entry, RT_NULL, + 2048, 8, 20); #else - init_thread = rt_thread_create("init", - rt_init_thread_entry, RT_NULL, - 2048, 80, 20); + init_thread = rt_thread_create("init", + rt_init_thread_entry, RT_NULL, + 2048, 80, 20); #endif - if (init_thread != RT_NULL) - rt_thread_startup(init_thread); + if (init_thread != RT_NULL) + rt_thread_startup(init_thread); - return 0; + return 0; } /*@}*/ diff --git a/bsp/stm32f10x/applications/startup.c b/bsp/stm32f10x/applications/startup.c index 57afa388d0..d8deeedb86 100644 --- a/bsp/stm32f10x/applications/startup.c +++ b/bsp/stm32f10x/applications/startup.c @@ -24,10 +24,6 @@ /*@{*/ extern int rt_application_init(void); -#ifdef RT_USING_FINSH -extern void finsh_system_init(void); -extern void finsh_set_device(const char* device); -#endif #ifdef __CC_ARM extern int Image$$RW_IRAM1$$ZI$$Limit; @@ -48,11 +44,11 @@ extern int __bss_end; *******************************************************************************/ void assert_failed(u8* file, u32 line) { - rt_kprintf("\n\r Wrong parameter value detected on\r\n"); - rt_kprintf(" file %s\r\n", file); - rt_kprintf(" line %d\r\n", line); + rt_kprintf("\n\r Wrong parameter value detected on\r\n"); + rt_kprintf(" file %s\r\n", file); + rt_kprintf(" line %d\r\n", line); - while (1) ; + while (1) ; } /** @@ -60,67 +56,61 @@ void assert_failed(u8* file, u32 line) */ void rtthread_startup(void) { - /* init board */ - rt_hw_board_init(); + /* init board */ + rt_hw_board_init(); - /* show version */ - rt_show_version(); + /* show version */ + rt_show_version(); - /* init kernel object */ - rt_system_object_init(); + /* init kernel object */ + rt_system_object_init(); - /* init timer system */ - rt_system_timer_init(); + /* init timer system */ + rt_system_timer_init(); #ifdef RT_USING_HEAP #if STM32_EXT_SRAM - rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END); + rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END); #else - #ifdef __CC_ARM - rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END); - #elif __ICCARM__ - rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END); - #else - /* init memory system */ - rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END); - #endif +#ifdef __CC_ARM + rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END); +#elif __ICCARM__ + rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END); +#else + /* init memory system */ + rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END); +#endif #endif /* STM32_EXT_SRAM */ #endif /* RT_USING_HEAP */ - /* init scheduler system */ - rt_system_scheduler_init(); + /* init scheduler system */ + rt_system_scheduler_init(); /* init timer thread */ rt_system_timer_thread_init(); - /* init application */ - rt_application_init(); + /* init application */ + rt_application_init(); -#ifdef RT_USING_FINSH - /* init finsh */ - finsh_system_init(); - finsh_set_device(RT_CONSOLE_DEVICE_NAME); -#endif + /* init idle thread */ + rt_thread_idle_init(); - /* init idle thread */ - rt_thread_idle_init(); + /* start scheduler */ + rt_system_scheduler_start(); - /* start scheduler */ - rt_system_scheduler_start(); - - /* never reach here */ - return ; + /* never reach here */ + return ; } int main(void) { - /* disable interrupt first */ - rt_hw_interrupt_disable(); + /* disable interrupt first */ + rt_hw_interrupt_disable(); - /* startup RT-Thread RTOS */ - rtthread_startup(); + /* startup RT-Thread RTOS */ + rtthread_startup(); - return 0; + return 0; } /*@}*/ diff --git a/bsp/stm32f10x/drivers/board.c b/bsp/stm32f10x/drivers/board.c index dd2b7b19df..a78428e711 100644 --- a/bsp/stm32f10x/drivers/board.c +++ b/bsp/stm32f10x/drivers/board.c @@ -10,6 +10,7 @@ * Change Logs: * Date Author Notes * 2009-01-05 Bernard first implementation + * 2013-07-12 aozima update for auto initial. */ #include @@ -19,6 +20,10 @@ #include "stm32f10x_fsmc.h" #include "board.h" +#ifdef RT_USING_COMPONENTS_INIT +#include +#endif /* RT_USING_COMPONENTS_INIT */ + /** * @addtogroup STM32 */ @@ -35,19 +40,19 @@ void NVIC_Configuration(void) { #ifdef VECT_TAB_RAM - /* Set the Vector Table base location at 0x20000000 */ - NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); + /* Set the Vector Table base location at 0x20000000 */ + NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); #else /* VECT_TAB_FLASH */ - /* Set the Vector Table base location at 0x08000000 */ - NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); + /* Set the Vector Table base location at 0x08000000 */ + NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); #endif } #if STM32_EXT_SRAM void EXT_SRAM_Configuration(void) { - FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; - FSMC_NORSRAMTimingInitTypeDef p; + FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; + FSMC_NORSRAMTimingInitTypeDef p; /* FSMC GPIO configure */ { @@ -117,35 +122,35 @@ void EXT_SRAM_Configuration(void) } /* FSMC GPIO configure */ - /*-- FSMC Configuration ------------------------------------------------------*/ - p.FSMC_AddressSetupTime = 0; - p.FSMC_AddressHoldTime = 0; - p.FSMC_DataSetupTime = 2; - p.FSMC_BusTurnAroundDuration = 0; - p.FSMC_CLKDivision = 0; - p.FSMC_DataLatency = 0; - p.FSMC_AccessMode = FSMC_AccessMode_A; + /*-- FSMC Configuration ------------------------------------------------------*/ + p.FSMC_AddressSetupTime = 0; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = 2; + p.FSMC_BusTurnAroundDuration = 0; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; - FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; - FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; - FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; - FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; - FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; - FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; - FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; - FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; - FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; - FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; - FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); - /* Enable FSMC Bank1_SRAM Bank */ - FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); + /* Enable FSMC Bank1_SRAM Bank */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); } #endif @@ -155,13 +160,13 @@ void EXT_SRAM_Configuration(void) */ void SysTick_Handler(void) { - /* enter interrupt */ - rt_interrupt_enter(); + /* enter interrupt */ + rt_interrupt_enter(); - rt_tick_increase(); + rt_tick_increase(); - /* leave interrupt */ - rt_interrupt_leave(); + /* leave interrupt */ + rt_interrupt_leave(); } /** @@ -169,18 +174,22 @@ void SysTick_Handler(void) */ void rt_hw_board_init(void) { - /* NVIC Configuration */ - NVIC_Configuration(); + /* NVIC Configuration */ + NVIC_Configuration(); /* Configure the SysTick */ SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND ); #if STM32_EXT_SRAM - EXT_SRAM_Configuration(); + EXT_SRAM_Configuration(); #endif - rt_hw_usart_init(); - rt_console_set_device(RT_CONSOLE_DEVICE_NAME); + rt_hw_usart_init(); + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif } /*@}*/ diff --git a/bsp/stm32f10x/rtconfig.h b/bsp/stm32f10x/rtconfig.h index 049b3b5d63..2fe7a0ca41 100644 --- a/bsp/stm32f10x/rtconfig.h +++ b/bsp/stm32f10x/rtconfig.h @@ -56,6 +56,9 @@ /* Using Small MM */ #define RT_USING_SMALL_MEM +// +#define RT_USING_COMPONENTS_INIT + /* SECTION: Device System */ /* Using Device System */ #define RT_USING_DEVICE @@ -78,12 +81,12 @@ /* #define RT_USING_DFS */ #define RT_USING_DFS_ELMFAT -#define RT_DFS_ELM_WORD_ACCESS /* Reentrancy (thread safe) of the FatFs module. */ #define RT_DFS_ELM_REENTRANT /* Number of volumes (logical drives) to be used. */ #define RT_DFS_ELM_DRIVES 2 /* #define RT_DFS_ELM_USE_LFN 1 */ +/* #define RT_DFS_ELM_CODE_PAGE 936 */ #define RT_DFS_ELM_MAX_LFN 255 /* Maximum sector size to be handled. */ #define RT_DFS_ELM_MAX_SECTOR_SIZE 512 From fc9d7926e243707d194355fd4b3ce6987f9bff4b Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 23:09:12 +0800 Subject: [PATCH 09/11] update project support auto initial. --- bsp/stm32f10x/project.Uv2 | 6 +- bsp/stm32f10x/project.ewp | 4130 +++++++++++++++++----------------- bsp/stm32f10x/project.uvproj | 14 +- 3 files changed, 2097 insertions(+), 2053 deletions(-) diff --git a/bsp/stm32f10x/project.Uv2 b/bsp/stm32f10x/project.Uv2 index 7a86b63746..d38d5aa614 100644 --- a/bsp/stm32f10x/project.Uv2 +++ b/bsp/stm32f10x/project.Uv2 @@ -9,6 +9,7 @@ Group (STM32_StdPeriph) Group (Kernel) Group (CORTEX-M3) Group (finsh) +Group (Components) File 1,1, File 1,1, @@ -74,6 +75,7 @@ File 6,1,<..\..\components\finsh\msh.c> File 6,1,<..\..\components\finsh\msh_cmd.c> File 6,1,<..\..\components\finsh\shell.c> File 6,1,<..\..\components\finsh\symbol.c> +File 7,1,<..\..\components\init\components.c> @@ -136,7 +138,7 @@ Options 1,0,0 // Target 'RT-Thread STM32' ADSCMISC () ADSCDEFN (STM32F10X_HD, USE_STDPERIPH_DRIVER) ADSCUDEF () - ADSCINCD (Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\include;drivers;..\..\components\CMSIS\Include;.;applications;..\..\libcpu\arm\cortex-m3;..\..\libcpu\arm\common;..\..\components\finsh;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x) + ADSCINCD (Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\include;drivers;..\..\components\CMSIS\Include;.;applications;..\..\libcpu\arm\cortex-m3;..\..\libcpu\arm\common;..\..\components\init;..\..\components\finsh;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x) ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } ADSAMISC () ADSADEFN () @@ -157,7 +159,7 @@ Options 1,0,0 // Target 'RT-Thread STM32' ADSLDSC () ADSLDIB () ADSLDIC () - ADSLDMC ( --keep __fsym_* --keep __vsym_* ) + ADSLDMC ( --keep __fsym_* --keep __vsym_* --keep __rt_init* ) ADSLDIF () ADSLDDW () OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE) diff --git a/bsp/stm32f10x/project.ewp b/bsp/stm32f10x/project.ewp index 5a73311af8..947313db41 100644 --- a/bsp/stm32f10x/project.ewp +++ b/bsp/stm32f10x/project.ewp @@ -1,2049 +1,2081 @@ - - 2 - - Debug - - ARM - - 1 - - General - 3 - - 21 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 28 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 8 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 14 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - - Release - - ARM - - 0 - - General - 3 - - 21 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 28 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 8 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 14 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - - - Applications - - $PROJ_DIR$\applications\application.c - - - $PROJ_DIR$\applications\startup.c - - - - Drivers - - $PROJ_DIR$\drivers\board.c - - - $PROJ_DIR$\drivers\stm32f10x_it.c - - - $PROJ_DIR$\drivers\led.c - - - $PROJ_DIR$\drivers\serial.c - - - $PROJ_DIR$\drivers\usart.c - - - - STM32_StdPeriph - - $PROJ_DIR$\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c - - - $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c - - - $PROJ_DIR$\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\iar\startup_stm32f10x_hd.s - - - - Kernel - - $PROJ_DIR$\..\..\src\clock.c - - - $PROJ_DIR$\..\..\src\device.c - - - $PROJ_DIR$\..\..\src\idle.c - - - $PROJ_DIR$\..\..\src\ipc.c - - - $PROJ_DIR$\..\..\src\irq.c - - - $PROJ_DIR$\..\..\src\kservice.c - - - $PROJ_DIR$\..\..\src\mem.c - - - $PROJ_DIR$\..\..\src\mempool.c - - - $PROJ_DIR$\..\..\src\object.c - - - $PROJ_DIR$\..\..\src\scheduler.c - - - $PROJ_DIR$\..\..\src\thread.c - - - $PROJ_DIR$\..\..\src\timer.c - - - - CORTEX-M3 - - $PROJ_DIR$\..\..\libcpu\arm\cortex-m3\cpuport.c - - - $PROJ_DIR$\..\..\libcpu\arm\cortex-m3\context_iar.S - - - $PROJ_DIR$\..\..\libcpu\arm\common\backtrace.c - - - $PROJ_DIR$\..\..\libcpu\arm\common\div0.c - - - $PROJ_DIR$\..\..\libcpu\arm\common\showmem.c - - - - finsh - - $PROJ_DIR$\..\..\components\finsh\cmd.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_compiler.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_error.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_heap.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_init.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_node.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_ops.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_parser.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_token.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_var.c - - - $PROJ_DIR$\..\..\components\finsh\finsh_vm.c - - - $PROJ_DIR$\..\..\components\finsh\msh.c - - - $PROJ_DIR$\..\..\components\finsh\msh_cmd.c - - - $PROJ_DIR$\..\..\components\finsh\shell.c - - - $PROJ_DIR$\..\..\components\finsh\symbol.c - - - + + + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 21 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 21 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 28 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 15 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + Applications + + $PROJ_DIR$\applications\application.c + + + $PROJ_DIR$\applications\startup.c + + + + Components + + $PROJ_DIR$\..\..\components\init\components.c + + + + CORTEX-M3 + + $PROJ_DIR$\..\..\libcpu\arm\common\backtrace.c + + + $PROJ_DIR$\..\..\libcpu\arm\cortex-m3\context_iar.S + + + $PROJ_DIR$\..\..\libcpu\arm\cortex-m3\cpuport.c + + + $PROJ_DIR$\..\..\libcpu\arm\common\div0.c + + + $PROJ_DIR$\..\..\libcpu\arm\common\showmem.c + + + + Drivers + + $PROJ_DIR$\drivers\board.c + + + $PROJ_DIR$\drivers\led.c + + + $PROJ_DIR$\drivers\serial.c + + + $PROJ_DIR$\drivers\stm32f10x_it.c + + + $PROJ_DIR$\drivers\usart.c + + + + finsh + + $PROJ_DIR$\..\..\components\finsh\cmd.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_compiler.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_error.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_heap.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_init.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_node.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_ops.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_parser.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_token.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_var.c + + + $PROJ_DIR$\..\..\components\finsh\finsh_vm.c + + + $PROJ_DIR$\..\..\components\finsh\msh.c + + + $PROJ_DIR$\..\..\components\finsh\msh_cmd.c + + + $PROJ_DIR$\..\..\components\finsh\shell.c + + + $PROJ_DIR$\..\..\components\finsh\symbol.c + + + + Kernel + + $PROJ_DIR$\..\..\src\clock.c + + + $PROJ_DIR$\..\..\src\device.c + + + $PROJ_DIR$\..\..\src\idle.c + + + $PROJ_DIR$\..\..\src\ipc.c + + + $PROJ_DIR$\..\..\src\irq.c + + + $PROJ_DIR$\..\..\src\kservice.c + + + $PROJ_DIR$\..\..\src\mem.c + + + $PROJ_DIR$\..\..\src\mempool.c + + + $PROJ_DIR$\..\..\src\object.c + + + $PROJ_DIR$\..\..\src\scheduler.c + + + $PROJ_DIR$\..\..\src\thread.c + + + $PROJ_DIR$\..\..\src\timer.c + + + + STM32_StdPeriph + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c + + + $PROJ_DIR$\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\iar\startup_stm32f10x_hd.s + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c + + + $PROJ_DIR$\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c + + + + + diff --git a/bsp/stm32f10x/project.uvproj b/bsp/stm32f10x/project.uvproj index 9a308910aa..32ac174066 100644 --- a/bsp/stm32f10x/project.uvproj +++ b/bsp/stm32f10x/project.uvproj @@ -351,7 +351,7 @@ STM32F10X_HD, USE_STDPERIPH_DRIVER - .;..\..\components\CMSIS\Include;..\..\components\finsh;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;Libraries\STM32F10x_StdPeriph_Driver\inc;applications;drivers + .;..\..\components\CMSIS\Include;..\..\components\finsh;..\..\components\init;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;Libraries\STM32F10x_StdPeriph_Driver\inc;applications;drivers @@ -382,7 +382,7 @@ - --keep __fsym_* --keep __vsym_* + --keep __fsym_* --keep __vsym_* --keep __rt_init* @@ -739,6 +739,16 @@ + + Components + + + components.c + 1 + ..\..\components\init\components.c + + + From b12f6bbdee29d01e27995bebcce3be82e7e8e308 Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 23:28:24 +0800 Subject: [PATCH 10/11] cleanup code. --- bsp/stm32f10x/applications/startup.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/bsp/stm32f10x/applications/startup.c b/bsp/stm32f10x/applications/startup.c index d8deeedb86..25d947dae9 100644 --- a/bsp/stm32f10x/applications/startup.c +++ b/bsp/stm32f10x/applications/startup.c @@ -62,12 +62,6 @@ void rtthread_startup(void) /* show version */ rt_show_version(); - /* init kernel object */ - rt_system_object_init(); - - /* init timer system */ - rt_system_timer_init(); - #ifdef RT_USING_HEAP #if STM32_EXT_SRAM rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END); From 13c30f92696425d980c5b2712dd8f97f81861f0c Mon Sep 17 00:00:00 2001 From: aozima Date: Fri, 12 Jul 2013 23:32:48 +0800 Subject: [PATCH 11/11] update usart driver: use serial driver component. --- bsp/stm32f10x/drivers/SConscript | 1 - bsp/stm32f10x/drivers/board.h | 5 + bsp/stm32f10x/drivers/serial.c | 418 ------------------ bsp/stm32f10x/drivers/serial.h | 70 ---- bsp/stm32f10x/drivers/stm32f10x_it.c | 99 ----- bsp/stm32f10x/drivers/usart.c | 606 ++++++++++++++------------- bsp/stm32f10x/drivers/usart.h | 3 + bsp/stm32f10x/project.Uv2 | 41 +- bsp/stm32f10x/project.ewp | 23 +- bsp/stm32f10x/project.uvproj | 37 +- bsp/stm32f10x/rtconfig.h | 5 +- 11 files changed, 404 insertions(+), 904 deletions(-) delete mode 100644 bsp/stm32f10x/drivers/serial.c delete mode 100644 bsp/stm32f10x/drivers/serial.h diff --git a/bsp/stm32f10x/drivers/SConscript b/bsp/stm32f10x/drivers/SConscript index a09e059919..ef1e5a13fa 100644 --- a/bsp/stm32f10x/drivers/SConscript +++ b/bsp/stm32f10x/drivers/SConscript @@ -9,7 +9,6 @@ src = Split(""" board.c stm32f10x_it.c led.c -serial.c usart.c """) diff --git a/bsp/stm32f10x/drivers/board.h b/bsp/stm32f10x/drivers/board.h index b33e397954..dc84db9c69 100644 --- a/bsp/stm32f10x/drivers/board.h +++ b/bsp/stm32f10x/drivers/board.h @@ -37,6 +37,11 @@ #define STM32_SRAM_SIZE 64 #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) +/* USART driver select. */ +#define RT_USING_UART1 +#define RT_USING_UART2 +#define RT_USING_UART3 + #endif /* __BOARD_H__ */ // <<< Use Configuration Wizard in Context Menu >>> diff --git a/bsp/stm32f10x/drivers/serial.c b/bsp/stm32f10x/drivers/serial.c deleted file mode 100644 index 13bf961e20..0000000000 --- a/bsp/stm32f10x/drivers/serial.c +++ /dev/null @@ -1,418 +0,0 @@ -/* - * File : serial.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-02-05 Bernard first version - * 2009-10-25 Bernard fix rt_serial_read bug when there is no data - * in the buffer. - * 2010-03-29 Bernard cleanup code. - */ - -#include "serial.h" -#include -#include - -static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel, - rt_uint32_t address, rt_uint32_t size); - -/** - * @addtogroup STM32 - */ -/*@{*/ - -/* RT-Thread Device Interface */ -static rt_err_t rt_serial_init (rt_device_t dev) -{ - struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data; - - if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) - { - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - rt_memset(uart->int_rx->rx_buffer, 0, - sizeof(uart->int_rx->rx_buffer)); - uart->int_rx->read_index = 0; - uart->int_rx->save_index = 0; - } - - if (dev->flag & RT_DEVICE_FLAG_DMA_TX) - { - RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL); - uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL; - - /* init data node memory pool */ - rt_mp_init(&(uart->dma_tx->data_node_mp), "dn", - uart->dma_tx->data_node_mem_pool, - sizeof(uart->dma_tx->data_node_mem_pool), - sizeof(struct stm32_serial_data_node)); - } - - /* Enable USART */ - USART_Cmd(uart->uart_device, ENABLE); - - dev->flag |= RT_DEVICE_FLAG_ACTIVATED; - } - - return RT_EOK; -} - -static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag) -{ - return RT_EOK; -} - -static rt_err_t rt_serial_close(rt_device_t dev) -{ - return RT_EOK; -} - -static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) -{ - rt_uint8_t* ptr; - rt_err_t err_code; - struct stm32_serial_device* uart; - - ptr = buffer; - err_code = RT_EOK; - uart = (struct stm32_serial_device*)dev->user_data; - - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - /* interrupt mode Rx */ - while (size) - { - rt_base_t level; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - if (uart->int_rx->read_index != uart->int_rx->save_index) - { - /* read a character */ - *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index]; - size--; - - /* move to next position */ - uart->int_rx->read_index ++; - if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->read_index = 0; - } - else - { - /* set error code */ - err_code = -RT_EEMPTY; - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - break; - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - } - else - { - /* polling mode */ - while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) - { - while (uart->uart_device->SR & USART_FLAG_RXNE) - { - *ptr = uart->uart_device->DR & 0xff; - ptr ++; - } - } - } - - /* set error code */ - rt_set_errno(err_code); - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; -} - -static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel, - rt_uint32_t address, rt_uint32_t size) -{ - RT_ASSERT(dma_channel != RT_NULL); - - /* disable DMA */ - DMA_Cmd(dma_channel, DISABLE); - - /* set buffer address */ - dma_channel->CMAR = address; - /* set size */ - dma_channel->CNDTR = size; - - /* enable DMA */ - DMA_Cmd(dma_channel, ENABLE); -} - -static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) -{ - rt_uint8_t* ptr; - rt_err_t err_code; - struct stm32_serial_device* uart; - - err_code = RT_EOK; - ptr = (rt_uint8_t*)buffer; - uart = (struct stm32_serial_device*)dev->user_data; - - if (dev->flag & RT_DEVICE_FLAG_INT_TX) - { - /* interrupt mode Tx, does not support */ - RT_ASSERT(0); - } - else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) - { - /* DMA mode Tx */ - - /* allocate a data node */ - struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*) - rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER); - if (data_node == RT_NULL) - { - /* set error code */ - err_code = -RT_ENOMEM; - } - else - { - rt_uint32_t level; - - /* fill data node */ - data_node->data_ptr = ptr; - data_node->data_size = size; - - /* insert to data link */ - data_node->next = RT_NULL; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - data_node->prev = uart->dma_tx->list_tail; - if (uart->dma_tx->list_tail != RT_NULL) - uart->dma_tx->list_tail->next = data_node; - uart->dma_tx->list_tail = data_node; - - if (uart->dma_tx->list_head == RT_NULL) - { - /* start DMA to transmit data */ - uart->dma_tx->list_head = data_node; - - /* Enable DMA Channel */ - rt_serial_enable_dma(uart->dma_tx->dma_channel, - (rt_uint32_t)uart->dma_tx->list_head->data_ptr, - uart->dma_tx->list_head->data_size); - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - } - else - { - /* polling mode */ - if (dev->flag & RT_DEVICE_FLAG_STREAM) - { - /* stream mode */ - while (size) - { - if (*ptr == '\n') - { - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = '\r'; - } - - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = (*ptr & 0x1FF); - - ++ptr; --size; - } - } - else - { - /* write data directly */ - while (size) - { - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = (*ptr & 0x1FF); - - ++ptr; --size; - } - } - } - - /* set error code */ - rt_set_errno(err_code); - - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; -} - -static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args) -{ - struct stm32_serial_device* uart; - - RT_ASSERT(dev != RT_NULL); - - uart = (struct stm32_serial_device*)dev->user_data; - switch (cmd) - { - case RT_DEVICE_CTRL_SUSPEND: - /* suspend device */ - dev->flag |= RT_DEVICE_FLAG_SUSPENDED; - USART_Cmd(uart->uart_device, DISABLE); - break; - - case RT_DEVICE_CTRL_RESUME: - /* resume device */ - dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; - USART_Cmd(uart->uart_device, ENABLE); - break; - } - - return RT_EOK; -} - -/* - * serial register for STM32 - * support STM32F103VB and STM32F103ZE - */ -rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial) -{ - RT_ASSERT(device != RT_NULL); - - if ((flag & RT_DEVICE_FLAG_DMA_RX) || - (flag & RT_DEVICE_FLAG_INT_TX)) - { - RT_ASSERT(0); - } - - device->type = RT_Device_Class_Char; - device->rx_indicate = RT_NULL; - device->tx_complete = RT_NULL; - device->init = rt_serial_init; - device->open = rt_serial_open; - device->close = rt_serial_close; - device->read = rt_serial_read; - device->write = rt_serial_write; - device->control = rt_serial_control; - device->user_data = serial; - - /* register a character device */ - return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); -} - -/* ISR for serial interrupt */ -void rt_hw_serial_isr(rt_device_t device) -{ - struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; - - if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) - { - /* interrupt mode receive */ - RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX); - - /* save on rx buffer */ - while (uart->uart_device->SR & USART_FLAG_RXNE) - { - rt_base_t level; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - /* save character */ - uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff; - uart->int_rx->save_index ++; - if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->save_index = 0; - - /* if the next position is read index, discard this 'read char' */ - if (uart->int_rx->save_index == uart->int_rx->read_index) - { - uart->int_rx->read_index ++; - if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->read_index = 0; - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); - - /* invoke callback */ - if (device->rx_indicate != RT_NULL) - { - rt_size_t rx_length; - - /* get rx length */ - rx_length = uart->int_rx->read_index > uart->int_rx->save_index ? - UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index : - uart->int_rx->save_index - uart->int_rx->read_index; - - device->rx_indicate(device, rx_length); - } - } - - if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) - { - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); - } -} - -/* - * ISR for DMA mode Tx - */ -void rt_hw_serial_dma_tx_isr(rt_device_t device) -{ - rt_uint32_t level; - struct stm32_serial_data_node* data_node; - struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; - - /* DMA mode receive */ - RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX); - - /* get the first data node */ - data_node = uart->dma_tx->list_head; - RT_ASSERT(data_node != RT_NULL); - - /* invoke call to notify tx complete */ - if (device->tx_complete != RT_NULL) - device->tx_complete(device, data_node->data_ptr); - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - /* remove list head */ - uart->dma_tx->list_head = data_node->next; - if (uart->dma_tx->list_head == RT_NULL) /* data link empty */ - uart->dma_tx->list_tail = RT_NULL; - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - - /* release data node memory */ - rt_mp_free(data_node); - - if (uart->dma_tx->list_head != RT_NULL) - { - /* transmit next data node */ - rt_serial_enable_dma(uart->dma_tx->dma_channel, - (rt_uint32_t)uart->dma_tx->list_head->data_ptr, - uart->dma_tx->list_head->data_size); - } - else - { - /* no data to be transmitted, disable DMA */ - DMA_Cmd(uart->dma_tx->dma_channel, DISABLE); - } -} - -/*@}*/ diff --git a/bsp/stm32f10x/drivers/serial.h b/bsp/stm32f10x/drivers/serial.h deleted file mode 100644 index 54da702a0e..0000000000 --- a/bsp/stm32f10x/drivers/serial.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * File : serial.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009 - 2010, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-01-05 Bernard first version - * 2010-03-29 Bernard remove interrupt tx and DMA rx mode. - */ -#ifndef __RT_HW_SERIAL_H__ -#define __RT_HW_SERIAL_H__ - -#include -#include - -/* STM32F10x library definitions */ -#include - -#define UART_RX_BUFFER_SIZE 64 -#define UART_TX_DMA_NODE_SIZE 4 - -/* data node for Tx Mode */ -struct stm32_serial_data_node -{ - rt_uint8_t *data_ptr; - rt_size_t data_size; - struct stm32_serial_data_node *next, *prev; -}; -struct stm32_serial_dma_tx -{ - /* DMA Channel */ - DMA_Channel_TypeDef* dma_channel; - - /* data list head and tail */ - struct stm32_serial_data_node *list_head, *list_tail; - - /* data node memory pool */ - struct rt_mempool data_node_mp; - rt_uint8_t data_node_mem_pool[UART_TX_DMA_NODE_SIZE * - (sizeof(struct stm32_serial_data_node) + sizeof(void*))]; -}; - -struct stm32_serial_int_rx -{ - rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE]; - rt_uint32_t read_index, save_index; -}; - -struct stm32_serial_device -{ - USART_TypeDef* uart_device; - - /* rx structure */ - struct stm32_serial_int_rx* int_rx; - - /* tx structure */ - struct stm32_serial_dma_tx* dma_tx; -}; - -rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial); - -void rt_hw_serial_isr(rt_device_t device); -void rt_hw_serial_dma_tx_isr(rt_device_t device); - -#endif diff --git a/bsp/stm32f10x/drivers/stm32f10x_it.c b/bsp/stm32f10x/drivers/stm32f10x_it.c index f521dab52a..bf5cf55565 100644 --- a/bsp/stm32f10x/drivers/stm32f10x_it.c +++ b/bsp/stm32f10x/drivers/stm32f10x_it.c @@ -119,105 +119,6 @@ void DebugMon_Handler(void) /* file (startup_stm32f10x_xx.s). */ /******************************************************************************/ -/******************************************************************************* -* Function Name : DMA1_Channel2_IRQHandler -* Description : This function handles DMA1 Channel 2 interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void DMA1_Channel2_IRQHandler(void) -{ -#ifdef RT_USING_UART3 - extern struct rt_device uart3_device; - extern void rt_hw_serial_dma_tx_isr(struct rt_device *device); - - /* enter interrupt */ - rt_interrupt_enter(); - - if (DMA_GetITStatus(DMA1_IT_TC2)) - { - /* transmission complete, invoke serial dma tx isr */ - rt_hw_serial_dma_tx_isr(&uart3_device); - } - - /* clear DMA flag */ - DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2); - - /* leave interrupt */ - rt_interrupt_leave(); -#endif -} - -/******************************************************************************* -* Function Name : USART1_IRQHandler -* Description : This function handles USART1 global interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void USART1_IRQHandler(void) -{ -#ifdef RT_USING_UART1 - extern struct rt_device uart1_device; - extern void rt_hw_serial_isr(struct rt_device *device); - - /* enter interrupt */ - rt_interrupt_enter(); - - rt_hw_serial_isr(&uart1_device); - - /* leave interrupt */ - rt_interrupt_leave(); -#endif -} - -/******************************************************************************* -* Function Name : USART2_IRQHandler -* Description : This function handles USART2 global interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void USART2_IRQHandler(void) -{ -#ifdef RT_USING_UART2 - extern struct rt_device uart2_device; - extern void rt_hw_serial_isr(struct rt_device *device); - - /* enter interrupt */ - rt_interrupt_enter(); - - rt_hw_serial_isr(&uart2_device); - - /* leave interrupt */ - rt_interrupt_leave(); -#endif -} - -/******************************************************************************* -* Function Name : USART3_IRQHandler -* Description : This function handles USART3 global interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void USART3_IRQHandler(void) -{ -#ifdef RT_USING_UART3 - extern struct rt_device uart3_device; - extern void rt_hw_serial_isr(struct rt_device *device); - - /* enter interrupt */ - rt_interrupt_enter(); - - rt_hw_serial_isr(&uart3_device); - - /* leave interrupt */ - rt_interrupt_leave(); -#endif -} - #ifdef RT_USING_LWIP /******************************************************************************* * Function Name : EXTI4_IRQHandler diff --git a/bsp/stm32f10x/drivers/usart.c b/bsp/stm32f10x/drivers/usart.c index 90a8d500da..ae47db3a14 100644 --- a/bsp/stm32f10x/drivers/usart.c +++ b/bsp/stm32f10x/drivers/usart.c @@ -1,7 +1,7 @@ /* * File : usart.c * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team + * COPYRIGHT (C) 2006-2013, RT-Thread Development Team * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -11,335 +11,365 @@ * Date Author Notes * 2009-01-05 Bernard the first version * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode + * 2013-05-13 aozima update for kehong-lingtai. */ +#include "stm32f10x.h" #include "usart.h" -#include -#include +#include "board.h" -/* - * Use UART1 as console output and finsh input - * interrupt Rx and poll Tx (stream mode) - * - * Use UART2 with interrupt Rx and poll Tx - * Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2 - * - * USART DMA setting on STM32 - * USART1 Tx --> DMA Channel 4 - * USART1 Rx --> DMA Channel 5 - * USART2 Tx --> DMA Channel 7 - * USART2 Rx --> DMA Channel 6 - * USART3 Tx --> DMA Channel 2 - * USART3 Rx --> DMA Channel 3 - */ +#include -#ifdef RT_USING_UART1 -struct stm32_serial_int_rx uart1_int_rx; -struct stm32_serial_device uart1 = -{ - USART1, - &uart1_int_rx, - RT_NULL -}; -struct rt_device uart1_device; -#endif - -#ifdef RT_USING_UART2 -struct stm32_serial_int_rx uart2_int_rx; -struct stm32_serial_device uart2 = -{ - USART2, - &uart2_int_rx, - RT_NULL -}; -struct rt_device uart2_device; -#endif - -#ifdef RT_USING_UART3 -struct stm32_serial_int_rx uart3_int_rx; -struct stm32_serial_dma_tx uart3_dma_tx; -struct stm32_serial_device uart3 = -{ - USART3, - &uart3_int_rx, - &uart3_dma_tx -}; -struct rt_device uart3_device; -#endif - -#define USART1_DR_Base 0x40013804 -#define USART2_DR_Base 0x40004404 -#define USART3_DR_Base 0x40004804 - -/* USART1_REMAP = 0 */ +/* USART1 */ #define UART1_GPIO_TX GPIO_Pin_9 #define UART1_GPIO_RX GPIO_Pin_10 #define UART1_GPIO GPIOA -#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 -#define UART1_TX_DMA DMA1_Channel4 -#define UART1_RX_DMA DMA1_Channel5 -#if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL) -#define UART2_GPIO_TX GPIO_Pin_5 -#define UART2_GPIO_RX GPIO_Pin_6 -#define UART2_GPIO GPIOD -#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 -#else /* for STM32F10X_HD */ -/* USART2_REMAP = 0 */ -#define UART2_GPIO_TX GPIO_Pin_2 -#define UART2_GPIO_RX GPIO_Pin_3 -#define UART2_GPIO GPIOA -#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 -#define UART2_TX_DMA DMA1_Channel7 -#define UART2_RX_DMA DMA1_Channel6 -#endif +/* USART2 */ +#define UART2_GPIO_TX GPIO_Pin_2 +#define UART2_GPIO_RX GPIO_Pin_3 +#define UART2_GPIO GPIOA /* USART3_REMAP[1:0] = 00 */ -#define UART3_GPIO_RX GPIO_Pin_11 #define UART3_GPIO_TX GPIO_Pin_10 +#define UART3_GPIO_RX GPIO_Pin_11 #define UART3_GPIO GPIOB -#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3 -#define UART3_TX_DMA DMA1_Channel2 -#define UART3_RX_DMA DMA1_Channel3 + +/* STM32 uart driver */ +struct stm32_uart +{ + USART_TypeDef* uart_device; + IRQn_Type irq; +}; + +static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg) +{ + struct stm32_uart* uart; + USART_InitTypeDef USART_InitStructure; + + RT_ASSERT(serial != RT_NULL); + RT_ASSERT(cfg != RT_NULL); + + uart = (struct stm32_uart *)serial->parent.user_data; + + USART_InitStructure.USART_BaudRate = cfg->baud_rate; + + if (cfg->data_bits == DATA_BITS_8) + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + + if (cfg->stop_bits == STOP_BITS_1) + USART_InitStructure.USART_StopBits = USART_StopBits_1; + else if (cfg->stop_bits == STOP_BITS_2) + USART_InitStructure.USART_StopBits = USART_StopBits_2; + + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(uart->uart_device, &USART_InitStructure); + + /* Enable USART */ + USART_Cmd(uart->uart_device, ENABLE); + /* enable interrupt */ + USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE); + + return RT_EOK; +} + +static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg) +{ + struct stm32_uart* uart; + + RT_ASSERT(serial != RT_NULL); + uart = (struct stm32_uart *)serial->parent.user_data; + + switch (cmd) + { + case RT_DEVICE_CTRL_CLR_INT: + /* disable rx irq */ + UART_DISABLE_IRQ(uart->irq); + break; + case RT_DEVICE_CTRL_SET_INT: + /* enable rx irq */ + UART_ENABLE_IRQ(uart->irq); + break; + } + + return RT_EOK; +} + +static int stm32_putc(struct rt_serial_device *serial, char c) +{ + struct stm32_uart* uart; + + RT_ASSERT(serial != RT_NULL); + uart = (struct stm32_uart *)serial->parent.user_data; + + while (!(uart->uart_device->SR & USART_FLAG_TXE)); + uart->uart_device->DR = c; + + return 1; +} + +static int stm32_getc(struct rt_serial_device *serial) +{ + int ch; + struct stm32_uart* uart; + + RT_ASSERT(serial != RT_NULL); + uart = (struct stm32_uart *)serial->parent.user_data; + + ch = -1; + if (uart->uart_device->SR & USART_FLAG_RXNE) + { + ch = uart->uart_device->DR & 0xff; + } + + return ch; +} + +static const struct rt_uart_ops stm32_uart_ops = +{ + stm32_configure, + stm32_control, + stm32_putc, + stm32_getc, +}; + +#if defined(RT_USING_UART1) +/* UART1 device driver structure */ +struct serial_ringbuffer uart1_int_rx; +struct stm32_uart uart1 = +{ + USART1, + USART1_IRQn, +}; +struct rt_serial_device serial1; + +void USART1_IRQHandler(void) +{ + struct stm32_uart* uart; + + uart = &uart1; + + /* enter interrupt */ + rt_interrupt_enter(); + if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + { + rt_hw_serial_isr(&serial1); + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); + } + if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) + { + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); + } + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_USING_UART1 */ + +#if defined(RT_USING_UART2) +/* UART1 device driver structure */ +struct serial_ringbuffer uart2_int_rx; +struct stm32_uart uart2 = +{ + USART2, + USART2_IRQn, +}; +struct rt_serial_device serial2; + +void USART2_IRQHandler(void) +{ + struct stm32_uart* uart; + + uart = &uart2; + + /* enter interrupt */ + rt_interrupt_enter(); + if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + { + rt_hw_serial_isr(&serial2); + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); + } + if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) + { + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); + } + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_USING_UART2 */ + +#if defined(RT_USING_UART3) +/* UART1 device driver structure */ +struct serial_ringbuffer uart3_int_rx; +struct stm32_uart uart3 = +{ + USART3, + USART3_IRQn, +}; +struct rt_serial_device serial3; + +void USART3_IRQHandler(void) +{ + struct stm32_uart* uart; + + uart = &uart3; + + /* enter interrupt */ + rt_interrupt_enter(); + if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + { + rt_hw_serial_isr(&serial3); + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); + } + if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) + { + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); + } + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_USING_UART3 */ static void RCC_Configuration(void) { - RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); - #ifdef RT_USING_UART1 - /* Enable USART1 and GPIOA clocks */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE); -#endif + /* Enable UART GPIO clocks */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); + /* Enable UART clock */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); +#endif /* RT_USING_UART1 */ #ifdef RT_USING_UART2 - -#if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)) - /* Enable AFIO and GPIOD clock */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE); - - /* Enable the USART2 Pins Software Remapping */ - GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE); -#else - /* Enable AFIO and GPIOA clock */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE); -#endif - - /* Enable USART2 clock */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); -#endif + /* Enable UART GPIO clocks */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); + /* Enable UART clock */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); +#endif /* RT_USING_UART2 */ #ifdef RT_USING_UART3 - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); - /* Enable USART3 clock */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); - - /* DMA clock enable */ - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); -#endif + /* Enable UART GPIO clocks */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); + /* Enable UART clock */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); +#endif /* RT_USING_UART3 */ } static void GPIO_Configuration(void) { - GPIO_InitTypeDef GPIO_InitStructure; + GPIO_InitTypeDef GPIO_InitStructure; + + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; #ifdef RT_USING_UART1 - /* Configure USART1 Rx (PA.10) as input floating */ - GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_Init(UART1_GPIO, &GPIO_InitStructure); + /* Configure USART Rx/tx PIN */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX; + GPIO_Init(UART1_GPIO, &GPIO_InitStructure); - /* Configure USART1 Tx (PA.09) as alternate function push-pull */ - GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(UART1_GPIO, &GPIO_InitStructure); -#endif + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX; + GPIO_Init(UART1_GPIO, &GPIO_InitStructure); +#endif /* RT_USING_UART1 */ #ifdef RT_USING_UART2 - /* Configure USART2 Rx as input floating */ - GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_Init(UART2_GPIO, &GPIO_InitStructure); + /* Configure USART Rx/tx PIN */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX; + GPIO_Init(UART1_GPIO, &GPIO_InitStructure); - /* Configure USART2 Tx as alternate function push-pull */ - GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(UART2_GPIO, &GPIO_InitStructure); -#endif + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX; + GPIO_Init(UART2_GPIO, &GPIO_InitStructure); +#endif /* RT_USING_UART2 */ #ifdef RT_USING_UART3 - /* Configure USART3 Rx as input floating */ - GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_Init(UART3_GPIO, &GPIO_InitStructure); + /* Configure USART Rx/tx PIN */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX; + GPIO_Init(UART3_GPIO, &GPIO_InitStructure); - /* Configure USART3 Tx as alternate function push-pull */ - GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(UART3_GPIO, &GPIO_InitStructure); -#endif + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX; + GPIO_Init(UART3_GPIO, &GPIO_InitStructure); +#endif /* RT_USING_UART3 */ } -static void NVIC_Configuration(void) +static void NVIC_Configuration(struct stm32_uart* uart) { - NVIC_InitTypeDef NVIC_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + /* Enable the USART1 Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = uart->irq; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); +} + +void rt_hw_usart_init(void) +{ + struct stm32_uart* uart; + struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; + + RCC_Configuration(); + GPIO_Configuration(); #ifdef RT_USING_UART1 - /* Enable the USART1 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -#endif + uart = &uart1; + config.baud_rate = BAUD_RATE_115200; + + serial1.ops = &stm32_uart_ops; + serial1.int_rx = &uart1_int_rx; + serial1.config = config; + + NVIC_Configuration(&uart1); + + /* register UART1 device */ + rt_hw_serial_register(&serial1, "uart1", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + uart); +#endif /* RT_USING_UART1 */ #ifdef RT_USING_UART2 - /* Enable the USART2 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -#endif + uart = &uart2; + + config.baud_rate = BAUD_RATE_115200; + serial2.ops = &stm32_uart_ops; + serial2.int_rx = &uart2_int_rx; + serial2.config = config; + + NVIC_Configuration(&uart2); + + /* register UART1 device */ + rt_hw_serial_register(&serial2, "uart2", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); +#endif /* RT_USING_UART2 */ #ifdef RT_USING_UART3 - /* Enable the USART3 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); + uart = &uart3; - /* Enable the DMA1 Channel2 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -#endif -} - -static void DMA_Configuration(void) -{ -#if defined (RT_USING_UART3) - DMA_InitTypeDef DMA_InitStructure; - - /* fill init structure */ - DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; - DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; - DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; - DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; - DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; - DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; - DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; - - /* DMA1 Channel5 (triggered by USART3 Tx event) Config */ - DMA_DeInit(UART3_TX_DMA); - DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base; - DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; - /* As we will set them before DMA actually enabled, the DMA_MemoryBaseAddr - * and DMA_BufferSize are meaningless. So just set them to proper values - * which could make DMA_Init happy. - */ - DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0; - DMA_InitStructure.DMA_BufferSize = 1; - DMA_Init(UART3_TX_DMA, &DMA_InitStructure); - DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE); - DMA_ClearFlag(DMA1_FLAG_TC2); -#endif -} - -/* - * Init all related hardware in here - * rt_hw_serial_init() will register all supported USART device - */ -void rt_hw_usart_init() -{ - USART_InitTypeDef USART_InitStructure; - USART_ClockInitTypeDef USART_ClockInitStructure; - - RCC_Configuration(); - - GPIO_Configuration(); - - NVIC_Configuration(); - - DMA_Configuration(); - - /* uart init */ -#ifdef RT_USING_UART1 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_ClockInitStructure.USART_Clock = USART_Clock_Disable; - USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low; - USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge; - USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable; - USART_Init(USART1, &USART_InitStructure); - USART_ClockInit(USART1, &USART_ClockInitStructure); - - /* register uart1 */ - rt_hw_serial_register(&uart1_device, "uart1", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart1); - - /* enable interrupt */ - USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); -#endif - -#ifdef RT_USING_UART2 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_ClockInitStructure.USART_Clock = USART_Clock_Disable; - USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low; - USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge; - USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable; - USART_Init(USART2, &USART_InitStructure); - USART_ClockInit(USART2, &USART_ClockInitStructure); - - /* register uart2 */ - rt_hw_serial_register(&uart2_device, "uart2", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart2); - - /* Enable USART2 DMA Rx request */ - USART_ITConfig(USART2, USART_IT_RXNE, ENABLE); -#endif - -#ifdef RT_USING_UART3 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_ClockInitStructure.USART_Clock = USART_Clock_Disable; - USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low; - USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge; - USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable; - USART_Init(USART3, &USART_InitStructure); - USART_ClockInit(USART3, &USART_ClockInitStructure); - - uart3_dma_tx.dma_channel= UART3_TX_DMA; - - /* register uart3 */ - rt_hw_serial_register(&uart3_device, "uart3", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX, - &uart3); - - /* Enable USART3 DMA Tx request */ - USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE); - - /* enable interrupt */ - USART_ITConfig(USART3, USART_IT_RXNE, ENABLE); -#endif + config.baud_rate = BAUD_RATE_115200; + + serial3.ops = &stm32_uart_ops; + serial3.int_rx = &uart3_int_rx; + serial3.config = config; + + NVIC_Configuration(&uart3); + + /* register UART1 device */ + rt_hw_serial_register(&serial3, "uart3", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); +#endif /* RT_USING_UART3 */ } diff --git a/bsp/stm32f10x/drivers/usart.h b/bsp/stm32f10x/drivers/usart.h index 48925df880..438578d86b 100644 --- a/bsp/stm32f10x/drivers/usart.h +++ b/bsp/stm32f10x/drivers/usart.h @@ -18,6 +18,9 @@ #include #include +#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n)) +#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n)) + void rt_hw_usart_init(void); #endif diff --git a/bsp/stm32f10x/project.Uv2 b/bsp/stm32f10x/project.Uv2 index d38d5aa614..05ab3d45a4 100644 --- a/bsp/stm32f10x/project.Uv2 +++ b/bsp/stm32f10x/project.Uv2 @@ -8,6 +8,7 @@ Group (Drivers) Group (STM32_StdPeriph) Group (Kernel) Group (CORTEX-M3) +Group (DeviceDrivers) Group (finsh) Group (Components) @@ -16,7 +17,6 @@ File 1,1, File 2,1, File 2,1, File 2,1, -File 2,1, File 2,1, File 3,1, File 3,1, @@ -60,22 +60,27 @@ File 5,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S> File 5,1,<..\..\libcpu\arm\common\backtrace.c> File 5,1,<..\..\libcpu\arm\common\div0.c> File 5,1,<..\..\libcpu\arm\common\showmem.c> -File 6,1,<..\..\components\finsh\cmd.c> -File 6,1,<..\..\components\finsh\finsh_compiler.c> -File 6,1,<..\..\components\finsh\finsh_error.c> -File 6,1,<..\..\components\finsh\finsh_heap.c> -File 6,1,<..\..\components\finsh\finsh_init.c> -File 6,1,<..\..\components\finsh\finsh_node.c> -File 6,1,<..\..\components\finsh\finsh_ops.c> -File 6,1,<..\..\components\finsh\finsh_parser.c> -File 6,1,<..\..\components\finsh\finsh_token.c> -File 6,1,<..\..\components\finsh\finsh_var.c> -File 6,1,<..\..\components\finsh\finsh_vm.c> -File 6,1,<..\..\components\finsh\msh.c> -File 6,1,<..\..\components\finsh\msh_cmd.c> -File 6,1,<..\..\components\finsh\shell.c> -File 6,1,<..\..\components\finsh\symbol.c> -File 7,1,<..\..\components\init\components.c> +File 6,1,<..\..\components\drivers\serial\serial.c> +File 6,1,<..\..\components\drivers\src\completion.c> +File 6,1,<..\..\components\drivers\src\dataqueue.c> +File 6,1,<..\..\components\drivers\src\pipe.c> +File 6,1,<..\..\components\drivers\src\ringbuffer.c> +File 7,1,<..\..\components\finsh\cmd.c> +File 7,1,<..\..\components\finsh\finsh_compiler.c> +File 7,1,<..\..\components\finsh\finsh_error.c> +File 7,1,<..\..\components\finsh\finsh_heap.c> +File 7,1,<..\..\components\finsh\finsh_init.c> +File 7,1,<..\..\components\finsh\finsh_node.c> +File 7,1,<..\..\components\finsh\finsh_ops.c> +File 7,1,<..\..\components\finsh\finsh_parser.c> +File 7,1,<..\..\components\finsh\finsh_token.c> +File 7,1,<..\..\components\finsh\finsh_var.c> +File 7,1,<..\..\components\finsh\finsh_vm.c> +File 7,1,<..\..\components\finsh\msh.c> +File 7,1,<..\..\components\finsh\msh_cmd.c> +File 7,1,<..\..\components\finsh\shell.c> +File 7,1,<..\..\components\finsh\symbol.c> +File 8,1,<..\..\components\init\components.c> @@ -138,7 +143,7 @@ Options 1,0,0 // Target 'RT-Thread STM32' ADSCMISC () ADSCDEFN (STM32F10X_HD, USE_STDPERIPH_DRIVER) ADSCUDEF () - ADSCINCD (Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\include;drivers;..\..\components\CMSIS\Include;.;applications;..\..\libcpu\arm\cortex-m3;..\..\libcpu\arm\common;..\..\components\init;..\..\components\finsh;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x) + ADSCINCD (Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\include;drivers;..\..\components\CMSIS\Include;.;applications;..\..\libcpu\arm\cortex-m3;..\..\components\drivers\include;..\..\libcpu\arm\common;..\..\components\init;..\..\components\finsh;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x) ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } ADSAMISC () ADSADEFN () diff --git a/bsp/stm32f10x/project.ewp b/bsp/stm32f10x/project.ewp index 947313db41..4281b8a337 100644 --- a/bsp/stm32f10x/project.ewp +++ b/bsp/stm32f10x/project.ewp @@ -307,6 +307,7 @@ $PROJ_DIR$\. $PROJ_DIR$\applications $PROJ_DIR$\..\..\libcpu\arm\cortex-m3 + $PROJ_DIR$\..\..\components\drivers\include $PROJ_DIR$\..\..\libcpu\arm\common $PROJ_DIR$\..\..\components\init $PROJ_DIR$\..\..\components\finsh @@ -1236,6 +1237,7 @@ $PROJ_DIR$\. $PROJ_DIR$\applications $PROJ_DIR$\..\..\libcpu\arm\cortex-m3 + $PROJ_DIR$\..\..\components\drivers\include $PROJ_DIR$\..\..\libcpu\arm\common $PROJ_DIR$\..\..\components\init $PROJ_DIR$\..\..\components\finsh @@ -1893,6 +1895,24 @@ $PROJ_DIR$\..\..\libcpu\arm\common\showmem.c + + DeviceDrivers + + $PROJ_DIR$\..\..\components\drivers\src\completion.c + + + $PROJ_DIR$\..\..\components\drivers\src\dataqueue.c + + + $PROJ_DIR$\..\..\components\drivers\src\pipe.c + + + $PROJ_DIR$\..\..\components\drivers\src\ringbuffer.c + + + $PROJ_DIR$\..\..\components\drivers\serial\serial.c + + Drivers @@ -1901,9 +1921,6 @@ $PROJ_DIR$\drivers\led.c - - $PROJ_DIR$\drivers\serial.c - $PROJ_DIR$\drivers\stm32f10x_it.c diff --git a/bsp/stm32f10x/project.uvproj b/bsp/stm32f10x/project.uvproj index 32ac174066..95923b3e99 100644 --- a/bsp/stm32f10x/project.uvproj +++ b/bsp/stm32f10x/project.uvproj @@ -351,7 +351,7 @@ STM32F10X_HD, USE_STDPERIPH_DRIVER - .;..\..\components\CMSIS\Include;..\..\components\finsh;..\..\components\init;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;Libraries\STM32F10x_StdPeriph_Driver\inc;applications;drivers + .;..\..\components\CMSIS\Include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\init;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;Libraries\STM32F10x_StdPeriph_Driver\inc;applications;drivers @@ -422,11 +422,6 @@ 1 drivers\led.c - - serial.c - 1 - drivers\serial.c - usart.c 1 @@ -659,6 +654,36 @@ + + DeviceDrivers + + + serial.c + 1 + ..\..\components\drivers\serial\serial.c + + + completion.c + 1 + ..\..\components\drivers\src\completion.c + + + dataqueue.c + 1 + ..\..\components\drivers\src\dataqueue.c + + + pipe.c + 1 + ..\..\components\drivers\src\pipe.c + + + ringbuffer.c + 1 + ..\..\components\drivers\src\ringbuffer.c + + + finsh diff --git a/bsp/stm32f10x/rtconfig.h b/bsp/stm32f10x/rtconfig.h index 2fe7a0ca41..1223f3dfb5 100644 --- a/bsp/stm32f10x/rtconfig.h +++ b/bsp/stm32f10x/rtconfig.h @@ -62,7 +62,10 @@ /* SECTION: Device System */ /* Using Device System */ #define RT_USING_DEVICE -#define RT_USING_UART1 +// +#define RT_USING_DEVICE_IPC +// +#define RT_USING_SERIAL /* SECTION: Console options */ #define RT_USING_CONSOLE