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Merge pull request #4665 from tao-eternal/patch-1 

[GD32V]fixed some bugs about interrupt
This commit is contained in:
Bernard Xiong 2021-05-18 19:34:25 +08:00 committed by GitHub
parent a0175e3d15 2a56598c8c
commit 5ba96109c6
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 17 additions and 12 deletions
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21
bsp/gd32vf103v-eval/drivers/drv_gpio.c
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@ -350,16 +350,14 @@ static rt_err_t gd32vf_pin_irq_enable(struct rt_device *device, rt_base_t pin,
return RT_ENOSYS; return RT_ENOSYS;
} }
/* configure pin as input */
gpio_init(index->gpio_periph, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, index->pin);
if (enabled == PIN_IRQ_ENABLE)
{
irqindex = bit2bitno(index->pin); irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map)) if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{ {
return RT_ENOSYS; return RT_ENOSYS;
} }
if (enabled == PIN_IRQ_ENABLE)
{
level = rt_hw_interrupt_disable(); level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == -1) if (pin_irq_hdr_tab[irqindex].pin == -1)
@ -372,24 +370,31 @@ static rt_err_t gd32vf_pin_irq_enable(struct rt_device *device, rt_base_t pin,
/* enable and set EXTI interrupt to the lowest priority */ /* enable and set EXTI interrupt to the lowest priority */
eclic_irq_enable(irqmap->irqno, 1, 1); eclic_irq_enable(irqmap->irqno, 1, 1);
gpio_exti_source_select(GPIO_PORT_SOURCE_GPIOA, GPIO_PIN_SOURCE_0); /* select SOURCE_PORT_x and SOURCE_PIN_x */
gpio_exti_source_select(index->index >> 4, irqindex);
/* Configure GPIO_InitStructure */ /* Configure GPIO_InitStructure */
switch (pin_irq_hdr_tab[irqindex].mode) switch (pin_irq_hdr_tab[irqindex].mode)
{ {
case PIN_IRQ_MODE_RISING: case PIN_IRQ_MODE_RISING:
gpio_init( index->gpio_periph, GPIO_MODE_IPD, GPIO_OSPEED_50MHZ,
index->pin );
exti_init(EXTI_(irqindex), EXTI_INTERRUPT, EXTI_TRIG_RISING); exti_init(EXTI_(irqindex), EXTI_INTERRUPT, EXTI_TRIG_RISING);
break; break;
case PIN_IRQ_MODE_FALLING: case PIN_IRQ_MODE_FALLING:
gpio_init( index->gpio_periph, GPIO_MODE_IPU, GPIO_OSPEED_50MHZ,
index->pin );
exti_init(EXTI_(irqindex), EXTI_INTERRUPT, EXTI_TRIG_FALLING); exti_init(EXTI_(irqindex), EXTI_INTERRUPT, EXTI_TRIG_FALLING);
break; break;
case PIN_IRQ_MODE_RISING_FALLING: case PIN_IRQ_MODE_RISING_FALLING:
gpio_init(index->gpio_periph, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ,
index->pin);
exti_init(EXTI_(irqindex), EXTI_INTERRUPT, EXTI_TRIG_BOTH); exti_init(EXTI_(irqindex), EXTI_INTERRUPT, EXTI_TRIG_BOTH);
break; break;
} }
pin_irq_enable_mask |= irqmap->pinbit; pin_irq_enable_mask |= irqmap->pinbit;
/* irqindex should be bitno and then EXTI_(x) can be the bit */
exti_interrupt_flag_clear(EXTI_(index->pin)); exti_interrupt_flag_clear(EXTI_(irqindex));
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
} }
@ -408,7 +413,7 @@ static rt_err_t gd32vf_pin_irq_enable(struct rt_device *device, rt_base_t pin,
pin_irq_enable_mask &= ~irqmap->pinbit; pin_irq_enable_mask &= ~irqmap->pinbit;
eclic_irq_disable(irqmap->irqno); eclic_irq_disable(irqmap->irqno);
exti_interrupt_flag_clear(EXTI_(index->pin)); exti_interrupt_flag_clear(EXTI_(irqindex));
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
} }