From 5a460aadcd1df4fcfb14aafeb248230a47e9cbeb Mon Sep 17 00:00:00 2001 From: xuzhuoyi Date: Sun, 31 Mar 2019 21:17:55 +0800 Subject: [PATCH] [bsp][gd32e230k-start] Update Sconscript --- bsp/gd32e230k-start/Libraries/SConscript | 22 +- bsp/gd32e230k-start/SConstruct | 2 +- bsp/gd32e230k-start/drivers/SConscript | 4 - bsp/gd32e230k-start/drivers/board.h | 2 +- bsp/gd32e230k-start/project.uvoptx | 848 ++++++++++------------- bsp/gd32e230k-start/project.uvprojx | 426 +++++------- bsp/gd32e230k-start/rtconfig.h | 63 +- bsp/gd32e230k-start/rtconfig.py | 4 +- bsp/gd32e230k-start/template.uvoptx | 18 +- bsp/gd32e230k-start/template.uvprojx | 62 +- libcpu/arm/cortex-m23/context_gcc.S | 122 ++-- libcpu/arm/cortex-m23/context_iar.S | 90 +-- libcpu/arm/cortex-m23/context_rvds.S | 84 ++- libcpu/arm/cortex-m23/cpuport.c | 328 +-------- 14 files changed, 815 insertions(+), 1260 deletions(-) diff --git a/bsp/gd32e230k-start/Libraries/SConscript b/bsp/gd32e230k-start/Libraries/SConscript index eb4cfb77c7..e79dc34216 100644 --- a/bsp/gd32e230k-start/Libraries/SConscript +++ b/bsp/gd32e230k-start/Libraries/SConscript @@ -6,27 +6,21 @@ cwd = GetCurrentDir() # The set of source files associated with this SConscript file. -src = Glob('GD32F30x_standard_peripheral/Source/*.c') -src += [cwd + '/CMSIS/GD/GD32F30x/Source/system_gd32f30x.c'] +src = Glob('GD32E230_standard_peripheral/Source/*.c') +src += [cwd + '/CMSIS/GD/GD32E230/Source/system_gd32e230.c'] #add for startup script -if rtconfig.CROSS_TOOL == 'gcc': - src += [cwd + '/CMSIS/GD/GD32F30x/Source/GCC/startup_gd32f30x_hd.s'] -elif rtconfig.CROSS_TOOL == 'keil': - src += [cwd + '/CMSIS/GD/GD32F30x/Source/ARM/startup_gd32f30x_hd.s'] +if rtconfig.CROSS_TOOL == 'keil': + src += [cwd + '/CMSIS/GD/GD32E230/Source/ARM/startup_gd32e230.s'] elif rtconfig.CROSS_TOOL == 'iar': - src += [cwd + '/CMSIS/GD/GD32F30x/Source/IAR/startup_gd32f30x_hd.s'] + src += [cwd + '/CMSIS/GD/GD32E230/Source/IAR/startup_gd32e230.s'] path = [ - cwd + '/CMSIS/GD/GD32F30x/Include', + cwd + '/CMSIS/GD/GD32E230/Include', cwd + '/CMSIS', - cwd + '/GD32F30x_standard_peripheral/Include',] - -if GetDepend(['RT_USING_BSP_USB']): - path += [cwd + '/GD32F30x_usb_driver/Include'] - src += [cwd + '/GD32F30x_usb_driver/Source'] + cwd + '/GD32E230_standard_peripheral/Include',] -CPPDEFINES = ['USE_STDPERIPH_DRIVER', 'GD32F30X_HD'] +CPPDEFINES = ['GD32E230'] group = DefineGroup('GD32_Lib', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) diff --git a/bsp/gd32e230k-start/SConstruct b/bsp/gd32e230k-start/SConstruct index 1cdbaab4a8..57a8ac59fc 100644 --- a/bsp/gd32e230k-start/SConstruct +++ b/bsp/gd32e230k-start/SConstruct @@ -15,7 +15,7 @@ except: print(RTT_ROOT) exit(-1) -TARGET = 'rtthread-gd32f30x.' + rtconfig.TARGET_EXT +TARGET = 'rtthread-gd32f230.' + rtconfig.TARGET_EXT env = Environment(tools = ['mingw'], AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, diff --git a/bsp/gd32e230k-start/drivers/SConscript b/bsp/gd32e230k-start/drivers/SConscript index ef03e2dcf0..45fd672f5f 100644 --- a/bsp/gd32e230k-start/drivers/SConscript +++ b/bsp/gd32e230k-start/drivers/SConscript @@ -24,10 +24,6 @@ if GetDepend('RT_USING_I2C'): if GetDepend('RT_USING_PIN'): src += ['drv_gpio.c'] -# add spi flash drivers. -if GetDepend('RT_USING_SFUD'): - src += ['drv_spi_flash.c'] - group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/bsp/gd32e230k-start/drivers/board.h b/bsp/gd32e230k-start/drivers/board.h index de344e8768..bff43464b4 100644 --- a/bsp/gd32e230k-start/drivers/board.h +++ b/bsp/gd32e230k-start/drivers/board.h @@ -29,7 +29,7 @@ extern char __ICFEDIT_region_RAM_end__; #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #endif -#ifdef __CC_ARM +#ifdef __ARMCC_VERSION extern int Image$$RW_IRAM1$$ZI$$Limit; #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #elif __ICCARM__ diff --git a/bsp/gd32e230k-start/project.uvoptx b/bsp/gd32e230k-start/project.uvoptx index c97d8a37d1..aa084f2049 100644 --- a/bsp/gd32e230k-start/project.uvoptx +++ b/bsp/gd32e230k-start/project.uvoptx @@ -22,7 +22,7 @@ - rt-thread_gd32f30x + rt-thread_gd32e230 0x4 ARM-ADS @@ -103,7 +103,7 @@ 1 0 0 - 19 + 14 @@ -175,8 +175,8 @@ - Applications - 1 + Kernel + 0 0 0 0 @@ -187,6 +187,194 @@ 0 0 0 + ..\..\src\clock.c + clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\src\components.c + components.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\..\src\cpu.c + cpu.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + ..\..\src\device.c + device.c + 0 + 0 + + + 1 + 5 + 1 + 0 + 0 + 0 + ..\..\src\idle.c + idle.c + 0 + 0 + + + 1 + 6 + 1 + 0 + 0 + 0 + ..\..\src\ipc.c + ipc.c + 0 + 0 + + + 1 + 7 + 1 + 0 + 0 + 0 + ..\..\src\irq.c + irq.c + 0 + 0 + + + 1 + 8 + 1 + 0 + 0 + 0 + ..\..\src\kservice.c + kservice.c + 0 + 0 + + + 1 + 9 + 1 + 0 + 0 + 0 + ..\..\src\mem.c + mem.c + 0 + 0 + + + 1 + 10 + 1 + 0 + 0 + 0 + ..\..\src\mempool.c + mempool.c + 0 + 0 + + + 1 + 11 + 1 + 0 + 0 + 0 + ..\..\src\object.c + object.c + 0 + 0 + + + 1 + 12 + 1 + 0 + 0 + 0 + ..\..\src\scheduler.c + scheduler.c + 0 + 0 + + + 1 + 13 + 1 + 0 + 0 + 0 + ..\..\src\signal.c + signal.c + 0 + 0 + + + 1 + 14 + 1 + 0 + 0 + 0 + ..\..\src\thread.c + thread.c + 0 + 0 + + + 1 + 15 + 1 + 0 + 0 + 0 + ..\..\src\timer.c + timer.c + 0 + 0 + + + + + Applications + 0 + 0 + 0 + 0 + + 2 + 16 + 1 + 0 + 0 + 0 applications\main.c main.c 0 @@ -196,13 +384,13 @@ Drivers - 1 + 0 0 0 0 - 2 - 2 + 3 + 17 1 0 0 @@ -213,8 +401,8 @@ 0 - 2 - 3 + 3 + 18 1 0 0 @@ -225,8 +413,8 @@ 0 - 2 - 4 + 3 + 19 1 0 0 @@ -237,8 +425,8 @@ 0 - 2 - 5 + 3 + 20 1 0 0 @@ -249,8 +437,8 @@ 0 - 2 - 6 + 3 + 21 1 0 0 @@ -264,270 +452,82 @@ GD32_Lib - 1 + 0 0 0 0 - 3 - 7 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_adc.c - gd32e230_adc.c - 0 - 0 - - - 3 - 8 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_cmp.c - gd32e230_cmp.c - 0 - 0 - - - 3 - 9 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_crc.c - gd32e230_crc.c - 0 - 0 - - - 3 - 10 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_dbg.c - gd32e230_dbg.c - 0 - 0 - - - 3 - 11 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_dma.c - gd32e230_dma.c - 0 - 0 - - - 3 - 12 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_exti.c - gd32e230_exti.c - 0 - 0 - - - 3 - 13 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_fmc.c - gd32e230_fmc.c - 0 - 0 - - - 3 - 14 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_fwdgt.c - gd32e230_fwdgt.c - 0 - 0 - - - 3 - 15 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_gpio.c - gd32e230_gpio.c - 0 - 0 - - - 3 - 16 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_i2c.c - gd32e230_i2c.c - 0 - 0 - - - 3 - 17 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_misc.c - gd32e230_misc.c - 0 - 0 - - - 3 - 18 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_pmu.c - gd32e230_pmu.c - 0 - 0 - - - 3 - 19 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_rcu.c - gd32e230_rcu.c - 0 - 0 - - - 3 - 20 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_rtc.c - gd32e230_rtc.c - 0 - 0 - - - 3 - 21 - 1 - 0 - 0 - 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_spi.c - gd32e230_spi.c - 0 - 0 - - - 3 + 4 22 1 0 0 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_syscfg.c - gd32e230_syscfg.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_adc.c + gd32e230_adc.c 0 0 - 3 + 4 23 1 0 0 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_timer.c - gd32e230_timer.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_cmp.c + gd32e230_cmp.c 0 0 - 3 + 4 24 1 0 0 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_usart.c - gd32e230_usart.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_crc.c + gd32e230_crc.c 0 0 - 3 + 4 25 1 0 0 0 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_wwdgt.c - gd32e230_wwdgt.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_dbg.c + gd32e230_dbg.c 0 0 - 3 + 4 26 1 0 0 0 - .\Libraries\CMSIS\GD\GD32E230\Source\system_gd32e230.c - system_gd32e230.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_dma.c + gd32e230_dma.c 0 0 - 3 + 4 27 - 2 + 1 0 0 0 - .\Libraries\CMSIS\GD\GD32E230\Source\ARM\startup_gd32e230.s - startup_gd32e230.s + Libraries\GD32E230_standard_peripheral\Source\gd32e230_exti.c + gd32e230_exti.c 0 0 - - - - Kernel - 1 - 0 - 0 - 0 4 28 @@ -535,8 +535,8 @@ 0 0 0 - ..\..\src\clock.c - clock.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_fmc.c + gd32e230_fmc.c 0 0 @@ -547,8 +547,8 @@ 0 0 0 - ..\..\src\components.c - components.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_fwdgt.c + gd32e230_fwdgt.c 0 0 @@ -559,8 +559,8 @@ 0 0 0 - ..\..\src\device.c - device.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_gpio.c + gd32e230_gpio.c 0 0 @@ -571,8 +571,8 @@ 0 0 0 - ..\..\src\idle.c - idle.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_i2c.c + gd32e230_i2c.c 0 0 @@ -583,8 +583,8 @@ 0 0 0 - ..\..\src\ipc.c - ipc.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_misc.c + gd32e230_misc.c 0 0 @@ -595,8 +595,8 @@ 0 0 0 - ..\..\src\irq.c - irq.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_pmu.c + gd32e230_pmu.c 0 0 @@ -607,8 +607,8 @@ 0 0 0 - ..\..\src\kservice.c - kservice.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_rcu.c + gd32e230_rcu.c 0 0 @@ -619,8 +619,8 @@ 0 0 0 - ..\..\src\mem.c - mem.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_rtc.c + gd32e230_rtc.c 0 0 @@ -631,8 +631,8 @@ 0 0 0 - ..\..\src\mempool.c - mempool.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_spi.c + gd32e230_spi.c 0 0 @@ -643,8 +643,8 @@ 0 0 0 - ..\..\src\object.c - object.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_syscfg.c + gd32e230_syscfg.c 0 0 @@ -655,8 +655,8 @@ 0 0 0 - ..\..\src\scheduler.c - scheduler.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_timer.c + gd32e230_timer.c 0 0 @@ -667,8 +667,8 @@ 0 0 0 - ..\..\src\signal.c - signal.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_usart.c + gd32e230_usart.c 0 0 @@ -679,8 +679,8 @@ 0 0 0 - ..\..\src\thread.c - thread.c + Libraries\GD32E230_standard_peripheral\Source\gd32e230_wwdgt.c + gd32e230_wwdgt.c 0 0 @@ -691,22 +691,34 @@ 0 0 0 - ..\..\src\timer.c - timer.c + Libraries\CMSIS\GD\GD32E230\Source\system_gd32e230.c + system_gd32e230.c + 0 + 0 + + + 4 + 42 + 2 + 0 + 0 + 0 + Libraries\CMSIS\GD\GD32E230\Source\ARM\startup_gd32e230.s + startup_gd32e230.s 0 0 - CORTEX-M23 - 1 + cpu + 0 0 0 0 5 - 42 + 43 1 0 0 @@ -718,7 +730,7 @@ 5 - 43 + 44 1 0 0 @@ -730,7 +742,7 @@ 5 - 44 + 45 1 0 0 @@ -742,7 +754,7 @@ 5 - 45 + 46 1 0 0 @@ -754,7 +766,7 @@ 5 - 46 + 47 2 0 0 @@ -767,23 +779,11 @@ - Filesystem - 1 + DeviceDrivers + 0 0 0 0 - - 6 - 47 - 1 - 0 - 0 - 0 - ..\..\components\dfs\src\dfs.c - dfs.c - 0 - 0 - 6 48 @@ -791,94 +791,14 @@ 0 0 0 - ..\..\components\dfs\src\dfs_file.c - dfs_file.c - 0 - 0 - - - 6 - 49 - 1 - 0 - 0 - 0 - ..\..\components\dfs\src\dfs_fs.c - dfs_fs.c - 0 - 0 - - - 6 - 50 - 1 - 0 - 0 - 0 - ..\..\components\dfs\src\dfs_posix.c - dfs_posix.c - 0 - 0 - - - 6 - 51 - 1 - 0 - 0 - 0 - ..\..\components\dfs\filesystems\devfs\devfs.c - devfs.c - 0 - 0 - - - 6 - 52 - 1 - 0 - 0 - 0 - ..\..\components\dfs\filesystems\elmfat\dfs_elm.c - dfs_elm.c - 0 - 0 - - - 6 - 53 - 1 - 0 - 0 - 0 - ..\..\components\dfs\filesystems\elmfat\ff.c - ff.c - 0 - 0 - - - - - DeviceDrivers - 1 - 0 - 0 - 0 - - 7 - 54 - 1 - 0 - 0 - 0 ..\..\components\drivers\i2c\i2c_core.c i2c_core.c 0 0 - 7 - 55 + 6 + 49 1 0 0 @@ -889,8 +809,8 @@ 0 - 7 - 56 + 6 + 50 1 0 0 @@ -901,8 +821,8 @@ 0 - 7 - 57 + 6 + 51 1 0 0 @@ -913,8 +833,8 @@ 0 - 7 - 58 + 6 + 52 1 0 0 @@ -925,8 +845,8 @@ 0 - 7 - 59 + 6 + 53 1 0 0 @@ -937,8 +857,32 @@ 0 - 7 - 60 + 6 + 54 + 1 + 0 + 0 + 0 + ..\..\components\drivers\spi\spi_flash_sfud.c + spi_flash_sfud.c + 0 + 0 + + + 6 + 55 + 1 + 0 + 0 + 0 + ..\..\components\drivers\spi\sfud\src\sfud.c + sfud.c + 0 + 0 + + + 6 + 56 1 0 0 @@ -949,8 +893,8 @@ 0 - 7 - 61 + 6 + 57 1 0 0 @@ -961,8 +905,8 @@ 0 - 7 - 62 + 6 + 58 1 0 0 @@ -973,8 +917,20 @@ 0 - 7 - 63 + 6 + 59 + 1 + 0 + 0 + 0 + ..\..\components\drivers\src\ringblk_buf.c + ringblk_buf.c + 0 + 0 + + + 6 + 60 1 0 0 @@ -985,8 +941,8 @@ 0 - 7 - 64 + 6 + 61 1 0 0 @@ -997,8 +953,8 @@ 0 - 7 - 65 + 6 + 62 1 0 0 @@ -1017,8 +973,8 @@ 0 0 - 8 - 66 + 7 + 63 1 0 0 @@ -1029,8 +985,8 @@ 0 - 8 - 67 + 7 + 64 1 0 0 @@ -1041,8 +997,8 @@ 0 - 8 - 68 + 7 + 65 1 0 0 @@ -1053,8 +1009,8 @@ 0 - 8 - 69 + 7 + 66 1 0 0 @@ -1065,8 +1021,8 @@ 0 - 8 - 70 + 7 + 67 1 0 0 @@ -1077,8 +1033,8 @@ 0 - 8 - 71 + 7 + 68 1 0 0 @@ -1089,8 +1045,8 @@ 0 - 8 - 72 + 7 + 69 1 0 0 @@ -1101,8 +1057,8 @@ 0 - 8 - 73 + 7 + 70 1 0 0 @@ -1113,8 +1069,8 @@ 0 - 8 - 74 + 7 + 71 1 0 0 @@ -1125,8 +1081,8 @@ 0 - 8 - 75 + 7 + 72 1 0 0 @@ -1137,8 +1093,8 @@ 0 - 8 - 76 + 7 + 73 1 0 0 @@ -1149,8 +1105,8 @@ 0 - 8 - 77 + 7 + 74 1 0 0 @@ -1161,8 +1117,8 @@ 0 - 8 - 78 + 7 + 75 1 0 0 @@ -1173,8 +1129,8 @@ 0 - 8 - 79 + 7 + 76 1 0 0 @@ -1185,8 +1141,8 @@ 0 - 8 - 80 + 7 + 77 1 0 0 @@ -1197,8 +1153,8 @@ 0 - 8 - 81 + 7 + 78 1 0 0 @@ -1210,86 +1166,6 @@ - - libc - 0 - 0 - 0 - 0 - - 9 - 82 - 1 - 0 - 0 - 0 - ..\..\components\libc\compilers\armlibc\libc.c - libc.c - 0 - 0 - - - 9 - 83 - 1 - 0 - 0 - 0 - ..\..\components\libc\compilers\armlibc\libc_syms.c - libc_syms.c - 0 - 0 - - - 9 - 84 - 1 - 0 - 0 - 0 - ..\..\components\libc\compilers\armlibc\mem_std.c - mem_std.c - 0 - 0 - - - 9 - 85 - 1 - 0 - 0 - 0 - ..\..\components\libc\compilers\armlibc\stdio.c - stdio.c - 0 - 0 - - - 9 - 86 - 1 - 0 - 0 - 0 - ..\..\components\libc\compilers\armlibc\stubs.c - stubs.c - 0 - 0 - - - 9 - 87 - 1 - 0 - 0 - 0 - ..\..\components\libc\compilers\armlibc\time.c - time.c - 0 - 0 - - - ::CMSIS 0 diff --git a/bsp/gd32e230k-start/project.uvprojx b/bsp/gd32e230k-start/project.uvprojx index 66d282d567..4466ae7d45 100644 --- a/bsp/gd32e230k-start/project.uvprojx +++ b/bsp/gd32e230k-start/project.uvprojx @@ -7,11 +7,10 @@ - rt-thread_gd32f30x + rt-thread_gd32e230 0x4 ARM-ADS - 6120000::V6.12::.\ARMCLANG - 6120000::V6.12::.\ARMCLANG + 5060750::V5.06 update 6 (build 750)::ARMCC 1 @@ -50,7 +49,7 @@ 1 .\build\ - rtthread-gd32f30x + rtthread-gd32e230 1 0 0 @@ -313,7 +312,7 @@ 1 - 7 + 1 0 0 0 @@ -322,14 +321,14 @@ 0 0 0 - 3 + 0 0 0 1 0 0 - 3 - 3 + 1 + 1 1 1 0 @@ -337,9 +336,9 @@ 0 - GD32E230, RT_USING_ARM_LIBC + GD32E230 - applications;.;drivers;Libraries\CMSIS;..\..\include;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\spi;..\..\components\drivers\include;..\..\components\drivers\spi\sfud\inc;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;.\Libraries\GD32E230_standard_peripheral\Include;.\Libraries\CMSIS\GD\GD32E230\Include;..\..\libcpu\arm\cortex-m23 + .;..\..\include;applications;.;drivers;Libraries\CMSIS\GD\GD32E230\Include;Libraries\CMSIS;Libraries\GD32E230_standard_peripheral\Include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m23;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\spi;..\..\components\drivers\include;..\..\components\drivers\spi\sfud\inc;..\..\components\drivers\include;..\..\components\finsh @@ -373,163 +372,13 @@ - --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab) + - - Applications - - - main.c - 1 - applications\main.c - - - - - Drivers - - - board.c - 1 - drivers\board.c - - - drv_usart.c - 1 - drivers\drv_usart.c - - - drv_spi.c - 1 - drivers\drv_spi.c - - - drv_i2c.c - 1 - drivers\drv_i2c.c - - - drv_gpio.c - 1 - drivers\drv_gpio.c - - - - - GD32_Lib - - - gd32e230_adc.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_adc.c - - - gd32e230_cmp.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_cmp.c - - - gd32e230_crc.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_crc.c - - - gd32e230_dbg.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_dbg.c - - - gd32e230_dma.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_dma.c - - - gd32e230_exti.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_exti.c - - - gd32e230_fmc.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_fmc.c - - - gd32e230_fwdgt.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_fwdgt.c - - - gd32e230_gpio.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_gpio.c - - - gd32e230_i2c.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_i2c.c - - - gd32e230_misc.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_misc.c - - - gd32e230_pmu.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_pmu.c - - - gd32e230_rcu.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_rcu.c - - - gd32e230_rtc.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_rtc.c - - - gd32e230_spi.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_spi.c - - - gd32e230_syscfg.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_syscfg.c - - - gd32e230_timer.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_timer.c - - - gd32e230_usart.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_usart.c - - - gd32e230_wwdgt.c - 1 - .\Libraries\GD32E230_standard_peripheral\Source\gd32e230_wwdgt.c - - - system_gd32e230.c - 1 - .\Libraries\CMSIS\GD\GD32E230\Source\system_gd32e230.c - - - startup_gd32e230.s - 2 - .\Libraries\CMSIS\GD\GD32E230\Source\ARM\startup_gd32e230.s - - - Kernel @@ -543,6 +392,11 @@ 1 ..\..\src\components.c + + cpu.c + 1 + ..\..\src\cpu.c + device.c 1 @@ -606,7 +460,157 @@ - CORTEX-M23 + Applications + + + main.c + 1 + applications\main.c + + + + + Drivers + + + board.c + 1 + drivers\board.c + + + drv_usart.c + 1 + drivers\drv_usart.c + + + drv_spi.c + 1 + drivers\drv_spi.c + + + drv_i2c.c + 1 + drivers\drv_i2c.c + + + drv_gpio.c + 1 + drivers\drv_gpio.c + + + + + GD32_Lib + + + gd32e230_adc.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_adc.c + + + gd32e230_cmp.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_cmp.c + + + gd32e230_crc.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_crc.c + + + gd32e230_dbg.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_dbg.c + + + gd32e230_dma.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_dma.c + + + gd32e230_exti.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_exti.c + + + gd32e230_fmc.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_fmc.c + + + gd32e230_fwdgt.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_fwdgt.c + + + gd32e230_gpio.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_gpio.c + + + gd32e230_i2c.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_i2c.c + + + gd32e230_misc.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_misc.c + + + gd32e230_pmu.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_pmu.c + + + gd32e230_rcu.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_rcu.c + + + gd32e230_rtc.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_rtc.c + + + gd32e230_spi.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_spi.c + + + gd32e230_syscfg.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_syscfg.c + + + gd32e230_timer.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_timer.c + + + gd32e230_usart.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_usart.c + + + gd32e230_wwdgt.c + 1 + Libraries\GD32E230_standard_peripheral\Source\gd32e230_wwdgt.c + + + system_gd32e230.c + 1 + Libraries\CMSIS\GD\GD32E230\Source\system_gd32e230.c + + + startup_gd32e230.s + 2 + Libraries\CMSIS\GD\GD32E230\Source\ARM\startup_gd32e230.s + + + + + cpu backtrace.c @@ -635,46 +639,6 @@ - - Filesystem - - - dfs.c - 1 - ..\..\components\dfs\src\dfs.c - - - dfs_file.c - 1 - ..\..\components\dfs\src\dfs_file.c - - - dfs_fs.c - 1 - ..\..\components\dfs\src\dfs_fs.c - - - dfs_posix.c - 1 - ..\..\components\dfs\src\dfs_posix.c - - - devfs.c - 1 - ..\..\components\dfs\filesystems\devfs\devfs.c - - - dfs_elm.c - 1 - ..\..\components\dfs\filesystems\elmfat\dfs_elm.c - - - ff.c - 1 - ..\..\components\dfs\filesystems\elmfat\ff.c - - - DeviceDrivers @@ -720,9 +684,9 @@ 2 2 - - - + --c99 + + @@ -777,6 +741,16 @@ 1 ..\..\components\drivers\spi\spi_dev.c + + spi_flash_sfud.c + 1 + ..\..\components\drivers\spi\spi_flash_sfud.c + + + sfud.c + 1 + ..\..\components\drivers\spi\sfud\src\sfud.c + completion.c 1 @@ -792,6 +766,11 @@ 1 ..\..\components\drivers\src\pipe.c + + ringblk_buf.c + 1 + ..\..\components\drivers\src\ringblk_buf.c + ringbuffer.c 1 @@ -894,41 +873,6 @@ - - libc - - - libc.c - 1 - ..\..\components\libc\compilers\armlibc\libc.c - - - libc_syms.c - 1 - ..\..\components\libc\compilers\armlibc\libc_syms.c - - - mem_std.c - 1 - ..\..\components\libc\compilers\armlibc\mem_std.c - - - stdio.c - 1 - ..\..\components\libc\compilers\armlibc\stdio.c - - - stubs.c - 1 - ..\..\components\libc\compilers\armlibc\stubs.c - - - time.c - 1 - ..\..\components\libc\compilers\armlibc\time.c - - - ::CMSIS @@ -942,7 +886,7 @@ - + diff --git a/bsp/gd32e230k-start/rtconfig.h b/bsp/gd32e230k-start/rtconfig.h index 77e9056395..b490faaf8a 100644 --- a/bsp/gd32e230k-start/rtconfig.h +++ b/bsp/gd32e230k-start/rtconfig.h @@ -11,13 +11,13 @@ #define RT_THREAD_PRIORITY_32 #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDEL_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG #define RT_DEBUG_COLOR -#define RT_USING_OVERFLOW_CHECK -#define RT_DEBUG_INIT 0 -#define RT_DEBUG_THREAD 0 -#define RT_USING_HOOK -#define IDLE_THREAD_STACK_SIZE 256 /* Inter-Thread communication */ @@ -39,12 +39,14 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart0" +#define RT_VER_NUM 0x40001 /* RT-Thread Components */ #define RT_USING_COMPONENTS_INIT #define RT_USING_USER_MAIN #define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 /* C++ features */ @@ -62,45 +64,37 @@ #define FINSH_CMD_SIZE 80 #define FINSH_USING_MSH #define FINSH_USING_MSH_DEFAULT +#define FINSH_ARG_MAX 10 /* Device virtual file system */ -#define RT_USING_DFS -#define DFS_USING_WORKDIR -#define DFS_FILESYSTEMS_MAX 2 -#define DFS_FILESYSTEM_TYPES_MAX 2 -#define DFS_FD_MAX 4 -#define RT_USING_DFS_ELMFAT - -/* elm-chan's FatFs, Generic FAT Filesystem Module */ - -#define RT_DFS_ELM_CODE_PAGE 437 -#define RT_DFS_ELM_WORD_ACCESS -#define RT_DFS_ELM_USE_LFN_0 -#define RT_DFS_ELM_USE_LFN 0 -#define RT_DFS_ELM_MAX_LFN 255 -#define RT_DFS_ELM_DRIVES 2 -#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 -#define RT_DFS_ELM_REENTRANT -#define RT_USING_DFS_DEVFS /* Device Drivers */ #define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 #define RT_USING_SERIAL #define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_I2C #define RT_USING_PIN #define RT_USING_SPI +#define RT_USING_SFUD +#define RT_SFUD_USING_FLASH_INFO_TABLE + +/* Using WiFi */ + /* Using USB */ /* POSIX layer and C standard library */ -#define RT_USING_LIBC -/* Network stack */ +/* Network */ + +/* Socket abstraction layer */ + /* light weight TCP/IP stack */ @@ -108,6 +102,9 @@ /* Modbus master and slave stack */ +/* AT commands */ + + /* VBUS(Virtual Software BUS) */ @@ -116,11 +113,6 @@ /* RT-Thread online packages */ -/* system packages */ - -/* RT-Thread GUI Engine */ - - /* IoT - internet of things */ @@ -132,6 +124,9 @@ /* Wiced WiFi */ +/* IoT Cloud */ + + /* security packages */ @@ -144,10 +139,16 @@ /* tools packages */ +/* system packages */ + + +/* peripheral libraries and drivers */ + + /* miscellaneous packages */ -/* example package: hello */ +/* samples: kernel and components samples */ #define RT_USING_USART0 #define RT_USING_USART1 diff --git a/bsp/gd32e230k-start/rtconfig.py b/bsp/gd32e230k-start/rtconfig.py index c631bc3e44..f953a5e67b 100644 --- a/bsp/gd32e230k-start/rtconfig.py +++ b/bsp/gd32e230k-start/rtconfig.py @@ -2,7 +2,7 @@ import os # toolchains options ARCH='arm' -CPU='cortex-m4' +CPU='cortex-m23' CROSS_TOOL='keil' if os.getenv('RTT_CC'): @@ -71,8 +71,6 @@ elif PLATFORM == 'armcc': EXEC_PATH += '/ARM/ARMCC/bin' print(EXEC_PATH) - CFLAGS += ' --c99' - if BUILD == 'debug': CFLAGS += ' -g -O0' AFLAGS += ' -g' diff --git a/bsp/gd32e230k-start/template.uvoptx b/bsp/gd32e230k-start/template.uvoptx index 8fc841b0e1..93d9c266ef 100644 --- a/bsp/gd32e230k-start/template.uvoptx +++ b/bsp/gd32e230k-start/template.uvoptx @@ -22,11 +22,11 @@ - rt-thread_gd32f30x + rt-thread_gd32e230 0x4 ARM-ADS - 16000000 + 12000000 1 1 @@ -73,7 +73,7 @@ 0 - 0 + 1 0 1 @@ -103,7 +103,7 @@ 1 0 0 - 4 + 14 @@ -114,18 +114,18 @@ - Segger\JL2CM3.dll + BIN\UL2V8M.DLL 0 - JL2CM3 - -U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0GD32F30x_HD -FS08000000 -FL080000 + UL2V8M + UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32E230 -FS08000000 -FL010000 -FP0($$Device:GD32E230K8$Flash\GD32E230.FLM)) 0 - UL2CM3 - UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F30x_HD -FS08000000 -FL010000 -FP0($$Device:GD32F303ZE$Flash\GD32F30x_HD.FLM)) + JL2CM3 + -U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0GD32F30x_HD -FS08000000 -FL080000 diff --git a/bsp/gd32e230k-start/template.uvprojx b/bsp/gd32e230k-start/template.uvprojx index 9b0a830d22..cf0ba886d1 100644 --- a/bsp/gd32e230k-start/template.uvprojx +++ b/bsp/gd32e230k-start/template.uvprojx @@ -7,23 +7,23 @@ - rt-thread_gd32f30x + rt-thread_gd32e230 0x4 ARM-ADS 5060750::V5.06 update 6 (build 750)::ARMCC - 0 + 1 - GD32F303ZE + GD32E230K8 GigaDevice - GigaDevice.GD32F30x_DFP.1.0.1 + GigaDevice.GD32E230_DFP.1.0.0 http://gd32mcu.21ic.com/data/documents/yingyongruanjian - IRAM(0x20000000-0x2000FFFF)IROM(0x08000000-0x0807FFFF) CLOCK(16000000) CPUTYPE("Cortex-M4") + IRAM(0x20000000,0x0002000) IROM(0x08000000,0x0010000) CPUTYPE("Cortex-M23") CLOCK(12000000) ELITTLE - "Startup\GD\GD32F30x\startup_gd32f30x_hd.s" ("GD32F30x Startup Code") - UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F30x_HD -FS08000000 -FL080000) + + UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32E230 -FS08000000 -FL010000 -FP0($$Device:GD32E230K8$Flash\GD32E230.FLM)) 0 - gd32f30x.h + $$Device:GD32E230K8$Device\Include\gd32e230.h @@ -33,14 +33,14 @@ - SFD\GD\GD32F30x\GD32F30x_HD.SFR + $$Device:GD32E230K8$SVD\GD32E230.svd 0 0 - GD\GD32F30x\ - GD\GD32F30x\ + + 0 0 @@ -49,7 +49,7 @@ 1 .\build\ - rtthread-gd32f30x + rtthread-gd32e230 1 0 0 @@ -109,14 +109,14 @@ 1 - SARMCM3.DLL - -REMAP - DCM.DLL - -pCM3 - SARMCM3.DLL - + + + + + SARMV8M.DLL + -MPU TCM.DLL - -pCM3 + -pCM23 @@ -137,8 +137,8 @@ 4096 1 - BIN\UL2CM3.DLL - "" () + BIN\UL2V8M.DLL + @@ -174,7 +174,7 @@ 1 0 0 - "Cortex-M4" + "Cortex-M23" 0 0 @@ -184,6 +184,7 @@ 0 0 0 + 0 0 0 8 @@ -192,7 +193,7 @@ 0 0 3 - 4 + 3 0 0 0 @@ -244,12 +245,12 @@ 0 0x20000000 - 0x10000 + 0x2000 1 0x8000000 - 0x80000 + 0x10000 0 @@ -274,7 +275,7 @@ 1 0x8000000 - 0x80000 + 0x10000 1 @@ -299,7 +300,7 @@ 0 0x20000000 - 0x10000 + 0x2000 0 @@ -324,6 +325,7 @@ 0 0 1 + 0 0 1 1 @@ -387,10 +389,10 @@ - - + + - + diff --git a/libcpu/arm/cortex-m23/context_gcc.S b/libcpu/arm/cortex-m23/context_gcc.S index d17a8aa12c..d9993247e2 100644 --- a/libcpu/arm/cortex-m23/context_gcc.S +++ b/libcpu/arm/cortex-m23/context_gcc.S @@ -5,26 +5,25 @@ * * Change Logs: * Date Author Notes - * 2009-10-11 Bernard First version - * 2010-12-29 onelife Modify for EFM32 - * 2011-06-17 onelife Merge all of the assembly source code into context_gcc.S - * 2011-07-12 onelife Add interrupt context check function - * 2013-06-18 aozima add restore MSP feature. - * 2013-07-09 aozima enhancement hard fault exception handler. + * 2010-01-25 Bernard first version + * 2012-06-01 aozima set pendsv priority to 0xFF. + * 2012-08-17 aozima fixed bug: store r8 - r11. + * 2013-02-20 aozima port to gcc. + * 2013-06-18 aozima add restore MSP feature. + * 2013-11-04 bright fixed hardfault bug for gcc. */ - .cpu cortex-m3 + .cpu cortex-m0 .fpu softvfp .syntax unified .thumb .text - .equ SCB_VTOR, 0xE000ED08 /* Vector Table Offset Register */ - .equ ICSR, 0xE000ED04 /* interrupt control state register */ - .equ PENDSVSET_BIT, 0x10000000 /* value to trigger PendSV exception */ - - .equ SHPR3, 0xE000ED20 /* system priority register (3) */ - .equ PENDSV_PRI_LOWEST, 0x00FF0000 /* PendSV priority value (lowest) */ + .equ SCB_VTOR, 0xE000ED08 /* Vector Table Offset Register */ + .equ NVIC_INT_CTRL, 0xE000ED04 /* interrupt control state register */ + .equ NVIC_SHPR3, 0xE000ED20 /* system priority register (3) */ + .equ NVIC_PENDSV_PRI, 0x00FF0000 /* PendSV priority value (lowest) */ + .equ NVIC_PENDSVSET, 0x10000000 /* value to trigger PendSV exception */ /* * rt_base_t rt_hw_interrupt_disable(); @@ -61,7 +60,7 @@ rt_hw_context_switch: LDR R3, [R2] CMP R3, #1 BEQ _reswitch - MOV R3, #1 + MOVS R3, #1 STR R3, [R2] LDR R2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */ @@ -71,8 +70,8 @@ _reswitch: LDR R2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */ STR R1, [R2] - LDR R0, =ICSR /* trigger the PendSV exception (causes context switch) */ - LDR R1, =PENDSVSET_BIT + LDR R0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */ + LDR R1, =NVIC_PENDSVSET STR R1, [R0] BX LR @@ -90,36 +89,56 @@ PendSV_Handler: /* get rt_thread_switch_interrupt_flag */ LDR R0, =rt_thread_switch_interrupt_flag LDR R1, [R0] - CBZ R1, pendsv_exit /* pendsv aLReady handled */ + CMP R1, #0x00 + BEQ pendsv_exit /* pendsv aLReady handled */ /* clear rt_thread_switch_interrupt_flag to 0 */ - MOV R1, #0 + MOVS R1, #0 STR R1, [R0] LDR R0, =rt_interrupt_from_thread LDR R1, [R0] - CBZ R1, switch_to_thread /* skip register save at the first time */ + CMP R1, #0x00 + BEQ switch_to_thread /* skip register save at the first time */ - MRS R1, PSP /* get from thread stack pointer */ - STMFD R1!, {R4 - R11} /* push R4 - R11 register */ + MRS R1, PSP /* get from thread stack pointer */ + + SUBS R1, R1, #0x20 /* space for {R4 - R7} and {R8 - R11} */ LDR R0, [R0] STR R1, [R0] /* update from thread stack pointer */ + STMIA R1!, {R4 - R7} /* push thread {R4 - R7} register to thread stack */ + + MOV R4, R8 /* mov thread {R8 - R11} to {R4 - R7} */ + MOV R5, R9 + MOV R6, R10 + MOV R7, R11 + STMIA R1!, {R4 - R7} /* push thread {R8 - R11} high register to thread stack */ switch_to_thread: LDR R1, =rt_interrupt_to_thread LDR R1, [R1] LDR R1, [R1] /* load thread stack pointer */ - LDMFD R1!, {R4 - R11} /* pop R4 - R11 register */ + LDMIA R1!, {R4 - R7} /* pop thread {R4 - R7} register from thread stack */ + PUSH {R4 - R7} /* push {R4 - R7} to MSP for copy {R8 - R11} */ + + LDMIA R1!, {R4 - R7} /* pop thread {R8 - R11} high register from thread stack to {R4 - R7} */ + MOV R8, R4 /* mov {R4 - R7} to {R8 - R11} */ + MOV R9, R5 + MOV R10, R6 + MOV R11, R7 + + POP {R4 - R7} /* pop {R4 - R7} from MSP */ + MSR PSP, R1 /* update stack pointer */ pendsv_exit: /* restore interrupt */ MSR PRIMASK, R2 - ORR LR, LR, #0x04 - BX LR - + MOVS R0, #0x04 + RSBS R0, R0, #0x00 + BX R0 /* * void rt_hw_context_switch_to(rt_uint32 to); * R0 --> to @@ -132,34 +151,33 @@ rt_hw_context_switch_to: /* set from thread to 0 */ LDR R1, =rt_interrupt_from_thread - MOV R0, #0 + MOVS R0, #0 STR R0, [R1] /* set interrupt flag to 1 */ LDR R1, =rt_thread_switch_interrupt_flag - MOV R0, #1 + MOVS R0, #1 STR R0, [R1] /* set the PendSV exception priority */ - LDR R0, =SHPR3 - LDR R1, =PENDSV_PRI_LOWEST - LDR.W R2, [R0,#0] /* read */ - ORR R1, R1, R2 /* modify */ - STR R1, [R0] /* write-back */ + LDR R0, =NVIC_SHPR3 + LDR R1, =NVIC_PENDSV_PRI + LDR R2, [R0,#0x00] /* read */ + ORRS R1, R1, R2 /* modify */ + STR R1, [R0] /* write-back */ - LDR R0, =ICSR /* trigger the PendSV exception (causes context switch) */ - LDR R1, =PENDSVSET_BIT + LDR R0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */ + LDR R1, =NVIC_PENDSVSET STR R1, [R0] - - /* restore MSP */ - LDR r0, =SCB_VTOR - LDR r0, [r0] - LDR r0, [r0] NOP - MSR msp, r0 + /* restore MSP */ + LDR R0, =SCB_VTOR + LDR R0, [R0] + LDR R0, [R0] + NOP + MSR MSP, R0 /* enable interrupts at processor level */ - CPSIE F CPSIE I /* never reach here! */ @@ -175,29 +193,11 @@ rt_hw_interrupt_thread_switch: .type HardFault_Handler, %function HardFault_Handler: /* get current context */ - MRS r0, msp /* get fault context from handler. */ - TST lr, #0x04 /* if(!EXC_RETURN[2]) */ - BEQ _get_sp_done - MRS r0, psp /* get fault context from thread. */ -_get_sp_done: - - STMFD r0!, {r4 - r11} /* push r4 - r11 register */ - STMFD r0!, {lr} /* push exec_return register */ - - TST lr, #0x04 /* if(!EXC_RETURN[2]) */ - BEQ _update_msp - MSR psp, r0 /* update stack pointer to PSP. */ - B _update_done -_update_msp: - MSR msp, r0 /* update stack pointer to MSP. */ -_update_done: - + MRS R0, PSP /* get fault thread stack pointer */ PUSH {LR} BL rt_hw_hard_fault_exception - POP {LR} + POP {PC} - ORR LR, LR, #0x04 - BX LR /* * rt_uint32_t rt_hw_interrupt_check(void); diff --git a/libcpu/arm/cortex-m23/context_iar.S b/libcpu/arm/cortex-m23/context_iar.S index 91645c48b3..50d3781359 100644 --- a/libcpu/arm/cortex-m23/context_iar.S +++ b/libcpu/arm/cortex-m23/context_iar.S @@ -5,20 +5,20 @@ ; * ; * Change Logs: ; * Date Author Notes -; * 2009-01-17 Bernard first version -; * 2009-09-27 Bernard add protect when contex switch occurs +; * 2010-01-25 Bernard first version +; * 2012-06-01 aozima set pendsv priority to 0xFF. +; * 2012-08-17 aozima fixed bug: store r8 - r11. ; * 2013-06-18 aozima add restore MSP feature. -; * 2013-07-09 aozima enhancement hard fault exception handler. ; */ ;/** -; * @addtogroup cortex-m3 +; * @addtogroup CORTEX-M0 ; */ ;/*@{*/ SCB_VTOR EQU 0xE000ED08 ; Vector Table Offset Register NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register -NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2) +NVIC_SHPR3 EQU 0xE000ED20 ; system priority register (2) NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest) NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception @@ -62,7 +62,7 @@ rt_hw_context_switch: LDR r3, [r2] CMP r3, #1 BEQ _reswitch - MOV r3, #1 + MOVS r3, #0x1 STR r3, [r2] LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread @@ -90,65 +90,91 @@ PendSV_Handler: ; get rt_thread_switch_interrupt_flag LDR r0, =rt_thread_switch_interrupt_flag LDR r1, [r0] - CBZ r1, pendsv_exit ; pendsv already handled + CMP r1, #0x00 + BEQ pendsv_exit ; pendsv already handled ; clear rt_thread_switch_interrupt_flag to 0 - MOV r1, #0x00 + MOVS r1, #0x00 STR r1, [r0] LDR r0, =rt_interrupt_from_thread LDR r1, [r0] - CBZ r1, switch_to_thread ; skip register save at the first time + CMP r1, #0x00 + BEQ switch_to_thread ; skip register save at the first time MRS r1, psp ; get from thread stack pointer - STMFD r1!, {r4 - r11} ; push r4 - r11 register + + SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11} LDR r0, [r0] STR r1, [r0] ; update from thread stack pointer + STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack + + MOV r4, r8 ; mov thread {r8 - r11} to {r4 - r7} + MOV r5, r9 + MOV r6, r10 + MOV r7, r11 + STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack + switch_to_thread LDR r1, =rt_interrupt_to_thread LDR r1, [r1] LDR r1, [r1] ; load thread stack pointer - LDMFD r1!, {r4 - r11} ; pop r4 - r11 register + LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack + PUSH {r4 - r7} ; push {r4 - r7} to MSP for copy {r8 - r11} + + LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r7} + MOV r8, r4 ; mov {r4 - r7} to {r8 - r11} + MOV r9, r5 + MOV r10, r6 + MOV r11, r7 + + POP {r4 - r7} ; pop {r4 - r7} from MSP + MSR psp, r1 ; update stack pointer pendsv_exit ; restore interrupt MSR PRIMASK, r2 - ORR lr, lr, #0x04 - BX lr + MOVS r0, #0x04 + RSBS r0, r0, #0x00 + BX r0 ;/* ; * void rt_hw_context_switch_to(rt_uint32 to); ; * r0 --> to +; * this fucntion is used to perform the first thread switch ; */ EXPORT rt_hw_context_switch_to rt_hw_context_switch_to: + ; set to thread LDR r1, =rt_interrupt_to_thread STR r0, [r1] ; set from thread to 0 LDR r1, =rt_interrupt_from_thread - MOV r0, #0x0 + MOVS r0, #0x0 STR r0, [r1] ; set interrupt flag to 1 LDR r1, =rt_thread_switch_interrupt_flag - MOV r0, #1 + MOVS r0, #1 STR r0, [r1] ; set the PendSV exception priority - LDR r0, =NVIC_SYSPRI2 + LDR r0, =NVIC_SHPR3 LDR r1, =NVIC_PENDSV_PRI - LDR.W r2, [r0,#0x00] ; read - ORR r1,r1,r2 ; modify + LDR r2, [r0,#0x00] ; read + ORRS r1,r1,r2 ; modify STR r1, [r0] ; write-back - LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch) + ; trigger the PendSV exception (causes context switch) + LDR r0, =NVIC_INT_CTRL LDR r1, =NVIC_PENDSVSET STR r1, [r0] + NOP ; restore MSP LDR r0, =SCB_VTOR @@ -158,7 +184,6 @@ rt_hw_context_switch_to: MSR msp, r0 ; enable interrupts at processor level - CPSIE F CPSIE I ; never reach here! @@ -173,30 +198,9 @@ rt_hw_interrupt_thread_switch: HardFault_Handler: ; get current context - MRS r0, msp ; get fault context from handler. - TST lr, #0x04 ; if(!EXC_RETURN[2]) - BEQ _get_sp_done - MRS r0, psp ; get fault context from thread. -_get_sp_done - - STMFD r0!, {r4 - r11} ; push r4 - r11 register - ;STMFD r0!, {lr} ; push exec_return register - SUB r0, r0, #0x04 - STR lr, [r0] - - TST lr, #0x04 ; if(!EXC_RETURN[2]) - BEQ _update_msp - MSR psp, r0 ; update stack pointer to PSP. - B _update_done -_update_msp - MSR msp, r0 ; update stack pointer to MSP. -_update_done - + MRS r0, psp ; get fault thread stack pointer PUSH {lr} BL rt_hw_hard_fault_exception - POP {lr} - - ORR lr, lr, #0x04 - BX lr + POP {pc} END diff --git a/libcpu/arm/cortex-m23/context_rvds.S b/libcpu/arm/cortex-m23/context_rvds.S index c0a2130703..54145773d3 100644 --- a/libcpu/arm/cortex-m23/context_rvds.S +++ b/libcpu/arm/cortex-m23/context_rvds.S @@ -5,9 +5,10 @@ ; * ; * Change Logs: ; * Date Author Notes -; * 2009-01-17 Bernard first version +; * 2010-01-25 Bernard first version +; * 2012-06-01 aozima set pendsv priority to 0xFF. +; * 2012-08-17 aozima fixed bug: store r8 - r11. ; * 2013-06-18 aozima add restore MSP feature. -; * 2013-07-09 aozima enhancement hard fault exception handler. ; */ ;/** @@ -17,7 +18,7 @@ SCB_VTOR EQU 0xE000ED08 ; Vector Table Offset Register NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register -NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2) +NVIC_SHPR3 EQU 0xE000ED20 ; system priority register (2) NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest) NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception @@ -45,8 +46,8 @@ rt_hw_interrupt_disable PROC ; */ rt_hw_interrupt_enable PROC EXPORT rt_hw_interrupt_enable - MSR PRIMASK, r0 - BX LR + MSR PRIMASK, r0 + BX LR ENDP ;/* @@ -64,7 +65,7 @@ rt_hw_context_switch PROC LDR r3, [r2] CMP r3, #1 BEQ _reswitch - MOV r3, #1 + MOVS r3, #0x01 STR r3, [r2] LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread @@ -83,7 +84,7 @@ _reswitch ; r0 --> switch from thread stack ; r1 --> switch to thread stack ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack -PendSV_Handler PROC +PendSV_Handler PROC EXPORT PendSV_Handler ; disable interrupt to protect context switch @@ -93,35 +94,57 @@ PendSV_Handler PROC ; get rt_thread_switch_interrupt_flag LDR r0, =rt_thread_switch_interrupt_flag LDR r1, [r0] - CBZ r1, pendsv_exit ; pendsv already handled + CMP r1, #0x00 + BEQ pendsv_exit ; pendsv already handled ; clear rt_thread_switch_interrupt_flag to 0 - MOV r1, #0x00 + MOVS r1, #0x00 STR r1, [r0] LDR r0, =rt_interrupt_from_thread LDR r1, [r0] - CBZ r1, switch_to_thread ; skip register save at the first time + CMP r1, #0x00 + BEQ switch_to_thread ; skip register save at the first time MRS r1, psp ; get from thread stack pointer - STMFD r1!, {r4 - r11} ; push r4 - r11 register + + SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11} LDR r0, [r0] STR r1, [r0] ; update from thread stack pointer + STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack + + MOV r4, r8 ; mov thread {r8 - r11} to {r4 - r7} + MOV r5, r9 + MOV r6, r10 + MOV r7, r11 + STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack + switch_to_thread LDR r1, =rt_interrupt_to_thread LDR r1, [r1] LDR r1, [r1] ; load thread stack pointer - LDMFD r1!, {r4 - r11} ; pop r4 - r11 register + LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack + PUSH {r4 - r7} ; push {r4 - r7} to MSP for copy {r8 - r11} + + LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r7} + MOV r8, r4 ; mov {r4 - r7} to {r8 - r11} + MOV r9, r5 + MOV r10, r6 + MOV r11, r7 + + POP {r4 - r7} ; pop {r4 - r7} from MSP + MSR psp, r1 ; update stack pointer pendsv_exit ; restore interrupt MSR PRIMASK, r2 - ORR lr, lr, #0x04 - BX lr + MOVS r0, #0x04 + RSBS r0, r0, #0x00 + BX r0 ENDP ;/* @@ -137,19 +160,19 @@ rt_hw_context_switch_to PROC ; set from thread to 0 LDR r1, =rt_interrupt_from_thread - MOV r0, #0x0 + MOVS r0, #0x0 STR r0, [r1] ; set interrupt flag to 1 LDR r1, =rt_thread_switch_interrupt_flag - MOV r0, #1 + MOVS r0, #1 STR r0, [r1] ; set the PendSV exception priority - LDR r0, =NVIC_SYSPRI2 + LDR r0, =NVIC_SHPR3 LDR r1, =NVIC_PENDSV_PRI - LDR.W r2, [r0,#0x00] ; read - ORR r1,r1,r2 ; modify + LDR r2, [r0,#0x00] ; read + ORRS r1,r1,r2 ; modify STR r1, [r0] ; write-back ; trigger the PendSV exception (causes context switch) @@ -164,7 +187,6 @@ rt_hw_context_switch_to PROC MSR msp, r0 ; enable interrupts at processor level - CPSIE F CPSIE I ; never reach here! @@ -177,29 +199,15 @@ rt_hw_interrupt_thread_switch PROC ENDP IMPORT rt_hw_hard_fault_exception - EXPORT HardFault_Handler + HardFault_Handler PROC + EXPORT HardFault_Handler ; get current context - TST lr, #0x04 ; if(!EXC_RETURN[2]) - ITE EQ - MRSEQ r0, msp ; [2]=0 ==> Z=1, get fault context from handler. - MRSNE r0, psp ; [2]=1 ==> Z=0, get fault context from thread. - - STMFD r0!, {r4 - r11} ; push r4 - r11 register - STMFD r0!, {lr} ; push exec_return register - - TST lr, #0x04 ; if(!EXC_RETURN[2]) - ITE EQ - MSREQ msp, r0 ; [2]=0 ==> Z=1, update stack pointer to MSP. - MSRNE psp, r0 ; [2]=1 ==> Z=0, update stack pointer to PSP. - + MRS r0, psp ; get fault thread stack pointer PUSH {lr} BL rt_hw_hard_fault_exception - POP {lr} - - ORR lr, lr, #0x04 - BX lr + POP {pc} ENDP ALIGN 4 diff --git a/libcpu/arm/cortex-m23/cpuport.c b/libcpu/arm/cortex-m23/cpuport.c index a386747750..5d36fa11fe 100644 --- a/libcpu/arm/cortex-m23/cpuport.c +++ b/libcpu/arm/cortex-m23/cpuport.c @@ -4,13 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 * * Change Logs: - * Date Author Notes - * 2009-01-05 Bernard first version - * 2011-02-14 onelife Modify for EFM32 - * 2011-06-17 onelife Merge all of the C source code into cpuport.c - * 2012-12-23 aozima stack addr align to 8byte. - * 2012-12-29 Bernard Add exception hook. - * 2013-07-09 aozima enhancement hard fault exception handler. + * Date Author Notes + * 2010-01-25 Bernard first version + * 2012-05-31 aozima Merge all of the C source code into cpuport.c + * 2012-08-17 aozima fixed bug: store r8 - r11. + * 2012-12-23 aozima stack addr align to 8byte. */ #include @@ -29,11 +27,13 @@ struct exception_stack_frame struct stack_frame { - /* r4 ~ r11 register */ + /* r4 ~ r7 low register */ rt_uint32_t r4; rt_uint32_t r5; rt_uint32_t r6; rt_uint32_t r7; + + /* r8 ~ r11 high register */ rt_uint32_t r8; rt_uint32_t r9; rt_uint32_t r10; @@ -45,8 +45,6 @@ struct stack_frame /* flag in interrupt handling */ rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread; rt_uint32_t rt_thread_switch_interrupt_flag; -/* exception hook */ -static rt_err_t (*rt_exception_hook)(void *context) = RT_NULL; /** * This function will initialize thread stack @@ -92,312 +90,46 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, return stk; } +extern long list_thread(void); +extern rt_thread_t rt_current_thread; /** - * This function set the hook, which is invoked on fault exception handling. - * - * @param exception_handle the exception handling hook function. + * fault exception handling */ -void rt_hw_exception_install(rt_err_t (*exception_handle)(void* context)) +void rt_hw_hard_fault_exception(struct exception_stack_frame *contex) { - rt_exception_hook = exception_handle; + rt_kprintf("psr: 0x%08x\n", contex->psr); + rt_kprintf(" pc: 0x%08x\n", contex->pc); + rt_kprintf(" lr: 0x%08x\n", contex->lr); + rt_kprintf("r12: 0x%08x\n", contex->r12); + rt_kprintf("r03: 0x%08x\n", contex->r3); + rt_kprintf("r02: 0x%08x\n", contex->r2); + rt_kprintf("r01: 0x%08x\n", contex->r1); + rt_kprintf("r00: 0x%08x\n", contex->r0); + + rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name); + +#ifdef RT_USING_FINSH + list_thread(); +#endif + + while (1); } #define SCB_CFSR (*(volatile const unsigned *)0xE000ED28) /* Configurable Fault Status Register */ #define SCB_HFSR (*(volatile const unsigned *)0xE000ED2C) /* HardFault Status Register */ #define SCB_MMAR (*(volatile const unsigned *)0xE000ED34) /* MemManage Fault Address register */ #define SCB_BFAR (*(volatile const unsigned *)0xE000ED38) /* Bus Fault Address Register */ -#define SCB_AIRCR (*(volatile unsigned long *)0xE000ED0C) /* Reset control Address Register */ +#define SCB_AIRCR (*(volatile unsigned long *)0xE000ED00) /* Reset control Address Register */ #define SCB_RESET_VALUE 0x05FA0004 /* Reset value, write to SCB_AIRCR can reset cpu */ #define SCB_CFSR_MFSR (*(volatile const unsigned char*)0xE000ED28) /* Memory-management Fault Status Register */ #define SCB_CFSR_BFSR (*(volatile const unsigned char*)0xE000ED29) /* Bus Fault Status Register */ #define SCB_CFSR_UFSR (*(volatile const unsigned short*)0xE000ED2A) /* Usage Fault Status Register */ -#ifdef RT_USING_FINSH -static void usage_fault_track(void) -{ - rt_kprintf("usage fault:\n"); - rt_kprintf("SCB_CFSR_UFSR:0x%02X ", SCB_CFSR_UFSR); - - if(SCB_CFSR_UFSR & (1<<0)) - { - /* [0]:UNDEFINSTR */ - rt_kprintf("UNDEFINSTR "); - } - - if(SCB_CFSR_UFSR & (1<<1)) - { - /* [1]:INVSTATE */ - rt_kprintf("INVSTATE "); - } - - if(SCB_CFSR_UFSR & (1<<2)) - { - /* [2]:INVPC */ - rt_kprintf("INVPC "); - } - - if(SCB_CFSR_UFSR & (1<<3)) - { - /* [3]:NOCP */ - rt_kprintf("NOCP "); - } - - if(SCB_CFSR_UFSR & (1<<8)) - { - /* [8]:UNALIGNED */ - rt_kprintf("UNALIGNED "); - } - - if(SCB_CFSR_UFSR & (1<<9)) - { - /* [9]:DIVBYZERO */ - rt_kprintf("DIVBYZERO "); - } - - rt_kprintf("\n"); -} - -static void bus_fault_track(void) -{ - rt_kprintf("bus fault:\n"); - rt_kprintf("SCB_CFSR_BFSR:0x%02X ", SCB_CFSR_BFSR); - - if(SCB_CFSR_BFSR & (1<<0)) - { - /* [0]:IBUSERR */ - rt_kprintf("IBUSERR "); - } - - if(SCB_CFSR_BFSR & (1<<1)) - { - /* [1]:PRECISERR */ - rt_kprintf("PRECISERR "); - } - - if(SCB_CFSR_BFSR & (1<<2)) - { - /* [2]:IMPRECISERR */ - rt_kprintf("IMPRECISERR "); - } - - if(SCB_CFSR_BFSR & (1<<3)) - { - /* [3]:UNSTKERR */ - rt_kprintf("UNSTKERR "); - } - - if(SCB_CFSR_BFSR & (1<<4)) - { - /* [4]:STKERR */ - rt_kprintf("STKERR "); - } - - if(SCB_CFSR_BFSR & (1<<7)) - { - rt_kprintf("SCB->BFAR:%08X\n", SCB_BFAR); - } - else - { - rt_kprintf("\n"); - } -} - -static void mem_manage_fault_track(void) -{ - rt_kprintf("mem manage fault:\n"); - rt_kprintf("SCB_CFSR_MFSR:0x%02X ", SCB_CFSR_MFSR); - - if(SCB_CFSR_MFSR & (1<<0)) - { - /* [0]:IACCVIOL */ - rt_kprintf("IACCVIOL "); - } - - if(SCB_CFSR_MFSR & (1<<1)) - { - /* [1]:DACCVIOL */ - rt_kprintf("DACCVIOL "); - } - - if(SCB_CFSR_MFSR & (1<<3)) - { - /* [3]:MUNSTKERR */ - rt_kprintf("MUNSTKERR "); - } - - if(SCB_CFSR_MFSR & (1<<4)) - { - /* [4]:MSTKERR */ - rt_kprintf("MSTKERR "); - } - - if(SCB_CFSR_MFSR & (1<<7)) - { - /* [7]:MMARVALID */ - rt_kprintf("SCB->MMAR:%08X\n", SCB_MMAR); - } - else - { - rt_kprintf("\n"); - } -} - -static void hard_fault_track(void) -{ - if(SCB_HFSR & (1UL<<1)) - { - /* [1]:VECTBL, Indicates hard fault is caused by failed vector fetch. */ - rt_kprintf("failed vector fetch\n"); - } - - if(SCB_HFSR & (1UL<<30)) - { - /* [30]:FORCED, Indicates hard fault is taken because of bus fault, - memory management fault, or usage fault. */ - if(SCB_CFSR_BFSR) - { - bus_fault_track(); - } - - if(SCB_CFSR_MFSR) - { - mem_manage_fault_track(); - } - - if(SCB_CFSR_UFSR) - { - usage_fault_track(); - } - } - - if(SCB_HFSR & (1UL<<31)) - { - /* [31]:DEBUGEVT, Indicates hard fault is triggered by debug event. */ - rt_kprintf("debug event\n"); - } -} -#endif /* RT_USING_FINSH */ - -struct exception_info -{ - rt_uint32_t exc_return; - struct stack_frame stack_frame; -}; - -/* - * fault exception handler - */ -void rt_hw_hard_fault_exception(struct exception_info * exception_info) -{ - extern long list_thread(void); - struct stack_frame* context = &exception_info->stack_frame; - - if (rt_exception_hook != RT_NULL) - { - rt_err_t result; - - result = rt_exception_hook(exception_info); - if (result == RT_EOK) - return; - } - - rt_kprintf("psr: 0x%08x\n", context->exception_stack_frame.psr); - - rt_kprintf("r00: 0x%08x\n", context->exception_stack_frame.r0); - rt_kprintf("r01: 0x%08x\n", context->exception_stack_frame.r1); - rt_kprintf("r02: 0x%08x\n", context->exception_stack_frame.r2); - rt_kprintf("r03: 0x%08x\n", context->exception_stack_frame.r3); - rt_kprintf("r04: 0x%08x\n", context->r4); - rt_kprintf("r05: 0x%08x\n", context->r5); - rt_kprintf("r06: 0x%08x\n", context->r6); - rt_kprintf("r07: 0x%08x\n", context->r7); - rt_kprintf("r08: 0x%08x\n", context->r8); - rt_kprintf("r09: 0x%08x\n", context->r9); - rt_kprintf("r10: 0x%08x\n", context->r10); - rt_kprintf("r11: 0x%08x\n", context->r11); - rt_kprintf("r12: 0x%08x\n", context->exception_stack_frame.r12); - rt_kprintf(" lr: 0x%08x\n", context->exception_stack_frame.lr); - rt_kprintf(" pc: 0x%08x\n", context->exception_stack_frame.pc); - - if(exception_info->exc_return & (1 << 2) ) - { - rt_kprintf("hard fault on thread: %s\r\n\r\n", rt_thread_self()->name); - -#ifdef RT_USING_FINSH - list_thread(); -#endif /* RT_USING_FINSH */ - } - else - { - rt_kprintf("hard fault on handler\r\n\r\n"); - } - -#ifdef RT_USING_FINSH - hard_fault_track(); -#endif /* RT_USING_FINSH */ - - while (1); -} - -/** - * shutdown CPU - */ -void rt_hw_cpu_shutdown(void) -{ - rt_kprintf("shutdown...\n"); - - RT_ASSERT(0); -} - /** * reset CPU */ RT_WEAK void rt_hw_cpu_reset(void) { - SCB_AIRCR = SCB_RESET_VALUE; + SCB_AIRCR = SCB_RESET_VALUE;//((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |SCB_AIRCR_SYSRESETREQ_Msk); } - -#ifdef RT_USING_CPU_FFS -/** - * This function finds the first bit set (beginning with the least significant bit) - * in value and return the index of that bit. - * - * Bits are numbered starting at 1 (the least significant bit). A return value of - * zero from any of these functions means that the argument was zero. - * - * @return return the index of the first bit set. If value is 0, then this function - * shall return 0. - */ -#if defined(__CC_ARM) -__asm int __rt_ffs(int value) -{ - CMP r0, #0x00 - BEQ exit - - RBIT r0, r0 - CLZ r0, r0 - ADDS r0, r0, #0x01 - -exit - BX lr -} -#elif defined(__IAR_SYSTEMS_ICC__) -int __rt_ffs(int value) -{ - if (value == 0) return value; - - asm("RBIT %0, %1" : "=r"(value) : "r"(value)); - asm("CLZ %0, %1" : "=r"(value) : "r"(value)); - asm("ADDS %0, %1, #0x01" : "=r"(value) : "r"(value)); - - return value; -} -#elif defined(__GNUC__) -int __rt_ffs(int value) -{ - return __builtin_ffs(value); -} -#endif - -#endif