add a new CROSS_TOOL(iar) in the rtconfig.py for stm3210 branch
now the scons support three CROSS_TOOL(gcc, keil, iar)in the stm3210 branch git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1280 bbd45198-f89e-11dd-88c7-29a3b14d5316
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@ -15,6 +15,10 @@ env = Environment(tools = ['mingw'],
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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if rtconfig.PLATFORM == 'iar':
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env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
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Export('RTT_ROOT')
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Export('rtconfig')
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@ -8,7 +8,10 @@ if CROSS_TOOL == 'gcc':
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EXEC_PATH = 'D:/SourceryGCC/bin'
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elif CROSS_TOOL == 'keil':
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PLATFORM = 'armcc'
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EXEC_PATH = 'E:/Keil'
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EXEC_PATH = 'C:/Keil'
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elif CROSS_TOOL == 'iar':
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PLATFORM = 'iar'
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IAR_PATH = 'C:/Program Files/IAR Systems/Embedded Workbench 5.4 Evaluation_0'
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BUILD = 'debug'
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STM32_TYPE = 'STM32F10X_HD'
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@ -78,8 +81,37 @@ elif PLATFORM == 'iar':
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DEVICE = ' --cpu DARMSTM --thumb'
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CFLAGS = ''
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CFLAGS += ' --diag_suppress Pa050'
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CFLAGS += ' --no_cse'
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CFLAGS += ' --no_unroll'
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CFLAGS += ' --no_inline'
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CFLAGS += ' --no_code_motion'
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CFLAGS += ' --no_tbaa'
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CFLAGS += ' --no_clustering'
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CFLAGS += ' --no_scheduling'
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CFLAGS += ' --debug'
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CFLAGS += ' --endian=little'
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CFLAGS += ' --cpu=Cortex-M3'
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CFLAGS += ' -e'
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CFLAGS += ' --fpu=None'
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CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/DLib_Config_Normal.h"'
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CFLAGS += ' -Ol'
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CFLAGS += ' -I"' + IAR_PATH + '/arm/inc"'
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AFLAGS = ''
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AFLAGS += ' -s+'
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# AFLAGS += ' -M<>'
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AFLAGS += ' -w+'
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AFLAGS += ' -r'
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AFLAGS += ' --cpu Cortex-M3'
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AFLAGS += ' --fpu None'
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AFLAGS += ' -I"' + IAR_PATH + '/arm/INC"'
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LFLAGS = ' --config stm32f10x_flash.icf'
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LFLAGS += ' --redirect _Printf=_PrintfTiny'
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LFLAGS += ' --redirect _Scanf=_ScanfSmall'
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# LFLAGS = ' --map I:\RTT\20110219\rt-thread\bsp\stm3210\Debug\List\project.map
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LFLAGS += ' --entry __iar_program_start'
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EXEC_PATH += '/arm/bin/'
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EXEC_PATH = IAR_PATH + '/arm/bin/'
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POST_ACTION = ''
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