[armclang] 使用__clang__代替__CLANG_ARM
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@ -21,7 +21,7 @@
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#define V85XX_SRAM_SIZE 32
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#define V85XX_SRAM_END (0x20000000 + V85XX_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -18,7 +18,7 @@
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extern int rt_application_init(void);
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#elif __ICCARM__
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#pragma section="HEAP"
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@ -58,7 +58,7 @@ void rt_hw_board_init(void)
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#ifdef RT_USING_HEAP
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SOC_SRAM_END_ADDR);
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#elif __ICCARM__
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rt_system_heap_init(__segment_end("HEAP"), (void *)SOC_SRAM_END_ADDR);
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@ -17,7 +17,7 @@
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extern int rt_application_init(void);
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#elif __ICCARM__
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#pragma section="HEAP"
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@ -57,7 +57,7 @@ void rt_hw_board_init(void)
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#ifdef RT_USING_HEAP
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SOC_SRAM_END_ADDR);
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#elif __ICCARM__
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rt_system_heap_init(__segment_end("HEAP"), (void *)SOC_SRAM_END_ADDR);
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@ -36,7 +36,7 @@ extern "C" {
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#define APM32_SRAM_SIZE 128
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#define APM32_SRAM_END (0x20000000 + APM32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -29,7 +29,7 @@ extern "C" {
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#define AT32_SRAM_SIZE 96
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#define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -29,7 +29,7 @@ extern "C" {
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#define AT32_SRAM_SIZE 96
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#define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -31,7 +31,7 @@
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#define ES32F0_SRAM_SIZE 0x8000
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#define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -30,7 +30,7 @@
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#define ES32F3_SRAM_SIZE 0x10000
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#define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -31,7 +31,7 @@
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#define ES32F3_SRAM_SIZE 0x18000
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#define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -25,7 +25,7 @@ extern char __ICFEDIT_region_RAM_end__;
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#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
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#endif
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -28,7 +28,7 @@ extern "C" {
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#define HK32_SRAM_SIZE 10
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#define HK32_SRAM_END (0x20000000 + HK32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -20,7 +20,7 @@ int main(void)
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{
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#if defined(__CC_ARM)
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rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION);
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#elif defined(__CLANG_ARM)
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#elif defined(__clang__)
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rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION);
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#elif defined(__ICCARM__)
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rt_kprintf("using iccarm, version: %d\n", __VER__);
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@ -29,7 +29,7 @@
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// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
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// </RDTConfigurator>
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$ARM_LIB_HEAP$$ZI$$Base;
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#define HEAP_BEGIN ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base)
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#elif defined(__ICCARM__)
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@ -24,7 +24,7 @@ int main(void)
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{
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#if defined(__CC_ARM)
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rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION);
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#elif defined(__CLANG_ARM)
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#elif defined(__clang__)
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rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION);
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#elif defined(__ICCARM__)
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rt_kprintf("using iccarm, version: %d\n", __VER__);
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@ -29,7 +29,7 @@
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// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
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// </RDTConfigurator>
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$ARM_LIB_HEAP$$ZI$$Base;
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extern int Image$$ARM_LIB_STACK$$ZI$$Base;
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#define HEAP_BEGIN ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base)
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@ -26,7 +26,7 @@
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#define MCU_SRAM_START (0x20000000)
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#define MCU_SRAM_END (MCU_SRAM_START + MCU_SRAM_SIZE_KB * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -16,7 +16,7 @@
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#define SRAM_SIZE 0x2000
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#define SRAM_END (SRAM_BASE + SRAM_SIZE)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -28,7 +28,7 @@ extern "C" {
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#define N32_SRAM_SIZE (80)
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#define N32_SRAM_END (0x20000000 + N32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
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#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
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#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
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#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
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#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
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#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define SRAM_SIZE (160)
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#define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define SRAM_SIZE (96)
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#define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define SRAM_SIZE (256)
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#define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define SRAM_SIZE (160)
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#define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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extern void finsh_set_device(const char* device);
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#endif
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#elif __ICCARM__
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#pragma section="HEAP"
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rt_system_timer_init();
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#ifdef RT_USING_HEAP
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)CHIP_SRAM_END);
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#elif __ICCARM__
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rt_system_heap_init(__segment_end("HEAP"), (void*)CHIP_SRAM_END);
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#define STM32_SRAM_SIZE 32
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define STM32_SRAM_SIZE 20
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define STM32_SRAM_SIZE 128
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define STM32_SRAM_SIZE 16
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define STM32_SRAM_SIZE 128
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#define STM32_SRAM_SIZE (512)
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -27,7 +27,7 @@ extern "C" {
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#define STM32_SRAM_SIZE (512)
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#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -27,7 +27,7 @@ extern "C" {
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#define STM32_SRAM_SIZE 16
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -29,7 +29,7 @@ extern "C" {
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#define STM32_SRAM1_START (0x20000000)
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#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -29,7 +29,7 @@ extern "C" {
|
|||
#define STM32_SRAM1_START (0x20000000)
|
||||
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -29,7 +29,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (128)
|
||||
#define STM32_SRAM_END ((uint32_t)0x10040000 + (STM32_SRAM_SIZE * 1024))
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -29,7 +29,7 @@ extern "C" {
|
|||
#define STM32_SRAM1_START (0x20000000)
|
||||
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 16
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 32
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 20
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 64
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 20
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -29,7 +29,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 64
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
#define STM32_SRAM_SIZE 20
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_FLASH_SIZE (512 * 1024)
|
||||
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 20
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 64
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 64
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 48
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 64
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 128
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 16
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 96
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (128)
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 128
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -26,7 +26,7 @@ static lv_disp_drv_t disp_drv;
|
|||
lv_color_t buf_1[LCD_H * LCD_W];
|
||||
#elif defined ( __CC_ARM ) /* MDK ARM Compiler */
|
||||
__attribute__((at(0x68000000))) lv_color_t buf_1[LCD_H * LCD_W];
|
||||
#elif defined ( __CLANG_ARM ) /* MDK ARM Compiler v6 */
|
||||
#elif defined ( __clang__ ) /* MDK ARM Compiler v6 */
|
||||
__attribute__((section(".ARM.__at_0x68000000"))) lv_color_t buf_1[LCD_H * LCD_W];
|
||||
#elif defined ( __GNUC__ ) /* GNU Compiler */
|
||||
lv_color_t buf_1[LCD_H * LCD_W] __attribute__((section(".MCUlcdgrambysram")));
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_FLASH_SIZE (1024 * 1024)
|
||||
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 128
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -23,7 +23,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (128)
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 32
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 128
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 128
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 128
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 256
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 320
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -29,7 +29,7 @@ extern "C" {
|
|||
#define STM32_SRAM1_START (0x20000000)
|
||||
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_FLASH_SIZE (2 * 1024 * 1024)
|
||||
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (192)
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_FLASH_SIZE (1024 * 1024)
|
||||
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (256 - 64)
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#define STM32_SRAM_SIZE 128
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (384 - 64)
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
#define STM32_SRAM_SIZE (320)
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
#define STM32_SRAM_SIZE (256)
|
||||
#define STM32_SRAM_END (0x20010000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (512)
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_FLASH_SIZE (1024 * 1024)
|
||||
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#define STM32_SRAM_SIZE (512)
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (512)
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 36
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 36
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#define STM32_SRAM_SIZE 32
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#define STM32_SRAM_SIZE 32
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (512)
|
||||
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -31,7 +31,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (512)
|
||||
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -29,7 +29,7 @@ extern "C" {
|
|||
#define STM32_SRAM1_START (0x20000000)
|
||||
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (512)
|
||||
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (128)
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -27,7 +27,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE (128)
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -77,7 +77,7 @@ extern "C" {
|
|||
#define STM32_SRAM1_START RAM_START
|
||||
#define STM32_SRAM1_END RAM_END
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 20
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM_SIZE 8
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -34,7 +34,7 @@ extern "C" {
|
|||
#define STM32_FLASH_SIZE (256 * 1024)
|
||||
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -29,7 +29,7 @@ extern "C" {
|
|||
#define STM32_SRAM1_START (0x20000000)
|
||||
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM1_START (0x20000000)
|
||||
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -39,7 +39,7 @@ extern "C" {
|
|||
#define STM32_FLASH_SIZE (1024 * 1024)
|
||||
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM1_START (0x20000000)
|
||||
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
|
@ -28,7 +28,7 @@ extern "C" {
|
|||
#define STM32_SRAM1_START (0x20000000)
|
||||
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue