[armclang] 使用__clang__代替__CLANG_ARM

This commit is contained in:
Meco Man 2021-12-29 14:14:07 -05:00
parent ead24644f0
commit 5187d75af5
131 changed files with 144 additions and 148 deletions

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@ -21,7 +21,7 @@
#define V85XX_SRAM_SIZE 32 #define V85XX_SRAM_SIZE 32
#define V85XX_SRAM_END (0x20000000 + V85XX_SRAM_SIZE * 1024) #define V85XX_SRAM_END (0x20000000 + V85XX_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -18,7 +18,7 @@
extern int rt_application_init(void); extern int rt_application_init(void);
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__ #elif __ICCARM__
#pragma section="HEAP" #pragma section="HEAP"
@ -58,7 +58,7 @@ void rt_hw_board_init(void)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME); rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#ifdef RT_USING_HEAP #ifdef RT_USING_HEAP
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SOC_SRAM_END_ADDR); rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SOC_SRAM_END_ADDR);
#elif __ICCARM__ #elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void *)SOC_SRAM_END_ADDR); rt_system_heap_init(__segment_end("HEAP"), (void *)SOC_SRAM_END_ADDR);

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@ -17,7 +17,7 @@
extern int rt_application_init(void); extern int rt_application_init(void);
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__ #elif __ICCARM__
#pragma section="HEAP" #pragma section="HEAP"
@ -57,7 +57,7 @@ void rt_hw_board_init(void)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME); rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#ifdef RT_USING_HEAP #ifdef RT_USING_HEAP
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SOC_SRAM_END_ADDR); rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SOC_SRAM_END_ADDR);
#elif __ICCARM__ #elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void *)SOC_SRAM_END_ADDR); rt_system_heap_init(__segment_end("HEAP"), (void *)SOC_SRAM_END_ADDR);

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@ -36,7 +36,7 @@ extern "C" {
#define APM32_SRAM_SIZE 128 #define APM32_SRAM_SIZE 128
#define APM32_SRAM_END (0x20000000 + APM32_SRAM_SIZE * 1024) #define APM32_SRAM_END (0x20000000 + APM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -29,7 +29,7 @@ extern "C" {
#define AT32_SRAM_SIZE 96 #define AT32_SRAM_SIZE 96
#define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024) #define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -29,7 +29,7 @@ extern "C" {
#define AT32_SRAM_SIZE 96 #define AT32_SRAM_SIZE 96
#define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024) #define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -31,7 +31,7 @@
#define ES32F0_SRAM_SIZE 0x8000 #define ES32F0_SRAM_SIZE 0x8000
#define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE) #define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -30,7 +30,7 @@
#define ES32F3_SRAM_SIZE 0x10000 #define ES32F3_SRAM_SIZE 0x10000
#define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE) #define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -31,7 +31,7 @@
#define ES32F3_SRAM_SIZE 0x18000 #define ES32F3_SRAM_SIZE 0x18000
#define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE) #define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -25,7 +25,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define HK32_SRAM_SIZE 10 #define HK32_SRAM_SIZE 10
#define HK32_SRAM_END (0x20000000 + HK32_SRAM_SIZE * 1024) #define HK32_SRAM_END (0x20000000 + HK32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -20,7 +20,7 @@ int main(void)
{ {
#if defined(__CC_ARM) #if defined(__CC_ARM)
rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION); rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION);
#elif defined(__CLANG_ARM) #elif defined(__clang__)
rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION); rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION);
#elif defined(__ICCARM__) #elif defined(__ICCARM__)
rt_kprintf("using iccarm, version: %d\n", __VER__); rt_kprintf("using iccarm, version: %d\n", __VER__);

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@ -29,7 +29,7 @@
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse"> // <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// </RDTConfigurator> // </RDTConfigurator>
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$ARM_LIB_HEAP$$ZI$$Base; extern int Image$$ARM_LIB_HEAP$$ZI$$Base;
#define HEAP_BEGIN ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base) #define HEAP_BEGIN ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base)
#elif defined(__ICCARM__) #elif defined(__ICCARM__)

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@ -24,7 +24,7 @@ int main(void)
{ {
#if defined(__CC_ARM) #if defined(__CC_ARM)
rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION); rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION);
#elif defined(__CLANG_ARM) #elif defined(__clang__)
rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION); rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION);
#elif defined(__ICCARM__) #elif defined(__ICCARM__)
rt_kprintf("using iccarm, version: %d\n", __VER__); rt_kprintf("using iccarm, version: %d\n", __VER__);

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@ -29,7 +29,7 @@
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse"> // <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// </RDTConfigurator> // </RDTConfigurator>
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$ARM_LIB_HEAP$$ZI$$Base; extern int Image$$ARM_LIB_HEAP$$ZI$$Base;
extern int Image$$ARM_LIB_STACK$$ZI$$Base; extern int Image$$ARM_LIB_STACK$$ZI$$Base;
#define HEAP_BEGIN ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base) #define HEAP_BEGIN ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base)

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@ -26,7 +26,7 @@
#define MCU_SRAM_START (0x20000000) #define MCU_SRAM_START (0x20000000)
#define MCU_SRAM_END (MCU_SRAM_START + MCU_SRAM_SIZE_KB * 1024) #define MCU_SRAM_END (MCU_SRAM_START + MCU_SRAM_SIZE_KB * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -16,7 +16,7 @@
#define SRAM_SIZE 0x2000 #define SRAM_SIZE 0x2000
#define SRAM_END (SRAM_BASE + SRAM_SIZE) #define SRAM_END (SRAM_BASE + SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define N32_SRAM_SIZE (80) #define N32_SRAM_SIZE (80)
#define N32_SRAM_END (0x20000000 + N32_SRAM_SIZE * 1024) #define N32_SRAM_END (0x20000000 + N32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -20,7 +20,7 @@
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024 #define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE) #define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -10,7 +10,7 @@
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024 #define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE) #define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -10,7 +10,7 @@
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024 #define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE) #define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -20,7 +20,7 @@
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024 #define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE) #define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -20,7 +20,7 @@
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024 #define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE) #define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -17,7 +17,7 @@
#define SRAM_SIZE (160) #define SRAM_SIZE (160)
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024) #define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -17,7 +17,7 @@
#define SRAM_SIZE (96) #define SRAM_SIZE (96)
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024) #define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -17,7 +17,7 @@
#define SRAM_SIZE (256) #define SRAM_SIZE (256)
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024) #define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -17,7 +17,7 @@
#define SRAM_SIZE (160) #define SRAM_SIZE (160)
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024) #define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -29,7 +29,7 @@ extern void finsh_system_init(void);
extern void finsh_set_device(const char* device); extern void finsh_set_device(const char* device);
#endif #endif
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__ #elif __ICCARM__
#pragma section="HEAP" #pragma section="HEAP"
@ -72,7 +72,7 @@ void rtthread_startup(void)
rt_system_timer_init(); rt_system_timer_init();
#ifdef RT_USING_HEAP #ifdef RT_USING_HEAP
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)CHIP_SRAM_END); rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)CHIP_SRAM_END);
#elif __ICCARM__ #elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)CHIP_SRAM_END); rt_system_heap_init(__segment_end("HEAP"), (void*)CHIP_SRAM_END);

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 16 #define STM32_SRAM_SIZE 16
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 16 #define STM32_SRAM_SIZE 16
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM_SIZE (128) #define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END ((uint32_t)0x10040000 + (STM32_SRAM_SIZE * 1024)) #define STM32_SRAM_END ((uint32_t)0x10040000 + (STM32_SRAM_SIZE * 1024))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 16 #define STM32_SRAM_SIZE 16
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -23,7 +23,7 @@
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_FLASH_SIZE (512 * 1024) #define STM32_FLASH_SIZE (512 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 48 #define STM32_SRAM_SIZE 48
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 16 #define STM32_SRAM_SIZE 16
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 96 #define STM32_SRAM_SIZE 96
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (128) #define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -26,7 +26,7 @@ static lv_disp_drv_t disp_drv;
lv_color_t buf_1[LCD_H * LCD_W]; lv_color_t buf_1[LCD_H * LCD_W];
#elif defined ( __CC_ARM ) /* MDK ARM Compiler */ #elif defined ( __CC_ARM ) /* MDK ARM Compiler */
__attribute__((at(0x68000000))) lv_color_t buf_1[LCD_H * LCD_W]; __attribute__((at(0x68000000))) lv_color_t buf_1[LCD_H * LCD_W];
#elif defined ( __CLANG_ARM ) /* MDK ARM Compiler v6 */ #elif defined ( __clang__ ) /* MDK ARM Compiler v6 */
__attribute__((section(".ARM.__at_0x68000000"))) lv_color_t buf_1[LCD_H * LCD_W]; __attribute__((section(".ARM.__at_0x68000000"))) lv_color_t buf_1[LCD_H * LCD_W];
#elif defined ( __GNUC__ ) /* GNU Compiler */ #elif defined ( __GNUC__ ) /* GNU Compiler */
lv_color_t buf_1[LCD_H * LCD_W] __attribute__((section(".MCUlcdgrambysram"))); lv_color_t buf_1[LCD_H * LCD_W] __attribute__((section(".MCUlcdgrambysram")));

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_FLASH_SIZE (1024 * 1024) #define STM32_FLASH_SIZE (1024 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -23,7 +23,7 @@ extern "C" {
#define STM32_SRAM_SIZE (128) #define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 256 #define STM32_SRAM_SIZE 256
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 320 #define STM32_SRAM_SIZE 320
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_FLASH_SIZE (2 * 1024 * 1024) #define STM32_FLASH_SIZE (2 * 1024 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (192) #define STM32_SRAM_SIZE (192)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -27,7 +27,7 @@ extern "C" {
#define STM32_FLASH_SIZE (1024 * 1024) #define STM32_FLASH_SIZE (1024 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE (256 - 64) #define STM32_SRAM_SIZE (256 - 64)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -24,7 +24,7 @@
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE (384 - 64) #define STM32_SRAM_SIZE (384 - 64)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -23,7 +23,7 @@
#define STM32_SRAM_SIZE (320) #define STM32_SRAM_SIZE (320)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -23,7 +23,7 @@
#define STM32_SRAM_SIZE (256) #define STM32_SRAM_SIZE (256)
#define STM32_SRAM_END (0x20010000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20010000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_FLASH_SIZE (1024 * 1024) #define STM32_FLASH_SIZE (1024 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -24,7 +24,7 @@
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 36 #define STM32_SRAM_SIZE 36
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 36 #define STM32_SRAM_SIZE 36
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -24,7 +24,7 @@
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -24,7 +24,7 @@
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -31,7 +31,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (128) #define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (128) #define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -77,7 +77,7 @@ extern "C" {
#define STM32_SRAM1_START RAM_START #define STM32_SRAM1_START RAM_START
#define STM32_SRAM1_END RAM_END #define STM32_SRAM1_END RAM_END
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 8 #define STM32_SRAM_SIZE 8
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -34,7 +34,7 @@ extern "C" {
#define STM32_FLASH_SIZE (256 * 1024) #define STM32_FLASH_SIZE (256 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

View File

@ -39,7 +39,7 @@ extern "C" {
#define STM32_FLASH_SIZE (1024 * 1024) #define STM32_FLASH_SIZE (1024 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

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