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[bsp/phytium]默认配置修改

This commit is contained in:
zhangyan 2024-09-06 06:18:27 +08:00 committed by GitHub
parent 188b87f4d8
commit 5181857148
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
26 changed files with 112 additions and 226 deletions
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83
bsp/phytium/aarch32/.config
View File

@ -8,7 +8,7 @@ CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_NANO is not set # CONFIG_RT_USING_NANO is not set
# CONFIG_RT_USING_AMP is not set # CONFIG_RT_USING_AMP is not set
CONFIG_RT_USING_SMP=y CONFIG_RT_USING_SMP=y
CONFIG_RT_CPUS_NR=4 CONFIG_RT_CPUS_NR=2
CONFIG_RT_ALIGN_SIZE=4 CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set # CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y CONFIG_RT_THREAD_PRIORITY_32=y
@ -93,7 +93,7 @@ CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLEBUF_SIZE=256
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x50200 CONFIG_RT_VER_NUM=0x50200
CONFIG_RT_USING_STDC_ATOMIC=y # CONFIG_RT_USING_STDC_ATOMIC is not set
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# end of RT-Thread Kernel # end of RT-Thread Kernel
@ -253,8 +253,9 @@ CONFIG_RT_CHERRYUSB_HOST=y
# CONFIG_RT_CHERRYUSB_HOST_EHCI_BL is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_BL is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_HPM is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_HPM is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_AIC is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_AIC is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_NUVOTON_NUC980 is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_MCX is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_NUVOTON_MA35D0 is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_NUC980 is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_MA35D0 is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_CUSTOM is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_CUSTOM is not set
# CONFIG_RT_CHERRYUSB_HOST_DWC2_ST is not set # CONFIG_RT_CHERRYUSB_HOST_DWC2_ST is not set
# CONFIG_RT_CHERRYUSB_HOST_DWC2_ESP is not set # CONFIG_RT_CHERRYUSB_HOST_DWC2_ESP is not set
@ -263,8 +264,8 @@ CONFIG_RT_CHERRYUSB_HOST=y
# CONFIG_RT_CHERRYUSB_HOST_MUSB_SUNXI is not set # CONFIG_RT_CHERRYUSB_HOST_MUSB_SUNXI is not set
# CONFIG_RT_CHERRYUSB_HOST_MUSB_BK is not set # CONFIG_RT_CHERRYUSB_HOST_MUSB_BK is not set
# CONFIG_RT_CHERRYUSB_HOST_MUSB_CUSTOM is not set # CONFIG_RT_CHERRYUSB_HOST_MUSB_CUSTOM is not set
CONFIG_RT_CHERRYUSB_HOST_PUSB2=y # CONFIG_RT_CHERRYUSB_HOST_PUSB2 is not set
# CONFIG_RT_CHERRYUSB_HOST_XHCI is not set CONFIG_RT_CHERRYUSB_HOST_XHCI=y
# CONFIG_RT_CHERRYUSB_HOST_CDC_ACM is not set # CONFIG_RT_CHERRYUSB_HOST_CDC_ACM is not set
CONFIG_RT_CHERRYUSB_HOST_HID=y CONFIG_RT_CHERRYUSB_HOST_HID=y
CONFIG_RT_CHERRYUSB_HOST_MSC=y CONFIG_RT_CHERRYUSB_HOST_MSC=y
@ -280,7 +281,8 @@ CONFIG_RT_CHERRYUSB_HOST_MSC=y
# CONFIG_RT_CHERRYUSB_HOST_CH34X is not set # CONFIG_RT_CHERRYUSB_HOST_CH34X is not set
# CONFIG_RT_CHERRYUSB_HOST_CP210X is not set # CONFIG_RT_CHERRYUSB_HOST_CP210X is not set
# CONFIG_RT_CHERRYUSB_HOST_PL2303 is not set # CONFIG_RT_CHERRYUSB_HOST_PL2303 is not set
# CONFIG_CHERRYUSB_HOST_TEMPLATE is not set CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# CONFIG_RT_CHERRYUSB_HOST_TEMPLATE is not set
# end of Device Drivers # end of Device Drivers
# #
@ -622,7 +624,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PARSON is not set # CONFIG_PKG_USING_PARSON is not set
# CONFIG_PKG_USING_RYAN_JSON is not set
# end of JSON: JavaScript Object Notation, a lightweight data-interchange format # end of JSON: JavaScript Object Notation, a lightweight data-interchange format
# #
@ -742,8 +743,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
# end of enhanced kernel services # end of enhanced kernel services
# CONFIG_PKG_USING_AUNITY is not set
# #
# acceleration: Assembly language or algorithmic acceleration packages # acceleration: Assembly language or algorithmic acceleration packages
# #
@ -834,29 +833,12 @@ CONFIG_RT_USING_ADT_REF=y
# #
# STM32 HAL & SDK Drivers # STM32 HAL & SDK Drivers
# #
# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set # CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_STM32_SDIO is not set
# end of STM32 HAL & SDK Drivers # end of STM32 HAL & SDK Drivers
#
# Infineon HAL Packages
#
# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
# CONFIG_PKG_USING_INFINEON_CMSIS is not set
# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
# CONFIG_PKG_USING_INFINEON_USBDEV is not set
# end of Infineon HAL Packages
# CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set # CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_ESP_IDF is not set # CONFIG_PKG_USING_ESP_IDF is not set
@ -1029,7 +1011,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set # CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
# CONFIG_PKG_USING_BT_MX01 is not set # CONFIG_PKG_USING_BT_MX01 is not set
# CONFIG_PKG_USING_RGPOWER is not set # CONFIG_PKG_USING_RGPOWER is not set
# CONFIG_PKG_USING_BT_MX02 is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set # CONFIG_PKG_USING_SPI_TOOLS is not set
# end of peripheral libraries and drivers # end of peripheral libraries and drivers
@ -1051,7 +1032,6 @@ CONFIG_RT_USING_ADT_REF=y
# #
# Signal Processing and Control Algorithm Packages # Signal Processing and Control Algorithm Packages
# #
# CONFIG_PKG_USING_APID is not set
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set # CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_UKAL is not set
@ -1379,22 +1359,25 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set # CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set # CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y # CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set # CONFIG_RT_USING_SPIM1 is not set
# CONFIG_RT_USING_SPIM2 is not set CONFIG_RT_USING_SPIM2=y
# CONFIG_RT_USING_SPIM3 is not set # CONFIG_RT_USING_SPIM3 is not set
# CONFIG_BSP_USING_CAN is not set CONFIG_BSP_USING_CAN=y
CONFIG_RT_USING_CANFD=y
# CONFIG_RT_USING_FILTER is not set
CONFIG_RT_USING_CAN0=y
CONFIG_RT_USING_CAN1=y
CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_QSPI=y CONFIG_BSP_USING_QSPI=y
CONFIG_RT_USING_QSPI0=y CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set
# CONFIG_RT_USING_PWM2 is not set CONFIG_RT_USING_PWM2=y
# CONFIG_RT_USING_PWM3 is not set # CONFIG_RT_USING_PWM3 is not set
# CONFIG_RT_USING_PWM4 is not set # CONFIG_RT_USING_PWM4 is not set
# CONFIG_RT_USING_PWM5 is not set # CONFIG_RT_USING_PWM5 is not set
@ -1420,9 +1403,13 @@ CONFIG_RT_USING_MIO1=y
# CONFIG_RT_USING_MIO15 is not set # CONFIG_RT_USING_MIO15 is not set
# CONFIG_I2C_USE_CONTROLLER is not set # CONFIG_I2C_USE_CONTROLLER is not set
CONFIG_BSP_USING_SDIF=y CONFIG_BSP_USING_SDIF=y
# CONFIG_BSP_USING_SDCARD_FATFS is not set CONFIG_BSP_USING_SDCARD_FATFS=y
# CONFIG_USING_SDIF0 is not set CONFIG_USING_SDIF0=y
# CONFIG_USING_SDIF1 is not set # CONFIG_USE_SDIF0_TF is not set
CONFIG_USE_SDIF0_EMMC=y
CONFIG_USING_SDIF1=y
CONFIG_USE_SDIF1_TF=y
# CONFIG_USE_SDIF1_EMMC is not set
CONFIG_BSP_USING_DC=y CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y CONFIG_RT_USING_DC_CHANNEL1=y
@ -1444,15 +1431,16 @@ CONFIG_USE_AARCH64_L1_TO_AARCH32=y
# #
# Soc configuration # Soc configuration
# #
CONFIG_TARGET_PHYTIUMPI=y # CONFIG_TARGET_PHYTIUMPI is not set
# CONFIG_TARGET_E2000Q is not set # CONFIG_TARGET_E2000Q is not set
# CONFIG_TARGET_E2000D is not set CONFIG_TARGET_E2000D=y
# CONFIG_TARGET_E2000S is not set # CONFIG_TARGET_E2000S is not set
# CONFIG_TARGET_FT2004 is not set # CONFIG_TARGET_FT2004 is not set
# CONFIG_TARGET_D2000 is not set # CONFIG_TARGET_D2000 is not set
# CONFIG_TARGET_PD2308 is not set # CONFIG_TARGET_PD2308 is not set
CONFIG_SOC_NAME="phytiumpi" CONFIG_SOC_NAME="e2000"
CONFIG_SOC_CORE_NUM=4 CONFIG_TARGET_TYPE_NAME="d"
CONFIG_SOC_CORE_NUM=2
CONFIG_F32BIT_MEMORY_ADDRESS=0x80000000 CONFIG_F32BIT_MEMORY_ADDRESS=0x80000000
CONFIG_F32BIT_MEMORY_LENGTH=0x80000000 CONFIG_F32BIT_MEMORY_LENGTH=0x80000000
CONFIG_F64BIT_MEMORY_ADDRESS=0x2000000000 CONFIG_F64BIT_MEMORY_ADDRESS=0x2000000000
@ -1466,21 +1454,22 @@ CONFIG_DEFAULT_DEBUG_PRINT_UART1=y
# #
# Board Configuration # Board Configuration
# #
CONFIG_BOARD_NAME="firefly" CONFIG_E2000D_DEMO_BOARD=y
CONFIG_BOARD_NAME="demo"
#
# IO mux configuration when board start up
#
# CONFIG_USE_SPI_IOPAD is not set # CONFIG_USE_SPI_IOPAD is not set
# CONFIG_USE_GPIO_IOPAD is not set # CONFIG_USE_GPIO_IOPAD is not set
# CONFIG_USE_CAN_IOPAD is not set # CONFIG_USE_CAN_IOPAD is not set
# CONFIG_USE_QSPI_IOPAD is not set # CONFIG_USE_QSPI_IOPAD is not set
# CONFIG_USE_PWM_IOPAD is not set # CONFIG_USE_PWM_IOPAD is not set
# CONFIG_USE_ADC_IOPAD is not set
# CONFIG_USE_MIO_IOPAD is not set # CONFIG_USE_MIO_IOPAD is not set
# CONFIG_USE_TACHO_IOPAD is not set # CONFIG_USE_TACHO_IOPAD is not set
# CONFIG_USE_UART_IOPAD is not set # CONFIG_USE_UART_IOPAD is not set
# CONFIG_USE_THIRD_PARTY_IOPAD is not set # CONFIG_USE_THIRD_PARTY_IOPAD is not set
CONFIG_FIREFLY_DEMO_BOARD=y
#
# IO mux configuration when board start up
#
# end of IO mux configuration when board start up # end of IO mux configuration when board start up
# CONFIG_CUS_DEMO_BOARD is not set # CONFIG_CUS_DEMO_BOARD is not set

5
bsp/phytium/aarch32/configs/e2000d_demo_rtsmart
View File

@ -256,6 +256,7 @@ CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CHERRYUSB is not set # CONFIG_RT_USING_CHERRYUSB is not set
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# end of Device Drivers # end of Device Drivers
# #
@ -337,6 +338,7 @@ CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_LINK_STATUS_CALLBACK is not set
# CONFIG_NETDEV_USING_IPV6 is not set # CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1 CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0 CONFIG_NETDEV_IPV6=0
@ -1369,7 +1371,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set
@ -1409,8 +1410,6 @@ CONFIG_USE_SDIF1_TF=y
CONFIG_BSP_USING_DC=y CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y CONFIG_RT_USING_DC_CHANNEL0=y
# CONFIG_RT_USING_DC_CHANNEL1 is not set # CONFIG_RT_USING_DC_CHANNEL1 is not set
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
# end of On-chip Peripheral Drivers # end of On-chip Peripheral Drivers
# #

2
bsp/phytium/aarch32/configs/e2000d_demo_rtsmart.h
View File

@ -168,6 +168,7 @@
#define RT_USING_QSPI #define RT_USING_QSPI
#define RT_USING_PIN #define RT_USING_PIN
#define RT_USING_KTIME #define RT_USING_KTIME
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -509,7 +510,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define RT_USING_PWM2 #define RT_USING_PWM2
#define BSP_USING_I2C #define BSP_USING_I2C

33
bsp/phytium/aarch32/configs/e2000d_demo_rtthread
View File

@ -93,7 +93,7 @@ CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLEBUF_SIZE=256
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x50200 CONFIG_RT_VER_NUM=0x50200
CONFIG_RT_USING_STDC_ATOMIC=y # CONFIG_RT_USING_STDC_ATOMIC is not set
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# end of RT-Thread Kernel # end of RT-Thread Kernel
@ -253,8 +253,9 @@ CONFIG_RT_CHERRYUSB_HOST=y
# CONFIG_RT_CHERRYUSB_HOST_EHCI_BL is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_BL is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_HPM is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_HPM is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_AIC is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_AIC is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_NUVOTON_NUC980 is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_MCX is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_NUVOTON_MA35D0 is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_NUC980 is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_MA35D0 is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_CUSTOM is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_CUSTOM is not set
# CONFIG_RT_CHERRYUSB_HOST_DWC2_ST is not set # CONFIG_RT_CHERRYUSB_HOST_DWC2_ST is not set
# CONFIG_RT_CHERRYUSB_HOST_DWC2_ESP is not set # CONFIG_RT_CHERRYUSB_HOST_DWC2_ESP is not set
@ -280,7 +281,8 @@ CONFIG_RT_CHERRYUSB_HOST_MSC=y
# CONFIG_RT_CHERRYUSB_HOST_CH34X is not set # CONFIG_RT_CHERRYUSB_HOST_CH34X is not set
# CONFIG_RT_CHERRYUSB_HOST_CP210X is not set # CONFIG_RT_CHERRYUSB_HOST_CP210X is not set
# CONFIG_RT_CHERRYUSB_HOST_PL2303 is not set # CONFIG_RT_CHERRYUSB_HOST_PL2303 is not set
# CONFIG_CHERRYUSB_HOST_TEMPLATE is not set CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# CONFIG_RT_CHERRYUSB_HOST_TEMPLATE is not set
# end of Device Drivers # end of Device Drivers
# #
@ -622,7 +624,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PARSON is not set # CONFIG_PKG_USING_PARSON is not set
# CONFIG_PKG_USING_RYAN_JSON is not set
# end of JSON: JavaScript Object Notation, a lightweight data-interchange format # end of JSON: JavaScript Object Notation, a lightweight data-interchange format
# #
@ -742,8 +743,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
# end of enhanced kernel services # end of enhanced kernel services
# CONFIG_PKG_USING_AUNITY is not set
# #
# acceleration: Assembly language or algorithmic acceleration packages # acceleration: Assembly language or algorithmic acceleration packages
# #
@ -834,29 +833,12 @@ CONFIG_RT_USING_ADT_REF=y
# #
# STM32 HAL & SDK Drivers # STM32 HAL & SDK Drivers
# #
# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set # CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_STM32_SDIO is not set
# end of STM32 HAL & SDK Drivers # end of STM32 HAL & SDK Drivers
#
# Infineon HAL Packages
#
# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
# CONFIG_PKG_USING_INFINEON_CMSIS is not set
# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
# CONFIG_PKG_USING_INFINEON_USBDEV is not set
# end of Infineon HAL Packages
# CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set # CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_ESP_IDF is not set # CONFIG_PKG_USING_ESP_IDF is not set
@ -1029,7 +1011,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set # CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
# CONFIG_PKG_USING_BT_MX01 is not set # CONFIG_PKG_USING_BT_MX01 is not set
# CONFIG_PKG_USING_RGPOWER is not set # CONFIG_PKG_USING_RGPOWER is not set
# CONFIG_PKG_USING_BT_MX02 is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set # CONFIG_PKG_USING_SPI_TOOLS is not set
# end of peripheral libraries and drivers # end of peripheral libraries and drivers
@ -1051,7 +1032,6 @@ CONFIG_RT_USING_ADT_REF=y
# #
# Signal Processing and Control Algorithm Packages # Signal Processing and Control Algorithm Packages
# #
# CONFIG_PKG_USING_APID is not set
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set # CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_UKAL is not set
@ -1394,7 +1374,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set

7
bsp/phytium/aarch32/configs/e2000d_demo_rtthread.h
View File

@ -59,7 +59,6 @@
#define RT_CONSOLEBUF_SIZE 256 #define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart1" #define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50200 #define RT_VER_NUM 0x50200
#define RT_USING_STDC_ATOMIC
#define RT_BACKTRACE_LEVEL_MAX_NR 32 #define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */ /* end of RT-Thread Kernel */
#define RT_USING_CACHE #define RT_USING_CACHE
@ -158,6 +157,7 @@
#define RT_CHERRYUSB_HOST_XHCI #define RT_CHERRYUSB_HOST_XHCI
#define RT_CHERRYUSB_HOST_HID #define RT_CHERRYUSB_HOST_HID
#define RT_CHERRYUSB_HOST_MSC #define RT_CHERRYUSB_HOST_MSC
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -378,10 +378,6 @@
/* end of STM32 HAL & SDK Drivers */ /* end of STM32 HAL & SDK Drivers */
/* Infineon HAL Packages */
/* end of Infineon HAL Packages */
/* Kendryte SDK */ /* Kendryte SDK */
/* end of Kendryte SDK */ /* end of Kendryte SDK */
@ -485,7 +481,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define RT_USING_PWM2 #define RT_USING_PWM2
#define BSP_USING_I2C #define BSP_USING_I2C

5
bsp/phytium/aarch32/configs/e2000q_demo_rtsmart
View File

@ -256,6 +256,7 @@ CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CHERRYUSB is not set # CONFIG_RT_USING_CHERRYUSB is not set
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# end of Device Drivers # end of Device Drivers
# #
@ -337,6 +338,7 @@ CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_LINK_STATUS_CALLBACK is not set
# CONFIG_NETDEV_USING_IPV6 is not set # CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1 CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0 CONFIG_NETDEV_IPV6=0
@ -1369,7 +1371,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set
@ -1409,8 +1410,6 @@ CONFIG_USE_SDIF1_TF=y
CONFIG_BSP_USING_DC=y CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
# end of On-chip Peripheral Drivers # end of On-chip Peripheral Drivers
# #

2
bsp/phytium/aarch32/configs/e2000q_demo_rtsmart.h
View File

@ -168,6 +168,7 @@
#define RT_USING_QSPI #define RT_USING_QSPI
#define RT_USING_PIN #define RT_USING_PIN
#define RT_USING_KTIME #define RT_USING_KTIME
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -509,7 +510,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define RT_USING_PWM2 #define RT_USING_PWM2
#define BSP_USING_I2C #define BSP_USING_I2C

7
bsp/phytium/aarch32/configs/e2000q_demo_rtthread
View File

@ -93,7 +93,7 @@ CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLEBUF_SIZE=256
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x50200 CONFIG_RT_VER_NUM=0x50200
CONFIG_RT_USING_STDC_ATOMIC=y # CONFIG_RT_USING_STDC_ATOMIC is not set
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# end of RT-Thread Kernel # end of RT-Thread Kernel
@ -247,6 +247,7 @@ CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CHERRYUSB is not set # CONFIG_RT_USING_CHERRYUSB is not set
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# end of Device Drivers # end of Device Drivers
# #
@ -325,6 +326,7 @@ CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_LINK_STATUS_CALLBACK is not set
# CONFIG_NETDEV_USING_IPV6 is not set # CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1 CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0 CONFIG_NETDEV_IPV6=0
@ -1337,7 +1339,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set
@ -1377,8 +1378,6 @@ CONFIG_USE_SDIF1_TF=y
CONFIG_BSP_USING_DC=y CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
# end of On-chip Peripheral Drivers # end of On-chip Peripheral Drivers
# #

3
bsp/phytium/aarch32/configs/e2000q_demo_rtthread.h
View File

@ -59,7 +59,6 @@
#define RT_CONSOLEBUF_SIZE 256 #define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart1" #define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50200 #define RT_VER_NUM 0x50200
#define RT_USING_STDC_ATOMIC
#define RT_BACKTRACE_LEVEL_MAX_NR 32 #define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */ /* end of RT-Thread Kernel */
#define RT_USING_CACHE #define RT_USING_CACHE
@ -153,6 +152,7 @@
#define RT_USING_QSPI #define RT_USING_QSPI
#define RT_USING_PIN #define RT_USING_PIN
#define RT_USING_KTIME #define RT_USING_KTIME
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -476,7 +476,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define RT_USING_PWM2 #define RT_USING_PWM2
#define BSP_USING_I2C #define BSP_USING_I2C

5
bsp/phytium/aarch32/configs/phytium_pi_rtsmart
View File

@ -256,6 +256,7 @@ CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CHERRYUSB is not set # CONFIG_RT_USING_CHERRYUSB is not set
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# end of Device Drivers # end of Device Drivers
# #
@ -337,6 +338,7 @@ CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_LINK_STATUS_CALLBACK is not set
# CONFIG_NETDEV_USING_IPV6 is not set # CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1 CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0 CONFIG_NETDEV_IPV6=0
@ -1365,7 +1367,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set
@ -1403,8 +1404,6 @@ CONFIG_USE_SDIF0_TF=y
CONFIG_BSP_USING_DC=y CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y CONFIG_RT_USING_DC_CHANNEL0=y
# CONFIG_RT_USING_DC_CHANNEL1 is not set # CONFIG_RT_USING_DC_CHANNEL1 is not set
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
# end of On-chip Peripheral Drivers # end of On-chip Peripheral Drivers
# #

2
bsp/phytium/aarch32/configs/phytium_pi_rtsmart.h
View File

@ -168,6 +168,7 @@
#define RT_USING_QSPI #define RT_USING_QSPI
#define RT_USING_PIN #define RT_USING_PIN
#define RT_USING_KTIME #define RT_USING_KTIME
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -505,7 +506,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define RT_USING_PWM2 #define RT_USING_PWM2
#define BSP_USING_I2C #define BSP_USING_I2C

34
bsp/phytium/aarch32/rtconfig.h
View File

@ -5,7 +5,7 @@
#define RT_NAME_MAX 16 #define RT_NAME_MAX 16
#define RT_USING_SMP #define RT_USING_SMP
#define RT_CPUS_NR 4 #define RT_CPUS_NR 2
#define RT_ALIGN_SIZE 4 #define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32 #define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32 #define RT_THREAD_PRIORITY_MAX 32
@ -59,7 +59,6 @@
#define RT_CONSOLEBUF_SIZE 256 #define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart1" #define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50200 #define RT_VER_NUM 0x50200
#define RT_USING_STDC_ATOMIC
#define RT_BACKTRACE_LEVEL_MAX_NR 32 #define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */ /* end of RT-Thread Kernel */
#define RT_USING_CACHE #define RT_USING_CACHE
@ -155,9 +154,10 @@
#define RT_USING_KTIME #define RT_USING_KTIME
#define RT_USING_CHERRYUSB #define RT_USING_CHERRYUSB
#define RT_CHERRYUSB_HOST #define RT_CHERRYUSB_HOST
#define RT_CHERRYUSB_HOST_PUSB2 #define RT_CHERRYUSB_HOST_XHCI
#define RT_CHERRYUSB_HOST_HID #define RT_CHERRYUSB_HOST_HID
#define RT_CHERRYUSB_HOST_MSC #define RT_CHERRYUSB_HOST_MSC
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -378,10 +378,6 @@
/* end of STM32 HAL & SDK Drivers */ /* end of STM32 HAL & SDK Drivers */
/* Infineon HAL Packages */
/* end of Infineon HAL Packages */
/* Kendryte SDK */ /* Kendryte SDK */
/* end of Kendryte SDK */ /* end of Kendryte SDK */
@ -475,19 +471,28 @@
#define RT_USING_UART0 #define RT_USING_UART0
#define RT_USING_UART1 #define RT_USING_UART1
#define BSP_USING_SPI #define BSP_USING_SPI
#define RT_USING_SPIM0 #define RT_USING_SPIM2
#define BSP_USING_CAN
#define RT_USING_CANFD
#define RT_USING_CAN0
#define RT_USING_CAN1
#define BSP_USING_GPIO #define BSP_USING_GPIO
#define BSP_USING_QSPI #define BSP_USING_QSPI
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define RT_USING_PWM2
#define BSP_USING_I2C #define BSP_USING_I2C
#define I2C_USE_MIO #define I2C_USE_MIO
#define RT_USING_MIO0 #define RT_USING_MIO0
#define RT_USING_MIO1 #define RT_USING_MIO1
#define BSP_USING_SDIF #define BSP_USING_SDIF
#define BSP_USING_SDCARD_FATFS
#define USING_SDIF0
#define USE_SDIF0_EMMC
#define USING_SDIF1
#define USE_SDIF1_TF
#define BSP_USING_DC #define BSP_USING_DC
#define RT_USING_DC_CHANNEL0 #define RT_USING_DC_CHANNEL0
#define RT_USING_DC_CHANNEL1 #define RT_USING_DC_CHANNEL1
@ -505,9 +510,10 @@
/* Soc configuration */ /* Soc configuration */
#define TARGET_PHYTIUMPI #define TARGET_E2000D
#define SOC_NAME "phytiumpi" #define SOC_NAME "e2000"
#define SOC_CORE_NUM 4 #define TARGET_TYPE_NAME "d"
#define SOC_CORE_NUM 2
#define F32BIT_MEMORY_ADDRESS 0x80000000 #define F32BIT_MEMORY_ADDRESS 0x80000000
#define F32BIT_MEMORY_LENGTH 0x80000000 #define F32BIT_MEMORY_LENGTH 0x80000000
#define F64BIT_MEMORY_ADDRESS 0x2000000000 #define F64BIT_MEMORY_ADDRESS 0x2000000000
@ -518,8 +524,8 @@
/* Board Configuration */ /* Board Configuration */
#define BOARD_NAME "firefly" #define E2000D_DEMO_BOARD
#define FIREFLY_DEMO_BOARD #define BOARD_NAME "demo"
/* IO mux configuration when board start up */ /* IO mux configuration when board start up */

26
bsp/phytium/aarch64/.config
View File

@ -93,7 +93,7 @@ CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x50200 CONFIG_RT_VER_NUM=0x50200
CONFIG_RT_USING_STDC_ATOMIC=y # CONFIG_RT_USING_STDC_ATOMIC is not set
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# end of RT-Thread Kernel # end of RT-Thread Kernel
@ -292,6 +292,7 @@ CONFIG_RT_CHERRYUSB_HOST_MSC=y
# CONFIG_RT_CHERRYUSB_HOST_CH34X is not set # CONFIG_RT_CHERRYUSB_HOST_CH34X is not set
# CONFIG_RT_CHERRYUSB_HOST_CP210X is not set # CONFIG_RT_CHERRYUSB_HOST_CP210X is not set
# CONFIG_RT_CHERRYUSB_HOST_PL2303 is not set # CONFIG_RT_CHERRYUSB_HOST_PL2303 is not set
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# CONFIG_RT_CHERRYUSB_HOST_TEMPLATE is not set # CONFIG_RT_CHERRYUSB_HOST_TEMPLATE is not set
# end of Device Drivers # end of Device Drivers
@ -631,7 +632,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PARSON is not set # CONFIG_PKG_USING_PARSON is not set
# CONFIG_PKG_USING_RYAN_JSON is not set
# end of JSON: JavaScript Object Notation, a lightweight data-interchange format # end of JSON: JavaScript Object Notation, a lightweight data-interchange format
# #
@ -750,8 +750,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
# end of enhanced kernel services # end of enhanced kernel services
# CONFIG_PKG_USING_AUNITY is not set
# #
# acceleration: Assembly language or algorithmic acceleration packages # acceleration: Assembly language or algorithmic acceleration packages
# #
@ -842,29 +840,12 @@ CONFIG_RT_USING_ADT_REF=y
# #
# STM32 HAL & SDK Drivers # STM32 HAL & SDK Drivers
# #
# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set # CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_STM32_SDIO is not set
# end of STM32 HAL & SDK Drivers # end of STM32 HAL & SDK Drivers
#
# Infineon HAL Packages
#
# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
# CONFIG_PKG_USING_INFINEON_CMSIS is not set
# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
# CONFIG_PKG_USING_INFINEON_USBDEV is not set
# end of Infineon HAL Packages
# CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set # CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_ESP_IDF is not set # CONFIG_PKG_USING_ESP_IDF is not set
@ -1037,7 +1018,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set # CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
# CONFIG_PKG_USING_BT_MX01 is not set # CONFIG_PKG_USING_BT_MX01 is not set
# CONFIG_PKG_USING_RGPOWER is not set # CONFIG_PKG_USING_RGPOWER is not set
# CONFIG_PKG_USING_BT_MX02 is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set # CONFIG_PKG_USING_SPI_TOOLS is not set
# end of peripheral libraries and drivers # end of peripheral libraries and drivers
@ -1060,7 +1040,6 @@ CONFIG_RT_USING_ADT_REF=y
# #
# Signal Processing and Control Algorithm Packages # Signal Processing and Control Algorithm Packages
# #
# CONFIG_PKG_USING_APID is not set
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set # CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_UKAL is not set
@ -1427,7 +1406,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set

6
bsp/phytium/aarch64/configs/e2000d_demo_rtsmart
View File

@ -266,6 +266,7 @@ CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CHERRYUSB is not set # CONFIG_RT_USING_CHERRYUSB is not set
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# end of Device Drivers # end of Device Drivers
# #
@ -346,6 +347,7 @@ CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_LINK_STATUS_CALLBACK is not set
# CONFIG_NETDEV_USING_IPV6 is not set # CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1 CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0 CONFIG_NETDEV_IPV6=0
@ -478,6 +480,7 @@ CONFIG_RT_USING_LDSO=y
# CONFIG_ELF_LOAD_RANDOMIZE is not set # CONFIG_ELF_LOAD_RANDOMIZE is not set
CONFIG_LWP_USING_TERMINAL=y CONFIG_LWP_USING_TERMINAL=y
CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64 CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64
CONFIG_RT_USING_VDSO=y
# #
# Memory management # Memory management
@ -1427,7 +1430,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set
@ -1467,8 +1469,6 @@ CONFIG_USE_SDIF1_TF=y
CONFIG_BSP_USING_DC=y CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
# end of On-chip Peripheral Drivers # end of On-chip Peripheral Drivers
# #

3
bsp/phytium/aarch64/configs/e2000d_demo_rtsmart.h
View File

@ -179,6 +179,7 @@
#define RT_USING_QSPI #define RT_USING_QSPI
#define RT_USING_PIN #define RT_USING_PIN
#define RT_USING_KTIME #define RT_USING_KTIME
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -305,6 +306,7 @@
#define RT_USING_LDSO #define RT_USING_LDSO
#define LWP_USING_TERMINAL #define LWP_USING_TERMINAL
#define LWP_PTY_MAX_PARIS_LIMIT 64 #define LWP_PTY_MAX_PARIS_LIMIT 64
#define RT_USING_VDSO
/* Memory management */ /* Memory management */
@ -515,7 +517,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define RT_USING_PWM6 #define RT_USING_PWM6
#define BSP_USING_I2C #define BSP_USING_I2C

33
bsp/phytium/aarch64/configs/e2000d_demo_rtthread
View File

@ -93,7 +93,7 @@ CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x50200 CONFIG_RT_VER_NUM=0x50200
CONFIG_RT_USING_STDC_ATOMIC=y # CONFIG_RT_USING_STDC_ATOMIC is not set
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# end of RT-Thread Kernel # end of RT-Thread Kernel
@ -264,8 +264,9 @@ CONFIG_RT_CHERRYUSB_HOST=y
# CONFIG_RT_CHERRYUSB_HOST_EHCI_BL is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_BL is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_HPM is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_HPM is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_AIC is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_AIC is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_NUVOTON_NUC980 is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_MCX is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_NUVOTON_MA35D0 is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_NUC980 is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_MA35D0 is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_CUSTOM is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_CUSTOM is not set
# CONFIG_RT_CHERRYUSB_HOST_DWC2_ST is not set # CONFIG_RT_CHERRYUSB_HOST_DWC2_ST is not set
# CONFIG_RT_CHERRYUSB_HOST_DWC2_ESP is not set # CONFIG_RT_CHERRYUSB_HOST_DWC2_ESP is not set
@ -291,7 +292,8 @@ CONFIG_RT_CHERRYUSB_HOST_MSC=y
# CONFIG_RT_CHERRYUSB_HOST_CH34X is not set # CONFIG_RT_CHERRYUSB_HOST_CH34X is not set
# CONFIG_RT_CHERRYUSB_HOST_CP210X is not set # CONFIG_RT_CHERRYUSB_HOST_CP210X is not set
# CONFIG_RT_CHERRYUSB_HOST_PL2303 is not set # CONFIG_RT_CHERRYUSB_HOST_PL2303 is not set
# CONFIG_CHERRYUSB_HOST_TEMPLATE is not set CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# CONFIG_RT_CHERRYUSB_HOST_TEMPLATE is not set
# end of Device Drivers # end of Device Drivers
# #
@ -630,7 +632,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PARSON is not set # CONFIG_PKG_USING_PARSON is not set
# CONFIG_PKG_USING_RYAN_JSON is not set
# end of JSON: JavaScript Object Notation, a lightweight data-interchange format # end of JSON: JavaScript Object Notation, a lightweight data-interchange format
# #
@ -749,8 +750,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
# end of enhanced kernel services # end of enhanced kernel services
# CONFIG_PKG_USING_AUNITY is not set
# #
# acceleration: Assembly language or algorithmic acceleration packages # acceleration: Assembly language or algorithmic acceleration packages
# #
@ -841,29 +840,12 @@ CONFIG_RT_USING_ADT_REF=y
# #
# STM32 HAL & SDK Drivers # STM32 HAL & SDK Drivers
# #
# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set # CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_STM32_SDIO is not set
# end of STM32 HAL & SDK Drivers # end of STM32 HAL & SDK Drivers
#
# Infineon HAL Packages
#
# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
# CONFIG_PKG_USING_INFINEON_CMSIS is not set
# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
# CONFIG_PKG_USING_INFINEON_USBDEV is not set
# end of Infineon HAL Packages
# CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set # CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_ESP_IDF is not set # CONFIG_PKG_USING_ESP_IDF is not set
@ -1036,7 +1018,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set # CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
# CONFIG_PKG_USING_BT_MX01 is not set # CONFIG_PKG_USING_BT_MX01 is not set
# CONFIG_PKG_USING_RGPOWER is not set # CONFIG_PKG_USING_RGPOWER is not set
# CONFIG_PKG_USING_BT_MX02 is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set # CONFIG_PKG_USING_SPI_TOOLS is not set
# end of peripheral libraries and drivers # end of peripheral libraries and drivers
@ -1059,7 +1040,6 @@ CONFIG_RT_USING_ADT_REF=y
# #
# Signal Processing and Control Algorithm Packages # Signal Processing and Control Algorithm Packages
# #
# CONFIG_PKG_USING_APID is not set
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set # CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_UKAL is not set
@ -1426,7 +1406,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set

7
bsp/phytium/aarch64/configs/e2000d_demo_rtthread.h
View File

@ -58,7 +58,6 @@
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1" #define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50200 #define RT_VER_NUM 0x50200
#define RT_USING_STDC_ATOMIC
#define RT_BACKTRACE_LEVEL_MAX_NR 32 #define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */ /* end of RT-Thread Kernel */
@ -168,6 +167,7 @@
#define RT_CHERRYUSB_HOST_XHCI #define RT_CHERRYUSB_HOST_XHCI
#define RT_CHERRYUSB_HOST_HID #define RT_CHERRYUSB_HOST_HID
#define RT_CHERRYUSB_HOST_MSC #define RT_CHERRYUSB_HOST_MSC
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -378,10 +378,6 @@
/* end of STM32 HAL & SDK Drivers */ /* end of STM32 HAL & SDK Drivers */
/* Infineon HAL Packages */
/* end of Infineon HAL Packages */
/* Kendryte SDK */ /* Kendryte SDK */
/* end of Kendryte SDK */ /* end of Kendryte SDK */
@ -488,7 +484,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define BSP_USING_I2C #define BSP_USING_I2C
#define I2C_USE_MIO #define I2C_USE_MIO

6
bsp/phytium/aarch64/configs/e2000q_demo_rtsmart
View File

@ -266,6 +266,7 @@ CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CHERRYUSB is not set # CONFIG_RT_USING_CHERRYUSB is not set
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# end of Device Drivers # end of Device Drivers
# #
@ -346,6 +347,7 @@ CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_LINK_STATUS_CALLBACK is not set
# CONFIG_NETDEV_USING_IPV6 is not set # CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1 CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0 CONFIG_NETDEV_IPV6=0
@ -478,6 +480,7 @@ CONFIG_RT_USING_LDSO=y
# CONFIG_ELF_LOAD_RANDOMIZE is not set # CONFIG_ELF_LOAD_RANDOMIZE is not set
CONFIG_LWP_USING_TERMINAL=y CONFIG_LWP_USING_TERMINAL=y
CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64 CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64
CONFIG_RT_USING_VDSO=y
# #
# Memory management # Memory management
@ -1427,7 +1430,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set
@ -1467,8 +1469,6 @@ CONFIG_USE_SDIF1_TF=y
CONFIG_BSP_USING_DC=y CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
# end of On-chip Peripheral Drivers # end of On-chip Peripheral Drivers
# #

3
bsp/phytium/aarch64/configs/e2000q_demo_rtsmart.h
View File

@ -179,6 +179,7 @@
#define RT_USING_QSPI #define RT_USING_QSPI
#define RT_USING_PIN #define RT_USING_PIN
#define RT_USING_KTIME #define RT_USING_KTIME
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -305,6 +306,7 @@
#define RT_USING_LDSO #define RT_USING_LDSO
#define LWP_USING_TERMINAL #define LWP_USING_TERMINAL
#define LWP_PTY_MAX_PARIS_LIMIT 64 #define LWP_PTY_MAX_PARIS_LIMIT 64
#define RT_USING_VDSO
/* Memory management */ /* Memory management */
@ -515,7 +517,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define RT_USING_PWM6 #define RT_USING_PWM6
#define BSP_USING_I2C #define BSP_USING_I2C

7
bsp/phytium/aarch64/configs/e2000q_demo_rtthread
View File

@ -93,7 +93,7 @@ CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x50200 CONFIG_RT_VER_NUM=0x50200
CONFIG_RT_USING_STDC_ATOMIC=y # CONFIG_RT_USING_STDC_ATOMIC is not set
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# end of RT-Thread Kernel # end of RT-Thread Kernel
@ -258,6 +258,7 @@ CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CHERRYUSB is not set # CONFIG_RT_USING_CHERRYUSB is not set
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# end of Device Drivers # end of Device Drivers
# #
@ -335,6 +336,7 @@ CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_LINK_STATUS_CALLBACK is not set
# CONFIG_NETDEV_USING_IPV6 is not set # CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1 CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0 CONFIG_NETDEV_IPV6=0
@ -1369,7 +1371,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set
@ -1409,8 +1410,6 @@ CONFIG_USE_SDIF1_TF=y
CONFIG_BSP_USING_DC=y CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
# end of On-chip Peripheral Drivers # end of On-chip Peripheral Drivers
# #

3
bsp/phytium/aarch64/configs/e2000q_demo_rtthread.h
View File

@ -58,7 +58,6 @@
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1" #define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50200 #define RT_VER_NUM 0x50200
#define RT_USING_STDC_ATOMIC
#define RT_BACKTRACE_LEVEL_MAX_NR 32 #define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */ /* end of RT-Thread Kernel */
@ -163,6 +162,7 @@
#define RT_USING_QSPI #define RT_USING_QSPI
#define RT_USING_PIN #define RT_USING_PIN
#define RT_USING_KTIME #define RT_USING_KTIME
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -479,7 +479,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define RT_USING_PWM6 #define RT_USING_PWM6
#define BSP_USING_I2C #define BSP_USING_I2C

6
bsp/phytium/aarch64/configs/phytium_pi_rtsmart
View File

@ -266,6 +266,7 @@ CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CHERRYUSB is not set # CONFIG_RT_USING_CHERRYUSB is not set
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# end of Device Drivers # end of Device Drivers
# #
@ -346,6 +347,7 @@ CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_LINK_STATUS_CALLBACK is not set
# CONFIG_NETDEV_USING_IPV6 is not set # CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1 CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0 CONFIG_NETDEV_IPV6=0
@ -450,6 +452,7 @@ CONFIG_RT_USING_LDSO=y
# CONFIG_ELF_LOAD_RANDOMIZE is not set # CONFIG_ELF_LOAD_RANDOMIZE is not set
CONFIG_LWP_USING_TERMINAL=y CONFIG_LWP_USING_TERMINAL=y
CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64 CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64
CONFIG_RT_USING_VDSO=y
# #
# Memory management # Memory management
@ -1395,7 +1398,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set
@ -1433,8 +1435,6 @@ CONFIG_USE_SDIF0_TF=y
CONFIG_BSP_USING_DC=y CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
# end of On-chip Peripheral Drivers # end of On-chip Peripheral Drivers
# #

3
bsp/phytium/aarch64/configs/phytium_pi_rtsmart.h
View File

@ -178,6 +178,7 @@
#define RT_USING_QSPI #define RT_USING_QSPI
#define RT_USING_PIN #define RT_USING_PIN
#define RT_USING_KTIME #define RT_USING_KTIME
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -302,6 +303,7 @@
#define RT_USING_LDSO #define RT_USING_LDSO
#define LWP_USING_TERMINAL #define LWP_USING_TERMINAL
#define LWP_PTY_MAX_PARIS_LIMIT 64 #define LWP_PTY_MAX_PARIS_LIMIT 64
#define RT_USING_VDSO
/* Memory management */ /* Memory management */
@ -508,7 +510,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define RT_USING_PWM2 #define RT_USING_PWM2
#define BSP_USING_I2C #define BSP_USING_I2C

33
bsp/phytium/aarch64/configs/phytium_pi_rtthread
View File

@ -93,7 +93,7 @@ CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x50200 CONFIG_RT_VER_NUM=0x50200
CONFIG_RT_USING_STDC_ATOMIC=y # CONFIG_RT_USING_STDC_ATOMIC is not set
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# end of RT-Thread Kernel # end of RT-Thread Kernel
@ -264,8 +264,9 @@ CONFIG_RT_CHERRYUSB_HOST=y
# CONFIG_RT_CHERRYUSB_HOST_EHCI_BL is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_BL is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_HPM is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_HPM is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_AIC is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_AIC is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_NUVOTON_NUC980 is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_MCX is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_NUVOTON_MA35D0 is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_NUC980 is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_MA35D0 is not set
# CONFIG_RT_CHERRYUSB_HOST_EHCI_CUSTOM is not set # CONFIG_RT_CHERRYUSB_HOST_EHCI_CUSTOM is not set
# CONFIG_RT_CHERRYUSB_HOST_DWC2_ST is not set # CONFIG_RT_CHERRYUSB_HOST_DWC2_ST is not set
# CONFIG_RT_CHERRYUSB_HOST_DWC2_ESP is not set # CONFIG_RT_CHERRYUSB_HOST_DWC2_ESP is not set
@ -291,7 +292,8 @@ CONFIG_RT_CHERRYUSB_HOST_MSC=y
# CONFIG_RT_CHERRYUSB_HOST_CH34X is not set # CONFIG_RT_CHERRYUSB_HOST_CH34X is not set
# CONFIG_RT_CHERRYUSB_HOST_CP210X is not set # CONFIG_RT_CHERRYUSB_HOST_CP210X is not set
# CONFIG_RT_CHERRYUSB_HOST_PL2303 is not set # CONFIG_RT_CHERRYUSB_HOST_PL2303 is not set
# CONFIG_CHERRYUSB_HOST_TEMPLATE is not set CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
# CONFIG_RT_CHERRYUSB_HOST_TEMPLATE is not set
# end of Device Drivers # end of Device Drivers
# #
@ -630,7 +632,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PARSON is not set # CONFIG_PKG_USING_PARSON is not set
# CONFIG_PKG_USING_RYAN_JSON is not set
# end of JSON: JavaScript Object Notation, a lightweight data-interchange format # end of JSON: JavaScript Object Notation, a lightweight data-interchange format
# #
@ -749,8 +750,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
# end of enhanced kernel services # end of enhanced kernel services
# CONFIG_PKG_USING_AUNITY is not set
# #
# acceleration: Assembly language or algorithmic acceleration packages # acceleration: Assembly language or algorithmic acceleration packages
# #
@ -841,29 +840,12 @@ CONFIG_RT_USING_ADT_REF=y
# #
# STM32 HAL & SDK Drivers # STM32 HAL & SDK Drivers
# #
# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set # CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_STM32_SDIO is not set
# end of STM32 HAL & SDK Drivers # end of STM32 HAL & SDK Drivers
#
# Infineon HAL Packages
#
# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
# CONFIG_PKG_USING_INFINEON_CMSIS is not set
# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
# CONFIG_PKG_USING_INFINEON_USBDEV is not set
# end of Infineon HAL Packages
# CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set # CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_ESP_IDF is not set # CONFIG_PKG_USING_ESP_IDF is not set
@ -1036,7 +1018,6 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set # CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
# CONFIG_PKG_USING_BT_MX01 is not set # CONFIG_PKG_USING_BT_MX01 is not set
# CONFIG_PKG_USING_RGPOWER is not set # CONFIG_PKG_USING_RGPOWER is not set
# CONFIG_PKG_USING_BT_MX02 is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set # CONFIG_PKG_USING_SPI_TOOLS is not set
# end of peripheral libraries and drivers # end of peripheral libraries and drivers
@ -1059,7 +1040,6 @@ CONFIG_RT_USING_ADT_REF=y
# #
# Signal Processing and Control Algorithm Packages # Signal Processing and Control Algorithm Packages
# #
# CONFIG_PKG_USING_APID is not set
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set # CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_UKAL is not set
@ -1422,7 +1402,6 @@ CONFIG_RT_USING_QSPI0=y
CONFIG_USING_QSPI_CHANNEL0=y CONFIG_USING_QSPI_CHANNEL0=y
# CONFIG_USING_QSPI_CHANNEL1 is not set # CONFIG_USING_QSPI_CHANNEL1 is not set
CONFIG_BSP_USING_ETH=y CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_PWM=y CONFIG_BSP_USING_PWM=y
# CONFIG_RT_USING_PWM0 is not set # CONFIG_RT_USING_PWM0 is not set
# CONFIG_RT_USING_PWM1 is not set # CONFIG_RT_USING_PWM1 is not set

7
bsp/phytium/aarch64/configs/phytium_pi_rtthread.h
View File

@ -59,7 +59,6 @@
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1" #define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50200 #define RT_VER_NUM 0x50200
#define RT_USING_STDC_ATOMIC
#define RT_BACKTRACE_LEVEL_MAX_NR 32 #define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */ /* end of RT-Thread Kernel */
@ -168,6 +167,7 @@
#define RT_CHERRYUSB_HOST_XHCI #define RT_CHERRYUSB_HOST_XHCI
#define RT_CHERRYUSB_HOST_HID #define RT_CHERRYUSB_HOST_HID
#define RT_CHERRYUSB_HOST_MSC #define RT_CHERRYUSB_HOST_MSC
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -378,10 +378,6 @@
/* end of STM32 HAL & SDK Drivers */ /* end of STM32 HAL & SDK Drivers */
/* Infineon HAL Packages */
/* end of Infineon HAL Packages */
/* Kendryte SDK */ /* Kendryte SDK */
/* end of Kendryte SDK */ /* end of Kendryte SDK */
@ -484,7 +480,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define BSP_USING_I2C #define BSP_USING_I2C
#define I2C_USE_MIO #define I2C_USE_MIO

7
bsp/phytium/aarch64/rtconfig.h
View File

@ -58,7 +58,6 @@
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1" #define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50200 #define RT_VER_NUM 0x50200
#define RT_USING_STDC_ATOMIC
#define RT_BACKTRACE_LEVEL_MAX_NR 32 #define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */ /* end of RT-Thread Kernel */
@ -168,6 +167,7 @@
#define RT_CHERRYUSB_HOST_XHCI #define RT_CHERRYUSB_HOST_XHCI
#define RT_CHERRYUSB_HOST_HID #define RT_CHERRYUSB_HOST_HID
#define RT_CHERRYUSB_HOST_MSC #define RT_CHERRYUSB_HOST_MSC
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
/* end of Device Drivers */ /* end of Device Drivers */
/* C/C++ and POSIX layer */ /* C/C++ and POSIX layer */
@ -378,10 +378,6 @@
/* end of STM32 HAL & SDK Drivers */ /* end of STM32 HAL & SDK Drivers */
/* Infineon HAL Packages */
/* end of Infineon HAL Packages */
/* Kendryte SDK */ /* Kendryte SDK */
/* end of Kendryte SDK */ /* end of Kendryte SDK */
@ -488,7 +484,6 @@
#define RT_USING_QSPI0 #define RT_USING_QSPI0
#define USING_QSPI_CHANNEL0 #define USING_QSPI_CHANNEL0
#define BSP_USING_ETH #define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_PWM #define BSP_USING_PWM
#define BSP_USING_I2C #define BSP_USING_I2C
#define I2C_USE_MIO #define I2C_USE_MIO