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[fh8620] auto formatted

This commit is contained in:
Meco Man 2021-03-29 07:31:02 +08:00
parent 1ba020f3c8
commit 49ef3cdca5
75 changed files with 7527 additions and 7527 deletions
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20
bsp/fh8620/applications/main.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -27,18 +27,18 @@
void init_thread(void *parameter)
{
rt_components_init();
rt_components_init();
return ;
return ;
}
int rt_application_init(void)
{
rt_thread_t tid;
rt_thread_t tid;
tid = rt_thread_create("init", init_thread, RT_NULL,
4096, RT_THREAD_PRIORITY_MAX/3, 20);
if (tid) rt_thread_startup(tid);
tid = rt_thread_create("init", init_thread, RT_NULL,
4096, RT_THREAD_PRIORITY_MAX/3, 20);
if (tid) rt_thread_startup(tid);
return 0;
return 0;
}

136
bsp/fh8620/drivers/acw.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -30,12 +30,12 @@
#include "dma.h"
#ifdef RT_USING_FH_ACW
#if 1
typedef struct
typedef struct
{
unsigned int base;
void *vbase;
unsigned int size;
unsigned int align;
unsigned int base;
void *vbase;
unsigned int size;
unsigned int align;
}MEM_DESC;
#define ACW_SELFTEST 0
int buffer_malloc_withname(MEM_DESC *mem, int size, int align, char* name);
@ -222,9 +222,9 @@ void fh_acw_stop_playback(struct fh_audio_cfg *audio_config)
audio_config->playback.state = stopping;
writel(0, audio_dev.reg_base + ACW_TXFIFO_CTRL);//tx fifo disable
if(audio_config->plauback_trans->channel_number != ACW_PLY_DMA_CHAN)
goto free_mem;
goto free_mem;
if(!audio_config->plauback_trans->first_lli)
goto free_channel;
goto free_channel;
audio_config->playback_dma->ops->control(audio_config->playback_dma,RT_DEVICE_CTRL_DMA_CYCLIC_STOP,audio_config->plauback_trans);
audio_config->playback_dma->ops->control(audio_config->playback_dma,RT_DEVICE_CTRL_DMA_CYCLIC_FREE,audio_config->plauback_trans);
free_channel:
@ -259,9 +259,9 @@ void fh_acw_stop_capture(struct fh_audio_cfg *audio_config)
writel(0, audio_dev.reg_base + 8);//rx fifo disable
if(audio_config->capture_trans->channel_number != ACW_CAP_DMA_CHAN)
goto free_mem;
goto free_mem;
if(!audio_config->capture_trans->first_lli)
goto free_channel;
goto free_channel;
audio_config->capture_dma->ops->control(audio_config->capture_dma,RT_DEVICE_CTRL_DMA_CYCLIC_STOP,audio_config->capture_trans);
audio_config->capture_dma->ops->control(audio_config->capture_dma,RT_DEVICE_CTRL_DMA_CYCLIC_FREE,audio_config->capture_trans);
@ -286,10 +286,10 @@ void switch_io_type(enum audio_type type, enum io_select io_type)
{
rt_kprintf("audio input changed to mic_in\n");
writel( reg & (~(1<<1)),audio_dev.reg_base + ACW_ADC_PATH_CTRL);
reg = readl(audio_dev.reg_base + ACW_ADC_PATH_CTRL);
reg = reg & (~(1<<3));
reg |=(0x1<<3);
writel(reg, audio_dev.reg_base + ACW_ADC_PATH_CTRL);
reg = readl(audio_dev.reg_base + ACW_ADC_PATH_CTRL);
reg = reg & (~(1<<3));
reg |=(0x1<<3);
writel(reg, audio_dev.reg_base + ACW_ADC_PATH_CTRL);
}
else if (line_in == io_type)
{
@ -397,7 +397,7 @@ void switch_input_volume(int volume)
param = get_param_from_volume(volume);
if (param < 0)
{
rt_kprintf("capture volume error\n");
rt_kprintf("capture volume error\n");
return;
}
@ -511,25 +511,25 @@ int register_tx_dma(struct fh_audio_cfg *audio_config)
if(playback_trans->channel_number == ACW_PLY_DMA_CHAN){
ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,playback_trans);
if(ret){
rt_kprintf("can't playback cyclic prepare \n");
return RT_ERROR;
}
ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,playback_trans);
if(ret){
rt_kprintf("can't playback cyclic start \n");
return RT_ERROR;
}
ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,playback_trans);
if(ret){
rt_kprintf("can't playback cyclic prepare \n");
return RT_ERROR;
}
ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,playback_trans);
if(ret){
rt_kprintf("can't playback cyclic start \n");
return RT_ERROR;
}
}
else
return RT_ERROR;
return RT_ERROR;
return 0;
}
int register_rx_dma( struct fh_audio_cfg *audio_config)
{
int ret;
int ret;
struct dma_transfer *capture_slave;
capture_slave = audio_config->capture_trans;
struct rt_dma_device *rt_dma_dev;
@ -546,19 +546,19 @@ int register_rx_dma( struct fh_audio_cfg *audio_config)
return RT_ERROR;
}
if(capture_slave->channel_number==ACW_CAP_DMA_CHAN){
ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,capture_slave);
if(ret){
rt_kprintf("can't capture cyclic prepare \n");
return RT_ERROR;
}
ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,capture_slave);
if(ret){
rt_kprintf("can't capture cyclic start \n");
return RT_ERROR;
}
ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,capture_slave);
if(ret){
rt_kprintf("can't capture cyclic prepare \n");
return RT_ERROR;
}
ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,capture_slave);
if(ret){
rt_kprintf("can't capture cyclic start \n");
return RT_ERROR;
}
}
else
return RT_ERROR;
return RT_ERROR;
writel(0x11,audio_dev.reg_base + ACW_RXFIFO_CTRL);//clear rx fifo
writel(0x30029,audio_dev.reg_base + ACW_RXFIFO_CTRL);/*enable rx fifo*/
@ -614,13 +614,13 @@ int fh_acw_start_playback(struct fh_audio_cfg *audio_config)
audio_config->playback.state = running;
ret = audio_request_playback_channel(audio_config);
if(ret){
rt_kprintf("can't request playback channel\n");
return ret;
rt_kprintf("can't request playback channel\n");
return ret;
}
ret = register_tx_dma(audio_config);
if (ret < 0)
{
rt_kprintf("can't register tx dma\n");
rt_kprintf("can't register tx dma\n");
return ret;
}
rt_list_init(&(playback_wq.list));
@ -638,7 +638,7 @@ int fh_acw_start_playback(struct fh_audio_cfg *audio_config)
int fh_acw_start_capture(struct fh_audio_cfg *audio_config)
{
int ret;
int ret;
if(audio_config->capture.state == running)
{
return 0;
@ -654,8 +654,8 @@ int fh_acw_start_capture(struct fh_audio_cfg *audio_config)
audio_config->capture.state = running;
ret = audio_request_capture_channel(audio_config);
if(ret){
rt_kprintf("can't request capture channel \n");
return ret;
rt_kprintf("can't request capture channel \n");
return ret;
}
return register_rx_dma(audio_config);
@ -698,12 +698,12 @@ static void fh_acw_tx_dma_done(void *arg)
audio_config->playback.hw_ptr = audio_config->playback.hw_ptr - audio_config->playback.size;
}
int avail = avail_data_len(playback,audio_config);
if (avail > audio_config->playback.cfg.period_bytes)
{
int avail = avail_data_len(playback,audio_config);
if (avail > audio_config->playback.cfg.period_bytes)
{
rt_sem_release(&audio_config->sem_playback);
}
rt_sem_release(&audio_config->sem_playback);
}
#endif
}
@ -719,12 +719,12 @@ int arg_config_support(struct fh_audio_cfg_arg * cfg)
ret = get_param_from_volume(cfg->volume);
if (ret < 0) {
rt_kprintf("invalid volume\n");
rt_kprintf("invalid volume\n");
return -EINVAL;
}
ret = get_factor_from_table(cfg->rate);
if (ret < 0) {
rt_kprintf("invalid rate\n");
rt_kprintf("invalid rate\n");
return -EINVAL;
}
return 0;
@ -1084,7 +1084,7 @@ static void fh_audio_interrupt(int irq, void *param)
void audio_prealloc_dma_buffer(int aiaotype,struct fh_audio_cfg *audio_config)
{
if(aiaotype == mic_in || aiaotype == line_in){
if(aiaotype == mic_in || aiaotype == line_in){
audio_config->capture.area = (void *)fh_dma_mem_malloc(audio_config->capture.cfg.buffer_bytes \
+ audio_config->capture.cfg.period_bytes);
@ -1093,8 +1093,8 @@ void audio_prealloc_dma_buffer(int aiaotype,struct fh_audio_cfg *audio_config)
rt_kprintf("no enough mem for capture buffer alloc\n");
return ;
}
}
if(aiaotype == speaker_out || aiaotype == line_out){
}
if(aiaotype == speaker_out || aiaotype == line_out){
audio_config->playback.area = (void *)fh_dma_mem_malloc(audio_config->playback.cfg.buffer_bytes \
+ audio_config->playback.cfg.period_bytes);
@ -1169,9 +1169,9 @@ int audio_request_capture_channel(struct fh_audio_cfg *audio_config){
rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_OPEN,dma_rx_transfer);
ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,dma_rx_transfer);
if(ret){
rt_kprintf("can't request capture channel\n");
dma_rx_transfer->channel_number =0xff;
return -ret;
rt_kprintf("can't request capture channel\n");
dma_rx_transfer->channel_number =0xff;
return -ret;
}
}
@ -1219,9 +1219,9 @@ int audio_request_playback_channel(struct fh_audio_cfg *audio_config)
rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_OPEN,dma_tx_transfer);
ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,dma_tx_transfer);
if(ret){
rt_kprintf("can't request playbak channel\n");
dma_tx_transfer->channel_number = 0xff;
return -ret;
rt_kprintf("can't request playbak channel\n");
dma_tx_transfer->channel_number = 0xff;
return -ret;
}
return 0;
@ -1320,7 +1320,7 @@ void fh_acw_test(){
cfg.frame_bit = 16;
cfg.io_type = mic_in;
cfg.period_size = BUFF_SIZE/8;
cfg.rate = 8000;
cfg.volume = 80;
@ -1344,18 +1344,18 @@ void fh_acw_test(){
ret = acw_dev->control(acw_dev,AC_AI_EN,&cfg);
if(ret)
acw_dev->control(acw_dev,AC_AI_DISABLE,&cfg);
acw_dev->control(acw_dev,AC_AI_DISABLE,&cfg);
cfg.io_type = line_out;
acw_dev->control(acw_dev,AC_INIT_PLAYBACK_MEM,&cfg);
ret = acw_dev->control(acw_dev,AC_AO_EN,&cfg);
if(ret){
acw_dev->control(acw_dev,AC_AO_DISABLE,&cfg);
acw_dev->control(acw_dev,AC_AO_DISABLE,&cfg);
// acw_dev->control(acw_dev,AC_SET_OUTPUT_MODE,&output);
return ;
return ;
}
for(i=0;i<100;i++)
for(i=0;i<100;i++)
{
rx:
@ -1374,7 +1374,7 @@ tx:
acw_dev->write(acw_dev,0,&rx_buff[0],1024*8);
}
acw_dev->close(acw_dev);
acw_dev->close(acw_dev);
}
#ifdef RT_USING_FINSH

246
bsp/fh8620/drivers/acw.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef ACW_H_
#define ACW_H_
#include <rtthread.h>
@ -37,86 +37,86 @@
typedef unsigned long long dma_addr_t;
struct scatterlist {
#ifdef CONFIG_DEBUG_SG
unsigned long sg_magic;
unsigned long sg_magic;
#endif
unsigned long page_link;
unsigned int offset;
unsigned int length;
dma_addr_t dma_address;
unsigned long page_link;
unsigned int offset;
unsigned int length;
dma_addr_t dma_address;
#ifdef CONFIG_NEED_SG_DMA_LENGTH
unsigned int dma_length;
unsigned int dma_length;
#endif
};
#define readl(a) (*(volatile rt_uint32_t *)(a))
#define rkqueue_struct rt_workqueue
#define work_struct rt_work
#define INIT_WORK(work,func) rt_work_init(work,func,RT_NULL);
#define queue_work rt_workqueue_dowork
#define rkqueue_struct rt_workqueue
#define work_struct rt_work
#define INIT_WORK(work,func) rt_work_init(work,func,RT_NULL);
#define queue_work rt_workqueue_dowork
//timer
#define timer_list rt_timer
#define wait_queue_head_t struct rt_event
#define init_waitqueue_head(event_t) rt_event_init(event_t, "audio_event", RT_IPC_FLAG_FIFO)
#define timer_list rt_timer
#define wait_queue_head_t struct rt_event
#define init_waitqueue_head(event_t) rt_event_init(event_t, "audio_event", RT_IPC_FLAG_FIFO)
typedef enum{
AC_SR_8K = 8000,
AC_SR_16K = 16000,
AC_SR_32K = 32000,
AC_SR_441K = 44100,
AC_SR_48K = 48000,
AC_SR_8K = 8000,
AC_SR_16K = 16000,
AC_SR_32K = 32000,
AC_SR_441K = 44100,
AC_SR_48K = 48000,
} FH_AC_SAMPLE_RATE_E;
typedef enum{
AC_BW_8 = 8,
AC_BW_16 = 16,
AC_BW_24 = 24,
AC_BW_8 = 8,
AC_BW_16 = 16,
AC_BW_24 = 24,
} FH_AC_BIT_WIDTH_E;
enum io_select{
mic_in = 0,
line_in = 1,
speaker_out = 2,
line_out = 3,
mic_in = 0,
line_in = 1,
speaker_out = 2,
line_out = 3,
};
struct fh_audio_cfg_arg{
enum io_select io_type;
int volume;
int rate;
int frame_bit;
int channels;
int buffer_size;
int period_size;
enum io_select io_type;
int volume;
int rate;
int frame_bit;
int channels;
int buffer_size;
int period_size;
};
typedef struct{
unsigned int len;
unsigned char *data;
unsigned int len;
unsigned char *data;
}FH_AC_FRAME_S;
typedef enum{
FH_AC_MIC_IN = 0,
FH_AC_LINE_IN = 1,
FH_AC_SPK_OUT = 2,
FH_AC_LINE_OUT = 3
FH_AC_MIC_IN = 0,
FH_AC_LINE_IN = 1,
FH_AC_SPK_OUT = 2,
FH_AC_LINE_OUT = 3
}FH_AC_IO_TYPE_E;
typedef struct {
FH_AC_IO_TYPE_E io_type;
FH_AC_SAMPLE_RATE_E sample_rate;
FH_AC_BIT_WIDTH_E bit_width;
unsigned int channels;
unsigned int period_size;
unsigned int volume;
FH_AC_IO_TYPE_E io_type;
FH_AC_SAMPLE_RATE_E sample_rate;
FH_AC_BIT_WIDTH_E bit_width;
unsigned int channels;
unsigned int period_size;
unsigned int volume;
} FH_AC_CONFIG;
struct device_dma_parameters {
/*
* a low level driver may set these to teach IOMMU code about
* sg limitations.
*/
unsigned int max_segment_size;
unsigned long segment_boundary_mask;
/*
* a low level driver may set these to teach IOMMU code about
* sg limitations.
*/
unsigned int max_segment_size;
unsigned long segment_boundary_mask;
};
struct list_head {
@ -124,32 +124,32 @@ struct list_head {
struct list_head *prev;
};
struct dma_coherent_mem {
void *virt_base;
dma_addr_t device_base;
int size;
int flags;
unsigned long *bitmap;
void *virt_base;
dma_addr_t device_base;
int size;
int flags;
unsigned long *bitmap;
};
struct device_acw{
unsigned long long *dma_mask; /* dma mask (if dma'able device) */
unsigned long long coherent_dma_mask;/* Like dma_mask, but for
alloc_coherent mappings as
not all hardware supports
64 bit addresses for consistent
allocations such descriptors. */
struct device_dma_parameters *dma_parms;
unsigned long long *dma_mask; /* dma mask (if dma'able device) */
unsigned long long coherent_dma_mask;/* Like dma_mask, but for
alloc_coherent mappings as
not all hardware supports
64 bit addresses for consistent
allocations such descriptors. */
struct device_dma_parameters *dma_parms;
struct list_head dma_pools;
struct list_head dma_pools;
struct dma_coherent_mem *dma_mem;
struct dma_coherent_mem *dma_mem;
};
#define false 0
#define true 1
#define AC_INIT_CAPTURE_MEM 0x10
#define AC_INIT_PLAYBACK_MEM 0x11
#define AC_INIT_CAPTURE_MEM 0x10
#define AC_INIT_PLAYBACK_MEM 0x11
#define AC_SET_VOL 0x12
@ -160,73 +160,73 @@ struct device_acw{
#define AC_AI_EN 0x15
#define AC_AO_EN 0x16
#define AC_AI_DISABLE 0x17
#define AC_AO_DISABLE 0x18
#define AC_AI_PAUSE 0x19
#define AC_AI_RESUME 0x1a
#define AC_AO_PAUSE 0x1b
#define AC_AO_RESUME 0x1c
#define AC_MIC_BOOST 0x1d
#define AC_AO_DISABLE 0x18
#define AC_AI_PAUSE 0x19
#define AC_AI_RESUME 0x1a
#define AC_AO_PAUSE 0x1b
#define AC_AO_RESUME 0x1c
#define AC_MIC_BOOST 0x1d
#define POLLIN 0x001 /* There is data to read. */
#define POLLPRI 0x002 /* There is urgent data to read. */
#define POLLOUT 0x004 /* Writing now will not block. */
#define POLLIN 0x001 /* There is data to read. */
#define POLLPRI 0x002 /* There is urgent data to read. */
#define POLLOUT 0x004 /* Writing now will not block. */
/* These values are defined in XPG4.2. */
# define POLLRDNORM 0x040 /* Normal data may be read. */
# define POLLRDBAND 0x080 /* Priority data may be read. */
# define POLLWRNORM 0x100 /* Writing now will not block. */
# define POLLWRBAND 0x200 /* Priority data may be written. */
# define POLLRDNORM 0x040 /* Normal data may be read. */
# define POLLRDBAND 0x080 /* Priority data may be read. */
# define POLLWRNORM 0x100 /* Writing now will not block. */
# define POLLWRBAND 0x200 /* Priority data may be written. */
/* These are extensions for Linux. */
# define POLLMSG 0x400
# define POLLREMOVE 0x1000
# define POLLRDHUP 0x2000
# define POLLMSG 0x400
# define POLLREMOVE 0x1000
# define POLLRDHUP 0x2000
/* Event types always implicitly polled for. These bits need not be set in
`events', but they will appear in `revents' to indicate the status of
the file descriptor. */
#define POLLERR 0x008 /* Error condition. */
#define POLLHUP 0x010 /* Hung up. */
#define POLLNVAL 0x020 /* Invalid polling request. */
#define POLLERR 0x008 /* Error condition. */
#define POLLHUP 0x010 /* Hung up. */
#define POLLNVAL 0x020 /* Invalid polling request. */
#define EPERM 1 /* Operation not permitted */
#define ENOENT 2 /* No such file or directory */
#define ESRCH 3 /* No such process */
#define EINTR 4 /* Interrupted system call */
#define EIO 5 /* I/O error */
#define ENXIO 6 /* No such device or address */
#define E2BIG 7 /* Argument list too long */
#define ENOEXEC 8 /* Exec format error */
#define EBADF 9 /* Bad file number */
#define ECHILD 10 /* No child processes */
#define EAGAIN 11 /* Try again */
#define ENOMEM 12 /* Out of memory */
#define EACCES 13 /* Permission denied */
#define EFAULT 14 /* Bad address */
#define ENOTBLK 15 /* Block device required */
#define EBUSY 16 /* Device or resource busy */
#define EEXIST 17 /* File exists */
#define EXDEV 18 /* Cross-device link */
#define ENODEV 19 /* No such device */
#define ENOTDIR 20 /* Not a directory */
#define EISDIR 21 /* Is a directory */
#define EINVAL 22 /* Invalid argument */
#define ENFILE 23 /* File table overflow */
#define EMFILE 24 /* Too many open files */
#define ENOTTY 25 /* Not a typewriter */
#define ETXTBSY 26 /* Text file busy */
#define EFBIG 27 /* File too large */
#define ENOSPC 28 /* No space left on device */
#define ESPIPE 29 /* Illegal seek */
#define EROFS 30 /* Read-only file system */
#define EMLINK 31 /* Too many links */
#define EPIPE 32 /* Broken pipe */
#define EDOM 33 /* Math argument out of domain of func */
#define ERANGE 34 /* Math result not representable */
#define EPERM 1 /* Operation not permitted */
#define ENOENT 2 /* No such file or directory */
#define ESRCH 3 /* No such process */
#define EINTR 4 /* Interrupted system call */
#define EIO 5 /* I/O error */
#define ENXIO 6 /* No such device or address */
#define E2BIG 7 /* Argument list too long */
#define ENOEXEC 8 /* Exec format error */
#define EBADF 9 /* Bad file number */
#define ECHILD 10 /* No child processes */
#define EAGAIN 11 /* Try again */
#define ENOMEM 12 /* Out of memory */
#define EACCES 13 /* Permission denied */
#define EFAULT 14 /* Bad address */
#define ENOTBLK 15 /* Block device required */
#define EBUSY 16 /* Device or resource busy */
#define EEXIST 17 /* File exists */
#define EXDEV 18 /* Cross-device link */
#define ENODEV 19 /* No such device */
#define ENOTDIR 20 /* Not a directory */
#define EISDIR 21 /* Is a directory */
#define EINVAL 22 /* Invalid argument */
#define ENFILE 23 /* File table overflow */
#define EMFILE 24 /* Too many open files */
#define ENOTTY 25 /* Not a typewriter */
#define ETXTBSY 26 /* Text file busy */
#define EFBIG 27 /* File too large */
#define ENOSPC 28 /* No space left on device */
#define ESPIPE 29 /* Illegal seek */
#define EROFS 30 /* Read-only file system */
#define EMLINK 31 /* Too many links */
#define EPIPE 32 /* Broken pipe */
#define EDOM 33 /* Math argument out of domain of func */
#define ERANGE 34 /* Math result not representable */
extern void fh_audio_init(void);
extern void fh_acw_test();
#endif

16
bsp/fh8620/drivers/dma.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*****************************************************************************
* Include Section
* add all #include here
@ -88,7 +88,7 @@ static rt_err_t rt_dma_control(struct rt_device *dev,
*****************************************************************************/
static rt_err_t rt_dma_init(struct rt_device *dev)
{
struct rt_dma_device *dma;
struct rt_dma_device *dma;
RT_ASSERT(dev != RT_NULL);
dma = (struct rt_dma_device *)dev;
@ -107,7 +107,7 @@ static rt_err_t rt_dma_open(struct rt_device *dev, rt_uint16_t oflag)
static rt_err_t rt_dma_close(struct rt_device *dev)
{
struct rt_dma_device *dma;
struct rt_dma_device *dma;
RT_ASSERT(dev != RT_NULL);
dma = (struct rt_dma_device *)dev;
@ -124,7 +124,7 @@ static rt_err_t rt_dma_control(struct rt_device *dev,
rt_uint8_t cmd,
void *args)
{
struct rt_dma_device *dma;
struct rt_dma_device *dma;
RT_ASSERT(dev != RT_NULL);
dma = (struct rt_dma_device *)dev;
@ -141,7 +141,7 @@ rt_err_t rt_hw_dma_register(struct rt_dma_device *dma,
rt_uint32_t flag,
void *data)
{
rt_uint32_t ret;
rt_uint32_t ret;
struct rt_device *device;
RT_ASSERT(dma != RT_NULL);

36
bsp/fh8620/drivers/dma.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -29,31 +29,31 @@
#include <rtthread.h>
/****************************************************************************
* #include section
* add #include here if any
* add #include here if any
***************************************************************************/
/****************************************************************************
* #define section
* add constant #define here if any
* add constant #define here if any
***************************************************************************/
#define RT_DEVICE_CTRL_DMA_OPEN (1)
#define RT_DEVICE_CTRL_DMA_CLOSE (2)
#define RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL (3)
#define RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL (4)
#define RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER (5)
#define RT_DEVICE_CTRL_DMA_OPEN (1)
#define RT_DEVICE_CTRL_DMA_CLOSE (2)
#define RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL (3)
#define RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL (4)
#define RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER (5)
//cyclic add func below....
#define RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE (6)
#define RT_DEVICE_CTRL_DMA_CYCLIC_START (7)
#define RT_DEVICE_CTRL_DMA_CYCLIC_STOP (8)
#define RT_DEVICE_CTRL_DMA_CYCLIC_FREE (9)
#define RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE (6)
#define RT_DEVICE_CTRL_DMA_CYCLIC_START (7)
#define RT_DEVICE_CTRL_DMA_CYCLIC_STOP (8)
#define RT_DEVICE_CTRL_DMA_CYCLIC_FREE (9)
//#define RT_DEVICE_CTRL_ (3) /* get the left time before reboot(in seconds) */
//#define RT_DEVICE_CTRL_ (3) /* get the left time before reboot(in seconds) */
//#define RT_DEVICE_CTRL_ (4) /* refresh watchdog */
//#define RT_DEVICE_CTRL_ (5) /* start watchdog */
//#define RT_DEVICE_CTRL_ (6) /* stop watchdog */
@ -64,13 +64,13 @@
/****************************************************************************
* ADT section
* add Abstract Data Type definition here
* add Abstract Data Type definition here
***************************************************************************/
struct rt_dma_ops;
struct rt_dma_device
{
// the parent must be the fitst para..
// the parent must be the fitst para..
struct rt_device parent;
struct rt_dma_ops *ops;
};
@ -91,7 +91,7 @@ struct rt_dma_ops
/****************************************************************************
* section
* add function prototype here if any
* add function prototype here if any
***************************************************************************/
rt_err_t rt_hw_dma_register(struct rt_dma_device *dma,
const char *name,

26
bsp/fh8620/drivers/dma_mem.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*****************************************************************************
* Include Section
* add all #include here
@ -86,27 +86,27 @@ static struct rt_memheap dma_heap = {0};
* what does this function returned?
*****************************************************************************/
rt_err_t fh_dma_mem_init(rt_uint32_t *mem_start,rt_uint32_t size){
return rt_memheap_init(&dma_heap,"dma_heap",mem_start,size);
return rt_memheap_init(&dma_heap,"dma_heap",mem_start,size);
}
void *fh_dma_mem_malloc(rt_uint32_t size){
return rt_memheap_alloc(&dma_heap, size);
return rt_memheap_alloc(&dma_heap, size);
}
void fh_dma_mem_free(void *ptr){
rt_memheap_free(ptr);
rt_memheap_free(ptr);
}
#ifdef FH_TEST_DMA_MEM
int dma_mem_debug(void *ptr){
//rt_memheap_free(ptr);
rt_kprintf("dma mem start 0x%08x\n",(rt_uint32_t)dma_heap.start_addr);
rt_kprintf("dma mem total size 0x%08x\n",dma_heap.pool_size);
rt_kprintf("dma mem left size 0x%08x\n",dma_heap.available_size);
rt_kprintf("dma mem max use size 0x%08x\n",dma_heap.max_used_size);
return 0;
//rt_memheap_free(ptr);
rt_kprintf("dma mem start 0x%08x\n",(rt_uint32_t)dma_heap.start_addr);
rt_kprintf("dma mem total size 0x%08x\n",dma_heap.pool_size);
rt_kprintf("dma mem left size 0x%08x\n",dma_heap.available_size);
rt_kprintf("dma mem max use size 0x%08x\n",dma_heap.max_used_size);
return 0;
}
#endif

16
bsp/fh8620/drivers/dma_mem.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef DMA_MEM_H_
#define DMA_MEM_H_
@ -36,20 +36,20 @@
#include <rtthread.h>
/****************************************************************************
* #include section
* add #include here if any
* add #include here if any
***************************************************************************/
/****************************************************************************
* #define section
* add constant #define here if any
* add constant #define here if any
***************************************************************************/
/****************************************************************************
* ADT section
* add Abstract Data Type definition here
* add Abstract Data Type definition here
***************************************************************************/
@ -61,7 +61,7 @@
/****************************************************************************
* section
* add function prototype here if any
* add function prototype here if any
***************************************************************************/
#ifdef RT_USING_DMA_MEM
rt_err_t fh_dma_mem_init(rt_uint32_t *mem_start,rt_uint32_t size);

1856
bsp/fh8620/drivers/fh_dma.c
View File

File diff suppressed because it is too large Load Diff

236
bsp/fh8620/drivers/fh_dma.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,19 +18,19 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef FH_DMA_H_
#define FH_DMA_H_
/****************************************************************************
* #include section
* add #include here if any
* add #include here if any
***************************************************************************/
#include <rtthread.h>
@ -43,24 +43,24 @@
*********************************/
#define FH81_MAX_CHANNEL (4)
#define FH81_CHANNEL_MAX_TRANSFER_SIZE (4095)
#define FH81_MAX_CHANNEL (4)
#define FH81_CHANNEL_MAX_TRANSFER_SIZE (4095)
enum DMA_HW_HS_MAP{
ACODEC_RX = 0,
ACODEC_TX,
SPI0_RX,
SPI0_TX,
SPI1_RX,
SPI1_TX,
UART0_RX,
UART0_TX,
UART1_RX,
UART1_TX,
DMA_HW_HS_END,
ACODEC_RX = 0,
ACODEC_TX,
SPI0_RX,
SPI0_TX,
SPI1_RX,
SPI1_TX,
UART0_RX,
UART0_TX,
UART1_RX,
UART1_TX,
DMA_HW_HS_END,
};
/*********************************
@ -76,7 +76,7 @@ typedef void (*user_prepare)(void *prepare_para);
/**************************** i'm cut-off line ************************************/
/**************************** i'm cut-off line ************************************/
@ -88,128 +88,128 @@ struct fh81_dma;
struct dw_lli {
/* values that are not changed by hardware */
rt_uint32_t sar;
rt_uint32_t dar;
rt_uint32_t llp; /* chain to next lli */
rt_uint32_t ctllo;
/* values that may get written back: */
rt_uint32_t ctlhi;
/* sstat and dstat can snapshot peripheral register state.
* silicon config may discard either or both...
*/
rt_uint32_t sstat;
rt_uint32_t dstat;
rt_uint32_t reserve;
/* values that are not changed by hardware */
rt_uint32_t sar;
rt_uint32_t dar;
rt_uint32_t llp; /* chain to next lli */
rt_uint32_t ctllo;
/* values that may get written back: */
rt_uint32_t ctlhi;
/* sstat and dstat can snapshot peripheral register state.
* silicon config may discard either or both...
*/
rt_uint32_t sstat;
rt_uint32_t dstat;
rt_uint32_t reserve;
};
//transfer use below
struct dma_transfer{
//this is private for the dma drive....app don't touch it,the driver will manger it
//link interface for more transfer to the controller...
rt_list_t transfer_list;
struct fh81_dma *dma_controller;
//this the mem add....the dma controller will load the setting to move data ....
//user don't touch it
struct dw_lli *first_lli;
rt_uint32_t lli_size;
//new add for allign get desc...
rt_uint32_t actual_lli_size;
//this is private for the dma drive....app don't touch it,the driver will manger it
//link interface for more transfer to the controller...
rt_list_t transfer_list;
struct fh81_dma *dma_controller;
//this the mem add....the dma controller will load the setting to move data ....
//user don't touch it
struct dw_lli *first_lli;
rt_uint32_t lli_size;
//new add for allign get desc...
rt_uint32_t actual_lli_size;
//user could set paras below~~~
#define AUTO_FIND_CHANNEL (0xff)
//transfer with which dma channel...if the data is 0xff, the driver will auto find a free channel.
rt_uint32_t channel_number;
//which dma you want to use...for fh81....only 0!!!
rt_uint32_t dma_number;
//user could set paras below~~~
#define AUTO_FIND_CHANNEL (0xff)
//transfer with which dma channel...if the data is 0xff, the driver will auto find a free channel.
rt_uint32_t channel_number;
//which dma you want to use...for fh81....only 0!!!
rt_uint32_t dma_number;
//user should set the para below
#define DMA_M2M (0) // MEM <=> MEM
#define DMA_M2P (1) // MEM => peripheral A
#define DMA_P2M (2) // MEM <= peripheral A
#define DMA_P2P (3) // peripheral A <=> peripheral B
rt_uint32_t fc_mode;//ip->mem. mem->mem. mem->ip
//user should set the para below
#define DMA_M2M (0) // MEM <=> MEM
#define DMA_M2P (1) // MEM => peripheral A
#define DMA_P2M (2) // MEM <= peripheral A
#define DMA_P2P (3) // peripheral A <=> peripheral B
rt_uint32_t fc_mode;//ip->mem. mem->mem. mem->ip
#define DMA_HW_HANDSHAKING (0)
#define DMA_SW_HANDSHAKING (1)
rt_uint32_t src_hs; //src
//if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
rt_uint32_t src_per; //src hw handshake number
//rt_uint32_t irq_mode;//for each transfer,irq maybe not same. suggest for the default(transfer isr)
#define DMA_HW_HANDSHAKING (0)
#define DMA_SW_HANDSHAKING (1)
rt_uint32_t src_hs; //src
//if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
rt_uint32_t src_per; //src hw handshake number
//rt_uint32_t irq_mode;//for each transfer,irq maybe not same. suggest for the default(transfer isr)
#define DW_DMA_SLAVE_WIDTH_8BIT (0)
#define DW_DMA_SLAVE_WIDTH_16BIT (1)
#define DW_DMA_SLAVE_WIDTH_32BIT (2)
rt_uint32_t src_width;
#define DW_DMA_SLAVE_WIDTH_8BIT (0)
#define DW_DMA_SLAVE_WIDTH_16BIT (1)
#define DW_DMA_SLAVE_WIDTH_32BIT (2)
rt_uint32_t src_width;
//the user should reference the hw handshaking watermark..
#define DW_DMA_SLAVE_MSIZE_1 (0)
#define DW_DMA_SLAVE_MSIZE_4 (1)
#define DW_DMA_SLAVE_MSIZE_8 (2)
#define DW_DMA_SLAVE_MSIZE_16 (3)
#define DW_DMA_SLAVE_MSIZE_32 (4)
#define DW_DMA_SLAVE_MSIZE_64 (5)
#define DW_DMA_SLAVE_MSIZE_128 (6)
#define DW_DMA_SLAVE_MSIZE_256 (7)
rt_uint32_t src_msize;
rt_uint32_t src_add;
#define DW_DMA_SLAVE_INC (0)
#define DW_DMA_SLAVE_DEC (1)
#define DW_DMA_SLAVE_FIX (2)
rt_uint32_t src_inc_mode; //increase mode: increase or not change
//the user should reference the hw handshaking watermark..
#define DW_DMA_SLAVE_MSIZE_1 (0)
#define DW_DMA_SLAVE_MSIZE_4 (1)
#define DW_DMA_SLAVE_MSIZE_8 (2)
#define DW_DMA_SLAVE_MSIZE_16 (3)
#define DW_DMA_SLAVE_MSIZE_32 (4)
#define DW_DMA_SLAVE_MSIZE_64 (5)
#define DW_DMA_SLAVE_MSIZE_128 (6)
#define DW_DMA_SLAVE_MSIZE_256 (7)
rt_uint32_t src_msize;
rt_uint32_t src_add;
#define DW_DMA_SLAVE_INC (0)
#define DW_DMA_SLAVE_DEC (1)
#define DW_DMA_SLAVE_FIX (2)
rt_uint32_t src_inc_mode; //increase mode: increase or not change
//#define DMA_DST_HW_HANDSHAKING (0)
//#define DMA_DST_SW_HANDSHAKING (1)
rt_uint32_t dst_hs; //src
//if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
rt_uint32_t dst_per; //dst hw handshake number
//#define DW_DMA_SLAVE_WIDTH_8BIT (0)
//#define DW_DMA_SLAVE_WIDTH_16BIT (1)
//#define DW_DMA_SLAVE_WIDTH_32BIT (2)
rt_uint32_t dst_width;
//#define DW_DMA_SLAVE_MSIZE_1 (0)
//#define DW_DMA_SLAVE_MSIZE_4 (1)
//#define DW_DMA_SLAVE_MSIZE_8 (2)
//#define DW_DMA_SLAVE_MSIZE_16 (3)
//#define DW_DMA_SLAVE_MSIZE_32 (4)
//#define DW_DMA_SLAVE_MSIZE_64 (5)
//#define DW_DMA_SLAVE_MSIZE_128 (6)
//#define DW_DMA_SLAVE_MSIZE_256 (7)
rt_uint32_t dst_msize;
rt_uint32_t dst_add;
//#define DW_DMA_SLAVE_INC (0)
//#define DW_DMA_SLAVE_DEC (1)
//#define DW_DMA_SLAVE_FIX (2)
rt_uint32_t dst_inc_mode; //increase mode: increase or not change
//#define DMA_DST_HW_HANDSHAKING (0)
//#define DMA_DST_SW_HANDSHAKING (1)
rt_uint32_t dst_hs; //src
//if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
rt_uint32_t dst_per; //dst hw handshake number
//#define DW_DMA_SLAVE_WIDTH_8BIT (0)
//#define DW_DMA_SLAVE_WIDTH_16BIT (1)
//#define DW_DMA_SLAVE_WIDTH_32BIT (2)
rt_uint32_t dst_width;
//#define DW_DMA_SLAVE_MSIZE_1 (0)
//#define DW_DMA_SLAVE_MSIZE_4 (1)
//#define DW_DMA_SLAVE_MSIZE_8 (2)
//#define DW_DMA_SLAVE_MSIZE_16 (3)
//#define DW_DMA_SLAVE_MSIZE_32 (4)
//#define DW_DMA_SLAVE_MSIZE_64 (5)
//#define DW_DMA_SLAVE_MSIZE_128 (6)
//#define DW_DMA_SLAVE_MSIZE_256 (7)
rt_uint32_t dst_msize;
rt_uint32_t dst_add;
//#define DW_DMA_SLAVE_INC (0)
//#define DW_DMA_SLAVE_DEC (1)
//#define DW_DMA_SLAVE_FIX (2)
rt_uint32_t dst_inc_mode; //increase mode: increase or not change
//total sizes, unit: src_width/DW_DMA_SLAVE_WIDTH_8BIT...
//exg: src_width = DW_DMA_SLAVE_WIDTH_32BIT. trans_len = 2...means that: the dma will transfer 2*4 bytes..
//exg: src_width = DW_DMA_SLAVE_WIDTH_8BIT. trans_len = 6...means that: the dma will transfer 1*6 bytes..
rt_uint32_t trans_len;
//total sizes, unit: src_width/DW_DMA_SLAVE_WIDTH_8BIT...
//exg: src_width = DW_DMA_SLAVE_WIDTH_32BIT. trans_len = 2...means that: the dma will transfer 2*4 bytes..
//exg: src_width = DW_DMA_SLAVE_WIDTH_8BIT. trans_len = 6...means that: the dma will transfer 1*6 bytes..
rt_uint32_t trans_len;
//this is used when dma finish transfer job
dma_complete_callback complete_callback;
void *complete_para; //for the driver data use the dma driver.
//this is used when dma finish transfer job
dma_complete_callback complete_callback;
void *complete_para; //for the driver data use the dma driver.
//this is used when dma before work..the user maybe need to set his own private para..
user_prepare prepare_callback;
void *prepare_para;
//this is used when dma before work..the user maybe need to set his own private para..
user_prepare prepare_callback;
void *prepare_para;
//add cyclic para...
//period len..
rt_uint32_t period_len;
//add cyclic para...
//period len..
rt_uint32_t period_len;
};
@ -223,13 +223,13 @@ struct dma_transfer{
/****************************************************************************
* #define section
* add constant #define here if any
* add constant #define here if any
***************************************************************************/
/****************************************************************************
* ADT section
* add Abstract Data Type definition here
* add Abstract Data Type definition here
***************************************************************************/
@ -240,7 +240,7 @@ struct dma_transfer{
/****************************************************************************
* section
* add function prototype here if any
* add function prototype here if any
***************************************************************************/
rt_err_t fh81_dma_register(struct fh81_dma * fh81_dma_p,
char * dma_name);

10
bsp/fh8620/drivers/gpio.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -410,10 +410,10 @@ int fh_gpio_probe(void *priv_data)
int i;
if(gpio_obj->id == 0){
rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_0");
rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_0");
}
else if(gpio_obj->id == 1){
rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_1");
rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_1");
}

8
bsp/fh8620/drivers/gpio.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef GPIO_H_
#define GPIO_H_

510
bsp/fh8620/drivers/i2c.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include <rtdevice.h>
#include <rthw.h>
#include "i2c.h"
@ -50,25 +50,25 @@ static void fh_i2c_xfer_init(struct rt_i2c_bus_device *dev, struct rt_i2c_msg ms
{
struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv;
struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
rt_uint32_t ic_con;
rt_uint32_t ic_con;
/* if the slave address is ten bit address, ERROR*/
/* if the slave address is ten bit address, ERROR*/
if (msgs[i2c_drv->msg_write_idx].flags & I2C_M_TEN)
{
rt_kprintf("ERROR: %s, ten bit address is NOT supported\n", __func__);
return;
}
/* Disable the adapter */
I2C_WaitMasterIdle(i2c_obj);
/* Disable the adapter */
I2C_WaitMasterIdle(i2c_obj);
I2C_Enable(i2c_obj, RT_FALSE);
I2C_Enable(i2c_obj, RT_FALSE);
/* set the slave (target) address */
I2C_SetSlaveAddress(i2c_obj, msgs[i2c_drv->msg_write_idx].addr);
/* set the slave (target) address */
I2C_SetSlaveAddress(i2c_obj, msgs[i2c_drv->msg_write_idx].addr);
/* Enable interrupts */
I2C_SetInterruptMask(i2c_obj, DW_IC_INTR_DEFAULT_MASK);
/* Enable interrupts */
I2C_SetInterruptMask(i2c_obj, DW_IC_INTR_DEFAULT_MASK);
/* Enable the adapter */
I2C_Enable(i2c_obj, RT_TRUE);
@ -76,30 +76,30 @@ static void fh_i2c_xfer_init(struct rt_i2c_bus_device *dev, struct rt_i2c_msg ms
static rt_size_t fh_i2c_xfer(struct rt_i2c_bus_device *dev,
struct rt_i2c_msg msgs[], rt_uint32_t num)
struct rt_i2c_msg msgs[], rt_uint32_t num)
{
struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv;
struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
int ret;
struct rt_i2c_msg *pmsg = RT_NULL;
struct rt_i2c_msg *pmsg = RT_NULL;
PRINT_I2C_DBG(">>>>>>>>>>>>>%s start\n", __func__);
PRINT_I2C_DBG(">>>>>>>>>>>>>%s start\n", __func__);
rt_completion_init(&i2c_drv->transfer_completion);
ret = rt_mutex_take(i2c_drv->lock, RT_WAITING_FOREVER);
if (ret != RT_EOK) {
goto done;
}
if (ret != RT_EOK) {
goto done;
}
i2c_drv->msgs = msgs;
i2c_drv->msgs_num = num;
i2c_drv->msg_read_idx = 0;
i2c_drv->msg_write_idx = 0;
i2c_drv->cmd_err = 0;
i2c_drv->msg_err = 0;
i2c_drv->status = STATUS_IDLE;
i2c_obj->abort_source = 0;
i2c_drv->msgs = msgs;
i2c_drv->msgs_num = num;
i2c_drv->msg_read_idx = 0;
i2c_drv->msg_write_idx = 0;
i2c_drv->cmd_err = 0;
i2c_drv->msg_err = 0;
i2c_drv->status = STATUS_IDLE;
i2c_obj->abort_source = 0;
ret = I2C_WaitDeviceIdle(i2c_obj);
if (ret < 0)
@ -108,51 +108,51 @@ static rt_size_t fh_i2c_xfer(struct rt_i2c_bus_device *dev,
//goto done;
}
fh_i2c_xfer_init(dev, msgs, num);
fh_i2c_xfer_init(dev, msgs, num);
ret = rt_completion_wait(&i2c_drv->transfer_completion, RT_TICK_PER_SECOND);
PRINT_I2C_DBG("%s transfer finished\n", "rt_completion_wait");
ret = rt_completion_wait(&i2c_drv->transfer_completion, RT_TICK_PER_SECOND);
PRINT_I2C_DBG("%s transfer finished\n", "rt_completion_wait");
if(ret)
{
{
rt_kprintf("ERROR: %s, transfer timeout\n", __func__);
I2C_SetDataCmd(i2c_obj, 0x200);
I2C_Init(i2c_obj);
ret = -RT_ETIMEOUT;
goto done;
}
ret = -RT_ETIMEOUT;
goto done;
}
if (i2c_drv->msg_err)
{
rt_kprintf("i2c_priv->msg_err: %d\n", i2c_drv->msg_err);
ret = i2c_drv->msg_err;
goto done;
}
if (i2c_drv->msg_err)
{
rt_kprintf("i2c_priv->msg_err: %d\n", i2c_drv->msg_err);
ret = i2c_drv->msg_err;
goto done;
}
/* no error */
if (!i2c_drv->cmd_err)
{
/* Disable the adapter */
I2C_WaitMasterIdle(i2c_obj);
I2C_Enable(i2c_obj, RT_FALSE);
ret = num;
goto done;
}
/* no error */
if (!i2c_drv->cmd_err)
{
/* Disable the adapter */
I2C_WaitMasterIdle(i2c_obj);
I2C_Enable(i2c_obj, RT_FALSE);
ret = num;
goto done;
}
/* We have an error */
if (i2c_drv->cmd_err == DW_IC_ERR_TX_ABRT)
{
rt_kprintf("ERROR: %s, i2c_priv>cmd_err == DW_IC_ERR_TX_ABRT\n", __func__);
ret = I2C_HandleTxAbort(i2c_obj);
goto done;
}
/* We have an error */
if (i2c_drv->cmd_err == DW_IC_ERR_TX_ABRT)
{
rt_kprintf("ERROR: %s, i2c_priv>cmd_err == DW_IC_ERR_TX_ABRT\n", __func__);
ret = I2C_HandleTxAbort(i2c_obj);
goto done;
}
ret = 1;
ret = 1;
done:
I2C_Enable(i2c_obj, RT_FALSE);
rt_mutex_release(i2c_drv->lock);
PRINT_I2C_DBG(">>>>>>>>>>>>>%s end\n", __func__);
return ret;
return ret;
}
@ -167,164 +167,164 @@ static void i2c_fh_xfer_msg(struct rt_i2c_bus_device *dev)
{
struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv;
struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
struct rt_i2c_msg *msgs = i2c_drv->msgs;
rt_uint32_t intr_mask, cmd;
int tx_limit, rx_limit;
rt_uint32_t addr = msgs[i2c_drv->msg_write_idx].addr;
rt_uint32_t buf_len = i2c_drv->tx_buf_len;
rt_uint8_t *buf = i2c_drv->tx_buf;
struct rt_i2c_msg *msgs = i2c_drv->msgs;
rt_uint32_t intr_mask, cmd;
int tx_limit, rx_limit;
rt_uint32_t addr = msgs[i2c_drv->msg_write_idx].addr;
rt_uint32_t buf_len = i2c_drv->tx_buf_len;
rt_uint8_t *buf = i2c_drv->tx_buf;
PRINT_I2C_DBG("%s start, msgs_num: %d, write_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_write_idx);
PRINT_I2C_DBG("%s start, msgs_num: %d, write_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_write_idx);
intr_mask = DW_IC_INTR_DEFAULT_MASK;
intr_mask = DW_IC_INTR_DEFAULT_MASK;
for (; i2c_drv->msg_write_idx < i2c_drv->msgs_num; i2c_drv->msg_write_idx++)
{
/*
* if target address has changed, we need to
* reprogram the target address in the i2c
* adapter when we are done with this transfer
*/
if (msgs[i2c_drv->msg_write_idx].addr != addr) {
rt_kprintf(
"ERROR: %s, invalid target address\n", __func__);
i2c_drv->msg_err = 1;
break;
}
for (; i2c_drv->msg_write_idx < i2c_drv->msgs_num; i2c_drv->msg_write_idx++)
{
/*
* if target address has changed, we need to
* reprogram the target address in the i2c
* adapter when we are done with this transfer
*/
if (msgs[i2c_drv->msg_write_idx].addr != addr) {
rt_kprintf(
"ERROR: %s, invalid target address\n", __func__);
i2c_drv->msg_err = 1;
break;
}
if (msgs[i2c_drv->msg_write_idx].len == 0) {
rt_kprintf(
"ERROR: %s, invalid message length\n", __func__);
i2c_drv->msg_err = 1;
break;
}
if (msgs[i2c_drv->msg_write_idx].len == 0) {
rt_kprintf(
"ERROR: %s, invalid message length\n", __func__);
i2c_drv->msg_err = 1;
break;
}
if (!(i2c_drv->status & STATUS_WRITE_IN_PROGRESS))
{
/* new i2c_msg */
buf = msgs[i2c_drv->msg_write_idx].buf;
buf_len = msgs[i2c_drv->msg_write_idx].len;
if (!(i2c_drv->status & STATUS_WRITE_IN_PROGRESS))
{
/* new i2c_msg */
buf = msgs[i2c_drv->msg_write_idx].buf;
buf_len = msgs[i2c_drv->msg_write_idx].len;
PRINT_I2C_DBG("new msg: len: %d, buf: 0x%x\n", buf_len, buf[0]);
}
PRINT_I2C_DBG("new msg: len: %d, buf: 0x%x\n", buf_len, buf[0]);
}
tx_limit = i2c_obj->config.tx_fifo_depth - I2C_GetTransmitFifoLevel(i2c_obj);
rx_limit = i2c_obj->config.rx_fifo_depth - I2C_GetReceiveFifoLevel(i2c_obj);
tx_limit = i2c_obj->config.tx_fifo_depth - I2C_GetTransmitFifoLevel(i2c_obj);
rx_limit = i2c_obj->config.rx_fifo_depth - I2C_GetReceiveFifoLevel(i2c_obj);
while (buf_len > 0 && tx_limit > 0 && rx_limit > 0)
{
if (msgs[i2c_drv->msg_write_idx].flags & RT_I2C_RD)
{
cmd = 0x100;
rx_limit--;
}
else
{
cmd = *buf++;
}
while (buf_len > 0 && tx_limit > 0 && rx_limit > 0)
{
if (msgs[i2c_drv->msg_write_idx].flags & RT_I2C_RD)
{
cmd = 0x100;
rx_limit--;
}
else
{
cmd = *buf++;
}
tx_limit--; buf_len--;
tx_limit--; buf_len--;
if(!buf_len)
{
//2015-11-8 ar0130 bug fixed
while(I2C_GetTransmitFifoLevel(i2c_obj));
cmd |= 0x200;
}
if(!buf_len)
{
//2015-11-8 ar0130 bug fixed
while(I2C_GetTransmitFifoLevel(i2c_obj));
cmd |= 0x200;
}
I2C_SetDataCmd(i2c_obj, cmd);
}
I2C_SetDataCmd(i2c_obj, cmd);
}
i2c_drv->tx_buf = buf;
i2c_drv->tx_buf_len = buf_len;
i2c_drv->tx_buf = buf;
i2c_drv->tx_buf_len = buf_len;
if (buf_len > 0)
{
/* more bytes to be written */
i2c_drv->status |= STATUS_WRITE_IN_PROGRESS;
break;
}
else
{
i2c_drv->status &= ~STATUS_WRITE_IN_PROGRESS;
}
}
if (buf_len > 0)
{
/* more bytes to be written */
i2c_drv->status |= STATUS_WRITE_IN_PROGRESS;
break;
}
else
{
i2c_drv->status &= ~STATUS_WRITE_IN_PROGRESS;
}
}
/*
* If i2c_msg index search is completed, we don't need TX_EMPTY
* interrupt any more.
*/
/*
* If i2c_msg index search is completed, we don't need TX_EMPTY
* interrupt any more.
*/
if (i2c_drv->msg_write_idx == i2c_drv->msgs_num)
intr_mask &= ~DW_IC_INTR_TX_EMPTY;
if (i2c_drv->msg_write_idx == i2c_drv->msgs_num)
intr_mask &= ~DW_IC_INTR_TX_EMPTY;
if (i2c_drv->msg_err)
{
rt_kprintf("ERROR: %s, msg_err: %d\n", __func__, i2c_drv->msg_err);
intr_mask = 0;
}
if (i2c_drv->msg_err)
{
rt_kprintf("ERROR: %s, msg_err: %d\n", __func__, i2c_drv->msg_err);
intr_mask = 0;
}
I2C_SetInterruptMask(i2c_obj, intr_mask);
I2C_SetInterruptMask(i2c_obj, intr_mask);
PRINT_I2C_DBG("%s end\n", __func__);
PRINT_I2C_DBG("%s end\n", __func__);
}
static void i2c_fh_read(struct rt_i2c_bus_device *dev)
{
struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv;
struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
struct rt_i2c_msg *msgs = i2c_drv->msgs;
int rx_valid;
struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv;
struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
struct rt_i2c_msg *msgs = i2c_drv->msgs;
int rx_valid;
PRINT_I2C_DBG("%s start, msgs_num: %d, read_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_read_idx);
PRINT_I2C_DBG("%s start, msgs_num: %d, read_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_read_idx);
for (; i2c_drv->msg_read_idx < i2c_drv->msgs_num; i2c_drv->msg_read_idx++)
{
rt_uint32_t len;
rt_uint8_t *buf;
for (; i2c_drv->msg_read_idx < i2c_drv->msgs_num; i2c_drv->msg_read_idx++)
{
rt_uint32_t len;
rt_uint8_t *buf;
if (!(msgs[i2c_drv->msg_read_idx].flags & RT_I2C_RD))
continue;
if (!(msgs[i2c_drv->msg_read_idx].flags & RT_I2C_RD))
continue;
if (!(i2c_drv->status & STATUS_READ_IN_PROGRESS))
{
len = msgs[i2c_drv->msg_read_idx].len;
buf = msgs[i2c_drv->msg_read_idx].buf;
}
else
{
PRINT_I2C_DBG("STATUS_READ_IN_PROGRESS\n");
len = i2c_drv->rx_buf_len;
buf = i2c_drv->rx_buf;
}
if (!(i2c_drv->status & STATUS_READ_IN_PROGRESS))
{
len = msgs[i2c_drv->msg_read_idx].len;
buf = msgs[i2c_drv->msg_read_idx].buf;
}
else
{
PRINT_I2C_DBG("STATUS_READ_IN_PROGRESS\n");
len = i2c_drv->rx_buf_len;
buf = i2c_drv->rx_buf;
}
rx_valid = I2C_GetReceiveFifoLevel(i2c_obj);
rx_valid = I2C_GetReceiveFifoLevel(i2c_obj);
if(rx_valid == 0)
{
rt_kprintf("ERROR: %s, rx_valid == 0\n", __func__);
}
PRINT_I2C_DBG("%s, len=%d, rx_valid=%d\n", __func__, len, rx_valid);
for (; len > 0 && rx_valid > 0; len--, rx_valid--)
{
*buf++ = I2C_GetData(i2c_obj);
}
if(rx_valid == 0)
{
rt_kprintf("ERROR: %s, rx_valid == 0\n", __func__);
}
PRINT_I2C_DBG("%s, len=%d, rx_valid=%d\n", __func__, len, rx_valid);
for (; len > 0 && rx_valid > 0; len--, rx_valid--)
{
*buf++ = I2C_GetData(i2c_obj);
}
PRINT_I2C_DBG("i2c_fh_read, len: %d, buf[0]: 0x%x\n", msgs[i2c_drv->msg_read_idx].len, msgs[i2c_drv->msg_read_idx].buf[0]);
PRINT_I2C_DBG("i2c_fh_read, len: %d, buf[0]: 0x%x\n", msgs[i2c_drv->msg_read_idx].len, msgs[i2c_drv->msg_read_idx].buf[0]);
if (len > 0)
{
PRINT_I2C_DBG("len > 0\n");
i2c_drv->status |= STATUS_READ_IN_PROGRESS;
i2c_drv->rx_buf_len = len;
i2c_drv->rx_buf = buf;
return;
}
else
i2c_drv->status &= ~STATUS_READ_IN_PROGRESS;
}
if (len > 0)
{
PRINT_I2C_DBG("len > 0\n");
i2c_drv->status |= STATUS_READ_IN_PROGRESS;
i2c_drv->rx_buf_len = len;
i2c_drv->rx_buf = buf;
return;
}
else
i2c_drv->status &= ~STATUS_READ_IN_PROGRESS;
}
PRINT_I2C_DBG("%s end\n", __func__);
PRINT_I2C_DBG("%s end\n", __func__);
}
/*
@ -336,44 +336,44 @@ static void fh_i2c_interrupt(int this_irq, void *dev_id)
struct i2c_driver *i2c_drv = dev_id;
struct rt_i2c_bus_device *i2c_bus_dev = i2c_drv->i2c_bus_dev;
struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
rt_uint32_t stat;
rt_uint32_t stat;
stat = I2C_ClearAndGetInterrupts(i2c_obj);
PRINT_I2C_DBG("status: 0x%x, mask: 0x%x\n", stat, I2C_GetInterruptMask(i2c_obj));
stat = I2C_ClearAndGetInterrupts(i2c_obj);
PRINT_I2C_DBG("status: 0x%x, mask: 0x%x\n", stat, I2C_GetInterruptMask(i2c_obj));
if (stat & DW_IC_INTR_TX_ABRT)
{
PRINT_I2C_DBG("DW_IC_INTR_TX_ABRT\n");
i2c_drv->cmd_err |= DW_IC_ERR_TX_ABRT;
i2c_drv->status = STATUS_IDLE;
if (stat & DW_IC_INTR_TX_ABRT)
{
PRINT_I2C_DBG("DW_IC_INTR_TX_ABRT\n");
i2c_drv->cmd_err |= DW_IC_ERR_TX_ABRT;
i2c_drv->status = STATUS_IDLE;
/*
* Anytime TX_ABRT is set, the contents of the tx/rx
* buffers are flushed. Make sure to skip them.
*/
I2C_SetInterruptMask(i2c_obj, 0);
goto tx_aborted;
}
/*
* Anytime TX_ABRT is set, the contents of the tx/rx
* buffers are flushed. Make sure to skip them.
*/
I2C_SetInterruptMask(i2c_obj, 0);
goto tx_aborted;
}
if (stat & DW_IC_INTR_RX_FULL)
{
i2c_fh_read(i2c_bus_dev);
}
if (stat & DW_IC_INTR_RX_FULL)
{
i2c_fh_read(i2c_bus_dev);
}
if (stat & DW_IC_INTR_TX_EMPTY)
{
i2c_fh_xfer_msg(i2c_bus_dev);
}
if (stat & DW_IC_INTR_TX_EMPTY)
{
i2c_fh_xfer_msg(i2c_bus_dev);
}
/*
* No need to modify or disable the interrupt mask here.
* i2c_fh_xfer_msg() will take care of it according to
* the current transmit status.
*/
/*
* No need to modify or disable the interrupt mask here.
* i2c_fh_xfer_msg() will take care of it according to
* the current transmit status.
*/
tx_aborted:
if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || i2c_drv->msg_err)
rt_completion_done(&i2c_drv->transfer_completion);
if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || i2c_drv->msg_err)
rt_completion_done(&i2c_drv->transfer_completion);
}
@ -464,64 +464,64 @@ void rt_hw_i2c_init(void)
}
static rt_err_t fh_i2c_read_reg(struct rt_i2c_bus_device *fh81_i2c,
rt_uint16_t reg, rt_uint8_t *data) {
struct rt_i2c_msg msg[2];
rt_uint8_t send_buf[2];
rt_uint8_t recv_buf[1] = {0};
rt_uint16_t reg, rt_uint8_t *data) {
struct rt_i2c_msg msg[2];
rt_uint8_t send_buf[2];
rt_uint8_t recv_buf[1] = {0};
PRINT_I2C_DBG("%s start\n", __func__);
PRINT_I2C_DBG("%s start\n", __func__);
// send_buf[0] = ((reg >> 8) & 0xff);
send_buf[0] = (reg & 0xFF);
// send_buf[0] = ((reg >> 8) & 0xff);
send_buf[0] = (reg & 0xFF);
msg[0].addr = 0x51;
msg[0].flags = RT_I2C_WR;
msg[0].len = 1;
msg[0].buf = send_buf;
msg[0].addr = 0x51;
msg[0].flags = RT_I2C_WR;
msg[0].len = 1;
msg[0].buf = send_buf;
msg[1].addr = 0x51;
msg[1].flags = RT_I2C_RD;
msg[1].len = 1;
msg[1].buf = recv_buf;
msg[1].addr = 0x51;
msg[1].flags = RT_I2C_RD;
msg[1].len = 1;
msg[1].buf = recv_buf;
rt_i2c_transfer(fh81_i2c, msg, 2);
*data = recv_buf[0];
return RT_EOK;
rt_i2c_transfer(fh81_i2c, msg, 2);
*data = recv_buf[0];
return RT_EOK;
}
static rt_err_t fh_i2c_write_reg(struct rt_i2c_bus_device *fh81_i2c,
rt_uint16_t reg, rt_uint8_t data) {
struct rt_i2c_msg msg;
rt_uint8_t send_buf[3];
rt_uint16_t reg, rt_uint8_t data) {
struct rt_i2c_msg msg;
rt_uint8_t send_buf[3];
PRINT_I2C_DBG("%s start\n", __func__);
PRINT_I2C_DBG("%s start\n", __func__);
// send_buf[0] = ((reg >> 8) & 0xff);
send_buf[1] = (reg & 0xFF);
send_buf[2] = data;
// send_buf[0] = ((reg >> 8) & 0xff);
send_buf[1] = (reg & 0xFF);
send_buf[2] = data;
msg.addr = 0x51;
msg.flags = RT_I2C_WR;
msg.len = 2;
msg.buf = send_buf;
msg.addr = 0x51;
msg.flags = RT_I2C_WR;
msg.len = 2;
msg.buf = send_buf;
rt_i2c_transfer(fh81_i2c, &msg, 1);
PRINT_I2C_DBG("%s end\n", __func__);
return RT_EOK;
rt_i2c_transfer(fh81_i2c, &msg, 1);
PRINT_I2C_DBG("%s end\n", __func__);
return RT_EOK;
}
void i2c_test_sensor() {
struct rt_i2c_bus_device *fh81_i2c;
struct rt_i2c_msg msg[2];
rt_uint8_t data[1] = { 0x00 };
struct rt_i2c_bus_device *fh81_i2c;
struct rt_i2c_msg msg[2];
rt_uint8_t data[1] = { 0x00 };
fh81_i2c = rt_i2c_bus_device_find("i2c1");
fh81_i2c = rt_i2c_bus_device_find("i2c1");
fh_i2c_write_reg(fh81_i2c, 0x04, 0x02);
fh_i2c_write_reg(fh81_i2c, 0x04, 0x02);
fh_i2c_read_reg(fh81_i2c, 0x02, data);
fh_i2c_read_reg(fh81_i2c, 0x02, data);
rt_kprintf("data read from 0x3038 is 0x%x\r\n", data[0]);
PRINT_I2C_DBG("%s end\n", __func__);
rt_kprintf("data read from 0x3038 is 0x%x\r\n", data[0]);
PRINT_I2C_DBG("%s end\n", __func__);
}
#ifdef RT_USING_FINSH
#include <finsh.h>

6
bsp/fh8620/drivers/i2c.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes

38
bsp/fh8620/drivers/interrupt.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -105,10 +105,10 @@ void rt_hw_interrupt_init(void)
{
rt_int32_t i;
register rt_uint32_t idx;
fh_intc *p = (fh_intc *)INTC_REG_BASE;
fh_intc *p = (fh_intc *)INTC_REG_BASE;
ictl_close_all_isr(p);
ictl_close_all_isr(p);
/* init exceptions table */
for(idx=0; idx < MAX_HANDLERS; idx++)
{
@ -137,27 +137,27 @@ void rt_hw_interrupt_init(void)
void rt_hw_interrupt_mask(int irq)
{
fh_intc *p = (fh_intc *)INTC_REG_BASE;
fh_intc *p = (fh_intc *)INTC_REG_BASE;
/* Disable irq on AIC */
ictl_mask_isr(p,irq);
ictl_mask_isr(p,irq);
// if (irq < 32)
// p->IRQ_EN_L &= ~(1 << irq);
// else
// p->IRQ_EN_H &= ~(1 << (irq - 32));
// if (irq < 32)
// p->IRQ_EN_L &= ~(1 << irq);
// else
// p->IRQ_EN_H &= ~(1 << (irq - 32));
}
void rt_hw_interrupt_umask(int irq)
{
fh_intc *p = (fh_intc *)INTC_REG_BASE;
fh_intc *p = (fh_intc *)INTC_REG_BASE;
/* Enable irq on AIC */
ictl_unmask_isr(p,irq);
ictl_unmask_isr(p,irq);
// if (irq < 32)
// p->IRQ_EN_L |= 1 << irq;
// else
// p->IRQ_EN_H |= 1 << (irq - 32);
// p->IRQ_EN_L |= 1 << irq;
// else
// p->IRQ_EN_H |= 1 << (irq - 32);
}
/**
@ -168,7 +168,7 @@ void rt_hw_interrupt_umask(int irq)
* @param name the interrupt name
* @return old handler
*/
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
void *param, const char *name)
{
rt_isr_handler_t old_handler = RT_NULL;
@ -182,7 +182,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
irq_desc[vector].param = param;
#ifdef RT_USING_INTERRUPT_INFO
rt_snprintf(irq_desc[vector].name, RT_NAME_MAX - 1, "%s", name);
irq_desc[vector].counter = 0;
irq_desc[vector].counter = 0;
#endif
}
}
@ -195,7 +195,7 @@ void list_irq(void)
{
#ifdef RT_USING_INTERRUPT_INFO
int irq;
int irq;
rt_kprintf("number\tcount\tname\n");
for (irq = 0; irq < MAX_HANDLERS; irq++)
{

8
bsp/fh8620/drivers/interrupt.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -35,6 +35,6 @@ void rt_hw_interrupt_init(void);
void rt_hw_interrupt_mask(int irq);
void rt_hw_interrupt_umask(int irq);
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
void *param, const char *name);
void *param, const char *name);
#endif /* INTERRUPT_H_ */

66
bsp/fh8620/drivers/mem_process.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -28,52 +28,52 @@
#include <rtdevice.h>
#include "mmu.h"
#define CHANGLINE_SIZE (1)
#define CHANGLINE_SIZE (1)
//#define FH_DBG_MEM_PROCESS
#ifdef FH_DBG_MEM_PROCESS
void mem_input(rt_uint32_t t_addr, rt_uint32_t t_size, rt_uint8_t t_value) {
rt_kprintf("mem process add:%x \tsize:%x\tvalue:%x\n", t_addr, t_size,
t_value);
rt_kprintf("mem process add:%x \tsize:%x\tvalue:%x\n", t_addr, t_size,
t_value);
rt_memset((void *) t_addr, t_value, t_size);
rt_memset((void *) t_addr, t_value, t_size);
mmu_clean_invalidated_dcache(t_addr, t_size);
mmu_clean_invalidated_dcache(t_addr, t_size);
}
void mem_output(rt_uint32_t t_addr, rt_uint32_t t_size) {
rt_uint32_t i;
rt_uint32_t cnt = 0;
rt_uint32_t value;
rt_uint32_t addr, size;
rt_uint32_t i;
rt_uint32_t cnt = 0;
rt_uint32_t value;
rt_uint32_t addr, size;
addr = t_addr;
if (t_size % 4) {
rt_kprintf("mem must be alligned\n");
}
size = t_size / 4;
rt_int32_t *p = (rt_uint32_t *) t_addr;
addr = t_addr;
if (t_size % 4) {
rt_kprintf("mem must be alligned\n");
}
size = t_size / 4;
rt_int32_t *p = (rt_uint32_t *) t_addr;
//mmu_clean_invalidated_dcache(addr,t_size);
rt_kprintf("mem process add:0x%x \tsize:0x%x\n", addr, t_size);
rt_kprintf("0x%08x:", addr);
for (i = 0; i < size; i++) {
value = *p++;
if ((cnt / CHANGLINE_SIZE) && (cnt % CHANGLINE_SIZE == 0)) {
rt_kprintf("\n");
}
if (cnt / CHANGLINE_SIZE && (cnt % CHANGLINE_SIZE) == 0) {
rt_kprintf("0x%08x:", addr + i * 4);
}
rt_kprintf("\t%08x", value);
cnt++;
//mmu_clean_invalidated_dcache(addr,t_size);
rt_kprintf("mem process add:0x%x \tsize:0x%x\n", addr, t_size);
rt_kprintf("0x%08x:", addr);
for (i = 0; i < size; i++) {
value = *p++;
if ((cnt / CHANGLINE_SIZE) && (cnt % CHANGLINE_SIZE == 0)) {
rt_kprintf("\n");
}
if (cnt / CHANGLINE_SIZE && (cnt % CHANGLINE_SIZE) == 0) {
rt_kprintf("0x%08x:", addr + i * 4);
}
rt_kprintf("\t%08x", value);
cnt++;
}
rt_kprintf("\n");
}
rt_kprintf("\n");
}
#endif

6
bsp/fh8620/drivers/mmc.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes

6
bsp/fh8620/drivers/mmc.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes

8
bsp/fh8620/drivers/pwm.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -193,7 +193,7 @@ int fh_pwm_probe(void *priv_data)
rt_kprintf("ERROR: %s rt_device calloc failed\n", __func__);
return -RT_ENOMEM;
}
pwm_dev->user_data = &pwm_drv;
pwm_dev->open =fh_pwm_open;
pwm_dev->close = fh_pwm_close;

8
bsp/fh8620/drivers/pwm.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef PWM_H_
#define PWM_H_

320
bsp/fh8620/drivers/sadc.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -50,123 +50,123 @@
#define __raw_writeb(v,a) ( *(volatile unsigned char *)(a) = (v))
#define __raw_writew(v,a) ( *(volatile unsigned short *)(a) = (v))
#define __raw_writel(v,a) ( *(volatile unsigned int *)(a) = (v))
#define __raw_writeb(v,a) ( *(volatile unsigned char *)(a) = (v))
#define __raw_writew(v,a) ( *(volatile unsigned short *)(a) = (v))
#define __raw_writel(v,a) ( *(volatile unsigned int *)(a) = (v))
#define __raw_readb(a) ( *(volatile unsigned char *)(a))
#define __raw_readw(a) ( *(volatile unsigned short *)(a))
#define __raw_readl(a) ( *(volatile unsigned int *)(a))
#define __raw_readb(a) ( *(volatile unsigned char *)(a))
#define __raw_readw(a) ( *(volatile unsigned short *)(a))
#define __raw_readl(a) ( *(volatile unsigned int *)(a))
#define wrap_readl(wrap, name) \
__raw_readl(&(((struct wrap_sadc_reg *)wrap->regs)->name))
__raw_readl(&(((struct wrap_sadc_reg *)wrap->regs)->name))
#define wrap_writel(wrap, name, val) \
__raw_writel((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
__raw_writel((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
#define wrap_readw(wrap, name) \
__raw_readw(&(((struct wrap_sadc_reg *)wrap->regs)->name))
__raw_readw(&(((struct wrap_sadc_reg *)wrap->regs)->name))
#define wrap_writew(wrap, name, val) \
__raw_writew((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
__raw_writew((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
#define wrap_readb(wrap, name) \
__raw_readb(&(((struct wrap_sadc_reg *)wrap->regs)->name))
__raw_readb(&(((struct wrap_sadc_reg *)wrap->regs)->name))
#define wrap_writeb(wrap, name, val) \
__raw_writeb((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
__raw_writeb((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
#define IOCTL_GET_SADC_DATA 1
#define IOCTL_SADC_POWER_DOWN 0xff
#define SADC_WRAP_BASE (0xf1200000)
#define SADC_IRQn (23)
#define SADC_MAX_CONTROLLER (1)
#define SADC_STATUS_COLESD (0)
#define SADC_STATUS_OPEN (1)
#define IOCTL_GET_SADC_DATA 1
#define IOCTL_SADC_POWER_DOWN 0xff
#define SADC_WRAP_BASE (0xf1200000)
#define SADC_IRQn (23)
#define SADC_MAX_CONTROLLER (1)
#define SADC_STATUS_COLESD (0)
#define SADC_STATUS_OPEN (1)
rt_err_t fh_sadc_isr_read_data(struct wrap_sadc_obj *sadc, rt_uint32_t channel,
rt_uint16_t *buf) {
rt_uint32_t xainsel = 1 << channel;
rt_uint32_t xversel = 0;
rt_uint32_t xpwdb = 1;
//cnt
rt_uint32_t sel2sam_pre_cnt = 2;
rt_uint32_t sam_cnt = 2;
rt_uint32_t sam2sel_pos_cnt = 2;
//time out
rt_uint32_t eoc_tos = 0xff;
rt_uint32_t eoc_toe = 0xff;
rt_uint32_t time_out = 0xffff;
//set isr en..
rt_uint32_t sadc_isr = 0x01;
//start
rt_uint32_t sadc_cmd = 0x01;
//get data
rt_uint32_t temp_data = 0;
rt_err_t ret;
rt_uint16_t *buf) {
rt_uint32_t xainsel = 1 << channel;
rt_uint32_t xversel = 0;
rt_uint32_t xpwdb = 1;
//cnt
rt_uint32_t sel2sam_pre_cnt = 2;
rt_uint32_t sam_cnt = 2;
rt_uint32_t sam2sel_pos_cnt = 2;
//time out
rt_uint32_t eoc_tos = 0xff;
rt_uint32_t eoc_toe = 0xff;
rt_uint32_t time_out = 0xffff;
//set isr en..
rt_uint32_t sadc_isr = 0x01;
//start
rt_uint32_t sadc_cmd = 0x01;
//get data
rt_uint32_t temp_data = 0;
rt_err_t ret;
//control...
wrap_writel(sadc, sadc_control, xainsel | (xversel << 8) | (xpwdb << 12));
//control...
wrap_writel(sadc, sadc_control, xainsel | (xversel << 8) | (xpwdb << 12));
wrap_writel(sadc, sadc_cnt,
sel2sam_pre_cnt | (sam_cnt << 8) | (sam2sel_pos_cnt << 16));
wrap_writel(sadc, sadc_cnt,
sel2sam_pre_cnt | (sam_cnt << 8) | (sam2sel_pos_cnt << 16));
wrap_writel(sadc, sadc_timeout,
eoc_tos | (eoc_toe << 8) | (time_out << 16));
wrap_writel(sadc, sadc_timeout,
eoc_tos | (eoc_toe << 8) | (time_out << 16));
wrap_writel(sadc, sadc_ier, sadc_isr);
wrap_writel(sadc, sadc_ier, sadc_isr);
wrap_writel(sadc, sadc_cmd, sadc_cmd);
wrap_writel(sadc, sadc_cmd, sadc_cmd);
// ret = rt_completion_wait(&sadc->completion, RT_TICK_PER_SECOND / 2);
ret = rt_sem_take(&sadc->completion, 5000);
if(ret != RT_EOK)
return ret;
ret = rt_sem_take(&sadc->completion, 5000);
if(ret != RT_EOK)
return ret;
switch (channel) {
case 0:
case 1:
//read channel 0 1
temp_data = wrap_readl(sadc, sadc_dout0);
break;
switch (channel) {
case 0:
case 1:
//read channel 0 1
temp_data = wrap_readl(sadc, sadc_dout0);
break;
case 2:
case 3:
//read channel 2 3
temp_data = wrap_readl(sadc, sadc_dout1);
break;
case 2:
case 3:
//read channel 2 3
temp_data = wrap_readl(sadc, sadc_dout1);
break;
case 4:
case 5:
//read channel 4 5
temp_data = wrap_readl(sadc, sadc_dout2);
break;
case 4:
case 5:
//read channel 4 5
temp_data = wrap_readl(sadc, sadc_dout2);
break;
case 6:
case 7:
//read channel 6 7
temp_data = wrap_readl(sadc, sadc_dout3);
break;
default:
break;
}
if (channel % 2) {
//read low 16bit
*buf = (rt_uint16_t) (temp_data & 0xffff);
} else {
//read high 16bit
*buf = (rt_uint16_t) (temp_data >> 16);
}
return RT_EOK;
case 6:
case 7:
//read channel 6 7
temp_data = wrap_readl(sadc, sadc_dout3);
break;
default:
break;
}
if (channel % 2) {
//read low 16bit
*buf = (rt_uint16_t) (temp_data & 0xffff);
} else {
//read high 16bit
*buf = (rt_uint16_t) (temp_data >> 16);
}
return RT_EOK;
}
@ -204,41 +204,41 @@ static rt_err_t fh_sadc_close(rt_device_t dev)
static rt_err_t fh_sadc_ioctl(rt_device_t dev, int cmd, void *arg)
{
rt_uint32_t control_reg;
struct wrap_sadc_obj *sadc_pri =(struct wrap_sadc_obj *)dev->user_data;
rt_uint32_t ad_data;
rt_uint16_t ad_raw_data;
rt_uint32_t control_reg;
struct wrap_sadc_obj *sadc_pri =(struct wrap_sadc_obj *)dev->user_data;
rt_uint32_t ad_data;
rt_uint16_t ad_raw_data;
SADC_INFO *sadc_info = (SADC_INFO *)arg;
rt_err_t ret;
switch(cmd){
case SADC_CMD_READ_RAW_DATA:
ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data);
if(ret != RT_EOK)
return ret;
sadc_info->sadc_data = ad_raw_data;
SADC_INFO *sadc_info = (SADC_INFO *)arg;
rt_err_t ret;
switch(cmd){
case SADC_CMD_READ_RAW_DATA:
ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data);
if(ret != RT_EOK)
return ret;
sadc_info->sadc_data = ad_raw_data;
break;
case SADC_CMD_READ_VOLT:
ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data);
if(ret != RT_EOK)
return ret;
break;
case SADC_CMD_READ_VOLT:
ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data);
if(ret != RT_EOK)
return ret;
ad_data = ad_raw_data * SADC_REF;
ad_data /= SADC_MAX_AD_VALUE;
sadc_info->sadc_data = ad_data;
ad_data = ad_raw_data * SADC_REF;
ad_data /= SADC_MAX_AD_VALUE;
sadc_info->sadc_data = ad_data;
break;
case SADC_CMD_DISABLE:
control_reg = wrap_readl(sadc_pri, sadc_control);
control_reg &= ~(1 << 12);
wrap_writel(sadc_pri, sadc_control, control_reg);
break;
case SADC_CMD_DISABLE:
control_reg = wrap_readl(sadc_pri, sadc_control);
control_reg &= ~(1 << 12);
wrap_writel(sadc_pri, sadc_control, control_reg);
break;
default :
rt_kprintf("wrong para...\n");
return RT_EIO;
}
break;
default :
rt_kprintf("wrong para...\n");
return RT_EIO;
}
return RT_EOK;
}
@ -249,25 +249,25 @@ static void fh_sadc_interrupt(int irq, void *param)
{
rt_uint32_t isr_status;
struct wrap_sadc_obj *sadc = (struct wrap_sadc_obj *) param;
struct wrap_sadc_obj *sadc = (struct wrap_sadc_obj *) param;
isr_status = wrap_readl(sadc, sadc_int_status);
isr_status = wrap_readl(sadc, sadc_int_status);
if (isr_status & 0x01) {
//close isr
rt_uint32_t sadc_isr = 0x00;
if (isr_status & 0x01) {
//close isr
rt_uint32_t sadc_isr = 0x00;
wrap_writel(sadc, sadc_ier, sadc_isr);
//clear status..
wrap_writel(sadc, sadc_ier, sadc_isr);
//clear status..
wrap_writel(sadc, sadc_int_status, isr_status);
wrap_writel(sadc, sadc_int_status, isr_status);
rt_sem_release(&sadc->completion);
// rt_completion_done(&sadc->completion);
} else {
//add error handle process
rt_kprintf("sadc maybe error!\n");
}
rt_sem_release(&sadc->completion);
// rt_completion_done(&sadc->completion);
} else {
//add error handle process
rt_kprintf("sadc maybe error!\n");
}
}
@ -282,13 +282,13 @@ int fh_sadc_probe(void *priv_data)
//caution this is a read only data...if the driver want to use.malloc and copy it..
struct wrap_sadc_obj *sadc_obj = (struct wrap_sadc_obj *)priv_data;
if(sadc_obj->init_flag == SADC_INIT_ALREADY)
return RT_EFULL;
return RT_EFULL;
//malloc a rt device..
sadc_dev = RT_KERNEL_MALLOC(sizeof(struct rt_device));
if(!sadc_dev){
return RT_ENOMEM;
return RT_ENOMEM;
}
rt_memset(sadc_dev, 0, sizeof(struct rt_device));
PRINT_SADC_DBG("id:%d,\treg:%x,\tirq:%d\n",sadc_obj->id,(rt_uint32_t)sadc_obj->regs,sadc_obj->irq_no);
@ -304,8 +304,8 @@ int fh_sadc_probe(void *priv_data)
struct wrap_sadc_obj *sadc_pri = RT_KERNEL_MALLOC(sizeof(struct wrap_sadc_obj));
if(!sadc_pri){
RT_KERNEL_FREE(sadc_dev);
return RT_ENOMEM;
RT_KERNEL_FREE(sadc_dev);
return RT_ENOMEM;
}
//copy platform data to pri data..
@ -349,23 +349,23 @@ int fh_sadc_probe(void *priv_data)
int fh_sadc_exit(void *priv_data)
{
PRINT_SADC_DBG("%s\n",__func__);
struct wrap_sadc_obj *sadc_obj = (struct wrap_sadc_obj *)priv_data;
PRINT_SADC_DBG("%s\n",__func__);
struct wrap_sadc_obj *sadc_obj = (struct wrap_sadc_obj *)priv_data;
struct wrap_sadc_obj *sadc_pri = sadc_obj->rt_dev->user_data;
//release sem;
rt_sem_detach(&sadc_pri->completion);
//sadc_pri->completion = RT_NULL;
struct wrap_sadc_obj *sadc_pri = sadc_obj->rt_dev->user_data;
//release sem;
rt_sem_detach(&sadc_pri->completion);
//sadc_pri->completion = RT_NULL;
//release lock;
rt_mutex_detach(&sadc_pri->lock);
//release lock;
rt_mutex_detach(&sadc_pri->lock);
RT_KERNEL_FREE(sadc_obj->rt_dev->user_data);
RT_KERNEL_FREE(sadc_obj->rt_dev->user_data);
sadc_obj->rt_dev->user_data = RT_NULL;
RT_KERNEL_FREE(sadc_obj->rt_dev);
sadc_obj->rt_dev = RT_NULL;
sadc_obj->rt_dev->user_data = RT_NULL;
RT_KERNEL_FREE(sadc_obj->rt_dev);
sadc_obj->rt_dev = RT_NULL;
return 0;
}
@ -386,23 +386,23 @@ void rt_hw_sadc_init(void)
#ifdef FH_TEST_SADC
int fh_sadc_test(void){
rt_device_t sadc_dev;
SADC_INFO info;
info.channel = 0;
info.sadc_data = 0;
sadc_dev = rt_device_find("sadc");
if(!sadc_dev){
rt_kprintf("cann't find the sadc dev\n");
}
sadc_dev->init(sadc_dev);
sadc_dev->open(sadc_dev,0);
while(1)
{
sadc_dev->control(sadc_dev,SADC_CMD_READ_VOLT,&info);
rt_kprintf("channel:%d,volt:%dmv\n",info.channel,info.sadc_data);
}
rt_device_t sadc_dev;
SADC_INFO info;
info.channel = 0;
info.sadc_data = 0;
sadc_dev = rt_device_find("sadc");
if(!sadc_dev){
rt_kprintf("cann't find the sadc dev\n");
}
sadc_dev->init(sadc_dev);
sadc_dev->open(sadc_dev,0);
while(1)
{
sadc_dev->control(sadc_dev,SADC_CMD_READ_VOLT,&info);
rt_kprintf("channel:%d,volt:%dmv\n",info.channel,info.sadc_data);
}
return 0;
return 0;
}
#endif

86
bsp/fh8620/drivers/sadc.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef SADC_H_
#define SADC_H_
@ -33,57 +33,57 @@
/****************************************************************************
* #define section
* add constant #define here if any
* add constant #define here if any
***************************************************************************/
//#define FH_SADC_PROC_FILE "driver/sadc"
#define MAX_CHANNEL_NO (8)
#define SADC_REF (3300)
#define SADC_MAX_AD_VALUE (0x3ff)
#define LOOP_MODE (0x55)
#define ISR_MODE (0xAA)
#define MAX_CHANNEL_NO (8)
#define SADC_REF (3300)
#define SADC_MAX_AD_VALUE (0x3ff)
#define LOOP_MODE (0x55)
#define ISR_MODE (0xAA)
#define SADC_INIT_ALREADY (0x33)
#define SADC_INIT_NOT_YET (0)
#define SADC_INIT_ALREADY (0x33)
#define SADC_INIT_NOT_YET (0)
#define SADC_CMD_READ_RAW_DATA (0x22)
#define SADC_CMD_READ_VOLT (0x33)
#define SADC_CMD_DISABLE (0x44)
#define SADC_CMD_READ_RAW_DATA (0x22)
#define SADC_CMD_READ_VOLT (0x33)
#define SADC_CMD_DISABLE (0x44)
/****************************************************************************
* ADT section
* add Abstract Data Type definition here
* add Abstract Data Type definition here
***************************************************************************/
struct wrap_sadc_reg {
rt_uint32_t sadc_cmd;
rt_uint32_t sadc_control;
rt_uint32_t sadc_ier;
rt_uint32_t sadc_int_status;
rt_uint32_t sadc_dout0;
rt_uint32_t sadc_dout1;
rt_uint32_t sadc_dout2;
rt_uint32_t sadc_dout3;
rt_uint32_t sadc_debuge0;
rt_uint32_t sadc_status;
rt_uint32_t sadc_cnt;
rt_uint32_t sadc_timeout;
rt_uint32_t sadc_cmd;
rt_uint32_t sadc_control;
rt_uint32_t sadc_ier;
rt_uint32_t sadc_int_status;
rt_uint32_t sadc_dout0;
rt_uint32_t sadc_dout1;
rt_uint32_t sadc_dout2;
rt_uint32_t sadc_dout3;
rt_uint32_t sadc_debuge0;
rt_uint32_t sadc_status;
rt_uint32_t sadc_cnt;
rt_uint32_t sadc_timeout;
};
struct wrap_sadc_obj {
rt_uint32_t id;
void *regs;
rt_uint32_t irq_no;
rt_uint32_t init_flag;
rt_uint32_t active_channel_no;
rt_uint32_t active_channel_status;
rt_uint16_t channel_data[MAX_CHANNEL_NO];
rt_uint32_t error_rec;
rt_uint32_t en_isr;
rt_uint32_t sample_mode;
struct rt_mutex lock;
struct rt_semaphore completion;
rt_uint32_t id;
void *regs;
rt_uint32_t irq_no;
rt_uint32_t init_flag;
rt_uint32_t active_channel_no;
rt_uint32_t active_channel_status;
rt_uint16_t channel_data[MAX_CHANNEL_NO];
rt_uint32_t error_rec;
rt_uint32_t en_isr;
rt_uint32_t sample_mode;
struct rt_mutex lock;
struct rt_semaphore completion;
//bind to the rtdev..
rt_device_t rt_dev;
@ -91,8 +91,8 @@ struct wrap_sadc_obj {
};
typedef struct{
rt_uint32_t channel;
rt_uint32_t sadc_data;
rt_uint32_t channel;
rt_uint32_t sadc_data;
}SADC_INFO;
@ -102,7 +102,7 @@ typedef struct{
/****************************************************************************
* section
* add function prototype here if any
* add function prototype here if any
***************************************************************************/
void rt_hw_sadc_init(void);
#endif

126
bsp/fh8620/drivers/spi_fh_adapt.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*
* spi_fh_adapt.c
*
@ -60,9 +60,9 @@
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#define WX_MANU_ID 0xEF
#define WX_MANU_ID 0xEF
#define AT_MANU_ID 0x1F /* atmel */
#define SST_MANU_ID 0xBF
#define SST_MANU_ID 0xBF
#define GD_MANU_ID 0xC8
@ -70,50 +70,50 @@
#define SPI_ADAPT_DEBUG
#ifdef SPI_ADAPT_DEBUG
#define CMD_JEDEC_ID 0x9f
#define CMD_JEDEC_ID 0x9f
#define FH_SPI_ADAPT_DEBUG(fmt, args...) \
rt_kprintf(fmt,##args);
#define FH_SPI_ADAPT_DEBUG(fmt, args...) \
rt_kprintf(fmt,##args);
#else
#define FH_SPI_ADAPT_DEBUG(fmt, args...)
#endif
struct fh_flash_id{
unsigned char id;
rt_err_t (*fh_flash_init)(struct flash_platform_data *plat_flash);
char *name;
unsigned char id;
rt_err_t (*fh_flash_init)(struct flash_platform_data *plat_flash);
char *name;
};
const struct fh_flash_id id_map[] = {
#ifdef RT_USING_W25QXX
WX_MANU_ID,w25qxx_init,"winbond",
WX_MANU_ID,w25qxx_init,"winbond",
#endif
#ifdef RT_USING_AT45DBXX
AT_MANU_ID,at45dbxx_init,"atmel",
AT_MANU_ID,at45dbxx_init,"atmel",
#endif
#ifdef RT_USING_SST25VFXX
SST_MANU_ID,sst25vfxx_init,"SST",
SST_MANU_ID,sst25vfxx_init,"SST",
#endif
#ifdef RT_USING_GD
GD_MANU_ID,gd_init,"GD",
GD_MANU_ID,gd_init,"GD",
#endif
};
struct fh_flash_id * fh_flash_check_id_map(unsigned char id){
struct fh_flash_id *p_map = RT_NULL;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(id_map); i++) {
p_map = (struct fh_flash_id *)&id_map[i];
if (p_map->id == id){
return p_map;
}
}
return RT_NULL;
struct fh_flash_id *p_map = RT_NULL;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(id_map); i++) {
p_map = (struct fh_flash_id *)&id_map[i];
if (p_map->id == id){
return p_map;
}
}
return RT_NULL;
}
@ -144,50 +144,50 @@ int fh_flash_adapt_probe(void *priv_data)
/* init flash */
rt_uint8_t cmd;
rt_uint8_t id_recv[3];
uint16_t memory_type_capacity;
rt_err_t ret;
rt_uint8_t cmd;
rt_uint8_t id_recv[3];
uint16_t memory_type_capacity;
rt_err_t ret;
cmd = 0xFF; /* reset SPI FLASH, cancel all cmd in processing. */
rt_spi_send(rt_spi_device, &cmd, 1);
/* read flash id */
cmd = CMD_JEDEC_ID;
rt_spi_send_then_recv(rt_spi_device, &cmd, 1, id_recv, 3);
cmd = 0xFF; /* reset SPI FLASH, cancel all cmd in processing. */
rt_spi_send(rt_spi_device, &cmd, 1);
/* read flash id */
cmd = CMD_JEDEC_ID;
rt_spi_send_then_recv(rt_spi_device, &cmd, 1, id_recv, 3);
//if the flash is already connect.
if(id_recv[0] != 0xff){
flash_model =fh_flash_check_id_map(id_recv[0]);
if(flash_model){
ret = flash_model->fh_flash_init(plat_flash);
if(ret != RT_EOK){
rt_kprintf("flash:%s init error\n",flash_model->name);
rt_kprintf("use default flash ops..\n");
//flash_model->fh_flash_adapt_init =flash_default_init;
ret = flash_default_init(plat_flash);
}
}
else{
rt_kprintf(
"use default flash ops...\nunrecognized flash id is :%02X %02X %02X\n",
id_recv[0], id_recv[1], id_recv[2]);
ret = flash_default_init(plat_flash);
//if the flash is already connect.
if(id_recv[0] != 0xff){
flash_model =fh_flash_check_id_map(id_recv[0]);
if(flash_model){
ret = flash_model->fh_flash_init(plat_flash);
if(ret != RT_EOK){
rt_kprintf("flash:%s init error\n",flash_model->name);
rt_kprintf("use default flash ops..\n");
//flash_model->fh_flash_adapt_init =flash_default_init;
ret = flash_default_init(plat_flash);
}
}
else{
rt_kprintf(
"use default flash ops...\nunrecognized flash id is :%02X %02X %02X\n",
id_recv[0], id_recv[1], id_recv[2]);
ret = flash_default_init(plat_flash);
}
}
int i;
for(i=0; i<plat_flash->nr_parts; i++)
{
fh_spi_partition_register(plat_flash->flash_name, &plat_flash->parts[i]);
}
int i;
for(i=0; i<plat_flash->nr_parts; i++)
{
fh_spi_partition_register(plat_flash->flash_name, &plat_flash->parts[i]);
}
return ret;
return ret;
}
else{
rt_kprintf("please check if you connect the flash already...\n");
return RT_ENOSYS;
}
}
else{
rt_kprintf("please check if you connect the flash already...\n");
return RT_ENOSYS;
}
}

8
bsp/fh8620/drivers/spi_fh_adapt.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*
* spi_fh_adapt.h
*

858
bsp/fh8620/drivers/ssi.c
View File

File diff suppressed because it is too large Load Diff

96
bsp/fh8620/drivers/ssi.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef SSI_H_
#define SSI_H_
#include "libraries/inc/fh_driverlib.h"
@ -32,37 +32,37 @@
#include "fh_dma.h"
#define SPI_PRIV(drv) ( (struct fh_spi_obj)(drv->priv) )
#define FH_SPI_SLAVE_MAX_NO 2
#define FH_SPI_SLAVE_MAX_NO 2
struct spi_controller;
//platform use below
struct spi_slave_platform_data{
rt_uint32_t cs_pin;
#define ACTIVE_LOW 1
#define ACTIVE_HIGH 2
rt_uint32_t actice_level;
rt_uint32_t cs_pin;
#define ACTIVE_LOW 1
#define ACTIVE_HIGH 2
rt_uint32_t actice_level;
};
struct spi_control_platform_data{
rt_uint32_t id;
rt_uint32_t irq;
rt_uint32_t base;
rt_uint32_t max_hz;
rt_uint32_t slave_no;
rt_uint32_t clk_in;
//handshake no...
rt_uint32_t rx_hs_no;
rt_uint32_t tx_hs_no;
rt_uint32_t id;
rt_uint32_t irq;
rt_uint32_t base;
rt_uint32_t max_hz;
rt_uint32_t slave_no;
rt_uint32_t clk_in;
//handshake no...
rt_uint32_t rx_hs_no;
rt_uint32_t tx_hs_no;
char *dma_name;
//isr will be the default...
#define USE_ISR_TRANSFER 0
#define USE_DMA_TRANSFER 1
rt_uint32_t transfer_mode;
struct spi_controller *control;
struct spi_slave_platform_data plat_slave[FH_SPI_SLAVE_MAX_NO];
char *dma_name;
//isr will be the default...
#define USE_ISR_TRANSFER 0
#define USE_DMA_TRANSFER 1
rt_uint32_t transfer_mode;
struct spi_controller *control;
struct spi_slave_platform_data plat_slave[FH_SPI_SLAVE_MAX_NO];
};
@ -81,15 +81,15 @@ struct spi_slave_info
struct spi_dma
{
char *dma_name;
#define DMA_BIND_OK 0
#define DMA_BIND_ERROR 1
rt_uint32_t dma_flag;
char *dma_name;
#define DMA_BIND_OK 0
#define DMA_BIND_ERROR 1
rt_uint32_t dma_flag;
//bind to the dma dev..
rt_uint32_t rx_hs;
rt_uint32_t tx_hs;
rt_uint8_t *rx_dummy_buff;
rt_uint8_t *tx_dummy_buff;
rt_uint32_t rx_hs;
rt_uint32_t tx_hs;
rt_uint8_t *rx_dummy_buff;
rt_uint8_t *tx_dummy_buff;
struct rt_dma_device *dma_dev;
struct dma_transfer tx_trans;
struct dma_transfer rx_trans;
@ -98,28 +98,28 @@ struct spi_dma
struct spi_controller
{
rt_uint32_t id;
rt_uint32_t irq;
rt_uint32_t base;
rt_uint32_t max_hz;
rt_uint32_t slave_no;
rt_uint32_t clk_in;
//bind to the platform data....
struct spi_control_platform_data *plat_data;
rt_uint32_t id;
rt_uint32_t irq;
rt_uint32_t base;
rt_uint32_t max_hz;
rt_uint32_t slave_no;
rt_uint32_t clk_in;
//bind to the platform data....
struct spi_control_platform_data *plat_data;
//rt_uint32_t dma_xfer_flag;
//rt_uint32_t dma_xfer_flag;
#define XFER_USE_ISR 0
#define XFER_USE_DMA 1
rt_uint32_t xfer_mode;
#define XFER_USE_ISR 0
#define XFER_USE_DMA 1
rt_uint32_t xfer_mode;
struct spi_dma dma;
rt_uint32_t dma_complete_times;
struct spi_dma dma;
rt_uint32_t dma_complete_times;
struct rt_spi_bus spi_bus;
struct spi_slave_info *spi_slave;
struct rt_spi_message* current_message;
struct rt_completion transfer_completion;
struct rt_semaphore xfer_lock;
struct rt_semaphore xfer_lock;
struct fh_spi_obj obj;
rt_uint32_t received_len;
rt_uint32_t transfered_len;

118
bsp/fh8620/drivers/trap.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include <rthw.h>
#include <armv6.h>
#include "fh_arch.h"
@ -47,13 +47,13 @@ extern long list_thread(void);
void rt_hw_show_register (struct rt_hw_register *regs)
{
rt_kprintf("Execption:\n");
rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
rt_kprintf("Execption:\n");
rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
}
/**
@ -66,15 +66,15 @@ void rt_hw_show_register (struct rt_hw_register *regs)
*/
void rt_hw_trap_udef(struct rt_hw_register *regs)
{
rt_hw_show_register(regs);
rt_hw_show_register(regs);
rt_kprintf("undefined instruction\n");
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
rt_kprintf("undefined instruction\n");
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
#ifdef RT_USING_FINSH
list_thread();
list_thread();
#endif
rt_hw_cpu_shutdown();
rt_hw_cpu_shutdown();
}
/**
@ -88,10 +88,10 @@ void rt_hw_trap_udef(struct rt_hw_register *regs)
*/
void rt_hw_trap_swi(struct rt_hw_register *regs)
{
rt_hw_show_register(regs);
rt_hw_show_register(regs);
rt_kprintf("software interrupt\n");
rt_hw_cpu_shutdown();
rt_kprintf("software interrupt\n");
rt_hw_cpu_shutdown();
}
/**
@ -104,15 +104,15 @@ void rt_hw_trap_swi(struct rt_hw_register *regs)
*/
void rt_hw_trap_pabt(struct rt_hw_register *regs)
{
rt_hw_show_register(regs);
rt_hw_show_register(regs);
rt_kprintf("prefetch abort\n");
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
rt_kprintf("prefetch abort\n");
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
#ifdef RT_USING_FINSH
list_thread();
list_thread();
#endif
rt_hw_cpu_shutdown();
rt_hw_cpu_shutdown();
}
/**
@ -125,15 +125,15 @@ void rt_hw_trap_pabt(struct rt_hw_register *regs)
*/
void rt_hw_trap_dabt(struct rt_hw_register *regs)
{
rt_hw_show_register(regs);
rt_hw_show_register(regs);
rt_kprintf("data abort\n");
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
rt_kprintf("data abort\n");
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
#ifdef RT_USING_FINSH
list_thread();
list_thread();
#endif
rt_hw_cpu_shutdown();
rt_hw_cpu_shutdown();
}
/**
@ -145,45 +145,45 @@ void rt_hw_trap_dabt(struct rt_hw_register *regs)
*/
void rt_hw_trap_resv(struct rt_hw_register *regs)
{
rt_kprintf("not used\n");
rt_hw_show_register(regs);
rt_hw_cpu_shutdown();
rt_kprintf("not used\n");
rt_hw_show_register(regs);
rt_hw_cpu_shutdown();
}
extern struct rt_irq_desc irq_desc[];
void rt_hw_trap_irq()
{
rt_isr_handler_t isr_func;
rt_uint32_t irqstat_l, irqstat_h, irq;
void *param;
rt_isr_handler_t isr_func;
rt_uint32_t irqstat_l, irqstat_h, irq;
void *param;
fh_intc *p = (fh_intc *)INTC_REG_BASE;
fh_intc *p = (fh_intc *)INTC_REG_BASE;
irqstat_l = p->IRQ_FINALSTATUS_L;
irqstat_h = p->IRQ_FINALSTATUS_H;
if (irqstat_l)
{
irq = __rt_ffs(irqstat_l) - 1;
}
else if(irqstat_h)
{
irq = __rt_ffs(irqstat_h) - 1 + 32;
}
else
{
rt_kprintf("No interrupt occur\n");
return;
}
irqstat_l = p->IRQ_FINALSTATUS_L;
irqstat_h = p->IRQ_FINALSTATUS_H;
if (irqstat_l)
{
irq = __rt_ffs(irqstat_l) - 1;
}
else if(irqstat_h)
{
irq = __rt_ffs(irqstat_h) - 1 + 32;
}
else
{
rt_kprintf("No interrupt occur\n");
return;
}
/* get interrupt service routine */
isr_func = irq_desc[irq].handler;
param = irq_desc[irq].param;
/* get interrupt service routine */
isr_func = irq_desc[irq].handler;
param = irq_desc[irq].param;
/* turn to interrupt service routine */
if(isr_func){
isr_func(irq, param);
}
/* turn to interrupt service routine */
if(isr_func){
isr_func(irq, param);
}
#ifdef RT_USING_INTERRUPT_INFO
irq_desc[irq].counter ++;
#endif
@ -191,7 +191,7 @@ void rt_hw_trap_irq()
void rt_hw_trap_fiq()
{
rt_kprintf("fast interrupt request\n");
rt_kprintf("fast interrupt request\n");
}
/*@}*/

304
bsp/fh8620/drivers/uart.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include <board.h>
#include <rtdevice.h>
#include "fh_arch.h"
@ -32,35 +32,35 @@
void rt_fh_uart_handler(int vector, void *param)
{
int status;
unsigned int ret;
struct fh_uart *uart;
unsigned int reg_status;
rt_device_t dev = (rt_device_t)param;
uart = (struct fh_uart *)dev->user_data;
status = uart_get_iir_status(uart->uart_port);
if (status & UART_IIR_NOINT)
{
return;
}
if(status & UART_IIR_THREMPTY){
//first close tx isr
uart_disable_irq(uart->uart_port,UART_IER_ETBEI);
int status;
unsigned int ret;
struct fh_uart *uart;
unsigned int reg_status;
rt_device_t dev = (rt_device_t)param;
uart = (struct fh_uart *)dev->user_data;
status = uart_get_iir_status(uart->uart_port);
if (status & UART_IIR_NOINT)
{
return;
}
if(status & UART_IIR_THREMPTY){
//first close tx isr
uart_disable_irq(uart->uart_port,UART_IER_ETBEI);
rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_TX_DONE);
}
else if((status & UART_IIR_CHRTOUT)==UART_IIR_CHRTOUT){
//bug....
//if no data in rx fifo
reg_status = uart_get_status(uart->uart_port);
if((reg_status & 1<<3) == 0)
ret = uart_getc(uart->uart_port);
}
else{
rt_interrupt_enter();
rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_RX_IND);
rt_interrupt_leave();
}
rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_TX_DONE);
}
else if((status & UART_IIR_CHRTOUT)==UART_IIR_CHRTOUT){
//bug....
//if no data in rx fifo
reg_status = uart_get_status(uart->uart_port);
if((reg_status & 1<<3) == 0)
ret = uart_getc(uart->uart_port);
}
else{
rt_interrupt_enter();
rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_RX_IND);
rt_interrupt_leave();
}
}
/**
@ -69,67 +69,67 @@ void rt_fh_uart_handler(int vector, void *param)
static rt_err_t fh_uart_configure(struct rt_serial_device *serial,
struct serial_configure *cfg)
{
int div;
enum data_bits data_mode;
enum stop_bits stop_mode;
enum parity parity_mode;
struct fh_uart *uart;
int div;
enum data_bits data_mode;
enum stop_bits stop_mode;
enum parity parity_mode;
struct fh_uart *uart;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart = (struct fh_uart *)serial->parent.user_data;
uart = (struct fh_uart *)serial->parent.user_data;
switch (cfg->data_bits)
{
case DATA_BITS_8:
data_mode = UART_DATA_BIT8;
break;
case DATA_BITS_7:
data_mode = UART_DATA_BIT7;
break;
case DATA_BITS_6:
data_mode = UART_DATA_BIT6;
break;
case DATA_BITS_5:
data_mode = UART_DATA_BIT5;
break;
default:
data_mode = UART_DATA_BIT8;
break;
}
switch (cfg->data_bits)
{
case DATA_BITS_8:
data_mode = UART_DATA_BIT8;
break;
case DATA_BITS_7:
data_mode = UART_DATA_BIT7;
break;
case DATA_BITS_6:
data_mode = UART_DATA_BIT6;
break;
case DATA_BITS_5:
data_mode = UART_DATA_BIT5;
break;
default:
data_mode = UART_DATA_BIT8;
break;
}
switch (cfg->stop_bits)
{
case STOP_BITS_2:
stop_mode = UART_STOP_BIT2;
break;
case STOP_BITS_1:
default:
stop_mode = UART_STOP_BIT1;
break;
}
switch (cfg->stop_bits)
{
case STOP_BITS_2:
stop_mode = UART_STOP_BIT2;
break;
case STOP_BITS_1:
default:
stop_mode = UART_STOP_BIT1;
break;
}
switch (cfg->parity)
{
case PARITY_ODD:
parity_mode = UART_PARITY_ODD;
break;
case PARITY_EVEN:
parity_mode = UART_PARITY_EVEN;
break;
case PARITY_NONE:
default:
parity_mode = UART_PARITY_NONE;
break;
}
switch (cfg->parity)
{
case PARITY_ODD:
parity_mode = UART_PARITY_ODD;
break;
case PARITY_EVEN:
parity_mode = UART_PARITY_EVEN;
break;
case PARITY_NONE:
default:
parity_mode = UART_PARITY_NONE;
break;
}
uart_disable_irq(uart->uart_port, UART_IER_ERBFI);
uart_configure(uart->uart_port, data_mode,
stop_mode, parity_mode,
cfg->baud_rate, UART_CLOCK_FREQ);
uart_configure(uart->uart_port, data_mode,
stop_mode, parity_mode,
cfg->baud_rate, UART_CLOCK_FREQ);
uart_enable_irq(uart->uart_port, UART_IER_ERBFI);
uart_enable_irq(uart->uart_port, UART_IER_ERBFI);
return RT_EOK;
}
@ -146,13 +146,13 @@ static rt_err_t fh_uart_control(struct rt_serial_device *serial,
{
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
rt_hw_interrupt_mask(uart->irq);
uart_disable_irq(uart->uart_port,UART_IER_ERBFI);
rt_hw_interrupt_mask(uart->irq);
uart_disable_irq(uart->uart_port,UART_IER_ERBFI);
break;
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
rt_hw_interrupt_umask(uart->irq);
uart_enable_irq(uart->uart_port,UART_IER_ERBFI);
rt_hw_interrupt_umask(uart->irq);
uart_enable_irq(uart->uart_port,UART_IER_ERBFI);
break;
}
@ -161,33 +161,33 @@ static rt_err_t fh_uart_control(struct rt_serial_device *serial,
static int fh_uart_putc(struct rt_serial_device *serial, char c)
{
struct fh_uart *uart = serial->parent.user_data;
unsigned int ret;
ret = uart_get_status(uart->uart_port);
if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX){
//RT_DEVICE_FLAG_INT_TX
struct fh_uart *uart = serial->parent.user_data;
unsigned int ret;
ret = uart_get_status(uart->uart_port);
if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX){
//RT_DEVICE_FLAG_INT_TX
if(c == '\n'){
fh_uart_putc(serial,'\r');
}
if(ret & UART_USR_TFNF){
uart_putc(uart->uart_port, c);
return 1;
}
//open tx isr here..
uart_enable_irq(uart->uart_port,UART_IER_ETBEI);
return -1;
}
//poll mode
else{
if(c == '\n'){
fh_uart_putc(serial,'\r');
}
if(ret & UART_USR_TFNF){
uart_putc(uart->uart_port, c);
return 1;
}
//open tx isr here..
uart_enable_irq(uart->uart_port,UART_IER_ETBEI);
return -1;
}
//poll mode
else{
while(!(uart_get_status(uart->uart_port) & UART_USR_TFNF))
;
uart_putc(uart->uart_port, c);
return 1;
while(!(uart_get_status(uart->uart_port) & UART_USR_TFNF))
;
uart_putc(uart->uart_port, c);
return 1;
}
}
@ -196,16 +196,16 @@ static int fh_uart_putc(struct rt_serial_device *serial, char c)
static int fh_uart_getc(struct rt_serial_device *serial)
{
int result;
struct fh_uart *uart = serial->parent.user_data;
struct fh_uart *uart = serial->parent.user_data;
if (uart_is_rx_ready(uart->uart_port))
{
result = uart_getc(uart->uart_port);
}
else
{
result = -1;
}
if (uart_is_rx_ready(uart->uart_port))
{
result = uart_getc(uart->uart_port);
}
else
{
result = -1;
}
return result;
}
@ -222,8 +222,8 @@ static const struct rt_uart_ops fh_uart_ops =
#if defined(RT_USING_UART0)
static struct rt_serial_device serial0;
struct fh_uart uart0 = {
(uart *)UART0_REG_BASE,
UART0_IRQn
(uart *)UART0_REG_BASE,
UART0_IRQn
};
#endif
@ -231,8 +231,8 @@ struct fh_uart uart0 = {
#if defined(RT_USING_UART1)
static struct rt_serial_device serial1;
struct fh_uart uart1 = {
(uart *)UART1_REG_BASE,
UART1_IRQn
(uart *)UART1_REG_BASE,
UART1_IRQn
};
#endif
@ -245,45 +245,45 @@ struct fh_uart uart1 = {
*/
void rt_hw_uart_init(void)
{
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#if defined(RT_USING_UART0)
#if(0)
serial0.ops = &fh_uart_ops;
serial0.config = config;
serial0.ops = &fh_uart_ops;
serial0.config = config;
/* register vcom device */
rt_hw_serial_register(&serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_STANDALONE,
&uart0);
rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler,
(void *)&(serial0.parent), "UART0");
rt_hw_interrupt_umask(uart0.irq);
/* register vcom device */
rt_hw_serial_register(&serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_STANDALONE,
&uart0);
rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler,
(void *)&(serial0.parent), "UART0");
rt_hw_interrupt_umask(uart0.irq);
#endif
serial0.ops = &fh_uart_ops;
serial0.config = config;
serial0.ops = &fh_uart_ops;
serial0.config = config;
/* register vcom device */
rt_hw_serial_register(&serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM ,
&uart0);
rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler,
(void *)&(serial0.parent), "UART0");
rt_hw_interrupt_umask(uart0.irq);
/* register vcom device */
rt_hw_serial_register(&serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM ,
&uart0);
rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler,
(void *)&(serial0.parent), "UART0");
rt_hw_interrupt_umask(uart0.irq);
#endif
#if defined(RT_USING_UART1)
serial1.ops = &fh_uart_ops;
serial1.config = config;
serial1.ops = &fh_uart_ops;
serial1.config = config;
/* register vcom device */
rt_hw_serial_register(&serial1, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM ,
&uart1);
rt_hw_interrupt_install(uart1.irq, rt_fh_uart_handler,
(void *)&(serial1.parent), "UART1");
rt_hw_interrupt_umask(uart1.irq);
/* register vcom device */
rt_hw_serial_register(&serial1, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM ,
&uart1);
rt_hw_interrupt_install(uart1.irq, rt_fh_uart_handler,
(void *)&(serial1.parent), "UART1");
rt_hw_interrupt_umask(uart1.irq);
#endif

8
bsp/fh8620/drivers/uart.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef UART_H_
#define UART_H_

8
bsp/fh8620/drivers/wdt.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include "fh_def.h"
#include "wdt.h"
#include "interrupt.h"

8
bsp/fh8620/drivers/wdt.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef WDT_H_
#define WDT_H_

10
bsp/fh8620/libraries/driverlib/fh_gpio.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,10 +18,10 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/

8
bsp/fh8620/libraries/driverlib/fh_i2c.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include "inc/fh_driverlib.h"
int I2C_WaitMasterIdle(struct fh_i2c_obj *i2c_obj)

48
bsp/fh8620/libraries/driverlib/fh_ictl.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,25 +18,25 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include "inc/fh_driverlib.h"
void ictl_close_all_isr(fh_intc *p){
if(p){
//enable all interrupts
p->IRQ_EN_L = 0xffffffff;
p->IRQ_EN_H = 0xffffffff;
//mask all interrupts
p->IRQ_MASK_L = 0xffffffff;
p->IRQ_MASK_H = 0xffffffff;
}
if(p){
//enable all interrupts
p->IRQ_EN_L = 0xffffffff;
p->IRQ_EN_H = 0xffffffff;
//mask all interrupts
p->IRQ_MASK_L = 0xffffffff;
p->IRQ_MASK_H = 0xffffffff;
}
}
@ -44,13 +44,13 @@ void ictl_close_all_isr(fh_intc *p){
void ictl_mask_isr(fh_intc *p,int irq){
if(p){
if(p){
if (irq < 32)
p->IRQ_MASK_L |= (1 << irq);
else
p->IRQ_MASK_H |= (1 << (irq - 32));
}
if (irq < 32)
p->IRQ_MASK_L |= (1 << irq);
else
p->IRQ_MASK_H |= (1 << (irq - 32));
}
}
@ -58,12 +58,12 @@ void ictl_mask_isr(fh_intc *p,int irq){
void ictl_unmask_isr(fh_intc *p,int irq){
if(p){
if (irq < 32)
p->IRQ_MASK_L &= ~(1 << irq);
else
p->IRQ_MASK_H &= ~(1 << (irq - 32));
if(p){
if (irq < 32)
p->IRQ_MASK_L &= ~(1 << irq);
else
p->IRQ_MASK_H &= ~(1 << (irq - 32));
}
}
}

6
bsp/fh8620/libraries/driverlib/fh_mmc.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes

6
bsp/fh8620/libraries/driverlib/fh_pwm.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes

3096
bsp/fh8620/libraries/driverlib/fh_sdio.c
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File diff suppressed because it is too large Load Diff

6
bsp/fh8620/libraries/driverlib/fh_spi.c
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@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes

54
bsp/fh8620/libraries/driverlib/fh_timer.c
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@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*****************************************************************************
* Include Section
* add all #include here
@ -79,66 +79,66 @@
*****************************************************************************/
int timer_init(timer *tim)
{
tim->TIMER_CTRL_REG = 0;
tim->TIMER_CTRL_REG = 0;
}
int timer_set_mode(timer *tim, enum timer_mode mode)
{
switch (mode)
{
case TIMER_MODE_PERIODIC:
tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE;
break;
case TIMER_MODE_ONESHOT:
tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE;
break;
default:
rt_kprintf("Not support TIMER mode\n");
return -1;
break;
}
switch (mode)
{
case TIMER_MODE_PERIODIC:
tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE;
break;
case TIMER_MODE_ONESHOT:
tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE;
break;
default:
rt_kprintf("Not support TIMER mode\n");
return -1;
break;
}
return 0;
return 0;
}
void timer_set_period(timer *tim, UINT32 period, UINT32 clock)
{
tim->TIMER_LOAD_COUNT = clock/period;
tim->TIMER_LOAD_COUNT = clock/period;
}
void timer_enable(timer *tim)
{
tim->TIMER_CTRL_REG |= TIMER_CTRL_ENABLE;
tim->TIMER_CTRL_REG |= TIMER_CTRL_ENABLE;
}
void timer_disable(timer *tim)
{
tim->TIMER_CTRL_REG &= ~TIMER_CTRL_ENABLE;
tim->TIMER_CTRL_REG &= ~TIMER_CTRL_ENABLE;
}
void timer_enable_irq(timer *tim)
{
tim->TIMER_CTRL_REG &= ~TIMER_CTRL_INTMASK;
tim->TIMER_CTRL_REG &= ~TIMER_CTRL_INTMASK;
}
void timer_disable_irq(timer *tim)
{
tim->TIMER_CTRL_REG |= TIMER_CTRL_INTMASK;
tim->TIMER_CTRL_REG |= TIMER_CTRL_INTMASK;
}
UINT32 timer_get_status(timer *tim)
{
return tim->TIMER_INT_STATUS;
return tim->TIMER_INT_STATUS;
}
UINT32 timer_get_eoi(timer *tim)
{
return tim->TIMER_EOI;
return tim->TIMER_EOI;
}
UINT32 timer_get_value(timer *tim)
{
return tim->TIMER_LOAD_COUNT - tim->TIMER_CURRENT_VALUE;
return tim->TIMER_LOAD_COUNT - tim->TIMER_CURRENT_VALUE;
}

226
bsp/fh8620/libraries/driverlib/fh_uart.c
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@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*****************************************************************************
* Include Section
* add all #include here
@ -79,33 +79,33 @@
int uart_init(uart *port)
{
port->UART_IER = 0;
port->UART_LCR = 0;
//port->UART_DLL = 0;
//port->UART_DLH = 0;
port->UART_IER = 0;
port->UART_LCR = 0;
//port->UART_DLL = 0;
//port->UART_DLH = 0;
}
UINT32 uart_get_status(uart *port)
{
return port->UART_USR;
return port->UART_USR;
}
void uart_configure(uart *port, enum data_bits data_bit,
enum stop_bits stop_bit, enum parity parity,
UINT32 buard_rate, UINT32 uart_clk)
enum stop_bits stop_bit, enum parity parity,
UINT32 buard_rate, UINT32 uart_clk)
{
UINT32 divisor;
UINT32 freq;
UINT32 baud_div;
UINT32 lcr_reg = 0;
UINT32 ret;
UINT32 divisor;
UINT32 freq;
UINT32 baud_div;
UINT32 lcr_reg = 0;
UINT32 ret;
/*divisor = DIV(buard_rate);
port->UART_LCR |= UART_LCR_DLAB;
port->UART_DLL = divisor & 0xFF;
port->UART_DLH = (divisor >> 8) & 0xFF;
port->UART_LCR &= ~UART_LCR_DLAB;*/
/*divisor = DIV(buard_rate);
port->UART_LCR |= UART_LCR_DLAB;
port->UART_DLL = divisor & 0xFF;
port->UART_DLH = (divisor >> 8) & 0xFF;
port->UART_LCR &= ~UART_LCR_DLAB;*/
do{
//clear fifo...
@ -113,141 +113,141 @@ void uart_configure(uart *port, enum data_bits data_bit,
//read status..
ret = uart_get_status(port);
}while(ret & UART_USR_BUSY);
switch (data_bit) {
case UART_DATA_BIT5:
lcr_reg |= UART_LCR_DLS5;
break;
case UART_DATA_BIT6:
lcr_reg |= UART_LCR_DLS6;
break;
case UART_DATA_BIT7:
lcr_reg |= UART_LCR_DLS7;
break;
case UART_DATA_BIT8:
lcr_reg |= UART_LCR_DLS8;
break;
default:
lcr_reg |= UART_LCR_DLS8;
break;
}
switch (data_bit) {
case UART_DATA_BIT5:
lcr_reg |= UART_LCR_DLS5;
break;
case UART_DATA_BIT6:
lcr_reg |= UART_LCR_DLS6;
break;
case UART_DATA_BIT7:
lcr_reg |= UART_LCR_DLS7;
break;
case UART_DATA_BIT8:
lcr_reg |= UART_LCR_DLS8;
break;
default:
lcr_reg |= UART_LCR_DLS8;
break;
}
switch (stop_bit) {
case UART_STOP_BIT1:
lcr_reg |= UART_LCR_STOP1;
break;
case UART_STOP_BIT2:
lcr_reg |= UART_LCR_STOP2;
break;
default:
lcr_reg |= UART_LCR_STOP1;
break;
}
switch (stop_bit) {
case UART_STOP_BIT1:
lcr_reg |= UART_LCR_STOP1;
break;
case UART_STOP_BIT2:
lcr_reg |= UART_LCR_STOP2;
break;
default:
lcr_reg |= UART_LCR_STOP1;
break;
}
switch (parity) {
case UART_PARITY_EVEN:
lcr_reg |= UART_LCR_EVEN | UART_LCR_PEN;
break;
case UART_PARITY_ODD:
lcr_reg |= UART_LCR_PEN;
break;
case UART_PARITY_ST:
lcr_reg |= UART_LCR_SP;
break;
case UART_PARITY_NONE:
default:
break;
}
switch (parity) {
case UART_PARITY_EVEN:
lcr_reg |= UART_LCR_EVEN | UART_LCR_PEN;
break;
case UART_PARITY_ODD:
lcr_reg |= UART_LCR_PEN;
break;
case UART_PARITY_ST:
lcr_reg |= UART_LCR_SP;
break;
case UART_PARITY_NONE:
default:
break;
}
switch (buard_rate) {
case 115200:
baud_div = BAUDRATE_115200;
break;
case 57600:
baud_div = BAUDRATE_57600;
break;
case 38400:
baud_div = BAUDRATE_38400;
break;
case 19200:
baud_div = BAUDRATE_19200;
break;
case 9600:
baud_div = BAUDRATE_9600;
break;
default:
baud_div = BAUDRATE_115200;
break;
}
switch (buard_rate) {
case 115200:
baud_div = BAUDRATE_115200;
break;
case 57600:
baud_div = BAUDRATE_57600;
break;
case 38400:
baud_div = BAUDRATE_38400;
break;
case 19200:
baud_div = BAUDRATE_19200;
break;
case 9600:
baud_div = BAUDRATE_9600;
break;
default:
baud_div = BAUDRATE_115200;
break;
}
//clear fifo
port->UART_FCR = UART_FCR_RFIFOR | UART_FCR_XFIFOR;
//clear fifo
port->UART_FCR = UART_FCR_RFIFOR | UART_FCR_XFIFOR;
//div
ret = port->UART_LCR;
ret |= UART_LCR_DLAB;
port->UART_LCR = ret;
port->RBRTHRDLL = baud_div & 0x00ff;
port->DLHIER = (baud_div & 0x00ff)>>8;
/* clear DLAB */
ret = ret & 0x7f;
port->UART_LCR = ret;
//div
ret = port->UART_LCR;
ret |= UART_LCR_DLAB;
port->UART_LCR = ret;
port->RBRTHRDLL = baud_div & 0x00ff;
port->DLHIER = (baud_div & 0x00ff)>>8;
/* clear DLAB */
ret = ret & 0x7f;
port->UART_LCR = ret;
//line control
port->UART_LCR = lcr_reg;
//fifo control
port->UART_FCR = UART_FCR_FIFOE | UART_FCR_RFIFOR | UART_FCR_XFIFOR | UART_FCR_TET_1_4 | UART_FCR_RT_ONE;
//line control
port->UART_LCR = lcr_reg;
//fifo control
port->UART_FCR = UART_FCR_FIFOE | UART_FCR_RFIFOR | UART_FCR_XFIFOR | UART_FCR_TET_1_4 | UART_FCR_RT_ONE;
}
int uart_enable_irq(uart *port, UINT32 mode)
{
unsigned int ret;
ret = port->UART_IER;
ret |= mode;
port->UART_IER = ret;
unsigned int ret;
ret = port->UART_IER;
ret |= mode;
port->UART_IER = ret;
}
int uart_disable_irq(uart *port, UINT32 mode)
{
unsigned int ret;
ret = port->UART_IER;
ret &= ~mode;
unsigned int ret;
ret = port->UART_IER;
ret &= ~mode;
port->UART_IER = ret;
port->UART_IER = ret;
}
UINT32 uart_get_iir_status(uart *port)
{
return port->UART_IIR;
return port->UART_IIR;
}
UINT32 uart_get_line_status(uart *port)
{
return port->UART_LSR;
return port->UART_LSR;
}
UINT32 uart_is_rx_ready(uart *port)
{
return port->UART_LSR & UART_LSR_DR;
return port->UART_LSR & UART_LSR_DR;
}
UINT8 uart_getc(uart *port)
{
return port->UART_RBR & 0xFF;
return port->UART_RBR & 0xFF;
}
void uart_putc(uart *port, UINT8 c)
{
//while(!(port->UART_USR & UART_USR_TFNF));
port->UART_THR = c;
//while(!(port->UART_USR & UART_USR_TFNF));
port->UART_THR = c;
}
void uart_set_fifo_mode(uart *port, UINT32 fifo_mode)
{
port->UART_FCR = fifo_mode;
port->UART_FCR = fifo_mode;
}

6
bsp/fh8620/libraries/driverlib/fh_wdt.c
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@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes

8
bsp/fh8620/libraries/inc/fh_driverlib.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include <rtthread.h>
#include <rthw.h>
#include "fh_def.h"

8
bsp/fh8620/libraries/inc/fh_gpio.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef FH_GPIO_H_
#define FH_GPIO_H_

8
bsp/fh8620/libraries/inc/fh_i2c.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef FH_I2C_H_
#define FH_I2C_H_

36
bsp/fh8620/libraries/inc/fh_ictl.h
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@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -30,21 +30,21 @@
#include "fh_def.h"
typedef struct {
RwReg IRQ_EN_L;
RwReg IRQ_EN_H;
RwReg IRQ_MASK_L;
RwReg IRQ_MASK_H;
RwReg IRQ_FORCE_L;
RwReg IRQ_FORCE_H;
RwReg IRQ_RAWSTARUS_L;
RwReg IRQ_RAWSTARUS_H;
RwReg IRQ_STATUS_L;
RwReg IRQ_STATUS_H;
RwReg IRQ_MASKSTATUS_L;
RwReg IRQ_MASKSTATUS_H;
RwReg IRQ_FINALSTATUS_L;
RwReg IRQ_FINALSTATUS_H;
RwReg IRQ_VECTOR;
RwReg IRQ_EN_L;
RwReg IRQ_EN_H;
RwReg IRQ_MASK_L;
RwReg IRQ_MASK_H;
RwReg IRQ_FORCE_L;
RwReg IRQ_FORCE_H;
RwReg IRQ_RAWSTARUS_L;
RwReg IRQ_RAWSTARUS_H;
RwReg IRQ_STATUS_L;
RwReg IRQ_STATUS_H;
RwReg IRQ_MASKSTATUS_L;
RwReg IRQ_MASKSTATUS_H;
RwReg IRQ_FINALSTATUS_L;
RwReg IRQ_FINALSTATUS_H;
RwReg IRQ_VECTOR;
}fh_intc;

6
bsp/fh8620/libraries/inc/fh_mmc.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes

6
bsp/fh8620/libraries/inc/fh_pwm.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes

324
bsp/fh8620/libraries/inc/fh_sdio.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -32,53 +32,53 @@
//#define __ASIC_BRANCH__
enum {
CTRL = 0x0, /** Control */
PWREN = 0x4, /** Power-enable */
CLKDIV = 0x8, /** Clock divider */
CLKSRC = 0xC, /** Clock source */
CLKENA = 0x10, /** Clock enable */
TMOUT = 0x14, /** Timeout */
CTYPE = 0x18, /** Card type */
BLKSIZ = 0x1C, /** Block Size */
BYTCNT = 0x20, /** Byte count */
INTMSK = 0x24, /** Interrupt Mask */
CMDARG = 0x28, /** Command Argument */
CMD = 0x2C, /** Command */
RESP0 = 0x30, /** Response 0 */
RESP1 = 0x34, /** Response 1 */
RESP2 = 0x38, /** Response 2 */
RESP3 = 0x3C, /** Response 3 */
MINTSTS = 0x40, /** Masked interrupt status */
RINTSTS = 0x44, /** Raw interrupt status */
STATUS = 0x48, /** Status */
FIFOTH = 0x4C, /** FIFO threshold */
CDETECT = 0x50, /** Card detect */
WRTPRT = 0x54, /** Write protect */
GPIO = 0x58, /** General Purpose IO */
TCBCNT = 0x5C, /** Transferred CIU byte count */
TBBCNT = 0x60, /** Transferred host/DMA to/from byte count */
DEBNCE = 0x64, /** Card detect debounce */
USRID = 0x68, /** User ID */
VERID = 0x6C, /** Version ID */
HCON = 0x70, /** Hardware Configuration */
UHSREG = 0x74, /** Reserved */
BMOD = 0x80, /** Bus mode Register */
PLDMND = 0x84, /** Poll Demand */
DBADDR = 0x88, /** Descriptor Base Address */
IDSTS = 0x8C, /** Internal DMAC Status */
IDINTEN = 0x90, /** Internal DMAC Interrupt Enable */
DSCADDR = 0x94, /** Current Host Descriptor Address */
BUFADDR = 0x98, /** Current Host Buffer Address */
FIFODAT = 0x200, /** FIFO data read write */
CTRL = 0x0, /** Control */
PWREN = 0x4, /** Power-enable */
CLKDIV = 0x8, /** Clock divider */
CLKSRC = 0xC, /** Clock source */
CLKENA = 0x10, /** Clock enable */
TMOUT = 0x14, /** Timeout */
CTYPE = 0x18, /** Card type */
BLKSIZ = 0x1C, /** Block Size */
BYTCNT = 0x20, /** Byte count */
INTMSK = 0x24, /** Interrupt Mask */
CMDARG = 0x28, /** Command Argument */
CMD = 0x2C, /** Command */
RESP0 = 0x30, /** Response 0 */
RESP1 = 0x34, /** Response 1 */
RESP2 = 0x38, /** Response 2 */
RESP3 = 0x3C, /** Response 3 */
MINTSTS = 0x40, /** Masked interrupt status */
RINTSTS = 0x44, /** Raw interrupt status */
STATUS = 0x48, /** Status */
FIFOTH = 0x4C, /** FIFO threshold */
CDETECT = 0x50, /** Card detect */
WRTPRT = 0x54, /** Write protect */
GPIO = 0x58, /** General Purpose IO */
TCBCNT = 0x5C, /** Transferred CIU byte count */
TBBCNT = 0x60, /** Transferred host/DMA to/from byte count */
DEBNCE = 0x64, /** Card detect debounce */
USRID = 0x68, /** User ID */
VERID = 0x6C, /** Version ID */
HCON = 0x70, /** Hardware Configuration */
UHSREG = 0x74, /** Reserved */
BMOD = 0x80, /** Bus mode Register */
PLDMND = 0x84, /** Poll Demand */
DBADDR = 0x88, /** Descriptor Base Address */
IDSTS = 0x8C, /** Internal DMAC Status */
IDINTEN = 0x90, /** Internal DMAC Interrupt Enable */
DSCADDR = 0x94, /** Current Host Descriptor Address */
BUFADDR = 0x98, /** Current Host Buffer Address */
FIFODAT = 0x200, /** FIFO data read write */
};
/* Control register definitions */
#define CTRL_RESET 0x00000001
#define CTRL_RESET 0x00000001
#define FIFO_RESET 0x00000002
#define DMA_RESET 0x00000004
#define INT_ENABLE 0x00000010
#define READ_WAIT 0x00000040
#define CTRL_USE_IDMAC 0x02000000
#define DMA_RESET 0x00000004
#define INT_ENABLE 0x00000010
#define READ_WAIT 0x00000040
#define CTRL_USE_IDMAC 0x02000000
/* Interrupt mask defines */
#define INTMSK_CDETECT 0x00000001
@ -102,11 +102,11 @@ enum {
#define INTMASK_ERROR (INTMSK_RESP_ERR|INTMSK_RCRC|INTMSK_DCRC|INTMSK_RTO|INTMSK_DTO|INTMSK_HTO|INTMSK_FRUN|INTMSK_HLE|INTMSK_SBE|INTMSK_EBE)
/*BMOD register define */
#define BMOD_SWR 0x00000001
#define BMOD_DE 0x00000080
#define BMOD_SWR 0x00000001
#define BMOD_DE 0x00000080
/* for STATUS register */
#define GET_FIFO_COUNT(x) (((x)&0x3ffe0000)>>17)
#define GET_FIFO_COUNT(x) (((x)&0x3ffe0000)>>17)
#define GET_FIFO_DEPTH(x) ((((x)&0x0FFF0000)>>16)+1)
/* for IDMA intr register */
@ -122,62 +122,62 @@ enum {
/* Define Card status bits (R1 response) */
#define R1CS_ADDRESS_OUT_OF_RANGE 0x80000000
#define R1CS_ADDRESS_MISALIGN 0x40000000
#define R1CS_BLOCK_LEN_ERR 0x20000000
#define R1CS_ERASE_SEQ_ERR 0x10000000
#define R1CS_ERASE_PARAM 0x08000000
#define R1CS_WP_VIOLATION 0x04000000
#define R1CS_CARD_IS_LOCKED 0x02000000
#define R1CS_LCK_UNLCK_FAILED 0x01000000
#define R1CS_COM_CRC_ERROR 0x00800000
#define R1CS_ILLEGAL_COMMAND 0x00400000
#define R1CS_CARD_ECC_FAILED 0x00200000
#define R1CS_CC_ERROR 0x00100000
#define R1CS_ERROR 0x00080000
#define R1CS_UNDERRUN 0x00040000
#define R1CS_OVERRUN 0x00020000
#define R1CS_CSD_OVERWRITE 0x00010000
#define R1CS_WP_ERASE_SKIP 0x00008000
#define R1CS_RESERVED_0 0x00004000
#define R1CS_ERASE_RESET 0x00002000
#define R1CS_CURRENT_STATE_MASK 0x00001e00
#define R1CS_READY_FOR_DATA 0x00000100
#define R1CS_SWITCH_ERROR 0x00000080
#define R1CS_RESERVED_1 0x00000040
#define R1CS_APP_CMD 0x00000020
#define R1CS_RESERVED_2 0x00000010
#define R1CS_APP_SPECIFIC_MASK 0x0000000c
#define R1CS_MANUFAC_TEST_MASK 0x00000003
#define R1CS_ERROR_OCCURED_MAP 0xfdffa080
#define R1CS_CURRENT_STATE(x) (((x)&R1CS_CURRENT_STATE_MASK)>>9)
#define R1CS_ADDRESS_MISALIGN 0x40000000
#define R1CS_BLOCK_LEN_ERR 0x20000000
#define R1CS_ERASE_SEQ_ERR 0x10000000
#define R1CS_ERASE_PARAM 0x08000000
#define R1CS_WP_VIOLATION 0x04000000
#define R1CS_CARD_IS_LOCKED 0x02000000
#define R1CS_LCK_UNLCK_FAILED 0x01000000
#define R1CS_COM_CRC_ERROR 0x00800000
#define R1CS_ILLEGAL_COMMAND 0x00400000
#define R1CS_CARD_ECC_FAILED 0x00200000
#define R1CS_CC_ERROR 0x00100000
#define R1CS_ERROR 0x00080000
#define R1CS_UNDERRUN 0x00040000
#define R1CS_OVERRUN 0x00020000
#define R1CS_CSD_OVERWRITE 0x00010000
#define R1CS_WP_ERASE_SKIP 0x00008000
#define R1CS_RESERVED_0 0x00004000
#define R1CS_ERASE_RESET 0x00002000
#define R1CS_CURRENT_STATE_MASK 0x00001e00
#define R1CS_READY_FOR_DATA 0x00000100
#define R1CS_SWITCH_ERROR 0x00000080
#define R1CS_RESERVED_1 0x00000040
#define R1CS_APP_CMD 0x00000020
#define R1CS_RESERVED_2 0x00000010
#define R1CS_APP_SPECIFIC_MASK 0x0000000c
#define R1CS_MANUFAC_TEST_MASK 0x00000003
#define R1CS_ERROR_OCCURED_MAP 0xfdffa080
#define R1CS_CURRENT_STATE(x) (((x)&R1CS_CURRENT_STATE_MASK)>>9)
/* R5 response */
#define R5_IO_CRC_ERR 0x00008000
#define R5_IO_BAD_CMD 0x00004000
#define R5_IO_GEN_ERR 0x00000800
#define R5_IO_FUNC_ERR 0x00000200
#define R5_IO_CRC_ERR 0x00008000
#define R5_IO_BAD_CMD 0x00004000
#define R5_IO_GEN_ERR 0x00000800
#define R5_IO_FUNC_ERR 0x00000200
#define R5_IO_OUT_RANGE 0x00000100
#define R5_IO_ERR_BITS 0x0000cb00
#define R5_IO_ERR_BITS 0x0000cb00
enum {
NONE_TYPE = 0,
SD_TYPE,
SD_2_0_TYPE,
SDIO_TYPE,
NONE_TYPE = 0,
SD_TYPE,
SD_2_0_TYPE,
SDIO_TYPE,
};
enum {
CARD_STATE_EMPTY = -1,
CARD_STATE_IDLE = 0,
CARD_STATE_READY = 1,
CARD_STATE_IDENT = 2,
CARD_STATE_STBY = 3,
CARD_STATE_TRAN = 4,
CARD_STATE_DATA = 5,
CARD_STATE_RCV = 6,
CARD_STATE_PRG = 7,
CARD_STATE_DIS = 8,
CARD_STATE_INA = 9
CARD_STATE_EMPTY = -1,
CARD_STATE_IDLE = 0,
CARD_STATE_READY = 1,
CARD_STATE_IDENT = 2,
CARD_STATE_STBY = 3,
CARD_STATE_TRAN = 4,
CARD_STATE_DATA = 5,
CARD_STATE_RCV = 6,
CARD_STATE_PRG = 7,
CARD_STATE_DIS = 8,
CARD_STATE_INA = 9
};
enum DmaDescriptorDES1 // Buffer's size field of Descriptor
@ -204,28 +204,28 @@ enum DmaDescriptorDES0 // Control and status word of DMA descriptor DES0
};
typedef struct DmaDescStruct {
unsigned int desc0; /* control and status information of descriptor */
unsigned int desc1; /* buffer sizes */
unsigned int desc2; /* physical address of the buffer 1 */
unsigned int desc3; /* physical address of the buffer 2 */
unsigned int desc0; /* control and status information of descriptor */
unsigned int desc1; /* buffer sizes */
unsigned int desc2; /* physical address of the buffer 1 */
unsigned int desc3; /* physical address of the buffer 2 */
}DmaDesc;
typedef struct {
unsigned int wkmod;
volatile DmaDesc *pDmaDesc;
unsigned int idma_support;
unsigned int rca;
unsigned int ip_base;
unsigned int card_type;
unsigned int fifo_depth;
unsigned int fifo_threth;
unsigned int sectors;
unsigned int scr[2];
unsigned int csd[4];
unsigned int idsts;
rt_sem_t sem;
rt_sem_t mutex;
void (*cb)(void);
unsigned int wkmod;
volatile DmaDesc *pDmaDesc;
unsigned int idma_support;
unsigned int rca;
unsigned int ip_base;
unsigned int card_type;
unsigned int fifo_depth;
unsigned int fifo_threth;
unsigned int sectors;
unsigned int scr[2];
unsigned int csd[4];
unsigned int idsts;
rt_sem_t sem;
rt_sem_t mutex;
void (*cb)(void);
} sdc_t;
#define ONE_BIT_MODE (0)
@ -244,55 +244,55 @@ typedef struct {
enum {
ERRNOERROR = 0,
// for raw interrupt status error
ERRRESPRECEP, // 1
ERRRESPCRC,
ERRDCRC,
ERRRESPTIMEOUT,
ERRDRTIMEOUT,
ERRUNDERWRITE,
ERROVERREAD,
ERRHLE,
ERRSTARTBIT,
ERRENDBITERR, // 10
ERRNOERROR = 0,
// for R1 response
ERRADDRESSRANGE, // 11
ERRADDRESSMISALIGN,
ERRBLOCKLEN,
ERRERASESEQERR,
ERRERASEPARAM,
ERRPROT,
ERRCARDLOCKED,
ERRCRC,
ERRILLEGALCOMMAND,
ERRECCFAILED,
ERRCCERR,
ERRUNKNOWN,
ERRUNDERRUN,
ERROVERRUN,
ERRCSDOVERWRITE,
ERRERASERESET,
ERRFSMSTATE, // 27
// for raw interrupt status error
ERRRESPRECEP, // 1
ERRRESPCRC,
ERRDCRC,
ERRRESPTIMEOUT,
ERRDRTIMEOUT,
ERRUNDERWRITE,
ERROVERREAD,
ERRHLE,
ERRSTARTBIT,
ERRENDBITERR, // 10
// for R5 response
ERRBADFUNC, // 28
// for R1 response
ERRADDRESSRANGE, // 11
ERRADDRESSMISALIGN,
ERRBLOCKLEN,
ERRERASESEQERR,
ERRERASEPARAM,
ERRPROT,
ERRCARDLOCKED,
ERRCRC,
ERRILLEGALCOMMAND,
ERRECCFAILED,
ERRCCERR,
ERRUNKNOWN,
ERRUNDERRUN,
ERROVERRUN,
ERRCSDOVERWRITE,
ERRERASERESET,
ERRFSMSTATE, // 27
// others
ERRCARDNOTCONN, // 29
ERRCARDWPROTECT,
ERRCMDRETRIESOVER,
ERRNOTSUPPORTED,
ERRHARDWARE,
ERRDATANOTREADY,
ERRCARDINTERNAL,
ERRACMD41TIMEOUT,
ERRIDMA,
ERRNORES,
// for R5 response
ERRBADFUNC, // 28
ERRNOTEQUAL,
// others
ERRCARDNOTCONN, // 29
ERRCARDWPROTECT,
ERRCMDRETRIESOVER,
ERRNOTSUPPORTED,
ERRHARDWARE,
ERRDATANOTREADY,
ERRCARDINTERNAL,
ERRACMD41TIMEOUT,
ERRIDMA,
ERRNORES,
ERRNOTEQUAL,
};
#ifdef __ASIC_BRANCH__
@ -352,5 +352,5 @@ extern int sdio_drv_creg_write(HSDC handle, int addr, int fn, unsigned char data
extern void inv_dcache_range(unsigned long start, unsigned long len);
extern void flush_dcache_range(unsigned long start, unsigned long len);
#endif //__sdcard_h__

12
bsp/fh8620/libraries/inc/fh_spi.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef FH_SPI_H_
#define FH_SPI_H_
@ -97,8 +97,8 @@
#define SPI_STATUS_BUSY (1)
#define SPI_TX_DMA (1<<1)
#define SPI_RX_DMA (1<<0)
#define SPI_TX_DMA (1<<1)
#define SPI_RX_DMA (1<<0)
struct spi_config

28
bsp/fh8620/libraries/inc/fh_timer.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -29,7 +29,7 @@
/****************************************************************************
* #include section
* add #include here if any
* add #include here if any
***************************************************************************/
#include "fh_def.h"
@ -38,7 +38,7 @@
/****************************************************************************
* #define section
* add constant #define here if any
* add constant #define here if any
***************************************************************************/
#define TIMER_CTRL_ENABLE (1u << 0)
#define TIMER_CTRL_MODE (1u << 1)
@ -49,19 +49,19 @@
/****************************************************************************
* ADT section
* add Abstract Data Type definition here
* add Abstract Data Type definition here
***************************************************************************/
typedef struct {
RwReg TIMER_LOAD_COUNT;
RwReg TIMER_CURRENT_VALUE;
RwReg TIMER_CTRL_REG;
RwReg TIMER_EOI;
RwReg TIMER_INT_STATUS;
RwReg TIMER_LOAD_COUNT;
RwReg TIMER_CURRENT_VALUE;
RwReg TIMER_CTRL_REG;
RwReg TIMER_EOI;
RwReg TIMER_INT_STATUS;
}timer;
enum timer_mode {
TIMER_MODE_PERIODIC = 0,
TIMER_MODE_ONESHOT = 1,
TIMER_MODE_PERIODIC = 0,
TIMER_MODE_ONESHOT = 1,
};
@ -73,7 +73,7 @@ typedef struct {
/****************************************************************************
* section
* add function prototype here if any
* add function prototype here if any
***************************************************************************/

114
bsp/fh8620/libraries/inc/fh_uart.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -29,13 +29,13 @@
/****************************************************************************
* #include section
* add #include here if any
* add #include here if any
***************************************************************************/
#include "fh_def.h"
/****************************************************************************
* #define section
* add constant #define here if any
* add constant #define here if any
***************************************************************************/
#define UART_RBR RBRTHRDLL
@ -120,53 +120,53 @@
#define UART_IIR_FIFOSE (0x03 << 6)
//uart baudrate cofig
//#define UART_CLOCK_FREQ (27000000) //27MHZ
//#define UART_CLOCK_FREQ (27000000) //27MHZ
//
//#define DIV(n) (((UART_CLOCK_FREQ/(n))+8)/16)
//#define DIV(n) (((UART_CLOCK_FREQ/(n))+8)/16)
/****************************************************************************
* ADT section
* add Abstract Data Type definition here
* add Abstract Data Type definition here
***************************************************************************/
typedef struct {
RwReg RBRTHRDLL; /* UART_RBR, UART_THR, UART_DLL */
RwReg DLHIER; /* UART_DLH, UART_IER */
RwReg IIRFCR; /* UART_IIR, UART_FCR */
RwReg UART_LCR; /*(0x000c) */
RwReg UART_MCR; /*(0x0010) */
RwReg UART_LSR; /*(0x0014) */
RwReg UART_MSR; /*(0x0018) */
RwReg UART_SCR; /*(0x001c) */
RwReg reserved[20];
RwReg UART_FAR; /* (0x0070) */
RwReg UART_TFR; /* (0x0074) */
RwReg UART_RFW; /* (0x0078) */
RwReg UART_USR; /* (0x007c) */
RwReg UART_TFL; /* (0x0080) */
RwReg UART_RFL; /* (0x0084) */
RwReg UART_SRR; /* (0x0088) */
RwReg reserved1[3];
RwReg UART_SFE; /* (0x0098) */
RwReg UART_SRT; /* (0x009c) */
RwReg UART_STET; /* (0x00a0) */
RwReg UART_HTX; /* (0x00a4) */
RwReg UART_DMASA; /* (0x00a8) */
RwReg reserved2[18];
RwReg UART_CPR; /* (0x00f4) */
RwReg UART_UCV; /* (0x00f8) */
RwReg UART_CTR; /* (0x00fc) */
RwReg RBRTHRDLL; /* UART_RBR, UART_THR, UART_DLL */
RwReg DLHIER; /* UART_DLH, UART_IER */
RwReg IIRFCR; /* UART_IIR, UART_FCR */
RwReg UART_LCR; /*(0x000c) */
RwReg UART_MCR; /*(0x0010) */
RwReg UART_LSR; /*(0x0014) */
RwReg UART_MSR; /*(0x0018) */
RwReg UART_SCR; /*(0x001c) */
RwReg reserved[20];
RwReg UART_FAR; /* (0x0070) */
RwReg UART_TFR; /* (0x0074) */
RwReg UART_RFW; /* (0x0078) */
RwReg UART_USR; /* (0x007c) */
RwReg UART_TFL; /* (0x0080) */
RwReg UART_RFL; /* (0x0084) */
RwReg UART_SRR; /* (0x0088) */
RwReg reserved1[3];
RwReg UART_SFE; /* (0x0098) */
RwReg UART_SRT; /* (0x009c) */
RwReg UART_STET; /* (0x00a0) */
RwReg UART_HTX; /* (0x00a4) */
RwReg UART_DMASA; /* (0x00a8) */
RwReg reserved2[18];
RwReg UART_CPR; /* (0x00f4) */
RwReg UART_UCV; /* (0x00f8) */
RwReg UART_CTR; /* (0x00fc) */
}uart;
struct fh_uart {
uart *uart_port;
int irq;
uart *uart_port;
int irq;
};
@ -174,34 +174,34 @@ struct fh_uart {
enum data_bits {
UART_DATA_BIT5 = 0,
UART_DATA_BIT6 = 1,
UART_DATA_BIT7 = 2,
UART_DATA_BIT8 = 3
UART_DATA_BIT5 = 0,
UART_DATA_BIT6 = 1,
UART_DATA_BIT7 = 2,
UART_DATA_BIT8 = 3
};
enum stop_bits {
UART_STOP_BIT1 = 0,
UART_STOP_BIT1_5 = 1,
UART_STOP_BIT2 = 2
UART_STOP_BIT1 = 0,
UART_STOP_BIT1_5 = 1,
UART_STOP_BIT2 = 2
};
enum parity {
UART_PARITY_NONE = 0,
UART_PARITY_EVEN = 1,
UART_PARITY_ODD = 2,
UART_PARITY_ST = 3 /* Stick Parity */
UART_PARITY_NONE = 0,
UART_PARITY_EVEN = 1,
UART_PARITY_ODD = 2,
UART_PARITY_ST = 3 /* Stick Parity */
};
#define UART_CLOCK_FREQ (30000000) //30MHZ
#define UART_CLOCK_FREQ (30000000) //30MHZ
typedef enum enum_uart_baudrate{
BAUDRATE_9600 = (((UART_CLOCK_FREQ/9600)+8)/16),
BAUDRATE_19200 = (((UART_CLOCK_FREQ/19200)+8)/16),
BAUDRATE_38400 = (((UART_CLOCK_FREQ/38400)+8)/16),
BAUDRATE_57600 = (((UART_CLOCK_FREQ/57600)+8)/16),
BAUDRATE_115200 = (((UART_CLOCK_FREQ/115200)+8)/16),
BAUDRATE_194000 = (((UART_CLOCK_FREQ/194000)+8)/16),
BAUDRATE_9600 = (((UART_CLOCK_FREQ/9600)+8)/16),
BAUDRATE_19200 = (((UART_CLOCK_FREQ/19200)+8)/16),
BAUDRATE_38400 = (((UART_CLOCK_FREQ/38400)+8)/16),
BAUDRATE_57600 = (((UART_CLOCK_FREQ/57600)+8)/16),
BAUDRATE_115200 = (((UART_CLOCK_FREQ/115200)+8)/16),
BAUDRATE_194000 = (((UART_CLOCK_FREQ/194000)+8)/16),
}uart_baudrate_e;
/****************************************************************************
@ -213,8 +213,8 @@ extern int uart_init(uart *port);
extern UINT32 uart_get_status(uart *port);
extern void uart_configure(uart *port, enum data_bits data_bit,
enum stop_bits stop_bit, enum parity parity,
UINT32 buard_rate, UINT32 uart_clk);
enum stop_bits stop_bit, enum parity parity,
UINT32 buard_rate, UINT32 uart_clk);
extern int uart_enable_irq(uart *port, UINT32 mode);
@ -235,7 +235,7 @@ extern void uart_set_fifo_mode(uart *port, UINT32 fifo_mode);
/****************************************************************************
* section
* add function prototype here if any
* add function prototype here if any
***************************************************************************/

8
bsp/fh8620/libraries/inc/fh_wdt.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef FH_WDT_H_
#define FH_WDT_H_

8
bsp/fh8620/platform/board.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include "platform_def.h"

28
bsp/fh8620/platform/board_info.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef __BOARD_INFO_H__
#define __BOARD_INFO_H__
@ -33,32 +33,32 @@ extern "C" {
/****************************************************************************
* #include section
* add #include here if any
* add #include here if any
***************************************************************************/
/****************************************************************************
* #define section
* add constant #define here if any
* add constant #define here if any
***************************************************************************/
/****************************************************************************
* ADT section
* add Abstract Data Type definition here
* add Abstract Data Type definition here
***************************************************************************/
typedef int (*probe_p)(void *);
typedef int (*exit_p)(void *);
struct fh_board_ops {
//void *ops_data;
probe_p probe;
probe_p exit;
//void *ops_data;
probe_p probe;
probe_p exit;
};
struct fh_board_info {
char *name;
void *data;
struct fh_board_ops *ops;
char *name;
void *data;
struct fh_board_ops *ops;
};
@ -73,7 +73,7 @@ void fh_print_all_board_info(void);
void fh_free_all_info(void);
/****************************************************************************
* section
* add function prototype here if any
* add function prototype here if any
***************************************************************************/
#ifdef __cplusplus

216
bsp/fh8620/platform/common/board_info.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*****************************************************************************
* Include Section
* add all #include here
@ -36,27 +36,27 @@
* add all #define here
*****************************************************************************/
struct fh_board_info_list_node {
struct fh_board_info obj;
rt_list_t list;
struct fh_board_info obj;
rt_list_t list;
};
#define CHECK_TEST_LIST_EMPTY \
if(rt_list_isempty(&board_info_head.list)) \
rt_kprintf("board info is null...please register first..\n")
#define CHECK_TEST_LIST_EMPTY \
if(rt_list_isempty(&board_info_head.list)) \
rt_kprintf("board info is null...please register first..\n")
/****************************************************************************
* ADT section
* add definition of user defined Data Type that only be used in this file here
***************************************************************************/
#define list_for_each_entry_safe(pos, n, head, member) \
for (pos = rt_list_entry((head)->next, typeof(*pos), member), \
n = rt_list_entry(pos->member.next, typeof(*pos), member); \
&pos->member != (head); \
pos = n, n = rt_list_entry(n->member.next, typeof(*n), member))
#define list_for_each_entry_safe(pos, n, head, member) \
for (pos = rt_list_entry((head)->next, typeof(*pos), member), \
n = rt_list_entry(pos->member.next, typeof(*pos), member); \
&pos->member != (head); \
pos = n, n = rt_list_entry(n->member.next, typeof(*n), member))
#define PARA_ERROR (-1)
#define PROBE_FUNC_MISS (-2)
#define PARA_ERROR (-1)
#define PROBE_FUNC_MISS (-2)
/******************************************************************************
* Function prototype section
@ -104,45 +104,45 @@ static struct fh_board_info_list_node board_info_head;
int fh_board_info_init(void) {
memset(&board_info_head, 0x0, sizeof(struct fh_board_info_list_node));
rt_list_init(&board_info_head.list);
board_info_head.obj.name = "NO INFO";
return 0;
memset(&board_info_head, 0x0, sizeof(struct fh_board_info_list_node));
rt_list_init(&board_info_head.list);
board_info_head.obj.name = "NO INFO";
return 0;
}
void fh_free_all_info(void) {
rt_list_t *p_list;
struct fh_board_info_list_node *info_node;
struct fh_board_info_list_node *_info_node;
p_list = &board_info_head.list;
rt_list_t *p_list;
struct fh_board_info_list_node *info_node;
struct fh_board_info_list_node *_info_node;
p_list = &board_info_head.list;
CHECK_TEST_LIST_EMPTY;
CHECK_TEST_LIST_EMPTY;
list_for_each_entry_safe(info_node, _info_node, p_list, list)
{
list_for_each_entry_safe(info_node, _info_node, p_list, list)
{
if (info_node->obj.ops->exit) {
info_node->obj.ops->exit(info_node->obj.data);
}
rt_kprintf("soc free list name:(%s)\n", info_node->obj.name);
rt_free(info_node);
}
fh_board_info_init();
if (info_node->obj.ops->exit) {
info_node->obj.ops->exit(info_node->obj.data);
}
rt_kprintf("soc free list name:(%s)\n", info_node->obj.name);
rt_free(info_node);
}
fh_board_info_init();
}
void fh_print_all_board_info(void) {
rt_list_t *p_list;
rt_list_t *p_list;
struct fh_board_info_list_node *info_node;
struct fh_board_info_list_node *_info_node;
p_list = &board_info_head.list;
struct fh_board_info_list_node *info_node;
struct fh_board_info_list_node *_info_node;
p_list = &board_info_head.list;
CHECK_TEST_LIST_EMPTY;
CHECK_TEST_LIST_EMPTY;
list_for_each_entry_safe(info_node, _info_node, p_list, list)
{
rt_kprintf("%s\n", info_node->obj.name);
}
list_for_each_entry_safe(info_node, _info_node, p_list, list)
{
rt_kprintf("%s\n", info_node->obj.name);
}
}
/*****************************************************************************
@ -157,94 +157,94 @@ void fh_print_all_board_info(void) {
//register the platform info such as base add,isr no..
//caution:do not free the name and data because of here not copy
struct fh_board_info *fh_board_info_register(char *info_name, void *data) {
rt_list_t *p_list;
struct fh_board_info_list_node *new_node;
struct fh_board_info_list_node *info_node;
struct fh_board_info_list_node *_info_node;
p_list = &board_info_head.list;
rt_list_t *p_list;
struct fh_board_info_list_node *new_node;
struct fh_board_info_list_node *info_node;
struct fh_board_info_list_node *_info_node;
p_list = &board_info_head.list;
if (RT_NULL == info_name || RT_NULL == data) {
rt_kprintf("info name or info data is NULL!\n");
return RT_NULL;
}
if (RT_NULL == info_name || RT_NULL == data) {
rt_kprintf("info name or info data is NULL!\n");
return RT_NULL;
}
//check if the func is already in the test list....
//check if the func is already in the test list....
#if(0)
list_for_each_entry_safe(info_node, _info_node, p_list, list) {
if (!memcmp(info_node->obj.name, info_name, strlen(info_name))) {
rt_kprintf("info_name(%s) is already registered\n", info_name);
return RT_NULL;
}
}
list_for_each_entry_safe(info_node, _info_node, p_list, list) {
if (!memcmp(info_node->obj.name, info_name, strlen(info_name))) {
rt_kprintf("info_name(%s) is already registered\n", info_name);
return RT_NULL;
}
}
#endif
new_node = (struct fh_board_info_list_node *) rt_malloc(
sizeof(struct fh_board_info_list_node));
if (!new_node) {
rt_kprintf("malloc new_list_node failed~\n");
return RT_NULL;
}
new_node = (struct fh_board_info_list_node *) rt_malloc(
sizeof(struct fh_board_info_list_node));
if (!new_node) {
rt_kprintf("malloc new_list_node failed~\n");
return RT_NULL;
}
new_node->obj.name = info_name;
new_node->obj.data = data;
//here insert "before" and test is "after" will make the list like a fifo...
rt_list_insert_before(&board_info_head.list, &new_node->list);
return &new_node->obj;
new_node->obj.name = info_name;
new_node->obj.data = data;
//here insert "before" and test is "after" will make the list like a fifo...
rt_list_insert_before(&board_info_head.list, &new_node->list);
return &new_node->obj;
}
//back the platform info
static void *fh_get_board_info_data(char *info_name) {
rt_list_t *p_list;
struct fh_board_info_list_node *info_node;
struct fh_board_info_list_node *_info_node;
p_list = &board_info_head.list;
rt_list_t *p_list;
struct fh_board_info_list_node *info_node;
struct fh_board_info_list_node *_info_node;
p_list = &board_info_head.list;
//check info name
if (RT_NULL == info_name) {
rt_kprintf("info name is NULL!\n");
return RT_NULL;
}
//check info name
if (RT_NULL == info_name) {
rt_kprintf("info name is NULL!\n");
return RT_NULL;
}
CHECK_TEST_LIST_EMPTY;
CHECK_TEST_LIST_EMPTY;
list_for_each_entry_safe(info_node, _info_node, p_list, list)
{
if (!strcmp(info_node->obj.name, info_name)) {
return info_node->obj.data;
}
}
list_for_each_entry_safe(info_node, _info_node, p_list, list)
{
if (!strcmp(info_node->obj.name, info_name)) {
return info_node->obj.data;
}
}
rt_kprintf("Can't find the board info name:%s\n", info_name);
rt_kprintf("Can't find the board info name:%s\n", info_name);
}
int fh_board_driver_register(char *info_name, struct fh_board_ops *ops) {
rt_list_t *p_list;
struct fh_board_info_list_node *new_node;
struct fh_board_info_list_node *info_node;
struct fh_board_info_list_node *_info_node;
p_list = &board_info_head.list;
rt_list_t *p_list;
struct fh_board_info_list_node *new_node;
struct fh_board_info_list_node *info_node;
struct fh_board_info_list_node *_info_node;
p_list = &board_info_head.list;
if (RT_NULL == info_name || RT_NULL == ops) {
rt_kprintf("info name or ops func is NULL!\n");
return PARA_ERROR;
}
if (RT_NULL == info_name || RT_NULL == ops) {
rt_kprintf("info name or ops func is NULL!\n");
return PARA_ERROR;
}
list_for_each_entry_safe(info_node, _info_node, p_list, list)
{
if (!strcmp(info_node->obj.name, info_name)) {
list_for_each_entry_safe(info_node, _info_node, p_list, list)
{
if (!strcmp(info_node->obj.name, info_name)) {
info_node->obj.ops = ops;
if (info_node->obj.ops->probe) {
info_node->obj.ops->probe(info_node->obj.data);
}
info_node->obj.ops = ops;
if (info_node->obj.ops->probe) {
info_node->obj.ops->probe(info_node->obj.data);
}
//return info_node->obj.data;
}
}
//return info_node->obj.data;
}
}
//rt_kprintf("Can't find the board info name:%s\n",info_name);
//rt_kprintf("Can't find the board info name:%s\n",info_name);
return 0;
return 0;
}

12
bsp/fh8620/platform/common/chkenv.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*****************************************************************************
* Include Section
* add all #include here
@ -47,11 +47,11 @@
*
*
**************************/
#if RT_NAME_MAX != 16
#if RT_NAME_MAX != 16
#error "define RT_NAME_MAX 16"
#endif
#if RT_TICK_PER_SECOND != 100
#if RT_TICK_PER_SECOND != 100
#warning "RT_TICK_PER_SECOND = 100"
#endif

68
bsp/fh8620/platform/fh8620/arch.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef ARCH_H_
#define ARCH_H_
@ -31,37 +31,37 @@
/*****************************/
/* BSP CONTROLLER BASE */
/*****************************/
#define INTC_REG_BASE (0xE0200000)
#define SDC0_REG_BASE (0xE2000000)
#define SDC1_REG_BASE (0xE2100000)
#define TVE_REG_BASE (0xE8000000)
#define VOU_REG_BASE (0xE8100000)
#define AES_REG_BASE (0xE8200000)
#define JPEG_REG_BASE (0xE8300000)
#define ISPB_REG_BASE (0xEA000000)
#define ISPF_REG_BASE (0xEA100000)
#define VPU_REG_BASE (0xEC000000)
#define VCU_REG_BASE (0xEC100000)
#define DDRC_REG_BASE (0xED000000)
#define DMAC_REG_BASE (0xEE000000)
#define GMAC_REG_BASE (0xEF000000)
#define PMU_REG_BASE (0xF0000000)
#define I2C0_REG_BASE (0xF0200000)
#define GPIO0_REG_BASE (0xF0300000)
#define INTC_REG_BASE (0xE0200000)
#define SDC0_REG_BASE (0xE2000000)
#define SDC1_REG_BASE (0xE2100000)
#define TVE_REG_BASE (0xE8000000)
#define VOU_REG_BASE (0xE8100000)
#define AES_REG_BASE (0xE8200000)
#define JPEG_REG_BASE (0xE8300000)
#define ISPB_REG_BASE (0xEA000000)
#define ISPF_REG_BASE (0xEA100000)
#define VPU_REG_BASE (0xEC000000)
#define VCU_REG_BASE (0xEC100000)
#define DDRC_REG_BASE (0xED000000)
#define DMAC_REG_BASE (0xEE000000)
#define GMAC_REG_BASE (0xEF000000)
#define PMU_REG_BASE (0xF0000000)
#define I2C0_REG_BASE (0xF0200000)
#define GPIO0_REG_BASE (0xF0300000)
#define GPIO1_REG_BASE (0xf4000000)
#define PWM_REG_BASE (0xF0400000)
#define SPI0_REG_BASE (0xF0500000)
#define SPI1_REG_BASE (0xF0600000)
#define UART0_REG_BASE (0xF0700000)
#define UART1_REG_BASE (0xF0800000)
#define I2S_REG_BASE (0xF0900000)
#define ACODEC_REG_BASE (0xF0A00000)
#define I2C1_REG_BASE (0xF0B00000)
#define TMR_REG_BASE (0xF0C00000)
#define WDT_REG_BASE (0xF0D00000)
#define DPHY_REG_BASE (0xF1000000)
#define MIPIC_REG_BASE (0xF1100000)
#define SADC_REG_BASE (0xF1200000)
#define PWM_REG_BASE (0xF0400000)
#define SPI0_REG_BASE (0xF0500000)
#define SPI1_REG_BASE (0xF0600000)
#define UART0_REG_BASE (0xF0700000)
#define UART1_REG_BASE (0xF0800000)
#define I2S_REG_BASE (0xF0900000)
#define ACODEC_REG_BASE (0xF0A00000)
#define I2C1_REG_BASE (0xF0B00000)
#define TMR_REG_BASE (0xF0C00000)
#define WDT_REG_BASE (0xF0D00000)
#define DPHY_REG_BASE (0xF1000000)
#define MIPIC_REG_BASE (0xF1100000)
#define SADC_REG_BASE (0xF1200000)

332
bsp/fh8620/platform/fh8620/iot_cam/board.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*****************************************************************************
* Include Section
* add all #include here
@ -67,15 +67,15 @@
#ifndef HW_SDCARD_POWER_GPIO
#define HW_SDCARD_POWER_GPIO 63 //not used
#define HW_SDCARD_POWER_GPIO 63 //not used
#endif
/****************************************************************************
* ADT section
* add definition of user defined Data Type that only be used in this file here
***************************************************************************/
struct st_platform_info {
char *name;
void *private_data;
char *name;
void *private_data;
};
/******************************************************************************
@ -101,14 +101,14 @@ struct st_platform_info {
void fh_mmc_reset(struct fh_mmc_obj *mmc_obj)
{
rt_uint32_t value;
if (mmc_obj->id)
fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffd);
else
fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffb);
do {
fh_pmu_read(REG_PMU_SWRST_AHB_CTRL, &value);
} while (value != 0xffffffff);
rt_uint32_t value;
if (mmc_obj->id)
fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffd);
else
fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffb);
do {
fh_pmu_read(REG_PMU_SWRST_AHB_CTRL, &value);
} while (value != 0xffffffff);
}
static struct fh_mmc_obj mmc0_obj =
@ -130,8 +130,8 @@ static struct fh_mmc_obj mmc1_obj =
};
#ifdef RT_USING_SPI
#define SPI0_CLK_IN (50000000)
#define SPI0_MAX_BAUD (SPI0_CLK_IN/2)
#define SPI0_CLK_IN (50000000)
#define SPI0_MAX_BAUD (SPI0_CLK_IN/2)
static struct spi_control_platform_data spi0_platform_data =
{
@ -152,8 +152,8 @@ static struct spi_control_platform_data spi0_platform_data =
};
#define SPI1_CLK_IN (50000000)
#define SPI1_MAX_BAUD (SPI1_CLK_IN/2)
#define SPI1_CLK_IN (50000000)
#define SPI1_MAX_BAUD (SPI1_CLK_IN/2)
static struct spi_control_platform_data spi1_platform_data =
{
@ -217,10 +217,10 @@ static struct fh_wdt_obj wdt_obj =
#ifdef RT_USING_SADC
static struct wrap_sadc_obj sadc_obj =
{
.id = 0,
.regs = (void *)SADC_REG_BASE,
.irq_no = SADC_IRQn,
.sample_mode = ISR_MODE,
.id = 0,
.regs = (void *)SADC_REG_BASE,
.irq_no = SADC_IRQn,
.sample_mode = ISR_MODE,
};
#endif
@ -366,8 +366,8 @@ struct st_platform_info plat_sadc =
#endif
const static struct st_platform_info *platform_info[] = {
&plat_mmc0,
//&plat_mmc1,//by PeterJiang, wifi don't use SDIO framework...
&plat_mmc0,
//&plat_mmc1,//by PeterJiang, wifi don't use SDIO framework...
#ifdef RT_USING_SPI
&plat_spi0,
#endif
@ -400,168 +400,168 @@ const static struct st_platform_info *platform_info[] = {
void clock_init(void)
{
//UINT32 reg;
//gate enable, spi0, gmac, uart0, timer0, wdt, pts
//UINT32 reg;
//gate enable, spi0, gmac, uart0, timer0, wdt, pts
#ifdef YG_TEK
fh_pmu_write_mask(REG_PMU_PAD_MAC_TXER_CFG, 0x100000, 0x100000);
fh_pmu_write_mask(REG_PMU_PAD_MAC_TXER_CFG, 0x100000, 0x100000);
#endif
//SPI0
fh_pmu_write_mask(REG_PMU_CLK_DIV3, 0xb, 0xff);
//SPI0
fh_pmu_write_mask(REG_PMU_CLK_DIV3, 0xb, 0xff);
//GMAC
fh_pmu_write_mask(REG_PMU_CLK_DIV6, 0x5000000, 0xf000000);
//GMAC
fh_pmu_write_mask(REG_PMU_CLK_DIV6, 0x5000000, 0xf000000);
//UART0
fh_pmu_write_mask(REG_PMU_CLK_DIV4, 0x1, 0xf);
//UART0
fh_pmu_write_mask(REG_PMU_CLK_DIV4, 0x1, 0xf);
//TIMER0
fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d0000, 0x3f0000);
//TIMER0
fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d0000, 0x3f0000);
//PTS
fh_pmu_write_mask(REG_PMU_CLK_DIV2, 0x23, 0x3f);
//PTS
fh_pmu_write_mask(REG_PMU_CLK_DIV2, 0x23, 0x3f);
//WDT
//fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d00, 0x3f00);
fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x3500, 0x3f00);
//WDT
//fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d00, 0x3f00);
fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x3500, 0x3f00);
//clock enable
fh_pmu_write_mask(REG_PMU_CLK_GATE, 0, 0x720ba080);
//clock enable
fh_pmu_write_mask(REG_PMU_CLK_GATE, 0, 0x720ba080);
//sd0_drv_sel
fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x200000, 0x300000);
fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x200000, 0x300000);
//sd0_sample_sel
fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x00000, 0x30000);
fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x00000, 0x30000);
//sd1_drv_sel
fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x2000, 0x3000);
//sd1_sample_sel
fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x000, 0x300);
//sd1_drv_sel
fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x2000, 0x3000);
//sd1_sample_sel
fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x000, 0x300);
}
void fh_platform_info_register(void){
struct fh_board_info *test_info;
int i;
struct fh_board_info *test_info;
int i;
for(i=0;i<sizeof(platform_info)/sizeof(struct st_platform_info *);i++){
test_info = fh_board_info_register(platform_info[i]->name,platform_info[i]->private_data);
if(!test_info){
rt_kprintf("info_name(%s) failed registered\n", platform_info[i]->name);
}
}
for(i=0;i<sizeof(platform_info)/sizeof(struct st_platform_info *);i++){
test_info = fh_board_info_register(platform_info[i]->name,platform_info[i]->private_data);
if(!test_info){
rt_kprintf("info_name(%s) failed registered\n", platform_info[i]->name);
}
}
}
void rt_hw_board_init()
{
/* initialize the system clock */
rt_hw_clock_init();
//add iomux init 2015-3-11 by yu.zhang for fh81(fullhan)
//iomux_init();
/* initialize the system clock */
rt_hw_clock_init();
//add iomux init 2015-3-11 by yu.zhang for fh81(fullhan)
//iomux_init();
fh_iomux_init(PMU_REG_BASE + 0x5c);
//add clk init 2015-3-11 by yu.zhang for fh81(fullhan)
clock_init();
/* initialize uart */
rt_hw_uart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
/* initialize timer1 */
rt_hw_timer_init();
//board data info init...
fh_board_info_init();
fh_platform_info_register();
//add clk init 2015-3-11 by yu.zhang for fh81(fullhan)
clock_init();
/* initialize uart */
rt_hw_uart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
/* initialize timer1 */
rt_hw_timer_init();
//board data info init...
fh_board_info_init();
fh_platform_info_register();
}
void rt_board_driver_init(){
//add board init lock here...
/*rt_show_version();*/
int ret;
//add board init lock here...
/*rt_show_version();*/
int ret;
/* Filesystem Initialization */
#ifdef RT_USING_DFS
{
/* init the device filesystem */
dfs_init();
rt_kprintf("DFS initialized!\n");
{
/* init the device filesystem */
dfs_init();
rt_kprintf("DFS initialized!\n");
#if defined(RT_USING_DFS_ELMFAT)
/* init the elm chan FatFs filesystam*/
elm_init();
rt_kprintf("ELM initialized!\n");
/* init the elm chan FatFs filesystam*/
elm_init();
rt_kprintf("ELM initialized!\n");
#endif
#if defined(RT_USING_DFS_ROMFS)
dfs_romfs_init();
if (dfs_mount(RT_NULL, "/rom", "rom", 0, &romfs_root) == 0)
{
rt_kprintf("ROM File System initialized!\n");
}
else
rt_kprintf("ROM File System initialzation failed!\n");
dfs_romfs_init();
if (dfs_mount(RT_NULL, "/rom", "rom", 0, &romfs_root) == 0)
{
rt_kprintf("ROM File System initialized!\n");
}
else
rt_kprintf("ROM File System initialzation failed!\n");
#endif
#if defined(RT_USING_DFS_DEVFS)
devfs_init();
if (dfs_mount(RT_NULL, "/dev", "devfs", 0, 0) == 0)
rt_kprintf("Device File System initialized!\n");
else
rt_kprintf("Device File System initialzation failed!\n");
devfs_init();
if (dfs_mount(RT_NULL, "/dev", "devfs", 0, 0) == 0)
rt_kprintf("Device File System initialized!\n");
else
rt_kprintf("Device File System initialzation failed!\n");
#ifdef RT_USING_NEWLIB
/* init libc */
libc_system_init(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef RT_USING_NEWLIB
/* init libc */
libc_system_init(RT_CONSOLE_DEVICE_NAME);
#endif
#endif
#if defined(RT_USING_DFS_UFFS)
{
/* init the uffs filesystem */
dfs_uffs_init();
{
/* init the uffs filesystem */
dfs_uffs_init();
/* mount flash device as flash directory */
if(dfs_mount("nand0", "/nand0", "uffs", 0, 0) == 0)
rt_kprintf("UFFS File System initialized!\n");
else
rt_kprintf("UFFS File System initialzation failed!\n");
}
/* mount flash device as flash directory */
if(dfs_mount("nand0", "/nand0", "uffs", 0, 0) == 0)
rt_kprintf("UFFS File System initialized!\n");
else
rt_kprintf("UFFS File System initialzation failed!\n");
}
#endif
#ifdef RT_USING_DFS_RAMFS
dfs_ramfs_init();
{
rt_uint8_t *ramfs_pool = RT_NULL;
struct dfs_ramfs* ramfs;
ramfs_pool = rt_malloc(0x800000);
if(ramfs_pool)
{
ramfs =(struct dfs_ramfs*) dfs_ramfs_create((rt_uint8_t*)ramfs_pool, 0x800000);
if (ramfs != RT_NULL)
{
if (dfs_mount(RT_NULL, "/", "ram", 0, ramfs) == 0)
{
rt_kprintf("Mount RAMDisk done!\n");
}
else
{
rt_kprintf("Mount RAMDisk failed.\n");
}
}
}
else
{
rt_kprintf("alloc ramfs poll failed\n");
}
}
dfs_ramfs_init();
{
rt_uint8_t *ramfs_pool = RT_NULL;
struct dfs_ramfs* ramfs;
ramfs_pool = rt_malloc(0x800000);
if(ramfs_pool)
{
ramfs =(struct dfs_ramfs*) dfs_ramfs_create((rt_uint8_t*)ramfs_pool, 0x800000);
if (ramfs != RT_NULL)
{
if (dfs_mount(RT_NULL, "/", "ram", 0, ramfs) == 0)
{
rt_kprintf("Mount RAMDisk done!\n");
}
else
{
rt_kprintf("Mount RAMDisk failed.\n");
}
}
}
else
{
rt_kprintf("alloc ramfs poll failed\n");
}
}
#endif
}
}
#endif
/* Filesystem Initialization end*/
#ifdef RT_USING_GPIO
{
rt_hw_gpio_init();
rt_kprintf("GPIO initialized!\n");
rt_kprintf("GPIO initialized!\n");
#ifdef RT_USING_SDIO
//wifi
@ -572,7 +572,7 @@ void rt_board_driver_init(){
//micro sd
gpio_request(HW_SDCARD_POWER_GPIO);
gpio_direction_output(HW_SDCARD_POWER_GPIO, 0);
rt_kprintf("SDIO initialized!\n");
rt_kprintf("SDIO initialized!\n");
#endif
//sensor
gpio_request(HW_CIS_RST_GPIO);
@ -585,7 +585,7 @@ void rt_board_driver_init(){
#ifdef RT_USING_SDIO
#ifndef RT_USING_WIFI_MARVEL
rt_hw_mmc_init();
rt_kprintf("MMC initialized!\n");
rt_kprintf("MMC initialized!\n");
rt_thread_delay(RT_TICK_PER_SECOND*2);
/* mount sd card fat partition 1 as root directory */
#ifdef RT_USING_DFS_ELMFAT
@ -601,56 +601,56 @@ void rt_board_driver_init(){
#ifdef RT_USING_FH_DMA
{
{
rt_fh_dma_init();
rt_kprintf("DMA initialized!\n");
}
rt_kprintf("DMA initialized!\n");
}
#endif
#ifdef RT_USING_FH_ACW
{
fh_audio_init();
rt_kprintf("AUDIO initialized!\n");
}
{
fh_audio_init();
rt_kprintf("AUDIO initialized!\n");
}
#endif
#ifdef RT_USING_LWIP
{
/* init lwip system */
lwip_sys_init();
rt_kprintf("LWIP SYS initialized!\n");
eth_system_device_init();
rt_kprintf("ETH initialized!\n");
}
{
/* init lwip system */
lwip_sys_init();
rt_kprintf("LWIP SYS initialized!\n");
eth_system_device_init();
rt_kprintf("ETH initialized!\n");
}
#endif
#ifdef RT_USING_GMAC
/* register ethernetif device */
rt_app_fh_gmac_init();
rt_kprintf("GMAC initialized!\n");
rt_kprintf("GMAC initialized!\n");
#endif
#ifdef RT_USING_I2C
{
rt_hw_i2c_init();
rt_kprintf("I2C initialized!\n");
}
{
rt_hw_i2c_init();
rt_kprintf("I2C initialized!\n");
}
#endif
#ifdef RT_USING_PWM
{
rt_hw_pwm_init();
rt_kprintf("PWM initialized!\n");
rt_kprintf("PWM initialized!\n");
}
#endif
#ifdef RT_USING_WDT
{
rt_hw_wdt_init();
rt_kprintf("WDT initialized!\n");
rt_kprintf("WDT initialized!\n");
}
#endif
@ -658,7 +658,7 @@ void rt_board_driver_init(){
#ifdef RT_USING_SPI
{
rt_hw_spi_init();
rt_kprintf("SPI initialized!\n");
rt_kprintf("SPI initialized!\n");
}
#endif
@ -668,21 +668,21 @@ void rt_board_driver_init(){
rt_kprintf("FLASH initialized!\n");
#endif
rt_kprintf("init done\n");
rt_kprintf("init done\n");
#ifdef RT_USING_SADC
rt_hw_sadc_init();
rt_kprintf("SADC initialized!\n");
rt_kprintf("SADC initialized!\n");
#endif
#ifdef RT_USING_ENC28J60
gpio_request(ENC28J60_INT);
gpio_direction_input(ENC28J60_INT);
gpio_set_irq_type(ENC28J60_INT, IRQ_TYPE_EDGE_FALLING);
rt_hw_interrupt_install(gpio_to_irq(ENC28J60_INT), (void *)enc28j60_isr, RT_NULL, RT_NULL);
gpio_irq_enable(gpio_to_irq(ENC28J60_INT));
gpio_release(ENC28J60_INT);
gpio_request(ENC28J60_INT);
gpio_direction_input(ENC28J60_INT);
gpio_set_irq_type(ENC28J60_INT, IRQ_TYPE_EDGE_FALLING);
rt_hw_interrupt_install(gpio_to_irq(ENC28J60_INT), (void *)enc28j60_isr, RT_NULL, RT_NULL);
gpio_irq_enable(gpio_to_irq(ENC28J60_INT));
gpio_release(ENC28J60_INT);
enc28j60_attach(ENC28J60_SPI_DEV);
enc28j60_attach(ENC28J60_SPI_DEV);
#endif
}

32
bsp/fh8620/platform/fh8620/iot_cam/board_def.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,18 +18,18 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef BOARD_DEF_H_
#define BOARD_DEF_H_
/* ***********************
* SECTION: DRIVE
* SECTION: DRIVE
* ***********************/
// Basic drive..
#define RT_USING_UART1
@ -49,22 +49,22 @@
#define CONFIG_PLAT_V2
#ifndef FH_DDR_START
#define FH_DDR_START 0xA0000000
#define FH_DDR_END 0xA1000000
#define FH_DDR_START 0xA0000000
#define FH_DDR_END 0xA1000000
#define FH_RTT_OS_MEM_SIZE 0x00600000
#define FH_DMA_MEM_SIZE 0x20000 /* 128k */
#define FH_RTT_OS_MEM_SIZE 0x00600000
#define FH_DMA_MEM_SIZE 0x20000 /* 128k */
#define FH_RTT_OS_MEM_END (FH_DDR_START + FH_RTT_OS_MEM_SIZE)
#define FH_SDK_MEM_START (FH_RTT_OS_MEM_END + FH_DMA_MEM_SIZE)
#define FH_RTT_OS_HEAP_END FH_SDK_MEM_START
#define FH_SDK_MEM_SIZE (FH_DDR_END - FH_SDK_MEM_START)
#define FH_RTT_OS_MEM_END (FH_DDR_START + FH_RTT_OS_MEM_SIZE)
#define FH_SDK_MEM_START (FH_RTT_OS_MEM_END + FH_DMA_MEM_SIZE)
#define FH_RTT_OS_HEAP_END FH_SDK_MEM_START
#define FH_SDK_MEM_SIZE (FH_DDR_END - FH_SDK_MEM_START)
#endif /* end of FH_DDR_START*/
/* ***********************
* SECTION: DRIVE COMPONENT
* SECTION: DRIVE COMPONENT
* ***********************/
#define UART_NAME "uart1"
#define UART_NAME "uart1"
#define RT_USING_DMA_MEM
#define RT_USING_MCI0

1270
bsp/fh8620/platform/fh8620/iot_cam/iomux.c
View File

File diff suppressed because it is too large Load Diff

74
bsp/fh8620/platform/fh8620/iot_cam/startup.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include <rthw.h>
#include <rtthread.h>
#include <mmu.h>
@ -50,13 +50,13 @@ extern void rt_system_heap_init(void*, void*);
extern void rt_hw_finsh_init(void);
extern void rt_application_init(void);
static struct mem_desc fh_mem_desc[] =
static struct mem_desc fh_mem_desc[] =
{
{ 0xA0000000, FH_RTT_OS_MEM_END-1, 0xA0000000, SECT_RWX_CB, 0, SECT_MAPPED },
{ FH_RTT_OS_MEM_END, FH_DDR_END-1, FH_RTT_OS_MEM_END, SECT_RWNX_NCNB, 0, SECT_MAPPED },
{ 0xFFFF0000, 0xFFFF1000-1, 0xA0000000, SECT_TO_PAGE, PAGE_ROX_CB, PAGE_MAPPED }, /* isr vector table */
{ 0xE0000000, 0xF1300000-1, 0xE0000000, SECT_RWNX_NCNB, 0, SECT_MAPPED }, /* io table */
{ 0xF4000000, 0xF4100000-1, 0xF4000000, SECT_RWNX_NCNB, 0, SECT_MAPPED }, /* GPIO#1 io table */
{ 0xA0000000, FH_RTT_OS_MEM_END-1, 0xA0000000, SECT_RWX_CB, 0, SECT_MAPPED },
{ FH_RTT_OS_MEM_END, FH_DDR_END-1, FH_RTT_OS_MEM_END, SECT_RWNX_NCNB, 0, SECT_MAPPED },
{ 0xFFFF0000, 0xFFFF1000-1, 0xA0000000, SECT_TO_PAGE, PAGE_ROX_CB, PAGE_MAPPED }, /* isr vector table */
{ 0xE0000000, 0xF1300000-1, 0xE0000000, SECT_RWNX_NCNB, 0, SECT_MAPPED }, /* io table */
{ 0xF4000000, 0xF4100000-1, 0xF4000000, SECT_RWNX_NCNB, 0, SECT_MAPPED }, /* GPIO#1 io table */
};
rt_uint8_t _irq_stack_start[1024];
@ -72,46 +72,46 @@ extern unsigned char __bss_end;
*/
void rtthread_startup(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* initialize hardware interrupt */
rt_hw_interrupt_init();
/* disable interrupt first */
rt_hw_interrupt_disable();
/* initialize hardware interrupt */
rt_hw_interrupt_init();
/* initialize mmu */
rt_hw_mmu_init(fh_mem_desc, sizeof(fh_mem_desc)/sizeof(fh_mem_desc[0]));
/* initialize mmu */
rt_hw_mmu_init(fh_mem_desc, sizeof(fh_mem_desc)/sizeof(fh_mem_desc[0]));
rt_system_heap_init((void*)&__bss_end, (void*)FH_RTT_OS_MEM_END);
rt_system_heap_init((void*)&__bss_end, (void*)FH_RTT_OS_MEM_END);
#ifdef RT_USING_DMA_MEM
//just use the last 100KB
fh_dma_mem_init((rt_uint32_t *)FH_RTT_OS_MEM_END, FH_DMA_MEM_SIZE);
//just use the last 100KB
fh_dma_mem_init((rt_uint32_t *)FH_RTT_OS_MEM_END, FH_DMA_MEM_SIZE);
#endif
/* initialize board */
rt_hw_board_init();
/* initialize board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* show version */
rt_show_version();
/* initialize timer system */
rt_system_timer_init();
/* initialize timer system */
rt_system_timer_init();
/* initialize scheduler system */
rt_system_scheduler_init();
/* initialize scheduler system */
rt_system_scheduler_init();
/* initialize application */
rt_application_init();
/* initialize application */
rt_application_init();
/* initialize system timer thread */
rt_system_timer_thread_init();
/* initialize system timer thread */
rt_system_timer_thread_init();
/* initialize idle thread */
rt_thread_idle_init();
/* initialize idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
/* never reach here */
return ;
return ;
}

8
bsp/fh8620/platform/fh_arch.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef FH_ARCH_H_
#define FH_ARCH_H_

48
bsp/fh8620/platform/fh_def.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef FH_DEF_H_
#define FH_DEF_H_
@ -32,29 +32,29 @@
#define MIN(a,b) ((a) < (b) ? (a) : (b))
#define MAX(a,b) ((a) > (b) ? (a) : (b))
typedef char SINT8;
typedef short SINT16;
typedef int SINT32;
typedef long long SINT64;
typedef unsigned char UINT8;
typedef unsigned short UINT16;
typedef unsigned int UINT32;
typedef unsigned long long UINT64;
typedef char SINT8;
typedef short SINT16;
typedef int SINT32;
typedef long long SINT64;
typedef unsigned char UINT8;
typedef unsigned short UINT16;
typedef unsigned int UINT32;
typedef unsigned long long UINT64;
#ifndef TYPE_DEFINED
typedef unsigned char uchar;
typedef signed char int8;
typedef unsigned char uint8;
typedef signed short int16;
typedef unsigned short uint16;
typedef signed int int32;
typedef unsigned int uint32;
typedef signed long long int64;
typedef unsigned long long uint64;
typedef float ieee_single;
typedef double ieee_double;
typedef unsigned char uchar;
typedef signed char int8;
typedef unsigned char uint8;
typedef signed short int16;
typedef unsigned short uint16;
typedef signed int int32;
typedef unsigned int uint32;
typedef signed long long int64;
typedef unsigned long long uint64;
typedef float ieee_single;
typedef double ieee_double;
typedef unsigned long boolean;
typedef unsigned long boolean;
#define TYPE_DEFINED

68
bsp/fh8620/platform/plat-v2/arch.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,53 +18,53 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef ARCH_H_
#define ARCH_H_
/*****************************/
/* BSP CONTROLLER BASE */
/*****************************/
#define INTC_REG_BASE (0xE0200000)
#define SDC0_REG_BASE (0xE2000000)
#define SDC1_REG_BASE (0xE2100000)
#define TVE_REG_BASE (0xE8000000)
#define VOU_REG_BASE (0xE8100000)
#define AES_REG_BASE (0xE8200000)
#define INTC_REG_BASE (0xE0200000)
#define SDC0_REG_BASE (0xE2000000)
#define SDC1_REG_BASE (0xE2100000)
#define TVE_REG_BASE (0xE8000000)
#define VOU_REG_BASE (0xE8100000)
#define AES_REG_BASE (0xE8200000)
/*
#define JPEG_REG_BASE (0xE8300000)
#define ISPB_REG_BASE (0xEA000000)
#define ISPF_REG_BASE (0xEA100000)
#define VPU_REG_BASE (0xEC000000)
#define VCU_REG_BASE (0xEC100000)
#define DDRC_REG_BASE (0xED000000)
#define JPEG_REG_BASE (0xE8300000)
#define ISPB_REG_BASE (0xEA000000)
#define ISPF_REG_BASE (0xEA100000)
#define VPU_REG_BASE (0xEC000000)
#define VCU_REG_BASE (0xEC100000)
#define DDRC_REG_BASE (0xED000000)
*/
#define DMAC_REG_BASE (0xEE000000)
#define GMAC_REG_BASE (0xEF000000)
#define PMU_REG_BASE (0xF0000000)
#define I2C0_REG_BASE (0xF0200000)
#define GPIO0_REG_BASE (0xF0300000)
#define DMAC_REG_BASE (0xEE000000)
#define GMAC_REG_BASE (0xEF000000)
#define PMU_REG_BASE (0xF0000000)
#define I2C0_REG_BASE (0xF0200000)
#define GPIO0_REG_BASE (0xF0300000)
#define GPIO1_REG_BASE (0xf4000000)
#define PWM_REG_BASE (0xF0400000)
#define SPI0_REG_BASE (0xF0500000)
#define SPI1_REG_BASE (0xF0600000)
#define UART0_REG_BASE (0xF0700000)
#define UART1_REG_BASE (0xF0800000)
/*#define I2S_REG_BASE (0xF0900000)*/
#define ACODEC_REG_BASE (0xF0A00000)
#define I2C1_REG_BASE (0xF0B00000)
#define TMR_REG_BASE (0xF0C00000)
#define WDT_REG_BASE (0xF0D00000)
#define PWM_REG_BASE (0xF0400000)
#define SPI0_REG_BASE (0xF0500000)
#define SPI1_REG_BASE (0xF0600000)
#define UART0_REG_BASE (0xF0700000)
#define UART1_REG_BASE (0xF0800000)
/*#define I2S_REG_BASE (0xF0900000)*/
#define ACODEC_REG_BASE (0xF0A00000)
#define I2C1_REG_BASE (0xF0B00000)
#define TMR_REG_BASE (0xF0C00000)
#define WDT_REG_BASE (0xF0D00000)
/*
#define DPHY_REG_BASE (0xF1000000)
#define MIPIC_REG_BASE (0xF1100000)
#define DPHY_REG_BASE (0xF1000000)
#define MIPIC_REG_BASE (0xF1100000)
*/
#define SADC_REG_BASE (0xF1200000)
#define SADC_REG_BASE (0xF1200000)
typedef enum IRQn
{

2872
bsp/fh8620/platform/plat-v2/clock.c
View File

File diff suppressed because it is too large Load Diff

20
bsp/fh8620/platform/plat-v2/clock.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef TIMER_H_
#define TIMER_H_
@ -43,12 +43,12 @@ void fh_pmu_open(void);
void fh_pmu_close(void);
*/
#define DIFF_SDC_REFCLK_0 (0)
#define DIFF_SDC_REFCLK_90 (1)
#define DIFF_SDC_REFCLK_180 (2)
#define DIFF_SDC_REFCLK_270 (3)
#define SDC_CLK_PARA_ERROR (0xffff0000)
#define SDC_CLK_PARA_OK (0)
#define DIFF_SDC_REFCLK_0 (0)
#define DIFF_SDC_REFCLK_90 (1)
#define DIFF_SDC_REFCLK_180 (2)
#define DIFF_SDC_REFCLK_270 (3)
#define SDC_CLK_PARA_ERROR (0xffff0000)
#define SDC_CLK_PARA_OK (0)
void clk_gate(struct fh_clk *p_clk);

36
bsp/fh8620/platform/plat-v2/fh_pmu.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,45 +18,45 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include "rtdebug.h"
#include "arch.h"
#include "fh_pmu.h"
#include "fh_def.h"
#define FH_PMU_WRITEL(offset,value) SET_REG((PMU_REG_BASE + offset),value)
#define FH_PMU_WRITEL_MASK(offset,value, mask) SET_REG_M((PMU_REG_BASE + offset), value, mask)
#define FH_PMU_READL(offset) GET_REG((PMU_REG_BASE + offset))
#define FH_PMU_WRITEL(offset,value) SET_REG((PMU_REG_BASE + offset),value)
#define FH_PMU_WRITEL_MASK(offset,value, mask) SET_REG_M((PMU_REG_BASE + offset), value, mask)
#define FH_PMU_READL(offset) GET_REG((PMU_REG_BASE + offset))
#define PMU_OFFSET_MAX 0x1d0
#define PMU_OFFSET_MAX 0x1d0
int fh_pmu_read(rt_uint32_t offset, rt_uint32_t *value)
{
RT_ASSERT(offset < PMU_OFFSET_MAX);
RT_ASSERT(offset < PMU_OFFSET_MAX);
*value = FH_PMU_READL(offset);
return 0;
*value = FH_PMU_READL(offset);
return 0;
}
int fh_pmu_write(rt_uint32_t offset, const rt_uint32_t value)
{
RT_ASSERT(offset < PMU_OFFSET_MAX);
RT_ASSERT(offset < PMU_OFFSET_MAX);
FH_PMU_WRITEL(offset, value);
return 0;
FH_PMU_WRITEL(offset, value);
return 0;
}
int fh_pmu_write_mask(rt_uint32_t offset, const rt_uint32_t value,
const rt_uint32_t mask)
const rt_uint32_t mask)
{
RT_ASSERT(offset < PMU_OFFSET_MAX);
RT_ASSERT(offset < PMU_OFFSET_MAX);
FH_PMU_WRITEL_MASK(offset, value, mask);
return 0;
FH_PMU_WRITEL_MASK(offset, value, mask);
return 0;
}

10
bsp/fh8620/platform/plat-v2/fh_pmu.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef FH_PMU_H_
#define FH_PMU_H_
@ -36,7 +36,7 @@
#define REG_PMU_PLL0_CTRL (0x010)
#define REG_PMU_PLL1_CTRL (0x014)
#define REG_PMU_ARC_CLK_GATE (0x018)
#define REG_PMU_CLK_GATE (0x01c)
#define REG_PMU_CLK_GATE (0x01c)
#define REG_PMU_CLK_SEL (0x020)
#define REG_PMU_CLK_DIV0 (0x024)
#define REG_PMU_CLK_DIV1 (0x028)

350
bsp/fh8620/platform/plat-v2/iomux.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,34 +18,34 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include "rtdebug.h"
#include "iomux.h"
static void fh_iomux_setmfs(Iomux_Pad *pad)
{
switch (pad->reg_type) {
case 8:
(IOMUX_PADTYPE(8)pad->reg)->bit.mfs = pad->func_sel;
break;
case 13:
(IOMUX_PADTYPE(13)pad->reg)->bit.mfs = pad->func_sel;
break;
case 20:
(IOMUX_PADTYPE(20)pad->reg)->bit.mfs = pad->func_sel;
break;
case 21:
(IOMUX_PADTYPE(21)pad->reg)->bit.mfs = pad->func_sel;
break;
default:
break;
}
switch (pad->reg_type) {
case 8:
(IOMUX_PADTYPE(8)pad->reg)->bit.mfs = pad->func_sel;
break;
case 13:
(IOMUX_PADTYPE(13)pad->reg)->bit.mfs = pad->func_sel;
break;
case 20:
(IOMUX_PADTYPE(20)pad->reg)->bit.mfs = pad->func_sel;
break;
case 21:
(IOMUX_PADTYPE(21)pad->reg)->bit.mfs = pad->func_sel;
break;
default:
break;
}
}
@ -53,50 +53,50 @@ static void fh_iomux_setmfs(Iomux_Pad *pad)
static int fh_iomux_getmfs(Iomux_Pad *pad)
{
int mfs;
int mfs;
switch (pad->reg_type) {
case 8:
mfs = (IOMUX_PADTYPE(8)pad->reg)->bit.mfs;
break;
case 13:
mfs = (IOMUX_PADTYPE(13)pad->reg)->bit.mfs;
break;
case 20:
mfs = (IOMUX_PADTYPE(20)pad->reg)->bit.mfs;
break;
case 21:
mfs = (IOMUX_PADTYPE(21)pad->reg)->bit.mfs;
break;
default:
mfs = -1;
break;
switch (pad->reg_type) {
case 8:
mfs = (IOMUX_PADTYPE(8)pad->reg)->bit.mfs;
break;
case 13:
mfs = (IOMUX_PADTYPE(13)pad->reg)->bit.mfs;
break;
case 20:
mfs = (IOMUX_PADTYPE(20)pad->reg)->bit.mfs;
break;
case 21:
mfs = (IOMUX_PADTYPE(21)pad->reg)->bit.mfs;
break;
default:
mfs = -1;
break;
}
return mfs;
}
return mfs;
}
static void fh_iomux_print()
{
int i;
UINT32 reg;
int i;
UINT32 reg;
for (i = 0; i < ARRAY_SIZE(fh81_iomux_cfg); i++) {
int curr_func;
for (i = 0; i < ARRAY_SIZE(fh81_iomux_cfg); i++) {
int curr_func;
curr_func = fh81_iomux_getmfs(iomux_obj, &iomux_obj.pads[i]);
reg = readl((UINT32)iomux_obj.pads[i].reg);
curr_func = fh81_iomux_getmfs(iomux_obj, &iomux_obj.pads[i]);
reg = readl((UINT32)iomux_obj.pads[i].reg);
if (curr_func < 0)
rt_kprintf("\t%d\t\t%-8s(no mfs)\t0x%08x\n", i, iomux_obj.pads[i].func_name[0],
reg);
else
rt_kprintf("\t%d\t\t%-16s\t0x%08x\n", i, iomux_obj.pads[i].func_name[curr_func],
reg);
if (curr_func < 0)
rt_kprintf("\t%d\t\t%-8s(no mfs)\t0x%08x\n", i, iomux_obj.pads[i].func_name[0],
reg);
else
rt_kprintf("\t%d\t\t%-16s\t0x%08x\n", i, iomux_obj.pads[i].func_name[curr_func],
reg);
}
}
}
@ -105,90 +105,90 @@ static void fh_iomux_print()
static void fh_iomux_setcur(Iomux_Pad *pad)
{
switch (pad->reg_type) {
case 5:
(IOMUX_PADTYPE(5)pad->reg)->bit.e8_e4 = pad->drv_cur;
break;
case 8:
(IOMUX_PADTYPE(8)pad->reg)->bit.e8_e4 = pad->drv_cur;
break;
case 13:
(IOMUX_PADTYPE(13)pad->reg)->bit.e4_e2 = pad->drv_cur;
break;
case 17:
(IOMUX_PADTYPE(17)pad->reg)->bit.e8_e4 = pad->drv_cur;
break;
case 20:
(IOMUX_PADTYPE(20)pad->reg)->bit.e4_e2 = pad->drv_cur;
break;
case 21:
(IOMUX_PADTYPE(21)pad->reg)->bit.e4_e2 = pad->drv_cur;
break;
default:
break;
}
switch (pad->reg_type) {
case 5:
(IOMUX_PADTYPE(5)pad->reg)->bit.e8_e4 = pad->drv_cur;
break;
case 8:
(IOMUX_PADTYPE(8)pad->reg)->bit.e8_e4 = pad->drv_cur;
break;
case 13:
(IOMUX_PADTYPE(13)pad->reg)->bit.e4_e2 = pad->drv_cur;
break;
case 17:
(IOMUX_PADTYPE(17)pad->reg)->bit.e8_e4 = pad->drv_cur;
break;
case 20:
(IOMUX_PADTYPE(20)pad->reg)->bit.e4_e2 = pad->drv_cur;
break;
case 21:
(IOMUX_PADTYPE(21)pad->reg)->bit.e4_e2 = pad->drv_cur;
break;
default:
break;
}
}
static void fh_iomux_setpupd(Iomux_Pad *pad)
{
switch (pad->reg_type) {
case 9:
(IOMUX_PADTYPE(9)pad->reg)->bit.pu_pd = pad->pupd;
break;
case 17:
(IOMUX_PADTYPE(17)pad->reg)->bit.pu_pd = pad->pupd;
break;
case 20:
(IOMUX_PADTYPE(20)pad->reg)->bit.pu_pd = pad->pupd;
break;
case 21:
(IOMUX_PADTYPE(21)pad->reg)->bit.pu_pd = pad->pupd;
break;
default:
break;
}
switch (pad->reg_type) {
case 9:
(IOMUX_PADTYPE(9)pad->reg)->bit.pu_pd = pad->pupd;
break;
case 17:
(IOMUX_PADTYPE(17)pad->reg)->bit.pu_pd = pad->pupd;
break;
case 20:
(IOMUX_PADTYPE(20)pad->reg)->bit.pu_pd = pad->pupd;
break;
case 21:
(IOMUX_PADTYPE(21)pad->reg)->bit.pu_pd = pad->pupd;
break;
default:
break;
}
}
static void fh_iomux_setrest(Iomux_Pad *pad)
{
switch (pad->reg_type) {
case 5:
(IOMUX_PADTYPE(5)pad->reg)->bit.sr = 0;
break;
case 8:
(IOMUX_PADTYPE(8)pad->reg)->bit.sr = 0;
break;
case 9:
(IOMUX_PADTYPE(9)pad->reg)->bit.ie = 1;
(IOMUX_PADTYPE(9)pad->reg)->bit.smt = 1;
break;
case 13:
(IOMUX_PADTYPE(13)pad->reg)->bit.ie = 1;
(IOMUX_PADTYPE(13)pad->reg)->bit.smt = 1;
break;
case 17:
(IOMUX_PADTYPE(17)pad->reg)->bit.sr = 0;
(IOMUX_PADTYPE(17)pad->reg)->bit.ie = 1;
(IOMUX_PADTYPE(17)pad->reg)->bit.e = 1;
(IOMUX_PADTYPE(17)pad->reg)->bit.smt = 1;
break;
case 20:
(IOMUX_PADTYPE(20)pad->reg)->bit.sr = 0;
(IOMUX_PADTYPE(20)pad->reg)->bit.ie = 1;
(IOMUX_PADTYPE(20)pad->reg)->bit.smt = 1;
break;
case 21:
(IOMUX_PADTYPE(21)pad->reg)->bit.sr = 0;
(IOMUX_PADTYPE(21)pad->reg)->bit.ie = 1;
(IOMUX_PADTYPE(21)pad->reg)->bit.smt = 1;
break;
default:
break;
}
switch (pad->reg_type) {
case 5:
(IOMUX_PADTYPE(5)pad->reg)->bit.sr = 0;
break;
case 8:
(IOMUX_PADTYPE(8)pad->reg)->bit.sr = 0;
break;
case 9:
(IOMUX_PADTYPE(9)pad->reg)->bit.ie = 1;
(IOMUX_PADTYPE(9)pad->reg)->bit.smt = 1;
break;
case 13:
(IOMUX_PADTYPE(13)pad->reg)->bit.ie = 1;
(IOMUX_PADTYPE(13)pad->reg)->bit.smt = 1;
break;
case 17:
(IOMUX_PADTYPE(17)pad->reg)->bit.sr = 0;
(IOMUX_PADTYPE(17)pad->reg)->bit.ie = 1;
(IOMUX_PADTYPE(17)pad->reg)->bit.e = 1;
(IOMUX_PADTYPE(17)pad->reg)->bit.smt = 1;
break;
case 20:
(IOMUX_PADTYPE(20)pad->reg)->bit.sr = 0;
(IOMUX_PADTYPE(20)pad->reg)->bit.ie = 1;
(IOMUX_PADTYPE(20)pad->reg)->bit.smt = 1;
break;
case 21:
(IOMUX_PADTYPE(21)pad->reg)->bit.sr = 0;
(IOMUX_PADTYPE(21)pad->reg)->bit.ie = 1;
(IOMUX_PADTYPE(21)pad->reg)->bit.smt = 1;
break;
default:
break;
}
}
@ -198,13 +198,13 @@ extern const int fh_iomux_cfg_count;
void __fh_setiomux(Iomux_Pad *pad, void *iobase)
{
UINT32 regvalue = 0;
pad->reg = &regvalue;
fh_iomux_setmfs(pad);
fh_iomux_setcur(pad);
fh_iomux_setpupd(pad);
fh_iomux_setrest(pad);
SET_REG(iobase, regvalue);
UINT32 regvalue = 0;
pad->reg = &regvalue;
fh_iomux_setmfs(pad);
fh_iomux_setcur(pad);
fh_iomux_setpupd(pad);
fh_iomux_setrest(pad);
SET_REG(iobase, regvalue);
}
static UINT32 g_iomux_base;
@ -212,73 +212,73 @@ static UINT32 g_iomux_base;
void fh_iomux_init(UINT32 base)
{
// return;
int i;
// int test_cnt = 0;
UINT32 reg;
g_iomux_base = base;
// return;
int i;
// int test_cnt = 0;
UINT32 reg;
g_iomux_base = base;
iomux_obj.pbase = (void *)base;
iomux_obj.pbase = (void *)base;
// iomux_obj.vbase = (UINT32 *)rt_malloc(1024);
iomux_obj.pads = fh_iomux_cfg;
// iomux_obj.vbase = (UINT32 *)rt_malloc(1024);
iomux_obj.pads = fh_iomux_cfg;
for (i = 0; i < fh_iomux_cfg_count; i++) {
for (i = 0; i < fh_iomux_cfg_count; i++) {
#if (1)
iomux_obj.pads[i].id = i;
iomux_obj.pads[i].reg_offset = i * 4;
iomux_obj.pads[i].reg = &reg;//(UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset);
fh_iomux_setmfs(&fh_iomux_cfg[i]);
fh_iomux_setcur(&fh_iomux_cfg[i]);
fh_iomux_setpupd(&fh_iomux_cfg[i]);
fh_iomux_setrest(&fh_iomux_cfg[i]);
SET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset, reg);
// *((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset)));
//rt_kprintf("addr: 0x%x, pmu data: 0x%x\n", iomux_obj.pbase + iomux_obj.pads[i].reg_offset, GET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset));
// test_cnt++;
iomux_obj.pads[i].id = i;
iomux_obj.pads[i].reg_offset = i * 4;
iomux_obj.pads[i].reg = &reg;//(UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset);
fh_iomux_setmfs(&fh_iomux_cfg[i]);
fh_iomux_setcur(&fh_iomux_cfg[i]);
fh_iomux_setpupd(&fh_iomux_cfg[i]);
fh_iomux_setrest(&fh_iomux_cfg[i]);
SET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset, reg);
// *((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset)));
//rt_kprintf("addr: 0x%x, pmu data: 0x%x\n", iomux_obj.pbase + iomux_obj.pads[i].reg_offset, GET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset));
// test_cnt++;
#else
#ifdef FH_USING_JTAG
if (strncmp(fh_iomux_cfg[i].func_name[0], "JTAG", 4) == 0)
continue;
if (strncmp(fh_iomux_cfg[i].func_name[0], "JTAG", 4) == 0)
continue;
#endif
/*
if (strncmp(fh_iomux_cfg[i].func_name[1], "UART1", 5) == 0)
break;
if (strncmp(fh_iomux_cfg[i].func_name[1], "UART1", 5) == 0)
break;
*/
__fh_setiomux(&fh_iomux_cfg[i], (void *) base + i * 4);
__fh_setiomux(&fh_iomux_cfg[i], (void *) base + i * 4);
#endif
}
}
#ifdef CONFIG_RMII
//(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 1;
reg = GET_REG(0xf00000a4);
reg |= (1 << 13);
SET_REG(0xf00000a4, reg);
//(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 1;
reg = GET_REG(0xf00000a4);
reg |= (1 << 13);
SET_REG(0xf00000a4, reg);
#else
//(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 0;
reg = GET_REG(0xf00000a4);
reg &= ~(1 << 13);
SET_REG(0xf00000a4, reg);
//(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 0;
reg = GET_REG(0xf00000a4);
reg &= ~(1 << 13);
SET_REG(0xf00000a4, reg);
#endif
#ifdef IOMUX_DEBUG
fh_iomux_print(iomux_obj);
fh_iomux_print(iomux_obj);
#endif
//rt_free(iomux_obj.vbase);
//iomux_obj.vbase = 0;
//rt_free(iomux_obj.vbase);
//iomux_obj.vbase = 0;
}
void fh_iomux_pin_switch(int pin_num, int func_num)
{
RT_ASSERT(pin_num < fh_iomux_cfg_count);
__fh_setiomux(&fh_iomux_cfg[pin_num], (void *)g_iomux_base + pin_num * 4);
/*
fh_iomux_cfg[pin_num].func_sel = func_num;
fh_iomux_setmfs(&fh_iomux_cfg[pin_num]);
SET_REG(iomux_obj.pbase + iomux_obj.pads[pin_num].reg_offset, *((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[pin_num].reg_offset)));
*/
RT_ASSERT(pin_num < fh_iomux_cfg_count);
__fh_setiomux(&fh_iomux_cfg[pin_num], (void *)g_iomux_base + pin_num * 4);
/*
fh_iomux_cfg[pin_num].func_sel = func_num;
fh_iomux_setmfs(&fh_iomux_cfg[pin_num]);
SET_REG(iomux_obj.pbase + iomux_obj.pads[pin_num].reg_offset, *((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[pin_num].reg_offset)));
*/
}

214
bsp/fh8620/platform/plat-v2/iomux.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef IOMUX_H_
#define IOMUX_H_
@ -126,179 +126,179 @@
#define PMU_PAD_MAC_TXER (92)
#define IOMUX_PADTYPE(n) (Iomux_PadType##n *)
#define IOMUX_PUPD_NONE 0
#define IOMUX_PUPD_DOWN 1
#define IOMUX_PUPD_UP 2
#define IOMUX_PUPD_KEEPER 3
#define IOMUX_PADTYPE(n) (Iomux_PadType##n *)
#define IOMUX_PUPD_NONE 0
#define IOMUX_PUPD_DOWN 1
#define IOMUX_PUPD_UP 2
#define IOMUX_PUPD_KEEPER 3
//#define IOMUX_DEBUG
typedef union
{
struct
{
UINT32 sr :1;
UINT32 reserved_3_1 :3;
struct
{
UINT32 sr :1;
UINT32 reserved_3_1 :3;
UINT32 e8_e4 :2;
UINT32 reserved_31_6 :24;
UINT32 e8_e4 :2;
UINT32 reserved_31_6 :24;
}bit;
UINT32 dw;
}bit;
UINT32 dw;
}Iomux_PadType5;
typedef union
{
struct
{
UINT32 sr :1;
UINT32 reserved_3_1 :3;
struct
{
UINT32 sr :1;
UINT32 reserved_3_1 :3;
UINT32 e8_e4 :2;
UINT32 reserved_7_6 :2;
UINT32 e8_e4 :2;
UINT32 reserved_7_6 :2;
UINT32 mfs :1;
UINT32 reserved_31_9 :23;
UINT32 mfs :1;
UINT32 reserved_31_9 :23;
}bit;
UINT32 dw;
}bit;
UINT32 dw;
}Iomux_PadType8;
typedef union
{
struct
{
UINT32 smt :1;
UINT32 reserved_3_1 :3;
struct
{
UINT32 smt :1;
UINT32 reserved_3_1 :3;
UINT32 ie :1;
UINT32 reserved_7_5 :3;
UINT32 ie :1;
UINT32 reserved_7_5 :3;
UINT32 pu_pd :2;
UINT32 reserved_31_10 :22;
UINT32 pu_pd :2;
UINT32 reserved_31_10 :22;
}bit;
UINT32 dw;
}bit;
UINT32 dw;
}Iomux_PadType9;
typedef union
{
struct
{
UINT32 e4_e2 :2;
UINT32 reserved_3_2 :2;
struct
{
UINT32 e4_e2 :2;
UINT32 reserved_3_2 :2;
UINT32 smt :1;
UINT32 reserved_7_5 :3;
UINT32 smt :1;
UINT32 reserved_7_5 :3;
UINT32 ie :1;
UINT32 reserved_11_9 :3;
UINT32 ie :1;
UINT32 reserved_11_9 :3;
UINT32 mfs :2;
UINT32 reserved_31_14 :18;
UINT32 mfs :2;
UINT32 reserved_31_14 :18;
}bit;
UINT32 dw;
}bit;
UINT32 dw;
}Iomux_PadType13;
typedef union
{
struct
{
UINT32 sr :1;
UINT32 reserved_3_1 :3;
struct
{
UINT32 sr :1;
UINT32 reserved_3_1 :3;
UINT32 e8_e4 :2;
UINT32 reserved_7_6 :2;
UINT32 e8_e4 :2;
UINT32 reserved_7_6 :2;
UINT32 smt :1;
UINT32 reserved_11_9 :3;
UINT32 smt :1;
UINT32 reserved_11_9 :3;
UINT32 ie :1;
UINT32 e :1; //only for PAD_MAC_REF_CLK_CFG (0x00a4)
UINT32 reserved_15_12 :2;
UINT32 ie :1;
UINT32 e :1; //only for PAD_MAC_REF_CLK_CFG (0x00a4)
UINT32 reserved_15_12 :2;
UINT32 pu_pd :2;
UINT32 reserved_31_18 :14;
UINT32 pu_pd :2;
UINT32 reserved_31_18 :14;
}bit;
UINT32 dw;
}bit;
UINT32 dw;
}Iomux_PadType17;
typedef union
{
struct
{
UINT32 sr :1;
UINT32 reserved_3_1 :3;
struct
{
UINT32 sr :1;
UINT32 reserved_3_1 :3;
UINT32 e4_e2 :2;
UINT32 reserved_7_6 :2;
UINT32 e4_e2 :2;
UINT32 reserved_7_6 :2;
UINT32 smt :1;
UINT32 reserved_11_9 :3;
UINT32 smt :1;
UINT32 reserved_11_9 :3;
UINT32 ie :1;
UINT32 reserved_15_13 :3;
UINT32 ie :1;
UINT32 reserved_15_13 :3;
UINT32 pu_pd :2;
UINT32 reserved_19_18 :2;
UINT32 pu_pd :2;
UINT32 reserved_19_18 :2;
UINT32 mfs :1;
UINT32 reserved_31_21 :11;
UINT32 mfs :1;
UINT32 reserved_31_21 :11;
}bit;
UINT32 dw;
}bit;
UINT32 dw;
}Iomux_PadType20;
typedef union
{
struct
{
UINT32 sr :1;
UINT32 reserved_3_1 :3;
struct
{
UINT32 sr :1;
UINT32 reserved_3_1 :3;
UINT32 e4_e2 :2;
UINT32 reserved_7_6 :2;
UINT32 e4_e2 :2;
UINT32 reserved_7_6 :2;
UINT32 smt :1;
UINT32 reserved_11_9 :3;
UINT32 smt :1;
UINT32 reserved_11_9 :3;
UINT32 ie :1;
UINT32 reserved_15_13 :3;
UINT32 ie :1;
UINT32 reserved_15_13 :3;
UINT32 pu_pd :2;
UINT32 reserved_19_18 :2;
UINT32 pu_pd :2;
UINT32 reserved_19_18 :2;
UINT32 mfs :2;
UINT32 reserved_31_21 :10;
UINT32 mfs :2;
UINT32 reserved_31_21 :10;
}bit;
UINT32 dw;
}bit;
UINT32 dw;
}Iomux_PadType21;
typedef struct
{
int id;
UINT32* reg;
UINT32 reg_offset;
char* func_name[4];
int reg_type;
int func_sel;
int drv_cur;
int pupd;
//UINT32 value;
UINT32* reg;
UINT32 reg_offset;
char* func_name[4];
int reg_type;
int func_sel;
int drv_cur;
int pupd;
//UINT32 value;
}Iomux_Pad;
typedef struct
{
void *vbase;
void *pbase;
Iomux_Pad *pads;
void *vbase;
void *pbase;
Iomux_Pad *pads;
}Iomux_Object;

14
bsp/fh8620/platform/plat-v2/reset.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include <rthw.h>
#include <rtthread.h>
#include "fh_pmu.h"
@ -32,13 +32,13 @@
void machine_reset(void)
{
fh_pmu_write(REG_PMU_SWRST_MAIN_CTRL, 0x7fffffff);
fh_pmu_write(REG_PMU_SWRST_MAIN_CTRL, 0x7fffffff);
}
void machine_shutdown(void)
{
while(1)
;
while(1)
;
}

84
bsp/fh8620/platform/plat-v2/timer.c
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
@ -43,48 +43,48 @@ static unsigned long long timestamp;
rt_uint32_t read_pts(void)
{
return GET_REG(REG_PAE_PTS_REG);
return GET_REG(REG_PAE_PTS_REG);
}
unsigned long long get_ticks(void)
{
rt_uint32_t now = read_pts();
if (now >= lastdec) {
/* normal mode */
timestamp += now - lastdec;
} else {
now = read_pts();
if (now >= lastdec)
timestamp += now - lastdec;
else {
/* we have an overflow ... */
timestamp += now + 0xffffffff - lastdec;
}
}
lastdec = now;
return timestamp / (TICKS_PER_USEC * 10);
rt_uint32_t now = read_pts();
if (now >= lastdec) {
/* normal mode */
timestamp += now - lastdec;
} else {
now = read_pts();
if (now >= lastdec)
timestamp += now - lastdec;
else {
/* we have an overflow ... */
timestamp += now + 0xffffffff - lastdec;
}
}
lastdec = now;
return timestamp / (TICKS_PER_USEC * 10);
}
void udelay(unsigned long usec)
{
unsigned long long tmp;
rt_uint32_t tmo;
tmo = (usec + 9) / 10;
tmp = get_ticks() + tmo; /* get current timestamp */
unsigned long long tmp;
rt_uint32_t tmo;
tmo = (usec + 9) / 10;
tmp = get_ticks() + tmo; /* get current timestamp */
while (get_ticks() < tmp)
/* loop till event */
/*NOP*/;
while (get_ticks() < tmp)
/* loop till event */
/*NOP*/;
}
void rt_timer_handler(int vector, void *param)
{
timer *tim = param;
timer *tim = param;
rt_interrupt_enter();
timer_get_eoi(tim);
rt_tick_increase();
rt_interrupt_leave();
rt_interrupt_enter();
timer_get_eoi(tim);
rt_tick_increase();
rt_interrupt_leave();
}
/**
@ -92,18 +92,18 @@ void rt_timer_handler(int vector, void *param)
*/
void rt_hw_timer_init()
{
timer *tim = (timer *) TMR_REG_BASE;
timer_init(tim);
/* install interrupt handler */
rt_hw_interrupt_install(TMR0_IRQn, rt_timer_handler, (void *) tim,
"sys_tick");
rt_hw_interrupt_umask(TMR0_IRQn);
timer *tim = (timer *) TMR_REG_BASE;
timer_init(tim);
/* install interrupt handler */
rt_hw_interrupt_install(TMR0_IRQn, rt_timer_handler, (void *) tim,
"sys_tick");
rt_hw_interrupt_umask(TMR0_IRQn);
timer_set_mode(tim, TIMER_MODE_PERIODIC);
timer_set_period(tim, RT_TICK_PER_SECOND, TIMER_CLOCK);
//timer_set_period(tim, RT_TIMER_TICK_PER_SECOND, TIMER_CLOCK);
timer_enable_irq(tim);
timer_enable(tim);
timer_set_mode(tim, TIMER_MODE_PERIODIC);
timer_set_period(tim, RT_TICK_PER_SECOND, TIMER_CLOCK);
//timer_set_period(tim, RT_TIMER_TICK_PER_SECOND, TIMER_CLOCK);
timer_enable_irq(tim);
timer_enable(tim);
}

8
bsp/fh8620/platform/plat-v2/timer.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef TIMER_H_
#define TIMER_H_

8
bsp/fh8620/platform/platform_def.h
View File

@ -1,8 +1,8 @@
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Visit http://www.fullhan.com to get contact with Fullhan.
* Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef PLATFORM_DEF_H_
#define PLATFORM_DEF_H_

48
bsp/fh8620/rtconfig.h
View File

@ -5,19 +5,19 @@
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// <integer name="RT_NAME_MAX" description="Maximal size of kernel object name length" default="6" />
#define RT_NAME_MAX 16
#define RT_NAME_MAX 16
// <integer name="RT_ALIGN_SIZE" description="Alignment size for CPU architecture data access" default="4" />
#define RT_ALIGN_SIZE 4
#define RT_ALIGN_SIZE 4
// <integer name="RT_THREAD_PRIORITY_MAX" description="Maximal level of thread priority" default="32">
// <item description="8">8</item>
// <item description="32">32</item>
// <item description="256">256</item>
// </integer>
#define RT_THREAD_PRIORITY_MAX 256
#define RT_THREAD_PRIORITY_MAX 256
// <integer name="RT_TICK_PER_SECOND" description="OS tick per second" default="100" />
#define RT_TICK_PER_SECOND 100
#define RT_TICK_PER_SECOND 100
// <integer name="IDLE_THREAD_STACK_SIZE" description="The stack size of idle thread" default="512" />
#define IDLE_THREAD_STACK_SIZE 512
#define IDLE_THREAD_STACK_SIZE 512
// <bool name="RT_USING_MODULE" description="Using Application Module" default="true" />
// #define RT_USING_MODULE
// <bool name="RT_USING_CPU_FFS" description="Using CPU instructions for ffs function" default="true" />
@ -36,11 +36,11 @@
// <section name="RT_USING_TIMER_SOFT" description="Using software timer which will start a thread to handle soft-timer" default="true" >
// #define RT_USING_TIMER_SOFT
// <integer name="RT_TIMER_THREAD_PRIO" description="The priority level of timer thread" default="4" />
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_PRIO 4
// <integer name="RT_TIMER_THREAD_STACK_SIZE" description="The stack size of timer thread" default="512" />
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_THREAD_STACK_SIZE 512
// <integer name="RT_TIMER_TICK_PER_SECOND" description="The soft-timer tick per second" default="10" />
#define RT_TIMER_TICK_PER_SECOND 100
#define RT_TIMER_TICK_PER_SECOND 100
// </section>
// <section name="IPC" description="Inter-Thread communication" default="always" >
@ -86,13 +86,13 @@
// <bool name="RT_USING_RTC" description="Using RTC Device Driver Framework" default="true" />
//#define RT_USING_RTC
// <integer name="RT_MMCSD_THREAD_PREORITY" description="The prority of mmcsd thread" default="15" />
#define RT_MMCSD_THREAD_PREORITY 15
#define RT_MMCSD_THREAD_PREORITY 15
// <section name="RT_USING_CONSOLE" description="Using console" default="true" >
#define RT_USING_CONSOLE
// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLEBUF_SIZE 128
// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart" />
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_CONSOLE_DEVICE_NAME "uart1"
// </section>
// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
@ -105,7 +105,7 @@
// <bool name="FINSH_USING_DESCRIPTION" description="Keeping description in symbol table" default="true" />
#define FINSH_USING_DESCRIPTION
// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_THREAD_STACK_SIZE 4096
// </section>
// <section name="LIBC" description="C Runtime library setting" default="always" >
@ -124,9 +124,9 @@
// <bool name="DFS_USING_WORKDIR" description="Using working directory" default="true" />
#define DFS_USING_WORKDIR
// <integer name="DFS_FILESYSTEMS_MAX" description="The maximal number of mounted file system" default="4" />
#define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEMS_MAX 2
// <integer name="DFS_FD_MAX" description="The maximal number of opened files" default="4" />
#define DFS_FD_MAX 16
#define DFS_FD_MAX 16
// <bool name="RT_USING_DFS_ELMFAT" description="Using ELM FatFs" default="true" />
#define RT_USING_DFS_ELMFAT
// <integer name="RT_DFS_ELM_DRIVES" description="The maximal number of drives of FatFs" default="4" />
@ -138,13 +138,13 @@
// <item description="LFN with dynamic LFN working buffer on the stack">2</item>
// <item description="LFN with dynamic LFN working buffer on the heap">3</item>
// </integer>
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_USE_LFN 3
// <integer name="RT_DFS_ELM_CODE_PAGE" description="OEM code page" default="936">
#define RT_DFS_ELM_CODE_PAGE 936
#define RT_DFS_ELM_CODE_PAGE 936
// <bool name="RT_DFS_ELM_CODE_PAGE_FILE" description="Using OEM code page file" default="false" />
#define RT_DFS_ELM_CODE_PAGE_FILE
// <integer name="RT_DFS_ELM_MAX_LFN" description="Maximal size of file name length" default="255" />
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_MAX_LFN 255
// <integer name="RT_DFS_ELM_MAX_SECTOR_SIZE" description="Maximal size of sector" default="512" />
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
// <bool name="RT_USING_DFS_YAFFS2" description="Using YAFFS2" default="false" />
@ -174,19 +174,19 @@
// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />
#define RT_LWIP_DHCP
// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_PRIORITY 12
// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
// <integer name="RT_LWIP_TCPTHREAD_STACKSIZE" description="the thread stack size of TCP thread" default="4096" />
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
// <integer name="RT_LWIP_ETHTHREAD_PRIORITY" description="the thread priority of ethnetif thread" default="144" />
#define RT_LWIP_ETHTHREAD_PRIORITY 14
#define RT_LWIP_ETHTHREAD_PRIORITY 14
// <integer name="RT_LWIP_ETHTHREAD_MBOX_SIZE" description="the mail box size of ethnetif thread to wait for" default="8" />
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
// <integer name="RT_LWIP_ETHTHREAD_STACKSIZE" description="the stack size of ethnetif thread" default="512" />
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
// <ipaddr name="RT_LWIP_IPADDR" description="IP address of device" default="192.168.1.30" />
#define RT_LWIP_IPADDR "192.168.1.30"
#define RT_LWIP_IPADDR "192.168.1.30"
// <ipaddr name="RT_LWIP_GWADDR" description="Gateway address of device" default="192.168.1.1" />
#define RT_LWIP_GWADDR "192.168.1.1"
// <ipaddr name="RT_LWIP_MSKADDR" description="Mask address of device" default="255.255.255.0" />