diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/adc_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/adc_config.h new file mode 100644 index 0000000000..739598e7d0 --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/adc_config.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-01-05 zylx first version + * 2019-01-08 SummerGift clean up the code + */ + +#ifndef __ADC_CONFIG_H__ +#define __ADC_CONFIG_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef BSP_USING_ADC1 +#ifndef ADC1_CONFIG +#define ADC1_CONFIG \ + { \ + .Instance = ADC1, \ + .Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1, \ + .Init.Resolution = ADC_RESOLUTION_12B, \ + .Init.DataAlign = ADC_DATAALIGN_RIGHT, \ + .Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD, \ + .Init.EOCSelection = ADC_EOC_SINGLE_CONV, \ + .Init.LowPowerAutoWait = DISABLE, \ + .Init.LowPowerAutoPowerOff = DISABLE, \ + .Init.ContinuousConvMode = DISABLE, \ + .Init.DiscontinuousConvMode = ENABLE, \ + .Init.ExternalTrigConv = ADC_SOFTWARE_START, \ + .Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE, \ + .Init.DMAContinuousRequests = ENABLE, \ + .Init.Overrun = ADC_OVR_DATA_OVERWRITTEN, \ + } +#endif /* ADC1_CONFIG */ +#endif /* BSP_USING_ADC1 */ + +#ifdef __cplusplus +} +#endif + +#endif /* __ADC_CONFIG_H__ */ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h index 8dd8598a28..39a79dd536 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h @@ -19,35 +19,71 @@ extern "C" { #endif /* DMA1 channel1 */ +#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE) +#define SPI1_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler +#define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define SPI1_RX_DMA_INSTANCE DMA1_Channel1 +#define SPI1_RX_DMA_REQUEST DMA_REQUEST_SPI1_RX +#define SPI1_RX_DMA_IRQ DMA1_Channel1_IRQn +#ifdef BSP_UART1_RX_USING_DMA +#undef BSP_UART1_RX_USING_DMA +#endif +#ifdef BSP_SPI2_RX_USING_DMA +#undef BSP_SPI2_RX_USING_DMA +#endif +#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE) +#define UART1_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler +#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define UART1_RX_DMA_INSTANCE DMA1_Channel1 +#define UART1_RX_DMA_REQUEST DMA_REQUEST_USART1_RX +#define UART1_RX_DMA_IRQ DMA1_Channel1_IRQn +#ifdef BSP_SPI2_RX_USING_DMA +#undef BSP_SPI2_RX_USING_DMA +#endif +#elif defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE) +#define SPI2_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler +#define SPI2_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define SPI2_RX_DMA_INSTANCE DMA1_Channel1 +#define SPI2_RX_DMA_REQUEST DMA_REQUEST_SPI2_RX +#define SPI2_RX_DMA_IRQ DMA1_Channel1_IRQn +#endif -/* DMA1 channel2-3 DMA2 channel1-2 */ -#if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE) -#define UART1_DMA_RX_IRQHandler DMA1_Channel2_3_IRQHandler -#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN -#define UART1_RX_DMA_INSTANCE DMA1_Channel3 -#define UART1_RX_DMA_IRQ DMA1_Channel2_3_IRQn +/* DMA1 channle2-3 */ +#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE) +#define SPI1_DMA_TX_IRQHandler DMA1_Channel2_3_IRQHandler +#define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN +#define SPI1_TX_DMA_INSTANCE DMA1_Channel2 +#define SPI1_TX_DMA_REQUEST DMA_REQUEST_SPI1_TX +#define SPI1_TX_DMA_IRQ DMA1_Channel2_3_IRQn +#ifdef BSP_UART2_RX_USING_DMA +#undef BSP_UART2_RX_USING_DMA +#endif +#ifdef BSP_SPI2_TX_USING_DMA +#undef BSP_SPI2_TX_USING_DMA +#endif +#elif defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE) +#define UART2_DMA_RX_IRQHandler DMA1_Channel2_3_IRQHandler +#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define UART2_RX_DMA_INSTANCE DMA1_Channel2 +#define UART2_RX_DMA_REQUEST DMA_REQUEST_USART2_RX +#define UART2_RX_DMA_IRQ DMA1_Channel2_3_IRQn +#ifdef BSP_SPI2_TX_USING_DMA +#undef BSP_SPI2_TX_USING_DMA +#endif +#elif defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE) +#define SPI2_DMA_TX_IRQHandler DMA1_Channel2_3_IRQHandler +#define SPI2_TX_DMA_RCC RCC_AHBENR_DMA1EN +#define SPI2_TX_DMA_INSTANCE DMA1_Channel2 +#define SPI2_TX_DMA_REQUEST DMA_REQUEST_SPI2_TX +#define SPI2_TX_DMA_IRQ DMA1_Channel2_3_IRQn #endif -/* DMA1 channel2-3 DMA2 channel1-2 */ -/* DMA1 channel4-7 DMA2 channel3-5 */ -#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE) -#define UART2_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler -#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN -#define UART2_RX_DMA_INSTANCE DMA1_Channel5 -#define UART2_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn -#endif -/* DMA1 channel4-7 DMA2 channel3-5 */ -#if defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE) -#define UART3_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler -#define UART3_RX_DMA_RCC RCC_AHBENR_DMA1EN -#define UART3_RX_DMA_INSTANCE DMA1_Channel4 -#define UART3_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn -#endif -#if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE) -#define UART4_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler -#define UART4_RX_DMA_RCC RCC_AHBENR_DMA1EN -#define UART4_RX_DMA_INSTANCE DMA1_Channel6 -#define UART4_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn +#if defined(BSP_LPUART1_RX_USING_DMA) && !defined(LPUART1_RX_DMA_INSTANCE) +#define LPUART1_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler +#define LPUART1_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define LPUART1_RX_DMA_INSTANCE DMA1_Channel5 +#define LPUART1_RX_DMA_REQUEST DMA_REQUEST_LPUART1_RX +#define LPUART1_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn #endif #ifdef __cplusplus diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/pwm_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/pwm_config.h new file mode 100644 index 0000000000..834903f656 --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/pwm_config.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-01-05 zylx first version + * 2019-01-08 SummerGift clean up the code + */ + +#ifndef __PWM_CONFIG_H__ +#define __PWM_CONFIG_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef BSP_USING_PWM2 +#ifndef PWM2_CONFIG +#define PWM2_CONFIG \ + { \ + .tim_handle.Instance = TIM2, \ + .name = "pwm2", \ + .channel = 0 \ + } +#endif /* PWM2_CONFIG */ +#endif /* BSP_USING_PWM2 */ + +#ifdef BSP_USING_PWM3 +#ifndef PWM3_CONFIG +#define PWM3_CONFIG \ + { \ + .tim_handle.Instance = TIM3, \ + .name = "pwm3", \ + .channel = 0 \ + } +#endif /* PWM2_CONFIG */ +#endif /* BSP_USING_PWM2 */ + +#ifdef __cplusplus +} +#endif + +#endif /* __PWM_CONFIG_H__ */ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/spi_config.h new file mode 100644 index 0000000000..a09ec948a9 --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/spi_config.h @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-01-05 zylx first version + * 2019-01-08 SummerGift clean up the code + */ + +#ifndef __SPI_CONFIG_H__ +#define __SPI_CONFIG_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef BSP_USING_SPI1 +#ifndef SPI1_BUS_CONFIG +#define SPI1_BUS_CONFIG \ + { \ + .Instance = SPI1, \ + .bus_name = "spi1", \ + } +#endif /* SPI1_BUS_CONFIG */ +#endif /* BSP_USING_SPI1 */ + +#ifdef BSP_SPI1_TX_USING_DMA +#ifndef SPI1_TX_DMA_CONFIG +#define SPI1_TX_DMA_CONFIG \ + { \ + .dma_rcc = SPI1_TX_DMA_RCC, \ + .Instance = SPI1_TX_DMA_INSTANCE, \ + .request = SPI1_TX_DMA_REQUEST, \ + .dma_irq = SPI1_TX_DMA_IRQ, \ + } +#endif /* SPI1_TX_DMA_CONFIG */ +#endif /* BSP_SPI1_TX_USING_DMA */ + +#ifdef BSP_SPI1_RX_USING_DMA +#ifndef SPI1_RX_DMA_CONFIG +#define SPI1_RX_DMA_CONFIG \ + { \ + .dma_rcc = SPI1_RX_DMA_RCC, \ + .Instance = SPI1_RX_DMA_INSTANCE, \ + .request = SPI1_RX_DMA_REQUEST, \ + .dma_irq = SPI1_RX_DMA_IRQ, \ + } +#endif /* SPI1_RX_DMA_CONFIG */ +#endif /* BSP_SPI1_RX_USING_DMA */ + +#ifdef BSP_USING_SPI2 +#ifndef SPI2_BUS_CONFIG +#define SPI2_BUS_CONFIG \ + { \ + .Instance = SPI2, \ + .bus_name = "spi2", \ + } +#endif /* SPI2_BUS_CONFIG */ +#endif /* BSP_USING_SPI2 */ + +#ifdef BSP_SPI2_TX_USING_DMA +#ifndef SPI2_TX_DMA_CONFIG +#define SPI2_TX_DMA_CONFIG \ + { \ + .dma_rcc = SPI2_TX_DMA_RCC, \ + .Instance = SPI2_TX_DMA_INSTANCE, \ + .request = SPI2_TX_DMA_REQUEST, \ + .dma_irq = SPI2_TX_DMA_IRQ, \ + } +#endif /* SPI2_TX_DMA_CONFIG */ +#endif /* BSP_SPI2_TX_USING_DMA */ + +#ifdef BSP_SPI2_RX_USING_DMA +#ifndef SPI2_RX_DMA_CONFIG +#define SPI2_RX_DMA_CONFIG \ + { \ + .dma_rcc = SPI2_RX_DMA_RCC, \ + .Instance = SPI2_RX_DMA_INSTANCE, \ + .request = SPI2_RX_DMA_REQUEST, \ + .dma_irq = SPI2_RX_DMA_IRQ, \ + } +#endif /* SPI2_RX_DMA_CONFIG */ +#endif /* BSP_SPI2_RX_USING_DMA */ + +#ifdef __cplusplus +} +#endif + +#endif /*__SPI_CONFIG_H__ */ + + + diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/tim_config.h new file mode 100644 index 0000000000..01d3af18f1 --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/tim_config.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-01-05 zylx first version + * 2019-01-08 SummerGift clean up the code + */ + +#ifndef __TIM_CONFIG_H__ +#define __TIM_CONFIG_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef TIM_DEV_INFO_CONFIG +#define TIM_DEV_INFO_CONFIG \ + { \ + .maxfreq = 1000000, \ + .minfreq = 2000, \ + .maxcnt = 0xFFFF, \ + .cntmode = HWTIMER_CNTMODE_UP, \ + } +#endif /* TIM_DEV_INFO_CONFIG */ + +#ifdef BSP_USING_TIM2 +#ifndef TIM2_CONFIG +#define TIM2_CONFIG \ + { \ + .tim_handle.Instance = TIM2, \ + .tim_irqn = TIM2_IRQn, \ + .name = "timer2", \ + } +#endif /* TIM2_CONFIG */ +#endif /* BSP_USING_TIM2 */ + +#ifdef BSP_USING_TIM3 +#ifndef TIM3_CONFIG +#define TIM3_CONFIG \ + { \ + .tim_handle.Instance = TIM3, \ + .tim_irqn = TIM3_IRQn, \ + .name = "timer3", \ + } +#endif /* TIM3_CONFIG */ +#endif /* BSP_USING_TIM3 */ + +#ifdef __cplusplus +} +#endif + +#endif /* __TIM_CONFIG_H__ */ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h index bca5ef2cc4..a3019f5dec 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h @@ -21,14 +21,16 @@ .Instance = LPUART1, \ .irq_type = USART3_4_LPUART1_IRQn, \ } +#define LPUART1_IRQHandler USART3_4_LPUART1_IRQHandler #endif /* LPUART1_CONFIG */ #if defined(BSP_LPUART1_RX_USING_DMA) #ifndef LPUART1_DMA_CONFIG #define LPUART1_DMA_CONFIG \ { \ - .Instance = DMA1_Channel1, \ - .dma_rcc = RCC_AHBENR_DMA1EN, \ - .dma_irq = DMA1_Channel1_IRQn, \ + .Instance = LPUART1_RX_DMA_INSTANCE, \ + .request = LPUART1_RX_DMA_REQUEST, \ + .dma_rcc = LPUART1_RX_DMA_RCC, \ + .dma_irq = LPUART1_RX_DMA_IRQ, \ } #endif /* LPUART1_DMA_CONFIG */ #endif /* BSP_LPUART1_RX_USING_DMA */ @@ -50,6 +52,7 @@ #define UART1_DMA_CONFIG \ { \ .Instance = UART1_RX_DMA_INSTANCE, \ + .request = UART1_RX_DMA_REQUEST, \ .dma_rcc = UART1_RX_DMA_RCC, \ .dma_irq = UART1_RX_DMA_IRQ, \ } @@ -72,6 +75,7 @@ #define UART2_DMA_CONFIG \ { \ .Instance = UART2_RX_DMA_INSTANCE, \ + .request = UART2_RX_DMA_REQUEST, \ .dma_rcc = UART2_RX_DMA_RCC, \ .dma_irq = UART2_RX_DMA_IRQ, \ } @@ -103,6 +107,7 @@ #define UART3_DMA_CONFIG \ { \ .Instance = UART3_RX_DMA_INSTANCE, \ + .request = UART3_RX_DMA_REQUEST, \ .dma_rcc = UART3_RX_DMA_RCC, \ .dma_irq = UART3_RX_DMA_IRQ, \ } @@ -134,6 +139,7 @@ #define UART4_DMA_CONFIG \ { \ .Instance = UART4_RX_DMA_INSTANCE, \ + .request = UART4_RX_DMA_REQUEST, \ .dma_rcc = UART4_RX_DMA_RCC, \ .dma_irq = UART4_RX_DMA_IRQ, \ } diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_adc.c b/bsp/stm32/libraries/HAL_Drivers/drv_adc.c index 124fdab6bc..c998e0ce5a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_adc.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_adc.c @@ -50,7 +50,7 @@ static rt_err_t stm32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chan if (enabled) { -#ifdef SOC_SERIES_STM32L4 +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) ADC_Enable(stm32_adc_handler); #else __HAL_ADC_ENABLE(stm32_adc_handler); @@ -58,7 +58,7 @@ static rt_err_t stm32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chan } else { -#ifdef SOC_SERIES_STM32L4 +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) ADC_Disable(stm32_adc_handler); #else __HAL_ADC_DISABLE(stm32_adc_handler); @@ -150,7 +150,8 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch #if defined(SOC_SERIES_STM32F1) if (channel <= 17) -#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) +#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) \ + || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) if (channel <= 18) #endif { @@ -161,7 +162,8 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch { #if defined(SOC_SERIES_STM32F1) LOG_E("ADC channel must be between 0 and 17."); -#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) +#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) \ + || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) LOG_E("ADC channel must be between 0 and 18."); #endif return -RT_ERROR; @@ -215,18 +217,24 @@ static int stm32_adc_init(void) /* ADC init */ name_buf[3] = '0'; stm32_adc_obj[i].ADC_Handler = adc_config[i]; +#if defined(ADC1) if (stm32_adc_obj[i].ADC_Handler.Instance == ADC1) { name_buf[3] = '1'; } +#endif +#if defined(ADC2) if (stm32_adc_obj[i].ADC_Handler.Instance == ADC2) { name_buf[3] = '2'; } +#endif +#if defined(ADC3) if (stm32_adc_obj[i].ADC_Handler.Instance == ADC3) { name_buf[3] = '3'; } +#endif if (HAL_ADC_Init(&stm32_adc_obj[i].ADC_Handler) != HAL_OK) { LOG_E("%s init failed", name_buf); diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_config.h b/bsp/stm32/libraries/HAL_Drivers/drv_config.h index 2c1abd9ce5..d11118b865 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_config.h @@ -64,6 +64,10 @@ extern "C" { #elif defined(SOC_SERIES_STM32G0) #include "g0/dma_config.h" #include "g0/uart_config.h" +#include "g0/spi_config.h" +#include "g0/adc_config.h" +#include "g0/tim_config.h" +#include "g0/pwm_config.h" #endif #ifdef __cplusplus diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h index 1113c87095..a6ff9e209a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h @@ -34,7 +34,7 @@ struct dma_config { rt_uint32_t channel; #endif -#if defined(SOC_SERIES_STM32L4) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) rt_uint32_t request; #endif }; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c index 42f41fb620..773dd0aa65 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c @@ -544,7 +544,7 @@ static rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin, HAL_GPIO_DeInit(index->gpio, index->pin); pin_irq_enable_mask &= ~irqmap->pinbit; -#if defined(SOC_SERIES_STM32F0) +#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) if (( irqmap->pinbit>=GPIO_PIN_0 )&&( irqmap->pinbit<=GPIO_PIN_1 )) { if(!(pin_irq_enable_mask&(GPIO_PIN_0|GPIO_PIN_1))) @@ -618,12 +618,24 @@ rt_inline void pin_irq_hdr(int irqno) } } -void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) +#if defined(SOC_SERIES_STM32G0) +void HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin) { pin_irq_hdr(bit2bitno(GPIO_Pin)); } -#if defined(SOC_SERIES_STM32F0) +void HAL_GPIO_EXTI_Falling_Callback(uint16_t GPIO_Pin) +{ + pin_irq_hdr(bit2bitno(GPIO_Pin)); +} +#else +void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) +{ + pin_irq_hdr(bit2bitno(GPIO_Pin)); +} +#endif + +#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) void EXTI0_1_IRQHandler(void) { rt_interrupt_enter(); diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c b/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c index 57ff812c52..d8ad946fd0 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c @@ -168,11 +168,11 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11) #elif defined(SOC_SERIES_STM32L4) if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17) -#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) +#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) if (0) #endif { -#ifndef SOC_SERIES_STM32F0 +#if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0) prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * 2 / 10000) - 1; #endif } @@ -192,7 +192,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) tim->Init.CounterMode = TIM_COUNTERMODE_DOWN; } tim->Init.RepetitionCounter = 0; -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; #endif if (HAL_TIM_Base_Init(tim) != HAL_OK) @@ -282,7 +282,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11) #elif defined(SOC_SERIES_STM32L4) if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17) -#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) +#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) if (0) #endif { @@ -296,7 +296,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) { #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) val = HAL_RCC_GetPCLK1Freq() * 2 / freq; -#elif defined(SOC_SERIES_STM32F0) +#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) val = HAL_RCC_GetPCLK1Freq() / freq; #endif } diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c b/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c index f0157976ce..f781e51b0d 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c @@ -189,17 +189,17 @@ static rt_err_t drv_pwm_get(TIM_HandleTypeDef *htim, struct rt_pwm_configuration if (htim->Instance == TIM9 || htim->Instance == TIM10 || htim->Instance == TIM11) #elif defined(SOC_SERIES_STM32L4) if (htim->Instance == TIM15 || htim->Instance == TIM16 || htim->Instance == TIM17) -#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) +#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) if (0) #endif { -#ifndef SOC_SERIES_STM32F0 +#if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0) tim_clock = HAL_RCC_GetPCLK2Freq() * 2; #endif } else { -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) tim_clock = HAL_RCC_GetPCLK1Freq(); #else tim_clock = HAL_RCC_GetPCLK1Freq() * 2; @@ -234,17 +234,17 @@ static rt_err_t drv_pwm_set(TIM_HandleTypeDef *htim, struct rt_pwm_configuration if (htim->Instance == TIM9 || htim->Instance == TIM10 || htim->Instance == TIM11) #elif defined(SOC_SERIES_STM32L4) if (htim->Instance == TIM15 || htim->Instance == TIM16 || htim->Instance == TIM17) -#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) +#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) if (0) #endif { -#ifndef SOC_SERIES_STM32F0 +#if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0) tim_clock = HAL_RCC_GetPCLK2Freq() * 2; #endif } else { -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) tim_clock = HAL_RCC_GetPCLK1Freq(); #else tim_clock = HAL_RCC_GetPCLK1Freq() * 2; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c index 06c0a90217..12e9fbf3d6 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c @@ -145,7 +145,7 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur uint32_t SPI_APB_CLOCK; -#ifdef SOC_SERIES_STM32F0 +#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) SPI_APB_CLOCK = HAL_RCC_GetPCLK1Freq(); #else SPI_APB_CLOCK = HAL_RCC_GetPCLK2Freq(); @@ -203,7 +203,7 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur spi_handle->Init.TIMode = SPI_TIMODE_DISABLE; spi_handle->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; spi_handle->State = HAL_SPI_STATE_RESET; -#ifdef SOC_SERIES_STM32L4 +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) spi_handle->Init.NSSPMode = SPI_NSS_PULSE_DISABLE; #endif @@ -212,7 +212,8 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur return RT_EIO; } -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0)|| defined(SOC_SERIES_STM32F7) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) \ + || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32G0) SET_BIT(spi_handle->Instance->CR2, SPI_RXFIFO_THRESHOLD_HF); #endif @@ -389,7 +390,7 @@ static int rt_hw_spi_bus_init(void) spi_bus_obj[i].dma.handle_rx.Instance = spi_config[i].dma_rx->Instance; #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) spi_bus_obj[i].dma.handle_rx.Init.Channel = spi_config[i].dma_rx->channel; -#elif defined(SOC_SERIES_STM32L4) +#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) spi_bus_obj[i].dma.handle_rx.Init.Request = spi_config[i].dma_rx->request; #endif spi_bus_obj[i].dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; @@ -408,7 +409,7 @@ static int rt_hw_spi_bus_init(void) { rt_uint32_t tmpreg = 0x00U; -#if defined(SOC_SERIES_STM32F1) +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ SET_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc); tmpreg = READ_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc); @@ -427,7 +428,7 @@ static int rt_hw_spi_bus_init(void) spi_bus_obj[i].dma.handle_tx.Instance = spi_config[i].dma_tx->Instance; #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) spi_bus_obj[i].dma.handle_tx.Init.Channel = spi_config[i].dma_tx->channel; -#elif defined(SOC_SERIES_STM32L4) +#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) spi_bus_obj[i].dma.handle_tx.Init.Request = spi_config[i].dma_tx->request; #endif spi_bus_obj[i].dma.handle_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; @@ -446,7 +447,7 @@ static int rt_hw_spi_bus_init(void) { rt_uint32_t tmpreg = 0x00U; -#if defined(SOC_SERIES_STM32F1) +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ SET_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc); tmpreg = READ_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc); diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c index 3bc78acfa0..0477f7d9fd 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c @@ -432,7 +432,7 @@ void UART5_DMA_RX_IRQHandler(void) #endif /* BSP_USING_UART5*/ #if defined(BSP_USING_LPUART1) -void USART3_4_LPUART1_IRQHandler(void) +void LPUART1_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); @@ -442,7 +442,20 @@ void USART3_4_LPUART1_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#endif + +#if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) +void LPUART1_DMA_RX_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma.handle); + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */ +#endif /* BSP_USING_LPUART1 */ #ifdef RT_SERIAL_USING_DMA static void stm32_dma_config(struct rt_serial_device *serial) @@ -471,13 +484,12 @@ static void stm32_dma_config(struct rt_serial_device *serial) __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle); -#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \ - || defined(SOC_SERIES_STM32L0) +#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0) uart->dma.handle.Instance = uart->config->dma_rx->Instance; #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) uart->dma.handle.Instance = uart->config->dma_rx->Instance; uart->dma.handle.Init.Channel = uart->config->dma_rx->channel; -#elif defined(SOC_SERIES_STM32L4) +#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) uart->dma.handle.Instance = uart->config->dma_rx->Instance; uart->dma.handle.Init.Request = uart->config->dma_rx->request; #endif @@ -597,6 +609,11 @@ static void stm32_uart_get_dma_config(void) static struct dma_config uart5_dma_rx = UART5_DMA_CONFIG; uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx; #endif +#ifdef BSP_LPUART1_RX_USING_DMA + uart_obj[LPUART1_INDEX].uart_dma_flag = 1; + static struct dma_config uart5_dma_rx = LPUART1_DMA_CONFIG; + uart_config[LPUART1_INDEX].dma_rx = &uart5_dma_rx; +#endif } int rt_hw_usart_init(void) diff --git a/bsp/stm32/libraries/STM32G0xx_HAL/CMSIS/ST/STM32G0xx/Source/Templates/gcc/startup_stm32g071xx.s b/bsp/stm32/libraries/STM32G0xx_HAL/CMSIS/ST/STM32G0xx/Source/Templates/gcc/startup_stm32g071xx.s index f7f7e7bf06..f7654671e4 100644 --- a/bsp/stm32/libraries/STM32G0xx_HAL/CMSIS/ST/STM32G0xx/Source/Templates/gcc/startup_stm32g071xx.s +++ b/bsp/stm32/libraries/STM32G0xx_HAL/CMSIS/ST/STM32G0xx/Source/Templates/gcc/startup_stm32g071xx.s @@ -85,7 +85,7 @@ LoopFillZerobss: /* Call the clock system intitialization function.*/ bl SystemInit /* Call static constructors */ - bl __libc_init_array +/* bl __libc_init_array */ /* Call the application's entry point.*/ bl entry diff --git a/bsp/stm32/libraries/STM32G0xx_HAL/SConscript b/bsp/stm32/libraries/STM32G0xx_HAL/SConscript index e01201e47a..aa9dd911bc 100644 --- a/bsp/stm32/libraries/STM32G0xx_HAL/SConscript +++ b/bsp/stm32/libraries/STM32G0xx_HAL/SConscript @@ -47,11 +47,10 @@ if GetDepend(['RT_USING_ADC']): src += ['STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.c'] src += ['STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.c'] src += ['STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.c'] - -if GetDepend(['RT_USING_RTC']): - src += ['STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rtc.c'] - src += ['STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rtc_ex.c'] - src += ['STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rtc.c'] + +if GetDepend(['RT_USING_WDT']): + src += ['STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_iwdg.c'] + src += ['STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_wwdg.c'] path = [cwd + '/STM32G0xx_HAL_Driver/Inc', cwd + '/CMSIS/ST/STM32G0xx/Include', diff --git a/bsp/stm32/stm32g071-st-nucleo/README.md b/bsp/stm32/stm32g071-st-nucleo/README.md index 409e67bce1..d38cd76edd 100644 --- a/bsp/stm32/stm32g071-st-nucleo/README.md +++ b/bsp/stm32/stm32g071-st-nucleo/README.md @@ -1,4 +1,4 @@ -# BSP README 模板 +# STM32G071 BSP ## 简介 @@ -55,10 +55,9 @@ STM32G071RB-Nucleo 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 - ### 快速上手 -本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 #### 硬件连接 @@ -68,7 +67,7 @@ STM32G071RB-Nucleo 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 -> 工程默认配置使用 xxx 仿真器下载程序，在通过 xxx 连接开发板的基础上，点击下载按钮即可下载程序到开发板 +> 将工程使用的仿真器设置为ST-Link并安装仿真器好驱动程序以后，将开发板连接到PC，点击下载按钮即可下载程序到开发板。 #### 运行结果 @@ -83,6 +82,7 @@ STM32G071RB-Nucleo 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 2006 - 2018 Copyright by rt-thread team msh > ``` + ### 进阶使用 此 BSP 默认只开启了 GPIO 和 LPUART 的功能，如果需使用 SPI，I2C 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： @@ -105,4 +105,4 @@ msh > 维护人: -- [gztss](https://github.com/gztss) \ No newline at end of file +- [gztss](https://github.com/gztss) diff --git a/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/.mxproject index 5f8b4fdf7c..a1c5f17b4b 100644 --- a/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/.mxproject +++ b/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/.mxproject @@ -1,13 +1,13 @@ [PreviousGenFiles] -HeaderPath=C:/Users/Administrator/Documents/rt-thread/bsp/stm32/stm32g071-nucleo/board/CubeMX_Config/Inc +HeaderPath=C:/Users/Administrator/Documents/rt-thread/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/Inc HeaderFiles=stm32g0xx_it.h;stm32g0xx_hal_conf.h;main.h; -SourcePath=C:/Users/Administrator/Documents/rt-thread/bsp/stm32/stm32g071-nucleo/board/CubeMX_Config/Src +SourcePath=C:/Users/Administrator/Documents/rt-thread/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/Src SourceFiles=stm32g0xx_it.c;stm32g0xx_hal_msp.c;main.c; [PreviousLibFiles] -LibFiles=Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_adc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_adc_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_adc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dac.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dac_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_tim.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_tim_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ramfunc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_cortex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_def.h;Drivers/STM32G0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_adc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_adc_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_adc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dac.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dac_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_tim.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_tim_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ramfunc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_cortex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_def.h;Drivers/STM32G0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g071xx.h;Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g0xx.h;Drivers/CMSIS/Device/ST/STM32G0xx/Include/system_stm32g0xx.h;Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/system_stm32g0xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; +LibFiles=Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_adc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_adc_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_adc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dac.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dac_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_iwdg.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_tim.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_tim_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ramfunc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_cortex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_def.h;Drivers/STM32G0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_iwdg.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c;Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_adc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_adc_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_adc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dac.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dac_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_iwdg.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_tim.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_tim_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ramfunc.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr_ex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_cortex.h;Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_def.h;Drivers/STM32G0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g071xx.h;Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g0xx.h;Drivers/CMSIS/Device/ST/STM32G0xx/Include/system_stm32g0xx.h;Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/system_stm32g0xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; [PreviousUsedKeilFiles] -SourceFiles=..\Src\main.c;..\Src\stm32g0xx_it.c;..\Src\stm32g0xx_hal_msp.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c;../\Src/system_stm32g0xx.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c;../\Src/system_stm32g0xx.c;../Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/system_stm32g0xx.c;C:/Users/Administrator/Documents/rt-thread/bsp/stm32/stm32g071-nucleo/board/CubeMX_Config//MDK-ARM/startup_stm32g071xx.s; +SourceFiles=..\Src\main.c;..\Src\stm32g0xx_it.c;..\Src\stm32g0xx_hal_msp.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_iwdg.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c;../\Src/system_stm32g0xx.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_iwdg.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c;../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c;../\Src/system_stm32g0xx.c;../Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/system_stm32g0xx.c;C:/Users/Administrator/Documents/rt-thread/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config//MDK-ARM/startup_stm32g071xx.s; HeaderPath=..\Drivers\STM32G0xx_HAL_Driver\Inc;..\Drivers\STM32G0xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32G0xx\Include;..\Drivers\CMSIS\Include;..\Inc; diff --git a/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/Inc/stm32g0xx_hal_conf.h b/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/Inc/stm32g0xx_hal_conf.h index d925a32adf..43e6db8d8d 100644 --- a/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/Inc/stm32g0xx_hal_conf.h +++ b/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/Inc/stm32g0xx_hal_conf.h @@ -59,7 +59,7 @@ extern "C" { /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +#define HAL_IWDG_MODULE_ENABLED /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_LPTIM_MODULE_ENABLED */ /* #define HAL_RNG_MODULE_ENABLED */ diff --git a/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/Src/main.c index 38a25e412e..822a03123b 100644 --- a/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/Src/main.c +++ b/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/Src/main.c @@ -66,6 +66,8 @@ ADC_HandleTypeDef hadc1; DAC_HandleTypeDef hdac1; +IWDG_HandleTypeDef hiwdg; + UART_HandleTypeDef hlpuart1; UART_HandleTypeDef huart1; UART_HandleTypeDef huart2; @@ -94,6 +96,7 @@ static void MX_USART3_UART_Init(void); static void MX_SPI1_Init(void); static void MX_SPI2_Init(void); static void MX_DAC1_Init(void); +static void MX_IWDG_Init(void); /* USER CODE BEGIN PFP */ /* USER CODE END PFP */ @@ -141,6 +144,7 @@ int main(void) MX_SPI1_Init(); MX_SPI2_Init(); MX_DAC1_Init(); + MX_IWDG_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -171,10 +175,11 @@ void SystemClock_Config(void) HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); /**Initializes the CPU, AHB and APB busses clocks */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; @@ -317,6 +322,35 @@ static void MX_DAC1_Init(void) } +/** + * @brief IWDG Initialization Function + * @param None + * @retval None + */ +static void MX_IWDG_Init(void) +{ + + /* USER CODE BEGIN IWDG_Init 0 */ + + /* USER CODE END IWDG_Init 0 */ + + /* USER CODE BEGIN IWDG_Init 1 */ + + /* USER CODE END IWDG_Init 1 */ + hiwdg.Instance = IWDG; + hiwdg.Init.Prescaler = IWDG_PRESCALER_4; + hiwdg.Init.Window = 4095; + hiwdg.Init.Reload = 4095; + if (HAL_IWDG_Init(&hiwdg) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN IWDG_Init 2 */ + + /* USER CODE END IWDG_Init 2 */ + +} + /** * @brief LPUART1 Initialization Function * @param None diff --git a/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/stm32g071rbt6.ioc b/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/stm32g071rbt6.ioc index b0854d0869..441ecb95cd 100644 --- a/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/stm32g071rbt6.ioc +++ b/bsp/stm32/stm32g071-st-nucleo/board/CubeMX_Config/stm32g071rbt6.ioc @@ -17,18 +17,19 @@ LPUART1.WordLength=UART_WORDLENGTH_8B Mcu.Family=STM32G0 Mcu.IP0=ADC1 Mcu.IP1=DAC1 -Mcu.IP10=USART1 -Mcu.IP11=USART2 -Mcu.IP12=USART3 -Mcu.IP2=LPUART1 -Mcu.IP3=NVIC -Mcu.IP4=RCC -Mcu.IP5=SPI1 -Mcu.IP6=SPI2 -Mcu.IP7=SYS -Mcu.IP8=TIM2 -Mcu.IP9=TIM3 -Mcu.IPNb=13 +Mcu.IP10=TIM3 +Mcu.IP11=USART1 +Mcu.IP12=USART2 +Mcu.IP13=USART3 +Mcu.IP2=IWDG +Mcu.IP3=LPUART1 +Mcu.IP4=NVIC +Mcu.IP5=RCC +Mcu.IP6=SPI1 +Mcu.IP7=SPI2 +Mcu.IP8=SYS +Mcu.IP9=TIM2 +Mcu.IPNb=14 Mcu.Name=STM32G071R(6-8-B)Tx Mcu.Package=LQFP64 Mcu.Pin0=PC11 @@ -52,17 +53,18 @@ Mcu.Pin24=PA13 Mcu.Pin25=PA14-BOOT0 Mcu.Pin26=PA15 Mcu.Pin27=PD5 -Mcu.Pin28=VP_SYS_VS_Systick -Mcu.Pin29=VP_TIM2_VS_ClockSourceINT +Mcu.Pin28=VP_IWDG_VS_IWDG +Mcu.Pin29=VP_SYS_VS_Systick Mcu.Pin3=PC15-OSC32_OUT (PC15) -Mcu.Pin30=VP_TIM3_VS_ClockSourceINT +Mcu.Pin30=VP_TIM2_VS_ClockSourceINT +Mcu.Pin31=VP_TIM3_VS_ClockSourceINT Mcu.Pin4=PF0-OSC_IN (PF0) Mcu.Pin5=PC2 Mcu.Pin6=PC3 Mcu.Pin7=PA0 Mcu.Pin8=PA1 Mcu.Pin9=PA2 -Mcu.PinsNb=31 +Mcu.PinsNb=32 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32G071RBTx @@ -177,7 +179,7 @@ ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=MDK-ARM V5 ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_USART1_UART_Init-USART1-false-HAL-true,8-MX_USART2_UART_Init-USART2-false-HAL-true,9-MX_USART3_UART_Init-USART3-false-HAL-true,10-MX_SPI1_Init-SPI1-false-HAL-true,11-MX_SPI2_Init-SPI2-false-HAL-true,12-MX_DAC1_Init-DAC1-false-HAL-true +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_USART1_UART_Init-USART1-false-HAL-true,8-MX_USART2_UART_Init-USART2-false-HAL-true,9-MX_USART3_UART_Init-USART3-false-HAL-true,10-MX_SPI1_Init-SPI1-false-HAL-true,11-MX_SPI2_Init-SPI2-false-HAL-true,12-MX_DAC1_Init-DAC1-false-HAL-true,13-MX_IWDG_Init-IWDG-false-HAL-true RCC.ADCFreq_Value=64000000 RCC.AHBFreq_Value=64000000 RCC.APBFreq_Value=64000000 @@ -248,6 +250,8 @@ USART2.IPParameters=VirtualMode-Asynchronous USART2.VirtualMode-Asynchronous=VM_ASYNC USART3.IPParameters=VirtualMode-Asynchronous USART3.VirtualMode-Asynchronous=VM_ASYNC +VP_IWDG_VS_IWDG.Mode=IWDG_Activate +VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick VP_TIM2_VS_ClockSourceINT.Mode=Internal diff --git a/bsp/stm32/stm32g071-st-nucleo/board/Kconfig b/bsp/stm32/stm32g071-st-nucleo/board/Kconfig index d0bcce0b02..8766f9943f 100644 --- a/bsp/stm32/stm32g071-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32g071-st-nucleo/board/Kconfig @@ -54,6 +54,120 @@ menu "On-chip Peripheral Drivers" default n endif + menuconfig BSP_USING_TIM + bool "Enable timer" + default n + select RT_USING_HWTIMER + if BSP_USING_TIM + + config BSP_USING_TIM2 + bool "Enable TIM2" + default n + + config BSP_USING_TIM3 + bool "Enable TIM3" + default n + endif + + menuconfig BSP_USING_PWM + bool "Enable pwm" + default n + select RT_USING_PWM + if BSP_USING_PWM + menuconfig BSP_USING_PWM3 + bool "Enable timer3 output pwm" + default n + if BSP_USING_PWM3 + config BSP_USING_PWM3_CH1 + bool "Enable PWM3 channel1" + default n + + config BSP_USING_PWM3_CH2 + bool "Enable PWM3 channel2" + default n + + config BSP_USING_PWM3_CH3 + bool "Enable PWM3 channel3" + default n + + config BSP_USING_PWM3_CH4 + bool "Enable PWM3 channel4" + default n + endif + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + + config BSP_SPI1_TX_USING_DMA + bool "Enable SPI1 TX DMA" + depends on BSP_USING_SPI1 + default n + + config BSP_SPI1_RX_USING_DMA + bool "Enable SPI1 RX DMA" + depends on BSP_USING_SPI1 + select BSP_SPI1_TX_USING_DMA + default n + + config BSP_USING_SPI2 + bool "Enable SPI2 BUS" + default n + + config BSP_SPI2_TX_USING_DMA + bool "Enable SPI2 TX DMA" + depends on BSP_USING_SPI2 + default n + + config BSP_SPI2_RX_USING_DMA + bool "Enable SPI2 RX DMA" + depends on BSP_USING_SPI2 + select BSP_SPI2_TX_USING_DMA + default n + endif + + menuconfig BSP_USING_I2C1 + bool "Enable I2C1 BUS (software simulation)" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C1 + config BSP_I2C1_SCL_PIN + int "i2c1 scl pin number" + range 0 47 + default 22 + config BSP_I2C1_SDA_PIN + int "I2C1 sda pin number" + range 0 47 + default 23 + endif + + menuconfig BSP_USING_ADC + bool "Enable ADC" + default n + select RT_USING_ADC + if BSP_USING_ADC + config BSP_USING_ADC1 + bool "Enable ADC1" + default n + endif + + config BSP_USING_ON_CHIP_FLASH + bool "Enable on-chip FLASH" + default n + + config BSP_USING_WDT + bool "Enable Watchdog Timer" + select RT_USING_WDT + default n + endmenu menu "Board extended module Drivers" diff --git a/bsp/stm32/stm32g071-st-nucleo/board/ports/fal_cfg.h b/bsp/stm32/stm32g071-st-nucleo/board/ports/fal_cfg.h new file mode 100644 index 0000000000..ee65e188d9 --- /dev/null +++ b/bsp/stm32/stm32g071-st-nucleo/board/ports/fal_cfg.h @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-12-8 zylx first version + */ + +#ifndef _FAL_CFG_H_ +#define _FAL_CFG_H_ + +#include +#include + +extern const struct fal_flash_dev stm32_onchip_flash; + +/* flash device table */ +#define FAL_FLASH_DEV_TABLE \ +{ \ + &stm32_onchip_flash, \ +} +/* ====================== Partition Configuration ========================== */ +#ifdef FAL_PART_HAS_TABLE_CFG + +/* partition table */ +#define FAL_PART_TABLE \ +{ \ + {FAL_PART_MAGIC_WROD, "app", "onchip_flash", 0, 112 * 1024, 0}, \ + {FAL_PART_MAGIC_WROD, "param", "onchip_flash", 112 * 1024 , 16 * 1024, 0}, \ +} +#endif /* FAL_PART_HAS_TABLE_CFG */ +#endif /* _FAL_CFG_H_ */